]> git.karo-electronics.de Git - karo-tx-linux.git/commitdiff
Merge remote-tracking branches 'spi/topic/drivers', 'spi/topic/dw', 'spi/topic/efm32...
authorMark Brown <broonie@linaro.org>
Sun, 30 Mar 2014 00:51:10 +0000 (00:51 +0000)
committerMark Brown <broonie@linaro.org>
Sun, 30 Mar 2014 00:51:10 +0000 (00:51 +0000)
1  2  3  4  5  6  7  8  9 
drivers/spi/Kconfig
drivers/spi/spi-dw.c
drivers/spi/spi-efm32.c
drivers/spi/spi-fsl-dspi.c
drivers/spi/spi-gpio.c

diff --combined drivers/spi/Kconfig
index a79e89f63b71272ad8cc8d62a788fe2ef2569263,ba9310bc9acb7449a91ccb59b8f7de5c09c5801d,b1fc8eb64f7e352053dada450bb36166b89b02ed,ba9310bc9acb7449a91ccb59b8f7de5c09c5801d,ba9310bc9acb7449a91ccb59b8f7de5c09c5801d,ba9310bc9acb7449a91ccb59b8f7de5c09c5801d,00e951045aac7416def47a634a2da37940d34c11,ba9310bc9acb7449a91ccb59b8f7de5c09c5801d,ba9310bc9acb7449a91ccb59b8f7de5c09c5801d..eea4eb83f352ddd41de19987baadee84a45f2bdc
@@@@@@@@@@ -150,7 -150,7 -150,7 -150,7 -150,7 -150,7 -150,7 -150,7 -150,7 +150,7 @@@@@@@@@@ config SPI_BUTTERFL
         
         config SPI_CLPS711X
                tristate "CLPS711X host SPI controller"
 --------       depends on ARCH_CLPS711X
 ++++++++       depends on ARCH_CLPS711X || COMPILE_TEST
                help
                  This enables dedicated general purpose SPI/Microwire1-compatible
                  master mode interface (SSI1) for CLPS711X-based CPUs.
@@@@@@@@@@ -270,6 -270,6 -270,6 -270,6 -270,6 -270,6 -270,7 -270,6 -270,6 +270,7 @@@@@@@@@@ config SPI_FSL_SP
         config SPI_FSL_DSPI
                tristate "Freescale DSPI controller"
                select SPI_BITBANG
++++++ ++       select REGMAP_MMIO
                depends on SOC_VF610 || COMPILE_TEST
                help
                  This enables support for the Freescale DSPI controller in master
@@@@@@@@@@ -376,10 -376,10 -376,10 -376,10 -376,10 -376,10 -377,10 -376,10 -376,10 +377,10 @@@@@@@@@@ config SPI_PXA2XX_PC
                def_tristate SPI_PXA2XX && PCI
         
         config SPI_RSPI
 --------       tristate "Renesas RSPI controller"
 ++++++++       tristate "Renesas RSPI/QSPI controller"
                depends on (SUPERH && SH_DMAE_BASE) || ARCH_SHMOBILE
                help
 --------         SPI driver for Renesas RSPI blocks.
 ++++++++         SPI driver for Renesas RSPI and QSPI blocks.
         
         config SPI_S3C24XX
                tristate "Samsung S3C24XX series SPI"
@@@@@@@@@@ -546,7 -546,7 -546,7 -546,7 -546,7 -546,7 -547,7 -546,7 -546,7 +547,7 @@@@@@@@@@ config SPI_DW_MID_DM
         
         config SPI_DW_MMIO
                tristate "Memory-mapped io interface driver for DW SPI core"
-- ------       depends on SPI_DESIGNWARE && HAVE_CLK
++ ++++++       depends on SPI_DESIGNWARE
         
         #
         # There are lots of SPI device types, with sensors and memory
diff --combined drivers/spi/spi-dw.c
index bf98d63d92b3eabbd80ea49d125421069139c535,390da9bf2d8479c54ff9895e8dbfddf64adec5d6,79fd1fa95bf26051f104af85086dbb0e70404e80,bf98d63d92b3eabbd80ea49d125421069139c535,bf98d63d92b3eabbd80ea49d125421069139c535,bf98d63d92b3eabbd80ea49d125421069139c535,bf98d63d92b3eabbd80ea49d125421069139c535,bf98d63d92b3eabbd80ea49d125421069139c535,bf98d63d92b3eabbd80ea49d125421069139c535..712ac5629cd46cea34fa6713a5a0462186aa6de0
@@@@@@@@@@ -276,8 -276,7 -276,8 -276,8 -276,8 -276,8 -276,8 -276,8 -276,8 +276,7 @@@@@@@@@@ static void giveback(struct dw_spi *dws
                queue_work(dws->workqueue, &dws->pump_messages);
                spin_unlock_irqrestore(&dws->lock, flags);
         
- -------       last_transfer = list_entry(msg->transfers.prev,
- -------                                       struct spi_transfer,
+ +++++++       last_transfer = list_last_entry(&msg->transfers, struct spi_transfer,
                                                transfer_list);
         
                if (!last_transfer->cs_change && dws->cs_control)
@@@@@@@@@@ -439,12 -438,12 -439,6 -439,12 -439,12 -439,12 -439,12 -439,12 -439,12 +438,6 @@@@@@@@@@ static void pump_transfers(unsigned lon
         
                        if (transfer->speed_hz != speed) {
                                speed = transfer->speed_hz;
-- ------                       if (speed > dws->max_freq) {
-- ------                               printk(KERN_ERR "MRST SPI0: unsupported"
-- ------                                       "freq: %dHz\n", speed);
-- ------                               message->status = -EIO;
-- ------                               goto early_exit;
-- ------                       }
         
                                /* clk_div doesn't support odd number */
                                clk_div = dws->max_freq / speed;
@@@@@@@@@@ -671,12 -670,12 -665,6 -671,12 -671,12 -671,12 -671,12 -671,12 -671,12 +664,6 @@@@@@@@@@ static int dw_spi_setup(struct spi_devi
                return 0;
         }
         
-- ------static void dw_spi_cleanup(struct spi_device *spi)
-- ------{
-- ------       struct chip_data *chip = spi_get_ctldata(spi);
-- ------       kfree(chip);
-- ------}
-- ------
         static int init_queue(struct dw_spi *dws)
         {
                INIT_LIST_HEAD(&dws->queue);
@@@@@@@@@@ -806,9 -805,9 -794,9 -806,9 -806,9 -806,9 -806,9 -806,9 -806,9 +793,9 @@@@@@@@@@ int dw_spi_add_host(struct device *dev
                master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16);
                master->bus_num = dws->bus_num;
                master->num_chipselect = dws->num_cs;
-- ------       master->cleanup = dw_spi_cleanup;
                master->setup = dw_spi_setup;
                master->transfer = dw_spi_transfer;
++ ++++++       master->max_speed_hz = dws->max_freq;
         
                /* Basic HW init */
                spi_hw_init(dws);
diff --combined drivers/spi/spi-efm32.c
index f53bbea385c0938a5931c52cdbcf1d15f7a95873,d4d3cc534792ad024d9680f8e52025460f26e7b3,d4d3cc534792ad024d9680f8e52025460f26e7b3,4a5a359dafcaf99069ccbe5145cf5e2093401926,d4d3cc534792ad024d9680f8e52025460f26e7b3,d4d3cc534792ad024d9680f8e52025460f26e7b3,d4d3cc534792ad024d9680f8e52025460f26e7b3,d4d3cc534792ad024d9680f8e52025460f26e7b3,d4d3cc534792ad024d9680f8e52025460f26e7b3..be44a3eeb5e8b2b244704a48a4c2fc4184b45aa0
@@@@@@@@@@ -198,7 -198,7 -198,7 -198,7 -198,7 -198,7 -198,7 -198,7 -198,7 +198,7 @@@@@@@@@@ static int efm32_spi_txrx_bufs(struct s
         
                efm32_spi_filltx(ddata);
         
 --------       init_completion(&ddata->done);
 ++++++++       reinit_completion(&ddata->done);
         
                efm32_spi_write32(ddata, REG_IF_TXBL | REG_IF_RXDATAV, REG_IEN);
         
@@@@@@@@@@ -287,17 -287,17 -287,17 -287,17 -287,17 -287,17 -287,17 -287,17 -287,17 +287,17 @@@@@@@@@@ static u32 efm32_spi_get_configured_loc
                return (reg & REG_ROUTE_LOCATION__MASK) >> __ffs(REG_ROUTE_LOCATION__MASK);
         }
         
--- -----static int efm32_spi_probe_dt(struct platform_device *pdev,
+++ +++++static void efm32_spi_probe_dt(struct platform_device *pdev,
                        struct spi_master *master, struct efm32_spi_ddata *ddata)
         {
                struct device_node *np = pdev->dev.of_node;
                u32 location;
                int ret;
         
--- -----       if (!np)
--- -----               return 1;
--- -----
--- -----       ret = of_property_read_u32(np, "location", &location);
+++ +++++       ret = of_property_read_u32(np, "efm32,location", &location);
+++ +++++       if (ret)
+++ +++++               /* fall back to old and (wrongly) generic property "location" */
+++ +++++               ret = of_property_read_u32(np, "location", &location);
                if (!ret) {
                        dev_dbg(&pdev->dev, "using location %u\n", location);
                } else {
                }
         
                ddata->pdata.location = location;
 -- -----
 -- -----       /* spi core takes care about the bus number using an alias */
 -- -----       master->bus_num = -1;
 -- -----
--- -----       return 0;
         }
         
         static int efm32_spi_probe(struct platform_device *pdev)
                int ret;
                struct spi_master *master;
                struct device_node *np = pdev->dev.of_node;
--- -----       unsigned int num_cs, i;
+++ +++++       int num_cs, i;
+++ +++++
+++ +++++       if (!np)
+++ +++++               return -EINVAL;
         
                num_cs = of_gpio_named_count(np, "cs-gpios");
+++ +++++       if (num_cs < 0)
+++ +++++               return num_cs;
         
                master = spi_alloc_master(&pdev->dev,
                                sizeof(*ddata) + num_cs * sizeof(unsigned));
                ddata->bitbang.txrx_bufs = efm32_spi_txrx_bufs;
         
                spin_lock_init(&ddata->lock);
 ++++++++       init_completion(&ddata->done);
         
                ddata->clk = devm_clk_get(&pdev->dev, NULL);
                if (IS_ERR(ddata->clk)) {
                        goto err;
                }
         
--- -----       ret = efm32_spi_probe_dt(pdev, master, ddata);
--- -----       if (ret > 0) {
--- -----               /* not created by device tree */
--- -----               const struct efm32_spi_pdata *pdata =
--- -----                       dev_get_platdata(&pdev->dev);
--- -----
--- -----               if (pdata)
--- -----                       ddata->pdata = *pdata;
--- -----               else
--- -----                       ddata->pdata.location =
--- -----                               efm32_spi_get_configured_location(ddata);
--- -----
--- -----               master->bus_num = pdev->id;
--- -----
--- -----       } else if (ret < 0) {
--- -----               goto err_disable_clk;
--- -----       }
+++ +++++       efm32_spi_probe_dt(pdev, master, ddata);
         
                efm32_spi_write32(ddata, 0, REG_IEN);
                efm32_spi_write32(ddata, REG_ROUTE_TXPEN | REG_ROUTE_RXPEN |
@@@@@@@@@@ -484,6 -487,6 -487,6 -471,9 -487,6 -487,6 -487,6 -487,6 -487,6 +472,9 @@@@@@@@@@ static int efm32_spi_remove(struct plat
         
         static const struct of_device_id efm32_spi_dt_ids[] = {
                {
+++ +++++               .compatible = "energymicro,efm32-spi",
+++ +++++       }, {
+++ +++++               /* doesn't follow the "vendor,device" scheme, don't use */
                        .compatible = "efm32,spi",
                }, {
                        /* sentinel */
index a25392065d9b838ef852e93d09e53d0d121ac485,ec79f726672a14f7644810101afe59e82322976c,ec79f726672a14f7644810101afe59e82322976c,ec79f726672a14f7644810101afe59e82322976c,ec79f726672a14f7644810101afe59e82322976c,ec79f726672a14f7644810101afe59e82322976c,c5ecfc1240ab8619159d64b3c802225326b4cec2,ec79f726672a14f7644810101afe59e82322976c,ec79f726672a14f7644810101afe59e82322976c..d565eeee3bd8dc38085d84d5ab5d7b606ef232f2
         #include <linux/interrupt.h>
         #include <linux/errno.h>
         #include <linux/platform_device.h>
++++++ ++#include <linux/regmap.h>
         #include <linux/sched.h>
         #include <linux/delay.h>
         #include <linux/io.h>
@@@@@@@@@@ -108,11 -108,11 -108,11 -108,11 -108,11 -108,11 -109,11 -108,11 -108,11 +109,11 @@@@@@@@@@ struct fsl_dspi 
                struct spi_bitbang      bitbang;
                struct platform_device  *pdev;
         
------ --       void __iomem            *base;
++++++ ++       struct regmap           *regmap;
                int                     irq;
------ --       struct clk              *clk;
++++++ ++       struct clk              *clk;
         
------ --       struct spi_transfer     *cur_transfer;
++++++ ++       struct spi_transfer     *cur_transfer;
                struct chip_data        *cur_chip;
                size_t                  len;
                void                    *tx;
                u8                      cs;
                u16                     void_write_data;
         
------ --       wait_queue_head_t       waitq;
------ --       u32                     waitflags;
++++++ ++       wait_queue_head_t       waitq;
++++++ ++       u32                     waitflags;
         };
         
         static inline int is_double_byte_mode(struct fsl_dspi *dspi)
         {
------ --       return ((readl(dspi->base + SPI_CTAR(dspi->cs)) & SPI_FRAME_BITS_MASK)
------ --                       == SPI_FRAME_BITS(8)) ? 0 : 1;
------ --}
++++++ ++       unsigned int val;
         
------ --static void set_bit_mode(struct fsl_dspi *dspi, unsigned char bits)
------ --{
------ --       u32 temp;
++++++ ++       regmap_read(dspi->regmap, SPI_CTAR(dspi->cs), &val);
         
------ --       temp = readl(dspi->base + SPI_CTAR(dspi->cs));
------ --       temp &= ~SPI_FRAME_BITS_MASK;
------ --       temp |= SPI_FRAME_BITS(bits);
------ --       writel(temp, dspi->base + SPI_CTAR(dspi->cs));
++++++ ++       return ((val & SPI_FRAME_BITS_MASK) == SPI_FRAME_BITS(8)) ? 0 : 1;
         }
         
         static void hz_to_spi_baud(char *pbr, char *br, int speed_hz,
@@@@@@@@@@ -188,7 -188,7 -188,7 -188,7 -188,7 -188,7 -182,8 -188,7 -188,7 +182,8 @@@@@@@@@@ static int dspi_transfer_write(struct f
                 */
                if (tx_word && (dspi->len == 1)) {
                        dspi->dataflags |= TRAN_STATE_WORD_ODD_NUM;
------ --               set_bit_mode(dspi, 8);
++++++ ++               regmap_update_bits(dspi->regmap, SPI_CTAR(dspi->cs),
++++++ ++                               SPI_FRAME_BITS_MASK, SPI_FRAME_BITS(8));
                        tx_word = 0;
                }
         
                                dspi_pushr |= SPI_PUSHR_CTCNT; /* clear counter */
                        }
         
------ --               writel(dspi_pushr, dspi->base + SPI_PUSHR);
++++++ ++               regmap_write(dspi->regmap, SPI_PUSHR, dspi_pushr);
++++++ ++
                        tx_count++;
                }
         
@@@@@@@@@@ -253,17 -253,17 -253,17 -253,17 -253,17 -253,17 -249,23 -253,17 -253,17 +249,23 @@@@@@@@@@ static int dspi_transfer_read(struct fs
                while ((dspi->rx < dspi->rx_end)
                                && (rx_count < DSPI_FIFO_SIZE)) {
                        if (rx_word) {
++++++ ++                       unsigned int val;
++++++ ++
                                if ((dspi->rx_end - dspi->rx) == 1)
                                        break;
         
------ --                       d = SPI_POPR_RXDATA(readl(dspi->base + SPI_POPR));
++++++ ++                       regmap_read(dspi->regmap, SPI_POPR, &val);
++++++ ++                       d = SPI_POPR_RXDATA(val);
         
                                if (!(dspi->dataflags & TRAN_STATE_RX_VOID))
                                        *(u16 *)dspi->rx = d;
                                dspi->rx += 2;
         
                        } else {
------ --                       d = SPI_POPR_RXDATA(readl(dspi->base + SPI_POPR));
++++++ ++                       unsigned int val;
++++++ ++
++++++ ++                       regmap_read(dspi->regmap, SPI_POPR, &val);
++++++ ++                       d = SPI_POPR_RXDATA(val);
                                if (!(dspi->dataflags & TRAN_STATE_RX_VOID))
                                        *(u8 *)dspi->rx = d;
                                dspi->rx++;
@@@@@@@@@@ -295,13 -295,13 -295,13 -295,13 -295,13 -295,13 -297,13 -295,13 -295,13 +297,13 @@@@@@@@@@ static int dspi_txrx_transfer(struct sp
                if (!dspi->tx)
                        dspi->dataflags |= TRAN_STATE_TX_VOID;
         
------ --       writel(dspi->cur_chip->mcr_val, dspi->base + SPI_MCR);
------ --       writel(dspi->cur_chip->ctar_val, dspi->base + SPI_CTAR(dspi->cs));
------ --       writel(SPI_RSER_EOQFE, dspi->base + SPI_RSER);
++++++ ++       regmap_write(dspi->regmap, SPI_MCR, dspi->cur_chip->mcr_val);
++++++ ++       regmap_write(dspi->regmap, SPI_CTAR(dspi->cs), dspi->cur_chip->ctar_val);
++++++ ++       regmap_write(dspi->regmap, SPI_RSER, SPI_RSER_EOQFE);
         
                if (t->speed_hz)
------ --               writel(dspi->cur_chip->ctar_val,
------ --                               dspi->base + SPI_CTAR(dspi->cs));
++++++ ++               regmap_write(dspi->regmap, SPI_CTAR(dspi->cs),
++++++ ++                               dspi->cur_chip->ctar_val);
         
                dspi_transfer_write(dspi);
         
         static void dspi_chipselect(struct spi_device *spi, int value)
         {
                struct fsl_dspi *dspi = spi_master_get_devdata(spi->master);
------ --       u32 pushr = readl(dspi->base + SPI_PUSHR);
++++++ ++       unsigned int pushr;
++++++ ++
++++++ ++       regmap_read(dspi->regmap, SPI_PUSHR, &pushr);
         
                switch (value) {
                case BITBANG_CS_ACTIVE:
                        break;
                }
         
------ --       writel(pushr, dspi->base + SPI_PUSHR);
++++++ ++       regmap_write(dspi->regmap, SPI_PUSHR, pushr);
         }
         
         static int dspi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
                /* Only alloc on first setup */
                chip = spi_get_ctldata(spi);
                if (chip == NULL) {
------ --               chip = kcalloc(1, sizeof(struct chip_data), GFP_KERNEL);
++++++ ++               chip = devm_kzalloc(&spi->dev, sizeof(struct chip_data),
++++++ ++                                   GFP_KERNEL);
                        if (!chip)
                                return -ENOMEM;
                }
                        fmsz = spi->bits_per_word - 1;
                } else {
                        pr_err("Invalid wordsize\n");
------ --               kfree(chip);
                        return -ENODEV;
                }
         
@@@@@@@@@@ -382,13 -382,13 -382,13 -382,13 -382,13 -382,13 -386,15 -382,13 -382,13 +386,15 @@@@@@@@@@ static irqreturn_t dspi_interrupt(int i
         {
                struct fsl_dspi *dspi = (struct fsl_dspi *)dev_id;
         
------ --       writel(SPI_SR_EOQF, dspi->base + SPI_SR);
++++++ ++       regmap_write(dspi->regmap, SPI_SR, SPI_SR_EOQF);
         
                dspi_transfer_read(dspi);
         
                if (!dspi->len) {
                        if (dspi->dataflags & TRAN_STATE_WORD_ODD_NUM)
------ --                       set_bit_mode(dspi, 16);
++++++ ++                       regmap_update_bits(dspi->regmap, SPI_CTAR(dspi->cs),
++++++ ++                               SPI_FRAME_BITS_MASK, SPI_FRAME_BITS(16));
++++++ ++
                        dspi->waitflags = 1;
                        wake_up_interruptible(&dspi->waitq);
                } else {
@@@@@@@@@@ -420,6 -420,7 -420,7 -420,7 -420,7 -420,7 -426,7 -420,7 -420,7 +426,6 @@@@@@@@@@ static int dspi_suspend(struct device *
         
         static int dspi_resume(struct device *dev)
         {
 --------
                struct spi_master *master = dev_get_drvdata(dev);
                struct fsl_dspi *dspi = spi_master_get_devdata(master);
         
         }
         #endif /* CONFIG_PM_SLEEP */
         
------ --static const struct dev_pm_ops dspi_pm = {
------ --       SET_SYSTEM_SLEEP_PM_OPS(dspi_suspend, dspi_resume)
++++++ ++static SIMPLE_DEV_PM_OPS(dspi_pm, dspi_suspend, dspi_resume);
++++++ ++
++++++ ++static struct regmap_config dspi_regmap_config = {
++++++ ++       .reg_bits = 32,
++++++ ++       .val_bits = 32,
++++++ ++       .reg_stride = 4,
++++++ ++       .max_register = 0x88,
         };
         
         static int dspi_probe(struct platform_device *pdev)
                struct spi_master *master;
                struct fsl_dspi *dspi;
                struct resource *res;
++++++ ++       void __iomem *base;
                int ret = 0, cs_num, bus_num;
         
                master = spi_alloc_master(&pdev->dev, sizeof(struct fsl_dspi));
                master->bus_num = bus_num;
         
                res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
------ --       dspi->base = devm_ioremap_resource(&pdev->dev, res);
------ --       if (IS_ERR(dspi->base)) {
------ --               ret = PTR_ERR(dspi->base);
++++++ ++       base = devm_ioremap_resource(&pdev->dev, res);
++++++ ++       if (IS_ERR(base)) {
++++++ ++               ret = PTR_ERR(base);
                        goto out_master_put;
                }
         
++++++ ++       dspi_regmap_config.lock_arg = dspi;
++++++ ++       dspi_regmap_config.val_format_endian =
++++++ ++               of_property_read_bool(np, "big-endian")
++++++ ++                       ? REGMAP_ENDIAN_BIG : REGMAP_ENDIAN_DEFAULT;
++++++ ++       dspi->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "dspi", base,
++++++ ++                                               &dspi_regmap_config);
++++++ ++       if (IS_ERR(dspi->regmap)) {
++++++ ++               dev_err(&pdev->dev, "failed to init regmap: %ld\n",
++++++ ++                               PTR_ERR(dspi->regmap));
++++++ ++               return PTR_ERR(dspi->regmap);
++++++ ++       }
++++++ ++
                dspi->irq = platform_get_irq(pdev, 0);
                if (dspi->irq < 0) {
                        dev_err(&pdev->dev, "can't get platform irq\n");
                clk_prepare_enable(dspi->clk);
         
                init_waitqueue_head(&dspi->waitq);
 --------       platform_set_drvdata(pdev, dspi);
 ++++++++       platform_set_drvdata(pdev, master);
         
                ret = spi_bitbang_start(&dspi->bitbang);
                if (ret != 0) {
@@@@@@@@@@ -524,8 -525,7 -525,7 -525,7 -525,7 -525,7 -549,7 -525,7 -525,7 +548,8 @@@@@@@@@@ out_master_put
         
         static int dspi_remove(struct platform_device *pdev)
         {
 --------       struct fsl_dspi *dspi = platform_get_drvdata(pdev);
 ++++++++       struct spi_master *master = platform_get_drvdata(pdev);
 ++++++++       struct fsl_dspi *dspi = spi_master_get_devdata(master);
         
                /* Disconnect from the SPI framework */
                spi_bitbang_stop(&dspi->bitbang);
diff --combined drivers/spi/spi-gpio.c
index b189b958432b960adb8fe4a24c8310686073af80,7beeb29472ac73f59fcf0e92e04c9c31ef88a75a,7beeb29472ac73f59fcf0e92e04c9c31ef88a75a,7beeb29472ac73f59fcf0e92e04c9c31ef88a75a,7beeb29472ac73f59fcf0e92e04c9c31ef88a75a,7beeb29472ac73f59fcf0e92e04c9c31ef88a75a,7beeb29472ac73f59fcf0e92e04c9c31ef88a75a,7beeb29472ac73f59fcf0e92e04c9c31ef88a75a,dd4fe50362206432de4f8ccede161555b6c30b09..e97baf2f475c9ba6c8bbf3682bc9624833a3d8fc
@@@@@@@@@@ -250,7 -250,7 -250,7 -250,7 -250,7 -250,7 -250,7 -250,7 -250,7 +250,7 @@@@@@@@@@ static int spi_gpio_setup(struct spi_de
                        /*
                         * ... otherwise, take it from spi->controller_data
                         */
--------                cs = (unsigned int) spi->controller_data;
++++++++                cs = (unsigned int)(uintptr_t) spi->controller_data;
                }
         
                if (!spi->controller_state) {
@@@@@@@@@@ -503,12 -503,13 -503,13 -503,13 -503,13 -503,13 -503,13 -503,13 -503,13 +503,12 @@@@@@@@@@ static int spi_gpio_remove(struct platf
         {
                struct spi_gpio                 *spi_gpio;
                struct spi_gpio_platform_data   *pdata;
 --------       int                             status;
         
                spi_gpio = platform_get_drvdata(pdev);
                pdata = dev_get_platdata(&pdev->dev);
         
                /* stop() unregisters child devices too */
 --------       status = spi_bitbang_stop(&spi_gpio->bitbang);
 ++++++++       spi_bitbang_stop(&spi_gpio->bitbang);
         
                if (SPI_MISO_GPIO != SPI_GPIO_NO_MISO)
                        gpio_free(SPI_MISO_GPIO);
                gpio_free(SPI_SCK_GPIO);
                spi_master_put(spi_gpio->bitbang.master);
         
 --------       return status;
 ++++++++       return 0;
         }
         
         MODULE_ALIAS("platform:" DRIVER_NAME);