]> git.karo-electronics.de Git - linux-beck.git/commitdiff
staging: rtl8723au: hal: rtl8723a_hal_init: fixed 4 spelling errors.
authorJiading Gai <jiading.gai.github@gmail.com>
Wed, 16 Dec 2015 13:24:58 +0000 (08:24 -0500)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 8 Feb 2016 03:45:30 +0000 (19:45 -0800)
Fixed four spelling errors.

Signed-off-by: Jiading Gai <jiading.gai.github@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/staging/rtl8723au/hal/rtl8723a_hal_init.c

index ecf54ee47f7c979e23e97a70fcfbbc4e12729bf5..e3dc88961c2a262bc32c782b3acfb61861cec5dc 100644 (file)
@@ -1044,7 +1044,7 @@ void rtl8723a_InitAntenna_Selection(struct rtw_adapter *padapter)
        u8 val;
 
        val = rtl8723au_read8(padapter, REG_LEDCFG2);
-       /*  Let 8051 take control antenna settting */
+       /*  Let 8051 take control antenna setting */
        val |= BIT(7);          /*  DPDT_SEL_EN, 0x4C[23] */
        rtl8723au_write8(padapter, REG_LEDCFG2, val);
 }
@@ -1054,7 +1054,7 @@ void rtl8723a_CheckAntenna_Selection(struct rtw_adapter *padapter)
        u8 val;
 
        val = rtl8723au_read8(padapter, REG_LEDCFG2);
-       /*  Let 8051 take control antenna settting */
+       /*  Let 8051 take control antenna setting */
        if (!(val & BIT(7))) {
                val |= BIT(7);  /*  DPDT_SEL_EN, 0x4C[23] */
                rtl8723au_write8(padapter, REG_LEDCFG2, val);
@@ -1066,7 +1066,7 @@ void rtl8723a_DeinitAntenna_Selection(struct rtw_adapter *padapter)
        u8 val;
 
        val = rtl8723au_read8(padapter, REG_LEDCFG2);
-       /*  Let 8051 take control antenna settting */
+       /*  Let 8051 take control antenna setting */
        val &= ~BIT(7);         /*  DPDT_SEL_EN, clear 0x4C[23] */
        rtl8723au_write8(padapter, REG_LEDCFG2, val);
 }
@@ -1297,7 +1297,7 @@ static void _ResetDigitalProcedure1_92C(struct rtw_adapter *padapter,
                /*  If we want to SS mode, we can not reset 8051. */
                if ((val8 & BIT(1)) && padapter->bFWReady) {
                        /* IF fw in RAM code, do reset */
-                       /*  2010/08/25 MH Accordign to RD alfred's
+                       /*  2010/08/25 MH According to RD alfred's
                            suggestion, we need to disable other */
                        /*  HRCV INT to influence 8051 reset. */
                        rtl8723au_write8(padapter, REG_FWIMR, 0x20);