ARM: tegra: shut off the CPU rail when the last CPU in suspend

When the last CPU core in suspend, the CPU power rail can be turned off
by setting flags to flow controller. Then the flow controller will inform
PMC to turn off the CPU rail when the last CPU goes into suspend.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>

diff --git a/arch/arm/mach-tegra/flowctrl.h b/arch/arm/mach-tegra/flowctrl.h
index de0acb9ee32319ee54383519ce93a8bae3ed07a4..c89aac60a14335c79c9e3b1b6630308e51ba2922 100644 (file)
--- a/arch/arm/mach-tegra/flowctrl.h
+++ b/arch/arm/mach-tegra/flowctrl.h
@@ -35,6 +35,11 @@
 #define FLOW_CTRL_CPU0_CSR             0x8
 #define        FLOW_CTRL_CSR_INTR_FLAG         (1 << 15)
 #define FLOW_CTRL_CSR_EVENT_FLAG       (1 << 14)
+#define FLOW_CTRL_CSR_ENABLE_EXT_CRAIL (1 << 13)
+#define FLOW_CTRL_CSR_ENABLE_EXT_NCPU  (1 << 12)
+#define FLOW_CTRL_CSR_ENABLE_EXT_MASK ( \
+               FLOW_CTRL_CSR_ENABLE_EXT_NCPU | \
+               FLOW_CTRL_CSR_ENABLE_EXT_CRAIL)
 #define FLOW_CTRL_CSR_ENABLE           (1 << 0)
 #define FLOW_CTRL_HALT_CPU1_EVENTS     0x14
 #define FLOW_CTRL_CPU1_CSR             0x18

diff --git a/arch/arm/mach-tegra/pmc.c b/arch/arm/mach-tegra/pmc.c
index eb3fa4aee0e44c82a411ba20ca71516f4d8a2f31..8345fcdcc9d523647bd54131e1e4a8bdbacf0a79 100644 (file)
--- a/arch/arm/mach-tegra/pmc.c
+++ b/arch/arm/mach-tegra/pmc.c
@@ -21,6 +21,7 @@
 #include <linux/of.h>
 #include <linux/of_address.h>
 
+#include "flowctrl.h"
 #include "fuse.h"
 #include "pm.h"
 #include "pmc.h"
@@ -195,13 +196,26 @@ enum tegra_suspend_mode tegra_pmc_get_suspend_mode(void)
 
 void tegra_pmc_pm_set(enum tegra_suspend_mode mode)
 {
-       u32 reg;
+       u32 reg, csr_reg;
        unsigned long rate = 0;
 
        reg = tegra_pmc_readl(PMC_CTRL);
        reg |= TEGRA_POWER_CPU_PWRREQ_OE;
        reg &= ~TEGRA_POWER_EFFECT_LP0;
 
+       switch (tegra_chip_id) {
+       case TEGRA20:
+       case TEGRA30:
+               break;
+       default:
+               /* Turn off CRAIL */
+               csr_reg = flowctrl_read_cpu_csr(0);
+               csr_reg &= ~FLOW_CTRL_CSR_ENABLE_EXT_MASK;
+               csr_reg |= FLOW_CTRL_CSR_ENABLE_EXT_CRAIL;
+               flowctrl_write_cpu_csr(0, csr_reg);
+               break;
+       }
+
        switch (mode) {
        case TEGRA_SUSPEND_LP2:
                rate = clk_get_rate(tegra_pclk);