hw->rfd_burst = 8;
hw->dma_order = atl1c_dma_ord_out;
hw->dmar_block = atl1c_dma_req_1024;
- hw->dmaw_block = atl1c_dma_req_1024;
hw->dmar_dly_cnt = 15;
hw->dmaw_dly_cnt = 4;
AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH,
(tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK);
AT_READ_REG(hw, REG_DEVICE_CTRL, &dev_ctrl_data);
- max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT) &
- DEVICE_CTRL_MAX_PAYLOAD_MASK;
- hw->dmaw_block = min_t(u32, max_pay_load, hw->dmaw_block);
max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT) &
DEVICE_CTRL_MAX_RREQ_SZ_MASK;
hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block);