]> git.karo-electronics.de Git - karo-tx-linux.git/commitdiff
mlxsw: profile: Add KVD resources to profile config
authorNogah Frankel <nogahf@mellanox.com>
Tue, 20 Sep 2016 09:16:52 +0000 (11:16 +0200)
committerDavid S. Miller <davem@davemloft.net>
Wed, 21 Sep 2016 05:00:58 +0000 (01:00 -0400)
Use resources from resource query to determine values for
the profile configuration.
Add KVD determined section sizes to the resources struct.
Change the profile struct and value to match this changes.

Signed-off-by: Nogah Frankel <nogahf@mellanox.com>
Reviewed-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/mellanox/mlxsw/core.h
drivers/net/ethernet/mellanox/mlxsw/pci.c
drivers/net/ethernet/mellanox/mlxsw/spectrum.c
drivers/net/ethernet/mellanox/mlxsw/spectrum.h

index 76ad566a0421fa4239146a47884879d291cb46f1..1193bdcc4407b31c66617c6ad9160ab61eeb6031 100644 (file)
@@ -190,7 +190,8 @@ struct mlxsw_config_profile {
                used_max_pkey:1,
                used_ar_sec:1,
                used_adaptive_routing_group_cap:1,
-               used_kvd_sizes:1;
+               used_kvd_split_data:1; /* indicate for the kvd's values */
+
        u8      max_vepa_channels;
        u16     max_mid;
        u16     max_pgt;
@@ -210,8 +211,9 @@ struct mlxsw_config_profile {
        u16     adaptive_routing_group_cap;
        u8      arn;
        u32     kvd_linear_size;
-       u32     kvd_hash_single_size;
-       u32     kvd_hash_double_size;
+       u16     kvd_hash_granularity;
+       u8      kvd_hash_single_parts;
+       u8      kvd_hash_double_parts;
        u8      resource_query_enable;
        struct mlxsw_swid_config swid_config[MLXSW_CONFIG_PROFILE_SWID_COUNT];
 };
@@ -277,6 +279,13 @@ struct mlxsw_resources {
        u32     kvd_size;
        u32     kvd_single_min_size;
        u32     kvd_double_min_size;
+
+       /* Internal resources.
+        * Determined by the SW, not queried from the HW.
+        */
+       u32     kvd_single_size;
+       u32     kvd_double_size;
+       u32     kvd_linear_size;
 };
 
 struct mlxsw_resources *mlxsw_core_resources_get(struct mlxsw_core *mlxsw_core);
index 7b2ab1ec1290334a12098b0e0c3181cf7f6b6df1..c2d2fa1a1d3a276688e559c43dd93e1470819e93 100644 (file)
@@ -1234,10 +1234,52 @@ static int mlxsw_pci_resources_query(struct mlxsw_pci *mlxsw_pci, char *mbox,
        return -EIO;
 }
 
+static int mlxsw_pci_profile_get_kvd_sizes(const struct mlxsw_config_profile *profile,
+                                          struct mlxsw_resources *resources)
+{
+       u32 singles_size, doubles_size, linear_size;
+
+       if (!resources->kvd_single_min_size_valid ||
+           !resources->kvd_double_min_size_valid ||
+           !profile->used_kvd_split_data)
+               return -EIO;
+
+       linear_size = profile->kvd_linear_size;
+
+       /* The hash part is what left of the kvd without the
+        * linear part. It is split to the single size and
+        * double size by the parts ratio from the profile.
+        * Both sizes must be a multiplications of the
+        * granularity from the profile.
+        */
+       doubles_size = (resources->kvd_size - linear_size);
+       doubles_size *= profile->kvd_hash_double_parts;
+       doubles_size /= (profile->kvd_hash_double_parts +
+                        profile->kvd_hash_single_parts);
+       doubles_size /= profile->kvd_hash_granularity;
+       doubles_size *= profile->kvd_hash_granularity;
+       singles_size = resources->kvd_size - doubles_size -
+                      linear_size;
+
+       /* Check results are legal. */
+       if (singles_size < resources->kvd_single_min_size ||
+           doubles_size < resources->kvd_double_min_size ||
+           resources->kvd_size < linear_size)
+               return -EIO;
+
+       resources->kvd_single_size = singles_size;
+       resources->kvd_double_size = doubles_size;
+       resources->kvd_linear_size = linear_size;
+
+       return 0;
+}
+
 static int mlxsw_pci_config_profile(struct mlxsw_pci *mlxsw_pci, char *mbox,
-                                   const struct mlxsw_config_profile *profile)
+                                   const struct mlxsw_config_profile *profile,
+                                   struct mlxsw_resources *resources)
 {
        int i;
+       int err;
 
        mlxsw_cmd_mbox_zero(mbox);
 
@@ -1323,19 +1365,22 @@ static int mlxsw_pci_config_profile(struct mlxsw_pci *mlxsw_pci, char *mbox,
                mlxsw_cmd_mbox_config_profile_adaptive_routing_group_cap_set(
                        mbox, profile->adaptive_routing_group_cap);
        }
-       if (profile->used_kvd_sizes) {
-               mlxsw_cmd_mbox_config_profile_set_kvd_linear_size_set(
-                       mbox, 1);
-               mlxsw_cmd_mbox_config_profile_kvd_linear_size_set(
-                       mbox, profile->kvd_linear_size);
-               mlxsw_cmd_mbox_config_profile_set_kvd_hash_single_size_set(
-                       mbox, 1);
-               mlxsw_cmd_mbox_config_profile_kvd_hash_single_size_set(
-                       mbox, profile->kvd_hash_single_size);
+       if (resources->kvd_size_valid) {
+               err = mlxsw_pci_profile_get_kvd_sizes(profile, resources);
+               if (err)
+                       return err;
+
+               mlxsw_cmd_mbox_config_profile_set_kvd_linear_size_set(mbox, 1);
+               mlxsw_cmd_mbox_config_profile_kvd_linear_size_set(mbox,
+                                               resources->kvd_linear_size);
+               mlxsw_cmd_mbox_config_profile_set_kvd_hash_single_size_set(mbox,
+                                                                          1);
+               mlxsw_cmd_mbox_config_profile_kvd_hash_single_size_set(mbox,
+                                               resources->kvd_single_size);
                mlxsw_cmd_mbox_config_profile_set_kvd_hash_double_size_set(
-                       mbox, 1);
-               mlxsw_cmd_mbox_config_profile_kvd_hash_double_size_set(
-                       mbox, profile->kvd_hash_double_size);
+                                                               mbox, 1);
+               mlxsw_cmd_mbox_config_profile_kvd_hash_double_size_set(mbox,
+                                               resources->kvd_double_size);
        }
 
        for (i = 0; i < MLXSW_CONFIG_PROFILE_SWID_COUNT; i++)
@@ -1537,7 +1582,7 @@ static int mlxsw_pci_init(void *bus_priv, struct mlxsw_core *mlxsw_core,
        if (err)
                goto err_query_resources;
 
-       err = mlxsw_pci_config_profile(mlxsw_pci, mbox, profile);
+       err = mlxsw_pci_config_profile(mlxsw_pci, mbox, profile, resources);
        if (err)
                goto err_config_profile;
 
index 0f96d11085685bf1ddfb41e6831f709780f56f34..d8e3da2f0667d0770282afa1589fd85dae1d4434 100644 (file)
@@ -3057,10 +3057,11 @@ static struct mlxsw_config_profile mlxsw_sp_config_profile = {
        .max_ib_mc                      = 0,
        .used_max_pkey                  = 1,
        .max_pkey                       = 0,
-       .used_kvd_sizes                 = 1,
+       .used_kvd_split_data            = 1,
+       .kvd_hash_granularity           = MLXSW_SP_KVD_GRANULARITY,
+       .kvd_hash_single_parts          = 2,
+       .kvd_hash_double_parts          = 1,
        .kvd_linear_size                = MLXSW_SP_KVD_LINEAR_SIZE,
-       .kvd_hash_single_size           = MLXSW_SP_KVD_HASH_SINGLE_SIZE,
-       .kvd_hash_double_size           = MLXSW_SP_KVD_HASH_DOUBLE_SIZE,
        .swid_config                    = {
                {
                        .used_type      = 1,
index a056aaa6c5844606dee4f9c635f5fc9172497ab6..208dfeedde4456381034f654b29fc882c4ce01dc 100644 (file)
@@ -74,8 +74,7 @@
 #define MLXSW_SP_CELLS_TO_BYTES(c) (c * MLXSW_SP_BYTES_PER_CELL)
 
 #define MLXSW_SP_KVD_LINEAR_SIZE 65536 /* entries */
-#define MLXSW_SP_KVD_HASH_SINGLE_SIZE 163840 /* entries */
-#define MLXSW_SP_KVD_HASH_DOUBLE_SIZE 32768 /* entries */
+#define MLXSW_SP_KVD_GRANULARITY 128
 
 /* Maximum delay buffer needed in case of PAUSE frames, in cells.
  * Assumes 100m cable and maximum MTU.