]> git.karo-electronics.de Git - linux-beck.git/commitdiff
Merge tag 'qcom-dt-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/galak...
authorArnd Bergmann <arnd@arndb.de>
Fri, 23 May 2014 21:30:17 +0000 (23:30 +0200)
committerArnd Bergmann <arnd@arndb.de>
Fri, 23 May 2014 21:49:07 +0000 (23:49 +0200)
Merge "Qualcomm ARM Based Device Tree Updates for v3.16" from Kumar Gala:

* Added device tree nodes for pinctrl and SDHC for msm8974 SoC/DB8074 board
* Added binding spec for GSBI configuration node

* tag 'qcom-dt-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom:
  soc: qcom: Add device tree binding for GSBI
  ARM: dts: msm: Add SDHC controller nodes for MSM8974 and DB8074 board
  ARM: dts: MSM8974: Add pinctrl node

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
1628 files changed:
.mailmap
Documentation/DocBook/device-drivers.tmpl
Documentation/DocBook/drm.tmpl
Documentation/devicetree/bindings/arm/arch_timer.txt
Documentation/devicetree/bindings/arm/exynos/smp-sysram.txt [new file with mode: 0644]
Documentation/devicetree/bindings/arm/marvell,kirkwood.txt [new file with mode: 0644]
Documentation/devicetree/bindings/arm/rockchip.txt [new file with mode: 0644]
Documentation/devicetree/bindings/ata/apm-xgene.txt
Documentation/devicetree/bindings/clock/altr_socfpga.txt
Documentation/devicetree/bindings/clock/at91-clock.txt
Documentation/devicetree/bindings/i2c/trivial-devices.txt
Documentation/devicetree/bindings/net/ethernet.txt
Documentation/devicetree/bindings/net/socfpga-dwmac.txt
Documentation/devicetree/bindings/net/stmmac.txt
Documentation/devicetree/bindings/pinctrl/brcm,bcm11351-pinctrl.txt
Documentation/devicetree/bindings/pinctrl/pinctrl-st.txt
Documentation/devicetree/bindings/reset/socfpga-reset.txt [moved from Documentation/devicetree/bindings/arm/altera/socfpga-reset.txt with 85% similarity]
Documentation/devicetree/bindings/serial/efm32-uart.txt
Documentation/devicetree/bindings/sound/davinci-mcasp-audio.txt
Documentation/devicetree/bindings/sound/tlv320aic31xx.txt
Documentation/devicetree/bindings/vendor-prefixes.txt
Documentation/ja_JP/HOWTO
Documentation/ja_JP/stable_kernel_rules.txt
Documentation/kernel-parameters.txt
Documentation/magic-number.txt
Documentation/serial/00-INDEX
Documentation/serial/digiepca.txt [deleted file]
Documentation/serial/riscom8.txt [deleted file]
Documentation/serial/specialix.txt [deleted file]
Documentation/serial/sx.txt [deleted file]
Documentation/stable_kernel_rules.txt
Documentation/vm/numa_memory_policy.txt
Documentation/zh_CN/HOWTO
Documentation/zh_CN/io_ordering.txt [new file with mode: 0644]
Documentation/zh_CN/magic-number.txt
Documentation/zh_CN/stable_kernel_rules.txt
MAINTAINERS
Makefile
arch/arc/include/asm/barrier.h [deleted file]
arch/arc/kernel/entry.S
arch/arm/Kconfig
arch/arm/Kconfig.debug
arch/arm/boot/dts/Makefile
arch/arm/boot/dts/am335x-bone-common.dtsi
arch/arm/boot/dts/am335x-evm.dts
arch/arm/boot/dts/am335x-evmsk.dts
arch/arm/boot/dts/am335x-igep0033.dtsi
arch/arm/boot/dts/am33xx.dtsi
arch/arm/boot/dts/am4372.dtsi
arch/arm/boot/dts/armada-370-db.dts
arch/arm/boot/dts/armada-370-mirabox.dts
arch/arm/boot/dts/armada-370-netgear-rn102.dts
arch/arm/boot/dts/armada-370-netgear-rn104.dts
arch/arm/boot/dts/armada-370-rd.dts
arch/arm/boot/dts/armada-370-xp.dtsi
arch/arm/boot/dts/armada-370.dtsi
arch/arm/boot/dts/armada-375-db.dts
arch/arm/boot/dts/armada-375.dtsi
arch/arm/boot/dts/armada-380.dtsi
arch/arm/boot/dts/armada-385-db.dts
arch/arm/boot/dts/armada-385-rd.dts
arch/arm/boot/dts/armada-385.dtsi
arch/arm/boot/dts/armada-38x.dtsi
arch/arm/boot/dts/armada-xp-axpwifiap.dts
arch/arm/boot/dts/armada-xp-db.dts
arch/arm/boot/dts/armada-xp-gp.dts
arch/arm/boot/dts/armada-xp-matrix.dts
arch/arm/boot/dts/armada-xp-mv78230.dtsi
arch/arm/boot/dts/armada-xp-mv78260.dtsi
arch/arm/boot/dts/armada-xp-mv78460.dtsi
arch/arm/boot/dts/armada-xp-netgear-rn2120.dts
arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
arch/arm/boot/dts/armada-xp.dtsi
arch/arm/boot/dts/at91-cosino_mega2560.dts
arch/arm/boot/dts/at91-sama5d3_xplained.dts
arch/arm/boot/dts/at91sam9261.dtsi
arch/arm/boot/dts/at91sam9261ek.dts
arch/arm/boot/dts/at91sam9g45.dtsi
arch/arm/boot/dts/at91sam9m10g45ek.dts
arch/arm/boot/dts/at91sam9n12.dtsi
arch/arm/boot/dts/at91sam9n12ek.dts
arch/arm/boot/dts/at91sam9rl.dtsi
arch/arm/boot/dts/at91sam9rlek.dts
arch/arm/boot/dts/at91sam9x5.dtsi
arch/arm/boot/dts/at91sam9x5_can.dtsi [new file with mode: 0644]
arch/arm/boot/dts/at91sam9x5_isi.dtsi [new file with mode: 0644]
arch/arm/boot/dts/at91sam9x5_lcd.dtsi [new file with mode: 0644]
arch/arm/boot/dts/at91sam9x5_macb0.dtsi
arch/arm/boot/dts/at91sam9x5_macb1.dtsi
arch/arm/boot/dts/at91sam9x5_usart3.dtsi
arch/arm/boot/dts/at91sam9x5cm.dtsi
arch/arm/boot/dts/dra7.dtsi
arch/arm/boot/dts/dra7xx-clocks.dtsi
arch/arm/boot/dts/exynos4.dtsi
arch/arm/boot/dts/exynos4210-universal_c210.dts
arch/arm/boot/dts/exynos4210.dtsi
arch/arm/boot/dts/exynos4412-trats2.dts
arch/arm/boot/dts/exynos4x12.dtsi
arch/arm/boot/dts/exynos5250-cros-common.dtsi
arch/arm/boot/dts/exynos5250-pinctrl.dtsi
arch/arm/boot/dts/exynos5250-snow.dts
arch/arm/boot/dts/exynos5250.dtsi
arch/arm/boot/dts/exynos5420-arndale-octa.dts
arch/arm/boot/dts/exynos5420-peach-pit.dts [new file with mode: 0644]
arch/arm/boot/dts/exynos5420-pinctrl.dtsi
arch/arm/boot/dts/exynos5420-smdk5420.dts
arch/arm/boot/dts/exynos5420.dtsi
arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard.dts
arch/arm/boot/dts/imx25-karo-tx25.dts
arch/arm/boot/dts/imx25-pdk.dts
arch/arm/boot/dts/imx25.dtsi
arch/arm/boot/dts/imx27-apf27.dts
arch/arm/boot/dts/imx27-pdk.dts
arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts
arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi
arch/arm/boot/dts/imx27.dtsi
arch/arm/boot/dts/imx28-duckbill.dts
arch/arm/boot/dts/imx28.dtsi
arch/arm/boot/dts/imx35-eukrea-cpuimx35.dtsi
arch/arm/boot/dts/imx35-eukrea-mbimxsd35-baseboard.dts
arch/arm/boot/dts/imx35-pdk.dts [new file with mode: 0644]
arch/arm/boot/dts/imx35.dtsi
arch/arm/boot/dts/imx50.dtsi
arch/arm/boot/dts/imx51-babbage.dts
arch/arm/boot/dts/imx51-digi-connectcore-jsk.dts [new file with mode: 0644]
arch/arm/boot/dts/imx51-digi-connectcore-som.dtsi [new file with mode: 0644]
arch/arm/boot/dts/imx51-eukrea-cpuimx51.dtsi
arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts
arch/arm/boot/dts/imx51.dtsi
arch/arm/boot/dts/imx53-m53evk.dts
arch/arm/boot/dts/imx53-mba53.dts
arch/arm/boot/dts/imx53-qsb-common.dtsi
arch/arm/boot/dts/imx53-tx53-x03x.dts
arch/arm/boot/dts/imx53.dtsi
arch/arm/boot/dts/imx6dl-hummingboard.dts
arch/arm/boot/dts/imx6dl-phytec-pbab01.dts [new file with mode: 0644]
arch/arm/boot/dts/imx6dl-phytec-pfla02.dtsi [new file with mode: 0644]
arch/arm/boot/dts/imx6dl-riotboard.dts [new file with mode: 0644]
arch/arm/boot/dts/imx6dl.dtsi
arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
arch/arm/boot/dts/imx6q-gk802.dts
arch/arm/boot/dts/imx6q-gw5400-a.dts
arch/arm/boot/dts/imx6q-phytec-pbab01.dts
arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi
arch/arm/boot/dts/imx6q-udoo.dts
arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi
arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi
arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi [new file with mode: 0644]
arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi [new file with mode: 0644]
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
arch/arm/boot/dts/imx6qdl-sabresd.dtsi
arch/arm/boot/dts/imx6qdl-wandboard.dtsi
arch/arm/boot/dts/imx6qdl.dtsi
arch/arm/boot/dts/imx6sl-evk.dts
arch/arm/boot/dts/imx6sl.dtsi
arch/arm/boot/dts/k2e-evm.dts
arch/arm/boot/dts/k2hk-evm.dts
arch/arm/boot/dts/k2l-evm.dts
arch/arm/boot/dts/keystone.dtsi
arch/arm/boot/dts/kirkwood-6192.dtsi
arch/arm/boot/dts/kirkwood-6281.dtsi
arch/arm/boot/dts/kirkwood-6282.dtsi
arch/arm/boot/dts/kirkwood-98dx4122.dtsi
arch/arm/boot/dts/kirkwood-b3.dts
arch/arm/boot/dts/kirkwood-cloudbox.dts
arch/arm/boot/dts/kirkwood-db.dtsi
arch/arm/boot/dts/kirkwood-dns320.dts
arch/arm/boot/dts/kirkwood-dns325.dts
arch/arm/boot/dts/kirkwood-dnskw.dtsi
arch/arm/boot/dts/kirkwood-dockstar.dts
arch/arm/boot/dts/kirkwood-dreamplug.dts
arch/arm/boot/dts/kirkwood-ds109.dts
arch/arm/boot/dts/kirkwood-ds110jv10.dts
arch/arm/boot/dts/kirkwood-ds111.dts
arch/arm/boot/dts/kirkwood-ds112.dts
arch/arm/boot/dts/kirkwood-ds209.dts
arch/arm/boot/dts/kirkwood-ds210.dts
arch/arm/boot/dts/kirkwood-ds212.dts
arch/arm/boot/dts/kirkwood-ds212j.dts
arch/arm/boot/dts/kirkwood-ds409.dts
arch/arm/boot/dts/kirkwood-ds409slim.dts
arch/arm/boot/dts/kirkwood-ds411.dts
arch/arm/boot/dts/kirkwood-ds411j.dts
arch/arm/boot/dts/kirkwood-ds411slim.dts
arch/arm/boot/dts/kirkwood-goflexnet.dts
arch/arm/boot/dts/kirkwood-guruplug-server-plus.dts
arch/arm/boot/dts/kirkwood-ib62x0.dts
arch/arm/boot/dts/kirkwood-iconnect.dts
arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
arch/arm/boot/dts/kirkwood-km_kirkwood.dts
arch/arm/boot/dts/kirkwood-laplug.dts
arch/arm/boot/dts/kirkwood-lsxl.dtsi
arch/arm/boot/dts/kirkwood-mplcec4.dts
arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts
arch/arm/boot/dts/kirkwood-netgear_readynas_duo_v2.dts
arch/arm/boot/dts/kirkwood-netgear_readynas_nv+_v2.dts
arch/arm/boot/dts/kirkwood-ns2-common.dtsi
arch/arm/boot/dts/kirkwood-nsa310.dts
arch/arm/boot/dts/kirkwood-nsa310a.dts
arch/arm/boot/dts/kirkwood-nsa320.dts [new file with mode: 0644]
arch/arm/boot/dts/kirkwood-nsa3x0-common.dtsi [moved from arch/arm/boot/dts/kirkwood-nsa310-common.dtsi with 58% similarity]
arch/arm/boot/dts/kirkwood-openblocks_a6.dts
arch/arm/boot/dts/kirkwood-openblocks_a7.dts
arch/arm/boot/dts/kirkwood-rd88f6192.dts
arch/arm/boot/dts/kirkwood-rd88f6281.dtsi
arch/arm/boot/dts/kirkwood-rs212.dts
arch/arm/boot/dts/kirkwood-rs409.dts
arch/arm/boot/dts/kirkwood-rs411.dts
arch/arm/boot/dts/kirkwood-sheevaplug-common.dtsi
arch/arm/boot/dts/kirkwood-synology.dtsi
arch/arm/boot/dts/kirkwood-t5325.dts
arch/arm/boot/dts/kirkwood-topkick.dts
arch/arm/boot/dts/kirkwood-ts219-6281.dts
arch/arm/boot/dts/kirkwood-ts219-6282.dts
arch/arm/boot/dts/kirkwood-ts219.dtsi
arch/arm/boot/dts/kirkwood-ts419.dtsi
arch/arm/boot/dts/kirkwood.dtsi
arch/arm/boot/dts/omap3-beagle-xm-ab.dts [new file with mode: 0644]
arch/arm/boot/dts/omap3-devkit8000.dts
arch/arm/boot/dts/omap3-lilly-a83x.dtsi
arch/arm/boot/dts/omap3.dtsi
arch/arm/boot/dts/omap4.dtsi
arch/arm/boot/dts/omap5.dtsi
arch/arm/boot/dts/r8a73a4.dtsi
arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
arch/arm/boot/dts/r8a7740.dtsi
arch/arm/boot/dts/r8a7778-bockw-reference.dts
arch/arm/boot/dts/r8a7778.dtsi
arch/arm/boot/dts/r8a7779-marzen-reference.dts
arch/arm/boot/dts/r8a7779.dtsi
arch/arm/boot/dts/r8a7790-lager.dts
arch/arm/boot/dts/r8a7790.dtsi
arch/arm/boot/dts/r8a7791-henninger.dts [new file with mode: 0644]
arch/arm/boot/dts/r8a7791-koelsch.dts
arch/arm/boot/dts/r8a7791.dtsi
arch/arm/boot/dts/rk3066a-bqcurie2.dts
arch/arm/boot/dts/rk3066a.dtsi
arch/arm/boot/dts/rk3188-radxarock.dts
arch/arm/boot/dts/rk3188.dtsi
arch/arm/boot/dts/rk3xxx.dtsi
arch/arm/boot/dts/sama5d3.dtsi
arch/arm/boot/dts/sama5d3_mci2.dtsi
arch/arm/boot/dts/sama5d3_tcb1.dtsi
arch/arm/boot/dts/sama5d3_uart.dtsi
arch/arm/boot/dts/sama5d3xcm.dtsi
arch/arm/boot/dts/sama5d3xmb.dtsi
arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
arch/arm/boot/dts/sh73a0.dtsi
arch/arm/boot/dts/socfpga.dtsi
arch/arm/boot/dts/socfpga_arria5.dtsi
arch/arm/boot/dts/socfpga_arria5_socdk.dts
arch/arm/boot/dts/socfpga_cyclone5.dtsi
arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
arch/arm/boot/dts/socfpga_cyclone5_socrates.dts [new file with mode: 0644]
arch/arm/boot/dts/socfpga_vt.dts
arch/arm/boot/dts/spear320-hmi.dts
arch/arm/boot/dts/stih407-b2120.dts [new file with mode: 0644]
arch/arm/boot/dts/stih407-clock.dtsi [new file with mode: 0644]
arch/arm/boot/dts/stih407-pinctrl.dtsi [new file with mode: 0644]
arch/arm/boot/dts/stih407.dtsi [new file with mode: 0644]
arch/arm/boot/dts/stih415-b2000.dts
arch/arm/boot/dts/stih415-b2020.dts
arch/arm/boot/dts/stih415-clock.dtsi
arch/arm/boot/dts/stih415-pinctrl.dtsi
arch/arm/boot/dts/stih415.dtsi
arch/arm/boot/dts/stih416-b2000.dts
arch/arm/boot/dts/stih416-b2020-revE.dts [new file with mode: 0644]
arch/arm/boot/dts/stih416-b2020.dts
arch/arm/boot/dts/stih416-clock.dtsi
arch/arm/boot/dts/stih416-pinctrl.dtsi
arch/arm/boot/dts/stih416.dtsi
arch/arm/boot/dts/stih41x-b2000.dtsi
arch/arm/boot/dts/stih41x-b2020.dtsi
arch/arm/boot/dts/stih41x.dtsi
arch/arm/boot/dts/sun4i-a10-a1000.dts
arch/arm/boot/dts/sun4i-a10-cubieboard.dts
arch/arm/boot/dts/sun4i-a10-hackberry.dts
arch/arm/boot/dts/sun4i-a10-inet97fv2.dts
arch/arm/boot/dts/sun4i-a10-mini-xplus.dts
arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts
arch/arm/boot/dts/sun4i-a10-pcduino.dts
arch/arm/boot/dts/sun4i-a10.dtsi
arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts [new file with mode: 0644]
arch/arm/boot/dts/sun5i-a10s.dtsi
arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts
arch/arm/boot/dts/sun5i-a13-olinuxino.dts
arch/arm/boot/dts/sun5i-a13.dtsi
arch/arm/boot/dts/sun6i-a31-app4-evb1.dts [new file with mode: 0644]
arch/arm/boot/dts/sun6i-a31-m9.dts [new file with mode: 0644]
arch/arm/boot/dts/sun6i-a31.dtsi
arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
arch/arm/boot/dts/sun7i-a20-cubietruck.dts
arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
arch/arm/boot/dts/sun7i-a20.dtsi
arch/arm/boot/dts/sunxi-common-regulators.dtsi
arch/arm/boot/dts/tegra114-dalmore.dts
arch/arm/boot/dts/tegra114-roth.dts [new file with mode: 0644]
arch/arm/boot/dts/tegra114-tn7.dts [new file with mode: 0644]
arch/arm/boot/dts/tegra124-jetson-tk1.dts [new file with mode: 0644]
arch/arm/boot/dts/tegra124-venice2.dts
arch/arm/boot/dts/tegra124.dtsi
arch/arm/boot/dts/tegra20-harmony.dts
arch/arm/boot/dts/tegra30-beaver.dts
arch/arm/boot/dts/tegra30-colibri-eval-v3.dts [new file with mode: 0644]
arch/arm/boot/dts/tegra30-colibri.dtsi [new file with mode: 0644]
arch/arm/boot/dts/vf610-colibri.dts [new file with mode: 0644]
arch/arm/boot/dts/vf610-twr.dts
arch/arm/boot/dts/vf610.dtsi
arch/arm/boot/dts/zynq-7000.dtsi
arch/arm/boot/dts/zynq-zc702.dts
arch/arm/boot/dts/zynq-zc706.dts
arch/arm/common/bL_switcher.c
arch/arm/common/mcpm_entry.c
arch/arm/configs/at91sam9g45_defconfig
arch/arm/configs/at91sam9rl_defconfig
arch/arm/configs/bcm_defconfig
arch/arm/configs/exynos_defconfig
arch/arm/configs/omap2plus_defconfig
arch/arm/configs/sama5_defconfig
arch/arm/configs/u300_defconfig
arch/arm/configs/u8500_defconfig
arch/arm/include/asm/cputype.h
arch/arm/include/asm/div64.h
arch/arm/include/asm/mcpm.h
arch/arm/include/asm/tlb.h
arch/arm/include/uapi/asm/unistd.h
arch/arm/kernel/Makefile
arch/arm/kernel/calls.S
arch/arm/kernel/head.S
arch/arm/kernel/iwmmxt.S
arch/arm/kernel/machine_kexec.c
arch/arm/kernel/pj4-cp0.c
arch/arm/kernel/sys_oabi-compat.c
arch/arm/kvm/Kconfig
arch/arm/kvm/mmu.c
arch/arm/mach-at91/Kconfig
arch/arm/mach-at91/at91rm9200_devices.c
arch/arm/mach-at91/at91sam9260_devices.c
arch/arm/mach-at91/at91sam9261_devices.c
arch/arm/mach-at91/at91sam9263_devices.c
arch/arm/mach-at91/at91sam9g45.c
arch/arm/mach-at91/at91sam9g45_devices.c
arch/arm/mach-at91/at91sam9n12.c
arch/arm/mach-at91/at91sam9rl.c
arch/arm/mach-at91/at91sam9rl_devices.c
arch/arm/mach-at91/at91sam9x5.c
arch/arm/mach-at91/board-1arm.c
arch/arm/mach-at91/board-afeb-9260v1.c
arch/arm/mach-at91/board-cam60.c
arch/arm/mach-at91/board-carmeva.c
arch/arm/mach-at91/board-cpu9krea.c
arch/arm/mach-at91/board-cpuat91.c
arch/arm/mach-at91/board-csb337.c
arch/arm/mach-at91/board-csb637.c
arch/arm/mach-at91/board-eb9200.c
arch/arm/mach-at91/board-ecbat91.c
arch/arm/mach-at91/board-eco920.c
arch/arm/mach-at91/board-flexibity.c
arch/arm/mach-at91/board-foxg20.c
arch/arm/mach-at91/board-gsia18s.c
arch/arm/mach-at91/board-kafa.c
arch/arm/mach-at91/board-kb9202.c
arch/arm/mach-at91/board-pcontrol-g20.c
arch/arm/mach-at91/board-picotux200.c
arch/arm/mach-at91/board-rm9200ek.c
arch/arm/mach-at91/board-rsi-ews.c
arch/arm/mach-at91/board-sam9-l9260.c
arch/arm/mach-at91/board-sam9260ek.c
arch/arm/mach-at91/board-sam9261ek.c
arch/arm/mach-at91/board-sam9263ek.c
arch/arm/mach-at91/board-sam9g20ek.c
arch/arm/mach-at91/board-sam9m10g45ek.c
arch/arm/mach-at91/board-sam9rlek.c
arch/arm/mach-at91/board-snapper9260.c
arch/arm/mach-at91/board-stamp9g20.c
arch/arm/mach-at91/board-yl-9200.c
arch/arm/mach-at91/board.h
arch/arm/mach-at91/gpio.c
arch/arm/mach-at91/gpio.h [moved from arch/arm/mach-at91/include/mach/gpio.h with 96% similarity]
arch/arm/mach-at91/include/mach/at91_adc.h [deleted file]
arch/arm/mach-at91/include/mach/hardware.h
arch/arm/mach-at91/leds.c
arch/arm/mach-at91/pm.c
arch/arm/mach-exynos/common.h
arch/arm/mach-exynos/exynos.c
arch/arm/mach-exynos/firmware.c
arch/arm/mach-exynos/include/mach/map.h
arch/arm/mach-exynos/platsmp.c
arch/arm/mach-imx/clk-imx6q.c
arch/arm/mach-omap2/board-rx51-video.c
arch/arm/mach-omap2/clkt_dpll.c
arch/arm/mach-omap2/gpmc.c
arch/arm/mach-omap2/omap_hwmod.c
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
arch/arm/mach-omap2/pm34xx.c
arch/arm/mach-pxa/include/mach/hx4700.h
arch/arm/mach-rockchip/platsmp.c
arch/arm/mach-shmobile/board-armadillo800eva.c
arch/arm/mach-shmobile/board-lager.c
arch/arm/mach-shmobile/clock-r8a7778.c
arch/arm/mach-spear/headsmp.S
arch/arm/mach-spear/platsmp.c
arch/arm/mach-spear/time.c
arch/arm/mach-tegra/Kconfig
arch/arm/mach-vexpress/dcscb.c
arch/arm/mach-vexpress/spc.c
arch/arm/mm/Kconfig
arch/arm/mm/dma-mapping.c
arch/arm/vfp/vfpdouble.c
arch/arm/vfp/vfpsingle.c
arch/arm64/Kconfig
arch/arm64/boot/dts/apm-storm.dtsi
arch/arm64/include/asm/mmu.h
arch/arm64/include/asm/tlb.h
arch/arm64/include/asm/unistd32.h
arch/arm64/kernel/debug-monitors.c
arch/arm64/kernel/early_printk.c
arch/arm64/kernel/setup.c
arch/arm64/kernel/time.c
arch/arm64/mm/dma-mapping.c
arch/arm64/mm/mmu.c
arch/hexagon/include/asm/barrier.h [deleted file]
arch/ia64/include/asm/tlb.h
arch/ia64/kernel/head.S
arch/ia64/kernel/ivt.S
arch/ia64/kvm/vmm_ivt.S
arch/mips/cavium-octeon/octeon-irq.c
arch/mips/mm/cache.c
arch/parisc/include/asm/shmparam.h
arch/parisc/include/uapi/asm/Kbuild
arch/parisc/include/uapi/asm/resource.h [deleted file]
arch/parisc/kernel/cache.c
arch/parisc/kernel/sys_parisc.c
arch/parisc/kernel/syscall_table.S
arch/parisc/lib/memcpy.c
arch/parisc/mm/fault.c
arch/powerpc/boot/main.c
arch/powerpc/boot/ops.h
arch/powerpc/boot/ps3.c
arch/powerpc/include/asm/opal.h
arch/powerpc/include/uapi/asm/setup.h
arch/powerpc/kernel/pci_64.c
arch/powerpc/kernel/ppc_ksyms.c
arch/powerpc/kernel/rtas_flash.c
arch/powerpc/kvm/book3s_hv_rmhandlers.S
arch/powerpc/mm/hash_native_64.c
arch/powerpc/mm/numa.c
arch/powerpc/perf/hv-24x7.c
arch/powerpc/perf/hv-gpci.c
arch/powerpc/platforms/powernv/opal-dump.c
arch/powerpc/platforms/powernv/opal-elog.c
arch/powerpc/platforms/powernv/opal-flash.c
arch/powerpc/platforms/powernv/opal-sysparam.c
arch/powerpc/platforms/powernv/opal.c
arch/powerpc/platforms/powernv/pci-ioda.c
arch/powerpc/platforms/powernv/setup.c
arch/powerpc/platforms/powernv/smp.c
arch/powerpc/platforms/pseries/hotplug-cpu.c
arch/powerpc/platforms/pseries/hotplug-memory.c
arch/powerpc/sysdev/ppc4xx_pci.c
arch/s390/include/asm/ccwgroup.h
arch/s390/include/asm/sigp.h
arch/s390/include/asm/smp.h
arch/s390/include/asm/tlb.h
arch/s390/include/uapi/asm/unistd.h
arch/s390/kernel/compat_wrapper.c
arch/s390/kernel/dumpstack.c
arch/s390/kernel/ptrace.c
arch/s390/kernel/setup.c
arch/s390/kernel/smp.c
arch/s390/kernel/syscalls.S
arch/s390/lib/uaccess.c
arch/s390/mm/fault.c
arch/s390/net/bpf_jit_comp.c
arch/sh/include/asm/tlb.h
arch/um/include/asm/tlb.h
arch/um/include/shared/os.h
arch/um/kernel/physmem.c
arch/um/os-Linux/file.c
arch/um/os-Linux/main.c
arch/um/os-Linux/mem.c
arch/x86/Makefile
arch/x86/include/asm/kvm_host.h
arch/x86/kernel/apic/io_apic.c
arch/x86/kernel/cpu/mcheck/mce.c
arch/x86/kernel/cpu/mcheck/mce_intel.c
arch/x86/kernel/cpu/perf_event_intel_rapl.c
arch/x86/kernel/early-quirks.c
arch/x86/kernel/kprobes/core.c
arch/x86/kernel/reboot.c
arch/x86/kernel/vsmp_64.c
arch/x86/kvm/cpuid.c
arch/x86/kvm/cpuid.h
arch/x86/kvm/mmu.c
arch/x86/kvm/mmu.h
arch/x86/kvm/paging_tmpl.h
arch/x86/kvm/vmx.c
arch/x86/kvm/x86.c
arch/x86/syscalls/Makefile
arch/x86/syscalls/syscall_32.tbl
arch/x86/tools/Makefile
arch/x86/vdso/vdso-layout.lds.S
arch/x86/xen/smp.c
arch/x86/xen/spinlock.c
arch/x86/xen/xen-asm_32.S
drivers/Makefile
drivers/acpi/acpi_processor.c
drivers/acpi/acpica/exfield.c
drivers/acpi/bus.c
drivers/acpi/ec.c
drivers/ata/Kconfig
drivers/ata/ahci.c
drivers/ata/ahci.h
drivers/ata/libata-core.c
drivers/ata/pata_arasan_cf.c
drivers/ata/pata_at91.c
drivers/ata/pata_samsung_cf.c
drivers/base/core.c
drivers/base/dd.c
drivers/base/platform.c
drivers/base/topology.c
drivers/char/Kconfig
drivers/char/hw_random/bcm2835-rng.c
drivers/char/ipmi/Kconfig
drivers/char/ipmi/ipmi_bt_sm.c
drivers/char/ipmi/ipmi_kcs_sm.c
drivers/char/ipmi/ipmi_msghandler.c
drivers/char/ipmi/ipmi_si_intf.c
drivers/char/pcmcia/Kconfig
drivers/char/ttyprintk.c
drivers/clk/at91/Makefile
drivers/clk/at91/clk-main.c
drivers/clk/at91/clk-slow.c [new file with mode: 0644]
drivers/clk/at91/pmc.c
drivers/clk/at91/pmc.h
drivers/clk/at91/sckc.c [new file with mode: 0644]
drivers/clk/at91/sckc.h [new file with mode: 0644]
drivers/clk/tegra/clk-tegra124.c
drivers/clk/versatile/clk-vexpress-osc.c
drivers/clocksource/arm_arch_timer.c
drivers/clocksource/exynos_mct.c
drivers/clocksource/zevio-timer.c
drivers/cpufreq/Kconfig.arm
drivers/cpufreq/longhaul.c
drivers/cpufreq/powernow-k6.c
drivers/cpufreq/powernow-k7.c
drivers/cpufreq/powernv-cpufreq.c
drivers/cpufreq/ppc-corenet-cpufreq.c
drivers/cpufreq/unicore2-cpufreq.c
drivers/dma/Kconfig
drivers/dma/edma.c
drivers/dma/fsl-edma.c
drivers/dma/sirf-dma.c
drivers/gpio/gpio-spear-spics.c
drivers/gpio/gpiolib-acpi.c
drivers/gpio/gpiolib.c
drivers/gpu/drm/Makefile
drivers/gpu/drm/ast/ast_post.c
drivers/gpu/drm/bochs/bochs.h
drivers/gpu/drm/bochs/bochs_drv.c
drivers/gpu/drm/bochs/bochs_fbdev.c
drivers/gpu/drm/cirrus/cirrus_drv.c
drivers/gpu/drm/cirrus/cirrus_mode.c
drivers/gpu/drm/drm_crtc_helper.c
drivers/gpu/drm/drm_dp_helper.c
drivers/gpu/drm/drm_mm.c
drivers/gpu/drm/drm_plane_helper.c
drivers/gpu/drm/drm_probe_helper.c [new file with mode: 0644]
drivers/gpu/drm/exynos/exynos_drm_crtc.c
drivers/gpu/drm/exynos/exynos_drm_dmabuf.c
drivers/gpu/drm/exynos/exynos_drm_dsi.c
drivers/gpu/drm/exynos/exynos_drm_vidi.c
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_gem.c
drivers/gpu/drm/i915/i915_gem_context.c
drivers/gpu/drm/i915/i915_gem_execbuffer.c
drivers/gpu/drm/i915/i915_gem_gtt.c
drivers/gpu/drm/i915/i915_irq.c
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_bios.c
drivers/gpu/drm/i915/intel_bios.h
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_dp.c
drivers/gpu/drm/i915/intel_drv.h
drivers/gpu/drm/i915/intel_fbdev.c
drivers/gpu/drm/i915/intel_hdmi.c
drivers/gpu/drm/i915/intel_panel.c
drivers/gpu/drm/i915/intel_pm.c
drivers/gpu/drm/i915/intel_ringbuffer.c
drivers/gpu/drm/i915/intel_ringbuffer.h
drivers/gpu/drm/msm/mdp/mdp4/mdp4_crtc.c
drivers/gpu/drm/msm/mdp/mdp4/mdp4_irq.c
drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c
drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.h
drivers/gpu/drm/msm/mdp/mdp5/mdp5_irq.c
drivers/gpu/drm/msm/msm_fbdev.c
drivers/gpu/drm/msm/msm_gem.c
drivers/gpu/drm/nouveau/core/subdev/bios/base.c
drivers/gpu/drm/omapdrm/omap_crtc.c
drivers/gpu/drm/omapdrm/omap_drv.c
drivers/gpu/drm/omapdrm/omap_drv.h
drivers/gpu/drm/omapdrm/omap_fb.c
drivers/gpu/drm/omapdrm/omap_fbdev.c
drivers/gpu/drm/omapdrm/omap_gem.c
drivers/gpu/drm/omapdrm/omap_plane.c
drivers/gpu/drm/radeon/atombios_dp.c
drivers/gpu/drm/radeon/ci_dpm.c
drivers/gpu/drm/radeon/cik.c
drivers/gpu/drm/radeon/cik_sdma.c
drivers/gpu/drm/radeon/dce6_afmt.c
drivers/gpu/drm/radeon/r600_dpm.c
drivers/gpu/drm/radeon/radeon.h
drivers/gpu/drm/radeon/radeon_atpx_handler.c
drivers/gpu/drm/radeon/radeon_connectors.c
drivers/gpu/drm/radeon/radeon_device.c
drivers/gpu/drm/radeon/radeon_display.c
drivers/gpu/drm/radeon/radeon_drv.c
drivers/gpu/drm/radeon/radeon_family.h
drivers/gpu/drm/radeon/radeon_i2c.c
drivers/gpu/drm/radeon/radeon_kms.c
drivers/gpu/drm/radeon/radeon_mode.h
drivers/gpu/drm/radeon/radeon_pm.c
drivers/gpu/drm/radeon/radeon_ucode.h
drivers/gpu/drm/radeon/radeon_vce.c
drivers/gpu/drm/radeon/si.c
drivers/gpu/drm/tegra/dc.c
drivers/gpu/drm/tegra/dpaux.c
drivers/gpu/drm/tegra/dpaux.h
drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
drivers/gpu/host1x/hw/intr_hw.c
drivers/hid/hid-core.c
drivers/hid/hid-ids.h
drivers/hid/hid-microsoft.c
drivers/hid/hid-sensor-hub.c
drivers/hid/hid-sony.c
drivers/hv/connection.c
drivers/hwmon/coretemp.c
drivers/hwmon/ltc2945.c
drivers/hwmon/vexpress.c
drivers/idle/intel_idle.c
drivers/iio/adc/at91_adc.c
drivers/iio/industrialio-buffer.c
drivers/iio/light/cm32181.c
drivers/iio/light/cm36651.c
drivers/infiniband/hw/cxgb4/Kconfig
drivers/infiniband/hw/cxgb4/cm.c
drivers/infiniband/hw/cxgb4/cq.c
drivers/infiniband/hw/cxgb4/device.c
drivers/infiniband/hw/cxgb4/iw_cxgb4.h
drivers/infiniband/hw/cxgb4/mem.c
drivers/infiniband/hw/cxgb4/provider.c
drivers/infiniband/hw/cxgb4/qp.c
drivers/infiniband/hw/cxgb4/resource.c
drivers/infiniband/hw/cxgb4/t4.h
drivers/infiniband/hw/cxgb4/t4fw_ri_api.h
drivers/infiniband/hw/mlx5/main.c
drivers/infiniband/hw/mlx5/qp.c
drivers/infiniband/hw/mthca/mthca_main.c
drivers/infiniband/hw/qib/qib_pcie.c
drivers/input/misc/da9055_onkey.c
drivers/input/misc/soc_button_array.c
drivers/input/mouse/elantech.c
drivers/input/mouse/synaptics.c
drivers/input/serio/i8042-x86ia64io.h
drivers/input/serio/i8042.c
drivers/input/serio/serio.c
drivers/input/tablet/wacom_sys.c
drivers/input/tablet/wacom_wac.c
drivers/input/touchscreen/Kconfig
drivers/input/touchscreen/Makefile
drivers/input/touchscreen/ads7846.c
drivers/input/touchscreen/atmel_tsadcc.c [deleted file]
drivers/iommu/arm-smmu.c
drivers/iommu/dmar.c
drivers/iommu/intel-iommu.c
drivers/irqchip/irq-armada-370-xp.c
drivers/irqchip/irq-crossbar.c
drivers/irqchip/irq-gic.c
drivers/irqchip/irq-vic.c
drivers/irqchip/spear-shirq.c
drivers/isdn/icn/icn.c
drivers/mcb/mcb-parse.c
drivers/md/dm-cache-target.c
drivers/md/dm-thin.c
drivers/md/dm-verity.c
drivers/md/raid5.c
drivers/media/platform/Kconfig
drivers/misc/Kconfig
drivers/misc/genwqe/card_base.h
drivers/misc/genwqe/card_ddcb.c
drivers/misc/genwqe/card_dev.c
drivers/misc/genwqe/card_utils.c
drivers/misc/genwqe/genwqe_driver.h
drivers/misc/mei/hw-me-regs.h
drivers/misc/mei/interrupt.c
drivers/misc/mei/main.c
drivers/misc/mei/pci-me.c
drivers/mtd/devices/spear_smi.c
drivers/net/ethernet/broadcom/bnx2.c
drivers/net/ethernet/broadcom/tg3.c
drivers/net/ethernet/cadence/Kconfig
drivers/net/ethernet/chelsio/cxgb4/l2t.c
drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
drivers/net/ethernet/emulex/benet/be.h
drivers/net/ethernet/emulex/benet/be_main.c
drivers/net/ethernet/marvell/mvneta.c
drivers/net/ethernet/mellanox/mlx4/en_cq.c
drivers/net/ethernet/mellanox/mlx4/en_netdev.c
drivers/net/ethernet/mellanox/mlx4/main.c
drivers/net/ethernet/mellanox/mlx4/mlx4.h
drivers/net/ethernet/mellanox/mlx4/mlx4_en.h
drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_init.c
drivers/net/ethernet/qlogic/qlcnic/qlcnic_ctx.c
drivers/net/ethernet/qlogic/qlcnic/qlcnic_dcb.c
drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c
drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_pf.c
drivers/net/ethernet/qlogic/qlcnic/qlcnic_sysfs.c
drivers/net/ethernet/sfc/ef10.c
drivers/net/ethernet/sfc/efx.c
drivers/net/ethernet/sfc/enum.h
drivers/net/ethernet/sfc/falcon.c
drivers/net/ethernet/sfc/farch.c
drivers/net/ethernet/sfc/mcdi.c
drivers/net/ethernet/sfc/mcdi.h
drivers/net/ethernet/sfc/net_driver.h
drivers/net/ethernet/sfc/nic.h
drivers/net/ethernet/sfc/siena.c
drivers/net/ieee802154/at86rf230.c
drivers/net/phy/mdio-gpio.c
drivers/net/vxlan.c
drivers/net/wan/cosa.c
drivers/net/wireless/cw1200/debug.c
drivers/net/wireless/iwlwifi/iwl-7000.c
drivers/net/wireless/iwlwifi/mvm/coex.c
drivers/net/wireless/iwlwifi/mvm/mac80211.c
drivers/net/wireless/iwlwifi/mvm/rs.c
drivers/net/wireless/iwlwifi/mvm/rs.h
drivers/net/wireless/iwlwifi/mvm/sf.c
drivers/net/wireless/iwlwifi/pcie/drv.c
drivers/net/wireless/mwifiex/main.c
drivers/net/wireless/mwifiex/sta_ioctl.c
drivers/net/wireless/rsi/rsi_91x_core.c
drivers/net/wireless/rsi/rsi_91x_mgmt.c
drivers/net/wireless/ti/wl18xx/event.h
drivers/net/wireless/ti/wlcore/event.c
drivers/of/base.c
drivers/of/fdt.c
drivers/of/irq.c
drivers/of/platform.c
drivers/of/selftest.c
drivers/of/testcase-data/tests-interrupts.dtsi
drivers/pci/host/pci-rcar-gen2.c
drivers/pci/host/pci-tegra.c
drivers/pci/host/pcie-designware.c
drivers/phy/Kconfig
drivers/phy/Makefile
drivers/phy/phy-core.c
drivers/pinctrl/Kconfig
drivers/pinctrl/Makefile
drivers/pinctrl/pinctrl-as3722.c
drivers/pinctrl/pinctrl-bcm281xx.c [new file with mode: 0644]
drivers/pinctrl/pinctrl-capri.c [deleted file]
drivers/pinctrl/pinctrl-msm.c
drivers/pinctrl/pinctrl-msm.h
drivers/pinctrl/pinctrl-nomadik.c
drivers/pinctrl/pinctrl-rockchip.c
drivers/pinctrl/pinctrl-single.c
drivers/pinctrl/pinctrl-tb10x.c
drivers/pinctrl/sh-pfc/pfc-r8a7790.c
drivers/pinctrl/sh-pfc/pfc-r8a7791.c
drivers/pnp/pnpacpi/core.c
drivers/pnp/quirks.c
drivers/power/reset/vexpress-poweroff.c
drivers/pwm/pwm-spear.c
drivers/regulator/pbias-regulator.c
drivers/reset/sti/reset-stih415.c
drivers/reset/sti/reset-stih416.c
drivers/s390/char/sclp.c
drivers/s390/char/sclp_cmd.c
drivers/s390/char/sclp_vt220.c
drivers/s390/cio/chsc.c
drivers/scsi/hpsa.c
drivers/scsi/mpt2sas/mpt2sas_scsih.c
drivers/scsi/scsi_error.c
drivers/scsi/scsi_lib.c
drivers/scsi/virtio_scsi.c
drivers/spi/spi-atmel.c
drivers/spi/spi-bfin5xx.c
drivers/spi/spi-sh-hspi.c
drivers/spi/spi-sirf.c
drivers/staging/Kconfig
drivers/staging/Makefile
drivers/staging/comedi/comedi_buf.c
drivers/staging/comedi/comedi_fops.c
drivers/staging/comedi/comedi_internal.h
drivers/staging/comedi/drivers/usbdux.c
drivers/staging/goldfish/goldfish_audio.c
drivers/staging/gs_fpgaboot/Makefile
drivers/staging/gs_fpgaboot/gs_fpgaboot.c
drivers/staging/iio/adc/mxs-lradc.c
drivers/staging/iio/resolver/ad2s1200.c
drivers/staging/rtl8187se/Kconfig [deleted file]
drivers/staging/rtl8187se/Makefile [deleted file]
drivers/staging/rtl8187se/Module.symvers [deleted file]
drivers/staging/rtl8187se/TODO [deleted file]
drivers/staging/rtl8187se/ieee80211/dot11d.c [deleted file]
drivers/staging/rtl8187se/ieee80211/dot11d.h [deleted file]
drivers/staging/rtl8187se/ieee80211/ieee80211.h [deleted file]
drivers/staging/rtl8187se/ieee80211/ieee80211_crypt.c [deleted file]
drivers/staging/rtl8187se/ieee80211/ieee80211_crypt.h [deleted file]
drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_ccmp.c [deleted file]
drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_tkip.c [deleted file]
drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_wep.c [deleted file]
drivers/staging/rtl8187se/ieee80211/ieee80211_module.c [deleted file]
drivers/staging/rtl8187se/ieee80211/ieee80211_rx.c [deleted file]
drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c [deleted file]
drivers/staging/rtl8187se/ieee80211/ieee80211_softmac_wx.c [deleted file]
drivers/staging/rtl8187se/ieee80211/ieee80211_tx.c [deleted file]
drivers/staging/rtl8187se/ieee80211/ieee80211_wx.c [deleted file]
drivers/staging/rtl8187se/r8180.h [deleted file]
drivers/staging/rtl8187se/r8180_93cx6.h [deleted file]
drivers/staging/rtl8187se/r8180_core.c [deleted file]
drivers/staging/rtl8187se/r8180_dm.c [deleted file]
drivers/staging/rtl8187se/r8180_dm.h [deleted file]
drivers/staging/rtl8187se/r8180_hw.h [deleted file]
drivers/staging/rtl8187se/r8180_rtl8225.h [deleted file]
drivers/staging/rtl8187se/r8180_rtl8225z2.c [deleted file]
drivers/staging/rtl8187se/r8180_wx.c [deleted file]
drivers/staging/rtl8187se/r8180_wx.h [deleted file]
drivers/staging/rtl8187se/r8185b_init.c [deleted file]
drivers/staging/rtl8188eu/core/rtw_recv.c
drivers/staging/rtl8188eu/os_dep/ioctl_linux.c
drivers/staging/rtl8712/rtl871x_recv.c
drivers/staging/rtl8723au/core/rtw_ieee80211.c
drivers/staging/rtl8723au/core/rtw_mlme_ext.c
drivers/staging/rtl8723au/core/rtw_p2p.c
drivers/staging/rtl8723au/core/rtw_wlan_util.c
drivers/staging/rtl8821ae/base.c
drivers/staging/speakup/main.c
drivers/staging/unisys/uislib/uislib.c
drivers/staging/unisys/visorchipset/visorchipset.h
drivers/staging/unisys/visorchipset/visorchipset_main.c
drivers/staging/usbip/userspace/libsrc/usbip_host_driver.c
drivers/staging/usbip/vhci_sysfs.c
drivers/staging/vme/devices/vme_user.c
drivers/staging/xgifb/vb_def.h
drivers/staging/xgifb/vb_struct.h
drivers/staging/xgifb/vgatypes.h
drivers/tty/serial/8250/8250_core.c
drivers/tty/serial/8250/8250_dma.c
drivers/tty/serial/Kconfig
drivers/tty/serial/amba-pl011.c
drivers/tty/serial/clps711x.c
drivers/tty/serial/efm32-uart.c
drivers/tty/serial/omap-serial.c
drivers/tty/serial/samsung.c
drivers/tty/serial/serial_core.c
drivers/tty/serial/st-asc.c
drivers/tty/tty_buffer.c
drivers/tty/tty_io.c
drivers/usb/chipidea/core.c
drivers/usb/class/cdc-acm.c
drivers/usb/core/hcd-pci.c
drivers/usb/dwc3/core.c
drivers/usb/dwc3/gadget.c
drivers/usb/gadget/f_fs.c
drivers/usb/gadget/f_rndis.c
drivers/usb/gadget/fsl_udc_core.c
drivers/usb/gadget/inode.c
drivers/usb/gadget/rndis.c
drivers/usb/gadget/u_ether.c
drivers/usb/gadget/zero.c
drivers/usb/host/ehci-exynos.c
drivers/usb/host/ehci-platform.c
drivers/usb/host/ehci-tegra.c
drivers/usb/host/ohci-jz4740.c
drivers/usb/host/xhci-pci.c
drivers/usb/host/xhci-ring.c
drivers/usb/host/xhci.c
drivers/usb/host/xhci.h
drivers/usb/musb/musb_dsps.c
drivers/usb/musb/omap2430.c
drivers/usb/phy/phy-am335x-control.c
drivers/usb/phy/phy.c
drivers/usb/serial/cp210x.c
drivers/usb/serial/ftdi_sio.c
drivers/usb/serial/ftdi_sio_ids.h
drivers/usb/serial/io_ti.c
drivers/usb/serial/option.c
drivers/usb/serial/pl2303.c
drivers/usb/serial/pl2303.h
drivers/usb/serial/qcserial.c
drivers/usb/serial/sierra.c
drivers/usb/serial/usb-serial.c
drivers/usb/serial/usb_wwan.c
drivers/usb/storage/uas.c
drivers/usb/usb-common.c
drivers/usb/wusbcore/mmc.c
drivers/usb/wusbcore/wa-xfer.c
drivers/uwb/drp.c
drivers/video/Kconfig
drivers/video/Makefile
drivers/video/console/sticon.c
drivers/video/console/sticore.c
drivers/video/fbdev/68328fb.c [moved from drivers/video/68328fb.c with 100% similarity]
drivers/video/fbdev/Kconfig [new file with mode: 0644]
drivers/video/fbdev/Makefile [new file with mode: 0644]
drivers/video/fbdev/acornfb.c [moved from drivers/video/acornfb.c with 100% similarity]
drivers/video/fbdev/acornfb.h [moved from drivers/video/acornfb.h with 100% similarity]
drivers/video/fbdev/amba-clcd.c [moved from drivers/video/amba-clcd.c with 100% similarity]
drivers/video/fbdev/amifb.c [moved from drivers/video/amifb.c with 100% similarity]
drivers/video/fbdev/arcfb.c [moved from drivers/video/arcfb.c with 100% similarity]
drivers/video/fbdev/arkfb.c [moved from drivers/video/arkfb.c with 100% similarity]
drivers/video/fbdev/asiliantfb.c [moved from drivers/video/asiliantfb.c with 100% similarity]
drivers/video/fbdev/atafb.c [moved from drivers/video/atafb.c with 100% similarity]
drivers/video/fbdev/atafb.h [moved from drivers/video/atafb.h with 100% similarity]
drivers/video/fbdev/atafb_iplan2p2.c [moved from drivers/video/atafb_iplan2p2.c with 100% similarity]
drivers/video/fbdev/atafb_iplan2p4.c [moved from drivers/video/atafb_iplan2p4.c with 100% similarity]
drivers/video/fbdev/atafb_iplan2p8.c [moved from drivers/video/atafb_iplan2p8.c with 100% similarity]
drivers/video/fbdev/atafb_mfb.c [moved from drivers/video/atafb_mfb.c with 100% similarity]
drivers/video/fbdev/atafb_utils.h [moved from drivers/video/atafb_utils.h with 100% similarity]
drivers/video/fbdev/atmel_lcdfb.c [moved from drivers/video/atmel_lcdfb.c with 100% similarity]
drivers/video/fbdev/aty/Makefile [moved from drivers/video/aty/Makefile with 100% similarity]
drivers/video/fbdev/aty/ati_ids.h [moved from drivers/video/aty/ati_ids.h with 100% similarity]
drivers/video/fbdev/aty/aty128fb.c [moved from drivers/video/aty/aty128fb.c with 100% similarity]
drivers/video/fbdev/aty/atyfb.h [moved from drivers/video/aty/atyfb.h with 100% similarity]
drivers/video/fbdev/aty/atyfb_base.c [moved from drivers/video/aty/atyfb_base.c with 100% similarity]
drivers/video/fbdev/aty/mach64_accel.c [moved from drivers/video/aty/mach64_accel.c with 100% similarity]
drivers/video/fbdev/aty/mach64_ct.c [moved from drivers/video/aty/mach64_ct.c with 100% similarity]
drivers/video/fbdev/aty/mach64_cursor.c [moved from drivers/video/aty/mach64_cursor.c with 99% similarity]
drivers/video/fbdev/aty/mach64_gx.c [moved from drivers/video/aty/mach64_gx.c with 100% similarity]
drivers/video/fbdev/aty/radeon_accel.c [moved from drivers/video/aty/radeon_accel.c with 100% similarity]
drivers/video/fbdev/aty/radeon_backlight.c [moved from drivers/video/aty/radeon_backlight.c with 100% similarity]
drivers/video/fbdev/aty/radeon_base.c [moved from drivers/video/aty/radeon_base.c with 100% similarity]
drivers/video/fbdev/aty/radeon_i2c.c [moved from drivers/video/aty/radeon_i2c.c with 100% similarity]
drivers/video/fbdev/aty/radeon_monitor.c [moved from drivers/video/aty/radeon_monitor.c with 100% similarity]
drivers/video/fbdev/aty/radeon_pm.c [moved from drivers/video/aty/radeon_pm.c with 100% similarity]
drivers/video/fbdev/aty/radeonfb.h [moved from drivers/video/aty/radeonfb.h with 100% similarity]
drivers/video/fbdev/au1100fb.c [moved from drivers/video/au1100fb.c with 100% similarity]
drivers/video/fbdev/au1100fb.h [moved from drivers/video/au1100fb.h with 100% similarity]
drivers/video/fbdev/au1200fb.c [moved from drivers/video/au1200fb.c with 100% similarity]
drivers/video/fbdev/au1200fb.h [moved from drivers/video/au1200fb.h with 100% similarity]
drivers/video/fbdev/auo_k1900fb.c [moved from drivers/video/auo_k1900fb.c with 100% similarity]
drivers/video/fbdev/auo_k1901fb.c [moved from drivers/video/auo_k1901fb.c with 100% similarity]
drivers/video/fbdev/auo_k190x.c [moved from drivers/video/auo_k190x.c with 100% similarity]
drivers/video/fbdev/auo_k190x.h [moved from drivers/video/auo_k190x.h with 100% similarity]
drivers/video/fbdev/bf537-lq035.c [moved from drivers/video/bf537-lq035.c with 100% similarity]
drivers/video/fbdev/bf54x-lq043fb.c [moved from drivers/video/bf54x-lq043fb.c with 99% similarity]
drivers/video/fbdev/bfin-lq035q1-fb.c [moved from drivers/video/bfin-lq035q1-fb.c with 100% similarity]
drivers/video/fbdev/bfin-t350mcqb-fb.c [moved from drivers/video/bfin-t350mcqb-fb.c with 100% similarity]
drivers/video/fbdev/bfin_adv7393fb.c [moved from drivers/video/bfin_adv7393fb.c with 100% similarity]
drivers/video/fbdev/bfin_adv7393fb.h [moved from drivers/video/bfin_adv7393fb.h with 100% similarity]
drivers/video/fbdev/broadsheetfb.c [moved from drivers/video/broadsheetfb.c with 100% similarity]
drivers/video/fbdev/bt431.h [moved from drivers/video/bt431.h with 100% similarity]
drivers/video/fbdev/bt455.h [moved from drivers/video/bt455.h with 100% similarity]
drivers/video/fbdev/bw2.c [moved from drivers/video/bw2.c with 100% similarity]
drivers/video/fbdev/c2p.h [moved from drivers/video/c2p.h with 100% similarity]
drivers/video/fbdev/c2p_core.h [moved from drivers/video/c2p_core.h with 100% similarity]
drivers/video/fbdev/c2p_iplan2.c [moved from drivers/video/c2p_iplan2.c with 100% similarity]
drivers/video/fbdev/c2p_planar.c [moved from drivers/video/c2p_planar.c with 100% similarity]
drivers/video/fbdev/carminefb.c [moved from drivers/video/carminefb.c with 100% similarity]
drivers/video/fbdev/carminefb.h [moved from drivers/video/carminefb.h with 100% similarity]
drivers/video/fbdev/carminefb_regs.h [moved from drivers/video/carminefb_regs.h with 100% similarity]
drivers/video/fbdev/cg14.c [moved from drivers/video/cg14.c with 100% similarity]
drivers/video/fbdev/cg3.c [moved from drivers/video/cg3.c with 100% similarity]
drivers/video/fbdev/cg6.c [moved from drivers/video/cg6.c with 100% similarity]
drivers/video/fbdev/chipsfb.c [moved from drivers/video/chipsfb.c with 100% similarity]
drivers/video/fbdev/cirrusfb.c [moved from drivers/video/cirrusfb.c with 100% similarity]
drivers/video/fbdev/clps711xfb.c [moved from drivers/video/clps711xfb.c with 100% similarity]
drivers/video/fbdev/cobalt_lcdfb.c [moved from drivers/video/cobalt_lcdfb.c with 100% similarity]
drivers/video/fbdev/controlfb.c [moved from drivers/video/controlfb.c with 100% similarity]
drivers/video/fbdev/controlfb.h [moved from drivers/video/controlfb.h with 100% similarity]
drivers/video/fbdev/core/Makefile [new file with mode: 0644]
drivers/video/fbdev/core/cfbcopyarea.c [moved from drivers/video/cfbcopyarea.c with 100% similarity]
drivers/video/fbdev/core/cfbfillrect.c [moved from drivers/video/cfbfillrect.c with 100% similarity]
drivers/video/fbdev/core/cfbimgblt.c [moved from drivers/video/cfbimgblt.c with 100% similarity]
drivers/video/fbdev/core/fb_ddc.c [moved from drivers/video/fb_ddc.c with 99% similarity]
drivers/video/fbdev/core/fb_defio.c [moved from drivers/video/fb_defio.c with 100% similarity]
drivers/video/fbdev/core/fb_draw.h [moved from drivers/video/fb_draw.h with 100% similarity]
drivers/video/fbdev/core/fb_notify.c [moved from drivers/video/fb_notify.c with 100% similarity]
drivers/video/fbdev/core/fb_sys_fops.c [moved from drivers/video/fb_sys_fops.c with 100% similarity]
drivers/video/fbdev/core/fbcmap.c [moved from drivers/video/fbcmap.c with 100% similarity]
drivers/video/fbdev/core/fbcvt.c [moved from drivers/video/fbcvt.c with 100% similarity]
drivers/video/fbdev/core/fbmem.c [moved from drivers/video/fbmem.c with 100% similarity]
drivers/video/fbdev/core/fbmon.c [moved from drivers/video/fbmon.c with 99% similarity]
drivers/video/fbdev/core/fbsysfs.c [moved from drivers/video/fbsysfs.c with 100% similarity]
drivers/video/fbdev/core/modedb.c [moved from drivers/video/modedb.c with 100% similarity]
drivers/video/fbdev/core/svgalib.c [moved from drivers/video/svgalib.c with 100% similarity]
drivers/video/fbdev/core/syscopyarea.c [moved from drivers/video/syscopyarea.c with 100% similarity]
drivers/video/fbdev/core/sysfillrect.c [moved from drivers/video/sysfillrect.c with 100% similarity]
drivers/video/fbdev/core/sysimgblt.c [moved from drivers/video/sysimgblt.c with 100% similarity]
drivers/video/fbdev/cyber2000fb.c [moved from drivers/video/cyber2000fb.c with 100% similarity]
drivers/video/fbdev/cyber2000fb.h [moved from drivers/video/cyber2000fb.h with 100% similarity]
drivers/video/fbdev/da8xx-fb.c [moved from drivers/video/da8xx-fb.c with 99% similarity]
drivers/video/fbdev/dnfb.c [moved from drivers/video/dnfb.c with 100% similarity]
drivers/video/fbdev/edid.h [moved from drivers/video/edid.h with 100% similarity]
drivers/video/fbdev/efifb.c [moved from drivers/video/efifb.c with 100% similarity]
drivers/video/fbdev/ep93xx-fb.c [moved from drivers/video/ep93xx-fb.c with 100% similarity]
drivers/video/fbdev/exynos/Kconfig [moved from drivers/video/exynos/Kconfig with 100% similarity]
drivers/video/fbdev/exynos/Makefile [moved from drivers/video/exynos/Makefile with 100% similarity]
drivers/video/fbdev/exynos/exynos_mipi_dsi.c [moved from drivers/video/exynos/exynos_mipi_dsi.c with 100% similarity]
drivers/video/fbdev/exynos/exynos_mipi_dsi_common.c [moved from drivers/video/exynos/exynos_mipi_dsi_common.c with 100% similarity]
drivers/video/fbdev/exynos/exynos_mipi_dsi_common.h [moved from drivers/video/exynos/exynos_mipi_dsi_common.h with 100% similarity]
drivers/video/fbdev/exynos/exynos_mipi_dsi_lowlevel.c [moved from drivers/video/exynos/exynos_mipi_dsi_lowlevel.c with 100% similarity]
drivers/video/fbdev/exynos/exynos_mipi_dsi_lowlevel.h [moved from drivers/video/exynos/exynos_mipi_dsi_lowlevel.h with 100% similarity]
drivers/video/fbdev/exynos/exynos_mipi_dsi_regs.h [moved from drivers/video/exynos/exynos_mipi_dsi_regs.h with 100% similarity]
drivers/video/fbdev/exynos/s6e8ax0.c [moved from drivers/video/exynos/s6e8ax0.c with 100% similarity]
drivers/video/fbdev/fb-puv3.c [moved from drivers/video/fb-puv3.c with 100% similarity]
drivers/video/fbdev/ffb.c [moved from drivers/video/ffb.c with 100% similarity]
drivers/video/fbdev/fm2fb.c [moved from drivers/video/fm2fb.c with 100% similarity]
drivers/video/fbdev/fsl-diu-fb.c [moved from drivers/video/fsl-diu-fb.c with 100% similarity]
drivers/video/fbdev/g364fb.c [moved from drivers/video/g364fb.c with 100% similarity]
drivers/video/fbdev/gbefb.c [moved from drivers/video/gbefb.c with 100% similarity]
drivers/video/fbdev/geode/Kconfig [moved from drivers/video/geode/Kconfig with 100% similarity]
drivers/video/fbdev/geode/Makefile [moved from drivers/video/geode/Makefile with 100% similarity]
drivers/video/fbdev/geode/display_gx.c [moved from drivers/video/geode/display_gx.c with 100% similarity]
drivers/video/fbdev/geode/display_gx1.c [moved from drivers/video/geode/display_gx1.c with 100% similarity]
drivers/video/fbdev/geode/display_gx1.h [moved from drivers/video/geode/display_gx1.h with 100% similarity]
drivers/video/fbdev/geode/geodefb.h [moved from drivers/video/geode/geodefb.h with 100% similarity]
drivers/video/fbdev/geode/gx1fb_core.c [moved from drivers/video/geode/gx1fb_core.c with 100% similarity]
drivers/video/fbdev/geode/gxfb.h [moved from drivers/video/geode/gxfb.h with 100% similarity]
drivers/video/fbdev/geode/gxfb_core.c [moved from drivers/video/geode/gxfb_core.c with 100% similarity]
drivers/video/fbdev/geode/lxfb.h [moved from drivers/video/geode/lxfb.h with 100% similarity]
drivers/video/fbdev/geode/lxfb_core.c [moved from drivers/video/geode/lxfb_core.c with 100% similarity]
drivers/video/fbdev/geode/lxfb_ops.c [moved from drivers/video/geode/lxfb_ops.c with 100% similarity]
drivers/video/fbdev/geode/suspend_gx.c [moved from drivers/video/geode/suspend_gx.c with 100% similarity]
drivers/video/fbdev/geode/video_cs5530.c [moved from drivers/video/geode/video_cs5530.c with 100% similarity]
drivers/video/fbdev/geode/video_cs5530.h [moved from drivers/video/geode/video_cs5530.h with 100% similarity]
drivers/video/fbdev/geode/video_gx.c [moved from drivers/video/geode/video_gx.c with 100% similarity]
drivers/video/fbdev/goldfishfb.c [moved from drivers/video/goldfishfb.c with 100% similarity]
drivers/video/fbdev/grvga.c [moved from drivers/video/grvga.c with 100% similarity]
drivers/video/fbdev/gxt4500.c [moved from drivers/video/gxt4500.c with 100% similarity]
drivers/video/fbdev/hecubafb.c [moved from drivers/video/hecubafb.c with 100% similarity]
drivers/video/fbdev/hgafb.c [moved from drivers/video/hgafb.c with 100% similarity]
drivers/video/fbdev/hitfb.c [moved from drivers/video/hitfb.c with 100% similarity]
drivers/video/fbdev/hpfb.c [moved from drivers/video/hpfb.c with 100% similarity]
drivers/video/fbdev/hyperv_fb.c [moved from drivers/video/hyperv_fb.c with 100% similarity]
drivers/video/fbdev/i740_reg.h [moved from drivers/video/i740_reg.h with 100% similarity]
drivers/video/fbdev/i740fb.c [moved from drivers/video/i740fb.c with 100% similarity]
drivers/video/fbdev/i810/Makefile [moved from drivers/video/i810/Makefile with 100% similarity]
drivers/video/fbdev/i810/i810-i2c.c [moved from drivers/video/i810/i810-i2c.c with 100% similarity]
drivers/video/fbdev/i810/i810.h [moved from drivers/video/i810/i810.h with 100% similarity]
drivers/video/fbdev/i810/i810_accel.c [moved from drivers/video/i810/i810_accel.c with 100% similarity]
drivers/video/fbdev/i810/i810_dvt.c [moved from drivers/video/i810/i810_dvt.c with 100% similarity]
drivers/video/fbdev/i810/i810_gtf.c [moved from drivers/video/i810/i810_gtf.c with 100% similarity]
drivers/video/fbdev/i810/i810_main.c [moved from drivers/video/i810/i810_main.c with 100% similarity]
drivers/video/fbdev/i810/i810_main.h [moved from drivers/video/i810/i810_main.h with 100% similarity]
drivers/video/fbdev/i810/i810_regs.h [moved from drivers/video/i810/i810_regs.h with 100% similarity]
drivers/video/fbdev/igafb.c [moved from drivers/video/igafb.c with 100% similarity]
drivers/video/fbdev/imsttfb.c [moved from drivers/video/imsttfb.c with 100% similarity]
drivers/video/fbdev/imxfb.c [moved from drivers/video/imxfb.c with 100% similarity]
drivers/video/fbdev/intelfb/Makefile [moved from drivers/video/intelfb/Makefile with 100% similarity]
drivers/video/fbdev/intelfb/intelfb.h [moved from drivers/video/intelfb/intelfb.h with 100% similarity]
drivers/video/fbdev/intelfb/intelfb_i2c.c [moved from drivers/video/intelfb/intelfb_i2c.c with 100% similarity]
drivers/video/fbdev/intelfb/intelfbdrv.c [moved from drivers/video/intelfb/intelfbdrv.c with 100% similarity]
drivers/video/fbdev/intelfb/intelfbhw.c [moved from drivers/video/intelfb/intelfbhw.c with 100% similarity]
drivers/video/fbdev/intelfb/intelfbhw.h [moved from drivers/video/intelfb/intelfbhw.h with 100% similarity]
drivers/video/fbdev/jz4740_fb.c [moved from drivers/video/jz4740_fb.c with 100% similarity]
drivers/video/fbdev/kyro/Makefile [moved from drivers/video/kyro/Makefile with 100% similarity]
drivers/video/fbdev/kyro/STG4000InitDevice.c [moved from drivers/video/kyro/STG4000InitDevice.c with 100% similarity]
drivers/video/fbdev/kyro/STG4000Interface.h [moved from drivers/video/kyro/STG4000Interface.h with 100% similarity]
drivers/video/fbdev/kyro/STG4000OverlayDevice.c [moved from drivers/video/kyro/STG4000OverlayDevice.c with 100% similarity]
drivers/video/fbdev/kyro/STG4000Ramdac.c [moved from drivers/video/kyro/STG4000Ramdac.c with 100% similarity]
drivers/video/fbdev/kyro/STG4000Reg.h [moved from drivers/video/kyro/STG4000Reg.h with 100% similarity]
drivers/video/fbdev/kyro/STG4000VTG.c [moved from drivers/video/kyro/STG4000VTG.c with 100% similarity]
drivers/video/fbdev/kyro/fbdev.c [moved from drivers/video/kyro/fbdev.c with 100% similarity]
drivers/video/fbdev/leo.c [moved from drivers/video/leo.c with 100% similarity]
drivers/video/fbdev/macfb.c [moved from drivers/video/macfb.c with 100% similarity]
drivers/video/fbdev/macmodes.c [moved from drivers/video/macmodes.c with 100% similarity]
drivers/video/fbdev/macmodes.h [moved from drivers/video/macmodes.h with 100% similarity]
drivers/video/fbdev/matrox/Makefile [moved from drivers/video/matrox/Makefile with 100% similarity]
drivers/video/fbdev/matrox/g450_pll.c [moved from drivers/video/matrox/g450_pll.c with 100% similarity]
drivers/video/fbdev/matrox/g450_pll.h [moved from drivers/video/matrox/g450_pll.h with 100% similarity]
drivers/video/fbdev/matrox/i2c-matroxfb.c [moved from drivers/video/matrox/i2c-matroxfb.c with 100% similarity]
drivers/video/fbdev/matrox/matroxfb_DAC1064.c [moved from drivers/video/matrox/matroxfb_DAC1064.c with 100% similarity]
drivers/video/fbdev/matrox/matroxfb_DAC1064.h [moved from drivers/video/matrox/matroxfb_DAC1064.h with 100% similarity]
drivers/video/fbdev/matrox/matroxfb_Ti3026.c [moved from drivers/video/matrox/matroxfb_Ti3026.c with 100% similarity]
drivers/video/fbdev/matrox/matroxfb_Ti3026.h [moved from drivers/video/matrox/matroxfb_Ti3026.h with 100% similarity]
drivers/video/fbdev/matrox/matroxfb_accel.c [moved from drivers/video/matrox/matroxfb_accel.c with 100% similarity]
drivers/video/fbdev/matrox/matroxfb_accel.h [moved from drivers/video/matrox/matroxfb_accel.h with 100% similarity]
drivers/video/fbdev/matrox/matroxfb_base.c [moved from drivers/video/matrox/matroxfb_base.c with 100% similarity]
drivers/video/fbdev/matrox/matroxfb_base.h [moved from drivers/video/matrox/matroxfb_base.h with 100% similarity]
drivers/video/fbdev/matrox/matroxfb_crtc2.c [moved from drivers/video/matrox/matroxfb_crtc2.c with 100% similarity]
drivers/video/fbdev/matrox/matroxfb_crtc2.h [moved from drivers/video/matrox/matroxfb_crtc2.h with 100% similarity]
drivers/video/fbdev/matrox/matroxfb_g450.c [moved from drivers/video/matrox/matroxfb_g450.c with 100% similarity]
drivers/video/fbdev/matrox/matroxfb_g450.h [moved from drivers/video/matrox/matroxfb_g450.h with 100% similarity]
drivers/video/fbdev/matrox/matroxfb_maven.c [moved from drivers/video/matrox/matroxfb_maven.c with 100% similarity]
drivers/video/fbdev/matrox/matroxfb_maven.h [moved from drivers/video/matrox/matroxfb_maven.h with 100% similarity]
drivers/video/fbdev/matrox/matroxfb_misc.c [moved from drivers/video/matrox/matroxfb_misc.c with 100% similarity]
drivers/video/fbdev/matrox/matroxfb_misc.h [moved from drivers/video/matrox/matroxfb_misc.h with 100% similarity]
drivers/video/fbdev/maxinefb.c [moved from drivers/video/maxinefb.c with 100% similarity]
drivers/video/fbdev/mb862xx/Makefile [moved from drivers/video/mb862xx/Makefile with 100% similarity]
drivers/video/fbdev/mb862xx/mb862xx-i2c.c [moved from drivers/video/mb862xx/mb862xx-i2c.c with 100% similarity]
drivers/video/fbdev/mb862xx/mb862xx_reg.h [moved from drivers/video/mb862xx/mb862xx_reg.h with 100% similarity]
drivers/video/fbdev/mb862xx/mb862xxfb.h [moved from drivers/video/mb862xx/mb862xxfb.h with 100% similarity]
drivers/video/fbdev/mb862xx/mb862xxfb_accel.c [moved from drivers/video/mb862xx/mb862xxfb_accel.c with 100% similarity]
drivers/video/fbdev/mb862xx/mb862xxfb_accel.h [moved from drivers/video/mb862xx/mb862xxfb_accel.h with 100% similarity]
drivers/video/fbdev/mb862xx/mb862xxfbdrv.c [moved from drivers/video/mb862xx/mb862xxfbdrv.c with 100% similarity]
drivers/video/fbdev/mbx/Makefile [moved from drivers/video/mbx/Makefile with 100% similarity]
drivers/video/fbdev/mbx/mbxdebugfs.c [moved from drivers/video/mbx/mbxdebugfs.c with 100% similarity]
drivers/video/fbdev/mbx/mbxfb.c [moved from drivers/video/mbx/mbxfb.c with 100% similarity]
drivers/video/fbdev/mbx/reg_bits.h [moved from drivers/video/mbx/reg_bits.h with 100% similarity]
drivers/video/fbdev/mbx/regs.h [moved from drivers/video/mbx/regs.h with 100% similarity]
drivers/video/fbdev/metronomefb.c [moved from drivers/video/metronomefb.c with 100% similarity]
drivers/video/fbdev/mmp/Kconfig [moved from drivers/video/mmp/Kconfig with 61% similarity]
drivers/video/fbdev/mmp/Makefile [moved from drivers/video/mmp/Makefile with 100% similarity]
drivers/video/fbdev/mmp/core.c [moved from drivers/video/mmp/core.c with 100% similarity]
drivers/video/fbdev/mmp/fb/Kconfig [moved from drivers/video/mmp/fb/Kconfig with 100% similarity]
drivers/video/fbdev/mmp/fb/Makefile [moved from drivers/video/mmp/fb/Makefile with 100% similarity]
drivers/video/fbdev/mmp/fb/mmpfb.c [moved from drivers/video/mmp/fb/mmpfb.c with 100% similarity]
drivers/video/fbdev/mmp/fb/mmpfb.h [moved from drivers/video/mmp/fb/mmpfb.h with 100% similarity]
drivers/video/fbdev/mmp/hw/Kconfig [moved from drivers/video/mmp/hw/Kconfig with 100% similarity]
drivers/video/fbdev/mmp/hw/Makefile [moved from drivers/video/mmp/hw/Makefile with 100% similarity]
drivers/video/fbdev/mmp/hw/mmp_ctrl.c [moved from drivers/video/mmp/hw/mmp_ctrl.c with 100% similarity]
drivers/video/fbdev/mmp/hw/mmp_ctrl.h [moved from drivers/video/mmp/hw/mmp_ctrl.h with 100% similarity]
drivers/video/fbdev/mmp/hw/mmp_spi.c [moved from drivers/video/mmp/hw/mmp_spi.c with 100% similarity]
drivers/video/fbdev/mmp/panel/Kconfig [moved from drivers/video/mmp/panel/Kconfig with 100% similarity]
drivers/video/fbdev/mmp/panel/Makefile [moved from drivers/video/mmp/panel/Makefile with 100% similarity]
drivers/video/fbdev/mmp/panel/tpo_tj032md01bw.c [moved from drivers/video/mmp/panel/tpo_tj032md01bw.c with 100% similarity]
drivers/video/fbdev/msm/Makefile [moved from drivers/video/msm/Makefile with 100% similarity]
drivers/video/fbdev/msm/mddi.c [moved from drivers/video/msm/mddi.c with 100% similarity]
drivers/video/fbdev/msm/mddi_client_dummy.c [moved from drivers/video/msm/mddi_client_dummy.c with 100% similarity]
drivers/video/fbdev/msm/mddi_client_nt35399.c [moved from drivers/video/msm/mddi_client_nt35399.c with 100% similarity]
drivers/video/fbdev/msm/mddi_client_toshiba.c [moved from drivers/video/msm/mddi_client_toshiba.c with 100% similarity]
drivers/video/fbdev/msm/mddi_hw.h [moved from drivers/video/msm/mddi_hw.h with 100% similarity]
drivers/video/fbdev/msm/mdp.c [moved from drivers/video/msm/mdp.c with 100% similarity]
drivers/video/fbdev/msm/mdp_csc_table.h [moved from drivers/video/msm/mdp_csc_table.h with 100% similarity]
drivers/video/fbdev/msm/mdp_hw.h [moved from drivers/video/msm/mdp_hw.h with 100% similarity]
drivers/video/fbdev/msm/mdp_ppp.c [moved from drivers/video/msm/mdp_ppp.c with 100% similarity]
drivers/video/fbdev/msm/mdp_scale_tables.c [moved from drivers/video/msm/mdp_scale_tables.c with 100% similarity]
drivers/video/fbdev/msm/mdp_scale_tables.h [moved from drivers/video/msm/mdp_scale_tables.h with 100% similarity]
drivers/video/fbdev/msm/msm_fb.c [moved from drivers/video/msm/msm_fb.c with 100% similarity]
drivers/video/fbdev/mx3fb.c [moved from drivers/video/mx3fb.c with 100% similarity]
drivers/video/fbdev/mxsfb.c [moved from drivers/video/mxsfb.c with 100% similarity]
drivers/video/fbdev/n411.c [moved from drivers/video/n411.c with 100% similarity]
drivers/video/fbdev/neofb.c [moved from drivers/video/neofb.c with 100% similarity]
drivers/video/fbdev/nuc900fb.c [moved from drivers/video/nuc900fb.c with 100% similarity]
drivers/video/fbdev/nuc900fb.h [moved from drivers/video/nuc900fb.h with 100% similarity]
drivers/video/fbdev/nvidia/Makefile [moved from drivers/video/nvidia/Makefile with 100% similarity]
drivers/video/fbdev/nvidia/nv_accel.c [moved from drivers/video/nvidia/nv_accel.c with 100% similarity]
drivers/video/fbdev/nvidia/nv_backlight.c [moved from drivers/video/nvidia/nv_backlight.c with 100% similarity]
drivers/video/fbdev/nvidia/nv_dma.h [moved from drivers/video/nvidia/nv_dma.h with 100% similarity]
drivers/video/fbdev/nvidia/nv_hw.c [moved from drivers/video/nvidia/nv_hw.c with 100% similarity]
drivers/video/fbdev/nvidia/nv_i2c.c [moved from drivers/video/nvidia/nv_i2c.c with 100% similarity]
drivers/video/fbdev/nvidia/nv_local.h [moved from drivers/video/nvidia/nv_local.h with 100% similarity]
drivers/video/fbdev/nvidia/nv_of.c [moved from drivers/video/nvidia/nv_of.c with 100% similarity]
drivers/video/fbdev/nvidia/nv_proto.h [moved from drivers/video/nvidia/nv_proto.h with 100% similarity]
drivers/video/fbdev/nvidia/nv_setup.c [moved from drivers/video/nvidia/nv_setup.c with 100% similarity]
drivers/video/fbdev/nvidia/nv_type.h [moved from drivers/video/nvidia/nv_type.h with 100% similarity]
drivers/video/fbdev/nvidia/nvidia.c [moved from drivers/video/nvidia/nvidia.c with 100% similarity]
drivers/video/fbdev/ocfb.c [moved from drivers/video/ocfb.c with 100% similarity]
drivers/video/fbdev/offb.c [moved from drivers/video/offb.c with 100% similarity]
drivers/video/fbdev/omap/Kconfig [moved from drivers/video/omap/Kconfig with 100% similarity]
drivers/video/fbdev/omap/Makefile [moved from drivers/video/omap/Makefile with 100% similarity]
drivers/video/fbdev/omap/hwa742.c [moved from drivers/video/omap/hwa742.c with 100% similarity]
drivers/video/fbdev/omap/lcd_ams_delta.c [moved from drivers/video/omap/lcd_ams_delta.c with 100% similarity]
drivers/video/fbdev/omap/lcd_h3.c [moved from drivers/video/omap/lcd_h3.c with 100% similarity]
drivers/video/fbdev/omap/lcd_htcherald.c [moved from drivers/video/omap/lcd_htcherald.c with 100% similarity]
drivers/video/fbdev/omap/lcd_inn1510.c [moved from drivers/video/omap/lcd_inn1510.c with 100% similarity]
drivers/video/fbdev/omap/lcd_inn1610.c [moved from drivers/video/omap/lcd_inn1610.c with 100% similarity]
drivers/video/fbdev/omap/lcd_mipid.c [moved from drivers/video/omap/lcd_mipid.c with 100% similarity]
drivers/video/fbdev/omap/lcd_osk.c [moved from drivers/video/omap/lcd_osk.c with 100% similarity]
drivers/video/fbdev/omap/lcd_palmte.c [moved from drivers/video/omap/lcd_palmte.c with 100% similarity]
drivers/video/fbdev/omap/lcd_palmtt.c [moved from drivers/video/omap/lcd_palmtt.c with 100% similarity]
drivers/video/fbdev/omap/lcd_palmz71.c [moved from drivers/video/omap/lcd_palmz71.c with 100% similarity]
drivers/video/fbdev/omap/lcdc.c [moved from drivers/video/omap/lcdc.c with 100% similarity]
drivers/video/fbdev/omap/lcdc.h [moved from drivers/video/omap/lcdc.h with 100% similarity]
drivers/video/fbdev/omap/omapfb.h [moved from drivers/video/omap/omapfb.h with 100% similarity]
drivers/video/fbdev/omap/omapfb_main.c [moved from drivers/video/omap/omapfb_main.c with 100% similarity]
drivers/video/fbdev/omap/sossi.c [moved from drivers/video/omap/sossi.c with 100% similarity]
drivers/video/fbdev/omap2/Kconfig [new file with mode: 0644]
drivers/video/fbdev/omap2/Makefile [moved from drivers/video/omap2/Makefile with 100% similarity]
drivers/video/fbdev/omap2/displays-new/Kconfig [moved from drivers/video/omap2/displays-new/Kconfig with 100% similarity]
drivers/video/fbdev/omap2/displays-new/Makefile [moved from drivers/video/omap2/displays-new/Makefile with 100% similarity]
drivers/video/fbdev/omap2/displays-new/connector-analog-tv.c [moved from drivers/video/omap2/displays-new/connector-analog-tv.c with 100% similarity]
drivers/video/fbdev/omap2/displays-new/connector-dvi.c [moved from drivers/video/omap2/displays-new/connector-dvi.c with 100% similarity]
drivers/video/fbdev/omap2/displays-new/connector-hdmi.c [moved from drivers/video/omap2/displays-new/connector-hdmi.c with 100% similarity]
drivers/video/fbdev/omap2/displays-new/encoder-tfp410.c [moved from drivers/video/omap2/displays-new/encoder-tfp410.c with 100% similarity]
drivers/video/fbdev/omap2/displays-new/encoder-tpd12s015.c [moved from drivers/video/omap2/displays-new/encoder-tpd12s015.c with 100% similarity]
drivers/video/fbdev/omap2/displays-new/panel-dpi.c [moved from drivers/video/omap2/displays-new/panel-dpi.c with 100% similarity]
drivers/video/fbdev/omap2/displays-new/panel-dsi-cm.c [moved from drivers/video/omap2/displays-new/panel-dsi-cm.c with 100% similarity]
drivers/video/fbdev/omap2/displays-new/panel-lgphilips-lb035q02.c [moved from drivers/video/omap2/displays-new/panel-lgphilips-lb035q02.c with 100% similarity]
drivers/video/fbdev/omap2/displays-new/panel-nec-nl8048hl11.c [moved from drivers/video/omap2/displays-new/panel-nec-nl8048hl11.c with 100% similarity]
drivers/video/fbdev/omap2/displays-new/panel-sharp-ls037v7dw01.c [moved from drivers/video/omap2/displays-new/panel-sharp-ls037v7dw01.c with 100% similarity]
drivers/video/fbdev/omap2/displays-new/panel-sony-acx565akm.c [moved from drivers/video/omap2/displays-new/panel-sony-acx565akm.c with 100% similarity]
drivers/video/fbdev/omap2/displays-new/panel-tpo-td028ttec1.c [moved from drivers/video/omap2/displays-new/panel-tpo-td028ttec1.c with 100% similarity]
drivers/video/fbdev/omap2/displays-new/panel-tpo-td043mtea1.c [moved from drivers/video/omap2/displays-new/panel-tpo-td043mtea1.c with 100% similarity]
drivers/video/fbdev/omap2/dss/Kconfig [moved from drivers/video/omap2/dss/Kconfig with 100% similarity]
drivers/video/fbdev/omap2/dss/Makefile [moved from drivers/video/omap2/dss/Makefile with 100% similarity]
drivers/video/fbdev/omap2/dss/apply.c [moved from drivers/video/omap2/dss/apply.c with 100% similarity]
drivers/video/fbdev/omap2/dss/core.c [moved from drivers/video/omap2/dss/core.c with 100% similarity]
drivers/video/fbdev/omap2/dss/dispc-compat.c [moved from drivers/video/omap2/dss/dispc-compat.c with 100% similarity]
drivers/video/fbdev/omap2/dss/dispc-compat.h [moved from drivers/video/omap2/dss/dispc-compat.h with 100% similarity]
drivers/video/fbdev/omap2/dss/dispc.c [moved from drivers/video/omap2/dss/dispc.c with 98% similarity]
drivers/video/fbdev/omap2/dss/dispc.h [moved from drivers/video/omap2/dss/dispc.h with 100% similarity]
drivers/video/fbdev/omap2/dss/dispc_coefs.c [moved from drivers/video/omap2/dss/dispc_coefs.c with 100% similarity]
drivers/video/fbdev/omap2/dss/display-sysfs.c [moved from drivers/video/omap2/dss/display-sysfs.c with 100% similarity]
drivers/video/fbdev/omap2/dss/display.c [moved from drivers/video/omap2/dss/display.c with 100% similarity]
drivers/video/fbdev/omap2/dss/dpi.c [moved from drivers/video/omap2/dss/dpi.c with 100% similarity]
drivers/video/fbdev/omap2/dss/dsi.c [moved from drivers/video/omap2/dss/dsi.c with 99% similarity]
drivers/video/fbdev/omap2/dss/dss-of.c [moved from drivers/video/omap2/dss/dss-of.c with 100% similarity]
drivers/video/fbdev/omap2/dss/dss.c [moved from drivers/video/omap2/dss/dss.c with 99% similarity]
drivers/video/fbdev/omap2/dss/dss.h [moved from drivers/video/omap2/dss/dss.h with 99% similarity]
drivers/video/fbdev/omap2/dss/dss_features.c [moved from drivers/video/omap2/dss/dss_features.c with 100% similarity]
drivers/video/fbdev/omap2/dss/dss_features.h [moved from drivers/video/omap2/dss/dss_features.h with 100% similarity]
drivers/video/fbdev/omap2/dss/hdmi.h [moved from drivers/video/omap2/dss/hdmi.h with 100% similarity]
drivers/video/fbdev/omap2/dss/hdmi4.c [moved from drivers/video/omap2/dss/hdmi4.c with 100% similarity]
drivers/video/fbdev/omap2/dss/hdmi4_core.c [moved from drivers/video/omap2/dss/hdmi4_core.c with 100% similarity]
drivers/video/fbdev/omap2/dss/hdmi4_core.h [moved from drivers/video/omap2/dss/hdmi4_core.h with 100% similarity]
drivers/video/fbdev/omap2/dss/hdmi_common.c [moved from drivers/video/omap2/dss/hdmi_common.c with 98% similarity]
drivers/video/fbdev/omap2/dss/hdmi_phy.c [moved from drivers/video/omap2/dss/hdmi_phy.c with 100% similarity]
drivers/video/fbdev/omap2/dss/hdmi_pll.c [moved from drivers/video/omap2/dss/hdmi_pll.c with 100% similarity]
drivers/video/fbdev/omap2/dss/hdmi_wp.c [moved from drivers/video/omap2/dss/hdmi_wp.c with 100% similarity]
drivers/video/fbdev/omap2/dss/manager-sysfs.c [moved from drivers/video/omap2/dss/manager-sysfs.c with 100% similarity]
drivers/video/fbdev/omap2/dss/manager.c [moved from drivers/video/omap2/dss/manager.c with 100% similarity]
drivers/video/fbdev/omap2/dss/output.c [moved from drivers/video/omap2/dss/output.c with 100% similarity]
drivers/video/fbdev/omap2/dss/overlay-sysfs.c [moved from drivers/video/omap2/dss/overlay-sysfs.c with 100% similarity]
drivers/video/fbdev/omap2/dss/overlay.c [moved from drivers/video/omap2/dss/overlay.c with 100% similarity]
drivers/video/fbdev/omap2/dss/rfbi.c [moved from drivers/video/omap2/dss/rfbi.c with 100% similarity]
drivers/video/fbdev/omap2/dss/sdi.c [moved from drivers/video/omap2/dss/sdi.c with 100% similarity]
drivers/video/fbdev/omap2/dss/venc.c [moved from drivers/video/omap2/dss/venc.c with 100% similarity]
drivers/video/fbdev/omap2/dss/venc_panel.c [moved from drivers/video/omap2/dss/venc_panel.c with 100% similarity]
drivers/video/fbdev/omap2/omapfb/Kconfig [moved from drivers/video/omap2/omapfb/Kconfig with 100% similarity]
drivers/video/fbdev/omap2/omapfb/Makefile [moved from drivers/video/omap2/omapfb/Makefile with 100% similarity]
drivers/video/fbdev/omap2/omapfb/omapfb-ioctl.c [moved from drivers/video/omap2/omapfb/omapfb-ioctl.c with 100% similarity]
drivers/video/fbdev/omap2/omapfb/omapfb-main.c [moved from drivers/video/omap2/omapfb/omapfb-main.c with 100% similarity]
drivers/video/fbdev/omap2/omapfb/omapfb-sysfs.c [moved from drivers/video/omap2/omapfb/omapfb-sysfs.c with 100% similarity]
drivers/video/fbdev/omap2/omapfb/omapfb.h [moved from drivers/video/omap2/omapfb/omapfb.h with 100% similarity]
drivers/video/fbdev/omap2/vrfb.c [moved from drivers/video/omap2/vrfb.c with 100% similarity]
drivers/video/fbdev/p9100.c [moved from drivers/video/p9100.c with 100% similarity]
drivers/video/fbdev/platinumfb.c [moved from drivers/video/platinumfb.c with 100% similarity]
drivers/video/fbdev/platinumfb.h [moved from drivers/video/platinumfb.h with 100% similarity]
drivers/video/fbdev/pm2fb.c [moved from drivers/video/pm2fb.c with 100% similarity]
drivers/video/fbdev/pm3fb.c [moved from drivers/video/pm3fb.c with 100% similarity]
drivers/video/fbdev/pmag-aa-fb.c [moved from drivers/video/pmag-aa-fb.c with 100% similarity]
drivers/video/fbdev/pmag-ba-fb.c [moved from drivers/video/pmag-ba-fb.c with 100% similarity]
drivers/video/fbdev/pmagb-b-fb.c [moved from drivers/video/pmagb-b-fb.c with 100% similarity]
drivers/video/fbdev/ps3fb.c [moved from drivers/video/ps3fb.c with 100% similarity]
drivers/video/fbdev/pvr2fb.c [moved from drivers/video/pvr2fb.c with 100% similarity]
drivers/video/fbdev/pxa168fb.c [moved from drivers/video/pxa168fb.c with 100% similarity]
drivers/video/fbdev/pxa168fb.h [moved from drivers/video/pxa168fb.h with 100% similarity]
drivers/video/fbdev/pxa3xx-gcu.c [moved from drivers/video/pxa3xx-gcu.c with 100% similarity]
drivers/video/fbdev/pxa3xx-gcu.h [moved from drivers/video/pxa3xx-gcu.h with 100% similarity]
drivers/video/fbdev/pxafb.c [moved from drivers/video/pxafb.c with 100% similarity]
drivers/video/fbdev/pxafb.h [moved from drivers/video/pxafb.h with 100% similarity]
drivers/video/fbdev/q40fb.c [moved from drivers/video/q40fb.c with 100% similarity]
drivers/video/fbdev/riva/Makefile [moved from drivers/video/riva/Makefile with 100% similarity]
drivers/video/fbdev/riva/fbdev.c [moved from drivers/video/riva/fbdev.c with 100% similarity]
drivers/video/fbdev/riva/nv_driver.c [moved from drivers/video/riva/nv_driver.c with 100% similarity]
drivers/video/fbdev/riva/nv_type.h [moved from drivers/video/riva/nv_type.h with 100% similarity]
drivers/video/fbdev/riva/nvreg.h [moved from drivers/video/riva/nvreg.h with 100% similarity]
drivers/video/fbdev/riva/riva_hw.c [moved from drivers/video/riva/riva_hw.c with 100% similarity]
drivers/video/fbdev/riva/riva_hw.h [moved from drivers/video/riva/riva_hw.h with 100% similarity]
drivers/video/fbdev/riva/riva_tbl.h [moved from drivers/video/riva/riva_tbl.h with 100% similarity]
drivers/video/fbdev/riva/rivafb-i2c.c [moved from drivers/video/riva/rivafb-i2c.c with 100% similarity]
drivers/video/fbdev/riva/rivafb.h [moved from drivers/video/riva/rivafb.h with 100% similarity]
drivers/video/fbdev/s1d13xxxfb.c [moved from drivers/video/s1d13xxxfb.c with 100% similarity]
drivers/video/fbdev/s3c-fb.c [moved from drivers/video/s3c-fb.c with 100% similarity]
drivers/video/fbdev/s3c2410fb.c [moved from drivers/video/s3c2410fb.c with 100% similarity]
drivers/video/fbdev/s3c2410fb.h [moved from drivers/video/s3c2410fb.h with 100% similarity]
drivers/video/fbdev/s3fb.c [moved from drivers/video/s3fb.c with 100% similarity]
drivers/video/fbdev/sa1100fb.c [moved from drivers/video/sa1100fb.c with 100% similarity]
drivers/video/fbdev/sa1100fb.h [moved from drivers/video/sa1100fb.h with 100% similarity]
drivers/video/fbdev/savage/Makefile [moved from drivers/video/savage/Makefile with 100% similarity]
drivers/video/fbdev/savage/savagefb-i2c.c [moved from drivers/video/savage/savagefb-i2c.c with 100% similarity]
drivers/video/fbdev/savage/savagefb.h [moved from drivers/video/savage/savagefb.h with 100% similarity]
drivers/video/fbdev/savage/savagefb_accel.c [moved from drivers/video/savage/savagefb_accel.c with 100% similarity]
drivers/video/fbdev/savage/savagefb_driver.c [moved from drivers/video/savage/savagefb_driver.c with 100% similarity]
drivers/video/fbdev/sbuslib.c [moved from drivers/video/sbuslib.c with 100% similarity]
drivers/video/fbdev/sbuslib.h [moved from drivers/video/sbuslib.h with 100% similarity]
drivers/video/fbdev/sh7760fb.c [moved from drivers/video/sh7760fb.c with 100% similarity]
drivers/video/fbdev/sh_mipi_dsi.c [moved from drivers/video/sh_mipi_dsi.c with 100% similarity]
drivers/video/fbdev/sh_mobile_hdmi.c [moved from drivers/video/sh_mobile_hdmi.c with 100% similarity]
drivers/video/fbdev/sh_mobile_lcdcfb.c [moved from drivers/video/sh_mobile_lcdcfb.c with 100% similarity]
drivers/video/fbdev/sh_mobile_lcdcfb.h [moved from drivers/video/sh_mobile_lcdcfb.h with 100% similarity]
drivers/video/fbdev/sh_mobile_meram.c [moved from drivers/video/sh_mobile_meram.c with 100% similarity]
drivers/video/fbdev/simplefb.c [moved from drivers/video/simplefb.c with 100% similarity]
drivers/video/fbdev/sis/300vtbl.h [moved from drivers/video/sis/300vtbl.h with 100% similarity]
drivers/video/fbdev/sis/310vtbl.h [moved from drivers/video/sis/310vtbl.h with 100% similarity]
drivers/video/fbdev/sis/Makefile [moved from drivers/video/sis/Makefile with 100% similarity]
drivers/video/fbdev/sis/init.c [moved from drivers/video/sis/init.c with 100% similarity]
drivers/video/fbdev/sis/init.h [moved from drivers/video/sis/init.h with 100% similarity]
drivers/video/fbdev/sis/init301.c [moved from drivers/video/sis/init301.c with 100% similarity]
drivers/video/fbdev/sis/init301.h [moved from drivers/video/sis/init301.h with 100% similarity]
drivers/video/fbdev/sis/initdef.h [moved from drivers/video/sis/initdef.h with 100% similarity]
drivers/video/fbdev/sis/initextlfb.c [moved from drivers/video/sis/initextlfb.c with 100% similarity]
drivers/video/fbdev/sis/oem300.h [moved from drivers/video/sis/oem300.h with 100% similarity]
drivers/video/fbdev/sis/oem310.h [moved from drivers/video/sis/oem310.h with 100% similarity]
drivers/video/fbdev/sis/sis.h [moved from drivers/video/sis/sis.h with 100% similarity]
drivers/video/fbdev/sis/sis_accel.c [moved from drivers/video/sis/sis_accel.c with 100% similarity]
drivers/video/fbdev/sis/sis_accel.h [moved from drivers/video/sis/sis_accel.h with 100% similarity]
drivers/video/fbdev/sis/sis_main.c [moved from drivers/video/sis/sis_main.c with 100% similarity]
drivers/video/fbdev/sis/sis_main.h [moved from drivers/video/sis/sis_main.h with 100% similarity]
drivers/video/fbdev/sis/vgatypes.h [moved from drivers/video/sis/vgatypes.h with 100% similarity]
drivers/video/fbdev/sis/vstruct.h [moved from drivers/video/sis/vstruct.h with 100% similarity]
drivers/video/fbdev/skeletonfb.c [moved from drivers/video/skeletonfb.c with 100% similarity]
drivers/video/fbdev/sm501fb.c [moved from drivers/video/sm501fb.c with 100% similarity]
drivers/video/fbdev/smscufx.c [moved from drivers/video/smscufx.c with 100% similarity]
drivers/video/fbdev/ssd1307fb.c [moved from drivers/video/ssd1307fb.c with 100% similarity]
drivers/video/fbdev/sstfb.c [moved from drivers/video/sstfb.c with 100% similarity]
drivers/video/fbdev/sticore.h [moved from drivers/video/sticore.h with 100% similarity]
drivers/video/fbdev/stifb.c [moved from drivers/video/stifb.c with 100% similarity]
drivers/video/fbdev/sunxvr1000.c [moved from drivers/video/sunxvr1000.c with 100% similarity]
drivers/video/fbdev/sunxvr2500.c [moved from drivers/video/sunxvr2500.c with 100% similarity]
drivers/video/fbdev/sunxvr500.c [moved from drivers/video/sunxvr500.c with 100% similarity]
drivers/video/fbdev/tcx.c [moved from drivers/video/tcx.c with 100% similarity]
drivers/video/fbdev/tdfxfb.c [moved from drivers/video/tdfxfb.c with 100% similarity]
drivers/video/fbdev/tgafb.c [moved from drivers/video/tgafb.c with 100% similarity]
drivers/video/fbdev/tmiofb.c [moved from drivers/video/tmiofb.c with 100% similarity]
drivers/video/fbdev/tridentfb.c [moved from drivers/video/tridentfb.c with 100% similarity]
drivers/video/fbdev/udlfb.c [moved from drivers/video/udlfb.c with 100% similarity]
drivers/video/fbdev/uvesafb.c [moved from drivers/video/uvesafb.c with 100% similarity]
drivers/video/fbdev/valkyriefb.c [moved from drivers/video/valkyriefb.c with 100% similarity]
drivers/video/fbdev/valkyriefb.h [moved from drivers/video/valkyriefb.h with 100% similarity]
drivers/video/fbdev/vermilion/Makefile [moved from drivers/video/vermilion/Makefile with 100% similarity]
drivers/video/fbdev/vermilion/cr_pll.c [moved from drivers/video/vermilion/cr_pll.c with 100% similarity]
drivers/video/fbdev/vermilion/vermilion.c [moved from drivers/video/vermilion/vermilion.c with 100% similarity]
drivers/video/fbdev/vermilion/vermilion.h [moved from drivers/video/vermilion/vermilion.h with 100% similarity]
drivers/video/fbdev/vesafb.c [moved from drivers/video/vesafb.c with 100% similarity]
drivers/video/fbdev/vfb.c [moved from drivers/video/vfb.c with 100% similarity]
drivers/video/fbdev/vga16fb.c [moved from drivers/video/vga16fb.c with 100% similarity]
drivers/video/fbdev/via/Makefile [moved from drivers/video/via/Makefile with 100% similarity]
drivers/video/fbdev/via/accel.c [moved from drivers/video/via/accel.c with 100% similarity]
drivers/video/fbdev/via/accel.h [moved from drivers/video/via/accel.h with 100% similarity]
drivers/video/fbdev/via/chip.h [moved from drivers/video/via/chip.h with 100% similarity]
drivers/video/fbdev/via/debug.h [moved from drivers/video/via/debug.h with 100% similarity]
drivers/video/fbdev/via/dvi.c [moved from drivers/video/via/dvi.c with 100% similarity]
drivers/video/fbdev/via/dvi.h [moved from drivers/video/via/dvi.h with 100% similarity]
drivers/video/fbdev/via/global.c [moved from drivers/video/via/global.c with 100% similarity]
drivers/video/fbdev/via/global.h [moved from drivers/video/via/global.h with 100% similarity]
drivers/video/fbdev/via/hw.c [moved from drivers/video/via/hw.c with 100% similarity]
drivers/video/fbdev/via/hw.h [moved from drivers/video/via/hw.h with 100% similarity]
drivers/video/fbdev/via/ioctl.c [moved from drivers/video/via/ioctl.c with 100% similarity]
drivers/video/fbdev/via/ioctl.h [moved from drivers/video/via/ioctl.h with 100% similarity]
drivers/video/fbdev/via/lcd.c [moved from drivers/video/via/lcd.c with 100% similarity]
drivers/video/fbdev/via/lcd.h [moved from drivers/video/via/lcd.h with 100% similarity]
drivers/video/fbdev/via/share.h [moved from drivers/video/via/share.h with 100% similarity]
drivers/video/fbdev/via/tblDPASetting.c [moved from drivers/video/via/tblDPASetting.c with 100% similarity]
drivers/video/fbdev/via/tblDPASetting.h [moved from drivers/video/via/tblDPASetting.h with 100% similarity]
drivers/video/fbdev/via/via-core.c [moved from drivers/video/via/via-core.c with 100% similarity]
drivers/video/fbdev/via/via-gpio.c [moved from drivers/video/via/via-gpio.c with 100% similarity]
drivers/video/fbdev/via/via_aux.c [moved from drivers/video/via/via_aux.c with 100% similarity]
drivers/video/fbdev/via/via_aux.h [moved from drivers/video/via/via_aux.h with 100% similarity]
drivers/video/fbdev/via/via_aux_ch7301.c [moved from drivers/video/via/via_aux_ch7301.c with 100% similarity]
drivers/video/fbdev/via/via_aux_edid.c [moved from drivers/video/via/via_aux_edid.c with 100% similarity]
drivers/video/fbdev/via/via_aux_sii164.c [moved from drivers/video/via/via_aux_sii164.c with 100% similarity]
drivers/video/fbdev/via/via_aux_vt1621.c [moved from drivers/video/via/via_aux_vt1621.c with 100% similarity]
drivers/video/fbdev/via/via_aux_vt1622.c [moved from drivers/video/via/via_aux_vt1622.c with 100% similarity]
drivers/video/fbdev/via/via_aux_vt1625.c [moved from drivers/video/via/via_aux_vt1625.c with 100% similarity]
drivers/video/fbdev/via/via_aux_vt1631.c [moved from drivers/video/via/via_aux_vt1631.c with 100% similarity]
drivers/video/fbdev/via/via_aux_vt1632.c [moved from drivers/video/via/via_aux_vt1632.c with 100% similarity]
drivers/video/fbdev/via/via_aux_vt1636.c [moved from drivers/video/via/via_aux_vt1636.c with 100% similarity]
drivers/video/fbdev/via/via_clock.c [moved from drivers/video/via/via_clock.c with 100% similarity]
drivers/video/fbdev/via/via_clock.h [moved from drivers/video/via/via_clock.h with 100% similarity]
drivers/video/fbdev/via/via_i2c.c [moved from drivers/video/via/via_i2c.c with 100% similarity]
drivers/video/fbdev/via/via_modesetting.c [moved from drivers/video/via/via_modesetting.c with 100% similarity]
drivers/video/fbdev/via/via_modesetting.h [moved from drivers/video/via/via_modesetting.h with 100% similarity]
drivers/video/fbdev/via/via_utility.c [moved from drivers/video/via/via_utility.c with 100% similarity]
drivers/video/fbdev/via/via_utility.h [moved from drivers/video/via/via_utility.h with 100% similarity]
drivers/video/fbdev/via/viafbdev.c [moved from drivers/video/via/viafbdev.c with 100% similarity]
drivers/video/fbdev/via/viafbdev.h [moved from drivers/video/via/viafbdev.h with 100% similarity]
drivers/video/fbdev/via/viamode.c [moved from drivers/video/via/viamode.c with 100% similarity]
drivers/video/fbdev/via/viamode.h [moved from drivers/video/via/viamode.h with 100% similarity]
drivers/video/fbdev/via/vt1636.c [moved from drivers/video/via/vt1636.c with 100% similarity]
drivers/video/fbdev/via/vt1636.h [moved from drivers/video/via/vt1636.h with 100% similarity]
drivers/video/fbdev/vt8500lcdfb.c [moved from drivers/video/vt8500lcdfb.c with 100% similarity]
drivers/video/fbdev/vt8500lcdfb.h [moved from drivers/video/vt8500lcdfb.h with 100% similarity]
drivers/video/fbdev/vt8623fb.c [moved from drivers/video/vt8623fb.c with 100% similarity]
drivers/video/fbdev/w100fb.c [moved from drivers/video/w100fb.c with 100% similarity]
drivers/video/fbdev/w100fb.h [moved from drivers/video/w100fb.h with 100% similarity]
drivers/video/fbdev/wm8505fb.c [moved from drivers/video/wm8505fb.c with 100% similarity]
drivers/video/fbdev/wm8505fb_regs.h [moved from drivers/video/wm8505fb_regs.h with 100% similarity]
drivers/video/fbdev/wmt_ge_rops.c [moved from drivers/video/wmt_ge_rops.c with 99% similarity]
drivers/video/fbdev/wmt_ge_rops.h [moved from drivers/video/wmt_ge_rops.h with 100% similarity]
drivers/video/fbdev/xen-fbfront.c [moved from drivers/video/xen-fbfront.c with 100% similarity]
drivers/video/fbdev/xilinxfb.c [moved from drivers/video/xilinxfb.c with 100% similarity]
drivers/video/omap2/Kconfig [deleted file]
drivers/vme/bridges/vme_tsi148.c
drivers/w1/w1.c
drivers/w1/w1_netlink.c
drivers/xen/manage.c
drivers/xen/xen-pciback/pciback_ops.c
drivers/xen/xen-pciback/vpci.c
drivers/xen/xenbus/xenbus_xs.c
firmware/WHENCE
fs/aio.c
fs/btrfs/ctree.h
fs/btrfs/disk-io.c
fs/btrfs/extent-tree.c
fs/btrfs/file.c
fs/btrfs/inode-map.c
fs/btrfs/ioctl.c
fs/btrfs/send.c
fs/btrfs/super.c
fs/ceph/file.c
fs/cifs/cifsfs.c
fs/cifs/cifsglob.h
fs/cifs/cifsproto.h
fs/cifs/cifssmb.c
fs/cifs/file.c
fs/cifs/misc.c
fs/cifs/smb1ops.c
fs/cifs/smb2misc.c
fs/cifs/smb2ops.c
fs/cifs/smb2pdu.c
fs/compat.c
fs/coredump.c
fs/ext4/balloc.c
fs/ext4/ext4.h
fs/ext4/extents.c
fs/ext4/extents_status.c
fs/ext4/file.c
fs/ext4/inode.c
fs/ext4/mballoc.c
fs/ext4/page-io.c
fs/ext4/super.c
fs/ext4/xattr.c
fs/fcntl.c
fs/kernfs/dir.c
fs/kernfs/file.c
fs/kernfs/inode.c
fs/locks.c
fs/nfsd/nfs4callback.c
fs/nfsd/nfs4xdr.c
fs/open.c
fs/super.c
fs/sysfs/file.c
fs/xfs/xfs_aops.c
fs/xfs/xfs_bmap.c
fs/xfs/xfs_bmap_util.c
fs/xfs/xfs_buf.c
fs/xfs/xfs_file.c
fs/xfs/xfs_inode.c
fs/xfs/xfs_inode.h
fs/xfs/xfs_iops.c
fs/xfs/xfs_log.c
fs/xfs/xfs_trace.h
include/asm-generic/fixmap.h
include/asm-generic/pgtable.h
include/asm-generic/word-at-a-time.h
include/drm/drm_crtc_helper.h
include/drm/drm_dp_helper.h
include/dt-bindings/clock/at91.h [moved from include/dt-bindings/clk/at91.h with 100% similarity]
include/dt-bindings/clock/r8a7790-clock.h
include/dt-bindings/clock/r8a7791-clock.h
include/dt-bindings/clock/stih415-clks.h [new file with mode: 0644]
include/dt-bindings/clock/stih416-clks.h [new file with mode: 0644]
include/dt-bindings/clock/tegra124-car.h
include/dt-bindings/reset-controller/stih415-resets.h
include/dt-bindings/reset-controller/stih416-resets.h
include/dt-bindings/reset/altr,rst-mgr.h [new file with mode: 0644]
include/linux/clk/at91_pmc.h
include/linux/device.h
include/linux/filter.h
include/linux/fs.h
include/linux/ftrace.h
include/linux/hyperv.h
include/linux/interrupt.h
include/linux/ipmi.h
include/linux/ipmi_smi.h
include/linux/irq.h
include/linux/libata.h
include/linux/mdio-gpio.h
include/linux/mlx5/device.h
include/linux/mlx5/qp.h
include/linux/mtd/spear_smi.h
include/linux/netfilter/nf_conntrack_proto_gre.h
include/linux/of.h
include/linux/of_irq.h
include/linux/phy.h
include/linux/phy/phy.h
include/linux/platform_data/at91_adc.h
include/linux/platform_data/atmel.h
include/linux/reboot.h
include/linux/regulator/consumer.h
include/linux/serio.h
include/linux/sysfs.h
include/linux/tty.h
include/linux/wait.h
include/net/dst.h
include/net/flow.h
include/net/inet6_connection_sock.h
include/net/inet_connection_sock.h
include/net/ip.h
include/net/ip6_route.h
include/net/ip_tunnels.h
include/net/ipv6.h
include/net/net_namespace.h
include/net/netfilter/nf_tables_core.h
include/net/sctp/structs.h
include/net/xfrm.h
include/trace/events/ext4.h
include/trace/events/module.h
include/uapi/asm-generic/fcntl.h
include/uapi/drm/tegra_drm.h
include/uapi/linux/hyperv.h
include/uapi/linux/input.h
init/Kconfig
kernel/hrtimer.c
kernel/irq/irqdesc.c
kernel/irq/manage.c
kernel/locking/mutex-debug.c
kernel/module.c
kernel/power/suspend.c
kernel/sched/deadline.c
kernel/sched/fair.c
kernel/sched/rt.c
kernel/sched/sched.h
kernel/seccomp.c
kernel/softirq.c
kernel/time/tick-common.c
kernel/time/tick-sched.c
kernel/timer.c
kernel/trace/ftrace.c
kernel/trace/trace_events_trigger.c
kernel/trace/trace_functions.c
kernel/trace/trace_uprobe.c
kernel/user_namespace.c
kernel/watchdog.c
lib/Kconfig.debug
mm/filemap.c
mm/huge_memory.c
mm/hugetlb.c
mm/memory.c
mm/vmacache.c
mm/vmscan.c
net/8021q/vlan_dev.c
net/core/dev.c
net/core/dst.c
net/core/filter.c
net/dccp/output.c
net/decnet/dn_route.c
net/ipv4/fib_frontend.c
net/ipv4/fib_semantics.c
net/ipv4/ip_output.c
net/ipv4/ip_tunnel.c
net/ipv4/ip_tunnel_core.c
net/ipv4/ipmr.c
net/ipv4/netfilter/ipt_rpfilter.c
net/ipv4/ping.c
net/ipv4/route.c
net/ipv4/tcp_output.c
net/ipv4/xfrm4_output.c
net/ipv6/inet6_connection_sock.c
net/ipv6/ip6_gre.c
net/ipv6/ip6_output.c
net/ipv6/ip6_tunnel.c
net/ipv6/ip6mr.c
net/ipv6/route.c
net/ipv6/sit.c
net/ipv6/xfrm6_output.c
net/l2tp/l2tp_core.c
net/l2tp/l2tp_ip.c
net/mac80211/chan.c
net/mac80211/main.c
net/mac80211/offchannel.c
net/mac80211/status.c
net/netfilter/nf_conntrack_core.c
net/netfilter/nf_conntrack_pptp.c
net/netfilter/nf_conntrack_proto_gre.c
net/netfilter/nf_tables_core.c
net/netfilter/nft_cmp.c
net/openvswitch/vport-gre.c
net/sctp/associola.c
net/sctp/auth.c
net/sctp/endpointola.c
net/sctp/protocol.c
net/sctp/sm_make_chunk.c
net/sctp/sm_statefuns.c
net/sctp/socket.c
net/sctp/sysctl.c
net/sctp/ulpevent.c
net/socket.c
net/xfrm/xfrm_policy.c
security/selinux/hooks.c
sound/isa/es18xx.c
sound/pci/hda/hda_controller.c
sound/pci/hda/hda_intel.c
sound/pci/hda/hda_priv.h
sound/pci/hda/patch_realtek.c
sound/soc/atmel/sam9g20_wm8731.c
sound/soc/codecs/alc5623.c
sound/soc/codecs/cs42l52.c
sound/soc/codecs/cs42l73.c
sound/soc/codecs/tlv320aic3x.c
sound/soc/fsl/fsl_spdif.h
sound/soc/intel/sst-dsp-priv.h
sound/soc/intel/sst-haswell-ipc.c
sound/soc/jz4740/Makefile
sound/soc/sh/rcar/src.c
sound/soc/sh/rcar/ssi.c
sound/soc/soc-dapm.c
tools/hv/hv_fcopy_daemon.c
tools/lib/api/fs/debugfs.c
tools/lib/lockdep/Makefile
tools/lib/lockdep/uinclude/linux/lockdep.h
tools/lib/traceevent/event-parse.c
tools/lib/traceevent/event-parse.h
tools/perf/Documentation/perf-bench.txt
tools/perf/Documentation/perf-top.txt
tools/perf/Makefile.perf
tools/perf/arch/x86/tests/dwarf-unwind.c
tools/perf/arch/x86/tests/regs_load.S
tools/perf/bench/numa.c
tools/perf/builtin-kvm.c
tools/perf/builtin-record.c
tools/perf/builtin-stat.c
tools/perf/config/Makefile
tools/perf/tests/code-reading.c
tools/perf/tests/make
tools/perf/util/data.c
tools/perf/util/machine.c
tools/perf/util/probe-finder.c
tools/perf/util/symbol-elf.c
tools/power/acpi/Makefile
virt/kvm/arm/vgic.c
virt/kvm/assigned-dev.c
virt/kvm/async_pf.c
virt/kvm/ioapic.c

index 658003aa94468687849d482a745fc61951d67e88..df1baba43a64c7e3bab28b01ca66cbbe3e831f50 100644 (file)
--- a/.mailmap
+++ b/.mailmap
@@ -99,6 +99,7 @@ Sachin P Sant <ssant@in.ibm.com>
 Sam Ravnborg <sam@mars.ravnborg.org>
 Sascha Hauer <s.hauer@pengutronix.de>
 S.Çağlar Onur <caglar@pardus.org.tr>
+Shiraz Hashim <shiraz.linux.kernel@gmail.com> <shiraz.hashim@st.com>
 Simon Kelley <simon@thekelleys.org.uk>
 Stéphane Witzmann <stephane.witzmann@ubpmes.univ-bpclermont.fr>
 Stephen Hemminger <shemminger@osdl.org>
index f5170082bdb3738eb409d67dfedd2851b683d2b6..cc63f30de166501e37f4ec4a707dc3ad5a0c371e 100644 (file)
@@ -276,7 +276,7 @@ X!Isound/sound_firmware.c
      </para>
 
      <sect1><title>Frame Buffer Memory</title>
-!Edrivers/video/fbmem.c
+!Edrivers/video/fbdev/core/fbmem.c
      </sect1>
 <!--
      <sect1><title>Frame Buffer Console</title>
@@ -284,7 +284,7 @@ X!Edrivers/video/console/fbcon.c
      </sect1>
 -->
      <sect1><title>Frame Buffer Colormap</title>
-!Edrivers/video/fbcmap.c
+!Edrivers/video/fbdev/core/fbcmap.c
      </sect1>
 <!-- FIXME:
   drivers/video/fbgen.c has no docs, which stuffs up the sgml.  Comment
@@ -294,11 +294,11 @@ X!Idrivers/video/fbgen.c
      </sect1>
 KAO -->
      <sect1><title>Frame Buffer Video Mode Database</title>
-!Idrivers/video/modedb.c
-!Edrivers/video/modedb.c
+!Idrivers/video/fbdev/core/modedb.c
+!Edrivers/video/fbdev/core/modedb.c
      </sect1>
      <sect1><title>Frame Buffer Macintosh Video Mode Database</title>
-!Edrivers/video/macmodes.c
+!Edrivers/video/fbdev/macmodes.c
      </sect1>
      <sect1><title>Frame Buffer Fonts</title>
         <para>
index 702c4474919c54c29cb021a86eeb54e90f5bdffa..677a02553ec0cd772c1a86c73b7d314f48376190 100644 (file)
@@ -2285,6 +2285,11 @@ void intel_crt_init(struct drm_device *dev)
     <sect2>
       <title>Modeset Helper Functions Reference</title>
 !Edrivers/gpu/drm/drm_crtc_helper.c
+    </sect2>
+    <sect2>
+      <title>Output Probing Helper Functions Reference</title>
+!Pdrivers/gpu/drm/drm_probe_helper.c output probing helper overview
+!Edrivers/gpu/drm/drm_probe_helper.c
     </sect2>
     <sect2>
       <title>fbdev Helper Functions Reference</title>
index 06fc7602593a9d38a4cec97538948b03b5ce2676..37b2cafa4e52703b516d8c163653ae58106ad990 100644 (file)
@@ -19,6 +19,9 @@ to deliver its interrupts via SPIs.
 
 - clock-frequency : The frequency of the main counter, in Hz. Optional.
 
+- always-on : a boolean property. If present, the timer is powered through an
+  always-on power domain, therefore it never loses context.
+
 Example:
 
        timer {
diff --git a/Documentation/devicetree/bindings/arm/exynos/smp-sysram.txt b/Documentation/devicetree/bindings/arm/exynos/smp-sysram.txt
new file mode 100644 (file)
index 0000000..4a0a4f7
--- /dev/null
@@ -0,0 +1,38 @@
+Samsung Exynos SYSRAM for SMP bringup:
+------------------------------------
+
+Samsung SMP-capable Exynos SoCs use part of the SYSRAM for the bringup
+of the secondary cores. Once the core gets powered up it executes the
+code that is residing at some specific location of the SYSRAM.
+
+Therefore reserved section sub-nodes have to be added to the mmio-sram
+declaration. These nodes are of two types depending upon secure or
+non-secure execution environment.
+
+Required sub-node properties:
+- compatible : depending upon boot mode, should be
+               "samsung,exynos4210-sysram" : for Secure SYSRAM
+               "samsung,exynos4210-sysram-ns" : for Non-secure SYSRAM
+
+The rest of the properties should follow the generic mmio-sram discription
+found in ../../misc/sysram.txt
+
+Example:
+
+       sysram@02020000 {
+               compatible = "mmio-sram";
+               reg = <0x02020000 0x54000>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges = <0 0x02020000 0x54000>;
+
+               smp-sysram@0 {
+                       compatible = "samsung,exynos4210-sysram";
+                       reg = <0x0 0x1000>;
+               };
+
+               smp-sysram@53000 {
+                       compatible = "samsung,exynos4210-sysram-ns";
+                       reg = <0x53000 0x1000>;
+               };
+       };
diff --git a/Documentation/devicetree/bindings/arm/marvell,kirkwood.txt b/Documentation/devicetree/bindings/arm/marvell,kirkwood.txt
new file mode 100644 (file)
index 0000000..925ecbf
--- /dev/null
@@ -0,0 +1,97 @@
+Marvell Kirkwood SoC Family Device Tree Bindings
+------------------------------------------------
+
+Boards with a SoC of the Marvell Kirkwook family, eg 88f6281
+
+* Required root node properties:
+compatible: must contain "marvell,kirkwood"
+
+In addition, the above compatible shall be extended with the specific
+SoC. Currently known SoC compatibles are:
+
+"marvell,kirkwood-88f6192"
+"marvell,kirkwood-88f6281"
+"marvell,kirkwood-88f6282"
+"marvell,kirkwood-88f6283"
+"marvell,kirkwood-88f6702"
+"marvell,kirkwood-98DX4122"
+
+And in addition, the compatible shall be extended with the specific
+board. Currently known boards are:
+
+"buffalo,lschlv2"
+"buffalo,lsxhl"
+"buffalo,lsxl"
+"dlink,dns-320"
+"dlink,dns-320-a1"
+"dlink,dns-325"
+"dlink,dns-325-a1"
+"dlink,dns-kirkwood"
+"excito,b3"
+"globalscale,dreamplug-003-ds2001"
+"globalscale,guruplug"
+"globalscale,guruplug-server-plus"
+"globalscale,sheevaplug"
+"globalscale,sheevaplug"
+"globalscale,sheevaplug-esata"
+"globalscale,sheevaplug-esata-rev13"
+"iom,iconnect"
+"iom,iconnect-1.1"
+"iom,ix2-200"
+"keymile,km_kirkwood"
+"lacie,cloudbox"
+"lacie,inetspace_v2"
+"lacie,laplug"
+"lacie,netspace_lite_v2"
+"lacie,netspace_max_v2"
+"lacie,netspace_mini_v2"
+"lacie,netspace_v2"
+"marvell,db-88f6281-bp"
+"marvell,db-88f6282-bp"
+"marvell,mv88f6281gtw-ge"
+"marvell,rd88f6281"
+"marvell,rd88f6281"
+"marvell,rd88f6281-a0"
+"marvell,rd88f6281-a1"
+"mpl,cec4"
+"mpl,cec4-10"
+"netgear,readynas"
+"netgear,readynas"
+"netgear,readynas-duo-v2"
+"netgear,readynas-nv+-v2"
+"plathome,openblocks-a6"
+"plathome,openblocks-a7"
+"raidsonic,ib-nas6210"
+"raidsonic,ib-nas6210-b"
+"raidsonic,ib-nas6220"
+"raidsonic,ib-nas6220-b"
+"raidsonic,ib-nas62x0"
+"seagate,dockstar"
+"seagate,goflexnet"
+"synology,ds109"
+"synology,ds110jv10"
+"synology,ds110jv20"
+"synology,ds110jv30"
+"synology,ds111"
+"synology,ds209"
+"synology,ds210jv10"
+"synology,ds210jv20"
+"synology,ds212"
+"synology,ds212jv10"
+"synology,ds212jv20"
+"synology,ds212pv10"
+"synology,ds409"
+"synology,ds409slim"
+"synology,ds410j"
+"synology,ds411"
+"synology,ds411j"
+"synology,ds411slim"
+"synology,ds413jv10"
+"synology,rs212"
+"synology,rs409"
+"synology,rs411"
+"synology,rs812"
+"usi,topkick"
+"usi,topkick-1281P2"
+"zyxel,nsa310"
+"zyxel,nsa310a"
diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt
new file mode 100644 (file)
index 0000000..857f126
--- /dev/null
@@ -0,0 +1,10 @@
+Rockchip platforms device tree bindings
+---------------------------------------
+
+- bq Curie 2 tablet:
+    Required root node properties:
+      - compatible = "mundoreader,bq-curie2", "rockchip,rk3066a";
+
+- Radxa Rock board:
+    Required root node properties:
+      - compatible = "radxa,rock", "rockchip,rk3188";
index 7bcfbf59810e5a5c105740c7dca63844d7791ef2..a668f0e7d0018b76841127db20845a7fd45affd6 100644 (file)
@@ -24,6 +24,7 @@ Required properties:
   * "sata-phy" for the SATA 6.0Gbps PHY
 
 Optional properties:
+- dma-coherent         : Present if dma operations are coherent
 - status               : Shall be "ok" if enabled or "disabled" if disabled.
                          Default is "ok".
 
@@ -55,6 +56,7 @@ Example:
                              <0x0 0x1f22e000 0x0 0x1000>,
                              <0x0 0x1f227000 0x0 0x1000>;
                        interrupts = <0x0 0x87 0x4>;
+                       dma-coherent;
                        status = "ok";
                        clocks = <&sataclk 0>;
                        phys = <&phy2 0>;
@@ -69,6 +71,7 @@ Example:
                              <0x0 0x1f23e000 0x0 0x1000>,
                              <0x0 0x1f237000 0x0 0x1000>;
                        interrupts = <0x0 0x88 0x4>;
+                       dma-coherent;
                        status = "ok";
                        clocks = <&sataclk 0>;
                        phys = <&phy3 0>;
index 5dfd145d3ccf673492e91eee8f9b43d94a3faee0..f72e80e0dade820adb35db2498566c487e51b40a 100644 (file)
@@ -21,8 +21,8 @@ Optional properties:
 - fixed-divider : If clocks have a fixed divider value, use this property.
 - clk-gate : For "socfpga-gate-clk", clk-gate contains the gating register
         and the bit index.
-- div-reg : For "socfpga-gate-clk", div-reg contains the divider register, bit shift,
-        and width.
+- div-reg : For "socfpga-gate-clk" and "socfpga-periph-clock", div-reg contains
+       the divider register, bit shift, and width.
 - clk-phase : For the sdmmc_clk, contains the value of the clock phase that controls
        the SDMMC CIU clock. The first value is the clk_sample(smpsel), and the second
        value is the cclk_in_drv(drvsel). The clk-phase is used to enable the correct
index cd5e23912888cf4350750fe0adc908fb895e3d08..b3d544ca522a5465755846f6f59e19c2f8cc7e40 100644 (file)
@@ -6,6 +6,16 @@ This binding uses the common clock binding[1].
 
 Required properties:
 - compatible : shall be one of the following:
+       "atmel,at91sam9x5-sckc":
+               at91 SCKC (Slow Clock Controller)
+               This node contains the slow clock definitions.
+
+       "atmel,at91sam9x5-clk-slow-osc":
+               at91 slow oscillator
+
+       "atmel,at91sam9x5-clk-slow-rc-osc":
+               at91 internal slow RC oscillator
+
        "atmel,at91rm9200-pmc" or
        "atmel,at91sam9g45-pmc" or
        "atmel,at91sam9n12-pmc" or
@@ -15,8 +25,18 @@ Required properties:
                All at91 specific clocks (clocks defined below) must be child
                node of the PMC node.
 
+       "atmel,at91sam9x5-clk-slow" (under sckc node)
+       or
+       "atmel,at91sam9260-clk-slow" (under pmc node):
+               at91 slow clk
+
+       "atmel,at91rm9200-clk-main-osc"
+       "atmel,at91sam9x5-clk-main-rc-osc"
+               at91 main clk sources
+
+       "atmel,at91sam9x5-clk-main"
        "atmel,at91rm9200-clk-main":
-               at91 main oscillator
+               at91 main clock
 
        "atmel,at91rm9200-clk-master" or
        "atmel,at91sam9x5-clk-master":
@@ -54,6 +74,63 @@ Required properties:
        "atmel,at91sam9x5-clk-utmi":
                at91 utmi clock
 
+Required properties for SCKC node:
+- reg : defines the IO memory reserved for the SCKC.
+- #size-cells : shall be 0 (reg is used to encode clk id).
+- #address-cells : shall be 1 (reg is used to encode clk id).
+
+
+For example:
+       sckc: sckc@fffffe50 {
+               compatible = "atmel,sama5d3-pmc";
+               reg = <0xfffffe50 0x4>
+               #size-cells = <0>;
+               #address-cells = <1>;
+
+               /* put at91 slow clocks here */
+       };
+
+
+Required properties for internal slow RC oscillator:
+- #clock-cells : from common clock binding; shall be set to 0.
+- clock-frequency : define the internal RC oscillator frequency.
+
+Optional properties:
+- clock-accuracy : define the internal RC oscillator accuracy.
+
+For example:
+       slow_rc_osc: slow_rc_osc {
+               compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
+               clock-frequency = <32768>;
+               clock-accuracy = <50000000>;
+       };
+
+Required properties for slow oscillator:
+- #clock-cells : from common clock binding; shall be set to 0.
+- clocks : shall encode the main osc source clk sources (see atmel datasheet).
+
+Optional properties:
+- atmel,osc-bypass : boolean property. Set this when a clock signal is directly
+  provided on XIN.
+
+For example:
+       slow_osc: slow_osc {
+               compatible = "atmel,at91rm9200-clk-slow-osc";
+               #clock-cells = <0>;
+               clocks = <&slow_xtal>;
+       };
+
+Required properties for slow clock:
+- #clock-cells : from common clock binding; shall be set to 0.
+- clocks : shall encode the slow clk sources (see atmel datasheet).
+
+For example:
+       clk32k: slck {
+               compatible = "atmel,at91sam9x5-clk-slow";
+               #clock-cells = <0>;
+               clocks = <&slow_rc_osc &slow_osc>;
+       };
+
 Required properties for PMC node:
 - reg : defines the IO memory reserved for the PMC.
 - #size-cells : shall be 0 (reg is used to encode clk id).
@@ -62,7 +139,7 @@ Required properties for PMC node:
 - interrupt-controller : tell that the PMC is an interrupt controller.
 - #interrupt-cells : must be set to 1. The first cell encodes the interrupt id,
        and reflect the bit position in the PMC_ER/DR/SR registers.
-       You can use the dt macros defined in dt-bindings/clk/at91.h.
+       You can use the dt macros defined in dt-bindings/clock/at91.h.
        0 (AT91_PMC_MOSCS) -> main oscillator ready
        1 (AT91_PMC_LOCKA) -> PLL A ready
        2 (AT91_PMC_LOCKB) -> PLL B ready
@@ -85,24 +162,57 @@ For example:
                /* put at91 clocks here */
        };
 
+Required properties for main clock internal RC oscillator:
+- interrupt-parent : must reference the PMC node.
+- interrupts : shall be set to "<0>".
+- clock-frequency : define the internal RC oscillator frequency.
+
+Optional properties:
+- clock-accuracy : define the internal RC oscillator accuracy.
+
+For example:
+       main_rc_osc: main_rc_osc {
+               compatible = "atmel,at91sam9x5-clk-main-rc-osc";
+               interrupt-parent = <&pmc>;
+               interrupts = <0>;
+               clock-frequency = <12000000>;
+               clock-accuracy = <50000000>;
+       };
+
+Required properties for main clock oscillator:
+- interrupt-parent : must reference the PMC node.
+- interrupts : shall be set to "<0>".
+- #clock-cells : from common clock binding; shall be set to 0.
+- clocks : shall encode the main osc source clk sources (see atmel datasheet).
+
+Optional properties:
+- atmel,osc-bypass : boolean property. Specified if a clock signal is provided
+  on XIN.
+
+  clock signal is directly provided on XIN pin.
+
+For example:
+       main_osc: main_osc {
+               compatible = "atmel,at91rm9200-clk-main-osc";
+               interrupt-parent = <&pmc>;
+               interrupts = <0>;
+               #clock-cells = <0>;
+               clocks = <&main_xtal>;
+       };
+
 Required properties for main clock:
 - interrupt-parent : must reference the PMC node.
 - interrupts : shall be set to "<0>".
 - #clock-cells : from common clock binding; shall be set to 0.
-- clocks (optional if clock-frequency is provided) : shall be the slow clock
-       phandle. This clock is used to calculate the main clock rate if
-       "clock-frequency" is not provided.
-- clock-frequency : the main oscillator frequency.Prefer the use of
-       "clock-frequency" over automatic clock rate calculation.
+- clocks : shall encode the main clk sources (see atmel datasheet).
 
 For example:
        main: mainck {
-               compatible = "atmel,at91rm9200-clk-main";
+               compatible = "atmel,at91sam9x5-clk-main";
                interrupt-parent = <&pmc>;
                interrupts = <0>;
                #clock-cells = <0>;
-               clocks = <&ck32k>;
-               clock-frequency = <18432000>;
+               clocks = <&main_rc_osc &main_osc>;
        };
 
 Required properties for master clock:
index 71724d026ffacf0876a24c228466d38265f3eedc..bef86e57c3889d4890ddd0212867c087ac72e989 100644 (file)
@@ -13,8 +13,22 @@ ad,ad7414            SMBus/I2C Digital Temperature Sensor in 6-Pin SOT with SMBus Alert an
 ad,adm9240             ADM9240:  Complete System Hardware Monitor for uProcessor-Based Systems
 adi,adt7461            +/-1C TDM Extended Temp Range I.C
 adt7461                        +/-1C TDM Extended Temp Range I.C
+adi,adt7473            +/-1C TDM Extended Temp Range I.C
+adi,adt7475            +/-1C TDM Extended Temp Range I.C
+adi,adt7476            +/-1C TDM Extended Temp Range I.C
+adi,adt7490            +/-1C TDM Extended Temp Range I.C
 at,24c08               i2c serial eeprom  (24cxx)
+atmel,24c00            i2c serial eeprom  (24cxx)
+atmel,24c01            i2c serial eeprom  (24cxx)
 atmel,24c02            i2c serial eeprom  (24cxx)
+atmel,24c04            i2c serial eeprom  (24cxx)
+atmel,24c16            i2c serial eeprom  (24cxx)
+atmel,24c32            i2c serial eeprom  (24cxx)
+atmel,24c64            i2c serial eeprom  (24cxx)
+atmel,24c128           i2c serial eeprom  (24cxx)
+atmel,24c256           i2c serial eeprom  (24cxx)
+atmel,24c512           i2c serial eeprom  (24cxx)
+atmel,24c1024          i2c serial eeprom  (24cxx)
 atmel,at97sc3204t      i2c trusted platform module (TPM)
 capella,cm32181                CM32181: Ambient Light Sensor
 catalyst,24c32         i2c serial eeprom
@@ -46,8 +60,10 @@ maxim,ds1050         5 Bit Programmable, Pulse-Width Modulator
 maxim,max1237          Low-Power, 4-/12-Channel, 2-Wire Serial, 12-Bit ADCs
 maxim,max6625          9-Bit/12-Bit Temperature Sensors with I²C-Compatible Serial Interface
 mc,rv3029c2            Real Time Clock Module with I2C-Bus
+national,lm63          Temperature sensor with integrated fan control
 national,lm75          I2C TEMP SENSOR
 national,lm80          Serial Interface ACPI-Compatible Microprocessor System Hardware Monitor
+national,lm85          Temperature sensor with integrated fan control
 national,lm92          ±0.33°C Accurate, 12-Bit + Sign Temperature Sensor and Thermal Window Comparator with Two-Wire Interface
 nuvoton,npct501                i2c trusted platform module (TPM)
 nxp,pca9556            Octal SMBus and I2C registered interface
index 9ecd43d8792c17632d2d62669f2d7617e37ed8c4..3fc360523bc97cf0a7acabf66063932112b2c8d0 100644 (file)
@@ -10,7 +10,7 @@ The following properties are common to the Ethernet controllers:
 - max-frame-size: number, maximum transfer unit (IEEE defined MTU), rather than
   the maximum frame size (there's contradiction in ePAPR).
 - phy-mode: string, operation mode of the PHY interface; supported values are
-  "mii", "gmii", "sgmii", "tbi", "rev-mii", "rmii", "rgmii", "rgmii-id",
+  "mii", "gmii", "sgmii", "qsgmii", "tbi", "rev-mii", "rmii", "rgmii", "rgmii-id",
   "rgmii-rxid", "rgmii-txid", "rtbi", "smii", "xgmii"; this is now a de-facto
   standard property;
 - phy-connection-type: the same as "phy-mode" property but described in ePAPR;
index 636f0ac4e22388b4c8934681f7a7fc3712d30a0f..2a60cd3e8d5ddb7bdf3b2caad2bc414a3d8566e0 100644 (file)
@@ -23,5 +23,5 @@ gmac0: ethernet@ff700000 {
        interrupt-names = "macirq";
        mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
        clocks = <&emac_0_clk>;
-       clocks-names = "stmmaceth";
+       clock-names = "stmmaceth";
 };
index 80c1fb8bfbb8bd778a6682fa75d863ce51d3c0e4..a2acd2b26baf78c8aafc3948d7dc7cb012c09db5 100644 (file)
@@ -33,7 +33,7 @@ Optional properties:
 - max-frame-size: See ethernet.txt file in the same directory
 - clocks: If present, the first clock should be the GMAC main clock,
   further clocks may be specified in derived bindings.
-- clocks-names: One name for each entry in the clocks property, the
+- clock-names: One name for each entry in the clocks property, the
   first one should be "stmmaceth".
 
 Examples:
index c119debe6bab836c3189575ce2d9e1bb2cb3c369..67a5db95f189b5b1b0078e26a532670f36c9c9db 100644 (file)
@@ -119,7 +119,7 @@ Optional Properties (for HDMI pins):
 Example:
 // pin controller node
 pinctrl@35004800 {
-       compatible = "brcmbcm11351-pinctrl";
+       compatible = "brcm,bcm11351-pinctrl";
        reg = <0x35004800 0x430>;
 
        // pin configuration node
index 4bd5be0e5e7dd51eaf7cf23a92a2bf884dd264f1..26bcb18f4e609288d006eeae5bbf496730e2921f 100644 (file)
@@ -83,7 +83,7 @@ Example:
                reg             = <0xfe61f080 0x4>;
                reg-names       = "irqmux";
                interrupts      = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
-               interrupts-names = "irqmux";
+               interrupt-names = "irqmux";
                ranges          = <0 0xfe610000 0x5000>;
 
                PIO0: gpio@fe610000 {
@@ -165,7 +165,7 @@ sdhci0:sdhci@fe810000{
        interrupt-parent = <&PIO3>;
        #interrupt-cells = <2>;
        interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; /* Interrupt line via PIO3-3 */
-       interrupts-names = "card-detect";
+       interrupt-names = "card-detect";
        pinctrl-names = "default";
        pinctrl-0       = <&pinctrl_mmc>;
 };
similarity index 85%
rename from Documentation/devicetree/bindings/arm/altera/socfpga-reset.txt
rename to Documentation/devicetree/bindings/reset/socfpga-reset.txt
index ecdb57d69dbfbe90f2796be9aeea5bb6115e32aa..32c1c8bfd5dc55ea813275bf71c5b96699bf279b 100644 (file)
@@ -3,9 +3,11 @@ Altera SOCFPGA Reset Manager
 Required properties:
 - compatible : "altr,rst-mgr"
 - reg : Should contain 1 register ranges(address and length)
+- #reset-cells: 1
 
 Example:
         rstmgr@ffd05000 {
+               #reset-cells = <1>;
                compatible = "altr,rst-mgr";
                reg = <0xffd05000 0x1000>;
        };
index 1984bdfbd545c7649fccebcb1c585e5d97affaa6..3ca01336b837e7cef89358bda62e7a7d7532dc5b 100644 (file)
@@ -1,7 +1,7 @@
 * Energymicro efm32 UART
 
 Required properties:
-- compatible : Should be "efm32,uart"
+- compatible : Should be "energymicro,efm32-uart"
 - reg : Address and length of the register set
 - interrupts : Should contain uart interrupt
 
@@ -13,7 +13,7 @@ Optional properties:
 Example:
 
 uart@0x4000c400 {
-       compatible = "efm32,uart";
+       compatible = "energymicro,efm32-uart";
        reg = <0x4000c400 0x400>;
        interrupts = <15>;
        efm32,location = <0>;
index 569b26c4a81ee25e1f141329f90903dcb28ab4e4..60ca07996458576e2fcc6f85a334e13fcec5a2c7 100644 (file)
@@ -47,7 +47,7 @@ mcasp0: mcasp0@1d00000 {
        reg = <0x100000 0x3000>;
        reg-names "mpu";
        interrupts = <82>, <83>;
-       interrupts-names = "tx", "rx";
+       interrupt-names = "tx", "rx";
        op-mode = <0>;          /* MCASP_IIS_MODE */
        tdm-slots = <2>;
        serial-dir = <
index 74c66dee3e146445b5b1593670dc52473f527165..eff12be5e789cf91bb4a5d4a21bab7f7d1b7d32c 100644 (file)
@@ -13,6 +13,9 @@ Required properties:
     "ti,tlv320aic3111" - TLV320AIC3111 (stereo speaker amp, MiniDSP)
 
 - reg - <int> -  I2C slave address
+- HPVDD-supply, SPRVDD-supply, SPLVDD-supply, AVDD-supply, IOVDD-supply,
+  DVDD-supply : power supplies for the device as covered in
+  Documentation/devicetree/bindings/regulator/regulator.txt
 
 
 Optional properties:
@@ -24,9 +27,6 @@ Optional properties:
         3 or MICBIAS_AVDD - MICBIAS output is connected to AVDD
        If this node is not mentioned or if the value is unknown, then
        micbias is set to 2.0V.
-- HPVDD-supply, SPRVDD-supply, SPLVDD-supply, AVDD-supply, IOVDD-supply,
-  DVDD-supply : power supplies for the device as covered in
-  Documentation/devicetree/bindings/regulator/regulator.txt
 
 CODEC output pins:
   * HPL
index 0f01c9bf19c8fa7189387f3b1ad7a4e907c020d1..15772f36b71fa34aacc6ae73bc1d75f956769761 100644 (file)
@@ -22,6 +22,7 @@ auo   AU Optronics Corporation
 avago  Avago Technologies
 bosch  Bosch Sensortec GmbH
 brcm   Broadcom Corporation
+buffalo        Buffalo, Inc.
 calxeda        Calxeda
 capella        Capella Microsystems, Inc
 cavium Cavium, Inc.
@@ -33,15 +34,18 @@ cortina     Cortina Systems, Inc.
 crystalfontz   Crystalfontz America, Inc.
 dallas Maxim Integrated Products (formerly Dallas Semiconductor)
 davicom        DAVICOM Semiconductor, Inc.
-dlink  D-Link Systems, Inc.
 denx   Denx Software Engineering
+digi   Digi International Inc.
+dlink  D-Link Corporation
 dmo    Data Modul AG
+ebv    EBV Elektronik
 edt    Emerging Display Technologies
 emmicro        EM Microelectronic
 epfl   Ecole Polytechnique Fédérale de Lausanne
 epson  Seiko Epson Corp.
 est    ESTeem Wireless Modems
 eukrea  Eukréa Electromatique
+excito Excito
 fsl    Freescale Semiconductor
 GEFanuc        GE Fanuc Intelligent Platforms Embedded Systems, Inc.
 gef    GE Fanuc Intelligent Platforms Embedded Systems, Inc.
@@ -53,13 +57,17 @@ haoyu       Haoyu Microelectronic Co. Ltd.
 hisilicon      Hisilicon Limited.
 honeywell      Honeywell
 hp     Hewlett Packard
+i2se   I2SE GmbH
 ibm    International Business Machines (IBM)
 idt    Integrated Device Technologies, Inc.
+iom    Iomega Corporation
 img    Imagination Technologies Ltd.
 intel  Intel Corporation
 intercontrol   Inter Control Group
+isee   ISEE 2007 S.L.
 isl    Intersil
 karo   Ka-Ro electronics GmbH
+keymile        Keymile GmbH
 lacie  LaCie
 lantiq Lantiq Semiconductor
 lg     LG Corporation
@@ -70,9 +78,13 @@ maxim        Maxim Integrated Products
 microchip      Microchip Technology Inc.
 mosaixtech     Mosaix Technologies, Inc.
 moxa   Moxa
+mpl    MPL AG
+mundoreader    Mundo Reader S.L.
+mxicy  Macronix International Co., Ltd.
 national       National Semiconductor
 neonode                Neonode Inc.
 netgear        NETGEAR
+newhaven       Newhaven Display International
 nintendo       Nintendo
 nokia  Nokia
 nvidia NVIDIA
@@ -82,10 +94,13 @@ opencores   OpenCores.org
 panasonic      Panasonic Corporation
 phytec PHYTEC Messtechnik GmbH
 picochip       Picochip Ltd
+plathome       Plat'Home Co., Ltd.
 powervr        PowerVR (deprecated, use img)
 qca    Qualcomm Atheros, Inc.
 qcom   Qualcomm Technologies, Inc
 qnap   QNAP Systems, Inc.
+radxa  Radxa
+raidsonic      RaidSonic Technology GmbH
 ralink Mediatek/Ralink Technology Corp.
 ramtron        Ramtron International
 realtek Realtek Semiconductor Corp.
@@ -95,6 +110,7 @@ rockchip     Fuzhou Rockchip Electronics Co., Ltd
 samsung        Samsung Semiconductor
 sbs    Smart Battery System
 schindler      Schindler
+seagate        Seagate Technology PLC
 sil    Silicon Image
 silabs Silicon Laboratories
 simtek
@@ -109,8 +125,10 @@ stericsson ST-Ericsson
 synology       Synology, Inc.
 ti     Texas Instruments
 tlm    Trusted Logic Mobility
+toradex        Toradex AG
 toshiba        Toshiba Corporation
 toumaz Toumaz
+usi    Universal Scientifc Industrial Co., Ltd.
 v3     V3 Semiconductor
 via    VIA Technologies, Inc.
 voipac Voipac Technologies s.r.o.
@@ -119,3 +137,4 @@ wlf Wolfson Microelectronics
 wm     Wondermedia Technologies, Inc.
 xes    Extreme Engineering Solutions (X-ES)
 xlnx   Xilinx
+zyxel  ZyXEL Communications Corp.
index 0091a8215ac150736346a669b5c822d70e5d02db..b61885c35ce11db98f6266342aec174f81dd0144 100644 (file)
@@ -315,7 +315,7 @@ Andrew Morton が Linux-kernel メーリングリストにカーネルリリー
 もし、3.x.y カーネルが存在しない場合には、番号が一番大きい 3.x が
 最新の安定版カーネルです。
 
-3.x.y は "stable" チーム <stable@kernel.org> でメンテされており、必
+3.x.y は "stable" チーム <stable@vger.kernel.org> でメンテされており、必
 要に応じてリリースされます。通常のリリース期間は 2週間毎ですが、差し迫っ
 た問題がなければもう少し長くなることもあります。セキュリティ関連の問題
 の場合はこれに対してだいたいの場合、すぐにリリースがされます。
index 14265837c4ce346a3424212c4ab8a3181b39b499..9dbda9b5d21ed4e5f7b68846a1fb0f33e9982dba 100644 (file)
@@ -50,16 +50,16 @@ linux-2.6.29/Documentation/stable_kernel_rules.txt
 
 -stable ツリーにパッチを送付する手続き-
 
- - 上記の規則に従っているかを確認した後に、stable@kernel.org にパッチ
+ - 上記の規則に従っているかを確認した後に、stable@vger.kernel.org にパッチ
    を送る。
  - 送信者はパッチがキューに受け付けられた際には ACK を、却下された場合
    には NAK を受け取る。この反応は開発者たちのスケジュールによって、数
    日かかる場合がある。
  - もし受け取られたら、パッチは他の開発者たちと関連するサブシステムの
    メンテナーによるレビューのために -stable キューに追加される。
- - パッチに stable@kernel.org のアドレスが付加されているときには、それ
+ - パッチに stable@vger.kernel.org のアドレスが付加されているときには、それ
    が Linus のツリーに入る時に自動的に stable チームに email される。
- - セキュリティパッチはこのエイリアス (stable@kernel.org) に送られるべ
+ - セキュリティパッチはこのエイリアス (stable@vger.kernel.org) に送られるべ
    きではなく、代わりに security@kernel.org のアドレスに送られる。
 
 レビューサイクル-
index 03e50b4883a8e982dbe1ebe919a42f85b4755025..43842177b771d72e67e90361f79b28966435787f 100644 (file)
@@ -804,13 +804,6 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
        dhash_entries=  [KNL]
                        Set number of hash buckets for dentry cache.
 
-       digi=           [HW,SERIAL]
-                       IO parameters + enable/disable command.
-
-       digiepca=       [HW,SERIAL]
-                       See drivers/char/README.epca and
-                       Documentation/serial/digiepca.txt.
-
        disable=        [IPV6]
                        See Documentation/networking/ipv6.txt.
 
@@ -2939,9 +2932,6 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
        rhash_entries=  [KNL,NET]
                        Set number of hash buckets for route cache
 
-       riscom8=        [HW,SERIAL]
-                       Format: <io_board1>[,<io_board2>[,...<io_boardN>]]
-
        ro              [KNL] Mount root device read-only on boot
 
        root=           [KNL] Root filesystem
@@ -3083,9 +3073,6 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
        sonypi.*=       [HW] Sony Programmable I/O Control Device driver
                        See Documentation/laptops/sonypi.txt
 
-       specialix=      [HW,SERIAL] Specialix multi-serial port adapter
-                       See Documentation/serial/specialix.txt.
-
        spia_io_base=   [HW,MTD]
        spia_fio_base=
        spia_pedr=
index 76d80a64bbe1dd301e4c32f67b24c9bde5e0e07b..4c8e142db2ef99feedc54a64a5de5890e7941b78 100644 (file)
@@ -63,8 +63,6 @@ Magic Name            Number      Structure            File
 PG_MAGIC              'P'         pg_{read,write}_hdr include/linux/pg.h
 CMAGIC                0x0111      user              include/linux/a.out.h
 MKISS_DRIVER_MAGIC    0x04bf      mkiss_channel     drivers/net/mkiss.h
-RISCOM8_MAGIC         0x0907      riscom_port       drivers/char/riscom8.h
-SPECIALIX_MAGIC       0x0907      specialix_port    drivers/char/specialix_io8.h
 HDLC_MAGIC            0x239e      n_hdlc            drivers/char/n_hdlc.c
 APM_BIOS_MAGIC        0x4101      apm_user          arch/x86/kernel/apm_32.c
 CYCLADES_MAGIC        0x4359      cyclades_port     include/linux/cyclades.h
@@ -82,7 +80,6 @@ STRIP_MAGIC           0x5303      strip             drivers/net/strip.c
 X25_ASY_MAGIC         0x5303      x25_asy           drivers/net/x25_asy.h
 SIXPACK_MAGIC         0x5304      sixpack           drivers/net/hamradio/6pack.h
 AX25_MAGIC            0x5316      ax_disp           drivers/net/mkiss.h
-ESP_MAGIC             0x53ee      esp_struct        drivers/char/esp.h
 TTY_MAGIC             0x5401      tty_struct        include/linux/tty.h
 MGSL_MAGIC            0x5401      mgsl_info         drivers/char/synclink.c
 TTY_DRIVER_MAGIC      0x5402      tty_driver        include/linux/tty_driver.h
@@ -94,13 +91,10 @@ USB_BLUETOOTH_MAGIC   0x6d02      usb_bluetooth     drivers/usb/class/bluetty.c
 RFCOMM_TTY_MAGIC      0x6d02                        net/bluetooth/rfcomm/tty.c
 USB_SERIAL_PORT_MAGIC 0x7301      usb_serial_port   drivers/usb/serial/usb-serial.h
 CG_MAGIC              0x00090255  ufs_cylinder_group include/linux/ufs_fs.h
-A2232_MAGIC           0x000a2232  gs_port           drivers/char/ser_a2232.h
 RPORT_MAGIC           0x00525001  r_port            drivers/char/rocket_int.h
 LSEMAGIC              0x05091998  lse               drivers/fc4/fc.c
 GDTIOCTL_MAGIC        0x06030f07  gdth_iowr_str     drivers/scsi/gdth_ioctl.h
 RIEBL_MAGIC           0x09051990                    drivers/net/atarilance.c
-RIO_MAGIC             0x12345678  gs_port           drivers/char/rio/rio_linux.c
-SX_MAGIC              0x12345678  gs_port           drivers/char/sx.h
 NBD_REQUEST_MAGIC     0x12560953  nbd_request       include/linux/nbd.h
 RED_MAGIC2            0x170fc2a5  (any)             mm/slab.c
 BAYCOM_MAGIC          0x19730510  baycom_state      drivers/net/baycom_epp.c
@@ -116,7 +110,6 @@ ISDN_ASYNC_MAGIC      0x49344C01  modem_info        include/linux/isdn.h
 CTC_ASYNC_MAGIC       0x49344C01  ctc_tty_info      drivers/s390/net/ctctty.c
 ISDN_NET_MAGIC        0x49344C02  isdn_net_local_s  drivers/isdn/i4l/isdn_net_lib.h
 SAVEKMSG_MAGIC2       0x4B4D5347  savekmsg          arch/*/amiga/config.c
-STLI_BOARDMAGIC       0x4bc6c825  stlibrd           include/linux/istallion.h
 CS_STATE_MAGIC        0x4c4f4749  cs_state          sound/oss/cs46xx.c
 SLAB_C_MAGIC          0x4f17a36d  kmem_cache        mm/slab.c
 COW_MAGIC             0x4f4f4f4d  cow_header_v1     arch/um/drivers/ubd_user.c
@@ -127,10 +120,8 @@ SCC_MAGIC             0x52696368  gs_port           drivers/char/scc.h
 SAVEKMSG_MAGIC1       0x53415645  savekmsg          arch/*/amiga/config.c
 GDA_MAGIC             0x58464552  gda               arch/mips/include/asm/sn/gda.h
 RED_MAGIC1            0x5a2cf071  (any)             mm/slab.c
-STL_PORTMAGIC         0x5a7182c9  stlport           include/linux/stallion.h
 EEPROM_MAGIC_VALUE    0x5ab478d2  lanai_dev         drivers/atm/lanai.c
 HDLCDRV_MAGIC         0x5ac6e778  hdlcdrv_state     include/linux/hdlcdrv.h
-EPCA_MAGIC            0x5c6df104  channel           include/linux/epca.h
 PCXX_MAGIC            0x5c6df104  channel           drivers/char/pcxx.h
 KV_MAGIC              0x5f4b565f  kernel_vars_s     arch/mips/include/asm/sn/klkernvars.h
 I810_STATE_MAGIC      0x63657373  i810_state        sound/oss/i810_audio.c
@@ -142,17 +133,14 @@ SLOT_MAGIC            0x67267322  slot              drivers/hotplug/acpiphp.h
 LO_MAGIC              0x68797548  nbd_device        include/linux/nbd.h
 OPROFILE_MAGIC        0x6f70726f  super_block       drivers/oprofile/oprofilefs.h
 M3_STATE_MAGIC        0x734d724d  m3_state          sound/oss/maestro3.c
-STL_PANELMAGIC        0x7ef621a1  stlpanel          include/linux/stallion.h
 VMALLOC_MAGIC         0x87654320  snd_alloc_track   sound/core/memory.c
 KMALLOC_MAGIC         0x87654321  snd_alloc_track   sound/core/memory.c
 PWC_MAGIC             0x89DC10AB  pwc_device        drivers/usb/media/pwc.h
 NBD_REPLY_MAGIC       0x96744668  nbd_reply         include/linux/nbd.h
-STL_BOARDMAGIC        0xa2267f52  stlbrd            include/linux/stallion.h
 ENI155_MAGIC          0xa54b872d  midway_eprom     drivers/atm/eni.h
 SCI_MAGIC             0xbabeface  gs_port           drivers/char/sh-sci.h
 CODA_MAGIC            0xC0DAC0DA  coda_file_info    fs/coda/coda_fs_i.h
 DPMEM_MAGIC           0xc0ffee11  gdt_pci_sram      drivers/scsi/gdth.h
-STLI_PORTMAGIC        0xe671c7a1  stliport          include/linux/istallion.h
 YAM_MAGIC             0xF10A7654  yam_port          drivers/net/hamradio/yam.c
 CCB_MAGIC             0xf2691ad2  ccb               drivers/scsi/ncr53c8xx.c
 QUEUE_MAGIC_FREE      0xf7e1c9a3  queue_entry       drivers/scsi/arm/queue.c
index f9c6b5ed03e7f0809b7ebe2558474ce394c523e5..8021a9f29fc59abf4bae0a7a4c162a77233e5b7f 100644 (file)
@@ -2,23 +2,15 @@
        - this file.
 README.cycladesZ
        - info on Cyclades-Z firmware loading.
-digiepca.txt
-       - info on Digi Intl. {PC,PCI,EISA}Xx and Xem series cards.
 driver
        - intro to the low level serial driver.
 moxa-smartio
        - file with info on installing/using Moxa multiport serial driver.
 n_gsm.txt
        - GSM 0710 tty multiplexer howto.
-riscom8.txt
-       - notes on using the RISCom/8 multi-port serial driver.
 rocket.txt
        - info on the Comtrol RocketPort multiport serial driver.
 serial-rs485.txt
        - info about RS485 structures and support in the kernel.
-specialix.txt
-       - info on hardware/driver for specialix IO8+ multiport serial card.
-sx.txt
-       - info on the Specialix SX/SI multiport serial driver.
 tty.txt
        - guide to the locking policies of the tty layer.
diff --git a/Documentation/serial/digiepca.txt b/Documentation/serial/digiepca.txt
deleted file mode 100644 (file)
index f2560e2..0000000
+++ /dev/null
@@ -1,98 +0,0 @@
-NOTE:  This driver is obsolete.  Digi provides a 2.6 driver (dgdm) at
-http://www.digi.com for PCI cards.  They no longer maintain this driver,
-and have no 2.6 driver for ISA cards.
-
-This driver requires a number of user-space tools.  They can be acquired from
-http://www.digi.com, but only works with 2.4 kernels.
-
-
-The Digi Intl. epca driver. 
-----------------------------
-The Digi Intl. epca driver for Linux supports the following boards:
-
-Digi PC/Xem, PC/Xr, PC/Xe, PC/Xi, PC/Xeve 
-Digi EISA/Xem, PCI/Xem, PCI/Xr 
-
-Limitations:
-------------
-Currently the driver only autoprobes for supported PCI boards. 
-
-The Linux MAKEDEV command does not support generating the Digiboard
-Devices.  Users executing digiConfig to setup EISA and PC series cards
-will have their device nodes automatically constructed (cud?? for ~CLOCAL,
-and ttyD?? for CLOCAL).  Users wishing to boot their board from the LILO
-prompt, or those users booting PCI cards may use buildDIGI to construct 
-the necessary nodes. 
-
-Notes:
-------
-This driver may be configured via LILO.  For users who have already configured
-their driver using digiConfig, configuring from LILO will override previous 
-settings.  Multiple boards may be configured by issuing multiple LILO command 
-lines.  For examples see the bottom of this document.
-
-Device names start at 0 and continue up.  Beware of this as previous Digi 
-drivers started device names with 1.
-
-PCI boards are auto-detected and configured by the driver.  PCI boards will
-be allocated device numbers (internally) beginning with the lowest PCI slot
-first.  In other words a PCI card in slot 3 will always have higher device
-nodes than a PCI card in slot 1. 
-
-LILO config examples:
----------------------
-Using LILO's APPEND command, a string of comma separated identifiers or 
-integers can be used to configure supported boards.  The six values in order 
-are:
-
-   Enable/Disable this card or Override,
-   Type of card: PC/Xe (AccelePort) (0), PC/Xeve (1), PC/Xem or PC/Xr (2), 
-                 EISA/Xem (3), PC/64Xe (4), PC/Xi (5), 
-   Enable/Disable alternate pin arrangement,
-   Number of ports on this card,
-   I/O Port where card is configured (in HEX if using string identifiers),
-   Base of memory window (in HEX if using string identifiers), 
-
-NOTE : PCI boards are auto-detected and configured.  Do not attempt to 
-configure PCI boards with the LILO append command.  If you wish to override
-previous configuration data (As set by digiConfig), but you do not wish to
-configure any specific card (Example if there are PCI cards in the system) 
-the following override command will accomplish this:
--> append="digi=2"
-
-Samples:
-   append="digiepca=E,PC/Xe,D,16,200,D0000"
-                  or
-   append="digi=1,0,0,16,512,851968"
-
-Supporting Tools:
------------------
-Supporting tools include digiDload, digiConfig, buildPCI, and ditty.  See
-drivers/char/README.epca for more details.  Note,
-this driver REQUIRES that digiDload be executed prior to it being used. 
-Failure to do this will result in an ENODEV error.
-
-Documentation:
---------------
-Complete documentation for this product may be found in the tool package. 
-
-Sources of information and support:
------------------------------------
-Digi Intl. support site for this product:
-
-->  http://www.digi.com
-
-Acknowledgments:
-----------------
-Much of this work (And even text) was derived from a similar document 
-supporting the original public domain DigiBoard driver Copyright (C)
-1994,1995 Troy De Jongh.  Many thanks to Christoph Lameter 
-(christoph@lameter.com) and Mike McLagan (mike.mclagan@linux.org) who authored 
-and contributed to the original document. 
-
-Changelog:
-----------
-10-29-04:      Update status of driver, remove dead links in document
-               James Nelson <james4765@gmail.com>
-
-2000 (?)       Original Document
diff --git a/Documentation/serial/riscom8.txt b/Documentation/serial/riscom8.txt
deleted file mode 100644 (file)
index 14f61fd..0000000
+++ /dev/null
@@ -1,36 +0,0 @@
-* NOTE - this is an unmaintained driver.  The original author cannot be located.
-
-SDL Communications is now SBS Technologies, and does not have any
-information on these ancient ISA cards on their website.
-
-James Nelson <james4765@gmail.com> - 12-12-2004
-
-       This is the README for RISCom/8 multi-port serial driver
-       (C) 1994-1996 D.Gorodchanin
-       See file LICENSE for terms and conditions.
-
-NOTE: English is not my native language. 
-      I'm sorry for any mistakes in this text.
-
-Misc. notes for RISCom/8 serial driver, in no particular order :)
-
-1) This driver can support up to 4 boards at time.
-   Use string "riscom8=0xXXX,0xXXX,0xXXX,0xXXX" at LILO prompt, for
-   setting I/O base addresses for boards. If you compile driver
-   as module use modprobe options "iobase=0xXXX iobase1=0xXXX iobase2=..."
-
-2) The driver partially supports famous 'setserial' program, you can use almost
-   any of its options, excluding port & irq settings.
-
-3) There are some misc. defines at the beginning of riscom8.c, please read the 
-   comments and try to change some of them in case of problems.
-
-4) I consider the current state of the driver as BETA.
-
-5) SDL Communications WWW page is http://www.sdlcomm.com.
-
-6) You can use the MAKEDEV program to create RISCom/8 /dev/ttyL* entries.
-
-7) Minor numbers for first board are 0-7, for second 8-15, etc.
-
-22 Apr 1996.
diff --git a/Documentation/serial/specialix.txt b/Documentation/serial/specialix.txt
deleted file mode 100644 (file)
index 6eb6f3a..0000000
+++ /dev/null
@@ -1,383 +0,0 @@
-
-      specialix.txt  -- specialix IO8+ multiport serial driver readme.
-
-
-
-      Copyright (C) 1997  Roger Wolff (R.E.Wolff@BitWizard.nl)
-
-      Specialix pays for the development and support of this driver.
-      Please DO contact io8-linux@specialix.co.uk if you require
-      support.
-
-      This driver was developed in the BitWizard linux device
-      driver service. If you require a linux device driver for your
-      product, please contact devices@BitWizard.nl for a quote.
-
-      This code is firmly based on the riscom/8 serial driver,
-      written by Dmitry Gorodchanin. The specialix IO8+ card
-      programming information was obtained from the CL-CD1865 Data
-      Book, and Specialix document number 6200059: IO8+ Hardware
-      Functional Specification, augmented by document number 6200088:
-      Merak Hardware Functional Specification. (IO8+/PCI is also 
-      called Merak)
-
-
-      This program is free software; you can redistribute it and/or
-      modify it under the terms of the GNU General Public License as
-      published by the Free Software Foundation; either version 2 of
-      the License, or (at your option) any later version.
-
-      This program is distributed in the hope that it will be
-      useful, but WITHOUT ANY WARRANTY; without even the implied
-      warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
-      PURPOSE.  See the GNU General Public License for more details.
-
-      You should have received a copy of the GNU General Public
-      License along with this program; if not, write to the Free
-      Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139,
-      USA.
-
-
-Intro
-=====
-
-This file contains some random information, that I like to have online
-instead of in a manual that can get lost. Ever misplace your Linux
-kernel sources?  And the manual of one of the boards in your computer?
-
-
-Addresses and interrupts
-========================
-
-Address dip switch settings:
-The dip switch sets bits 2-9 of the IO address. 
-
-       9 8 7 6 5 4 3 2 
-     +-----------------+
-   0 | X   X X X X X X |
-     |                 |    =   IoBase = 0x100 
-   1 |   X             |
-     +-----------------+          ------ RS232 connectors ---->
-         
-         |    |    |
-       edge connector
-         |    |    |
-         V    V    V
-
-Base address 0x100 caused a conflict in one of my computers once.  I
-haven't the foggiest why. My Specialix card is now at 0x180.  My
-other computer runs just fine with the Specialix card at 0x100....
-The card occupies 4 addresses, but actually only two are really used.
-
-The PCI version doesn't have any dip switches. The BIOS assigns
-an IO address. 
-
-The driver now still autoprobes at 0x100, 0x180, 0x250 and 0x260.  If
-that causes trouble for you, please report that. I'll remove
-autoprobing then.
-
-The driver will tell the card what IRQ to use, so you don't have to
-change any jumpers to change the IRQ. Just use a command line
-argument (irq=xx) to the insmod program to set the interrupt.
-
-The BIOS assigns the IRQ on the PCI version. You have no say in what
-IRQ to use in that case. 
-
-If your specialix cards are not at the default locations, you can use
-the kernel command line argument "specialix=io0,irq0,io1,irq1...".
-Here "io0" is the io address for the first card, and "irq0" is the
-irq line that the first card should use. And so on. 
-
-Examples. 
-
-You use the driver as a module and have three cards at 0x100, 0x250
-and 0x180. And some way or another you want them detected in that
-order. Moreover irq 12 is taken (e.g. by your PS/2 mouse).
-
-  insmod specialix.o iobase=0x100,0x250,0x180 irq=9,11,15
-
-The same three cards, but now in the kernel would require you to
-add 
-
-   specialix=0x100,9,0x250,11,0x180,15
-
-to the command line. This would become 
-
-   append="specialix=0x100,9,0x250,11,0x180,15" 
-
-in your /etc/lilo.conf file if you use lilo. 
-
-The Specialix driver is slightly odd: It allows you to have the second
-or third card detected without having a first card. This has
-advantages and disadvantages. A slot that isn't filled by an ISA card,
-might be filled if a PCI card is detected. Thus if you have an ISA
-card at 0x250 and a PCI card, you would get:
-
-sx0: specialix IO8+ Board at 0x100 not found.
-sx1: specialix IO8+ Board at 0x180 not found.
-sx2: specialix IO8+ board detected at 0x250, IRQ 12, CD1865 Rev. B.
-sx3: specialix IO8+ Board at 0x260 not found.
-sx0: specialix IO8+ board detected at 0xd800, IRQ 9, CD1865 Rev. B.
-
-This would happen if you don't give any probe hints to the driver. 
-If you would specify:
-
-   specialix=0x250,11
-
-you'd get the following messages:
-
-sx0: specialix IO8+ board detected at 0x250, IRQ 11, CD1865 Rev. B.
-sx1: specialix IO8+ board detected at 0xd800, IRQ 9, CD1865 Rev. B.
-
-ISA probing is aborted after the IO address you gave is exhausted, and
-the PCI card is now detected as the second card. The ISA card is now
-also forced to IRQ11....
-
-
-Baud rates
-==========
-
-The rev 1.2 and below boards use a CL-CD1864. These chips can only 
-do 64kbit. The rev 1.3 and newer boards use a CL-CD1865. These chips
-are officially capable of 115k2.
-
-The Specialix card uses a 25MHz crystal (in times two mode, which in
-fact is a divided by two mode). This is not enough to reach the rated
-115k2 on all ports at the same time. With this clock rate you can only
-do 37% of this rate. This means that at 115k2 on all ports you are
-going to lose characters (The chip cannot handle that many incoming
-bits at this clock rate.) (Yes, you read that correctly: there is a
-limit to the number of -=bits=- per second that the chip can handle.)
-
-If you near the "limit" you will first start to see a graceful
-degradation in that the chip cannot keep the transmitter busy at all
-times. However with a central clock this slow, you can also get it to
-miss incoming characters. The driver will print a warning message when
-you are outside the official specs. The messages usually show up in
-the file /var/log/messages .
-
-The specialix card cannot reliably do 115k2. If you use it, you have
-to do "extensive testing" (*) to verify if it actually works.
-
-When "mgetty" communicates with my modem at 115k2 it reports:
-got: +++[0d]ATQ0V1H0[0d][0d][8a]O[cb][0d][8a]
-                            ^^^^ ^^^^    ^^^^ 
-
-The three characters that have the "^^^" under them have suffered a
-bit error in the highest bit. In conclusion: I've tested it, and found
-that it simply DOESN'T work for me. I also suspect that this is also
-caused by the baud rate being just a little bit out of tune. 
-
-I upgraded the crystal to 66Mhz on one of my Specialix cards. Works
-great! Contact me for details. (Voids warranty, requires a steady hand
-and more such restrictions....)
-
-
-(*) Cirrus logic CD1864 databook, page 40.
-
-
-Cables for the Specialix IO8+
-=============================
-
-The pinout of the connectors on the IO8+ is:
-
-     pin    short    direction    long name
-            name
-    Pin 1   DCD      input        Data Carrier Detect
-    Pin 2   RXD      input        Receive
-    Pin 3   DTR/RTS  output       Data Terminal Ready/Ready To Send
-    Pin 4   GND      -            Ground
-    Pin 5   TXD      output       Transmit
-    Pin 6   CTS      input        Clear To Send
-        
-    
-             -- 6  5  4  3  2  1 --
-             |                    |
-             |                    |
-             |                    |
-             |                    |
-             +-----          -----+
-                  |__________|
-                      clip
-    
-    Front view of an RJ12 connector. Cable moves "into" the paper.
-    (the plug is ready to plug into your mouth this way...)
-
-    
-    NULL cable. I don't know who is going to use these except for
-    testing purposes, but I tested the cards with this cable. (It 
-    took quite a while to figure out, so I'm not going to delete
-    it. So there! :-)
-    
-    
-    This end goes               This end needs
-    straight into the           some twists in
-    RJ12 plug.                  the wiring.
-       IO8+ RJ12                   IO8+ RJ12
-        1  DCD       white          -
-        -             -             1 DCD
-        2  RXD       black          5 TXD
-        3  DTR/RTS   red            6 CTS
-        4  GND       green          4 GND
-        5  TXD       yellow         2 RXD
-        6  CTS       blue           3 DTR/RTS
-    
-
-    Same NULL cable, but now sorted on the second column.
-        1  DCD       white          -
-        -             -             1 DCD
-        5  TXD       yellow         2 RXD
-        6  CTS       blue           3 DTR/RTS
-        4  GND       green          4 GND
-        2  RXD       black          5 TXD
-        3  DTR/RTS   red            6 CTS
-    
-    
-    
-    This is a modem cable usable for hardware handshaking:
-        RJ12                        DB25           DB9
-        1   DCD      white          8 DCD          1 DCD
-        2   RXD      black          3 RXD          2 RXD
-        3   DTR/RTS  red            4 RTS          7 RTS
-        4   GND      green          7 GND          5 GND
-        5   TXD      yellow         2 TXD          3 TXD
-        6   CTS      blue           5 CTS          8 CTS
-                            +----   6 DSR          6 DSR
-                            +----  20 DTR          4 DTR
-
-    This is a modem cable usable for software handshaking:
-    It allows you to reset the modem using the DTR ioctls.
-    I (REW) have never tested this, "but xxxxxxxxxxxxx
-    says that it works." If you test this, please
-    tell me and I'll fill in your name on the xxx's.
-
-        RJ12                        DB25           DB9
-        1   DCD      white          8 DCD          1 DCD
-        2   RXD      black          3 RXD          2 RXD
-        3   DTR/RTS  red           20 DTR          4 DTR
-        4   GND      green          7 GND          5 GND
-        5   TXD      yellow         2 TXD          3 TXD
-        6   CTS      blue           5 CTS          8 CTS
-                            +----   6 DSR          6 DSR
-                            +----   4 RTS          7 RTS
-
-   I bought a 6 wire flat cable. It was colored as indicated.
-   Check that yours is the same before you trust me on this.
-   
-Hardware handshaking issues.
-============================
-
-The driver can be told to operate in two different ways. The default
-behaviour is specialix.sx_rtscts = 0 where the pin behaves as DTR when
-hardware handshaking is off. It behaves as the RTS hardware
-handshaking signal when hardware handshaking is selected.
-
-When you use this, you have to use the appropriate cable. The
-cable will either be compatible with hardware handshaking or with
-software handshaking. So switching on the fly is not really an
-option.
-
-I actually prefer to use the "specialix.sx_rtscts=1" option.
-This makes the DTR/RTS pin always an RTS pin, and ioctls to
-change DTR are always ignored. I have a cable that is configured
-for this. 
-
-
-Ports and devices
-=================
-
-Port 0 is the one furthest from the card-edge connector.
-
-Devices:
-
-You should make the devices as follows:
-
-bash
-cd /dev
-for i in  0  1  2  3  4  5  6  7  8  9 10 11 12 13 14 15 \
-         16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
-do
-  echo -n "$i "
-  mknod /dev/ttyW$i c 75 $i
-  mknod /dev/cuw$i c 76 $i
-done
-echo ""
-
-If your system doesn't come with these devices preinstalled, bug your
-linux-vendor about this. They have had ample time to get this
-implemented by now.
-
-You cannot have more than 4 boards in one computer. The card only
-supports 4 different interrupts. If you really want this, contact me
-about this and I'll give you a few tips (requires soldering iron)....
-
-If you have enough PCI slots, you can probably use more than 4 PCI
-versions of the card though.... 
-
-The PCI version of the card cannot adhere to the mechanical part of
-the PCI spec because the 8 serial connectors are simply too large. If
-it doesn't fit in your computer, bring back the card.
-
-
-------------------------------------------------------------------------
-
-
-  Fixed bugs and restrictions:
-       - During initialization, interrupts are blindly turned on.
-            Having a shadow variable would cause an extra memory
-            access on every IO instruction. 
-       - The interrupt (on the card) should be disabled when we
-         don't allocate the Linux end of the interrupt. This allows 
-         a different driver/card to use it while all ports are not in
-         use..... (a la standard serial port)
-       == An extra _off variant of the sx_in and sx_out macros are
-          now available. They don't set the interrupt enable bit.
-          These are used during initialization. Normal operation uses
-          the old variant which enables the interrupt line.
-       - RTS/DTR issue needs to be implemented according to 
-         specialix' spec.
-            I kind of like the "determinism" of the current 
-            implementation. Compile time flag?
-       == Ok. Compile time flag! Default is how Specialix likes it.
-       == Now a config time flag! Gets saved in your config file. Neat!
-       - Can you set the IO address from the lilo command line?
-            If you need this, bug me about it, I'll make it. 
-       == Hah! No bugging needed. Fixed! :-)
-       - Cirrus logic hasn't gotten back to me yet why the CD1865 can
-            and the CD1864 can't do 115k2. I suspect that this is
-            because the CD1864 is not rated for 33MHz operation.
-            Therefore the CD1864 versions of the card can't do 115k2 on 
-            all ports just like the CD1865 versions. The driver does
-            not block 115k2 on CD1864 cards. 
-        == I called the Cirrus Logic representative here in Holland.
-           The CD1864 databook is identical to the CD1865 databook, 
-           except for an extra warning at the end. Similar Bit errors
-           have been observed in testing at 115k2 on both an 1865 and
-           a 1864 chip. I see no reason why I would prohibit 115k2 on
-           1864 chips and not do it on 1865 chips. Actually there is
-           reason to prohibit it on BOTH chips. I print a warning.
-           If you use 115k2, you're on your own. 
-       - A spiky CD may send spurious HUPs. Also in CLOCAL???
-         -- A fix for this turned out to be counter productive. 
-            Different fix? Current behaviour is acceptable?
-         -- Maybe the current implementation is correct. If anybody
-            gets bitten by this, please report, and it will get fixed.
-
-         -- Testing revealed that when in CLOCAL, the problem doesn't
-            occur. As warned for in the CD1865 manual, the chip may
-            send modem intr's on a spike. We could filter those out,
-            but that would be a cludge anyway (You'd still risk getting
-            a spurious HUP when two spikes occur.).....
-
-
-  Bugs & restrictions:
-       - This is a difficult card to autoprobe.
-            You have to WRITE to the address register to even 
-            read-probe a CD186x register. Disable autodetection?
-         -- Specialix: any suggestions?
-
-
diff --git a/Documentation/serial/sx.txt b/Documentation/serial/sx.txt
deleted file mode 100644 (file)
index cb4efa0..0000000
+++ /dev/null
@@ -1,294 +0,0 @@
-
-      sx.txt  -- specialix SX/SI multiport serial driver readme.
-
-
-
-      Copyright (C) 1997  Roger Wolff (R.E.Wolff@BitWizard.nl)
-
-      Specialix pays for the development and support of this driver.
-      Please DO contact support@specialix.co.uk if you require
-      support.
-
-      This driver was developed in the BitWizard linux device
-      driver service. If you require a linux device driver for your
-      product, please contact devices@BitWizard.nl for a quote.
-
-      (History)
-      There used to be an SI driver by Simon Allan. This is a complete 
-      rewrite  from scratch. Just a few lines-of-code have been snatched.
-
-      (Sources)
-      Specialix document number 6210028: SX Host Card and Download Code
-      Software Functional Specification.
-
-      (Copying)
-      This program is free software; you can redistribute it and/or
-      modify it under the terms of the GNU General Public License as
-      published by the Free Software Foundation; either version 2 of
-      the License, or (at your option) any later version.
-
-      This program is distributed in the hope that it will be
-      useful, but WITHOUT ANY WARRANTY; without even the implied
-      warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
-      PURPOSE.  See the GNU General Public License for more details.
-
-      You should have received a copy of the GNU General Public
-      License along with this program; if not, write to the Free
-      Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139,
-      USA.
-      
-      (Addendum)
-      I'd appreciate it that if you have fixes, that you send them
-      to me first. 
-
-
-Introduction
-============
-
-This file contains some random information, that I like to have online
-instead of in a manual that can get lost. Ever misplace your Linux
-kernel sources?  And the manual of one of the boards in your computer?
-
-
-Theory of operation
-===================
-
-An important thing to know is that the driver itself doesn't have the
-firmware for the card. This means that you need the separate package
-"sx_firmware". For now you can get the source at
-
-       ftp://ftp.bitwizard.nl/specialix/sx_firmware_<version>.tgz
-
-The firmware load needs a "misc" device, so you'll need to enable the
-"Support for user misc device modules" in your kernel configuration.
-The misc device needs to be called "/dev/specialix_sxctl". It needs
-misc major 10, and minor number 167 (assigned by HPA). The section
-on creating device files below also creates this device. 
-
-After loading the sx.o module into your kernel, the driver will report
-the number of cards detected, but because it doesn't have any
-firmware, it will not be able to determine the number of ports. Only
-when you then run "sx_firmware" will the firmware be downloaded and
-the rest of the driver initialized. At that time the sx_firmware
-program will report the number of ports installed.
-
-In contrast with many other multi port serial cards, some of the data
-structures are only allocated when the card knows the number of ports
-that are connected. This means we won't waste memory for 120 port
-descriptor structures when you only have 8 ports. If you experience
-problems due to this, please report them: I haven't seen any.
-
-
-Interrupts
-==========
-
-A multi port serial card, would generate a horrendous amount of
-interrupts if it would interrupt the CPU for every received
-character. Even more than 10 years ago, the trick not to use
-interrupts but to poll the serial cards was invented.
-
-The SX card allow us to do this two ways. First the card limits its
-own interrupt rate to a rate that won't overwhelm the CPU. Secondly,
-we could forget about the cards interrupt completely and use the
-internal timer for this purpose.
-
-Polling the card can take up to a few percent of your CPU. Using the
-interrupts would be better if you have most of the ports idle. Using
-timer-based polling is better if your card almost always has work to
-do. You save the separate interrupt in that case.
-
-In any case, it doesn't really matter all that much. 
-
-The most common problem with interrupts is that for ISA cards in a PCI
-system the BIOS has to be told to configure that interrupt as "legacy
-ISA". Otherwise the card can pull on the interrupt line all it wants
-but the CPU won't see this.
-
-If you can't get the interrupt to work, remember that polling mode is
-more efficient (provided you actually use the card intensively).
-
-
-Allowed Configurations
-======================
-
-Some configurations are disallowed. Even though at a glance they might
-seem to work, they are known to lockup the bus between the host card
-and the device concentrators. You should respect the drivers decision
-not to support certain configurations. It's there for a reason.
-
-Warning: Seriously technical stuff ahead. Executive summary: Don't use
-SX cards except configured at a 64k boundary. Skip the next paragraph.
-
-The SX cards can theoretically be placed at a 32k boundary. So for
-instance you can put an SX card at 0xc8000-0xd7fff. This is not a
-"recommended configuration". ISA cards have to tell the bus controller
-how they like their timing. Due to timing issues they have to do this
-based on which 64k window the address falls into. This means that the
-32k window below and above the SX card have to use exactly the same
-timing as the SX card. That reportedly works for other SX cards. But
-you're still left with two useless 32k windows that should not be used
-by anybody else.
-
-
-Configuring the driver
-======================
-
-PCI cards are always detected. The driver auto-probes for ISA cards at
-some sensible addresses. Please report if the auto-probe causes trouble
-in your system, or when a card isn't detected.
-
-I'm afraid I haven't implemented "kernel command line parameters" yet.
-This means that if the default doesn't work for you, you shouldn't use
-the compiled-into-the-kernel version of the driver. Use a module
-instead.  If you convince me that you need this, I'll make it for
-you. Deal?
-
-I'm afraid that the module parameters are a bit clumsy. If you have a
-better idea, please tell me.
-
-You can specify several parameters:
-
-       sx_poll: number of jiffies between timer-based polls.
-
-               Set this to "0" to disable timer based polls. 
-                Initialization of cards without a working interrupt
-                will fail.
-
-               Set this to "1" if you want a polling driver. 
-               (on Intel: 100 polls per second). If you don't use
-                fast baud rates, you might consider a value like "5". 
-                (If you don't know how to do the math, use 1).
-
-       sx_slowpoll: Number of jiffies between timer-based polls. 
-               Set this to "100" to poll once a second. 
-               This should get the card out of a stall if the driver
-                ever misses an interrupt. I've never seen this happen,
-                and if it does, that's a bug. Tell me. 
-
-       sx_maxints: Number of interrupts to request from the card. 
-               The card normally limits interrupts to about 100 per
-               second to offload the host CPU. You can increase this
-               number to reduce latency on the card a little.
-               Note that if you give a very high number you can overload
-               your CPU as well as the CPU on the host card. This setting 
-               is inaccurate and not recommended for SI cards (But it 
-               works). 
-
-       sx_irqmask: The mask of allowable IRQs to use. I suggest you set 
-               this to 0 (disable IRQs all together) and use polling if 
-               the assignment of IRQs becomes problematic. This is defined
-               as the sum of (1 << irq) 's that you want to allow. So 
-               sx_irqmask of 8 (1 << 3) specifies that only irq 3 may
-               be used by the SX driver. If you want to specify to the 
-               driver: "Either irq 11 or 12 is ok for you to use", then
-               specify (1 << 11) | (1 << 12) = 0x1800 . 
-
-       sx_debug: You can enable different sorts of debug traces with this. 
-               At "-1" all debugging traces are active. You'll get several
-               times more debugging output than you'll get characters 
-               transmitted. 
-
-
-Baud rates
-==========
-
-Theoretically new SXDCs should be capable of more than 460k
-baud. However the line drivers usually give up before that.  Also the
-CPU on the card may not be able to handle 8 channels going at full
-blast at that speed. Moreover, the buffers are not large enough to
-allow operation with 100 interrupts per second. You'll have to realize
-that the card has a 256 byte buffer, so you'll have to increase the
-number of interrupts per second if you have more than 256*100 bytes
-per second to transmit.  If you do any performance testing in this
-area, I'd be glad to hear from you...
-
-(Psst Linux users..... I think the Linux driver is more efficient than
-the driver for other OSes. If you can and want to benchmark them
-against each other, be my guest, and report your findings...... :-)
-
-
-Ports and devices
-=================
-
-Port 0 is the top connector on the module closest to the host
-card. Oh, the ports on the SXDCs and TAs are labelled from 1 to 8
-instead of from 0 to 7, as they are numbered by linux. I'm stubborn in
-this: I know for sure that I wouldn't be able to calculate which port
-is which anymore if I would change that....
-
-
-Devices:
-
-You should make the device files as follows:
-
-#!/bin/sh
-# (I recommend that you cut-and-paste this into a file and run that)
-cd /dev
-t=0
-mknod specialix_sxctl c 10 167
-while [ $t -lt 64 ]
-  do 
-  echo -n "$t "
-  mknod ttyX$t c 32 $t
-  mknod cux$t  c 33 $t
-  t=`expr $t + 1`
-done
-echo ""
-rm /etc/psdevtab
-ps > /dev/null
-
-
-This creates 64 devices. If you have more, increase the constant on
-the line with "while". The devices start at 0, as is customary on
-Linux. Specialix seems to like starting the numbering at 1. 
-
-If your system doesn't come with these devices pre-installed, bug your
-linux-vendor about this. They should have these devices
-"pre-installed" before the new millennium. The "ps" stuff at the end
-is to "tell" ps that the new devices exist.
-
-Officially the maximum number of cards per computer is 4. This driver
-however supports as many cards in one machine as you want. You'll run
-out of interrupts after a few, but you can switch to polled operation
-then. At about 256 ports (More than 8 cards), we run out of minor
-device numbers. Sorry. I suggest you buy a second computer.... (Or
-switch to RIO).
-
-------------------------------------------------------------------------
-
-
-  Fixed bugs and restrictions:
-       - Hangup processing.  
-         -- Done.
-
-       - the write path in generic_serial (lockup / oops). 
-         -- Done (Ugly: not the way I want it. Copied from serial.c).
-
-        - write buffer isn't flushed at close.
-         -- Done. I still seem to lose a few chars at close. 
-            Sorry. I think that this is a firmware issue. (-> Specialix)
-
-       - drain hardware before  changing termios
-       - Change debug on the fly. 
-       - ISA free irq -1. (no firmware loaded).
-       - adding c8000 as a probe address. Added warning. 
-       - Add a RAMtest for the RAM on the card.c
-        - Crash when opening a port "way" of the number of allowed ports. 
-          (for example opening port 60 when there are only 24 ports attached)
-       - Sometimes the use-count strays a bit. After a few hours of
-          testing the use count is sometimes "3". If you are not like
-          me and can remember what you did to get it that way, I'd
-          appreciate an Email. Possibly fixed. Tell me if anyone still
-          sees this.
-       - TAs don't work right if you don't connect all the modem control
-         signals. SXDCs do. T225 firmware problem -> Specialix. 
-         (Mostly fixed now, I think. Tell me if you encounter this!)
-
-  Bugs & restrictions:
-
-       - Arbitrary baud rates. Requires firmware update. (-> Specialix)
-
-       - Low latency (mostly firmware, -> Specialix)
-
-
-
index b0714d8f678ac51d0c280a4f5f2980196052421f..cbc2f03056bdef25da9dc87013680748c905e9d0 100644 (file)
@@ -39,7 +39,7 @@ Procedure for submitting patches to the -stable tree:
    the stable tree without anything else needing to be done by the author
    or subsystem maintainer.
  - If the patch requires other patches as prerequisites which can be
-   cherry-picked than this can be specified in the following format in
+   cherry-picked, then this can be specified in the following format in
    the sign-off area:
 
      Cc: <stable@vger.kernel.org> # 3.3.x: a1f84a3: sched: Check for idle
index 4e7da654342471ef9978cf48b5cc221044b5cb2d..badb0507608fd188938eef3ee26bc9bee569a38d 100644 (file)
@@ -174,7 +174,6 @@ Components of Memory Policies
        allocation fails, the kernel will search other nodes, in order of
        increasing distance from the preferred node based on information
        provided by the platform firmware.
-       containing the cpu where the allocation takes place.
 
            Internally, the Preferred policy uses a single node--the
            preferred_node member of struct mempolicy.  When the internal
@@ -275,9 +274,9 @@ Components of Memory Policies
            For example, consider a task that is attached to a cpuset with
            mems 2-5 that sets an Interleave policy over the same set with
            MPOL_F_RELATIVE_NODES.  If the cpuset's mems change to 3-7, the
-           interleave now occurs over nodes 3,5-6.  If the cpuset's mems
+           interleave now occurs over nodes 3,5-7.  If the cpuset's mems
            then change to 0,2-3,5, then the interleave occurs over nodes
-           0,3,5.
+           0,2-3,5.
 
            Thanks to the consistent remapping, applications preparing
            nodemasks to specify memory policies using this flag should
index 6c914aa87e7138086f7522ff4fc78acba564437c..54ea24ff63c7ceeba400d900362020c8324d1764 100644 (file)
@@ -237,7 +237,7 @@ kernel.org网站的pub/linux/kernel/v2.6/目录下找到它。它的开发遵循
 如果没有2.6.x.y版本内核存在,那么最新的2.6.x版本内核就相当于是当前的稳定
 版内核。
 
-2.6.x.y版本由“稳定版”小组(邮件地址<stable@kernel.org>)维护,一般隔周发
+2.6.x.y版本由“稳定版”小组(邮件地址<stable@vger.kernel.org>)维护,一般隔周发
 布新版本。
 
 内核源码中的Documentation/stable_kernel_rules.txt文件具体描述了可被稳定
diff --git a/Documentation/zh_CN/io_ordering.txt b/Documentation/zh_CN/io_ordering.txt
new file mode 100644 (file)
index 0000000..e592daf
--- /dev/null
@@ -0,0 +1,67 @@
+Chinese translated version of Documentation/io_orderings.txt
+
+If you have any comment or update to the content, please contact the
+original document maintainer directly.  However, if you have a problem
+communicating in English you can also ask the Chinese maintainer for
+help.  Contact the Chinese maintainer if this translation is outdated
+or if there is a problem with the translation.
+
+Chinese maintainer: Lin Yongting <linyongting@gmail.com>
+---------------------------------------------------------------------
+Documentation/io_ordering.txt 的中文翻译
+
+如果想评论或更新本文的内容,请直接联系原文档的维护者。如果你使用英文
+交流有困难的话,也可以向中文版维护者求助。如果本翻译更新不及时或者翻
+译存在问题,请联系中文版维护者。
+
+中文版维护者: 林永听 Lin Yongting <linyongting@gmail.com>
+中文版翻译者: 林永听 Lin Yongting <linyongting@gmail.com>
+中文版校译者: 林永听 Lin Yongting <linyongting@gmail.com>
+
+
+以下为正文
+---------------------------------------------------------------------
+
+在某些平台上,所谓的内存映射I/O是弱顺序。在这些平台上,驱动开发者有责任
+保证I/O内存映射地址的写操作按程序图意的顺序达到设备。通常读取一个“安全”
+设备寄存器或桥寄存器,触发IO芯片清刷未处理的写操作到达设备后才处理读操作,
+而达到保证目的。驱动程序通常在spinlock保护的临界区退出之前使用这种技术。
+这也可以保证后面的写操作只在前面的写操作之后到达设备(这非常类似于内存
+屏障操作,mb(),不过仅适用于I/O)。
+
+假设一个设备驱动程的具体例子:
+
+        ...
+CPU A:  spin_lock_irqsave(&dev_lock, flags)
+CPU A:  val = readl(my_status);
+CPU A:  ...
+CPU A:  writel(newval, ring_ptr);
+CPU A:  spin_unlock_irqrestore(&dev_lock, flags)
+        ...
+CPU B:  spin_lock_irqsave(&dev_lock, flags)
+CPU B:  val = readl(my_status);
+CPU B:  ...
+CPU B:  writel(newval2, ring_ptr);
+CPU B:  spin_unlock_irqrestore(&dev_lock, flags)
+        ...
+
+上述例子中,设备可能会先接收到newval2的值,然后接收到newval的值,问题就
+发生了。不过很容易通过下面方法来修复:
+
+        ...
+CPU A:  spin_lock_irqsave(&dev_lock, flags)
+CPU A:  val = readl(my_status);
+CPU A:  ...
+CPU A:  writel(newval, ring_ptr);
+CPU A:  (void)readl(safe_register); /* 配置寄存器?*/
+CPU A:  spin_unlock_irqrestore(&dev_lock, flags)
+        ...
+CPU B:  spin_lock_irqsave(&dev_lock, flags)
+CPU B:  val = readl(my_status);
+CPU B:  ...
+CPU B:  writel(newval2, ring_ptr);
+CPU B:  (void)readl(safe_register); /* 配置寄存器?*/
+CPU B:  spin_unlock_irqrestore(&dev_lock, flags)
+
+在解决方案中,读取safe_register寄存器,触发IO芯片清刷未处理的写操作,
+再处理后面的读操作,防止引发数据不一致问题。
index 2ebe539f5450a4ec1b42afa01e5e8ac21aeea287..dfb72a5c63e9ba63f09e24c2ddcd796d2aa27e08 100644 (file)
@@ -63,8 +63,6 @@ struct tty_ldisc {
 PG_MAGIC              'P'         pg_{read,write}_hdr include/linux/pg.h
 CMAGIC                0x0111      user              include/linux/a.out.h
 MKISS_DRIVER_MAGIC    0x04bf      mkiss_channel     drivers/net/mkiss.h
-RISCOM8_MAGIC         0x0907      riscom_port       drivers/char/riscom8.h
-SPECIALIX_MAGIC       0x0907      specialix_port    drivers/char/specialix_io8.h
 HDLC_MAGIC            0x239e      n_hdlc            drivers/char/n_hdlc.c
 APM_BIOS_MAGIC        0x4101      apm_user          arch/x86/kernel/apm_32.c
 CYCLADES_MAGIC        0x4359      cyclades_port     include/linux/cyclades.h
@@ -82,7 +80,6 @@ STRIP_MAGIC           0x5303      strip             drivers/net/strip.c
 X25_ASY_MAGIC         0x5303      x25_asy           drivers/net/x25_asy.h
 SIXPACK_MAGIC         0x5304      sixpack           drivers/net/hamradio/6pack.h
 AX25_MAGIC            0x5316      ax_disp           drivers/net/mkiss.h
-ESP_MAGIC             0x53ee      esp_struct        drivers/char/esp.h
 TTY_MAGIC             0x5401      tty_struct        include/linux/tty.h
 MGSL_MAGIC            0x5401      mgsl_info         drivers/char/synclink.c
 TTY_DRIVER_MAGIC      0x5402      tty_driver        include/linux/tty_driver.h
@@ -94,13 +91,10 @@ USB_BLUETOOTH_MAGIC   0x6d02      usb_bluetooth     drivers/usb/class/bluetty.c
 RFCOMM_TTY_MAGIC      0x6d02                        net/bluetooth/rfcomm/tty.c
 USB_SERIAL_PORT_MAGIC 0x7301      usb_serial_port   drivers/usb/serial/usb-serial.h
 CG_MAGIC              0x00090255  ufs_cylinder_group include/linux/ufs_fs.h
-A2232_MAGIC           0x000a2232  gs_port           drivers/char/ser_a2232.h
 RPORT_MAGIC           0x00525001  r_port            drivers/char/rocket_int.h
 LSEMAGIC              0x05091998  lse               drivers/fc4/fc.c
 GDTIOCTL_MAGIC        0x06030f07  gdth_iowr_str     drivers/scsi/gdth_ioctl.h
 RIEBL_MAGIC           0x09051990                    drivers/net/atarilance.c
-RIO_MAGIC             0x12345678  gs_port           drivers/char/rio/rio_linux.c
-SX_MAGIC              0x12345678  gs_port           drivers/char/sx.h
 NBD_REQUEST_MAGIC     0x12560953  nbd_request       include/linux/nbd.h
 RED_MAGIC2            0x170fc2a5  (any)             mm/slab.c
 BAYCOM_MAGIC          0x19730510  baycom_state      drivers/net/baycom_epp.c
@@ -116,7 +110,6 @@ ISDN_ASYNC_MAGIC      0x49344C01  modem_info        include/linux/isdn.h
 CTC_ASYNC_MAGIC       0x49344C01  ctc_tty_info      drivers/s390/net/ctctty.c
 ISDN_NET_MAGIC        0x49344C02  isdn_net_local_s  drivers/isdn/i4l/isdn_net_lib.h
 SAVEKMSG_MAGIC2       0x4B4D5347  savekmsg          arch/*/amiga/config.c
-STLI_BOARDMAGIC       0x4bc6c825  stlibrd           include/linux/istallion.h
 CS_STATE_MAGIC        0x4c4f4749  cs_state          sound/oss/cs46xx.c
 SLAB_C_MAGIC          0x4f17a36d  kmem_cache        mm/slab.c
 COW_MAGIC             0x4f4f4f4d  cow_header_v1     arch/um/drivers/ubd_user.c
@@ -127,10 +120,8 @@ SCC_MAGIC             0x52696368  gs_port           drivers/char/scc.h
 SAVEKMSG_MAGIC1       0x53415645  savekmsg          arch/*/amiga/config.c
 GDA_MAGIC             0x58464552  gda               arch/mips/include/asm/sn/gda.h
 RED_MAGIC1            0x5a2cf071  (any)             mm/slab.c
-STL_PORTMAGIC         0x5a7182c9  stlport           include/linux/stallion.h
 EEPROM_MAGIC_VALUE    0x5ab478d2  lanai_dev         drivers/atm/lanai.c
 HDLCDRV_MAGIC         0x5ac6e778  hdlcdrv_state     include/linux/hdlcdrv.h
-EPCA_MAGIC            0x5c6df104  channel           include/linux/epca.h
 PCXX_MAGIC            0x5c6df104  channel           drivers/char/pcxx.h
 KV_MAGIC              0x5f4b565f  kernel_vars_s     arch/mips/include/asm/sn/klkernvars.h
 I810_STATE_MAGIC      0x63657373  i810_state        sound/oss/i810_audio.c
@@ -142,17 +133,14 @@ SLOT_MAGIC            0x67267322  slot              drivers/hotplug/acpiphp.h
 LO_MAGIC              0x68797548  nbd_device        include/linux/nbd.h
 OPROFILE_MAGIC        0x6f70726f  super_block       drivers/oprofile/oprofilefs.h
 M3_STATE_MAGIC        0x734d724d  m3_state          sound/oss/maestro3.c
-STL_PANELMAGIC        0x7ef621a1  stlpanel          include/linux/stallion.h
 VMALLOC_MAGIC         0x87654320  snd_alloc_track   sound/core/memory.c
 KMALLOC_MAGIC         0x87654321  snd_alloc_track   sound/core/memory.c
 PWC_MAGIC             0x89DC10AB  pwc_device        drivers/usb/media/pwc.h
 NBD_REPLY_MAGIC       0x96744668  nbd_reply         include/linux/nbd.h
-STL_BOARDMAGIC        0xa2267f52  stlbrd            include/linux/stallion.h
 ENI155_MAGIC          0xa54b872d  midway_eprom     drivers/atm/eni.h
 SCI_MAGIC             0xbabeface  gs_port           drivers/char/sh-sci.h
 CODA_MAGIC            0xC0DAC0DA  coda_file_info    include/linux/coda_fs_i.h
 DPMEM_MAGIC           0xc0ffee11  gdt_pci_sram      drivers/scsi/gdth.h
-STLI_PORTMAGIC        0xe671c7a1  stliport          include/linux/istallion.h
 YAM_MAGIC             0xF10A7654  yam_port          drivers/net/hamradio/yam.c
 CCB_MAGIC             0xf2691ad2  ccb               drivers/scsi/ncr53c8xx.c
 QUEUE_MAGIC_FREE      0xf7e1c9a3  queue_entry       drivers/scsi/arm/queue.c
index b5b9b0ab02fd5a76f1a67e8eb2de736ec7812f1e..26ea5ed7cd9c4c5363ab2b8caaf3062d403ca2e1 100644 (file)
@@ -42,7 +42,7 @@ Documentation/stable_kernel_rules.txt 的中文翻译
 
 向稳定版代码树提交补丁的过程:
 
-  - 在确认了补丁符合以上的规则后,将补丁发送到stable@kernel.org。
+  - 在确认了补丁符合以上的规则后,将补丁发送到stable@vger.kernel.org。
   - 如果补丁被接受到队列里,发送者会收到一个ACK回复,如果没有被接受,收
     到的是NAK回复。回复需要几天的时间,这取决于开发者的时间安排。
   - 被接受的补丁会被加到稳定版本队列里,等待其他开发者的审查。
index 6dc67b1fdb507016d0d0d77bf66f9875ace00f99..285e03fcfed962a86a6651ec8841a9c063088518 100644 (file)
@@ -1617,12 +1617,6 @@ S:       Supported
 F:     drivers/misc/atmel_tclib.c
 F:     drivers/clocksource/tcb_clksrc.c
 
-ATMEL TSADCC DRIVER
-M:     Josh Wu <josh.wu@atmel.com>
-L:     linux-input@vger.kernel.org
-S:     Supported
-F:     drivers/input/touchscreen/atmel_tsadcc.c
-
 ATMEL USBA UDC DRIVER
 M:     Nicolas Ferre <nicolas.ferre@atmel.com>
 L:     linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
@@ -3485,6 +3479,12 @@ S:       Maintained
 F:     drivers/extcon/
 F:     Documentation/extcon/
 
+EXYNOS DP DRIVER
+M:     Jingoo Han <jg1.han@samsung.com>
+L:     dri-devel@lists.freedesktop.org
+S:     Maintained
+F:     drivers/gpu/drm/exynos/exynos_dp*
+
 EXYNOS MIPI DISPLAY DRIVERS
 M:     Inki Dae <inki.dae@samsung.com>
 M:     Donghwa Lee <dh09.lee@samsung.com>
@@ -3550,7 +3550,7 @@ F:        include/scsi/libfcoe.h
 F:     include/uapi/scsi/fc/
 
 FILE LOCKING (flock() and fcntl()/lockf())
-M:     Jeff Layton <jlayton@redhat.com>
+M:     Jeff Layton <jlayton@poochiereds.net>
 M:     J. Bruce Fields <bfields@fieldses.org>
 L:     linux-fsdevel@vger.kernel.org
 S:     Maintained
@@ -5108,14 +5108,19 @@ F:      drivers/s390/kvm/
 
 KERNEL VIRTUAL MACHINE (KVM) FOR ARM
 M:     Christoffer Dall <christoffer.dall@linaro.org>
+M:     Marc Zyngier <marc.zyngier@arm.com>
+L:     linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 L:     kvmarm@lists.cs.columbia.edu
 W:     http://systems.cs.columbia.edu/projects/kvm-arm
 S:     Supported
 F:     arch/arm/include/uapi/asm/kvm*
 F:     arch/arm/include/asm/kvm*
 F:     arch/arm/kvm/
+F:     virt/kvm/arm/
+F:     include/kvm/arm_*
 
 KERNEL VIRTUAL MACHINE FOR ARM64 (KVM/arm64)
+M:     Christoffer Dall <christoffer.dall@linaro.org>
 M:     Marc Zyngier <marc.zyngier@arm.com>
 L:     linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 L:     kvmarm@lists.cs.columbia.edu
@@ -6782,7 +6787,7 @@ PERFORMANCE EVENTS SUBSYSTEM
 M:     Peter Zijlstra <a.p.zijlstra@chello.nl>
 M:     Paul Mackerras <paulus@samba.org>
 M:     Ingo Molnar <mingo@redhat.com>
-M:     Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
+M:     Arnaldo Carvalho de Melo <acme@kernel.org>
 L:     linux-kernel@vger.kernel.org
 T:     git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git perf/core
 S:     Supported
@@ -8315,7 +8320,7 @@ F:        include/linux/compiler.h
 
 SPEAR PLATFORM SUPPORT
 M:     Viresh Kumar <viresh.linux@gmail.com>
-M:     Shiraz Hashim <shiraz.hashim@st.com>
+M:     Shiraz Hashim <shiraz.linux.kernel@gmail.com>
 L:     spear-devel@list.st.com
 L:     linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 W:     http://www.st.com/spear
index 60ccbfe750a2641db2e43635885985b9e49318ed..28a7259e0f3b53ed0ee9242fcea45abc71c004f1 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -1,7 +1,7 @@
 VERSION = 3
 PATCHLEVEL = 15
 SUBLEVEL = 0
-EXTRAVERSION = -rc1
+EXTRAVERSION = -rc4
 NAME = Shuffling Zombie Juror
 
 # *DOCUMENTATION*
diff --git a/arch/arc/include/asm/barrier.h b/arch/arc/include/asm/barrier.h
deleted file mode 100644 (file)
index c32245c..0000000
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ASM_BARRIER_H
-#define __ASM_BARRIER_H
-
-#ifndef __ASSEMBLY__
-
-/* TODO-vineetg: Need to see what this does, don't we need sync anywhere */
-#define mb() __asm__ __volatile__ ("" : : : "memory")
-#define rmb() mb()
-#define wmb() mb()
-#define set_mb(var, value)  do { var = value; mb(); } while (0)
-#define set_wmb(var, value) do { var = value; wmb(); } while (0)
-#define read_barrier_depends()  mb()
-
-/* TODO-vineetg verify the correctness of macros here */
-#ifdef CONFIG_SMP
-#define smp_mb()        mb()
-#define smp_rmb()       rmb()
-#define smp_wmb()       wmb()
-#else
-#define smp_mb()        barrier()
-#define smp_rmb()       barrier()
-#define smp_wmb()       barrier()
-#endif
-
-#define smp_read_barrier_depends()      do { } while (0)
-
-#endif
-
-#endif
index 819dd5f7eb055ec87f082188e3d7ebb4a8b683aa..29b82adbf0b401685b269f81a22d29ffd4fd97a5 100644 (file)
@@ -614,11 +614,13 @@ resume_user_mode_begin:
 
 resume_kernel_mode:
 
-#ifdef CONFIG_PREEMPT
-
-       ; This is a must for preempt_schedule_irq()
+       ; Disable Interrupts from this point on
+       ; CONFIG_PREEMPT: This is a must for preempt_schedule_irq()
+       ; !CONFIG_PREEMPT: To ensure restore_regs is intr safe
        IRQ_DISABLE     r9
 
+#ifdef CONFIG_PREEMPT
+
        ; Can't preempt if preemption disabled
        GET_CURR_THR_INFO_FROM_SP   r10
        ld  r8, [r10, THREAD_INFO_PREEMPT_COUNT]
index ab438cb5af5570f5aae9b3215b9c73586ce80427..2bb6bcee025c69ffe9e4650c2c176f0bef09fbc3 100644 (file)
@@ -30,9 +30,9 @@ config ARM
        select HAVE_ARCH_SECCOMP_FILTER if (AEABI && !OABI_COMPAT)
        select HAVE_ARCH_TRACEHOOK
        select HAVE_BPF_JIT
+       select HAVE_CC_STACKPROTECTOR
        select HAVE_CONTEXT_TRACKING
        select HAVE_C_RECORDMCOUNT
-       select HAVE_CC_STACKPROTECTOR
        select HAVE_DEBUG_KMEMLEAK
        select HAVE_DMA_API_DEBUG
        select HAVE_DMA_ATTRS
@@ -311,6 +311,7 @@ config ARCH_MULTIPLATFORM
        select ARM_HAS_SG_CHAIN
        select ARM_PATCH_PHYS_VIRT
        select AUTO_ZRELADDR
+       select CLKSRC_OF
        select COMMON_CLK
        select GENERIC_CLOCKEVENTS
        select MULTI_IRQ_HANDLER
@@ -375,7 +376,6 @@ config ARCH_AT91
        select ARCH_REQUIRE_GPIOLIB
        select CLKDEV_LOOKUP
        select IRQ_DOMAIN
-       select NEED_MACH_GPIO_H
        select NEED_MACH_IO_H if PCCARD
        select PINCTRL
        select PINCTRL_AT91 if USE_OF
@@ -422,8 +422,8 @@ config ARCH_EFM32
        bool "Energy Micro efm32"
        depends on !MMU
        select ARCH_REQUIRE_GPIOLIB
-       select AUTO_ZRELADDR
        select ARM_NVIC
+       select AUTO_ZRELADDR
        select CLKSRC_OF
        select COMMON_CLK
        select CPU_V7M
@@ -511,8 +511,8 @@ config ARCH_IXP4XX
        bool "IXP4xx-based"
        depends on MMU
        select ARCH_HAS_DMA_SET_COHERENT_MASK
-       select ARCH_SUPPORTS_BIG_ENDIAN
        select ARCH_REQUIRE_GPIOLIB
+       select ARCH_SUPPORTS_BIG_ENDIAN
        select CLKSRC_MMIO
        select CPU_XSCALE
        select DMABOUNCE if PCI
@@ -843,6 +843,7 @@ config ARCH_EXYNOS
        select HAVE_S3C_RTC if RTC_CLASS
        select NEED_MACH_MEMORY_H
        select SPARSE_IRQ
+       select SRAM
        select USE_OF
        help
          Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
@@ -1110,9 +1111,9 @@ config ARM_NR_BANKS
        default 8
 
 config IWMMXT
-       bool "Enable iWMMXt support" if !CPU_PJ4
-       depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
-       default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4
+       bool "Enable iWMMXt support"
+       depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 || CPU_PJ4B
+       default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4 || CPU_PJ4B
        help
          Enable support for iWMMXt context switching at run time if
          running on a CPU that supports it.
@@ -1575,8 +1576,8 @@ config BIG_LITTLE
 config BL_SWITCHER
        bool "big.LITTLE switcher support"
        depends on BIG_LITTLE && MCPM && HOTPLUG_CPU
-       select CPU_PM
        select ARM_CPU_SUSPEND
+       select CPU_PM
        help
          The big.LITTLE "switcher" provides the core functionality to
          transparently handle transition between a cluster of A15's
@@ -1920,9 +1921,9 @@ config XEN
        depends on CPU_V7 && !CPU_V6
        depends on !GENERIC_ATOMIC64
        depends on MMU
+       select ARCH_DMA_ADDR_T_64BIT
        select ARM_PSCI
        select SWIOTLB_XEN
-       select ARCH_DMA_ADDR_T_64BIT
        help
          Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.
 
index 4a2fc0bf6fc913683c29bc2113b85b1f3db9bdd3..eab8ecbe69c1d271369700a9f7aac14c628685b0 100644 (file)
@@ -1030,9 +1030,9 @@ config DEBUG_UART_PHYS
        default 0x40100000 if DEBUG_PXA_UART1
        default 0x42000000 if ARCH_GEMINI
        default 0x7c0003f8 if FOOTBRIDGE
-       default 0x80230000 if DEBUG_PICOXCELL_UART
        default 0x80070000 if DEBUG_IMX23_UART
        default 0x80074000 if DEBUG_IMX28_UART
+       default 0x80230000 if DEBUG_PICOXCELL_UART
        default 0x808c0000 if ARCH_EP93XX
        default 0x90020000 if DEBUG_NSPIRE_CLASSIC_UART || DEBUG_NSPIRE_CX_UART
        default 0xb0090000 if DEBUG_VEXPRESS_UART0_CRX
@@ -1096,22 +1096,22 @@ config DEBUG_UART_VIRT
        default 0xfeb26000 if DEBUG_RK3X_UART1
        default 0xfeb30c00 if DEBUG_KEYSTONE_UART0
        default 0xfeb31000 if DEBUG_KEYSTONE_UART1
-       default 0xfec12000 if DEBUG_MVEBU_UART || DEBUG_MVEBU_UART_ALTERNATE
-       default 0xfed60000 if DEBUG_RK29_UART0
-       default 0xfed64000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2
-       default 0xfed68000 if DEBUG_RK29_UART2 || DEBUG_RK3X_UART3
        default 0xfec02000 if DEBUG_SOCFPGA_UART
+       default 0xfec12000 if DEBUG_MVEBU_UART || DEBUG_MVEBU_UART_ALTERNATE
        default 0xfec20000 if DEBUG_DAVINCI_DMx_UART0
        default 0xfed0c000 if DEBUG_DAVINCI_DA8XX_UART1
        default 0xfed0d000 if DEBUG_DAVINCI_DA8XX_UART2
        default 0xfed12000 if ARCH_KIRKWOOD
+       default 0xfed60000 if DEBUG_RK29_UART0
+       default 0xfed64000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2
+       default 0xfed68000 if DEBUG_RK29_UART2 || DEBUG_RK3X_UART3
        default 0xfedc0000 if ARCH_EP93XX
        default 0xfee003f8 if FOOTBRIDGE
        default 0xfee20000 if DEBUG_NSPIRE_CLASSIC_UART || DEBUG_NSPIRE_CX_UART
-       default 0xfef36000 if DEBUG_HIGHBANK_UART
        default 0xfee82340 if ARCH_IOP13XX
        default 0xfef00000 if ARCH_IXP4XX && !CPU_BIG_ENDIAN
        default 0xfef00003 if ARCH_IXP4XX && CPU_BIG_ENDIAN
+       default 0xfef36000 if DEBUG_HIGHBANK_UART
        default 0xfefff700 if ARCH_IOP33X
        default 0xff003000 if DEBUG_U300_UART
        default DEBUG_UART_PHYS if !MMU
index 35c146f31e46effa1b3b64cd69fd3a3b76ab38cb..e095bd265111e7293b8314020158da40b3fe3142 100644 (file)
@@ -51,10 +51,9 @@ dtb-$(CONFIG_ARCH_AT91)      += sama5d36ek.dtb
 
 dtb-$(CONFIG_ARCH_ATLAS6) += atlas6-evb.dtb
 dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
+dtb-$(CONFIG_ARCH_BCM_5301X) += bcm4708-netgear-r6250.dtb
 dtb-$(CONFIG_ARCH_BCM_MOBILE) += bcm28155-ap.dtb \
        bcm21664-garnet.dtb
-dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
-dtb-$(CONFIG_ARCH_BCM_5301X) += bcm4708-netgear-r6250.dtb
 dtb-$(CONFIG_ARCH_BERLIN) += \
        berlin2-sony-nsz-gs7.dtb        \
        berlin2cd-google-chromecast.dtb
@@ -74,6 +73,7 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
        exynos5250-smdk5250.dtb \
        exynos5250-snow.dtb \
        exynos5420-arndale-octa.dtb \
+       exynos5420-peach-pit.dtb \
        exynos5420-smdk5420.dtb \
        exynos5440-sd5v1.dtb \
        exynos5440-ssdk5440.dtb
@@ -158,10 +158,12 @@ dtb-$(CONFIG_ARCH_MXC) += \
        imx27-phytec-phycard-s-rdk.dtb \
        imx31-bug.dtb \
        imx35-eukrea-mbimxsd35-baseboard.dtb \
+       imx35-pdk.dtb \
        imx50-evk.dtb \
        imx51-apf51.dtb \
        imx51-apf51dev.dtb \
        imx51-babbage.dtb \
+       imx51-digi-connectcore-jsk.dtb \
        imx51-eukrea-mbimxsd51-baseboard.dtb \
        imx53-ard.dtb \
        imx53-m53evk.dtb \
@@ -180,6 +182,8 @@ dtb-$(CONFIG_ARCH_MXC) += \
        imx6dl-gw54xx.dtb \
        imx6dl-hummingboard.dtb \
        imx6dl-nitrogen6x.dtb \
+       imx6dl-phytec-pbab01.dtb \
+       imx6dl-riotboard.dtb \
        imx6dl-sabreauto.dtb \
        imx6dl-sabrelite.dtb \
        imx6dl-sabresd.dtb \
@@ -204,6 +208,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
        imx6q-udoo.dtb \
        imx6q-wandboard.dtb \
        imx6sl-evk.dtb \
+       vf610-colibri.dtb \
        vf610-cosmic.dtb \
        vf610-twr.dtb
 dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \
@@ -246,6 +251,7 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
        omap3-sbc-t3730.dtb \
        omap3-devkit8000.dtb \
        omap3-beagle-xm.dtb \
+       omap3-beagle-xm-ab.dtb \
        omap3-evm.dtb \
        omap3-evm-37xx.dtb \
        omap3-ldp.dtb \
@@ -294,13 +300,6 @@ dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb
 dtb-$(CONFIG_ARCH_QCOM) += qcom-msm8660-surf.dtb \
        qcom-msm8960-cdp.dtb \
        qcom-apq8074-dragonboard.dtb
-dtb-$(CONFIG_ARCH_U8500) += ste-snowball.dtb \
-       ste-hrefprev60-stuib.dtb \
-       ste-hrefprev60-tvk.dtb \
-       ste-hrefv60plus-stuib.dtb \
-       ste-hrefv60plus-tvk.dtb \
-       ste-ccu8540.dtb \
-       ste-ccu9540.dtb
 dtb-$(CONFIG_ARCH_S3C24XX) += s3c2416-smdk2416.dtb
 dtb-$(CONFIG_ARCH_S3C64XX) += s3c6410-mini6410.dtb \
        s3c6410-smdk6410.dtb
@@ -322,11 +321,13 @@ dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += emev2-kzm9d.dtb \
        sh7372-mackerel.dtb
 dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb \
        r7s72100-genmai-reference.dtb \
+       r8a7791-henninger.dtb \
        r8a7791-koelsch.dtb \
        r8a7790-lager.dtb
 dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_arria5_socdk.dtb \
        socfpga_cyclone5_socdk.dtb \
        socfpga_cyclone5_sockit.dtb \
+       socfpga_cyclone5_socrates.dtb \
        socfpga_vt.dtb
 dtb-$(CONFIG_ARCH_SPEAR13XX) += spear1310-evb.dtb \
        spear1340-evb.dtb
@@ -335,10 +336,12 @@ dtb-$(CONFIG_ARCH_SPEAR3XX)+= spear300-evb.dtb \
        spear320-evb.dtb \
        spear320-hmi.dtb
 dtb-$(CONFIG_ARCH_SPEAR6XX)+= spear600-evb.dtb
-dtb-$(CONFIG_ARCH_STI)+= stih415-b2000.dtb \
-       stih416-b2000.dtb \
+dtb-$(CONFIG_ARCH_STI)+= stih407-b2120.dtb \
+       stih415-b2000.dtb \
        stih415-b2020.dtb \
-       stih416-b2020.dtb
+       stih416-b2000.dtb \
+       stih416-b2020.dtb \
+       stih416-b2020-revE.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += \
        sun4i-a10-a1000.dtb \
        sun4i-a10-cubieboard.dtb \
@@ -348,9 +351,12 @@ dtb-$(CONFIG_ARCH_SUNXI) += \
        sun4i-a10-olinuxino-lime.dtb \
        sun4i-a10-pcduino.dtb \
        sun5i-a10s-olinuxino-micro.dtb \
+       sun5i-a10s-r7-tv-dongle.dtb \
        sun5i-a13-olinuxino.dtb \
        sun5i-a13-olinuxino-micro.dtb \
+       sun6i-a31-app4-evb1.dtb \
        sun6i-a31-colombus.dtb \
+       sun6i-a31-m9.dtb \
        sun7i-a20-cubieboard2.dtb \
        sun7i-a20-cubietruck.dtb \
        sun7i-a20-olinuxino-micro.dtb
@@ -367,11 +373,22 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
        tegra30-beaver.dtb \
        tegra30-cardhu-a02.dtb \
        tegra30-cardhu-a04.dtb \
+       tegra30-colibri-eval-v3.dtb \
        tegra114-dalmore.dtb \
+       tegra114-roth.dtb \
+       tegra114-tn7.dtb \
+       tegra124-jetson-tk1.dtb \
        tegra124-venice2.dtb
+dtb-$(CONFIG_ARCH_U300) += ste-u300.dtb
+dtb-$(CONFIG_ARCH_U8500) += ste-snowball.dtb \
+       ste-hrefprev60-stuib.dtb \
+       ste-hrefprev60-tvk.dtb \
+       ste-hrefv60plus-stuib.dtb \
+       ste-hrefv60plus-tvk.dtb \
+       ste-ccu8540.dtb \
+       ste-ccu9540.dtb
 dtb-$(CONFIG_ARCH_VERSATILE) += versatile-ab.dtb \
        versatile-pb.dtb
-dtb-$(CONFIG_ARCH_U300) += ste-u300.dtb
 dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2p-ca5s.dtb \
        vexpress-v2p-ca9.dtb \
        vexpress-v2p-ca15-tc1.dtb \
index e3f27ec317182b887961c0a58ca49f66407935d8..2e7d932887b50185e95df69513986635e1403b39 100644 (file)
 &usb {
        status = "okay";
 
-       control@44e10000 {
+       control@44e10620 {
                status = "okay";
        };
 
                dr_mode = "host";
        };
 
-       dma-controller@07402000  {
+       dma-controller@47402000  {
                status = "okay";
        };
 };
index 28ae040e7c3d90b9094afc8c6543cf4749ffe5b0..6028217ace0fab2fb2476d36980521cab3db07e3 100644 (file)
 
        am335x_evm_audio_pins: am335x_evm_audio_pins {
                pinctrl-single,pins = <
-                       0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rx_dv.mcasp1_aclkx */
-                       0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_txd3.mcasp1_fsx */
+                       0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
+                       0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
                        0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
                        0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
                >;
 &usb {
        status = "okay";
 
-       control@44e10000 {
+       control@44e10620 {
                status = "okay";
        };
 
                dr_mode = "host";
        };
 
-       dma-controller@07402000  {
+       dma-controller@47402000  {
                status = "okay";
        };
 };
index ec08f6f677c3eb4a2025a096b30e941efbd706a0..ab238850a7b21947de099158a6712dda1ce39fcb 100644 (file)
 &usb {
        status = "okay";
 
-       control@44e10000 {
+       control@44e10620 {
                status = "okay";
        };
 
                dr_mode = "host";
        };
 
-       dma-controller@07402000  {
+       dma-controller@47402000  {
                status = "okay";
        };
 };
index 7063311a58d96785dd297f89b982970a59a185bb..9f22c189f6361194a5d5705a7fae1ba19235043d 100644 (file)
                reg = <0 0 0>; /* CS0, offset 0 */
                nand-bus-width = <8>;
                ti,nand-ecc-opt = "bch8";
-               gpmc,device-nand = "true";
                gpmc,device-width = <1>;
                gpmc,sync-clk-ps = <0>;
                gpmc,cs-on-ns = <0>;
 &usb {
        status = "okay";
 
-       control@44e10000 {
+       control@44e10620 {
                status = "okay";
        };
 
                dr_mode = "host";
        };
 
-       dma-controller@07402000  {
+       dma-controller@47402000  {
                status = "okay";
        };
 };
index 9770e35f25361644ade6c8846ba5cb7571822f0c..cb6811e5ae5a9a148321d4e667dc34cde9bc9846 100644 (file)
@@ -72,7 +72,7 @@
        };
 
        /*
-        * The soc node represents the soc top level view. It is uses for IPs
+        * The soc node represents the soc top level view. It is used for IPs
         * that are not memory mapped in the MPU view or for the MPU itself.
         */
        soc {
@@ -94,8 +94,8 @@
 
        /*
         * XXX: Use a flat representation of the AM33XX interconnect.
-        * The real AM33XX interconnect network is quite complex.Since
-        * that will not bring real advantage to represent that in DT
+        * The real AM33XX interconnect network is quite complex. Since
+        * it will not bring real advantage to represent that in DT
         * for the moment, just use a fake OCP bus entry to represent
         * the whole bus hierarchy.
         */
                              <0x46000000 0x400000>;
                        reg-names = "mpu", "dat";
                        interrupts = <80>, <81>;
-                       interrupts-names = "tx", "rx";
+                       interrupt-names = "tx", "rx";
                        status = "disabled";
                        dmas = <&edma 8>,
                                <&edma 9>;
                              <0x46400000 0x400000>;
                        reg-names = "mpu", "dat";
                        interrupts = <82>, <83>;
-                       interrupts-names = "tx", "rx";
+                       interrupt-names = "tx", "rx";
                        status = "disabled";
                        dmas = <&edma 10>,
                                <&edma 11>;
index 36d523a268314d3e1948dd894ae6b07141ac946e..d1f8707ff1dfc46d65815ef5ae2c36dbc1c46006 100644 (file)
                              <0x46000000 0x400000>;
                        reg-names = "mpu", "dat";
                        interrupts = <80>, <81>;
-                       interrupts-names = "tx", "rx";
+                       interrupt-names = "tx", "rx";
                        status = "disabled";
                        dmas = <&edma 8>,
                               <&edma 9>;
                              <0x46400000 0x400000>;
                        reg-names = "mpu", "dat";
                        interrupts = <82>, <83>;
-                       interrupts-names = "tx", "rx";
+                       interrupt-names = "tx", "rx";
                        status = "disabled";
                        dmas = <&edma 10>,
                               <&edma 11>;
index 82f238a9063ffe47d10dbe083f136e1876f8efd2..ba1a43118f8fd93ae6127165a32bc79d18492d5b 100644 (file)
@@ -35,7 +35,6 @@
 
                internal-regs {
                        serial@12000 {
-                               clock-frequency = <200000000>;
                                status = "okay";
                        };
                        sata@a0000 {
index 2354fe023ee01ee6f9df5e1b0f23e6e9498acf86..097df7d8f0f6c624fb5531d0257d7f5f67eee4fc 100644 (file)
@@ -47,7 +47,6 @@
 
                internal-regs {
                        serial@12000 {
-                               clock-frequency = <200000000>;
                                status = "okay";
                        };
                        timer@20300 {
index 651aeb5ef43956e27cb945ae1e5d6dc2bce560e9..d6d572e5af321482b20aa1fd08baed1f445a37eb 100644 (file)
@@ -50,7 +50,6 @@
 
                internal-regs {
                        serial@12000 {
-                               clock-frequency = <200000000>;
                                status = "okay";
                        };
 
index 4e27587667bf5df680bb18af95f43633e90fced1..c5fe8b5dcdc7dab6250597efb80b7b2b0c8ea321 100644 (file)
@@ -50,7 +50,6 @@
 
                internal-regs {
                        serial@12000 {
-                               clock-frequency = <200000000>;
                                status = "okay";
                        };
 
index 3e2c857d600008a896d3402572fedd8d68bbf624..4169f4096ea3bd6885339f31106135c89b6fc681 100644 (file)
@@ -51,7 +51,6 @@
 
                internal-regs {
                        serial@12000 {
-                               clock-frequency = <200000000>;
                                status = "okay";
                        };
                        sata@a0000 {
index bbb40f62037dbaf67ac8a585a17817997e8c1a17..23227e0027ec3f96baf017d3e84fafe4319ff683 100644 (file)
                                reg-shift = <2>;
                                interrupts = <41>;
                                reg-io-width = <1>;
+                               clocks = <&coreclk 0>;
                                status = "disabled";
                        };
                        serial@12100 {
                                reg-shift = <2>;
                                interrupts = <42>;
                                reg-io-width = <1>;
+                               clocks = <&coreclk 0>;
                                status = "disabled";
                        };
 
                                reg = <0x20300 0x34>, <0x20704 0x4>;
                        };
 
+                       pmsu@22000 {
+                               compatible = "marvell,armada-370-pmsu";
+                               reg = <0x22000 0x1000>;
+                       };
+
                        usb@50000 {
                                compatible = "marvell,orion-ehci";
                                reg = <0x50000 0x500>;
                                #size-cells = <0>;
                                compatible = "marvell,orion-mdio";
                                reg = <0x72004 0x4>;
+                               clocks = <&gateclk 4>;
                        };
 
                        eth1: ethernet@74000 {
index af1f11e9e5a011d526f64f8afaa60d000ef87542..21b588b6f6bd7559d30109e27913e9ea27919dc6 100644 (file)
                                clocks = <&coreclk 2>;
                        };
 
+                       cpurst@20800 {
+                               compatible = "marvell,armada-370-cpu-reset";
+                               reg = <0x20800 0x8>;
+                       };
+
                        audio_controller: audio-controller@30000 {
                                compatible = "marvell,armada370-audio";
                                reg = <0x30000 0x4000>;
index 9378d3136b41d7b37f11abdf01186c019758f7f1..2f26b963eee9768ddf045f0bb35a78ce39de2325 100644 (file)
@@ -68,7 +68,6 @@
                        };
 
                        serial@12000 {
-                               clock-frequency = <200000000>;
                                status = "okay";
                        };
 
index 3877693fb2d875ef0249a67aa748f00e557f32f3..3b6de4c0e37922cb7bfa7d4fb1850b05de0913b2 100644 (file)
@@ -39,6 +39,8 @@
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
+               enable-method = "marvell,armada-375-smp";
+
                cpu@0 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
                                cache-level = <2>;
                        };
 
+                       scu@c000 {
+                               compatible = "arm,cortex-a9-scu";
+                               reg = <0xc000 0x58>;
+                       };
+
                        timer@c600 {
                                compatible = "arm,cortex-a9-twd-timer";
                                reg = <0xc600 0x20>;
                                reg-shift = <2>;
                                interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
                                reg-io-width = <1>;
+                               clocks = <&coreclk 0>;
                                status = "disabled";
                        };
 
                                reg-shift = <2>;
                                interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
                                reg-io-width = <1>;
+                               clocks = <&coreclk 0>;
                                status = "disabled";
                        };
 
                                clocks = <&coreclk 0>;
                        };
 
+                       watchdog@20300 {
+                               compatible = "marvell,armada-375-wdt";
+                               reg = <0x20300 0x34>, <0x20704 0x4>, <0x18254 0x4>;
+                               clocks = <&coreclk 0>;
+                       };
+
+                       cpurst@20800 {
+                               compatible = "marvell,armada-370-cpu-reset";
+                               reg = <0x20800 0x10>;
+                       };
+
+                       coherency-fabric@21010 {
+                               compatible = "marvell,armada-375-coherency-fabric";
+                               reg = <0x21010 0x1c>;
+                       };
+
                        xor@60800 {
                                compatible = "marvell,orion-xor";
                                reg = <0x60800 0x100
                                status = "disabled";
                        };
 
+                       thermal@e8078 {
+                               compatible = "marvell,armada375-thermal";
+                               reg = <0xe8078 0x4>, <0xe807c 0x8>;
+                               status = "okay";
+                       };
+
                        coreclk: mvebu-sar@e8204 {
                                compatible = "marvell,armada-375-core-clock";
                                reg = <0xe8204 0x04>;
index 068031f0f263ef081f590eae7ac3da0df629ab2d..aa71718b549d0a7d5278d14641ff4a130cdb6d70 100644 (file)
@@ -21,6 +21,8 @@
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
+               enable-method = "marvell,armada-380-smp";
+
                cpu@0 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
index 6828d77696a67647397c568e5bce65f007e0c10d..7fcbc0d2a85ff868329058c9eab96ba518f7b073 100644 (file)
@@ -55,7 +55,6 @@
                        };
 
                        serial@12000 {
-                               clock-frequency = <200000000>;
                                status = "okay";
                        };
 
                                };
                        };
 
+                       sata@a8000 {
+                               status = "okay";
+                       };
+
+                       sata@e0000 {
+                               status = "okay";
+                       };
+
                        flash@d0000 {
                                status = "okay";
                                num-cs = <1>;
                                        reg = <0x1000000 0x3f000000>;
                                };
                        };
+
+                       sdhci@d8000 {
+                               clock-frequency = <200000000>;
+                               broken-cd;
+                               wp-inverted;
+                               bus-width = <8>;
+                               status = "okay";
+                       };
                };
 
                pcie-controller {
index 45250c88814b89c6b83213c7572c8896f7190e2b..4b39bed4ed07d11e4e1b70613a782b74694b8650 100644 (file)
@@ -51,7 +51,6 @@
                        };
 
                        serial@12000 {
-                               clock-frequency = <200000000>;
                                status = "okay";
                        };
 
index e2919f02e1d47687c77477b1a9bd389a32a4134e..2c7990d6efa220e4524de0ecb5913c05ad953a96 100644 (file)
@@ -21,6 +21,8 @@
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
+               enable-method = "marvell,armada-380-smp";
+
                cpu@0 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
index a064f59da02d566b4bfb994376e53e6d51693797..6ee59a34408902e4ab8182ceff8a1900841090b3 100644 (file)
                                cache-level = <2>;
                        };
 
+                       scu@c000 {
+                               compatible = "arm,cortex-a9-scu";
+                               reg = <0xc000 0x58>;
+                       };
+
                        timer@c600 {
                                compatible = "arm,cortex-a9-twd-timer";
                                reg = <0xc600 0x20>;
                                reg-shift = <2>;
                                interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
                                reg-io-width = <1>;
+                               clocks = <&coreclk 0>;
                                status = "disabled";
                        };
 
                                reg-shift = <2>;
                                interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
                                reg-io-width = <1>;
+                               clocks = <&coreclk 0>;
                                status = "disabled";
                        };
 
                                clock-names = "nbclk", "fixed";
                        };
 
+                       watchdog@20300 {
+                               compatible = "marvell,armada-380-wdt";
+                               reg = <0x20300 0x34>, <0x20704 0x4>, <0x18260 0x4>;
+                               clocks = <&coreclk 2>, <&refclk>;
+                               clock-names = "nbclk", "fixed";
+                       };
+
+                       cpurst@20800 {
+                               compatible = "marvell,armada-370-cpu-reset";
+                               reg = <0x20800 0x10>;
+                       };
+
+                       coherency-fabric@21010 {
+                               compatible = "marvell,armada-380-coherency-fabric";
+                               reg = <0x21010 0x1c>;
+                       };
+
+                       pmsu@22000 {
+                               compatible = "marvell,armada-380-pmsu";
+                               reg = <0x22000 0x1000>;
+                       };
+
                        eth1: ethernet@30000 {
                                compatible = "marvell,armada-370-neta";
                                reg = <0x30000 0x4000>;
                                #size-cells = <0>;
                                compatible = "marvell,orion-mdio";
                                reg = <0x72004 0x4>;
+                               clocks = <&gateclk 4>;
+                       };
+
+                       sata@a8000 {
+                               compatible = "marvell,armada-380-ahci";
+                               reg = <0xa8000 0x2000>;
+                               interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&gateclk 15>;
+                               status = "disabled";
+                       };
+
+                       sata@e0000 {
+                               compatible = "marvell,armada-380-ahci";
+                               reg = <0xe0000 0x2000>;
+                               interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&gateclk 30>;
+                               status = "disabled";
                        };
 
                        coredivclk: clock@e4250 {
                                clock-output-names = "nand";
                        };
 
+                       thermal@e8078 {
+                               compatible = "marvell,armada380-thermal";
+                               reg = <0xe4078 0x4>, <0xe4074 0x4>;
+                               status = "okay";
+                       };
+
                        flash@d0000 {
                                compatible = "marvell,armada370-nand";
                                reg = <0xd0000 0x54>;
                                clocks = <&coredivclk 0>;
                                status = "disabled";
                        };
+
+                       sdhci@d8000 {
+                               compatible = "marvell,armada-380-sdhci";
+                               reg = <0xd8000 0x1000>, <0xdc000 0x100>;
+                               interrupts = <0 25 0x4>;
+                               clocks = <&gateclk 17>;
+                               mrvl,clk-delay-cycles = <0x1F>;
+                               status = "disabled";
+                       };
                };
        };
 
index d83d7d69ac01ff7f33c33677ff16bf7d906d5f1c..a55a97a705056a72a0e480c9c6a60fc4c1a50381 100644 (file)
                        };
 
                        serial@12000 {
-                               clock-frequency = <250000000>;
                                status = "okay";
                        };
 
                        serial@12100 {
-                               clock-frequency = <250000000>;
                                status = "okay";
                        };
 
index 448373c4b0e534c1d2ce08592981f5d38bad39a8..2b598ef32285ec96ff4c7bef93b0a627b0c108a1 100644 (file)
 
                internal-regs {
                        serial@12000 {
-                               clock-frequency = <250000000>;
                                status = "okay";
                        };
                        serial@12100 {
-                               clock-frequency = <250000000>;
                                status = "okay";
                        };
                        serial@12200 {
-                               clock-frequency = <250000000>;
                                status = "okay";
                        };
                        serial@12300 {
-                               clock-frequency = <250000000>;
                                status = "okay";
                        };
 
index 61bda687f782f65485f958adb8d8ec2822ebde35..eb0013f000b03ccf51f73e3438d60266b9cb4749 100644 (file)
 
                internal-regs {
                        serial@12000 {
-                               clock-frequency = <250000000>;
                                status = "okay";
                        };
                        serial@12100 {
-                               clock-frequency = <250000000>;
                                status = "okay";
                        };
                        serial@12200 {
-                               clock-frequency = <250000000>;
                                status = "okay";
                        };
                        serial@12300 {
-                               clock-frequency = <250000000>;
                                status = "okay";
                        };
 
index c2242745b9b87a29afcfcc2fc77bf9178d5814f9..25674fe81f703d279dc154ff75d02d366b34cef6 100644 (file)
 
                internal-regs {
                        serial@12000 {
-                               clock-frequency = <250000000>;
                                status = "okay";
                        };
                        serial@12100 {
-                               clock-frequency = <250000000>;
                                status = "okay";
                        };
                        serial@12200 {
-                               clock-frequency = <250000000>;
                                status = "okay";
                        };
                        serial@12300 {
-                               clock-frequency = <250000000>;
                                status = "okay";
                        };
 
index 98335fb34b7ad5a11d9f40b6564bddc161431455..1257ff1ed278e68a33793eb9cf0c40be08e0b169 100644 (file)
@@ -27,6 +27,7 @@
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
+               enable-method = "marvell,armada-xp-smp";
 
                cpu@0 {
                        device_type = "cpu";
index 9480cf891f8cd0ce475d87cf2eed904a6a740eb7..3396b25b39e179cb1a444435adfa28c87385e8ed 100644 (file)
@@ -29,6 +29,7 @@
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
+               enable-method = "marvell,armada-xp-smp";
 
                cpu@0 {
                        device_type = "cpu";
index 31ba6d8fbadf8803f28aca6312c8205c79c23aee..6da84bf40aaf48849d308453755c1eca3605396b 100644 (file)
@@ -30,6 +30,7 @@
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
+               enable-method = "marvell,armada-xp-smp";
 
                cpu@0 {
                        device_type = "cpu";
index ff049ee862ebd2d8a271d70a0b2e20206f47592f..0cf999abc4ed768abf20b2b32c9d5299a7be9a71 100644 (file)
                        };
 
                        serial@12000 {
-                               clocks = <&coreclk 0>;
                                status = "okay";
                        };
 
index 985948ce67b3271a65c9b4a413a99e7d255b12e7..cf26d1313d5fb4473cc50567a9508caa727c3727 100644 (file)
 
                internal-regs {
                        serial@12000 {
-                               clock-frequency = <250000000>;
                                status = "okay";
                        };
                        serial@12100 {
-                               clock-frequency = <250000000>;
                                status = "okay";
                        };
                        pinctrl {
index abb9f9dcc525a6a7c1583e5f1f7c65d4ff29e485..5902e8359c9165c33cc265b0a304df33acb640b5 100644 (file)
@@ -58,6 +58,7 @@
                                reg-shift = <2>;
                                interrupts = <43>;
                                reg-io-width = <1>;
+                               clocks = <&coreclk 0>;
                                status = "disabled";
                        };
                        serial@12300 {
@@ -66,6 +67,7 @@
                                reg-shift = <2>;
                                interrupts = <44>;
                                reg-io-width = <1>;
+                               clocks = <&coreclk 0>;
                                status = "disabled";
                        };
 
                                clock-names = "nbclk", "fixed";
                        };
 
-                       armada-370-xp-pmsu@22000 {
-                               compatible = "marvell,armada-370-xp-pmsu";
-                               reg = <0x22100 0x400>, <0x20800 0x20>;
+                       cpurst@20800 {
+                               compatible = "marvell,armada-370-cpu-reset";
+                               reg = <0x20800 0x20>;
                        };
 
                        eth2: ethernet@30000 {
index a542d5837a17be14c1f82547c59529d4a59f5ce7..27ebb0f722fdbd724fe83089b86cae39eed2b5ee 100644 (file)
                                status = "okay";
                        };
 
-
-                       tsadcc: tsadcc@f804c000 {
-                               status = "okay";
-                       };
-
                        rtc@fffffeb0 {
                                status = "okay";
                        };
index ce1375595e5f27117c37881bcafa5fc5805b1455..5b8e40400becbd57fb2ca3e03d3b411dfb7e6dd7 100644 (file)
                reg = <0x20000000 0x10000000>;
        };
 
+       slow_xtal {
+               clock-frequency = <32768>;
+       };
+
+       main_xtal {
+               clock-frequency = <12000000>;
+       };
+
        ahb {
                apb {
                        mmc0: mmc@f0000000 {
@@ -34,7 +42,7 @@
                        };
 
                        spi0: spi@f0004000 {
-                               cs-gpios = <&pioD 13 0>;
+                               cs-gpios = <&pioD 13 0>, <0>, <0>, <&pioD 16 0>;
                                status = "okay";
                        };
 
                        };
 
                        i2c0: i2c@f0014000 {
+                               pinctrl-0 = <&pinctrl_i2c0_pu>;
                                status = "okay";
                        };
 
                        i2c1: i2c@f0018000 {
                                status = "okay";
+
+                               pmic: act8865@5b {
+                                       compatible = "active-semi,act8865";
+                                       reg = <0x5b>;
+                                       status = "okay";
+
+                                       regulators {
+                                               vcc_1v8_reg: DCDC_REG1 {
+                                                       regulator-name = "VCC_1V8";
+                                                       regulator-min-microvolt = <1800000>;
+                                                       regulator-max-microvolt = <1800000>;
+                                                       regulator-always-on;
+                                               };
+
+                                               vcc_1v2_reg: DCDC_REG2 {
+                                                       regulator-name = "VCC_1V2";
+                                                       regulator-min-microvolt = <1200000>;
+                                                       regulator-max-microvolt = <1200000>;
+                                                       regulator-always-on;
+                                               };
+
+                                               vcc_3v3_reg: DCDC_REG3 {
+                                                       regulator-name = "VCC_3V3";
+                                                       regulator-min-microvolt = <3300000>;
+                                                       regulator-max-microvolt = <3300000>;
+                                                       regulator-always-on;
+                                               };
+
+                                               vddfuse_reg: LDO_REG1 {
+                                                       regulator-name = "FUSE_2V5";
+                                                       regulator-min-microvolt = <2500000>;
+                                                       regulator-max-microvolt = <2500000>;
+                                               };
+
+                                               vddana_reg: LDO_REG2 {
+                                                       regulator-name = "VDDANA";
+                                                       regulator-min-microvolt = <3300000>;
+                                                       regulator-max-microvolt = <3300000>;
+                                                       regulator-always-on;
+                                               };
+                                       };
+                               };
                        };
 
                        macb0: ethernet@f0028000 {
                                status = "okay";
                        };
 
+                       pwm0: pwm@f002c000 {
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_pwm0_pwmh0_0 &pinctrl_pwm0_pwmh1_0>;
+                               status = "okay";
+                       };
+
                        usart0: serial@f001c000 {
                                status = "okay";
                        };
                        };
 
                        spi1: spi@f8008000 {
-                               cs-gpios = <&pioC 25 0>, <0>, <0>, <&pioD 16 0>;
+                               cs-gpios = <&pioC 25 0>;
                                status = "okay";
                        };
 
 
                        i2c2: i2c@f801c000 {
                                dmas = <0>, <0>;        /* Do not use DMA for i2c2 */
+                               pinctrl-0 = <&pinctrl_i2c2_pu>;
                                status = "okay";
                        };
 
 
                        pinctrl@fffff200 {
                                board {
+                                       pinctrl_i2c0_pu: i2c0_pu {
+                                               atmel,pins =
+                                                       <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
+                                                       <AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
+                                       };
+
+                                       pinctrl_i2c2_pu: i2c2_pu {
+                                               atmel,pins =
+                                                       <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
+                                                       <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
+                                       };
+
                                        pinctrl_mmc0_cd: mmc0_cd {
                                                atmel,pins =
                                                        <AT91_PIOE 0 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
index e21dda0e8986574b2531c1675eca1b4de164822d..b309c1c6e848958d3af6c6679a1dc19402329402 100644 (file)
@@ -10,7 +10,7 @@
 #include <dt-bindings/pinctrl/at91.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/clk/at91.h>
+#include <dt-bindings/clock/at91.h>
 
 / {
        model = "Atmel AT91SAM9261 family SoC";
@@ -29,6 +29,7 @@
                i2c0 = &i2c0;
                ssc0 = &ssc0;
                ssc1 = &ssc1;
+               ssc2 = &ssc2;
        };
 
        cpus {
                reg = <0x20000000 0x08000000>;
        };
 
+       main_xtal: main_xtal {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <0>;
+       };
+
+       slow_xtal: slow_xtal {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <0>;
+       };
+
        ahb {
                compatible = "simple-bus";
                #address-cells = <1>;
                                interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
                                pinctrl-names = "default";
                                pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
+                               clocks = <&ssc0_clk>;
+                               clock-names = "pclk";
                                status = "disabled";
                        };
 
                                interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
                                pinctrl-names = "default";
                                pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
+                               clocks = <&ssc1_clk>;
+                               clock-names = "pclk";
+                               status = "disabled";
+                       };
+
+                       ssc2: ssc@fffc4000 {
+                               compatible = "atmel,at91rm9200-ssc";
+                               reg = <0xfffc4000 0x4000>;
+                               interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
+                               clocks = <&ssc2_clk>;
+                               clock-names = "pclk";
                                status = "disabled";
                        };
 
                                        };
                                };
 
+                               ssc2 {
+                                       pinctrl_ssc2_tx: ssc2_tx-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
+                                                       <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
+                                                       <AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+                                       };
+
+                                       pinctrl_ssc2_rx: ssc2_rx-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>,
+                                                       <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>,
+                                                       <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+                                       };
+                               };
+
                                spi0 {
                                        pinctrl_spi0: spi0-0 {
                                                atmel,pins =
                                #size-cells = <0>;
                                #interrupt-cells = <1>;
 
-                               clk32k: slck {
+                               slow_rc_osc: slow_rc_osc {
                                        compatible = "fixed-clock";
                                        #clock-cells = <0>;
                                        clock-frequency = <32768>;
+                                       clock-accuracy = <50000000>;
+                               };
+
+                               clk32k: slck {
+                                       compatible = "atmel,at91sam9260-clk-slow";
+                                       #clock-cells = <0>;
+                                       clocks = <&slow_rc_osc &slow_xtal>;
                                };
 
                                main: mainck {
                                        compatible = "atmel,at91rm9200-clk-main";
                                        #clock-cells = <0>;
                                        interrupts-extended = <&pmc AT91_PMC_MOSCS>;
-                                       clocks = <&clk32k>;
+                                       clocks = <&main_xtal>;
                                };
 
                                plla: pllack {
                                        reg = <0>;
                                        atmel,clk-input-range = <1000000 32000000>;
                                        #atmel,pll-clk-output-range-cells = <4>;
-                                       atmel,pll-clk-output-ranges = <80000000 200000000 190000000 240000000>;
+                                       atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
+                                                               <190000000 240000000 2 1>;
                                };
 
                                pllb: pllbck {
                                        interrupts-extended = <&pmc AT91_PMC_LOCKB>;
                                        clocks = <&main>;
                                        reg = <1>;
-                                       atmel,clk-input-range = <1000000 32000000>;
+                                       atmel,clk-input-range = <1000000 5000000>;
                                        #atmel,pll-clk-output-range-cells = <4>;
-                                       atmel,pll-clk-output-ranges = <80000000 200000000 190000000 240000000>;
+                                       atmel,pll-clk-output-ranges = <70000000 130000000 1 1>;
                                };
 
                                mck: masterck {
                                        interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
                                        clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
                                        atmel,clk-output-range = <0 94000000>;
-                                       atmel,clk-divisors = <1 2 4 3>;
+                                       atmel,clk-divisors = <1 2 4 0>;
                                };
 
                                usb: usbck {
                                        compatible = "atmel,at91rm9200-clk-usb";
                                        #clock-cells = <0>;
-                                       atmel,clk-divisors = <1 2 4 3>;
+                                       atmel,clk-divisors = <1 2 4 0>;
                                        clocks = <&pllb>;
                                };
 
+                               prog: progck {
+                                       compatible = "atmel,at91rm9200-clk-programmable";
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+                                       interrupt-parent = <&pmc>;
+                                       clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
+
+                                       prog0: prog0 {
+                                               #clock-cells = <0>;
+                                               reg = <0>;
+                                               interrupts = <AT91_PMC_PCKRDY(0)>;
+                                       };
+
+                                       prog1: prog1 {
+                                               #clock-cells = <0>;
+                                               reg = <1>;
+                                               interrupts = <AT91_PMC_PCKRDY(1)>;
+                                       };
+
+                                       prog2: prog2 {
+                                               #clock-cells = <0>;
+                                               reg = <2>;
+                                               interrupts = <AT91_PMC_PCKRDY(2)>;
+                                       };
+
+                                       prog3: prog3 {
+                                               #clock-cells = <0>;
+                                               reg = <3>;
+                                               interrupts = <AT91_PMC_PCKRDY(3)>;
+                                       };
+                               };
+
                                systemck {
                                        compatible = "atmel,at91rm9200-clk-system";
                                        #address-cells = <1>;
                                                clocks = <&usb>;
                                        };
 
+                                       pck0: pck0 {
+                                               #clock-cells = <0>;
+                                               reg = <8>;
+                                               clocks = <&prog0>;
+                                       };
+
+                                       pck1: pck1 {
+                                               #clock-cells = <0>;
+                                               reg = <9>;
+                                               clocks = <&prog1>;
+                                       };
+
+                                       pck2: pck2 {
+                                               #clock-cells = <0>;
+                                               reg = <10>;
+                                               clocks = <&prog2>;
+                                       };
+
+                                       pck3: pck3 {
+                                               #clock-cells = <0>;
+                                               reg = <11>;
+                                               clocks = <&prog3>;
+                                       };
+
                                        hclk0: hclk0 {
                                                #clock-cells = <0>;
                                                reg = <16>;
                                                reg = <13>;
                                        };
 
+                                       ssc0_clk: ssc0_clk {
+                                               #clock-cells = <0>;
+                                               reg = <14>;
+                                       };
+
+                                       ssc1_clk: ssc1_clk {
+                                               #clock-cells = <0>;
+                                               reg = <15>;
+                                       };
+
+                                       ssc2_clk: ssc2_clk {
+                                               #clock-cells = <0>;
+                                               reg = <16>;
+                                       };
+
                                        tc0_clk: tc0_clk {
                                                #clock-cells = <0>;
                                                reg = <17>;
index 2ce527e70c7abb45f37e759377f3ee9400f69ee8..c6683ea8b74350b2dace53015b43d1f78b3a7762 100644 (file)
                reg = <0x20000000 0x4000000>;
        };
 
+       main_xtal {
+               clock-frequency = <18432000>;
+       };
+
        clocks {
                #address-cells = <1>;
                #size-cells = <1>;
index 9cdaecff13b3996932fc7564a8c4927cd97024c6..ace6bf197b708dd79e29054773d50c5f1a3fd864 100644 (file)
                                      >;
 
                                /* shared pinctrl settings */
+                               adc0 {
+                                       pinctrl_adc0_adtrg: adc0_adtrg {
+                                               atmel,pins = <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+                                       };
+                                       pinctrl_adc0_ad0: adc0_ad0 {
+                                               atmel,pins = <AT91_PIOD 20 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
+                                       };
+                                       pinctrl_adc0_ad1: adc0_ad1 {
+                                               atmel,pins = <AT91_PIOD 21 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
+                                       };
+                                       pinctrl_adc0_ad2: adc0_ad2 {
+                                               atmel,pins = <AT91_PIOD 22 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
+                                       };
+                                       pinctrl_adc0_ad3: adc0_ad3 {
+                                               atmel,pins = <AT91_PIOD 23 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
+                                       };
+                                       pinctrl_adc0_ad4: adc0_ad4 {
+                                               atmel,pins = <AT91_PIOD 24 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
+                                       };
+                                       pinctrl_adc0_ad5: adc0_ad5 {
+                                               atmel,pins = <AT91_PIOD 25 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
+                                       };
+                                       pinctrl_adc0_ad6: adc0_ad6 {
+                                               atmel,pins = <AT91_PIOD 26 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
+                                       };
+                                       pinctrl_adc0_ad7: adc0_ad7 {
+                                               atmel,pins = <AT91_PIOD 27 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
+                                       };
+                               };
+
                                dbgu {
                                        pinctrl_dbgu: dbgu-0 {
                                                atmel,pins =
                        adc0: adc@fffb0000 {
                                #address-cells = <1>;
                                #size-cells = <0>;
-                               compatible = "atmel,at91sam9260-adc";
+                               compatible = "atmel,at91sam9g45-adc";
                                reg = <0xfffb0000 0x100>;
                                interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
-                               atmel,adc-use-external-triggers;
                                atmel,adc-channels-used = <0xff>;
                                atmel,adc-vref = <3300>;
                                atmel,adc-startup-time = <40>;
index 7ff665a8c7080b2634fd2095e9b24fb550044a4b..9f5b0a6749955755b75ece053be16d6c563be051 100644 (file)
@@ -8,6 +8,7 @@
  */
 /dts-v1/;
 #include "at91sam9g45.dtsi"
+#include <dt-bindings/pwm/pwm.h>
 
 / {
        model = "Atmel AT91SAM9M10G45-EK";
                                status = "okay";
                        };
 
+                       adc0: adc@fffb0000 {
+                               pinctrl-names = "default";
+                               pinctrl-0 = <
+                                       &pinctrl_adc0_ad0
+                                       &pinctrl_adc0_ad1
+                                       &pinctrl_adc0_ad2
+                                       &pinctrl_adc0_ad3
+                                       &pinctrl_adc0_ad4
+                                       &pinctrl_adc0_ad5
+                                       &pinctrl_adc0_ad6
+                                       &pinctrl_adc0_ad7>;
+                               atmel,adc-ts-wires = <4>;
+                               status = "okay";
+                       };
+
                        pwm0: pwm@fffb8000 {
                                status = "okay";
 
 
                d6 {
                        label = "d6";
-                       pwms = <&pwm0 3 5000 0>;
+                       pwms = <&pwm0 3 5000 PWM_POLARITY_INVERTED>;
                        max-brightness = <255>;
                        linux,default-trigger = "nand-disk";
                };
 
                d7 {
                        label = "d7";
-                       pwms = <&pwm0 1 5000 0>;
+                       pwms = <&pwm0 1 5000 PWM_POLARITY_INVERTED>;
                        max-brightness = <255>;
                        linux,default-trigger = "mmc0";
                };
index 9f04808fc697cb0cfb2712fed85d3faff3ed010c..d1b82e6635d5dc79fb399196c88473423bece9d6 100644 (file)
@@ -12,6 +12,7 @@
 #include <dt-bindings/pinctrl/at91.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/at91.h>
 
 / {
        model = "Atmel AT91SAM9N12 SoC";
                reg = <0x20000000 0x10000000>;
        };
 
+       slow_xtal: slow_xtal {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <0>;
+       };
+
+       main_xtal: main_xtal {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <0>;
+       };
+
        ahb {
                compatible = "simple-bus";
                #address-cells = <1>;
                        };
 
                        pmc: pmc@fffffc00 {
-                               compatible = "atmel,at91rm9200-pmc";
-                               reg = <0xfffffc00 0x100>;
+                               compatible = "atmel,at91sam9n12-pmc";
+                               reg = <0xfffffc00 0x200>;
+                               interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+                               interrupt-controller;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               #interrupt-cells = <1>;
+
+                               main_rc_osc: main_rc_osc {
+                                       compatible = "atmel,at91sam9x5-clk-main-rc-osc";
+                                       #clock-cells = <0>;
+                                       interrupts-extended = <&pmc AT91_PMC_MOSCRCS>;
+                                       clock-frequency = <12000000>;
+                                       clock-accuracy = <50000000>;
+                               };
+
+                               main_osc: main_osc {
+                                       compatible = "atmel,at91rm9200-clk-main-osc";
+                                       #clock-cells = <0>;
+                                       interrupts-extended = <&pmc AT91_PMC_MOSCS>;
+                                       clocks = <&main_xtal>;
+                               };
+
+                               main: mainck {
+                                       compatible = "atmel,at91sam9x5-clk-main";
+                                       #clock-cells = <0>;
+                                       interrupts-extended = <&pmc AT91_PMC_MOSCSELS>;
+                                       clocks = <&main_rc_osc>, <&main_osc>;
+                               };
+
+                               plla: pllack {
+                                       compatible = "atmel,at91rm9200-clk-pll";
+                                       #clock-cells = <0>;
+                                       interrupts-extended = <&pmc AT91_PMC_LOCKA>;
+                                       clocks = <&main>;
+                                       reg = <0>;
+                                       atmel,clk-input-range = <2000000 32000000>;
+                                       #atmel,pll-clk-output-range-cells = <4>;
+                                       atmel,pll-clk-output-ranges = <745000000 800000000 0 0>,
+                                                                     <695000000 750000000 1 0>,
+                                                                     <645000000 700000000 2 0>,
+                                                                     <595000000 650000000 3 0>,
+                                                                     <545000000 600000000 0 1>,
+                                                                     <495000000 555000000 1 1>,
+                                                                     <445000000 500000000 1 2>,
+                                                                     <400000000 450000000 1 3>;
+                               };
+
+                               plladiv: plladivck {
+                                       compatible = "atmel,at91sam9x5-clk-plldiv";
+                                       #clock-cells = <0>;
+                                       clocks = <&plla>;
+                               };
+
+                               pllb: pllbck {
+                                       compatible = "atmel,at91rm9200-clk-pll";
+                                       #clock-cells = <0>;
+                                       interrupts-extended = <&pmc AT91_PMC_LOCKB>;
+                                       clocks = <&main>;
+                                       reg = <1>;
+                                       atmel,clk-input-range = <2000000 32000000>;
+                                       #atmel,pll-clk-output-range-cells = <3>;
+                                       atmel,pll-clk-output-ranges = <30000000 100000000 0>;
+                               };
+
+                               mck: masterck {
+                                       compatible = "atmel,at91sam9x5-clk-master";
+                                       #clock-cells = <0>;
+                                       interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
+                                       clocks = <&clk32k>, <&main>, <&plladiv>, <&pllb>;
+                                       atmel,clk-output-range = <0 133333333>;
+                                       atmel,clk-divisors = <1 2 4 3>;
+                                       atmel,master-clk-have-div3-pres;
+                               };
+
+                               usb: usbck {
+                                       compatible = "atmel,at91sam9n12-clk-usb";
+                                       #clock-cells = <0>;
+                                       clocks = <&pllb>;
+                               };
+
+                               prog: progck {
+                                       compatible = "atmel,at91sam9x5-clk-programmable";
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+                                       interrupt-parent = <&pmc>;
+                                       clocks = <&clk32k>, <&main>, <&plladiv>, <&pllb>, <&mck>;
+
+                                       prog0: prog0 {
+                                               #clock-cells = <0>;
+                                               reg = <0>;
+                                               interrupts = <AT91_PMC_PCKRDY(0)>;
+                                       };
+
+                                       prog1: prog1 {
+                                               #clock-cells = <0>;
+                                               reg = <1>;
+                                               interrupts = <AT91_PMC_PCKRDY(1)>;
+                                       };
+                               };
+
+                               systemck {
+                                       compatible = "atmel,at91rm9200-clk-system";
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       ddrck: ddrck {
+                                               #clock-cells = <0>;
+                                               reg = <2>;
+                                               clocks = <&mck>;
+                                       };
+
+                                       lcdck: lcdck {
+                                               #clock-cells = <0>;
+                                               reg = <3>;
+                                               clocks = <&mck>;
+                                       };
+
+                                       uhpck: uhpck {
+                                               #clock-cells = <0>;
+                                               reg = <6>;
+                                               clocks = <&usb>;
+                                       };
+
+                                       udpck: udpck {
+                                               #clock-cells = <0>;
+                                               reg = <7>;
+                                               clocks = <&usb>;
+                                       };
+
+                                       pck0: pck0 {
+                                               #clock-cells = <0>;
+                                               reg = <8>;
+                                               clocks = <&prog0>;
+                                       };
+
+                                       pck1: pck1 {
+                                               #clock-cells = <0>;
+                                               reg = <9>;
+                                               clocks = <&prog1>;
+                                       };
+                               };
+
+                               periphck {
+                                       compatible = "atmel,at91sam9x5-clk-peripheral";
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+                                       clocks = <&mck>;
+
+                                       pioAB_clk: pioAB_clk {
+                                               #clock-cells = <0>;
+                                               reg = <2>;
+                                       };
+
+                                       pioCD_clk: pioCD_clk {
+                                               #clock-cells = <0>;
+                                               reg = <3>;
+                                       };
+
+                                       fuse_clk: fuse_clk {
+                                               #clock-cells = <0>;
+                                               reg = <4>;
+                                       };
+
+                                       usart0_clk: usart0_clk {
+                                               #clock-cells = <0>;
+                                               reg = <5>;
+                                       };
+
+                                       usart1_clk: usart1_clk {
+                                               #clock-cells = <0>;
+                                               reg = <6>;
+                                       };
+
+                                       usart2_clk: usart2_clk {
+                                               #clock-cells = <0>;
+                                               reg = <7>;
+                                       };
+
+                                       usart3_clk: usart3_clk {
+                                               #clock-cells = <0>;
+                                               reg = <8>;
+                                       };
+
+                                       twi0_clk: twi0_clk {
+                                               reg = <9>;
+                                               #clock-cells = <0>;
+                                       };
+
+                                       twi1_clk: twi1_clk {
+                                               #clock-cells = <0>;
+                                               reg = <10>;
+                                       };
+
+                                       mci0_clk: mci0_clk {
+                                               #clock-cells = <0>;
+                                               reg = <12>;
+                                       };
+
+                                       spi0_clk: spi0_clk {
+                                               #clock-cells = <0>;
+                                               reg = <13>;
+                                       };
+
+                                       spi1_clk: spi1_clk {
+                                               #clock-cells = <0>;
+                                               reg = <14>;
+                                       };
+
+                                       uart0_clk: uart0_clk {
+                                               #clock-cells = <0>;
+                                               reg = <15>;
+                                       };
+
+                                       uart1_clk: uart1_clk {
+                                               #clock-cells = <0>;
+                                               reg = <16>;
+                                       };
+
+                                       tcb_clk: tcb_clk {
+                                               #clock-cells = <0>;
+                                               reg = <17>;
+                                       };
+
+                                       pwm_clk: pwm_clk {
+                                               #clock-cells = <0>;
+                                               reg = <18>;
+                                       };
+
+                                       adc_clk: adc_clk {
+                                               #clock-cells = <0>;
+                                               reg = <19>;
+                                       };
+
+                                       dma0_clk: dma0_clk {
+                                               #clock-cells = <0>;
+                                               reg = <20>;
+                                       };
+
+                                       uhphs_clk: uhphs_clk {
+                                               #clock-cells = <0>;
+                                               reg = <22>;
+                                       };
+
+                                       udphs_clk: udphs_clk {
+                                               #clock-cells = <0>;
+                                               reg = <23>;
+                                       };
+
+                                       lcdc_clk: lcdc_clk {
+                                               #clock-cells = <0>;
+                                               reg = <25>;
+                                       };
+
+                                       sha_clk: sha_clk {
+                                               #clock-cells = <0>;
+                                               reg = <27>;
+                                       };
+
+                                       ssc0_clk: ssc0_clk {
+                                               #clock-cells = <0>;
+                                               reg = <28>;
+                                       };
+
+                                       aes_clk: aes_clk {
+                                               #clock-cells = <0>;
+                                               reg = <29>;
+                                       };
+
+                                       trng_clk: trng_clk {
+                                               #clock-cells = <0>;
+                                               reg = <30>;
+                                       };
+                               };
                        };
 
                        rstc@fffffe00 {
                                compatible = "atmel,at91sam9260-pit";
                                reg = <0xfffffe30 0xf>;
                                interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+                               clocks = <&mck>;
                        };
 
                        shdwc@fffffe10 {
                                reg = <0xfffffe10 0x10>;
                        };
 
+                       sckc@fffffe50 {
+                               compatible = "atmel,at91sam9x5-sckc";
+                               reg = <0xfffffe50 0x4>;
+
+                               slow_osc: slow_osc {
+                                       compatible = "atmel,at91sam9x5-clk-slow-osc";
+                                       #clock-cells = <0>;
+                                       clocks = <&slow_xtal>;
+                               };
+
+                               slow_rc_osc: slow_rc_osc {
+                                       compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
+                                       #clock-cells = <0>;
+                                       clock-frequency = <32768>;
+                                       clock-accuracy = <50000000>;
+                               };
+
+                               clk32k: slck {
+                                       compatible = "atmel,at91sam9x5-clk-slow";
+                                       #clock-cells = <0>;
+                                       clocks = <&slow_rc_osc>, <&slow_osc>;
+                               };
+                       };
+
                        mmc0: mmc@f0008000 {
                                compatible = "atmel,hsmci";
                                reg = <0xf0008000 0x600>;
                                interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
                                dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
                                dma-names = "rxtx";
+                               clocks = <&mci0_clk>;
+                               clock-names = "mci_clk";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                status = "disabled";
                                compatible = "atmel,at91sam9x5-tcb";
                                reg = <0xf8008000 0x100>;
                                interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
+                               clocks = <&tcb_clk>;
+                               clock-names = "t0_clk";
                        };
 
                        tcb1: timer@f800c000 {
                                compatible = "atmel,at91sam9x5-tcb";
                                reg = <0xf800c000 0x100>;
                                interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
+                               clocks = <&tcb_clk>;
+                               clock-names = "t0_clk";
                        };
 
                        dma: dma-controller@ffffec00 {
                                reg = <0xffffec00 0x200>;
                                interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
                                #dma-cells = <2>;
+                               clocks = <&dma0_clk>;
+                               clock-names = "dma_clk";
                        };
 
                        pinctrl@fffff400 {
                                        gpio-controller;
                                        interrupt-controller;
                                        #interrupt-cells = <2>;
+                                       clocks = <&pioAB_clk>;
                                };
 
                                pioB: gpio@fffff600 {
                                        gpio-controller;
                                        interrupt-controller;
                                        #interrupt-cells = <2>;
+                                       clocks = <&pioAB_clk>;
                                };
 
                                pioC: gpio@fffff800 {
                                        gpio-controller;
                                        interrupt-controller;
                                        #interrupt-cells = <2>;
+                                       clocks = <&pioCD_clk>;
                                };
 
                                pioD: gpio@fffffa00 {
                                        gpio-controller;
                                        interrupt-controller;
                                        #interrupt-cells = <2>;
+                                       clocks = <&pioCD_clk>;
                                };
                        };
 
                                interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
                                pinctrl-names = "default";
                                pinctrl-0 = <&pinctrl_dbgu>;
+                               clocks = <&mck>;
+                               clock-names = "usart";
                                status = "disabled";
                        };
 
                                dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
+                               clocks = <&ssc0_clk>;
+                               clock-names = "pclk";
                                status = "disabled";
                        };
 
                                interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
                                pinctrl-names = "default";
                                pinctrl-0 = <&pinctrl_usart0>;
+                               clocks = <&usart0_clk>;
+                               clock-names = "usart";
                                status = "disabled";
                        };
 
                                interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
                                pinctrl-names = "default";
                                pinctrl-0 = <&pinctrl_usart1>;
+                               clocks = <&usart1_clk>;
+                               clock-names = "usart";
                                status = "disabled";
                        };
 
                                interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
                                pinctrl-names = "default";
                                pinctrl-0 = <&pinctrl_usart2>;
+                               clocks = <&usart2_clk>;
+                               clock-names = "usart";
                                status = "disabled";
                        };
 
                                interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
                                pinctrl-names = "default";
                                pinctrl-0 = <&pinctrl_usart3>;
+                               clocks = <&usart3_clk>;
+                               clock-names = "usart";
                                status = "disabled";
                        };
 
                                #size-cells = <0>;
                                pinctrl-names = "default";
                                pinctrl-0 = <&pinctrl_i2c0>;
+                               clocks = <&twi0_clk>;
                                status = "disabled";
                        };
 
                                #size-cells = <0>;
                                pinctrl-names = "default";
                                pinctrl-0 = <&pinctrl_i2c1>;
+                               clocks = <&twi1_clk>;
                                status = "disabled";
                        };
 
                                dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&pinctrl_spi0>;
+                               clocks = <&spi0_clk>;
+                               clock-names = "spi_clk";
                                status = "disabled";
                        };
 
                                dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&pinctrl_spi1>;
+                               clocks = <&spi1_clk>;
+                               clock-names = "spi_clk";
                                status = "disabled";
                        };
 
                                reg = <0xf8034000 0x300>;
                                interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
                                #pwm-cells = <3>;
+                               clocks = <&pwm_clk>;
                                status = "disabled";
                        };
                };
                        compatible = "atmel,at91rm9200-ohci", "usb-ohci";
                        reg = <0x00500000 0x00100000>;
                        interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
+                       clocks = <&usb>, <&uhphs_clk>, <&udphs_clk>,
+                                <&uhpck>;
+                       clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
                        status = "disabled";
                };
        };
index 924a6a6ffd0f0a03d6fcde286fff1383e696eb70..64bbe46e4f90aeb16d3c0c2d26e116595df0dee2 100644 (file)
                reg = <0x20000000 0x8000000>;
        };
 
+       slow_xtal {
+               clock-frequency = <32768>;
+       };
+
+       main_xtal {
+               clock-frequency = <16000000>;
+       };
+
        clocks {
                #address-cells = <1>;
                #size-cells = <1>;
index 63e1784d272c556974023fcfd7d46ba7a0510e3d..1da183155eeeedad507d95703aebba3f5668c7ae 100644 (file)
@@ -8,9 +8,10 @@
 
 #include "skeleton.dtsi"
 #include <dt-bindings/pinctrl/at91.h>
-#include <dt-bindings/clk/at91.h>
+#include <dt-bindings/clock/at91.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pwm/pwm.h>
 
 / {
        model = "Atmel AT91SAM9RL family SoC";
@@ -32,6 +33,7 @@
                i2c1 = &i2c1;
                ssc0 = &ssc0;
                ssc1 = &ssc1;
+               pwm0 = &pwm0;
        };
 
        cpus {
                reg = <0x20000000 0x04000000>;
        };
 
+       slow_xtal: slow_xtal {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <0>;
+       };
+
+       main_xtal: main_xtal {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <0>;
+       };
+
+       clocks {
+               adc_op_clk: adc_op_clk{
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <1000000>;
+               };
+       };
+
        ahb {
                compatible = "simple-bus";
                #address-cells = <1>;
                #size-cells = <1>;
                ranges;
 
+               fb0: fb@00500000 {
+                       compatible = "atmel,at91sam9rl-lcdc";
+                       reg = <0x00500000 0x1000>;
+                       interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_fb>;
+                       clocks = <&lcd_clk>, <&lcd_clk>;
+                       clock-names = "hclk", "lcdc_clk";
+                       status = "disabled";
+               };
+
                nand0: nand@40000000 {
                        compatible = "atmel,at91rm9200-nand";
                        #address-cells = <1>;
                                status = "disabled";
                        };
 
+                       pwm0: pwm@fffc8000 {
+                               compatible = "atmel,at91sam9rl-pwm";
+                               reg = <0xfffc8000 0x300>;
+                               interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
+                               #pwm-cells = <3>;
+                               clocks = <&pwm_clk>;
+                               clock-names = "pwm_clk";
+                               status = "disabled";
+                       };
+
                        spi0: spi@fffcc000 {
                                #address-cells = <1>;
                                #size-cells = <0>;
                                status = "disabled";
                        };
 
+                       adc0: adc@fffd0000 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               compatible = "atmel,at91sam9rl-adc";
+                               reg = <0xfffd0000 0x100>;
+                               interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
+                               clocks = <&adc_clk>, <&adc_op_clk>;
+                               clock-names = "adc_clk", "adc_op_clk";
+                               atmel,adc-use-external-triggers;
+                               atmel,adc-channels-used = <0x3f>;
+                               atmel,adc-vref = <3300>;
+                               atmel,adc-startup-time = <40>;
+                               atmel,adc-res = <8 10>;
+                               atmel,adc-res-names = "lowres", "highres";
+                               atmel,adc-use-res = "highres";
+
+                               trigger@0 {
+                                       reg = <0>;
+                                       trigger-name = "timer-counter-0";
+                                       trigger-value = <0x1>;
+                               };
+                               trigger@1 {
+                                       reg = <1>;
+                                       trigger-name = "timer-counter-1";
+                                       trigger-value = <0x3>;
+                               };
+
+                               trigger@2 {
+                                       reg = <2>;
+                                       trigger-name = "timer-counter-2";
+                                       trigger-value = <0x5>;
+                               };
+
+                               trigger@3 {
+                                       reg = <3>;
+                                       trigger-name = "external";
+                                       trigger-value = <0x13>;
+                                       trigger-external;
+                               };
+                       };
+
+                       usb0: gadget@fffd4000 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               compatible = "atmel,at91sam9rl-udc";
+                               reg = <0x00600000 0x100000>,
+                                     <0xfffd4000 0x4000>;
+                               interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
+                               clocks = <&udphs_clk>, <&utmi>;
+                               clock-names = "pclk", "hclk";
+                               status = "disabled";
+
+                               ep0 {
+                                       reg = <0>;
+                                       atmel,fifo-size = <64>;
+                                       atmel,nb-banks = <1>;
+                               };
+
+                               ep1 {
+                                       reg = <1>;
+                                       atmel,fifo-size = <1024>;
+                                       atmel,nb-banks = <2>;
+                                       atmel,can-dma;
+                                       atmel,can-isoc;
+                               };
+
+                               ep2 {
+                                       reg = <2>;
+                                       atmel,fifo-size = <1024>;
+                                       atmel,nb-banks = <2>;
+                                       atmel,can-dma;
+                                       atmel,can-isoc;
+                               };
+
+                               ep3 {
+                                       reg = <3>;
+                                       atmel,fifo-size = <1024>;
+                                       atmel,nb-banks = <3>;
+                                       atmel,can-dma;
+                               };
+
+                               ep4 {
+                                       reg = <4>;
+                                       atmel,fifo-size = <1024>;
+                                       atmel,nb-banks = <3>;
+                                       atmel,can-dma;
+                               };
+
+                               ep5 {
+                                       reg = <5>;
+                                       atmel,fifo-size = <1024>;
+                                       atmel,nb-banks = <3>;
+                                       atmel,can-dma;
+                                       atmel,can-isoc;
+                               };
+
+                               ep6 {
+                                       reg = <6>;
+                                       atmel,fifo-size = <1024>;
+                                       atmel,nb-banks = <3>;
+                                       atmel,can-dma;
+                                       atmel,can-isoc;
+                               };
+                       };
+
                        ramc0: ramc@ffffea00 {
                                compatible = "atmel,at91sam9260-sdramc";
                                reg = <0xffffea00 0x200>;
                                        <0x003fffff 0x0001ff3c>;  /* pioD */
 
                                /* shared pinctrl settings */
+                               adc0 {
+                                       pinctrl_adc0_ts: adc0_ts-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+                                                       <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+                                                       <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+                                                       <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+                                       };
+
+                                       pinctrl_adc0_ad0: adc0_ad0-0 {
+                                               atmel,pins = <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+                                       };
+
+                                       pinctrl_adc0_ad1: adc0_ad1-0 {
+                                               atmel,pins = <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+                                       };
+
+                                       pinctrl_adc0_ad2: adc0_ad2-0 {
+                                               atmel,pins = <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+                                       };
+
+                                       pinctrl_adc0_ad3: adc0_ad3-0 {
+                                               atmel,pins = <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+                                       };
+
+                                       pinctrl_adc0_ad4: adc0_ad4-0 {
+                                               atmel,pins = <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+                                       };
+
+                                       pinctrl_adc0_ad5: adc0_ad5-0 {
+                                               atmel,pins = <AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+                                       };
+
+                                       pinctrl_adc0_adtrg: adc0_adtrg-0 {
+                                               atmel,pins = <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+                                       };
+                               };
+
                                dbgu {
                                        pinctrl_dbgu: dbgu-0 {
                                                atmel,pins =
                                        };
                                };
 
+                               fb {
+                                       pinctrl_fb: fb-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>,
+                                                       <AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+                                                       <AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+                                                       <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+                                                       <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+                                                       <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>,
+                                                       <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>,
+                                                       <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>,
+                                                       <AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE>,
+                                                       <AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_NONE>,
+                                                       <AT91_PIOC 15 AT91_PERIPH_B AT91_PINCTRL_NONE>,
+                                                       <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>,
+                                                       <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>,
+                                                       <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>,
+                                                       <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>,
+                                                       <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>,
+                                                       <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>,
+                                                       <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>,
+                                                       <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>,
+                                                       <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>,
+                                                       <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+                                       };
+                               };
+
                                i2c_gpio0 {
                                        pinctrl_i2c_gpio0: i2c_gpio0-0 {
                                                atmel,pins =
                                        };
                                };
 
+                               pwm0 {
+                                       pinctrl_pwm0_pwm0_0: pwm0_pwm0-0 {
+                                               atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+                                       };
+
+                                       pinctrl_pwm0_pwm0_1: pwm0_pwm0-1 {
+                                               atmel,pins = <AT91_PIOC 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+                                       };
+
+                                       pinctrl_pwm0_pwm0_2: pwm0_pwm0-2 {
+                                               atmel,pins = <AT91_PIOD 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+                                       };
+
+                                       pinctrl_pwm0_pwm1_0: pwm0_pwm1-0 {
+                                               atmel,pins = <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+                                       };
+
+                                       pinctrl_pwm0_pwm1_1: pwm0_pwm1-1 {
+                                               atmel,pins = <AT91_PIOC 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+                                       };
+
+                                       pinctrl_pwm0_pwm1_2: pwm0_pwm1-2 {
+                                               atmel,pins = <AT91_PIOD 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+                                       };
+
+                                       pinctrl_pwm0_pwm2_0: pwm0_pwm2-0 {
+                                               atmel,pins = <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+                                       };
+
+                                       pinctrl_pwm0_pwm2_1: pwm0_pwm2-1 {
+                                               atmel,pins = <AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+                                       };
+
+                                       pinctrl_pwm0_pwm2_2: pwm0_pwm2-2 {
+                                               atmel,pins = <AT91_PIOD 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+                                       };
+
+                                       pinctrl_pwm0_pwm3_0: pwm0_pwm3-0 {
+                                               atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+                                       };
+
+                                       pinctrl_pwm0_pwm3_1: pwm0_pwm3-1 {
+                                               atmel,pins = <AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+                                       };
+                               };
+
+                               spi0 {
+                                       pinctrl_spi0: spi0-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+                                                       <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+                                                       <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+                                       };
+                               };
+
                                ssc0 {
                                        pinctrl_ssc0_tx: ssc0_tx-0 {
                                                atmel,pins =
                                        };
                                };
 
-                               spi0 {
-                                       pinctrl_spi0: spi0-0 {
-                                               atmel,pins =
-                                                       <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
-                                                       <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>,
-                                                       <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
-                                       };
-                               };
-
                                tcb0 {
                                        pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
                                                atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
                                #size-cells = <0>;
                                #interrupt-cells = <1>;
 
-                               clk32k: slck {
-                                       compatible = "fixed-clock";
-                                       #clock-cells = <0>;
-                                       clock-frequency = <32768>;
-                               };
-
                                main: mainck {
                                        compatible = "atmel,at91rm9200-clk-main";
                                        #clock-cells = <0>;
                                        interrupts-extended = <&pmc AT91_PMC_MOSCS>;
-                                       clocks = <&clk32k>;
+                                       clocks = <&main_xtal>;
                                };
 
                                plla: pllack {
                                        clocks = <&main>;
                                        reg = <0>;
                                        atmel,clk-input-range = <1000000 32000000>;
-                                       #atmel,pll-clk-output-range-cells = <4>;
-                                       atmel,pll-clk-output-ranges = <80000000 200000000 190000000 240000000>;
+                                       #atmel,pll-clk-output-range-cells = <3>;
+                                       atmel,pll-clk-output-ranges = <80000000 200000000 0>,
+                                                               <190000000 240000000 2>;
                                };
 
                                utmi: utmick {
                                        interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
                                        clocks = <&clk32k>, <&main>, <&plla>, <&utmi>;
                                        atmel,clk-output-range = <0 94000000>;
-                                       atmel,clk-divisors = <1 2 4 3>;
+                                       atmel,clk-divisors = <1 2 4 0>;
                                };
 
                                prog: progck {
                                interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
                                status = "disabled";
                        };
+
+                       sckc@fffffd50 {
+                               compatible = "atmel,at91sam9x5-sckc";
+                               reg = <0xfffffd50 0x4>;
+
+                               slow_osc: slow_osc {
+                                       compatible = "atmel,at91sam9x5-clk-slow-osc";
+                                       #clock-cells = <0>;
+                                       atmel,startup-time-usec = <1200000>;
+                                       clocks = <&slow_xtal>;
+                               };
+
+                               slow_rc_osc: slow_rc_osc {
+                                       compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
+                                       #clock-cells = <0>;
+                                       atmel,startup-time-usec = <75>;
+                                       clock-frequency = <32768>;
+                                       clock-accuracy = <50000000>;
+                               };
+
+                               clk32k: slck {
+                                       compatible = "atmel,at91sam9x5-clk-slow";
+                                       #clock-cells = <0>;
+                                       clocks = <&slow_rc_osc &slow_osc>;
+                               };
+                       };
                };
        };
 
index cddb37825fad5adc5990b1cbfa216853ce62b3bb..d4a010e40fe3e2803e9e3e4fdd171ffa35e98cb1 100644 (file)
                reg = <0x20000000 0x4000000>;
        };
 
+
+       slow_xtal {
+               clock-frequency = <32768>;
+       };
+
+       main_xtal {
+               clock-frequency = <12000000>;
+       };
+
        clocks {
                #address-cells = <1>;
                #size-cells = <1>;
        };
 
        ahb {
+               fb0: fb@00500000 {
+                       display = <&display0>;
+                       status = "okay";
+
+                       display0: display {
+                               bits-per-pixel = <16>;
+                               atmel,lcdcon-backlight;
+                               atmel,dmacon = <0x1>;
+                               atmel,lcdcon2 = <0x80008002>;
+                               atmel,guard-time = <1>;
+                               atmel,lcd-wiring-mode = "RGB";
+
+                               display-timings {
+                                       native-mode = <&timing0>;
+                                       timing0: timing0 {
+                                               clock-frequency = <4965000>;
+                                               hactive = <240>;
+                                               vactive = <320>;
+                                               hback-porch = <1>;
+                                               hfront-porch = <33>;
+                                               vback-porch = <1>;
+                                               vfront-porch = <0>;
+                                               hsync-len = <5>;
+                                               vsync-len = <1>;
+                                               hsync-active = <1>;
+                                               vsync-active = <1>;
+                                       };
+                               };
+                       };
+               };
+
                nand0: nand@40000000 {
                        nand-bus-width = <8>;
                        nand-ecc-mode = "soft";
                                status = "okay";
                        };
 
+                       adc0: adc@fffd0000 {
+                               pinctrl-names = "default";
+                               pinctrl-0 = <
+                                       &pinctrl_adc0_ad0
+                                       &pinctrl_adc0_ad1
+                                       &pinctrl_adc0_ad2
+                                       &pinctrl_adc0_ad3
+                                       &pinctrl_adc0_ad4
+                                       &pinctrl_adc0_ad5
+                                       &pinctrl_adc0_adtrg>;
+                               atmel,adc-ts-wires = <4>;
+                               status = "okay";
+                       };
+
+                       usb0: gadget@fffd4000 {
+                               atmel,vbus-gpio = <&pioA 8 GPIO_ACTIVE_HIGH>;
+                               status = "okay";
+                       };
+
+                       spi0: spi@fffcc000 {
+                               status = "okay";
+                               cs-gpios = <&pioA 28 0>, <0>, <0>, <0>;
+                               mtd_dataflash@0 {
+                                       compatible = "atmel,at45", "atmel,dataflash";
+                                       spi-max-frequency = <15000000>;
+                                       reg = <0>;
+                               };
+                       };
+
+                       pwm0: pwm@fffc8000 {
+                               status = "okay";
+
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_pwm0_pwm1_2>,
+                                       <&pinctrl_pwm0_pwm2_2>;
+                       };
+
                        dbgu: serial@fffff200 {
                                status = "okay";
                        };
                };
        };
 
-       leds {
-               compatible = "gpio-leds";
+       pwmleds {
+               compatible = "pwm-leds";
 
                ds1 {
                        label = "ds1";
-                       gpios = <&pioD 15 GPIO_ACTIVE_LOW>;
+                       pwms = <&pwm0 1 5000 PWM_POLARITY_INVERTED>;
+                       max-brightness = <255>;
                };
 
                ds2 {
                        label = "ds2";
-                       gpios = <&pioD 16 GPIO_ACTIVE_LOW>;
+                       pwms = <&pwm0 2 5000 PWM_POLARITY_INVERTED>;
+                       max-brightness = <255>;
                };
+       };
+
+       leds {
+               compatible = "gpio-leds";
 
                ds3 {
                        label = "ds3";
                        gpio-key,wakeup;
                };
        };
+
+       i2c@0 {
+               status = "okay";
+       };
+
+       i2c@1 {
+               status = "okay";
+       };
 };
index fc13c9240da85c43c98f5aacdfc1bf76c1b955dc..1a57298636a5b6307bd27a23e42f3678b02fe63d 100644 (file)
@@ -14,6 +14,7 @@
 #include <dt-bindings/pinctrl/at91.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/at91.h>
 
 / {
        model = "Atmel AT91SAM9x5 family SoC";
                reg = <0x20000000 0x10000000>;
        };
 
+       slow_xtal: slow_xtal {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <0>;
+       };
+
+       main_xtal: main_xtal {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <0>;
+       };
+
+       adc_op_clk: adc_op_clk{
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <5000000>;
+       };
+
        ahb {
                compatible = "simple-bus";
                #address-cells = <1>;
                        };
 
                        pmc: pmc@fffffc00 {
-                               compatible = "atmel,at91rm9200-pmc";
+                               compatible = "atmel,at91sam9x5-pmc";
                                reg = <0xfffffc00 0x100>;
+                               interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+                               interrupt-controller;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               #interrupt-cells = <1>;
+
+                               main_rc_osc: main_rc_osc {
+                                       compatible = "atmel,at91sam9x5-clk-main-rc-osc";
+                                       #clock-cells = <0>;
+                                       interrupts-extended = <&pmc AT91_PMC_MOSCRCS>;
+                                       clock-frequency = <12000000>;
+                                       clock-accuracy = <50000000>;
+                               };
+
+                               main_osc: main_osc {
+                                       compatible = "atmel,at91rm9200-clk-main-osc";
+                                       #clock-cells = <0>;
+                                       interrupts-extended = <&pmc AT91_PMC_MOSCS>;
+                                       clocks = <&main_xtal>;
+                               };
+
+                               main: mainck {
+                                       compatible = "atmel,at91sam9x5-clk-main";
+                                       #clock-cells = <0>;
+                                       interrupts-extended = <&pmc AT91_PMC_MOSCSELS>;
+                                       clocks = <&main_rc_osc>, <&main_osc>;
+                               };
+
+                               plla: pllack {
+                                       compatible = "atmel,at91rm9200-clk-pll";
+                                       #clock-cells = <0>;
+                                       interrupts-extended = <&pmc AT91_PMC_LOCKA>;
+                                       clocks = <&main>;
+                                       reg = <0>;
+                                       atmel,clk-input-range = <2000000 32000000>;
+                                       #atmel,pll-clk-output-range-cells = <4>;
+                                       atmel,pll-clk-output-ranges = <745000000 800000000 0 0
+                                                                      695000000 750000000 1 0
+                                                                      645000000 700000000 2 0
+                                                                      595000000 650000000 3 0
+                                                                      545000000 600000000 0 1
+                                                                      495000000 555000000 1 1
+                                                                      445000000 500000000 1 2
+                                                                      400000000 450000000 1 3>;
+                               };
+
+                               plladiv: plladivck {
+                                       compatible = "atmel,at91sam9x5-clk-plldiv";
+                                       #clock-cells = <0>;
+                                       clocks = <&plla>;
+                               };
+
+                               utmi: utmick {
+                                       compatible = "atmel,at91sam9x5-clk-utmi";
+                                       #clock-cells = <0>;
+                                       interrupts-extended = <&pmc AT91_PMC_LOCKU>;
+                                       clocks = <&main>;
+                               };
+
+                               mck: masterck {
+                                       compatible = "atmel,at91sam9x5-clk-master";
+                                       #clock-cells = <0>;
+                                       interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
+                                       clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
+                                       atmel,clk-output-range = <0 133333333>;
+                                       atmel,clk-divisors = <1 2 4 3>;
+                                       atmel,master-clk-have-div3-pres;
+                               };
+
+                               usb: usbck {
+                                       compatible = "atmel,at91sam9x5-clk-usb";
+                                       #clock-cells = <0>;
+                                       clocks = <&plladiv>, <&utmi>;
+                               };
+
+                               prog: progck {
+                                       compatible = "atmel,at91sam9x5-clk-programmable";
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+                                       interrupt-parent = <&pmc>;
+                                       clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
+
+                                       prog0: prog0 {
+                                               #clock-cells = <0>;
+                                               reg = <0>;
+                                               interrupts = <AT91_PMC_PCKRDY(0)>;
+                                       };
+
+                                       prog1: prog1 {
+                                               #clock-cells = <0>;
+                                               reg = <1>;
+                                               interrupts = <AT91_PMC_PCKRDY(1)>;
+                                       };
+                               };
+
+                               smd: smdclk {
+                                       compatible = "atmel,at91sam9x5-clk-smd";
+                                       #clock-cells = <0>;
+                                       clocks = <&plladiv>, <&utmi>;
+                               };
+
+                               systemck {
+                                       compatible = "atmel,at91rm9200-clk-system";
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       ddrck: ddrck {
+                                               #clock-cells = <0>;
+                                               reg = <2>;
+                                               clocks = <&mck>;
+                                       };
+
+                                       smdck: smdck {
+                                               #clock-cells = <0>;
+                                               reg = <4>;
+                                               clocks = <&smd>;
+                                       };
+
+                                       uhpck: uhpck {
+                                               #clock-cells = <0>;
+                                               reg = <6>;
+                                               clocks = <&usb>;
+                                       };
+
+                                       udpck: udpck {
+                                               #clock-cells = <0>;
+                                               reg = <7>;
+                                               clocks = <&usb>;
+                                       };
+
+                                       pck0: pck0 {
+                                               #clock-cells = <0>;
+                                               reg = <8>;
+                                               clocks = <&prog0>;
+                                       };
+
+                                       pck1: pck1 {
+                                               #clock-cells = <0>;
+                                               reg = <9>;
+                                               clocks = <&prog1>;
+                                       };
+                               };
+
+                               periphck {
+                                       compatible = "atmel,at91sam9x5-clk-peripheral";
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+                                       clocks = <&mck>;
+
+                                       pioAB_clk: pioAB_clk {
+                                               #clock-cells = <0>;
+                                               reg = <2>;
+                                       };
+
+                                       pioCD_clk: pioCD_clk {
+                                               #clock-cells = <0>;
+                                               reg = <3>;
+                                       };
+
+                                       smd_clk: smd_clk {
+                                               #clock-cells = <0>;
+                                               reg = <4>;
+                                       };
+
+                                       usart0_clk: usart0_clk {
+                                               #clock-cells = <0>;
+                                               reg = <5>;
+                                       };
+
+                                       usart1_clk: usart1_clk {
+                                               #clock-cells = <0>;
+                                               reg = <6>;
+                                       };
+
+                                       usart2_clk: usart2_clk {
+                                               #clock-cells = <0>;
+                                               reg = <7>;
+                                       };
+
+                                       twi0_clk: twi0_clk {
+                                               reg = <9>;
+                                               #clock-cells = <0>;
+                                       };
+
+                                       twi1_clk: twi1_clk {
+                                               #clock-cells = <0>;
+                                               reg = <10>;
+                                       };
+
+                                       twi2_clk: twi2_clk {
+                                               #clock-cells = <0>;
+                                               reg = <11>;
+                                       };
+
+                                       mci0_clk: mci0_clk {
+                                               #clock-cells = <0>;
+                                               reg = <12>;
+                                       };
+
+                                       spi0_clk: spi0_clk {
+                                               #clock-cells = <0>;
+                                               reg = <13>;
+                                       };
+
+                                       spi1_clk: spi1_clk {
+                                               #clock-cells = <0>;
+                                               reg = <14>;
+                                       };
+
+                                       uart0_clk: uart0_clk {
+                                               #clock-cells = <0>;
+                                               reg = <15>;
+                                       };
+
+                                       uart1_clk: uart1_clk {
+                                               #clock-cells = <0>;
+                                               reg = <16>;
+                                       };
+
+                                       tcb0_clk: tcb0_clk {
+                                               #clock-cells = <0>;
+                                               reg = <17>;
+                                       };
+
+                                       pwm_clk: pwm_clk {
+                                               #clock-cells = <0>;
+                                               reg = <18>;
+                                       };
+
+                                       adc_clk: adc_clk {
+                                               #clock-cells = <0>;
+                                               reg = <19>;
+                                       };
+
+                                       dma0_clk: dma0_clk {
+                                               #clock-cells = <0>;
+                                               reg = <20>;
+                                       };
+
+                                       dma1_clk: dma1_clk {
+                                               #clock-cells = <0>;
+                                               reg = <21>;
+                                       };
+
+                                       uhphs_clk: uhphs_clk {
+                                               #clock-cells = <0>;
+                                               reg = <22>;
+                                       };
+
+                                       udphs_clk: udphs_clk {
+                                               #clock-cells = <0>;
+                                               reg = <23>;
+                                       };
+
+                                       mci1_clk: mci1_clk {
+                                               #clock-cells = <0>;
+                                               reg = <26>;
+                                       };
+
+                                       ssc0_clk: ssc0_clk {
+                                               #clock-cells = <0>;
+                                               reg = <28>;
+                                       };
+                               };
                        };
 
                        rstc@fffffe00 {
                                compatible = "atmel,at91sam9260-pit";
                                reg = <0xfffffe30 0xf>;
                                interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+                               clocks = <&mck>;
+                       };
+
+                       sckc@fffffe50 {
+                               compatible = "atmel,at91sam9x5-sckc";
+                               reg = <0xfffffe50 0x4>;
+
+                               slow_osc: slow_osc {
+                                       compatible = "atmel,at91sam9x5-clk-slow-osc";
+                                       #clock-cells = <0>;
+                                       clocks = <&slow_xtal>;
+                               };
+
+                               slow_rc_osc: slow_rc_osc {
+                                       compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
+                                       #clock-cells = <0>;
+                                       clock-frequency = <32768>;
+                                       clock-accuracy = <50000000>;
+                               };
+
+                               clk32k: slck {
+                                       compatible = "atmel,at91sam9x5-clk-slow";
+                                       #clock-cells = <0>;
+                                       clocks = <&slow_rc_osc>, <&slow_osc>;
+                               };
                        };
 
                        tcb0: timer@f8008000 {
                                compatible = "atmel,at91sam9x5-tcb";
                                reg = <0xf8008000 0x100>;
                                interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
+                               clocks = <&tcb0_clk>;
+                               clock-names = "t0_clk";
                        };
 
                        tcb1: timer@f800c000 {
                                compatible = "atmel,at91sam9x5-tcb";
                                reg = <0xf800c000 0x100>;
                                interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
+                               clocks = <&tcb0_clk>;
+                               clock-names = "t0_clk";
                        };
 
                        dma0: dma-controller@ffffec00 {
                                reg = <0xffffec00 0x200>;
                                interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
                                #dma-cells = <2>;
+                               clocks = <&dma0_clk>;
+                               clock-names = "dma_clk";
                        };
 
                        dma1: dma-controller@ffffee00 {
                                reg = <0xffffee00 0x200>;
                                interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
                                #dma-cells = <2>;
+                               clocks = <&dma1_clk>;
+                               clock-names = "dma_clk";
                        };
 
                        pinctrl@fffff400 {
                                        gpio-controller;
                                        interrupt-controller;
                                        #interrupt-cells = <2>;
+                                       clocks = <&pioAB_clk>;
                                };
 
                                pioB: gpio@fffff600 {
                                        #gpio-lines = <19>;
                                        interrupt-controller;
                                        #interrupt-cells = <2>;
+                                       clocks = <&pioAB_clk>;
                                };
 
                                pioC: gpio@fffff800 {
                                        gpio-controller;
                                        interrupt-controller;
                                        #interrupt-cells = <2>;
+                                       clocks = <&pioCD_clk>;
                                };
 
                                pioD: gpio@fffffa00 {
                                        #gpio-lines = <22>;
                                        interrupt-controller;
                                        #interrupt-cells = <2>;
+                                       clocks = <&pioCD_clk>;
                                };
                        };
 
                                dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
+                               clocks = <&ssc0_clk>;
+                               clock-names = "pclk";
                                status = "disabled";
                        };
 
                                dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>;
                                dma-names = "rxtx";
                                pinctrl-names = "default";
+                               clocks = <&mci0_clk>;
+                               clock-names = "mci_clk";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                status = "disabled";
                                dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>;
                                dma-names = "rxtx";
                                pinctrl-names = "default";
+                               clocks = <&mci1_clk>;
+                               clock-names = "mci_clk";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                status = "disabled";
                                interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
                                pinctrl-names = "default";
                                pinctrl-0 = <&pinctrl_dbgu>;
+                               clocks = <&mck>;
+                               clock-names = "usart";
                                status = "disabled";
                        };
 
                                interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
                                pinctrl-names = "default";
                                pinctrl-0 = <&pinctrl_usart0>;
+                               clocks = <&usart0_clk>;
+                               clock-names = "usart";
                                status = "disabled";
                        };
 
                                interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
                                pinctrl-names = "default";
                                pinctrl-0 = <&pinctrl_usart1>;
+                               clocks = <&usart1_clk>;
+                               clock-names = "usart";
                                status = "disabled";
                        };
 
                                interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
                                pinctrl-names = "default";
                                pinctrl-0 = <&pinctrl_usart2>;
+                               clocks = <&usart2_clk>;
+                               clock-names = "usart";
                                status = "disabled";
                        };
 
                                #size-cells = <0>;
                                pinctrl-names = "default";
                                pinctrl-0 = <&pinctrl_i2c0>;
+                               clocks = <&twi0_clk>;
                                status = "disabled";
                        };
 
                                #size-cells = <0>;
                                pinctrl-names = "default";
                                pinctrl-0 = <&pinctrl_i2c1>;
+                               clocks = <&twi1_clk>;
                                status = "disabled";
                        };
 
                                #size-cells = <0>;
                                pinctrl-names = "default";
                                pinctrl-0 = <&pinctrl_i2c2>;
+                               clocks = <&twi2_clk>;
                                status = "disabled";
                        };
 
                                interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
                                pinctrl-names = "default";
                                pinctrl-0 = <&pinctrl_uart0>;
+                               clocks = <&uart0_clk>;
+                               clock-names = "usart";
                                status = "disabled";
                        };
 
                                interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
                                pinctrl-names = "default";
                                pinctrl-0 = <&pinctrl_uart1>;
+                               clocks = <&uart1_clk>;
+                               clock-names = "usart";
                                status = "disabled";
                        };
 
                                compatible = "atmel,at91sam9260-adc";
                                reg = <0xf804c000 0x100>;
                                interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
+                               clocks = <&adc_clk>,
+                                        <&adc_op_clk>;
+                               clock-names = "adc_clk", "adc_op_clk";
                                atmel,adc-use-external-triggers;
                                atmel,adc-channels-used = <0xffff>;
                                atmel,adc-vref = <3300>;
                                dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&pinctrl_spi0>;
+                               clocks = <&spi0_clk>;
+                               clock-names = "spi_clk";
                                status = "disabled";
                        };
 
                                dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&pinctrl_spi1>;
+                               clocks = <&spi1_clk>;
+                               clock-names = "spi_clk";
                                status = "disabled";
                        };
 
                        compatible = "atmel,at91rm9200-ohci", "usb-ohci";
                        reg = <0x00600000 0x100000>;
                        interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
+                       clocks = <&usb>, <&uhphs_clk>, <&udphs_clk>,
+                                <&uhpck>;
+                       clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
                        status = "disabled";
                };
 
                        compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
                        reg = <0x00700000 0x100000>;
                        interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
+                       clocks = <&usb>, <&uhphs_clk>, <&uhpck>;
+                       clock-names = "usb_clk", "ehci_clk", "uhpck";
                        status = "disabled";
                };
        };
diff --git a/arch/arm/boot/dts/at91sam9x5_can.dtsi b/arch/arm/boot/dts/at91sam9x5_can.dtsi
new file mode 100644 (file)
index 0000000..f44ab77
--- /dev/null
@@ -0,0 +1,31 @@
+/*
+ * at91sam9x5_macb0.dtsi - Device Tree Include file for AT91SAM9x5 SoC with 1
+ * Ethernet interface.
+ *
+ * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
+ *
+ * Licensed under GPLv2.
+ */
+
+#include <dt-bindings/pinctrl/at91.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+       ahb {
+               apb {
+                       pmc: pmc@fffffc00 {
+                               periphck {
+                                       can0_clk: can0_clk {
+                                               #clock-cells = <0>;
+                                               reg = <29>;
+                                       };
+
+                                        can1_clk: can1_clk {
+                                                #clock-cells = <0>;
+                                                reg = <30>;
+                                        };
+                               };
+                       };
+               };
+       };
+};
diff --git a/arch/arm/boot/dts/at91sam9x5_isi.dtsi b/arch/arm/boot/dts/at91sam9x5_isi.dtsi
new file mode 100644 (file)
index 0000000..98bc877
--- /dev/null
@@ -0,0 +1,26 @@
+/*
+ * at91sam9x5_isi.dtsi - Device Tree Include file for AT91SAM9x5 SoC with an
+ * Image Sensor Interface.
+ *
+ * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
+ *
+ * Licensed under GPLv2.
+ */
+
+#include <dt-bindings/pinctrl/at91.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+       ahb {
+               apb {
+                       pmc: pmc@fffffc00 {
+                               periphck {
+                                       isi_clk: isi_clk {
+                                               #clock-cells = <0>;
+                                               reg = <25>;
+                                       };
+                               };
+                       };
+               };
+       };
+};
diff --git a/arch/arm/boot/dts/at91sam9x5_lcd.dtsi b/arch/arm/boot/dts/at91sam9x5_lcd.dtsi
new file mode 100644 (file)
index 0000000..485302e
--- /dev/null
@@ -0,0 +1,26 @@
+/*
+ * at91sam9x5_lcd.dtsi - Device Tree Include file for AT91SAM9x5 SoC with an
+ * LCD controller.
+ *
+ * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
+ *
+ * Licensed under GPLv2.
+ */
+
+#include <dt-bindings/pinctrl/at91.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+       ahb {
+               apb {
+                       pmc: pmc@fffffc00 {
+                               periphck {
+                                       lcdc_clk: lcdc_clk {
+                                               #clock-cells = <0>;
+                                               reg = <25>;
+                                       };
+                               };
+                       };
+               };
+       };
+};
index 55731ffba76410861a55871e8de181d98aa17170..57e89d1d03253fd64af8f4c01f807caf9611dfaf 100644 (file)
                                };
                        };
 
+                       pmc: pmc@fffffc00 {
+                               periphck {
+                                       macb0_clk: macb0_clk {
+                                               #clock-cells = <0>;
+                                               reg = <24>;
+                                       };
+                               };
+                       };
+
                        macb0: ethernet@f802c000 {
                                compatible = "cdns,at32ap7000-macb", "cdns,macb";
                                reg = <0xf802c000 0x100>;
                                interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
                                pinctrl-names = "default";
                                pinctrl-0 = <&pinctrl_macb0_rmii>;
+                               clocks = <&macb0_clk>, <&macb0_clk>;
+                               clock-names = "hclk", "pclk";
                                status = "disabled";
                        };
                };
index 77425a627a94598029624b715f45712ab88d92d7..663676c02861ff2e35118f5526d36847edb904e0 100644 (file)
                                };
                        };
 
+                       pmc: pmc@fffffc00 {
+                               periphck {
+                                       macb1_clk: macb1_clk {
+                                               #clock-cells = <0>;
+                                               reg = <27>;
+                                       };
+                               };
+                       };
+
                        macb1: ethernet@f8030000 {
                                compatible = "cdns,at32ap7000-macb", "cdns,macb";
                                reg = <0xf8030000 0x100>;
                                interrupts = <27 IRQ_TYPE_LEVEL_HIGH 3>;
                                pinctrl-names = "default";
                                pinctrl-0 = <&pinctrl_macb1_rmii>;
+                               clocks = <&macb1_clk>, <&macb1_clk>;
+                               clock-names = "hclk", "pclk";
                                status = "disabled";
                        };
                };
index 6801106fa1f8a0fee541e33da838a15033ddb33c..140217a5438460ffb7cd23d327a6635522bf49a1 100644 (file)
                                };
                        };
 
+                       pmc: pmc@fffffc00 {
+                               periphck {
+                                       usart3_clk: usart3_clk {
+                                               #clock-cells = <0>;
+                                               reg = <8>;
+                                       };
+                               };
+                       };
+
                        usart3: serial@f8028000 {
                                compatible = "atmel,at91sam9260-usart";
                                reg = <0xf8028000 0x200>;
                                interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
                                pinctrl-names = "default";
                                pinctrl-0 = <&pinctrl_usart3>;
+                               clocks = <&usart3_clk>;
+                               clock-names = "usart";
                                status = "disabled";
                        };
                };
index 4a5ee5cc115a7e416d6b8b64ae3408619222d6ba..8413e21192ebe973f9eeba5647b7f6a91b85ab31 100644 (file)
                };
        };
 
+       slow_xtal {
+               clock-frequency = <32768>;
+       };
+
+       main_xtal {
+               clock-frequency = <12000000>;
+       };
+
        ahb {
                apb {
                        pinctrl@fffff400 {
index 1c0f8e1893aed11eb3dfb8ca43360cbed2e961f6..149b5509993588aa17971d6fbc7a56f314c658e5 100644 (file)
@@ -80,7 +80,7 @@
        };
 
        /*
-        * The soc node represents the soc top level view. It is uses for IPs
+        * The soc node represents the soc top level view. It is used for IPs
         * that are not memory mapped in the MPU view or for the MPU itself.
         */
        soc {
@@ -94,7 +94,7 @@
        /*
         * XXX: Use a flat representation of the SOC interconnect.
         * The real OMAP interconnect network is quite complex.
-        * Since that will not bring real advantage to represent that in DT for
+        * Since it will not bring real advantage to represent that in DT for
         * the moment, just use a fake OCP bus entry to represent the whole bus
         * hierarchy.
         */
index e96da9a898ad5cda61bc6b1b3195179c5c513eb6..cfb8fc753f5037087d7bbdfa6744d1a8fc283ec9 100644 (file)
                #clock-cells = <0>;
                compatible = "ti,mux-clock";
                clocks = <&abe_24m_fclk>, <&abe_sys_clk_div>, <&func_24m_clk>, <&atlclkin3_ck>, <&atl_clkin2_ck>, <&atl_clkin1_ck>, <&atl_clkin0_ck>, <&sys_clkin2>, <&ref_clkin0_ck>, <&ref_clkin1_ck>, <&ref_clkin2_ck>, <&ref_clkin3_ck>, <&mlb_clk>, <&mlbp_clk>;
-               ti,bit-shift = <28>;
+               ti,bit-shift = <24>;
                reg = <0x1860>;
        };
 
index 2f8bcd068d171644dd5bcd5266b34d64aa315de9..58ff8e28c74f3c01564cb6cf344a76e45f99a1b4 100644 (file)
                status = "disabled";
                #address-cells = <1>;
                #size-cells = <1>;
+               #clock-cells = <1>;
+               clock-output-names = "cam_a_clkout", "cam_b_clkout";
                ranges;
 
-               clock_cam: clock-controller {
-                        #clock-cells = <1>;
-               };
-
                fimc_0: fimc@11800000 {
                        compatible = "samsung,exynos4210-fimc";
                        reg = <0x11800000 0x1000>;
                interrupts = <0 60 0>;
                clocks = <&clock CLK_I2C2>;
                clock-names = "i2c";
+               pinctrl-names = "default";
+               pinctrl-0 = <&i2c2_bus>;
                status = "disabled";
        };
 
                interrupts = <0 61 0>;
                clocks = <&clock CLK_I2C3>;
                clock-names = "i2c";
+               pinctrl-names = "default";
+               pinctrl-0 = <&i2c3_bus>;
                status = "disabled";
        };
 
                interrupts = <0 62 0>;
                clocks = <&clock CLK_I2C4>;
                clock-names = "i2c";
+               pinctrl-names = "default";
+               pinctrl-0 = <&i2c4_bus>;
                status = "disabled";
        };
 
                interrupts = <0 63 0>;
                clocks = <&clock CLK_I2C5>;
                clock-names = "i2c";
+               pinctrl-names = "default";
+               pinctrl-0 = <&i2c5_bus>;
                status = "disabled";
        };
 
                interrupts = <0 64 0>;
                clocks = <&clock CLK_I2C6>;
                clock-names = "i2c";
+               pinctrl-names = "default";
+               pinctrl-0 = <&i2c6_bus>;
                status = "disabled";
        };
 
                interrupts = <0 65 0>;
                clocks = <&clock CLK_I2C7>;
                clock-names = "i2c";
+               pinctrl-names = "default";
+               pinctrl-0 = <&i2c7_bus>;
                status = "disabled";
        };
 
index 63e34b24b04f7fbf35b4f78e7e17ee8b4a314d05..9296dee10e264035e774c6a21b0a5d782eb4c52b 100644 (file)
                bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rw rootwait earlyprintk panic=5 maxcpus=1";
        };
 
+       sysram@02020000 {
+               smp-sysram@0 {
+                       status = "disabled";
+               };
+
+               smp-sysram@5000 {
+                       compatible = "samsung,exynos4210-sysram";
+                       reg = <0x5000 0x1000>;
+               };
+
+               smp-sysram@1f000 {
+                       status = "disabled";
+               };
+       };
+
        mct@10050000 {
                compatible = "none";
        };
index cacf6140dd2f58be5351f797d889d8b0563e461c..ee3001f38821a7d9ad32b93be4ad414a4f3070e6 100644 (file)
                pinctrl2 = &pinctrl_2;
        };
 
+       sysram@02020000 {
+               compatible = "mmio-sram";
+               reg = <0x02020000 0x20000>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges = <0 0x02020000 0x20000>;
+
+               smp-sysram@0 {
+                       compatible = "samsung,exynos4210-sysram";
+                       reg = <0x0 0x1000>;
+               };
+
+               smp-sysram@1f000 {
+                       compatible = "samsung,exynos4210-sysram-ns";
+                       reg = <0x1f000 0x1000>;
+               };
+       };
+
        pd_lcd1: lcd1-power-domain@10023CA0 {
                compatible = "samsung,exynos4210-pd";
                reg = <0x10023CA0 0x20>;
index 9583563dd0ef7a3f0d4cd89765a20bb243b10117..f621fd976815cfcd93bd0d636a16ba34c1e1a0de 100644 (file)
@@ -20,7 +20,7 @@
        compatible = "samsung,trats2", "samsung,exynos4412", "samsung,exynos4";
 
        aliases {
-               i2c8 = &i2c_ak8975;
+               i2c9 = &i2c_ak8975;
        };
 
        memory {
                        enable-active-high;
                };
 
-               /* More to come */
+               cam_af_reg: voltage-regulator-3 {
+                       compatible = "regulator-fixed";
+                       regulator-name = "CAM_AF";
+                       regulator-min-microvolt = <2800000>;
+                       regulator-max-microvolt = <2800000>;
+                       gpio = <&gpm0 4 0>;
+                       enable-active-high;
+               };
+
+               cam_isp_core_reg: voltage-regulator-4 {
+                       compatible = "regulator-fixed";
+                       regulator-name = "CAM_ISP_CORE_1.2V_EN";
+                       regulator-min-microvolt = <1200000>;
+                       regulator-max-microvolt = <1200000>;
+                       gpio = <&gpm0 3 0>;
+                       enable-active-high;
+                       regulator-always-on;
+               };
        };
 
        gpio-keys {
                };
        };
 
+       i2c_0: i2c@13860000 {
+               samsung,i2c-sda-delay = <100>;
+               samsung,i2c-slave-addr = <0x10>;
+               samsung,i2c-max-bus-freq = <400000>;
+               pinctrl-0 = <&i2c0_bus>;
+               pinctrl-names = "default";
+               status = "okay";
+
+               s5c73m3@3c {
+                       compatible = "samsung,s5c73m3";
+                       reg = <0x3c>;
+                       standby-gpios = <&gpm0 1 1>;   /* ISP_STANDBY */
+                       xshutdown-gpios = <&gpf1 3 1>; /* ISP_RESET */
+                       vdd-int-supply = <&buck9_reg>;
+                       vddio-cis-supply = <&ldo9_reg>;
+                       vdda-supply = <&ldo17_reg>;
+                       vddio-host-supply = <&ldo18_reg>;
+                       vdd-af-supply = <&cam_af_reg>;
+                       vdd-reg-supply = <&cam_io_reg>;
+                       clock-frequency = <24000000>;
+                       /* CAM_A_CLKOUT */
+                       clocks = <&camera 0>;
+                       clock-names = "cis_extclk";
+                       port {
+                               s5c73m3_ep: endpoint {
+                                       remote-endpoint = <&csis0_ep>;
+                                       data-lanes = <1 2 3 4>;
+                               };
+                       };
+               };
+       };
+
        i2c@138D0000 {
                samsung,i2c-sda-delay = <100>;
                samsung,i2c-slave-addr = <0x10>;
                status = "okay";
        };
 
-       camera {
-               pinctrl-0 = <&cam_port_b_clk_active>;
+       camera: camera {
+               pinctrl-0 = <&cam_port_a_clk_active &cam_port_b_clk_active>;
                pinctrl-names = "default";
                status = "okay";
 
                        status = "okay";
                };
 
+               csis_0: csis@11880000 {
+                       status = "okay";
+                       vddcore-supply = <&ldo8_reg>;
+                       vddio-supply = <&ldo10_reg>;
+                       clock-frequency = <176000000>;
+
+                       /* Camera C (3) MIPI CSI-2 (CSIS0) */
+                       port@3 {
+                               reg = <3>;
+                               csis0_ep: endpoint {
+                                       remote-endpoint = <&s5c73m3_ep>;
+                                       data-lanes = <1 2 3 4>;
+                                       samsung,csis-hs-settle = <12>;
+                               };
+                       };
+               };
+
                csis_1: csis@11890000 {
                        vddcore-supply = <&ldo8_reg>;
                        vddio-supply = <&ldo10_reg>;
                                        reg = <0x10>;
                                        svdda-supply = <&cam_io_reg>;
                                        svddio-supply = <&ldo19_reg>;
+                                       afvdd-supply = <&ldo19_reg>;
                                        clock-frequency = <24000000>;
                                        /* CAM_B_CLKOUT */
-                                       clocks = <&clock_cam 1>;
-                                       clock-names = "mclk";
+                                       clocks = <&camera 1>;
+                                       clock-names = "extclk";
                                        samsung,camclk-out = <1>;
                                        gpios = <&gpm1 6 0>;
 
index c4a9306f8529ab84ce3836781d1795b83c735e15..70e3765b51eee263bd921f35c57dafcb1936ca9f 100644 (file)
                interrupts = <2 2>, <3 2>, <18 2>, <19 2>;
        };
 
+       sysram@02020000 {
+               compatible = "mmio-sram";
+               reg = <0x02020000 0x40000>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges = <0 0x02020000 0x40000>;
+
+               smp-sysram@0 {
+                       compatible = "samsung,exynos4210-sysram";
+                       reg = <0x0 0x1000>;
+               };
+
+               smp-sysram@2f000 {
+                       compatible = "samsung,exynos4210-sysram-ns";
+                       reg = <0x2f000 0x1000>;
+               };
+       };
+
        pd_isp: isp-power-domain@10023CA0 {
                compatible = "samsung,exynos4210-pd";
                reg = <0x10023CA0 0x20>;
index 2c1560d52f1aea24bec737694ba680ea8caa63f8..89ac90f59e2efbd1419daa401abb6b5703ca1ac0 100644 (file)
                samsung,i2c-sda-delay = <100>;
                samsung,i2c-max-bus-freq = <378000>;
 
-               hdmiphy@38 {
+               hdmiphy: hdmiphy@38 {
                        compatible = "samsung,exynos4212-hdmiphy";
                        reg = <0x38>;
                };
 
        hdmi {
                hpd-gpio = <&gpx3 7 0>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&hdmi_hpd_irq>;
+               phy = <&hdmiphy>;
+               ddc = <&i2c_2>;
        };
 
        gpio-keys {
index 9a49e6804ae15587f13a3bb6c0052e3968e27a19..886cfca044ace2deecd63c1c1378891758d6d968 100644 (file)
                        samsung,pin-drv = <0>;
                };
 
+               pwm0_out: pwm0-out {
+                       samsung,pins = "gpb2-0";
+                       samsung,pin-function = <2>;
+                       samsung,pin-pud = <0>;
+                       samsung,pin-drv = <0>;
+               };
+
+               pwm1_out: pwm1-out {
+                       samsung,pins = "gpb2-1";
+                       samsung,pin-function = <2>;
+                       samsung,pin-pud = <0>;
+                       samsung,pin-drv = <0>;
+               };
+
+               pwm2_out: pwm2-out {
+                       samsung,pins = "gpb2-2";
+                       samsung,pin-function = <2>;
+                       samsung,pin-pud = <0>;
+                       samsung,pin-drv = <0>;
+               };
+
+               pwm3_out: pwm3-out {
+                       samsung,pins = "gpb2-3";
+                       samsung,pin-function = <2>;
+                       samsung,pin-pud = <0>;
+                       samsung,pin-drv = <0>;
+               };
+
                i2c7_bus: i2c7-bus {
                        samsung,pins = "gpb2-2", "gpb2-3";
                        samsung,pin-function = <3>;
index 1ce1088a00fb5828e168888fcc0bab677cb1844f..079fdf9e3f1870076a8e6123ff9d140ce46e2617 100644 (file)
        };
 
        pinctrl@11400000 {
+               ec_irq: ec-irq {
+                       samsung,pins = "gpx1-6";
+                       samsung,pin-function = <0>;
+                       samsung,pin-pud = <0>;
+                       samsung,pin-drv = <0>;
+               };
+
                sd3_clk: sd3-clk {
                        samsung,pin-drv = <0>;
                };
                sd3_bus4: sd3-bus-width4 {
                        samsung,pin-drv = <0>;
                };
+
+               max98095_en: max98095-en {
+                       samsung,pins = "gpx1-7";
+                       samsung,pin-function = <0>;
+                       samsung,pin-pud = <3>;
+                       samsung,pin-drv = <0>;
+               };
+
+               tps65090_irq: tps65090-irq {
+                       samsung,pins = "gpx2-6";
+                       samsung,pin-function = <0>;
+                       samsung,pin-pud = <0>;
+                       samsung,pin-drv = <0>;
+               };
+
+               usb3_vbus_en: usb3-vbus-en {
+                       samsung,pins = "gpx2-7";
+                       samsung,pin-function = <1>;
+                       samsung,pin-pud = <0>;
+                       samsung,pin-drv = <0>;
+               };
+
+               hdmi_hpd_irq: hdmi-hpd-irq {
+                       samsung,pins = "gpx3-7";
+                       samsung,pin-function = <0>;
+                       samsung,pin-pud = <1>;
+                       samsung,pin-drv = <0>;
+               };
+       };
+
+       pinctrl@13400000 {
+               arb_their_claim: arb-their-claim {
+                       samsung,pins = "gpe0-4";
+                       samsung,pin-function = <0>;
+                       samsung,pin-pud = <3>;
+                       samsung,pin-drv = <0>;
+               };
+
+               arb_our_claim: arb-our-claim {
+                       samsung,pins = "gpf0-3";
+                       samsung,pin-function = <1>;
+                       samsung,pin-pud = <0>;
+                       samsung,pin-drv = <0>;
+               };
        };
 
        gpio-keys {
                };
        };
 
+       vbat: vbat-fixed-regulator {
+               compatible = "regulator-fixed";
+               regulator-name = "vbat-supply";
+               regulator-boot-on;
+       };
+
        i2c-arbitrator {
                compatible = "i2c-arb-gpio-challenge";
                #address-cells = <1>;
                wait-retry-us = <3000>;
                wait-free-us = <50000>;
 
+               pinctrl-names = "default";
+               pinctrl-0 = <&arb_our_claim &arb_their_claim>;
+
                /* Use ID 104 as a hint that we're on physical bus 4 */
                i2c_104: i2c@0 {
                        reg = <0>;
                                reg = <0x1e>;
                                interrupts = <6 0>;
                                interrupt-parent = <&gpx1>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&ec_irq>;
                                wakeup-source;
 
                                keyboard-controller {
                                                        0x070c0069>;    /* LEFT */
                                };
                        };
+
+                       power-regulator {
+                               compatible = "ti,tps65090";
+                               reg = <0x48>;
+
+                               /*
+                                * Config irq to disable internal pulls
+                                * even though we run in polling mode.
+                                */
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&tps65090_irq>;
+
+                               vsys1-supply = <&vbat>;
+                               vsys2-supply = <&vbat>;
+                               vsys3-supply = <&vbat>;
+                               infet1-supply = <&vbat>;
+                               infet2-supply = <&vbat>;
+                               infet3-supply = <&vbat>;
+                               infet4-supply = <&vbat>;
+                               infet5-supply = <&vbat>;
+                               infet6-supply = <&vbat>;
+                               infet7-supply = <&vbat>;
+                               vsys-l1-supply = <&vbat>;
+                               vsys-l2-supply = <&vbat>;
+
+                               regulators {
+                                       dcdc1 {
+                                               ti,enable-ext-control;
+                                       };
+                                       dcdc2 {
+                                               ti,enable-ext-control;
+                                       };
+                                       dcdc3 {
+                                               ti,enable-ext-control;
+                                       };
+                                       fet1 {
+                                               regulator-name = "vcd_led";
+                                               ti,overcurrent-wait = <3>;
+                                       };
+                                       tps65090_fet2: fet2 {
+                                               regulator-name = "video_mid";
+                                               regulator-always-on;
+                                               ti,overcurrent-wait = <3>;
+                                       };
+                                       fet3 {
+                                               regulator-name = "wwan_r";
+                                               regulator-always-on;
+                                               ti,overcurrent-wait = <3>;
+                                       };
+                                       fet4 {
+                                               regulator-name = "sdcard";
+                                               ti,overcurrent-wait = <3>;
+                                       };
+                                       fet5 {
+                                               regulator-name = "camout";
+                                               regulator-always-on;
+                                               ti,overcurrent-wait = <3>;
+                                       };
+                                       fet6 {
+                                               regulator-name = "lcd_vdd";
+                                               ti,overcurrent-wait = <3>;
+                                       };
+                                       tps65090_fet7: fet7 {
+                                               regulator-name = "video_mid_1a";
+                                               regulator-always-on;
+                                               ti,overcurrent-wait = <3>;
+                                       };
+                                       ldo1 {
+                                       };
+                                       ldo2 {
+                                       };
+                               };
+
+                               charger {
+                                       compatible = "ti,tps65090-charger";
+                               };
+                       };
                };
        };
 
                };
        };
 
+       i2c@12CD0000 {
+               max98095: codec@11 {
+                       compatible = "maxim,max98095";
+                       reg = <0x11>;
+                       pinctrl-0 = <&max98095_en>;
+                       pinctrl-names = "default";
+               };
+       };
+
+       i2s0: i2s@03830000 {
+               status = "okay";
+       };
+
+       sound {
+               compatible = "google,snow-audio-max98095";
+
+               samsung,i2s-controller = <&i2s0>;
+               samsung,audio-codec = <&max98095>;
+       };
+
+       usb3_vbus_reg: regulator-usb3 {
+               compatible = "regulator-fixed";
+               regulator-name = "P5.0V_USB3CON";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               gpio = <&gpx2 7 0>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&usb3_vbus_en>;
+               enable-active-high;
+       };
+
+       phy@12100000 {
+               vbus-supply = <&usb3_vbus_reg>;
+       };
+
        usb@12110000 {
                samsung,vbus-gpio = <&gpx1 1 0>;
        };
                        clock-frequency = <24000000>;
                };
        };
+
+       hdmi {
+               hdmi-en-supply = <&tps65090_fet7>;
+               vdd-supply = <&ldo8_reg>;
+               vdd_osc-supply = <&ldo10_reg>;
+               vdd_pll-supply = <&ldo8_reg>;
+       };
+
+       backlight {
+               compatible = "pwm-backlight";
+               pwms = <&pwm 0 1000000 0>;
+               brightness-levels = <0 100 500 1000 1500 2000 2500 2800>;
+               default-brightness-level = <7>;
+               pinctrl-0 = <&pwm0_out>;
+               pinctrl-names = "default";
+       };
+
+       fimd@14400000 {
+               status = "okay";
+               samsung,invert-vclk;
+       };
+
+       dp-controller@145B0000 {
+               status = "okay";
+               pinctrl-names = "default";
+               pinctrl-0 = <&dp_hpd>;
+               samsung,color-space = <0>;
+               samsung,dynamic-range = <0>;
+               samsung,ycbcr-coeff = <0>;
+               samsung,color-depth = <1>;
+               samsung,link-rate = <0x0a>;
+               samsung,lane-count = <2>;
+               samsung,hpd-gpio = <&gpx0 7 0>;
+
+               display-timings {
+                       native-mode = <&timing1>;
+
+                       timing1: timing@1 {
+                               clock-frequency = <70589280>;
+                               hactive = <1366>;
+                               vactive = <768>;
+                               hfront-porch = <40>;
+                               hback-porch = <40>;
+                               hsync-len = <32>;
+                               vback-porch = <10>;
+                               vfront-porch = <12>;
+                               vsync-len = <6>;
+                       };
+               };
+       };
 };
index 37423314a02826a66670776c03109f1526449bc7..68a3e6f254d9f332aece88d12d4c752f5a60ed21 100644 (file)
                };
        };
 
+       sysram@02020000 {
+               compatible = "mmio-sram";
+               reg = <0x02020000 0x30000>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges = <0 0x02020000 0x30000>;
+
+               smp-sysram@0 {
+                       compatible = "samsung,exynos4210-sysram";
+                       reg = <0x0 0x1000>;
+               };
+
+               smp-sysram@2f000 {
+                       compatible = "samsung,exynos4210-sysram-ns";
+                       reg = <0x2f000 0x1000>;
+               };
+       };
+
        pd_gsc: gsc-power-domain@10044000 {
                compatible = "samsung,exynos4210-pd";
                reg = <0x10044000 0x20>;
                        compatible = "synopsys,dwc3";
                        reg = <0x12000000 0x10000>;
                        interrupts = <0 72 0>;
-                       usb-phy = <&usb2_phy &usb3_phy>;
+                       phys = <&usbdrd_phy 0>, <&usbdrd_phy 1>;
+                       phy-names = "usb2-phy", "usb3-phy";
                };
        };
 
-       usb3_phy: usbphy@12100000 {
-               compatible = "samsung,exynos5250-usb3phy";
+       usbdrd_phy: phy@12100000 {
+               compatible = "samsung,exynos5250-usbdrd-phy";
                reg = <0x12100000 0x100>;
-               clocks = <&clock CLK_FIN_PLL>, <&clock CLK_USB3>;
-               clock-names = "ext_xtal", "usbdrd30";
-               #address-cells = <1>;
-               #size-cells = <1>;
-               ranges;
-
-               usbphy-sys {
-                       reg = <0x10040704 0x8>;
-               };
+               clocks = <&clock CLK_USB3>, <&clock CLK_FIN_PLL>;
+               clock-names = "phy", "ref";
+               samsung,pmu-syscon = <&pmu_system_controller>;
+               #phy-cells = <1>;
        };
 
        usb@12110000 {
index 80a3bf4c59865e0403a4197abb5ae6f0bc00d363..6ee8149fd5c4940c27c5ac74903ee5e964014822 100644 (file)
                status = "okay";
        };
 
+       codec@11000000 {
+               samsung,mfc-r = <0x43000000 0x800000>;
+               samsung,mfc-l = <0x51000000 0x800000>;
+       };
+
        mmc@12200000 {
                status = "okay";
                broken-cd;
                        gpio-key,wakeup;
                };
        };
-
-       amba {
-               mdma1: mdma@11C10000 {
-                       /*
-                        * MDMA1 can support both secure and non-secure
-                        * AXI transactions. When this is enabled in the kernel
-                        * for boards that run in secure mode, we are getting
-                        * imprecise external aborts causing the kernel to oops.
-                        */
-                       status = "disabled";
-               };
-       };
 };
diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts b/arch/arm/boot/dts/exynos5420-peach-pit.dts
new file mode 100644 (file)
index 0000000..d4127b0
--- /dev/null
@@ -0,0 +1,287 @@
+/*
+ * Google Peach Pit Rev 6+ board device tree source
+ *
+ * Copyright (c) 2014 Google, Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+#include "exynos5420.dtsi"
+
+/ {
+       model = "Google Peach Pit Rev 6+";
+
+       compatible = "google,pit-rev16",
+               "google,pit-rev15", "google,pit-rev14",
+               "google,pit-rev13", "google,pit-rev12",
+               "google,pit-rev11", "google,pit-rev10",
+               "google,pit-rev9", "google,pit-rev8",
+               "google,pit-rev7", "google,pit-rev6",
+               "google,pit", "google,peach","samsung,exynos5420",
+               "samsung,exynos5";
+
+       memory {
+               reg = <0x20000000 0x80000000>;
+       };
+
+       fixed-rate-clocks {
+               oscclk {
+                       compatible = "samsung,exynos5420-oscclk";
+                       clock-frequency = <24000000>;
+               };
+       };
+
+       gpio-keys {
+               compatible = "gpio-keys";
+
+               pinctrl-names = "default";
+               pinctrl-0 = <&power_key_irq>;
+
+               power {
+                       label = "Power";
+                       gpios = <&gpx1 2 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_POWER>;
+                       gpio-key,wakeup;
+               };
+       };
+
+       backlight {
+               compatible = "pwm-backlight";
+               pwms = <&pwm 0 1000000 0>;
+               brightness-levels = <0 100 500 1000 1500 2000 2500 2800>;
+               default-brightness-level = <7>;
+               pinctrl-0 = <&pwm0_out>;
+               pinctrl-names = "default";
+       };
+
+       sound {
+               compatible = "google,snow-audio-max98090";
+
+               samsung,i2s-controller = <&i2s0>;
+               samsung,audio-codec = <&max98090>;
+       };
+
+       usb300_vbus_reg: regulator-usb300 {
+               compatible = "regulator-fixed";
+               regulator-name = "P5.0V_USB3CON0";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               gpio = <&gph0 0 0>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&usb300_vbus_en>;
+               enable-active-high;
+       };
+
+       usb301_vbus_reg: regulator-usb301 {
+               compatible = "regulator-fixed";
+               regulator-name = "P5.0V_USB3CON1";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               gpio = <&gph0 1 0>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&usb301_vbus_en>;
+               enable-active-high;
+       };
+};
+
+&pinctrl_0 {
+       max98090_irq: max98090-irq {
+               samsung,pins = "gpx0-2";
+               samsung,pin-function = <0>;
+               samsung,pin-pud = <0>;
+               samsung,pin-drv = <0>;
+       };
+
+       tpm_irq: tpm-irq {
+               samsung,pins = "gpx1-0";
+               samsung,pin-function = <0>;
+               samsung,pin-pud = <0>;
+               samsung,pin-drv = <0>;
+       };
+
+       power_key_irq: power-key-irq {
+               samsung,pins = "gpx1-2";
+               samsung,pin-function = <0>;
+               samsung,pin-pud = <0>;
+               samsung,pin-drv = <0>;
+       };
+
+       hdmi_hpd_irq: hdmi-hpd-irq {
+               samsung,pins = "gpx3-7";
+               samsung,pin-function = <0>;
+               samsung,pin-pud = <1>;
+               samsung,pin-drv = <0>;
+       };
+};
+
+&pinctrl_3 {
+       usb300_vbus_en: usb300-vbus-en {
+               samsung,pins = "gph0-0";
+               samsung,pin-function = <1>;
+               samsung,pin-pud = <0>;
+               samsung,pin-drv = <0>;
+       };
+
+       usb301_vbus_en: usb301-vbus-en {
+               samsung,pins = "gph0-1";
+               samsung,pin-function = <1>;
+               samsung,pin-pud = <0>;
+               samsung,pin-drv = <0>;
+       };
+
+       dp_hpd_gpio: dp_hpd_gpio {
+               samsung,pins = "gpx2-6";
+               samsung,pin-function = <0>;
+               samsung,pin-pud = <3>;
+               samsung,pin-drv = <0>;
+       };
+};
+
+&rtc {
+       status = "okay";
+};
+
+&uart_3 {
+       status = "okay";
+};
+
+&mmc_0 {
+       status = "okay";
+       num-slots = <1>;
+       broken-cd;
+       caps2-mmc-hs200-1_8v;
+       supports-highspeed;
+       non-removable;
+       card-detect-delay = <200>;
+       clock-frequency = <400000000>;
+       samsung,dw-mshc-ciu-div = <3>;
+       samsung,dw-mshc-sdr-timing = <0 4>;
+       samsung,dw-mshc-ddr-timing = <0 2>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
+
+       slot@0 {
+               reg = <0>;
+               bus-width = <8>;
+       };
+};
+
+&mmc_2 {
+       status = "okay";
+       num-slots = <1>;
+       supports-highspeed;
+       card-detect-delay = <200>;
+       clock-frequency = <400000000>;
+       samsung,dw-mshc-ciu-div = <3>;
+       samsung,dw-mshc-sdr-timing = <2 3>;
+       samsung,dw-mshc-ddr-timing = <1 2>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
+
+       slot@0 {
+               reg = <0>;
+               bus-width = <4>;
+       };
+};
+
+&hsi2c_7 {
+       status = "okay";
+
+       max98090: codec@10 {
+               compatible = "maxim,max98090";
+               reg = <0x10>;
+               interrupts = <2 0>;
+               interrupt-parent = <&gpx0>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&max98090_irq>;
+       };
+};
+
+&hsi2c_9 {
+       status = "okay";
+       clock-frequency = <400000>;
+
+       tpm@20 {
+               compatible = "infineon,slb9645tt";
+               reg = <0x20>;
+
+               /* Unused irq; but still need to configure the pins */
+               pinctrl-names = "default";
+               pinctrl-0 = <&tpm_irq>;
+       };
+};
+
+&i2c_2 {
+       status = "okay";
+       samsung,i2c-sda-delay = <100>;
+       samsung,i2c-max-bus-freq = <66000>;
+       samsung,i2c-slave-addr = <0x50>;
+};
+
+&hdmi {
+       status = "okay";
+       hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&hdmi_hpd_irq>;
+       ddc = <&i2c_2>;
+};
+
+&usbdrd3_0 {
+       vbus-supply = <&usb300_vbus_reg>;
+};
+
+&usbdrd3_1 {
+       vbus-supply = <&usb301_vbus_reg>;
+};
+
+/*
+ * Use longest HW watchdog in SoC (32 seconds) since the hardware
+ * watchdog provides no debugging information (compared to soft/hard
+ * lockup detectors) and so should be last resort.
+ */
+&watchdog {
+       timeout-sec = <32>;
+};
+
+&i2s0 {
+       status = "okay";
+};
+
+&fimd {
+       status = "okay";
+       samsung,invert-vclk;
+};
+
+&dp {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&dp_hpd_gpio>;
+       samsung,color-space = <0>;
+       samsung,dynamic-range = <0>;
+       samsung,ycbcr-coeff = <0>;
+       samsung,color-depth = <1>;
+       samsung,link-rate = <0x06>;
+       samsung,lane-count = <2>;
+       samsung,hpd-gpio = <&gpx2 6 0>;
+
+       display-timings {
+               native-mode = <&timing1>;
+
+               timing1: timing@1 {
+                       clock-frequency = <70589280>;
+                       hactive = <1366>;
+                       vactive = <768>;
+                       hfront-porch = <40>;
+                       hback-porch = <40>;
+                       hsync-len = <32>;
+                       vback-porch = <10>;
+                       vfront-porch = <12>;
+                       vsync-len = <6>;
+               };
+       };
+};
index e62c8eb57438988c0c5493cfb2a88c2471e624e3..ba686e40eac7965942555a1f5eca9a81bb57ef39 100644 (file)
                        samsung,pin-drv = <0>;
                };
 
+               pwm0_out: pwm0-out {
+                       samsung,pins = "gpb2-0";
+                       samsung,pin-function = <2>;
+                       samsung,pin-pud = <0>;
+                       samsung,pin-drv = <0>;
+               };
+
+               pwm1_out: pwm1-out {
+                       samsung,pins = "gpb2-1";
+                       samsung,pin-function = <2>;
+                       samsung,pin-pud = <0>;
+                       samsung,pin-drv = <0>;
+               };
+
+               pwm2_out: pwm2-out {
+                       samsung,pins = "gpb2-2";
+                       samsung,pin-function = <2>;
+                       samsung,pin-pud = <0>;
+                       samsung,pin-drv = <0>;
+               };
+
+               pwm3_out: pwm3-out {
+                       samsung,pins = "gpb2-3";
+                       samsung,pin-function = <2>;
+                       samsung,pin-pud = <0>;
+                       samsung,pin-drv = <0>;
+               };
+
                i2c7_hs_bus: i2c7-hs-bus {
                        samsung,pins = "gpb2-2", "gpb2-3";
                        samsung,pin-function = <3>;
index 69104850eb5ec172b6dcc5bd5256b0f759202abf..6052aa9c5659988a72a0aca8a94bc89025f3393d 100644 (file)
                status = "okay";
        };
 
+       codec@11000000 {
+               samsung,mfc-r = <0x43000000 0x800000>;
+               samsung,mfc-l = <0x51000000 0x800000>;
+       };
+
        mmc@12200000 {
                status = "okay";
                broken-cd;
                };
        };
 
+       pinctrl@14000000 {
+               usb300_vbus_en: usb300-vbus-en {
+                       samsung,pins = "gpg0-5";
+                       samsung,pin-function = <1>;
+                       samsung,pin-pud = <0>;
+                       samsung,pin-drv = <0>;
+               };
+
+               usb301_vbus_en: usb301-vbus-en {
+                       samsung,pins = "gpg1-4";
+                       samsung,pin-function = <1>;
+                       samsung,pin-pud = <0>;
+                       samsung,pin-drv = <0>;
+               };
+       };
+
        hdmi@14530000 {
                status = "okay";
                hpd-gpio = <&gpx3 7 0>;
                pinctrl-0 = <&hdmi_hpd_irq>;
        };
 
+       usb300_vbus_reg: regulator-usb300 {
+               compatible = "regulator-fixed";
+               regulator-name = "VBUS0";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               gpio = <&gpg0 5 0>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&usb300_vbus_en>;
+               enable-active-high;
+       };
+
+       usb301_vbus_reg: regulator-usb301 {
+               compatible = "regulator-fixed";
+               regulator-name = "VBUS1";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               gpio = <&gpg1 4 0>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&usb301_vbus_en>;
+               enable-active-high;
+       };
+
+       phy@12100000 {
+               vbus-supply = <&usb300_vbus_reg>;
+       };
+
+       phy@12500000 {
+               vbus-supply = <&usb301_vbus_reg>;
+       };
+
        i2c_2: i2c@12C80000 {
                samsung,i2c-sda-delay = <100>;
                samsung,i2c-max-bus-freq = <66000>;
index c3a9a66c57678f9a5dddd75e11e55be913e3c3c0..9b6414a9e8a1448b70896cb7b004819cfe240603 100644 (file)
@@ -47,6 +47,8 @@
                spi0 = &spi_0;
                spi1 = &spi_1;
                spi2 = &spi_2;
+               usbdrdphy0 = &usbdrd_phy0;
+               usbdrdphy1 = &usbdrd_phy1;
        };
 
        cpus {
                };
        };
 
+       sysram@02020000 {
+               compatible = "mmio-sram";
+               reg = <0x02020000 0x54000>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges = <0 0x02020000 0x54000>;
+
+               smp-sysram@0 {
+                       compatible = "samsung,exynos4210-sysram";
+                       reg = <0x0 0x1000>;
+               };
+
+               smp-sysram@53000 {
+                       compatible = "samsung,exynos4210-sysram-ns";
+                       reg = <0x53000 0x1000>;
+               };
+       };
+
        clock: clock-controller@10010000 {
                compatible = "samsung,exynos5420-clock";
                reg = <0x10010000 0x30000>;
                clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
        };
 
-       codec@11000000 {
+       mfc: codec@11000000 {
                compatible = "samsung,mfc-v7";
                reg = <0x11000000 0x10000>;
                interrupts = <0 96 0>;
                clocks = <&clock CLK_MFC>;
                clock-names = "mfc";
+               samsung,power-domain = <&mfc_pd>;
        };
 
        mmc_0: mmc@12200000 {
                status = "disabled";
        };
 
-       mct@101C0000 {
+       mct: mct@101C0000 {
                compatible = "samsung,exynos4210-mct";
                reg = <0x101C0000 0x800>;
                interrupt-controller;
                reg = <0x100440C0 0x20>;
        };
 
-       mau_pd: power-domain@100440E0 {
-               compatible = "samsung,exynos4210-pd";
-               reg = <0x100440E0 0x20>;
-       };
-
-       g2d_pd: power-domain@10044100 {
-               compatible = "samsung,exynos4210-pd";
-               reg = <0x10044100 0x20>;
-       };
-
        msc_pd: power-domain@10044120 {
                compatible = "samsung,exynos4210-pd";
                reg = <0x10044120 0x20>;
                interrupts = <0 47 0>;
        };
 
-       rtc@101E0000 {
+       rtc: rtc@101E0000 {
                clocks = <&clock CLK_RTC>;
                clock-names = "rtc";
                status = "disabled";
                        #dma-cells = <1>;
                        #dma-channels = <8>;
                        #dma-requests = <1>;
+                       /*
+                        * MDMA1 can support both secure and non-secure
+                        * AXI transactions. When this is enabled in the kernel
+                        * for boards that run in secure mode, we are getting
+                        * imprecise external aborts causing the kernel to oops.
+                        */
+                       status = "disabled";
                };
        };
 
                status = "disabled";
        };
 
-       serial@12C00000 {
+       uart_0: serial@12C00000 {
                clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
                clock-names = "uart", "clk_uart_baud0";
        };
 
-       serial@12C10000 {
+       uart_1: serial@12C10000 {
                clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
                clock-names = "uart", "clk_uart_baud0";
        };
 
-       serial@12C20000 {
+       uart_2: serial@12C20000 {
                clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
                clock-names = "uart", "clk_uart_baud0";
        };
 
-       serial@12C30000 {
+       uart_3: serial@12C30000 {
                clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
                clock-names = "uart", "clk_uart_baud0";
        };
                #phy-cells = <0>;
        };
 
-       dp-controller@145B0000 {
+       dp: dp-controller@145B0000 {
                clocks = <&clock CLK_DP1>;
                clock-names = "dp";
                phys = <&dp_phy>;
                phy-names = "dp";
        };
 
-       fimd@14400000 {
+       fimd: fimd@14400000 {
                samsung,power-domain = <&disp_pd>;
                clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;
                clock-names = "sclk_fimd", "fimd";
                status = "disabled";
        };
 
-       hdmi@14530000 {
-               compatible = "samsung,exynos4212-hdmi";
+       hdmi: hdmi@14530000 {
+               compatible = "samsung,exynos5420-hdmi";
                reg = <0x14530000 0x70000>;
                interrupts = <0 95 0>;
                clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
                         <&clock CLK_MOUT_HDMI>;
                clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
                        "sclk_hdmiphy", "mout_hdmi";
+               phy = <&hdmiphy>;
                status = "disabled";
        };
 
-       mixer@14450000 {
+       hdmiphy: hdmiphy@145D0000 {
+               reg = <0x145D0000 0x20>;
+       };
+
+       mixer: mixer@14450000 {
                compatible = "samsung,exynos5420-mixer";
                reg = <0x14450000 0x10000>;
                interrupts = <0 94 0>;
                clock-names = "tmu_apbif", "tmu_triminfo_apbif";
        };
 
-        watchdog@101D0000 {
+        watchdog: watchdog@101D0000 {
                compatible = "samsung,exynos5420-wdt";
                reg = <0x101D0000 0x100>;
                interrupts = <0 42 0>;
                samsung,syscon-phandle = <&pmu_system_controller>;
         };
 
-       sss@10830000 {
+       sss: sss@10830000 {
                compatible = "samsung,exynos4210-secss";
                reg = <0x10830000 0x10000>;
                interrupts = <0 112 0>;
                clocks = <&clock 471>;
                clock-names = "secss";
-               samsung,power-domain = <&g2d_pd>;
+       };
+
+       usbdrd3_0: usb@12000000 {
+               compatible = "samsung,exynos5250-dwusb3";
+               clocks = <&clock CLK_USBD300>;
+               clock-names = "usbdrd30";
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
+               dwc3 {
+                       compatible = "snps,dwc3";
+                       reg = <0x12000000 0x10000>;
+                       interrupts = <0 72 0>;
+                       phys = <&usbdrd_phy0 0>, <&usbdrd_phy0 1>;
+                       phy-names = "usb2-phy", "usb3-phy";
+               };
+       };
+
+       usbdrd_phy0: phy@12100000 {
+               compatible = "samsung,exynos5420-usbdrd-phy";
+               reg = <0x12100000 0x100>;
+               clocks = <&clock CLK_USBD300>, <&clock CLK_SCLK_USBPHY300>;
+               clock-names = "phy", "ref";
+               samsung,pmu-syscon = <&pmu_system_controller>;
+               #phy-cells = <1>;
+       };
+
+       usbdrd3_1: usb@12400000 {
+               compatible = "samsung,exynos5250-dwusb3";
+               clocks = <&clock CLK_USBD301>;
+               clock-names = "usbdrd30";
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
+               dwc3 {
+                       compatible = "snps,dwc3";
+                       reg = <0x12400000 0x10000>;
+                       interrupts = <0 73 0>;
+                       phys = <&usbdrd_phy1 0>, <&usbdrd_phy1 1>;
+                       phy-names = "usb2-phy", "usb3-phy";
+               };
+       };
+
+       usbdrd_phy1: phy@12500000 {
+               compatible = "samsung,exynos5420-usbdrd-phy";
+               reg = <0x12500000 0x100>;
+               clocks = <&clock CLK_USBD301>, <&clock CLK_SCLK_USBPHY301>;
+               clock-names = "phy", "ref";
+               samsung,pmu-syscon = <&pmu_system_controller>;
+               #phy-cells = <1>;
        };
 };
index 62fb3da50bdbf7a84f9f872b3e9216c1617e0f3a..ad12da38fc922874823828e3369b64b7d1ad9474 100644 (file)
        fsl,uart-has-rtscts;
        status = "okay";
 };
+
+&usbhost1 {
+       phy_type = "serial";
+       dr_mode = "host";
+       status = "okay";
+};
+
+&usbotg {
+       phy_type = "utmi";
+       dr_mode = "otg";
+       external-vbus-divider;
+       status = "okay";
+};
index f8db366c46ff695b67f60a868e9673e987ab4eeb..9b31faa96377ad0b5e0e00f30743f90e20ddae1c 100644 (file)
        model = "Ka-Ro TX25";
        compatible = "karo,imx25-tx25", "fsl,imx25";
 
+       chosen {
+               stdout-path = &uart1;
+       };
+
+       regulators {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               reg_fec_phy: regulator@0 {
+                       compatible = "regulator-fixed";
+                       reg = <0>;
+                       regulator-name = "fec-phy";
+                       regulator-min-microvolt = <3300000>;
+                       regulator-max-microvolt = <3300000>;
+                       gpio = <&gpio4 9 0>;
+                       enable-active-high;
+               };
+       };
+
        memory {
                reg = <0x80000000 0x02000000 0x90000000 0x02000000>;
        };
 };
 
+&iomuxc {
+       pinctrl_uart1: uart1grp {
+               fsl,pins = <
+                       MX25_PAD_UART1_TXD__UART1_TXD 0x80000000
+                       MX25_PAD_UART1_RXD__UART1_RXD 0x80000000
+                       MX25_PAD_UART1_CTS__UART1_CTS 0x80000000
+                       MX25_PAD_UART1_RTS__UART1_RTS 0x80000000
+               >;
+       };
+
+       pinctrl_fec: fecgrp {
+               fsl,pins = <
+                       MX25_PAD_D11__GPIO_4_9          0x80000000 /* FEC PHY power on pin */
+                       MX25_PAD_D13__GPIO_4_7          0x80000000 /* FEC reset */
+                       MX25_PAD_FEC_MDC__FEC_MDC       0x80000000
+                       MX25_PAD_FEC_MDIO__FEC_MDIO     0x80000000
+                       MX25_PAD_FEC_TDATA0__FEC_TDATA0 0x80000000
+                       MX25_PAD_FEC_TDATA1__FEC_TDATA1 0x80000000
+                       MX25_PAD_FEC_TX_EN__FEC_TX_EN   0x80000000
+                       MX25_PAD_FEC_RDATA0__FEC_RDATA0 0x80000000
+                       MX25_PAD_FEC_RDATA1__FEC_RDATA1 0x80000000
+                       MX25_PAD_FEC_RX_DV__FEC_RX_DV   0x80000000
+                       MX25_PAD_FEC_TX_CLK__FEC_TX_CLK 0x80000000
+               >;
+       };
+
+       pinctrl_nfc: nfcgrp {
+               fsl,pins = <
+                       MX25_PAD_NF_CE0__NF_CE0         0x80000000
+                       MX25_PAD_NFWE_B__NFWE_B         0x80000000
+                       MX25_PAD_NFRE_B__NFRE_B         0x80000000
+                       MX25_PAD_NFALE__NFALE           0x80000000
+                       MX25_PAD_NFCLE__NFCLE           0x80000000
+                       MX25_PAD_NFWP_B__NFWP_B         0x80000000
+                       MX25_PAD_NFRB__NFRB             0x80000000
+                       MX25_PAD_D7__D7                 0x80000000
+                       MX25_PAD_D6__D6                 0x80000000
+                       MX25_PAD_D5__D5                 0x80000000
+                       MX25_PAD_D4__D4                 0x80000000
+                       MX25_PAD_D3__D3                 0x80000000
+                       MX25_PAD_D2__D2                 0x80000000
+                       MX25_PAD_D1__D1                 0x80000000
+                       MX25_PAD_D0__D0                 0x80000000
+               >;
+       };
+};
+
 &uart1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart1>;
        status = "okay";
 };
 
 &fec {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_fec>;
+       phy-reset-gpios = <&gpio3 7 0>;
        phy-mode = "rmii";
+       phy-supply = <&reg_fec_phy>;
        status = "okay";
 };
 
 &nfc {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_nfc>;
        nand-on-flash-bbt;
+       nand-ecc-mode = "hw";
+       nand-bus-width = <8>;
        status = "okay";
 };
index f607ce520edae56fd9060ac8ca61e2663fbf35fc..c608942b8a3b65605ac8156fb9e9fe511b5c2792 100644 (file)
@@ -10,6 +10,7 @@
  */
 
 /dts-v1/;
+#include <dt-bindings/input/input.h>
 #include "imx25.dtsi"
 
 / {
        memory {
                reg = <0x80000000 0x4000000>;
        };
+
+       regulators {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               reg_fec_3v3: regulator@0 {
+                       compatible = "regulator-fixed";
+                       reg = <0>;
+                       regulator-name = "fec-3v3";
+                       regulator-min-microvolt = <3300000>;
+                       regulator-max-microvolt = <3300000>;
+                       gpio = <&gpio2 3 0>;
+                       enable-active-high;
+               };
+
+               reg_2p5v: regulator@1 {
+                       compatible = "regulator-fixed";
+                       reg = <1>;
+                       regulator-name = "2P5V";
+                       regulator-min-microvolt = <2500000>;
+                       regulator-max-microvolt = <2500000>;
+               };
+
+               reg_3p3v: regulator@2 {
+                       compatible = "regulator-fixed";
+                       reg = <2>;
+                       regulator-name = "3P3V";
+                       regulator-min-microvolt = <3300000>;
+                       regulator-max-microvolt = <3300000>;
+               };
+
+               reg_can_3v3: regulator@3 {
+                       compatible = "regulator-fixed";
+                       reg = <3>;
+                       regulator-name = "can-3v3";
+                       regulator-min-microvolt = <3300000>;
+                       regulator-max-microvolt = <3300000>;
+                       gpio = <&gpio4 6 0>;
+               };
+       };
+
+       sound {
+               compatible = "fsl,imx25-pdk-sgtl5000",
+                            "fsl,imx-audio-sgtl5000";
+               model = "imx25-pdk-sgtl5000";
+               ssi-controller = <&ssi1>;
+               audio-codec = <&codec>;
+               audio-routing =
+                       "MIC_IN", "Mic Jack",
+                       "Mic Jack", "Mic Bias",
+                       "Headphone Jack", "HP_OUT";
+               mux-int-port = <1>;
+               mux-ext-port = <4>;
+       };
 };
 
-&uart1 {
+&audmux {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_audmux>;
+       status = "okay";
+};
+
+&can1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_can1>;
+       xceiver-supply = <&reg_can_3v3>;
+       status = "okay";
+};
+
+&esdhc1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_esdhc1>;
+       cd-gpios = <&gpio2 1 0>;
+       wp-gpios = <&gpio2 0 0>;
        status = "okay";
 };
 
 &fec {
        phy-mode = "rmii";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_fec>;
+       phy-supply = <&reg_fec_3v3>;
+       phy-reset-gpios = <&gpio4 8 0>;
        status = "okay";
 };
 
+&i2c1 {
+       clock-frequency = <100000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c1>;
+       status = "okay";
+
+       codec: sgtl5000@0a {
+               compatible = "fsl,sgtl5000";
+               reg = <0x0a>;
+               clocks = <&clks 129>;
+               VDDA-supply = <&reg_2p5v>;
+               VDDIO-supply = <&reg_3p3v>;
+       };
+};
+
+&iomuxc {
+       imx25-pdk {
+               pinctrl_audmux: audmuxgrp {
+                       fsl,pins = <
+                               MX25_PAD_RW__AUD4_TXFS                  0xe0
+                               MX25_PAD_OE__AUD4_TXC                   0xe0
+                               MX25_PAD_EB0__AUD4_TXD                  0xe0
+                               MX25_PAD_EB1__AUD4_RXD                  0xe0
+                       >;
+               };
+
+               pinctrl_can1: can1grp {
+                       fsl,pins = <
+                               MX25_PAD_GPIO_A__CAN1_TX                0x0
+                               MX25_PAD_GPIO_B__CAN1_RX                0x0
+                               MX25_PAD_D14__GPIO_4_6                  0x80000000
+                       >;
+               };
+
+               pinctrl_esdhc1: esdhc1grp {
+                       fsl,pins = <
+                               MX25_PAD_SD1_CMD__SD1_CMD               0x80000000
+                               MX25_PAD_SD1_CLK__SD1_CLK               0x80000000
+                               MX25_PAD_SD1_DATA0__SD1_DATA0           0x80000000
+                               MX25_PAD_SD1_DATA1__SD1_DATA1           0x80000000
+                               MX25_PAD_SD1_DATA2__SD1_DATA2           0x80000000
+                               MX25_PAD_SD1_DATA3__SD1_DATA3           0x80000000
+                               MX25_PAD_A14__GPIO_2_0                  0x80000000
+                               MX25_PAD_A15__GPIO_2_1                  0x80000000
+                       >;
+               };
+
+               pinctrl_fec: fecgrp {
+                       fsl,pins = <
+                               MX25_PAD_FEC_MDC__FEC_MDC               0x80000000
+                               MX25_PAD_FEC_MDIO__FEC_MDIO             0x400001e0
+                               MX25_PAD_FEC_TDATA0__FEC_TDATA0         0x80000000
+                               MX25_PAD_FEC_TDATA1__FEC_TDATA1         0x80000000
+                               MX25_PAD_FEC_TX_EN__FEC_TX_EN           0x80000000
+                               MX25_PAD_FEC_RDATA0__FEC_RDATA0         0x80000000
+                               MX25_PAD_FEC_RDATA1__FEC_RDATA1         0x80000000
+                               MX25_PAD_FEC_RX_DV__FEC_RX_DV           0x80000000
+                               MX25_PAD_FEC_TX_CLK__FEC_TX_CLK         0x1c0
+                               MX25_PAD_A17__GPIO_2_3                  0x80000000
+                               MX25_PAD_D12__GPIO_4_8                  0x80000000
+                       >;
+               };
+
+               pinctrl_i2c1: i2c1grp {
+                       fsl,pins = <
+                               MX25_PAD_I2C1_CLK__I2C1_CLK             0x80000000
+                               MX25_PAD_I2C1_DAT__I2C1_DAT             0x80000000
+                       >;
+               };
+
+               pinctrl_kpp: kppgrp {
+                       fsl,pins = <
+                               MX25_PAD_KPP_ROW0__KPP_ROW0     0x80000000
+                               MX25_PAD_KPP_ROW1__KPP_ROW1     0x80000000
+                               MX25_PAD_KPP_ROW2__KPP_ROW2     0x80000000
+                               MX25_PAD_KPP_ROW3__KPP_ROW3     0x80000000
+                               MX25_PAD_KPP_COL0__KPP_COL0     0x80000000
+                               MX25_PAD_KPP_COL1__KPP_COL1     0x80000000
+                               MX25_PAD_KPP_COL2__KPP_COL2     0x80000000
+                               MX25_PAD_KPP_COL3__KPP_COL3     0x80000000
+                       >;
+               };
+
+
+               pinctrl_uart1: uart1grp {
+                       fsl,pins = <
+                               MX25_PAD_UART1_RTS__UART1_RTS           0xe0
+                               MX25_PAD_UART1_CTS__UART1_CTS           0xe0
+                               MX25_PAD_UART1_TXD__UART1_TXD           0x80000000
+                               MX25_PAD_UART1_RXD__UART1_RXD           0xc0
+                       >;
+               };
+       };
+};
+
 &nfc {
        nand-on-flash-bbt;
        status = "okay";
 };
+
+&kpp {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_kpp>;
+       linux,keymap = <
+                       MATRIX_KEY(0x0, 0x0, KEY_UP)
+                       MATRIX_KEY(0x0, 0x1, KEY_DOWN)
+                       MATRIX_KEY(0x0, 0x2, KEY_VOLUMEDOWN)
+                       MATRIX_KEY(0x0, 0x3, KEY_HOME)
+                       MATRIX_KEY(0x1, 0x0, KEY_RIGHT)
+                       MATRIX_KEY(0x1, 0x1, KEY_LEFT)
+                       MATRIX_KEY(0x1, 0x2, KEY_ENTER)
+                       MATRIX_KEY(0x1, 0x3, KEY_VOLUMEUP)
+                       MATRIX_KEY(0x2, 0x0, KEY_F6)
+                       MATRIX_KEY(0x2, 0x1, KEY_F8)
+                       MATRIX_KEY(0x2, 0x2, KEY_F9)
+                       MATRIX_KEY(0x2, 0x3, KEY_F10)
+                       MATRIX_KEY(0x3, 0x0, KEY_F1)
+                       MATRIX_KEY(0x3, 0x1, KEY_F2)
+                       MATRIX_KEY(0x3, 0x2, KEY_F3)
+                       MATRIX_KEY(0x3, 0x2, KEY_POWER)
+       >;
+       status = "okay";
+};
+
+&ssi1 {
+       codec-handle = <&codec>;
+       fsl,mode = "i2s-slave";
+       status = "okay";
+};
+
+&uart1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart1>;
+       fsl,uart-has-rtscts;
+       status = "okay";
+};
+
+&usbhost1 {
+       phy_type = "serial";
+       dr_mode = "host";
+       status = "okay";
+};
index 32f760e24898df9010b22b9efd21f400e5da5ab8..bb74d9582b7e2e0627acf7f3a9adb75bc299f9f5 100644 (file)
@@ -14,6 +14,7 @@
 
 / {
        aliases {
+               ethernet0 = &fec;
                gpio0 = &gpio1;
                gpio1 = &gpio2;
                gpio2 = &gpio3;
@@ -21,6 +22,8 @@
                i2c0 = &i2c1;
                i2c1 = &i2c2;
                i2c2 = &i2c3;
+               mmc0 = &esdhc1;
+               mmc1 = &esdhc2;
                serial0 = &uart1;
                serial1 = &uart2;
                serial2 = &uart3;
@@ -56,6 +59,7 @@
 
                osc {
                        compatible = "fsl,imx-osc", "fixed-clock";
+                       #clock-cells = <0>;
                        clock-frequency = <24000000>;
                };
        };
                                status = "disabled";
                        };
 
-                       kpp@43fa8000 {
+                       kpp: kpp@43fa8000 {
                                #address-cells = <1>;
                                #size-cells = <0>;
+                               compatible = "fsl,imx25-kpp", "fsl,imx21-kpp";
                                reg = <0x43fa8000 0x4000>;
                                clocks = <&clks 102>;
                                clock-names = "";
                                clocks = <&clks 99>;
                        };
 
-                       usbphy1: usbphy@1 {
-                               compatible = "nop-usbphy";
-                               status = "disabled";
-                       };
-
-                       usbphy2: usbphy@2 {
-                               compatible = "nop-usbphy";
-                               status = "disabled";
-                       };
-
                        usbotg: usb@53ff4000 {
                                compatible = "fsl,imx25-usb", "fsl,imx27-usb";
                                reg = <0x53ff4000 0x0200>;
                                interrupts = <37>;
-                               clocks = <&clks 9>, <&clks 70>, <&clks 8>;
-                               clock-names = "ipg", "ahb", "per";
+                               clocks = <&clks 70>;
                                fsl,usbmisc = <&usbmisc 0>;
+                               fsl,usbphy = <&usbphy0>;
                                status = "disabled";
                        };
 
                                compatible = "fsl,imx25-usb", "fsl,imx27-usb";
                                reg = <0x53ff4400 0x0200>;
                                interrupts = <35>;
-                               clocks = <&clks 9>, <&clks 70>, <&clks 8>;
-                               clock-names = "ipg", "ahb", "per";
+                               clocks = <&clks 70>;
                                fsl,usbmisc = <&usbmisc 1>;
+                               fsl,usbphy = <&usbphy1>;
                                status = "disabled";
                        };
 
                                clocks = <&clks 9>, <&clks 70>, <&clks 8>;
                                clock-names = "ipg", "ahb", "per";
                                reg = <0x53ff4600 0x00f>;
-                               status = "disabled";
                        };
 
                        dryice@53ffc000 {
                        };
                };
 
+               iram: sram@78000000 {
+                       compatible = "mmio-sram";
+                       reg = <0x78000000 0x20000>;
+               };
+
                emi@80000000 {
                        compatible = "fsl,emi-bus", "simple-bus";
                        #address-cells = <1>;
                        };
                };
        };
+
+       usbphy {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               usbphy0: usb-phy@0 {
+                       reg = <0>;
+                       compatible = "usb-nop-xceiv";
+               };
+
+               usbphy1: usb-phy@1 {
+                       reg = <1>;
+                       compatible = "usb-nop-xceiv";
+               };
+       };
 };
index 09f57b39e3ef37e7df1abd4321213bcca8626db5..73aae4f5e539dc3c6a9e68f642e0840e90e0f9e0 100644 (file)
@@ -29,6 +29,7 @@
 
                osc26m {
                        compatible = "fsl,imx-osc26m", "fixed-clock";
+                       #clock-cells = <0>;
                        clock-frequency = <0>;
                };
        };
index 5ce89aa275df179618cf3874f887a87bcaaca0fb..4c317716b510ab4db06a183bbf7567745be9d5c8 100644 (file)
        compatible = "fsl,imx27-pdk", "fsl,imx27";
 
        memory {
-               reg = <0x0 0x0>;
+               reg = <0xa0000000 0x08000000>;
        };
+
+       usbphy {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               usbphy0: usbphy@0 {
+                       compatible = "usb-nop-xceiv";
+                       reg = <0>;
+                       clocks = <&clks 0>;
+                       clock-names = "main_clk";
+               };
+       };
+};
+
+&cspi2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_cspi2>;
+       fsl,spi-num-chipselects = <1>;
+       cs-gpios = <&gpio4 21 GPIO_ACTIVE_HIGH>;
+       status = "okay";
+
+       pmic: mc13783@0 {
+               compatible = "fsl,mc13783";
+               reg = <0>;
+               spi-cs-high;
+               spi-max-frequency = <1000000>;
+               interrupt-parent = <&gpio3>;
+               interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
+
+               regulators {
+                       vgen_reg: vgen {
+                               regulator-min-microvolt = <1500000>;
+                               regulator-max-microvolt = <1500000>;
+                               regulator-always-on;
+                               regulator-boot-on;
+                       };
+
+                       vmmc1_reg: vmmc1 {
+                               regulator-min-microvolt = <1600000>;
+                               regulator-max-microvolt = <3000000>;
+                       };
+
+                       gpo1_reg: gpo1 {
+                               regulator-always-on;
+                               regulator-boot-on;
+                       };
+
+                       gpo3_reg: gpo3 {
+                               regulator-always-on;
+                               regulator-boot-on;
+                       };
+               };
+       };
+};
+
+&fec {
+       phy-mode = "mii";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_fec>;
+       status = "okay";
+};
+
+&kpp {
+       linux,keymap = <
+               MATRIX_KEY(0, 0, KEY_UP)
+               MATRIX_KEY(0, 1, KEY_DOWN)
+               MATRIX_KEY(1, 0, KEY_RIGHT)
+               MATRIX_KEY(1, 1, KEY_LEFT)
+               MATRIX_KEY(1, 2, KEY_ENTER)
+               MATRIX_KEY(2, 0, KEY_F6)
+               MATRIX_KEY(2, 1, KEY_F8)
+               MATRIX_KEY(2, 2, KEY_F9)
+               MATRIX_KEY(2, 3, KEY_F10)
+       >;
+       status = "okay";
+};
+
+&nfc {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_nand>;
+       nand-ecc-mode = "hw";
+       nand-on-flash-bbt;
+       status = "okay";
 };
 
 &uart1 {
        fsl,uart-has-rtscts;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart1>;
        status = "okay";
 };
 
-&fec {
+&usbotg {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usbotg>;
+       dr_mode = "otg";
+       fsl,usbphy = <&usbphy0>;
+       phy_type = "ulpi";
        status = "okay";
 };
+
+&iomuxc {
+       imx27-pdk {
+               pinctrl_cspi2: cspi2grp {
+                       fsl,pins = <
+                               MX27_PAD_CSPI2_MISO__CSPI2_MISO 0x0
+                               MX27_PAD_CSPI2_MOSI__CSPI2_MOSI 0x0
+                               MX27_PAD_CSPI2_SCLK__CSPI2_SCLK 0x0
+                               MX27_PAD_CSPI2_SS0__GPIO4_21    0x0 /* SPI2 CS0 */
+                               MX27_PAD_TOUT__GPIO3_14         0x0 /* PMIC IRQ */
+                       >;
+               };
+
+               pinctrl_fec: fecgrp {
+                       fsl,pins = <
+                               MX27_PAD_SD3_CMD__FEC_TXD0 0x0
+                               MX27_PAD_SD3_CLK__FEC_TXD1 0x0
+                               MX27_PAD_ATA_DATA0__FEC_TXD2 0x0
+                               MX27_PAD_ATA_DATA1__FEC_TXD3 0x0
+                               MX27_PAD_ATA_DATA2__FEC_RX_ER 0x0
+                               MX27_PAD_ATA_DATA3__FEC_RXD1 0x0
+                               MX27_PAD_ATA_DATA4__FEC_RXD2 0x0
+                               MX27_PAD_ATA_DATA5__FEC_RXD3 0x0
+                               MX27_PAD_ATA_DATA6__FEC_MDIO 0x0
+                               MX27_PAD_ATA_DATA7__FEC_MDC 0x0
+                               MX27_PAD_ATA_DATA8__FEC_CRS 0x0
+                               MX27_PAD_ATA_DATA9__FEC_TX_CLK 0x0
+                               MX27_PAD_ATA_DATA10__FEC_RXD0 0x0
+                               MX27_PAD_ATA_DATA11__FEC_RX_DV 0x0
+                               MX27_PAD_ATA_DATA12__FEC_RX_CLK 0x0
+                               MX27_PAD_ATA_DATA13__FEC_COL 0x0
+                               MX27_PAD_ATA_DATA14__FEC_TX_ER 0x0
+                               MX27_PAD_ATA_DATA15__FEC_TX_EN 0x0
+                       >;
+               };
+
+               pinctrl_nand: nandgrp {
+                       fsl,pins = <
+                               MX27_PAD_NFRB__NFRB     0x0
+                               MX27_PAD_NFCLE__NFCLE   0x0
+                               MX27_PAD_NFWP_B__NFWP_B 0x0
+                               MX27_PAD_NFCE_B__NFCE_B 0x0
+                               MX27_PAD_NFALE__NFALE   0x0
+                               MX27_PAD_NFRE_B__NFRE_B 0x0
+                               MX27_PAD_NFWE_B__NFWE_B 0x0
+                       >;
+               };
+
+               pinctrl_uart1: uart1grp {
+                       fsl,pins = <
+                               MX27_PAD_UART1_TXD__UART1_TXD 0x0
+                               MX27_PAD_UART1_RXD__UART1_RXD 0x0
+                               MX27_PAD_UART1_CTS__UART1_CTS 0x0
+                               MX27_PAD_UART1_RTS__UART1_RTS 0x0
+                       >;
+               };
+
+               pinctrl_usbotg: usbotggrp {
+                       fsl,pins = <
+                               MX27_PAD_USBOTG_NXT__USBOTG_NXT 0x0
+                               MX27_PAD_USBOTG_STP__USBOTG_STP 0x0
+                               MX27_PAD_USBOTG_DIR__USBOTG_DIR 0x0
+                               MX27_PAD_USBOTG_CLK__USBOTG_CLK 0x0
+                               MX27_PAD_USBOTG_DATA0__USBOTG_DATA0 0x0
+                               MX27_PAD_USBOTG_DATA1__USBOTG_DATA1 0x0
+                               MX27_PAD_USBOTG_DATA2__USBOTG_DATA2 0x0
+                               MX27_PAD_USBOTG_DATA3__USBOTG_DATA3 0x0
+                               MX27_PAD_USBOTG_DATA4__USBOTG_DATA4 0x0
+                               MX27_PAD_USBOTG_DATA5__USBOTG_DATA5 0x0
+                               MX27_PAD_USBOTG_DATA6__USBOTG_DATA6 0x0
+                               MX27_PAD_USBOTG_DATA7__USBOTG_DATA7 0x0
+                       >;
+               };
+       };
+};
index 3c3964a996376e6aa125adb72784b7ebd40fba70..7c869fe3c30bdf124072cf6dca97c34a6e9b76be 100644 (file)
        model = "Phytec pca100 rapid development kit";
        compatible = "phytec,imx27-pca100-rdk", "phytec,imx27-pca100", "fsl,imx27";
 
+       chosen {
+               stdout-path = &uart1;
+       };
+
        display: display {
                model = "Primeview-PD050VL1";
                native-mode = <&timing0>;
index df3b2e7318358e6dc65cdee4459f4714873bc301..fe02bc7a24fd0df59fe14264ab0228d3a11f9661 100644 (file)
 / {
        model = "Phytec pcm970";
        compatible = "phytec,imx27-pcm970", "phytec,imx27-pcm038", "fsl,imx27";
+
+       chosen {
+               stdout-path = &uart1;
+       };
+
+       display0: LQ035Q7 {
+               model = "Sharp-LQ035Q7";
+               native-mode = <&timing0>;
+               bits-per-pixel = <16>;
+               fsl,pcr = <0xf00080c0>;
+
+               display-timings {
+                       timing0: 240x320 {
+                               clock-frequency = <5500000>;
+                               hactive = <240>;
+                               vactive = <320>;
+                               hback-porch = <5>;
+                               hsync-len = <7>;
+                               hfront-porch = <16>;
+                               vback-porch = <7>;
+                               vsync-len = <1>;
+                               vfront-porch = <9>;
+                               pixelclk-active = <1>;
+                               hsync-active = <1>;
+                               vsync-active = <1>;
+                               de-active = <0>;
+                       };
+               };
+       };
+
+       regulators {
+               regulator@2 {
+                       compatible = "regulator-fixed";
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_csien>;
+                       reg = <2>;
+                       regulator-name = "CSI_EN";
+                       regulator-min-microvolt = <3300000>;
+                       regulator-max-microvolt = <3300000>;
+                       gpio = <&gpio2 24 GPIO_ACTIVE_LOW>;
+                       regulator-always-on;
+               };
+       };
+
+       usbphy {
+               usbphy2: usbphy@2 {
+                       compatible = "usb-nop-xceiv";
+                       reg = <2>;
+                       vcc-supply = <&reg_5v0>;
+                       clocks = <&clks 0>;
+                       clock-names = "main_clk";
+               };
+       };
 };
 
 &cspi1 {
+       pinctrl-0 = <&pinctrl_cspi1>, <&pinctrl_cspi1cs1>;
        fsl,spi-num-chipselects = <2>;
        cs-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>,
                   <&gpio4 27 GPIO_ACTIVE_LOW>;
 };
 
+&fb {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_imxfb1>;
+       display = <&display0>;
+       lcd-supply = <&reg_5v0>;
+       fsl,dmacr = <0x00020010>;
+       fsl,lscr1 = <0x00120300>;
+       fsl,lpccr = <0x00a903ff>;
+       status = "okay";
+};
+
 &i2c1 {
        clock-frequency = <400000>;
        pinctrl-names = "default";
 
 &iomuxc {
        imx27_phycore_rdk {
+               pinctrl_csien: csiengrp {
+                       fsl,pins = <
+                               MX27_PAD_USB_OC_B__GPIO2_24 0x0
+                       >;
+               };
+
+               pinctrl_cspi1cs1: cspi1cs1grp {
+                       fsl,pins = <
+                               MX27_PAD_CSPI1_SS1__GPIO4_27 0x0
+                       >;
+               };
+
+               pinctrl_imxfb1: imxfbgrp {
+                       fsl,pins = <
+                               MX27_PAD_LD0__LD0 0x0
+                               MX27_PAD_LD1__LD1 0x0
+                               MX27_PAD_LD2__LD2 0x0
+                               MX27_PAD_LD3__LD3 0x0
+                               MX27_PAD_LD4__LD4 0x0
+                               MX27_PAD_LD5__LD5 0x0
+                               MX27_PAD_LD6__LD6 0x0
+                               MX27_PAD_LD7__LD7 0x0
+                               MX27_PAD_LD8__LD8 0x0
+                               MX27_PAD_LD9__LD9 0x0
+                               MX27_PAD_LD10__LD10 0x0
+                               MX27_PAD_LD11__LD11 0x0
+                               MX27_PAD_LD12__LD12 0x0
+                               MX27_PAD_LD13__LD13 0x0
+                               MX27_PAD_LD14__LD14 0x0
+                               MX27_PAD_LD15__LD15 0x0
+                               MX27_PAD_LD16__LD16 0x0
+                               MX27_PAD_LD17__LD17 0x0
+                               MX27_PAD_CLS__CLS 0x0
+                               MX27_PAD_CONTRAST__CONTRAST 0x0
+                               MX27_PAD_LSCLK__LSCLK 0x0
+                               MX27_PAD_OE_ACD__OE_ACD 0x0
+                               MX27_PAD_PS__PS 0x0
+                               MX27_PAD_REV__REV 0x0
+                               MX27_PAD_SPL_SPR__SPL_SPR 0x0
+                               MX27_PAD_HSYNC__HSYNC 0x0
+                               MX27_PAD_VSYNC__VSYNC 0x0
+                       >;
+               };
+
                pinctrl_i2c1: i2c1grp {
                        /* Add pullup to DATA line */
                        fsl,pins = <
        dr_mode = "host";
        phy_type = "ulpi";
        vbus-supply = <&reg_5v0>;
+       fsl,usbphy = <&usbphy2>;
        disable-over-current;
        status = "okay";
 };
 
-&usbphy2 {
-       vcc-supply = <&reg_5v0>;
-};
-
 &weim {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_weim>;
 
-       can@d4000000 {
+       can@4,0 {
                compatible = "nxp,sja1000";
                reg = <4 0x00000000 0x00000100>;
                interrupt-parent = <&gpio5>;
index cefaa6994623f2a135aa7c74b65680a8a11b27dd..31e9f7049f73351f325c3e58b1fb6e4e116763df 100644 (file)
                        regulator-max-microvolt = <5000000>;
                };
        };
+
+       usbphy {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               usbphy0: usbphy@0 {
+                       compatible = "usb-nop-xceiv";
+                       reg = <0>;
+                       vcc-supply = <&sw3_reg>;
+                       clocks = <&clks 0>;
+                       clock-names = "main_clk";
+               };
+       };
 };
 
 &audmux {
@@ -66,9 +80,9 @@
        status = "okay";
 
        pmic: mc13783@0 {
-               #address-cells = <1>;
-               #size-cells = <0>;
                compatible = "fsl,mc13783";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_pmic>;
                reg = <0>;
                spi-cs-high;
                spi-max-frequency = <20000000>;
 
 &fec {
        phy-mode = "mii";
-       phy-reset-gpios = <&gpio3 30 GPIO_ACTIVE_HIGH>;
+       phy-reset-gpios = <&gpio3 30 GPIO_ACTIVE_LOW>;
        phy-supply = <&reg_3v3>;
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_fec1>;
                                MX27_PAD_CSPI1_MOSI__CSPI1_MOSI 0x0
                                MX27_PAD_CSPI1_SCLK__CSPI1_SCLK 0x0
                                MX27_PAD_CSPI1_SS0__GPIO4_28    0x0 /* SPI1 CS0 */
-                               MX27_PAD_USB_PWR__GPIO2_23      0x0 /* PMIC IRQ */
                        >;
                };
 
                        >;
                };
 
+               pinctrl_pmic: pmicgrp {
+                       fsl,pins = <
+                               MX27_PAD_USB_PWR__GPIO2_23      0x0 /* PMIC IRQ */
+                       >;
+               };
+
+               pinctrl_ssi1: ssi1grp {
+                       fsl,pins = <
+                               MX27_PAD_SSI1_FS__SSI1_FS 0x0
+                               MX27_PAD_SSI1_RXDAT__SSI1_RXDAT 0x0
+                               MX27_PAD_SSI1_TXDAT__SSI1_TXDAT 0x0
+                               MX27_PAD_SSI1_CLK__SSI1_CLK 0x0
+                       >;
+               };
+
                pinctrl_usbotg: usbotggrp {
                        fsl,pins = <
                                MX27_PAD_USBOTG_CLK__USBOTG_CLK 0x0
        status = "okay";
 };
 
+&ssi1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_ssi1>;
+       fsl,mode = "i2s-slave";
+       status = "okay";
+};
+
 &usbotg {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_usbotg>;
        dr_mode = "otg";
        phy_type = "ulpi";
+       fsl,usbphy = <&usbphy0>;
        vbus-supply = <&sw3_reg>;
+       disable-over-current;
        status = "okay";
 };
 
-&usbphy0 {
-       vcc-supply = <&sw3_reg>;
-};
-
 &weim {
        status = "okay";
 
-       nor: nor@c0000000 {
+       nor: nor@0,0 {
                compatible = "cfi-flash";
                reg = <0 0x00000000 0x02000000>;
                bank-width = <2>;
                #size-cells = <1>;
        };
 
-       sram: sram@c8000000 {
+       sram: sram@1,0 {
                compatible = "mtd-ram";
                reg = <1 0x00000000 0x00800000>;
                bank-width = <2>;
index 6279e0b4f7683106439c062209e3c9101f0ea7ad..a75555c39533d71edd6828dd475ae8d73df81511 100644 (file)
 
 #include "skeleton.dtsi"
 #include "imx27-pinfunc.h"
+#include <dt-bindings/input/input.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
 
 / {
        aliases {
+               ethernet0 = &fec;
                gpio0 = &gpio1;
                gpio1 = &gpio2;
                gpio2 = &gpio3;
@@ -48,6 +50,7 @@
 
                osc26m {
                        compatible = "fsl,imx-osc26m", "fixed-clock";
+                       #clock-cells = <0>;
                        clock-frequency = <26000000>;
                };
        };
                };
        };
 
-       usbphy {
-               compatible = "simple-bus";
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               usbphy0: usbphy@0 {
-                       compatible = "usb-nop-xceiv";
-                       reg = <0>;
-                       clocks = <&clks 75>;
-                       clock-names = "main_clk";
-               };
-
-               usbphy2: usbphy@2 {
-                       compatible = "usb-nop-xceiv";
-                       reg = <2>;
-                       clocks = <&clks 75>;
-                       clock-names = "main_clk";
-               };
-       };
-
        soc {
                #address-cells = <1>;
                #size-cells = <1>;
                                compatible = "fsl,imx27-usb";
                                reg = <0x10024000 0x200>;
                                interrupts = <56>;
-                               clocks = <&clks 15>;
+                               clocks = <&clks 75>;
                                fsl,usbmisc = <&usbmisc 0>;
-                               fsl,usbphy = <&usbphy0>;
                                status = "disabled";
                        };
 
                                compatible = "fsl,imx27-usb";
                                reg = <0x10024200 0x200>;
                                interrupts = <54>;
-                               clocks = <&clks 15>;
+                               clocks = <&clks 75>;
                                fsl,usbmisc = <&usbmisc 1>;
                                status = "disabled";
                        };
                                compatible = "fsl,imx27-usb";
                                reg = <0x10024400 0x200>;
                                interrupts = <55>;
-                               clocks = <&clks 15>;
+                               clocks = <&clks 75>;
                                fsl,usbmisc = <&usbmisc 2>;
-                               fsl,usbphy = <&usbphy2>;
                                status = "disabled";
                        };
 
index 5f326c1c1850b349eeb6877e11a8e1cf491d19fb..ce1a7effba3770ce8708cfb44ecae6e781d6a79f 100644 (file)
@@ -25,9 +25,9 @@
                        ssp0: ssp@80010000 {
                                compatible = "fsl,imx28-mmc";
                                pinctrl-names = "default";
-                               pinctrl-0 = <&mmc0_8bit_pins_a
+                               pinctrl-0 = <&mmc0_4bit_pins_a
                                        &mmc0_cd_cfg &mmc0_sck_cfg>;
-                               bus-width = <8>;
+                               bus-width = <4>;
                                vmmc-supply = <&reg_3p3v>;
                                status = "okay";
                        };
@@ -39,7 +39,7 @@
                                hog_pins_a: hog@0 {
                                        reg = <0>;
                                        fsl,pinmux-ids = <
-                                               MX28_PAD_ENET0_RX_CLK__GPIO_4_13 /* PHY Reset */
+                                               MX28_PAD_SSP0_DATA7__GPIO_2_7 /* PHY Reset */
                                        >;
                                        fsl,drive-strength = <MXS_DRIVE_4mA>;
                                        fsl,voltage = <MXS_VOLTAGE_HIGH>;
@@ -82,7 +82,7 @@
                        pinctrl-names = "default";
                        pinctrl-0 = <&mac0_pins_a>;
                        phy-supply = <&reg_3p3v>;
-                       phy-reset-gpios = <&gpio4 13 0>;
+                       phy-reset-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
                        phy-reset-duration = <100>;
                        status = "okay";
                };
 
                status {
                        label = "duckbill:green:status";
-                       gpios = <&gpio3 5 0>;
+                       gpios = <&gpio3 5 GPIO_ACTIVE_HIGH>;
                };
 
                failure {
                        label = "duckbill:red:status";
-                       gpios = <&gpio3 4 0>;
+                       gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
                };
        };
 };
index 90a579532b8b7619c334b77ef740ec3b0f6b233e..a95cc5358ff460cc688d97535bccc8722c9f0358 100644 (file)
@@ -9,6 +9,7 @@
  * http://www.gnu.org/copyleft/gpl.html
  */
 
+#include <dt-bindings/gpio/gpio.h>
 #include "skeleton.dtsi"
 #include "imx28-pinfunc.h"
 
index 906ae937b01366e2b8f3060920bf70086104600e..9c2b715ab8bfd9463dbc0768f6e5284302385c8a 100644 (file)
                compatible = "nxp,pcf8563";
                reg = <0x51>;
        };
+
+       tsc2007: tsc2007@48 {
+               compatible = "ti,tsc2007";
+               gpios = <&gpio3 2 0>;
+               interrupt-parent = <&gpio3>;
+               interrupts = <0x2 0x8>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_tsc2007_1>;
+               reg = <0x48>;
+               ti,x-plate-ohms = <180>;
+       };
 };
 
 &iomuxc {
                                MX35_PAD_I2C1_DAT__I2C1_SDA             0x80000000
                        >;
                };
+
+               pinctrl_tsc2007_1: tsc2007grp-1 {
+                       fsl,pins = <MX35_PAD_ATA_DA2__GPIO3_2 0x80000000>;
+               };
        };
 };
 
index 1bdec21f45332565ee25ea615ff07898ab3c490f..f04ae91eea8908b541ae170998982ec6c24bc570 100644 (file)
                        linux,default-trigger = "heartbeat";
                };
        };
+
+       sound {
+               compatible = "eukrea,asoc-tlv320";
+               eukrea,model = "imx35-eukrea-tlv320aic23";
+               ssi-controller = <&ssi1>;
+               fsl,mux-int-port = <1>;
+               fsl,mux-ext-port = <4>;
+       };
 };
 
 &audmux {
 };
 
 &ssi1 {
+       codec-handle = <&tlv320aic23>;
        fsl,mode = "i2s-slave";
        status = "okay";
 };
        fsl,uart-has-rtscts;
        status = "okay";
 };
+
+&usbhost1 {
+       phy_type = "serial";
+       dr_mode = "host";
+       status = "okay";
+};
+
+&usbotg {
+       phy_type = "utmi";
+       dr_mode = "otg";
+       external-vbus-divider;
+       status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx35-pdk.dts b/arch/arm/boot/dts/imx35-pdk.dts
new file mode 100644 (file)
index 0000000..8d71552
--- /dev/null
@@ -0,0 +1,68 @@
+/*
+ * Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
+ * Copyright 2014 Freescale Semiconductor, Inc.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+#include "imx35.dtsi"
+
+/ {
+       model = "Freescale i.MX35 Product Development Kit";
+       compatible = "fsl,imx35-pdk", "fsl,imx35";
+
+       memory {
+               reg = <0x80000000 0x8000000>,
+                     <0x90000000 0x8000000>;
+       };
+};
+
+&esdhc1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_esdhc1>;
+       status = "okay";
+};
+
+&iomuxc {
+       imx35-pdk {
+               pinctrl_esdhc1: esdhc1grp {
+                       fsl,pins = <
+                               MX35_PAD_SD1_CMD__ESDHC1_CMD            0x80000000
+                               MX35_PAD_SD1_CLK__ESDHC1_CLK            0x80000000
+                               MX35_PAD_SD1_DATA0__ESDHC1_DAT0         0x80000000
+                               MX35_PAD_SD1_DATA1__ESDHC1_DAT1         0x80000000
+                               MX35_PAD_SD1_DATA2__ESDHC1_DAT2         0x80000000
+                               MX35_PAD_SD1_DATA3__ESDHC1_DAT3         0x80000000
+                       >;
+               };
+
+               pinctrl_uart1: uart1grp {
+                       fsl,pins = <
+                               MX35_PAD_TXD1__UART1_TXD_MUX            0x1c5
+                               MX35_PAD_RXD1__UART1_RXD_MUX            0x1c5
+                               MX35_PAD_CTS1__UART1_CTS                0x1c5
+                               MX35_PAD_RTS1__UART1_RTS                0x1c5
+                       >;
+               };
+       };
+};
+
+&nfc {
+       nand-bus-width = <16>;
+       nand-ecc-mode = "hw";
+       nand-on-flash-bbt;
+       status = "okay";
+};
+
+&uart1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart1>;
+       fsl,uart-has-rtscts;
+       status = "okay";
+};
index 88b218f8f81049aa8f787fa511639cea250ea461..4759abb4943615d393c3b7404731141ac19392f0 100644 (file)
@@ -13,6 +13,7 @@
 
 / {
        aliases {
+               ethernet0 = &fec;
                gpio0 = &gpio1;
                gpio1 = &gpio2;
                gpio2 = &gpio3;
                                compatible = "fsl,imx35-usb", "fsl,imx27-usb";
                                reg = <0x53ff4000 0x0200>;
                                interrupts = <37>;
-                               clocks = <&clks 9>, <&clks 73>, <&clks 28>;
-                               clock-names = "ipg", "ahb", "per";
+                               clocks = <&clks 73>;
                                fsl,usbmisc = <&usbmisc 0>;
+                               fsl,usbphy = <&usbphy0>;
                                status = "disabled";
                        };
 
                                compatible = "fsl,imx35-usb", "fsl,imx27-usb";
                                reg = <0x53ff4400 0x0200>;
                                interrupts = <35>;
-                               clocks = <&clks 9>, <&clks 73>, <&clks 28>;
-                               clock-names = "ipg", "ahb", "per";
+                               clocks = <&clks 73>;
                                fsl,usbmisc = <&usbmisc 1>;
+                               fsl,usbphy = <&usbphy1>;
                                status = "disabled";
                        };
 
                        };
                };
        };
+
+       usbphy {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               usbphy0: usb-phy@0 {
+                       reg = <0>;
+                       compatible = "usb-nop-xceiv";
+               };
+
+               usbphy1: usb-phy@1 {
+                       reg = <1>;
+                       compatible = "usb-nop-xceiv";
+               };
+       };
 };
index 0c75fe3deb351d5210a513e442e20e74ba66f397..6a201cf54366345b3f966d91f251dda73016e50d 100644 (file)
@@ -17,6 +17,7 @@
 
 / {
        aliases {
+               ethernet0 = &fec;
                gpio0 = &gpio1;
                gpio1 = &gpio2;
                gpio2 = &gpio3;
 
                ckil {
                        compatible = "fsl,imx-ckil", "fixed-clock";
+                       #clock-cells = <0>;
                        clock-frequency = <32768>;
                };
 
                ckih1 {
                        compatible = "fsl,imx-ckih1", "fixed-clock";
+                       #clock-cells = <0>;
                        clock-frequency = <22579200>;
                };
 
                ckih2 {
                        compatible = "fsl,imx-ckih2", "fixed-clock";
+                       #clock-cells = <0>;
                        clock-frequency = <0>;
                };
 
                osc {
                        compatible = "fsl,imx-osc", "fixed-clock";
+                       #clock-cells = <0>;
                        clock-frequency = <24000000>;
                };
        };
index 9e9deb244b76ff1dfb5b4952b1d16294f1ed652f..6bc3243a80d343052c915f80a5c0c794f03a17d5 100644 (file)
        model = "Freescale i.MX51 Babbage Board";
        compatible = "fsl,imx51-babbage", "fsl,imx51";
 
+       chosen {
+               stdout-path = &uart1;
+       };
+
        memory {
                reg = <0x90000000 0x20000000>;
        };
 
+       clocks {
+               ckih1 {
+                       clock-frequency = <22579200>;
+               };
+
+               clk_26M: codec_clock {
+                       compatible = "fixed-clock";
+                       reg=<0>;
+                       #clock-cells = <0>;
+                       clock-frequency = <26000000>;
+                       gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
+               };
+       };
+
        display0: display@di0 {
                compatible = "fsl,imx-parallel-display";
                interface-pix-fmt = "rgb24";
 
        gpio-keys {
                compatible = "gpio-keys";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_gpio_keys>;
 
                power {
                        label = "Power Button";
                        gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
-                       linux,code = <116>; /* KEY_POWER */
+                       linux,code = <KEY_POWER>;
                        gpio-key,wakeup;
                };
        };
                };
        };
 
+       regulators {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               reg_usbh1_vbus: regulator@0 {
+                       compatible = "regulator-fixed";
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_usbh1reg>;
+                       reg = <0>;
+                       regulator-name = "usbh1_vbus";
+                       regulator-min-microvolt = <5000000>;
+                       regulator-max-microvolt = <5000000>;
+                       gpio = <&gpio2 5 GPIO_ACTIVE_HIGH>;
+                       enable-active-high;
+               };
+
+               reg_usbotg_vbus: regulator@1 {
+                       compatible = "regulator-fixed";
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_usbotgreg>;
+                       reg = <1>;
+                       regulator-name = "usbotg_vbus";
+                       regulator-min-microvolt = <5000000>;
+                       regulator-max-microvolt = <5000000>;
+                       gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
+                       enable-active-high;
+               };
+       };
+
        sound {
                compatible = "fsl,imx51-babbage-sgtl5000",
                             "fsl,imx-audio-sgtl5000";
                mux-ext-port = <3>;
        };
 
-       clocks {
-               ckih1 {
-                       clock-frequency = <22579200>;
-               };
+       usbphy {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "simple-bus";
 
-               clk_26M: codec_clock {
-                       compatible = "fixed-clock";
-                       reg=<0>;
-                       #clock-cells = <0>;
-                       clock-frequency = <26000000>;
-                       gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
+               usbh1phy: usbh1phy@0 {
+                       compatible = "usb-nop-xceiv";
+                       reg = <0>;
+                       clocks = <&clks IMX5_CLK_DUMMY>;
+                       clock-names = "main_clk";
                };
        };
 };
 
-&esdhc1 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_esdhc1>;
-       fsl,cd-controller;
-       fsl,wp-controller;
-       status = "okay";
-};
-
-&esdhc2 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_esdhc2>;
-       cd-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
-       wp-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
-       status = "okay";
-};
-
-&uart3 {
+&audmux {
        pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_uart3>;
-       fsl,uart-has-rtscts;
+       pinctrl-0 = <&pinctrl_audmux>;
        status = "okay";
 };
 
        status = "okay";
 
        pmic: mc13892@0 {
-               #address-cells = <1>;
-               #size-cells = <0>;
                compatible = "fsl,mc13892";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_pmic>;
                spi-max-frequency = <6000000>;
                spi-cs-high;
                reg = <0>;
        };
 };
 
+&esdhc1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_esdhc1>;
+       fsl,cd-controller;
+       fsl,wp-controller;
+       status = "okay";
+};
+
+&esdhc2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_esdhc2>;
+       cd-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
+       wp-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
+       status = "okay";
+};
+
+&fec {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_fec>;
+       phy-mode = "mii";
+       phy-reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>;
+       phy-reset-duration = <1>;
+       status = "okay";
+};
+
+&i2c1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c1>;
+       status = "okay";
+};
+
+&i2c2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c2>;
+       status = "okay";
+
+       sgtl5000: codec@0a {
+               compatible = "fsl,sgtl5000";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_clkcodec>;
+               reg = <0x0a>;
+               clocks = <&clk_26M>;
+               VDDA-supply = <&vdig_reg>;
+               VDDIO-supply = <&vvideo_reg>;
+       };
+};
+
 &ipu_di0_disp0 {
        remote-endpoint = <&display0_in>;
 };
        remote-endpoint = <&display1_in>;
 };
 
+&kpp {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_kpp>;
+       linux,keymap = <
+               MATRIX_KEY(0, 0, KEY_UP)
+               MATRIX_KEY(0, 1, KEY_DOWN)
+               MATRIX_KEY(0, 2, KEY_VOLUMEDOWN)
+               MATRIX_KEY(0, 3, KEY_HOME)
+               MATRIX_KEY(1, 0, KEY_RIGHT)
+               MATRIX_KEY(1, 1, KEY_LEFT)
+               MATRIX_KEY(1, 2, KEY_ENTER)
+               MATRIX_KEY(1, 3, KEY_VOLUMEUP)
+               MATRIX_KEY(2, 0, KEY_F6)
+               MATRIX_KEY(2, 1, KEY_F8)
+               MATRIX_KEY(2, 2, KEY_F9)
+               MATRIX_KEY(2, 3, KEY_F10)
+               MATRIX_KEY(3, 0, KEY_F1)
+               MATRIX_KEY(3, 1, KEY_F2)
+               MATRIX_KEY(3, 2, KEY_F3)
+               MATRIX_KEY(3, 3, KEY_POWER)
+       >;
+       status = "okay";
+};
+
 &ssi2 {
        fsl,mode = "i2s-slave";
        status = "okay";
 };
 
-&iomuxc {
+&uart1 {
        pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_hog>;
+       pinctrl-0 = <&pinctrl_uart1>;
+       fsl,uart-has-rtscts;
+       status = "okay";
+};
 
-       imx51-babbage {
-               pinctrl_hog: hoggrp {
-                       fsl,pins = <
-                               MX51_PAD_GPIO1_0__SD1_CD     0x20d5
-                               MX51_PAD_GPIO1_1__SD1_WP     0x20d5
-                               MX51_PAD_GPIO1_5__GPIO1_5    0x100
-                               MX51_PAD_GPIO1_6__GPIO1_6    0x100
-                               MX51_PAD_EIM_A27__GPIO2_21   0x5
-                               MX51_PAD_CSPI1_SS0__GPIO4_24 0x85
-                               MX51_PAD_CSPI1_SS1__GPIO4_25 0x85
-                               MX51_PAD_CSPI1_RDY__GPIO4_26 0x80000000
-                       >;
-               };
+&uart2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart2>;
+       status = "okay";
+};
+
+&uart3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart3>;
+       fsl,uart-has-rtscts;
+       status = "okay";
+};
+
+&usbh1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usbh1>;
+       vbus-supply = <&reg_usbh1_vbus>;
+       fsl,usbphy = <&usbh1phy>;
+       phy_type = "ulpi";
+       status = "okay";
+};
 
+&usbotg {
+       dr_mode = "otg";
+       disable-over-current;
+       phy_type = "utmi_wide";
+       vbus-supply = <&reg_usbotg_vbus>;
+       status = "okay";
+};
+
+&iomuxc {
+       imx51-babbage {
                pinctrl_audmux: audmuxgrp {
                        fsl,pins = <
                                MX51_PAD_AUD3_BB_TXD__AUD3_TXD          0x80000000
                        >;
                };
 
+               pinctrl_clkcodec: clkcodecgrp {
+                       fsl,pins = <
+                               MX51_PAD_CSPI1_RDY__GPIO4_26            0x80000000
+                       >;
+               };
+
                pinctrl_ecspi1: ecspi1grp {
                        fsl,pins = <
                                MX51_PAD_CSPI1_MISO__ECSPI1_MISO        0x185
                                MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI        0x185
                                MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK        0x185
+                               MX51_PAD_CSPI1_SS0__GPIO4_24            0x85 /* CS0 */
+                               MX51_PAD_CSPI1_SS1__GPIO4_25            0x85 /* CS1 */
                        >;
                };
 
                                MX51_PAD_SD1_DATA1__SD1_DATA1           0x20d5
                                MX51_PAD_SD1_DATA2__SD1_DATA2           0x20d5
                                MX51_PAD_SD1_DATA3__SD1_DATA3           0x20d5
+                               MX51_PAD_GPIO1_0__SD1_CD                0x20d5
+                               MX51_PAD_GPIO1_1__SD1_WP                0x20d5
                        >;
                };
 
                                MX51_PAD_SD2_DATA1__SD2_DATA1           0x20d5
                                MX51_PAD_SD2_DATA2__SD2_DATA2           0x20d5
                                MX51_PAD_SD2_DATA3__SD2_DATA3           0x20d5
+                               MX51_PAD_GPIO1_5__GPIO1_5               0x100 /* WP */
+                               MX51_PAD_GPIO1_6__GPIO1_6               0x100 /* CD */
                        >;
                };
 
                pinctrl_fec: fecgrp {
                        fsl,pins = <
-                               MX51_PAD_EIM_EB2__FEC_MDIO              0x80000000
-                               MX51_PAD_EIM_EB3__FEC_RDATA1            0x80000000
-                               MX51_PAD_EIM_CS2__FEC_RDATA2            0x80000000
-                               MX51_PAD_EIM_CS3__FEC_RDATA3            0x80000000
-                               MX51_PAD_EIM_CS4__FEC_RX_ER             0x80000000
-                               MX51_PAD_EIM_CS5__FEC_CRS               0x80000000
-                               MX51_PAD_NANDF_RB2__FEC_COL             0x80000000
-                               MX51_PAD_NANDF_RB3__FEC_RX_CLK          0x80000000
-                               MX51_PAD_NANDF_D9__FEC_RDATA0           0x80000000
-                               MX51_PAD_NANDF_D8__FEC_TDATA0           0x80000000
-                               MX51_PAD_NANDF_CS2__FEC_TX_ER           0x80000000
-                               MX51_PAD_NANDF_CS3__FEC_MDC             0x80000000
-                               MX51_PAD_NANDF_CS4__FEC_TDATA1          0x80000000
-                               MX51_PAD_NANDF_CS5__FEC_TDATA2          0x80000000
-                               MX51_PAD_NANDF_CS6__FEC_TDATA3          0x80000000
-                               MX51_PAD_NANDF_CS7__FEC_TX_EN           0x80000000
-                               MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK      0x80000000
-                               MX51_PAD_EIM_A20__GPIO2_14 0x85 /* Reset */
+                               MX51_PAD_EIM_EB2__FEC_MDIO              0x000001f5
+                               MX51_PAD_EIM_EB3__FEC_RDATA1            0x00000085
+                               MX51_PAD_EIM_CS2__FEC_RDATA2            0x00000085
+                               MX51_PAD_EIM_CS3__FEC_RDATA3            0x00000085
+                               MX51_PAD_EIM_CS4__FEC_RX_ER             0x00000180
+                               MX51_PAD_EIM_CS5__FEC_CRS               0x00000180
+                               MX51_PAD_NANDF_RB2__FEC_COL             0x00000180
+                               MX51_PAD_NANDF_RB3__FEC_RX_CLK          0x00000180
+                               MX51_PAD_NANDF_D9__FEC_RDATA0           0x00002180
+                               MX51_PAD_NANDF_D8__FEC_TDATA0           0x00002004
+                               MX51_PAD_NANDF_CS2__FEC_TX_ER           0x00002004
+                               MX51_PAD_NANDF_CS3__FEC_MDC             0x00002004
+                               MX51_PAD_NANDF_CS4__FEC_TDATA1          0x00002004
+                               MX51_PAD_NANDF_CS5__FEC_TDATA2          0x00002004
+                               MX51_PAD_NANDF_CS6__FEC_TDATA3          0x00002004
+                               MX51_PAD_NANDF_CS7__FEC_TX_EN           0x00002004
+                               MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK      0x00002180
+                               MX51_PAD_NANDF_D11__FEC_RX_DV           0x000020a4
+                               MX51_PAD_EIM_A20__GPIO2_14              0x00000085 /* Phy Reset */
+                       >;
+               };
+
+               pinctrl_gpio_keys: gpiokeysgrp {
+                       fsl,pins = <
+                               MX51_PAD_EIM_A27__GPIO2_21              0x5
                        >;
                };
 
                        >;
                };
 
+               pinctrl_i2c1: i2c1grp {
+                       fsl,pins = <
+                               MX51_PAD_EIM_D19__I2C1_SCL              0x400001ed
+                               MX51_PAD_EIM_D16__I2C1_SDA              0x400001ed
+                       >;
+               };
+
                pinctrl_i2c2: i2c2grp {
                        fsl,pins = <
                                MX51_PAD_KEY_COL4__I2C2_SCL             0x400001ed
                        >;
                };
 
+               pinctrl_pmic: pmicgrp {
+                       fsl,pins = <
+                               MX51_PAD_GPIO1_8__GPIO1_8               0xe5 /* IRQ */
+                       >;
+               };
+
                pinctrl_uart1: uart1grp {
                        fsl,pins = <
                                MX51_PAD_UART1_RXD__UART1_RXD           0x1c5
                                MX51_PAD_EIM_D24__UART3_CTS             0x1c5
                        >;
                };
-       };
-};
 
-&uart1 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_uart1>;
-       fsl,uart-has-rtscts;
-       status = "okay";
-};
-
-&uart2 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_uart2>;
-       status = "okay";
-};
+               pinctrl_usbh1: usbh1grp {
+                       fsl,pins = <
+                               MX51_PAD_USBH1_CLK__USBH1_CLK           0x80000000
+                               MX51_PAD_USBH1_DIR__USBH1_DIR           0x80000000
+                               MX51_PAD_USBH1_NXT__USBH1_NXT           0x80000000
+                               MX51_PAD_USBH1_DATA0__USBH1_DATA0       0x80000000
+                               MX51_PAD_USBH1_DATA1__USBH1_DATA1       0x80000000
+                               MX51_PAD_USBH1_DATA2__USBH1_DATA2       0x80000000
+                               MX51_PAD_USBH1_DATA3__USBH1_DATA3       0x80000000
+                               MX51_PAD_USBH1_DATA4__USBH1_DATA4       0x80000000
+                               MX51_PAD_USBH1_DATA5__USBH1_DATA5       0x80000000
+                               MX51_PAD_USBH1_DATA6__USBH1_DATA6       0x80000000
+                               MX51_PAD_USBH1_DATA7__USBH1_DATA7       0x80000000
+                       >;
+               };
 
-&i2c2 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_i2c2>;
-       status = "okay";
+               pinctrl_usbh1reg: usbh1reggrp {
+                       fsl,pins = <
+                               MX51_PAD_EIM_D21__GPIO2_5               0x85
+                       >;
+               };
 
-       sgtl5000: codec@0a {
-               compatible = "fsl,sgtl5000";
-               reg = <0x0a>;
-               clocks = <&clk_26M>;
-               VDDA-supply = <&vdig_reg>;
-               VDDIO-supply = <&vvideo_reg>;
+               pinctrl_usbotgreg: usbotgreggrp {
+                       fsl,pins = <
+                               MX51_PAD_GPIO1_7__GPIO1_7               0x85
+                       >;
+               };
        };
 };
-
-&audmux {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_audmux>;
-       status = "okay";
-};
-
-&fec {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_fec>;
-       phy-mode = "mii";
-       phy-reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>;
-       phy-reset-duration = <1>;
-       status = "okay";
-};
-
-&kpp {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_kpp>;
-       linux,keymap = <
-               MATRIX_KEY(0, 0, KEY_UP)
-               MATRIX_KEY(0, 1, KEY_DOWN)
-               MATRIX_KEY(0, 2, KEY_VOLUMEDOWN)
-               MATRIX_KEY(0, 3, KEY_HOME)
-               MATRIX_KEY(1, 0, KEY_RIGHT)
-               MATRIX_KEY(1, 1, KEY_LEFT)
-               MATRIX_KEY(1, 2, KEY_ENTER)
-               MATRIX_KEY(1, 3, KEY_VOLUMEUP)
-               MATRIX_KEY(2, 0, KEY_F6)
-               MATRIX_KEY(2, 1, KEY_F8)
-               MATRIX_KEY(2, 2, KEY_F9)
-               MATRIX_KEY(2, 3, KEY_F10)
-               MATRIX_KEY(3, 0, KEY_F1)
-               MATRIX_KEY(3, 1, KEY_F2)
-               MATRIX_KEY(3, 2, KEY_F3)
-               MATRIX_KEY(3, 3, KEY_POWER)
-               >;
-       status = "okay";
-};
diff --git a/arch/arm/boot/dts/imx51-digi-connectcore-jsk.dts b/arch/arm/boot/dts/imx51-digi-connectcore-jsk.dts
new file mode 100644 (file)
index 0000000..1db517d
--- /dev/null
@@ -0,0 +1,108 @@
+/*
+ * Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include "imx51-digi-connectcore-som.dtsi"
+
+/ {
+       model = "Digi ConnectCore CC(W)-MX51 JSK";
+       compatible = "digi,connectcore-ccxmx51-jsk",
+                    "digi,connectcore-ccxmx51-som", "fsl,imx51";
+
+       chosen {
+               linux,stdout-path = &uart1;
+       };
+};
+
+&owire {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_owire>;
+       status = "okay";
+};
+
+&uart1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart1>;
+       status = "okay";
+};
+
+&uart2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart2>;
+       status = "okay";
+};
+
+&uart3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart3>;
+       status = "okay";
+};
+
+&usbotg {
+       dr_mode = "otg";
+       status = "okay";
+};
+
+&usbh1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usbh1>;
+       dr_mode = "host";
+       phy_type = "ulpi";
+       disable-over-current;
+       status = "okay";
+};
+
+&iomuxc {
+       imx51-digi-connectcore-jsk {
+               pinctrl_owire: owiregrp {
+                       fsl,pins = <
+                               MX51_PAD_OWIRE_LINE__OWIRE_LINE         0x40000000
+                       >;
+               };
+
+               pinctrl_uart1: uart1grp {
+                       fsl,pins = <
+                               MX51_PAD_UART1_RXD__UART1_RXD           0x1c5
+                               MX51_PAD_UART1_TXD__UART1_TXD           0x1c5
+                       >;
+               };
+
+               pinctrl_uart2: uart2grp {
+                       fsl,pins = <
+                               MX51_PAD_UART2_RXD__UART2_RXD           0x1c5
+                               MX51_PAD_UART2_TXD__UART2_TXD           0x1c5
+                       >;
+               };
+
+               pinctrl_uart3: uart3grp {
+                       fsl,pins = <
+                               MX51_PAD_UART3_RXD__UART3_RXD           0x1c5
+                               MX51_PAD_UART3_TXD__UART3_TXD           0x1c5
+                       >;
+               };
+
+               pinctrl_usbh1: usbh1grp {
+                       fsl,pins = <
+                               MX51_PAD_USBH1_DATA0__USBH1_DATA0       0x1e5
+                               MX51_PAD_USBH1_DATA1__USBH1_DATA1       0x1e5
+                               MX51_PAD_USBH1_DATA2__USBH1_DATA2       0x1e5
+                               MX51_PAD_USBH1_DATA3__USBH1_DATA3       0x1e5
+                               MX51_PAD_USBH1_DATA4__USBH1_DATA4       0x1e5
+                               MX51_PAD_USBH1_DATA5__USBH1_DATA5       0x1e5
+                               MX51_PAD_USBH1_DATA6__USBH1_DATA6       0x1e5
+                               MX51_PAD_USBH1_DATA7__USBH1_DATA7       0x1e5
+                               MX51_PAD_USBH1_CLK__USBH1_CLK           0x1e5
+                               MX51_PAD_USBH1_DIR__USBH1_DIR           0x1e5
+                               MX51_PAD_USBH1_NXT__USBH1_NXT           0x1e5
+                               MX51_PAD_USBH1_STP__USBH1_STP           0x1e5
+                       >;
+               };
+       };
+};
diff --git a/arch/arm/boot/dts/imx51-digi-connectcore-som.dtsi b/arch/arm/boot/dts/imx51-digi-connectcore-som.dtsi
new file mode 100644 (file)
index 0000000..321662f
--- /dev/null
@@ -0,0 +1,377 @@
+/*
+ * Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+#include "imx51.dtsi"
+
+/ {
+       model = "Digi ConnectCore CC(W)-MX51";
+       compatible = "digi,connectcore-ccxmx51-som", "fsl,imx51";
+
+       memory {
+               reg = <0x90000000 0x08000000>;
+       };
+};
+
+&ecspi1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_ecspi1>;
+       fsl,spi-num-chipselects = <1>;
+       cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>;
+       status = "okay";
+
+       pmic: mc13892@0 {
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_mc13892>;
+               compatible = "fsl,mc13892";
+               spi-max-frequency = <16000000>;
+               spi-cs-high;
+               reg = <0>;
+               interrupt-parent = <&gpio1>;
+               interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
+               fsl,mc13xxx-uses-rtc;
+
+               regulators {
+                       sw1_reg: sw1 {
+                               regulator-min-microvolt = <1000000>;
+                               regulator-max-microvolt = <1100000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       sw2_reg: sw2 {
+                               regulator-min-microvolt = <1225000>;
+                               regulator-max-microvolt = <1225000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       sw3_reg: sw3 {
+                               regulator-min-microvolt = <1200000>;
+                               regulator-max-microvolt = <1200000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       swbst_reg: swbst { };
+
+                       viohi_reg: viohi {
+                               regulator-always-on;
+                       };
+
+                       vpll_reg: vpll {
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <1800000>;
+                               regulator-always-on;
+                       };
+
+                       vdig_reg: vdig {
+                               regulator-min-microvolt = <1250000>;
+                               regulator-max-microvolt = <1250000>;
+                               regulator-always-on;
+                       };
+
+                       vsd_reg: vsd {
+                               regulator-min-microvolt = <3150000>;
+                               regulator-max-microvolt = <3150000>;
+                               regulator-always-on;
+                       };
+
+                       vusb2_reg: vusb2 {
+                               regulator-min-microvolt = <2600000>;
+                               regulator-max-microvolt = <2600000>;
+                               regulator-always-on;
+                       };
+
+                       vvideo_reg: vvideo {
+                               regulator-min-microvolt = <2775000>;
+                               regulator-max-microvolt = <2775000>;
+                               regulator-always-on;
+                       };
+
+                       vaudio_reg: vaudio {
+                               regulator-min-microvolt = <3000000>;
+                               regulator-max-microvolt = <3000000>;
+                               regulator-always-on;
+                       };
+
+                       vcam_reg: vcam {
+                               regulator-min-microvolt = <2750000>;
+                               regulator-max-microvolt = <2750000>;
+                               regulator-always-on;
+                       };
+
+                       vgen1_reg: vgen1 {
+                               regulator-min-microvolt = <1200000>;
+                               regulator-max-microvolt = <1200000>;
+                               regulator-always-on;
+                       };
+
+                       vgen2_reg: vgen2 {
+                               regulator-min-microvolt = <3150000>;
+                               regulator-max-microvolt = <3150000>;
+                               regulator-always-on;
+                       };
+
+                       vgen3_reg: vgen3 {
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <1800000>;
+                               regulator-always-on;
+                       };
+
+                       vusb_reg: vusb {
+                               regulator-always-on;
+                       };
+
+                       gpo1_reg: gpo1 { };
+
+                       gpo2_reg: gpo2 { };
+
+                       gpo3_reg: gpo3 { };
+
+                       gpo4_reg: gpo4 { };
+
+                       pwgt2spi_reg: pwgt2spi {
+                               regulator-always-on;
+                       };
+
+                       vcoincell_reg: vcoincell {
+                               regulator-min-microvolt = <3000000>;
+                               regulator-max-microvolt = <3000000>;
+                               regulator-always-on;
+                       };
+               };
+       };
+};
+
+&esdhc2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_esdhc2>;
+       cap-sdio-irq;
+       enable-sdio-wakeup;
+       keep-power-in-suspend;
+       max-frequency = <50000000>;
+       no-1-8-v;
+       non-removable;
+       vmmc-supply = <&gpo4_reg>;
+       status = "okay";
+};
+
+&fec {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_fec>;
+       phy-mode = "mii";
+       phy-supply = <&gpo3_reg>;
+       /* Pins shared with LCD2, keep status disabled */
+};
+
+&i2c2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c2>;
+       clock-frequency = <400000>;
+       status = "okay";
+
+       mma7455l@1d {
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_mma7455l>;
+               compatible = "fsl,mma7455l";
+               reg = <0x1d>;
+               interrupt-parent = <&gpio1>;
+               interrupts = <7 IRQ_TYPE_LEVEL_HIGH>, <6 IRQ_TYPE_LEVEL_HIGH>;
+       };
+};
+
+&nfc {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_nfc>;
+       nand-bus-width = <8>;
+       nand-ecc-mode = "hw";
+       nand-on-flash-bbt;
+       status = "okay";
+};
+
+&usbotg {
+       phy_type = "utmi_wide";
+       disable-over-current;
+       /* Device role is not known, keep status disabled */
+};
+
+&weim {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_weim>;
+       status = "okay";
+
+       lan9221: lan9221@5,0 {
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_lan9221>;
+               compatible = "smsc,lan9221", "smsc,lan9115";
+               reg = <5 0x00000000 0x1000>;
+               fsl,weim-cs-timing = <
+                       0x00420081 0x00000000
+                       0x32260000 0x00000000
+                       0x72080f00 0x00000000
+               >;
+               clocks = <&clks IMX5_CLK_DUMMY>;
+               interrupt-parent = <&gpio1>;
+               interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
+               phy-mode = "mii";
+               reg-io-width = <2>;
+               smsc,irq-push-pull;
+               vdd33a-supply = <&gpo2_reg>;
+               vddvario-supply = <&gpo2_reg>;
+       };
+};
+
+&iomuxc {
+       imx51-digi-connectcore-som {
+               pinctrl_ecspi1: ecspi1grp {
+                       fsl,pins = <
+                               MX51_PAD_CSPI1_MISO__ECSPI1_MISO        0x185
+                               MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI        0x185
+                               MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK        0x185
+                               MX51_PAD_CSPI1_SS0__GPIO4_24            0x85 /* CS0 */
+                       >;
+               };
+
+               pinctrl_esdhc2: esdhc2grp {
+                       fsl,pins = <
+                               MX51_PAD_SD2_CMD__SD2_CMD               0x400020d5
+                               MX51_PAD_SD2_CLK__SD2_CLK               0x20d5
+                               MX51_PAD_SD2_DATA0__SD2_DATA0           0x20d5
+                               MX51_PAD_SD2_DATA1__SD2_DATA1           0x20d5
+                               MX51_PAD_SD2_DATA2__SD2_DATA2           0x20d5
+                               MX51_PAD_SD2_DATA3__SD2_DATA3           0x20d5
+                       >;
+               };
+
+               pinctrl_fec: fecgrp {
+                       fsl,pins = <
+                               MX51_PAD_DI_GP3__FEC_TX_ER              0x80000000
+                               MX51_PAD_DI2_PIN4__FEC_CRS              0x80000000
+                               MX51_PAD_DI2_PIN2__FEC_MDC              0x80000000
+                               MX51_PAD_DI2_PIN3__FEC_MDIO             0x80000000
+                               MX51_PAD_DI2_DISP_CLK__FEC_RDATA1       0x80000000
+                               MX51_PAD_DI_GP4__FEC_RDATA2             0x80000000
+                               MX51_PAD_DISP2_DAT0__FEC_RDATA3         0x80000000
+                               MX51_PAD_DISP2_DAT1__FEC_RX_ER          0x80000000
+                               MX51_PAD_DISP2_DAT6__FEC_TDATA1         0x80000000
+                               MX51_PAD_DISP2_DAT7__FEC_TDATA2         0x80000000
+                               MX51_PAD_DISP2_DAT8__FEC_TDATA3         0x80000000
+                               MX51_PAD_DISP2_DAT9__FEC_TX_EN          0x80000000
+                               MX51_PAD_DISP2_DAT10__FEC_COL           0x80000000
+                               MX51_PAD_DISP2_DAT11__FEC_RX_CLK        0x80000000
+                               MX51_PAD_DISP2_DAT12__FEC_RX_DV         0x80000000
+                               MX51_PAD_DISP2_DAT13__FEC_TX_CLK        0x80000000
+                               MX51_PAD_DISP2_DAT14__FEC_RDATA0        0x80000000
+                               MX51_PAD_DISP2_DAT15__FEC_TDATA0        0x80000000
+                       >;
+               };
+
+               pinctrl_i2c2: i2c2grp {
+                       fsl,pins = <
+                               MX51_PAD_GPIO1_2__I2C2_SCL              0x400001ed
+                               MX51_PAD_GPIO1_3__I2C2_SDA              0x400001ed
+                       >;
+               };
+
+               pinctrl_nfc: nfcgrp {
+                       fsl,pins = <
+                               MX51_PAD_NANDF_D0__NANDF_D0             0x80000000
+                               MX51_PAD_NANDF_D1__NANDF_D1             0x80000000
+                               MX51_PAD_NANDF_D2__NANDF_D2             0x80000000
+                               MX51_PAD_NANDF_D3__NANDF_D3             0x80000000
+                               MX51_PAD_NANDF_D4__NANDF_D4             0x80000000
+                               MX51_PAD_NANDF_D5__NANDF_D5             0x80000000
+                               MX51_PAD_NANDF_D6__NANDF_D6             0x80000000
+                               MX51_PAD_NANDF_D7__NANDF_D7             0x80000000
+                               MX51_PAD_NANDF_ALE__NANDF_ALE           0x80000000
+                               MX51_PAD_NANDF_CLE__NANDF_CLE           0x80000000
+                               MX51_PAD_NANDF_RE_B__NANDF_RE_B         0x80000000
+                               MX51_PAD_NANDF_WE_B__NANDF_WE_B         0x80000000
+                               MX51_PAD_NANDF_WP_B__NANDF_WP_B         0x80000000
+                               MX51_PAD_NANDF_CS0__NANDF_CS0           0x80000000
+                               MX51_PAD_NANDF_RB0__NANDF_RB0           0x80000000
+                       >;
+               };
+
+               pinctrl_lan9221: lan9221grp {
+                       fsl,pins = <
+                               MX51_PAD_GPIO1_9__GPIO1_9               0xe5 /* IRQ */
+                       >;
+               };
+
+               pinctrl_mc13892: mc13892grp {
+                       fsl,pins = <
+                               MX51_PAD_GPIO1_5__GPIO1_5               0xe5 /* IRQ */
+                       >;
+               };
+
+               pinctrl_mma7455l: mma7455lgrp {
+                       fsl,pins = <
+                               MX51_PAD_GPIO1_7__GPIO1_7               0xe5 /* IRQ1 */
+                               MX51_PAD_GPIO1_6__GPIO1_6               0xe5 /* IRQ2 */
+                       >;
+               };
+
+               pinctrl_weim: weimgrp {
+                       fsl,pins = <
+                               MX51_PAD_EIM_DA0__EIM_DA0               0x80000000
+                               MX51_PAD_EIM_DA1__EIM_DA1               0x80000000
+                               MX51_PAD_EIM_DA2__EIM_DA2               0x80000000
+                               MX51_PAD_EIM_DA3__EIM_DA3               0x80000000
+                               MX51_PAD_EIM_DA4__EIM_DA4               0x80000000
+                               MX51_PAD_EIM_DA5__EIM_DA5               0x80000000
+                               MX51_PAD_EIM_DA6__EIM_DA6               0x80000000
+                               MX51_PAD_EIM_DA7__EIM_DA7               0x80000000
+                               MX51_PAD_EIM_DA8__EIM_DA8               0x80000000
+                               MX51_PAD_EIM_DA9__EIM_DA9               0x80000000
+                               MX51_PAD_EIM_DA10__EIM_DA10             0x80000000
+                               MX51_PAD_EIM_DA11__EIM_DA11             0x80000000
+                               MX51_PAD_EIM_DA12__EIM_DA12             0x80000000
+                               MX51_PAD_EIM_DA13__EIM_DA13             0x80000000
+                               MX51_PAD_EIM_DA14__EIM_DA14             0x80000000
+                               MX51_PAD_EIM_DA15__EIM_DA15             0x80000000
+                               MX51_PAD_EIM_A16__EIM_A16               0x80000000
+                               MX51_PAD_EIM_A17__EIM_A17               0x80000000
+                               MX51_PAD_EIM_A18__EIM_A18               0x80000000
+                               MX51_PAD_EIM_A19__EIM_A19               0x80000000
+                               MX51_PAD_EIM_A20__EIM_A20               0x80000000
+                               MX51_PAD_EIM_A21__EIM_A21               0x80000000
+                               MX51_PAD_EIM_A22__EIM_A22               0x80000000
+                               MX51_PAD_EIM_A23__EIM_A23               0x80000000
+                               MX51_PAD_EIM_A24__EIM_A24               0x80000000
+                               MX51_PAD_EIM_A25__EIM_A25               0x80000000
+                               MX51_PAD_EIM_A26__EIM_A26               0x80000000
+                               MX51_PAD_EIM_A27__EIM_A27               0x80000000
+                               MX51_PAD_EIM_D16__EIM_D16               0x80000000
+                               MX51_PAD_EIM_D17__EIM_D17               0x80000000
+                               MX51_PAD_EIM_D18__EIM_D18               0x80000000
+                               MX51_PAD_EIM_D19__EIM_D19               0x80000000
+                               MX51_PAD_EIM_D20__EIM_D20               0x80000000
+                               MX51_PAD_EIM_D21__EIM_D21               0x80000000
+                               MX51_PAD_EIM_D22__EIM_D22               0x80000000
+                               MX51_PAD_EIM_D23__EIM_D23               0x80000000
+                               MX51_PAD_EIM_D24__EIM_D24               0x80000000
+                               MX51_PAD_EIM_D25__EIM_D25               0x80000000
+                               MX51_PAD_EIM_D26__EIM_D26               0x80000000
+                               MX51_PAD_EIM_D27__EIM_D27               0x80000000
+                               MX51_PAD_EIM_D28__EIM_D28               0x80000000
+                               MX51_PAD_EIM_D29__EIM_D29               0x80000000
+                               MX51_PAD_EIM_D30__EIM_D30               0x80000000
+                               MX51_PAD_EIM_D31__EIM_D31               0x80000000
+                               MX51_PAD_EIM_OE__EIM_OE                 0x80000000
+                               MX51_PAD_EIM_DTACK__EIM_DTACK           0x80000000
+                               MX51_PAD_EIM_LBA__EIM_LBA               0x80000000
+                               MX51_PAD_EIM_CS5__EIM_CS5               0x80000000 /* CS5 */
+                       >;
+               };
+       };
+};
index 9b3acf6e4282f3735e27e3a7c0467821fcfe95bc..63164266af8309c04ed8e82e17257d5ea02e6633 100644 (file)
                compatible = "nxp,pcf8563";
                reg = <0x51>;
        };
+
+       tsc2007: tsc2007@49 {
+               compatible = "ti,tsc2007";
+               gpios = <&gpio4 0 1>;
+               interrupt-parent = <&gpio4>;
+               interrupts = <0x0 0x8>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_tsc2007_1>;
+               reg = <0x49>;
+               ti,x-plate-ohms = <180>;
+       };
 };
 
 &iomuxc {
index 5cec4f322096086b05f88a1e011dae2e210c8f10..75e66c9c6144ef02badcb6cafee8755418035b30 100644 (file)
        model = "Eukrea CPUIMX51";
        compatible = "eukrea,mbimxsd51","eukrea,cpuimx51", "fsl,imx51";
 
+       clocks {
+               clk24M: can_clock {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <24000000>;
+               };
+       };
+
        gpio_keys {
                compatible = "gpio-keys";
                pinctrl-names = "default";
                };
        };
 
+       regulators {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               reg_can: regulator@0 {
+                       compatible = "regulator-fixed";
+                       reg = <0>;
+                       regulator-name = "CAN_RST";
+                       regulator-min-microvolt = <3300000>;
+                       regulator-max-microvolt = <3300000>;
+                       gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
+                       startup-delay-us = <20000>;
+                       enable-active-high;
+               };
+       };
+
        sound {
                compatible = "eukrea,asoc-tlv320";
                eukrea,model = "imx51-eukrea-tlv320aic23";
                fsl,mux-int-port = <2>;
                fsl,mux-ext-port = <3>;
        };
+
+       usbphy {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "simple-bus";
+
+               usbh1phy: usbh1phy@0 {
+                       compatible = "usb-nop-xceiv";
+                       reg = <0>;
+                       clocks = <&clks IMX5_CLK_USB_PHY_GATE>;
+                       clock-names = "main_clk";
+                       clock-frequency = <19200000>;
+               };
+       };
 };
 
 &audmux {
        status = "okay";
 };
 
+&ecspi1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_ecspi1>;
+       fsl,spi-num-chipselects = <1>;
+       cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
+       status = "okay";
+
+       can0: can@0 {
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_can>;
+               compatible = "microchip,mcp2515";
+               reg = <0>;
+               clocks = <&clk24M>;
+               spi-max-frequency = <10000000>;
+               interrupt-parent = <&gpio1>;
+               interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
+               vdd-supply = <&reg_can>;
+       };
+};
+
 &i2c1 {
        tlv320aic23: codec@1a {
                compatible = "ti,tlv320aic23";
                        >;
                };
 
+
+               pinctrl_can: cangrp {
+                       fsl,pins = <
+                               MX51_PAD_CSI2_PIXCLK__GPIO4_15          0x80000000      /* nReset */
+                               MX51_PAD_GPIO1_1__GPIO1_1               0x80000000      /* IRQ */
+                       >;
+               };
+
+               pinctrl_ecspi1: ecspi1grp {
+                       fsl,pins = <
+                               MX51_PAD_CSPI1_MISO__ECSPI1_MISO        0x185
+                               MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI        0x185
+                               MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK        0x185
+                               MX51_PAD_CSPI1_SS0__GPIO4_24            0x80000000      /* CS0 */
+                       >;
+               };
+
                pinctrl_esdhc1: esdhc1grp {
                        fsl,pins = <
                                MX51_PAD_SD1_CMD__SD1_CMD               0x400020d5
                                MX51_PAD_CSI1_D9__GPIO3_13 0x1f5
                        >;
                };
+
+               pinctrl_usbh1: usbh1grp {
+                       fsl,pins = <
+                               MX51_PAD_USBH1_CLK__USBH1_CLK     0x1e5
+                               MX51_PAD_USBH1_DIR__USBH1_DIR     0x1e5
+                               MX51_PAD_USBH1_NXT__USBH1_NXT     0x1e5
+                               MX51_PAD_USBH1_DATA0__USBH1_DATA0 0x1e5
+                               MX51_PAD_USBH1_DATA1__USBH1_DATA1 0x1e5
+                               MX51_PAD_USBH1_DATA2__USBH1_DATA2 0x1e5
+                               MX51_PAD_USBH1_DATA3__USBH1_DATA3 0x1e5
+                               MX51_PAD_USBH1_DATA4__USBH1_DATA4 0x1e5
+                               MX51_PAD_USBH1_DATA5__USBH1_DATA5 0x1e5
+                               MX51_PAD_USBH1_DATA6__USBH1_DATA6 0x1e5
+                               MX51_PAD_USBH1_DATA7__USBH1_DATA7 0x1e5
+                               MX51_PAD_USBH1_STP__USBH1_STP     0x1e5
+                       >;
+               };
+
+               pinctrl_usbh1_vbus: usbh1-vbusgrp {
+                       fsl,pins = <
+                               MX51_PAD_EIM_CS3__GPIO2_28 0x1f5
+                       >;
+               };
        };
 };
 
        fsl,uart-has-rtscts;
        status = "okay";
 };
+
+&usbh1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usbh1>;
+       fsl,usbphy = <&usbh1phy>;
+       dr_mode = "host";
+       phy_type = "ulpi";
+       status = "okay";
+};
+
+&usbotg {
+       dr_mode = "otg";
+       phy_type = "utmi_wide";
+       status = "okay";
+};
+
+&usbphy0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usbh1_vbus>;
+       reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
+};
index 5f8216d08f6b5f4ff98e13df047ab9b27ee83706..bebbf3ba0d5e37acac9b12e11fbefc732110bff6 100644 (file)
@@ -19,6 +19,7 @@
 
 / {
        aliases {
+               ethernet0 = &fec;
                gpio0 = &gpio1;
                gpio1 = &gpio2;
                gpio2 = &gpio3;
 
                ckil {
                        compatible = "fsl,imx-ckil", "fixed-clock";
+                       #clock-cells = <0>;
                        clock-frequency = <32768>;
                };
 
                ckih1 {
                        compatible = "fsl,imx-ckih1", "fixed-clock";
+                       #clock-cells = <0>;
                        clock-frequency = <0>;
                };
 
                ckih2 {
                        compatible = "fsl,imx-ckih2", "fixed-clock";
+                       #clock-cells = <0>;
                        clock-frequency = <0>;
                };
 
                osc {
                        compatible = "fsl,imx-osc", "fixed-clock";
+                       #clock-cells = <0>;
                        clock-frequency = <24000000>;
                };
        };
                        };
 
                        nfc: nand@83fdb000 {
+                               #address-cells = <1>;
+                               #size-cells = <1>;
                                compatible = "fsl,imx51-nand";
                                reg = <0x83fdb000 0x1000 0xcfff0000 0x10000>;
                                interrupts = <8>;
index f6d3ac3e55872657601c8a1785c8dd1e65707632..d5d146a8b149cd14601cef1b26857002d27eec9b 100644 (file)
@@ -17,7 +17,8 @@
        compatible = "denx,imx53-m53evk", "fsl,imx53";
 
        memory {
-               reg = <0x70000000 0x20000000>;
+               reg = <0x70000000 0x20000000>,
+                     <0xb0000000 0x20000000>;
        };
 
        soc {
                irq-trigger = <0x1>;
 
                stmpe_touchscreen {
-                       compatible = "stmpe,ts";
+                       compatible = "st,stmpe-ts";
                        reg = <0>;
-                       ts,sample-time = <4>;
-                       ts,mod-12b = <1>;
-                       ts,ref-sel = <0>;
-                       ts,adc-freq = <1>;
-                       ts,ave-ctrl = <3>;
-                       ts,touch-det-delay = <3>;
-                       ts,settling = <4>;
-                       ts,fraction-z = <7>;
-                       ts,i-drive = <1>;
+                       st,sample-time = <4>;
+                       st,mod-12b = <1>;
+                       st,ref-sel = <0>;
+                       st,adc-freq = <1>;
+                       st,ave-ctrl = <3>;
+                       st,touch-det-delay = <3>;
+                       st,settling = <4>;
+                       st,fraction-z = <7>;
+                       st,i-drive = <1>;
                };
        };
 
index 7c8c129698929151512f282c5baad14c69f51309..3f2400b8560b5d7b2a257e0eb00ba752dd2c9464 100644 (file)
        model = "TQ MBa53 starter kit";
        compatible = "tq,mba53", "tq,tqma53", "fsl,imx53";
 
+       chosen {
+               stdout-path = &uart2;
+       };
+
        backlight {
                compatible = "pwm-backlight";
                pwms = <&pwm2 0 50000>;
index 3f825a6813dae47a2412aebbf42788ca27cf8a26..fd8c60dde7de7078fab6dfa41cb3d3083533d9b2 100644 (file)
 #include "imx53.dtsi"
 
 / {
+       chosen {
+               stdout-path = &uart1;
+       };
+
        memory {
-               reg = <0x70000000 0x40000000>;
+               reg = <0x70000000 0x20000000>,
+                     <0xb0000000 0x20000000>;
        };
 
        display0: display@di0 {
                        >;
                };
 
+               pinctrl_vga_sync: vgasync-grp {
+                       fsl,pins = <
+                               /* VGA_HSYNC, VSYNC with max drive strength */
+                               MX53_PAD_EIM_OE__IPU_DI1_PIN7 0xe6
+                               MX53_PAD_EIM_RW__IPU_DI1_PIN8 0xe6
+                       >;
+               };
+
                pinctrl_uart1: uart1grp {
                        fsl,pins = <
                                MX53_PAD_CSI0_DAT10__UART1_TXD_MUX      0x1e4
        };
 };
 
+&tve {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_vga_sync>;
+       fsl,tve-mode = "vga";
+       fsl,hsync-pin = <4>;
+       fsl,vsync-pin = <6>;
+       status = "okay";
+};
+
 &uart1 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_uart1>;
index 0217dde3b36b474d19d22a6b7192fb2c4aeefd61..3b73e81dc3f0df58507a7a6a3ae0556f9abee7dd 100644 (file)
        soc {
                display: display@di0 {
                        compatible = "fsl,imx-parallel-display";
-                       crtcs = <&ipu 0>;
                        interface-pix-fmt = "rgb24";
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_rgb24_vga1>;
                        status = "okay";
 
+                       port {
+                               display0_in: endpoint {
+                                       remote-endpoint = <&ipu_di0_disp0>;
+                               };
+                       };
+
                        display-timings {
                                VGA {
                                        clock-frequency = <25200000>;
        };
 };
 
+&ipu_di0_disp0 {
+       remote-endpoint = <&display0_in>;
+};
+
 &kpp {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_kpp>;
index b57ab57740f686a96200b9a51c63c7d982d82644..375e66fad578e2e67ef611174fff6bd66708f6a2 100644 (file)
@@ -18,6 +18,7 @@
 
 / {
        aliases {
+               ethernet0 = &fec;
                gpio0 = &gpio1;
                gpio1 = &gpio2;
                gpio2 = &gpio3;
 
                ckil {
                        compatible = "fsl,imx-ckil", "fixed-clock";
+                       #clock-cells = <0>;
                        clock-frequency = <32768>;
                };
 
                ckih1 {
                        compatible = "fsl,imx-ckih1", "fixed-clock";
+                       #clock-cells = <0>;
                        clock-frequency = <22579200>;
                };
 
                ckih2 {
                        compatible = "fsl,imx-ckih2", "fixed-clock";
+                       #clock-cells = <0>;
                        clock-frequency = <0>;
                };
 
                osc {
                        compatible = "fsl,imx-osc", "fixed-clock";
+                       #clock-cells = <0>;
                        clock-frequency = <24000000>;
                };
        };
 
                                        port {
                                                lvds1_in: endpoint {
-                                                       remote-endpoint = <&ipu_di0_lvds0>;
+                                                       remote-endpoint = <&ipu_di1_lvds1>;
                                                };
                                        };
                                };
                                clocks = <&clks IMX5_CLK_VPU_GATE>,
                                         <&clks IMX5_CLK_VPU_GATE>;
                                clock-names = "per", "ahb";
+                               resets = <&src 1>;
                                iram = <&ocram>;
-                               status = "disabled";
                        };
                };
 
index 5bfae54fb7806f4391a93ab89bdb1dd621358c03..5373a5f2782bedb40786a4701833b162821a1553 100644 (file)
        model = "SolidRun HummingBoard DL/Solo";
        compatible = "solidrun,hummingboard", "fsl,imx6dl";
 
+       chosen {
+               stdout-path = &uart1;
+       };
+
        ir_recv: ir-receiver {
                compatible = "gpio-ir-receiver";
                gpios = <&gpio1 2 1>;
        status = "okay";
 };
 
+&hdmi {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_hummingboard_hdmi>;
+       ddc-i2c-bus = <&i2c2>;
+       status = "okay";
+};
+
 &i2c1 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_hummingboard_i2c1>;
         */
 };
 
+&i2c2 {
+       clock-frequency = <100000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_hummingboard_i2c2>;
+       status = "okay";
+};
+
 &iomuxc {
        hummingboard {
                pinctrl_hummingboard_flexcan1: hummingboard-flexcan1 {
                        >;
                };
 
+               pinctrl_hummingboard_hdmi: hummingboard-hdmi {
+                       fsl,pins = <
+                               MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
+                       >;
+               };
+
                pinctrl_hummingboard_i2c1: hummingboard-i2c1 {
                        fsl,pins = <
                                MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
                        >;
                };
 
+               pinctrl_hummingboard_i2c2: hummingboard-i2c2 {
+                       fsl,pins = <
+                               MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
+                               MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+                       >;
+               };
+
                pinctrl_hummingboard_spdif: hummingboard-spdif {
                        fsl,pins = <MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x13091>;
                };
diff --git a/arch/arm/boot/dts/imx6dl-phytec-pbab01.dts b/arch/arm/boot/dts/imx6dl-phytec-pbab01.dts
new file mode 100644 (file)
index 0000000..08e9780
--- /dev/null
@@ -0,0 +1,19 @@
+/*
+ * Copyright 2013 Christian Hemp, Phytec Messtechnik GmbH
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+#include "imx6dl-phytec-pfla02.dtsi"
+#include "imx6qdl-phytec-pbab01.dtsi"
+
+/ {
+       model = "Phytec phyFLEX-i.MX6 DualLite/Solo Carrier-Board";
+       compatible = "phytec,imx6dl-pbab01", "phytec,imx6dl-pfla02", "fsl,imx6dl";
+};
diff --git a/arch/arm/boot/dts/imx6dl-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6dl-phytec-pfla02.dtsi
new file mode 100644 (file)
index 0000000..964bc2a
--- /dev/null
@@ -0,0 +1,22 @@
+/*
+ * Copyright 2013 Christian Hemp, Phytec Messtechnik GmbH
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include "imx6dl.dtsi"
+#include "imx6qdl-phytec-pfla02.dtsi"
+
+/ {
+       model = "Phytec phyFLEX-i.MX6 DualLite/Solo";
+       compatible = "phytec,imx6dl-pfla02", "fsl,imx6dl";
+
+       memory {
+               reg = <0x10000000 0x20000000>;
+       };
+};
diff --git a/arch/arm/boot/dts/imx6dl-riotboard.dts b/arch/arm/boot/dts/imx6dl-riotboard.dts
new file mode 100644 (file)
index 0000000..909fafc
--- /dev/null
@@ -0,0 +1,539 @@
+/*
+ * Copyright 2014 Iain Paton <ipaton0@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+/dts-v1/;
+#include "imx6dl.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+       model = "RIoTboard i.MX6S";
+       compatible = "riot,imx6s-riotboard", "fsl,imx6dl";
+
+       memory {
+               reg = <0x10000000 0x40000000>;
+       };
+
+       regulators {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               reg_2p5v: regulator@0 {
+                       compatible = "regulator-fixed";
+                       reg = <0>;
+                       regulator-name = "2P5V";
+                       regulator-min-microvolt = <2500000>;
+                       regulator-max-microvolt = <2500000>;
+               };
+
+               reg_3p3v: regulator@1 {
+                       compatible = "regulator-fixed";
+                       reg = <1>;
+                       regulator-name = "3P3V";
+                       regulator-min-microvolt = <3300000>;
+                       regulator-max-microvolt = <3300000>;
+               };
+
+               reg_usb_otg_vbus: regulator@2 {
+                       compatible = "regulator-fixed";
+                       reg = <2>;
+                       regulator-name = "usb_otg_vbus";
+                       regulator-min-microvolt = <5000000>;
+                       regulator-max-microvolt = <5000000>;
+                       gpio = <&gpio3 22 0>;
+                       enable-active-high;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_led>;
+
+               led0: user1 {
+                       label = "user1";
+                       gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
+                       default-state = "on";
+                       linux,default-trigger = "heartbeat";
+               };
+
+               led1: user2 {
+                       label = "user2";
+                       gpios = <&gpio3 28 GPIO_ACTIVE_LOW>;
+                       default-state = "off";
+               };
+       };
+
+       sound {
+               compatible = "fsl,imx-audio-sgtl5000";
+               model = "imx6-riotboard-sgtl5000";
+               ssi-controller = <&ssi1>;
+               audio-codec = <&codec>;
+               audio-routing =
+                       "MIC_IN", "Mic Jack",
+                       "Mic Jack", "Mic Bias",
+                       "Headphone Jack", "HP_OUT";
+                       mux-int-port = <1>;
+                       mux-ext-port = <3>;
+       };
+};
+
+&audmux {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_audmux>;
+       status = "okay";
+};
+
+&fec {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_enet>;
+       phy-mode = "rgmii";
+       phy-reset-gpios = <&gpio3 31 0>;
+       interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
+                             <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
+       status = "okay";
+};
+
+&hdmi {
+       ddc-i2c-bus = <&i2c2>;
+       status = "okay";
+};
+
+&i2c1 {
+       clock-frequency = <100000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c1>;
+       status = "okay";
+
+       codec: sgtl5000@0a {
+               compatible = "fsl,sgtl5000";
+               reg = <0x0a>;
+               clocks = <&clks 201>;
+               VDDA-supply = <&reg_2p5v>;
+               VDDIO-supply = <&reg_3p3v>;
+       };
+
+       pmic: pf0100@08 {
+               compatible = "fsl,pfuze100";
+               reg = <0x08>;
+               interrupt-parent = <&gpio5>;
+               interrupts = <16 8>;
+
+               regulators {
+                       reg_vddcore: sw1ab {                            /* VDDARM_IN */
+                               regulator-min-microvolt = <300000>;
+                               regulator-max-microvolt = <1875000>;
+                               regulator-always-on;
+                       };
+
+                       reg_vddsoc: sw1c {                              /* VDDSOC_IN */
+                               regulator-min-microvolt = <300000>;
+                               regulator-max-microvolt = <1875000>;
+                               regulator-always-on;
+                       };
+
+                       reg_gen_3v3: sw2 {                              /* VDDHIGH_IN */
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-always-on;
+                       };
+
+                       reg_ddr_1v5a: sw3a {                            /* NVCC_DRAM, NVCC_RGMII */
+                               regulator-min-microvolt = <400000>;
+                               regulator-max-microvolt = <1975000>;
+                               regulator-always-on;
+                       };
+
+                       reg_ddr_1v5b: sw3b {                            /* NVCC_DRAM, NVCC_RGMII */
+                               regulator-min-microvolt = <400000>;
+                               regulator-max-microvolt = <1975000>;
+                               regulator-always-on;
+                       };
+
+                       reg_ddr_vtt: sw4 {                              /* MIPI conn */
+                               regulator-min-microvolt = <400000>;
+                               regulator-max-microvolt = <1975000>;
+                               regulator-always-on;
+                       };
+
+                       reg_5v_600mA: swbst {                           /* not used */
+                               regulator-min-microvolt = <5000000>;
+                               regulator-max-microvolt = <5150000>;
+                       };
+
+                       reg_snvs_3v: vsnvs {                            /* VDD_SNVS_IN */
+                               regulator-min-microvolt = <1500000>;
+                               regulator-max-microvolt = <3000000>;
+                               regulator-always-on;
+                       };
+
+                       vref_reg: vrefddr {                             /* VREF_DDR */
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       reg_vgen1_1v5: vgen1 {                          /* not used */
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <1550000>;
+                       };
+
+                       reg_vgen2_1v2_eth: vgen2 {                      /* pcie ? */
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <1550000>;
+                               regulator-always-on;
+                       };
+
+                       reg_vgen3_2v8: vgen3 {                          /* not used */
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <3300000>;
+                       };
+                       reg_vgen4_1v8: vgen4 {                          /* NVCC_SD3 */
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-always-on;
+                       };
+
+                       reg_vgen5_2v5_sgtl: vgen5 {                     /* Pwr LED & 5V0_delayed enable */
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-always-on;
+                       };
+
+                       reg_vgen6_3v3: vgen6 {                          /* #V#_DELAYED enable, MIPI */
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-always-on;
+                       };
+               };
+       };
+};
+
+&i2c2 {
+       clock-frequency = <100000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c2>;
+       status = "okay";
+};
+
+&i2c4 {
+       clock-frequency = <100000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c4>;
+       clocks = <&clks 116>;
+       status = "okay";
+};
+
+&pwm1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_pwm1>;
+       status = "okay";
+};
+
+&pwm2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_pwm2>;
+       status = "okay";
+};
+
+&pwm3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_pwm3>;
+       status = "okay";
+};
+
+&pwm4 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_pwm4>;
+       status = "okay";
+};
+
+&ssi1 {
+       fsl,mode = "i2s-slave";
+       status = "okay";
+};
+
+&uart1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart1>;
+       status = "okay";
+};
+
+&uart2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart2>;
+       status = "okay";
+};
+
+&uart3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart3>;
+       status = "okay";
+};
+
+&uart4 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart4>;
+       status = "okay";
+};
+
+&uart5 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart5>;
+       status = "okay";
+};
+
+&usbh1 {
+       dr_mode = "host";
+       disable-over-current;
+       status = "okay";
+};
+
+&usbotg {
+       vbus-supply = <&reg_usb_otg_vbus>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usbotg>;
+       disable-over-current;
+       dr_mode = "otg";
+       status = "okay";
+};
+
+&usdhc2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc2>;
+       cd-gpios = <&gpio1 4 0>;
+       wp-gpios = <&gpio1 2 0>;
+       vmmc-supply = <&reg_3p3v>;
+       status = "okay";
+};
+
+&usdhc3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc3>;
+       cd-gpios = <&gpio7 0 0>;
+       wp-gpios = <&gpio7 1 0>;
+       vmmc-supply = <&reg_3p3v>;
+       status = "okay";
+};
+
+&usdhc4 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc4>;
+       vmmc-supply = <&reg_3p3v>;
+       non-removable;
+       status = "okay";
+};
+
+&iomuxc {
+       pinctrl-names = "default";
+
+       imx6-riotboard {
+               pinctrl_audmux: audmuxgrp {
+                       fsl,pins = <
+                               MX6QDL_PAD_CSI0_DAT7__AUD3_RXD          0x8000000
+                               MX6QDL_PAD_CSI0_DAT4__AUD3_TXC          0x8000000
+                               MX6QDL_PAD_CSI0_DAT5__AUD3_TXD          0x8000000
+                               MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS         0x8000000
+                               MX6QDL_PAD_GPIO_0__CCM_CLKO1            0x130b0         /* CAM_MCLK */
+                       >;
+               };
+
+               pinctrl_ecspi1: ecspi1grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_EIM_D16__ECSPI1_SCLK         0x100b1
+                               MX6QDL_PAD_EIM_D17__ECSPI1_MISO         0x100b1
+                               MX6QDL_PAD_EIM_D18__ECSPI1_MOSI         0x100b1
+                               MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17      0x000b1         /* CS0 */
+                       >;
+               };
+
+               pinctrl_ecspi2: ecspi2grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09      0x000b1         /* CS1 */
+                               MX6QDL_PAD_DISP0_DAT16__ECSPI2_MOSI     0x100b1
+                               MX6QDL_PAD_DISP0_DAT17__ECSPI2_MISO     0x100b1
+                               MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12      0x000b1         /* CS0 */
+                               MX6QDL_PAD_DISP0_DAT19__ECSPI2_SCLK     0x100b1
+                       >;
+               };
+
+               pinctrl_ecspi3: ecspi3grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK      0x100b1
+                               MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI      0x100b1
+                               MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO      0x100b1
+                               MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24       0x000b1         /* CS0 */
+                               MX6QDL_PAD_DISP0_DAT4__GPIO4_IO25       0x000b1         /* CS1 */
+                       >;
+               };
+
+               pinctrl_enet: enetgrp {
+                       fsl,pins = <
+                               MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
+                               MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x80000000
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                               MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x0a0b1         /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0         /* AR8035 pin strapping: IO voltage: pull up */
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x130b0         /* AR8035 pin strapping: PHYADDR#0: pull down */
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x130b0         /* AR8035 pin strapping: PHYADDR#1: pull down */
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0         /* AR8035 pin strapping: MODE#1: pull up */
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0         /* AR8035 pin strapping: MODE#3: pull up */
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x130b0         /* AR8035 pin strapping: MODE#0: pull down */
+                               MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0xc0000000      /* GPIO16 -> AR8035 25MHz */
+                               MX6QDL_PAD_EIM_D31__GPIO3_IO31          0x130b0         /* RGMII_nRST */
+                               MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28       0x80000000      /* AR8035 interrupt */
+                               MX6QDL_PAD_GPIO_6__ENET_IRQ             0x000b1
+                       >;
+               };
+
+               pinctrl_i2c1: i2c1grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_CSI0_DAT8__I2C1_SDA          0x4001b8b1
+                               MX6QDL_PAD_CSI0_DAT9__I2C1_SCL          0x4001b8b1
+                       >;
+               };
+
+               pinctrl_i2c2: i2c2grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
+                               MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
+                       >;
+               };
+
+               pinctrl_i2c3: i2c3grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_GPIO_5__I2C3_SCL             0x4001b8b1
+                               MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
+                       >;
+               };
+
+               pinctrl_i2c4: i2c4grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_GPIO_7__I2C4_SCL             0x4001b8b1
+                               MX6QDL_PAD_GPIO_8__I2C4_SDA             0x4001b8b1
+                       >;
+               };
+
+               pinctrl_led: ledgrp {
+                       fsl,pins = <
+                               MX6QDL_PAD_EIM_A25__GPIO5_IO02          0x80000000      /* user led0 */
+                               MX6QDL_PAD_EIM_D28__GPIO3_IO28          0x80000000      /* user led1 */
+                       >;
+               };
+
+               pinctrl_pwm1: pwm1grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_DISP0_DAT8__PWM1_OUT         0x1b0b1
+                       >;
+               };
+
+               pinctrl_pwm2: pwm2grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_DISP0_DAT9__PWM2_OUT         0x1b0b1
+                       >;
+               };
+
+               pinctrl_pwm3: pwm3grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_SD1_DAT1__PWM3_OUT           0x1b0b1
+                       >;
+               };
+
+               pinctrl_pwm4: pwm4grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_SD1_CMD__PWM4_OUT            0x1b0b1
+                       >;
+               };
+
+               pinctrl_uart1: uart1grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA    0x1b0b1
+                               MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA    0x1b0b1
+                       >;
+               };
+
+               pinctrl_uart2: uart2grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_EIM_D26__UART2_TX_DATA       0x1b0b1
+                               MX6QDL_PAD_EIM_D27__UART2_RX_DATA       0x1b0b1
+                       >;
+               };
+
+               pinctrl_uart3: uart3grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_EIM_D24__UART3_TX_DATA       0x1b0b1
+                               MX6QDL_PAD_EIM_D25__UART3_RX_DATA       0x1b0b1
+                       >;
+               };
+
+               pinctrl_uart4: uart4grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_KEY_COL0__UART4_TX_DATA      0x1b0b1
+                               MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA      0x1b0b1
+                       >;
+               };
+
+               pinctrl_uart5: uart5grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_KEY_COL1__UART5_TX_DATA      0x1b0b1
+                               MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA      0x1b0b1
+                       >;
+               };
+
+               pinctrl_usbotg: usbotggrp {
+                       fsl,pins = <
+                               MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID       0x17059
+                               MX6QDL_PAD_EIM_D22__GPIO3_IO22          0x80000000      /* MX6QDL_PAD_EIM_D22__USB_OTG_PWR */
+                               MX6QDL_PAD_EIM_D21__USB_OTG_OC          0x80000000
+                       >;
+               };
+
+               pinctrl_usdhc2: usdhc2grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_SD2_CMD__SD2_CMD             0x17059
+                               MX6QDL_PAD_SD2_CLK__SD2_CLK             0x10059
+                               MX6QDL_PAD_SD2_DAT0__SD2_DATA0          0x17059
+                               MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x17059
+                               MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x17059
+                               MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x17059
+                               MX6QDL_PAD_GPIO_4__GPIO1_IO04           0x80000000      /* SD2 CD */
+                               MX6QDL_PAD_GPIO_2__GPIO1_IO02           0x80000000      /* SD2 WP */
+                       >;
+               };
+
+               pinctrl_usdhc3: usdhc3grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
+                               MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
+                               MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
+                               MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
+                               MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
+                               MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
+                               MX6QDL_PAD_SD3_DAT5__GPIO7_IO00         0x80000000      /* SD3 CD */
+                               MX6QDL_PAD_SD3_DAT4__GPIO7_IO01         0x80000000      /* SD3 WP */
+                       >;
+               };
+
+               pinctrl_usdhc4: usdhc4grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_SD4_CMD__SD4_CMD             0x17059
+                               MX6QDL_PAD_SD4_CLK__SD4_CLK             0x10059
+                               MX6QDL_PAD_SD4_DAT0__SD4_DATA0          0x17059
+                               MX6QDL_PAD_SD4_DAT1__SD4_DATA1          0x17059
+                               MX6QDL_PAD_SD4_DAT2__SD4_DATA2          0x17059
+                               MX6QDL_PAD_SD4_DAT3__SD4_DATA3          0x17059
+                               MX6QDL_PAD_NANDF_ALE__GPIO6_IO08        0x80000000      /* SD4 RST (eMMC) */
+                       >;
+               };
+       };
+};
index 5c5f574330f9ea19fb31bbd02560efc55bcc457b..0a9c49d69d418c4ea46320e33f055b94d4ec2c54 100644 (file)
                        i2c4: i2c@021f8000 {
                                #address-cells = <1>;
                                #size-cells = <0>;
-                               compatible = "fsl,imx1-i2c";
+                               compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
                                reg = <0x021f8000 0x4000>;
                                interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clks 116>;
                                status = "disabled";
                        };
                };
index a63bbb3d46bb43637ad2235bb3892c82508f1ac9..e0302636aff5164d52ffbf6f7d4f710c43929ed8 100644 (file)
        model = "Data Modul eDM-QMX6 Board";
        compatible = "dmo,imx6q-edmqmx6", "fsl,imx6q";
 
+       chosen {
+               stdout-path = &uart2;
+       };
+
        aliases {
-               gpio7 = &stmpe_gpio;
+               gpio7 = &stmpe_gpio1;
+               gpio8 = &stmpe_gpio2;
+               stmpe-i2c0 = &stmpe1;
+               stmpe-i2c1 = &stmpe2;
        };
 
        memory {
                        regulator-always-on;
                };
 
-               reg_usb_otg_vbus: regulator@1 {
+               reg_usb_otg_switch: regulator@1 {
                        compatible = "regulator-fixed";
                        reg = <1>;
-                       regulator-name = "usb_otg_vbus";
+                       regulator-name = "usb_otg_switch";
                        regulator-min-microvolt = <5000000>;
                        regulator-max-microvolt = <5000000>;
                        gpio = <&gpio7 12 0>;
+                       regulator-boot-on;
+                       regulator-always-on;
                };
 
                reg_usb_host1: regulator@2 {
 
                led-blue {
                        label = "blue";
-                       gpios = <&stmpe_gpio 8 GPIO_ACTIVE_HIGH>;
+                       gpios = <&stmpe_gpio1 8 GPIO_ACTIVE_HIGH>;
                        linux,default-trigger = "heartbeat";
                };
 
                led-green {
                        label = "green";
-                       gpios = <&stmpe_gpio 9 GPIO_ACTIVE_HIGH>;
+                       gpios = <&stmpe_gpio1 9 GPIO_ACTIVE_HIGH>;
                };
 
                led-pink {
                        label = "pink";
-                       gpios = <&stmpe_gpio 10 GPIO_ACTIVE_HIGH>;
+                       gpios = <&stmpe_gpio1 10 GPIO_ACTIVE_HIGH>;
                };
 
                led-red {
                        label = "red";
-                       gpios = <&stmpe_gpio 11 GPIO_ACTIVE_HIGH>;
+                       gpios = <&stmpe_gpio1 11 GPIO_ACTIVE_HIGH>;
                };
        };
 };
 
+&ecspi5 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_ecspi5>;
+       fsl,spi-num-chipselects = <1>;
+       cs-gpios = <&gpio1 12 0>;
+       status = "okay";
+
+       flash: m25p80@0 {
+               compatible = "m25p80";
+               spi-max-frequency = <40000000>;
+               reg = <0>;
+       };
+};
+
 &fec {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_enet>;
        clock-frequency = <100000>;
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_i2c2
-                    &pinctrl_stmpe>;
+                    &pinctrl_stmpe1
+                    &pinctrl_stmpe2
+                    &pinctrl_pfuze>;
        status = "okay";
 
        pmic: pfuze100@08 {
                };
        };
 
-       stmpe: stmpe1601@40 {
+       stmpe1: stmpe1601@40 {
                compatible = "st,stmpe1601";
                reg = <0x40>;
                interrupts = <30 0>;
                interrupt-parent = <&gpio3>;
+               vcc-supply = <&sw2_reg>;
+               vio-supply = <&sw2_reg>;
+
+               stmpe_gpio1: stmpe_gpio {
+                       #gpio-cells = <2>;
+                       compatible = "st,stmpe-gpio";
+               };
+       };
+
+       stmpe2: stmpe1601@44 {
+               compatible = "st,stmpe1601";
+               reg = <0x44>;
+               interrupts = <2 0>;
+               interrupt-parent = <&gpio5>;
+               vcc-supply = <&sw2_reg>;
+               vio-supply = <&sw2_reg>;
 
-               stmpe_gpio: stmpe_gpio {
+               stmpe_gpio2: stmpe_gpio {
                        #gpio-cells = <2>;
                        compatible = "st,stmpe-gpio";
                };
                        >;
                };
 
+               pinctrl_ecspi5: ecspi5rp-1 {
+                       fsl,pins = <
+                               MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO        0x80000000
+                               MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI         0x80000000
+                               MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK         0x80000000
+                               MX6QDL_PAD_SD2_DAT3__GPIO1_IO12         0x80000000
+                       >;
+               };
+
                pinctrl_enet: enetgrp {
                        fsl,pins = <
                                MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
                        >;
                };
 
-               pinctrl_stmpe: stmpegrp {
+               pinctrl_pfuze: pfuze100grp1 {
+                       fsl,pins = <
+                               MX6QDL_PAD_EIM_D20__GPIO3_IO20          0x80000000
+                       >;
+               };
+
+               pinctrl_stmpe1: stmpe1grp {
                        fsl,pins = <MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x80000000>;
                };
 
+               pinctrl_stmpe2: stmpe2grp {
+                       fsl,pins = <MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000>;
+               };
+
                pinctrl_uart1: uart1grp {
                        fsl,pins = <
                                MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
 
                pinctrl_usbotg: usbotggrp {
                        fsl,pins = <
-                               MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
+                               MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID       0x17059
                        >;
                };
 
 &usbh1 {
        vbus-supply = <&reg_usb_host1>;
        disable-over-current;
+       dr_mode = "host";
        status = "okay";
 };
 
 &usbotg {
-       vbus-supply = <&reg_usb_otg_vbus>;
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_usbotg>;
        disable-over-current;
index 4a9b4dc9afc0ab85801ad0acb94e45d209be6922..703539cf36d3078fa7b179fad58c26f9a72b0069 100644 (file)
@@ -14,7 +14,7 @@
        compatible = "zealz,imx6q-gk802", "fsl,imx6q";
 
        chosen {
-               linux,stdout-path = &uart4;
+               stdout-path = &uart4;
        };
 
        memory {
        };
 };
 
+&hdmi {
+       ddc-i2c-bus = <&i2c3>;
+       status = "okay";
+};
+
 /* Internal I2C */
 &i2c2 {
        pinctrl-names = "default";
index 902f9831048139318f80ffc661be963cdc799db2..3689eaa58826eecebce2ec4dd4adda99b12d2fc2 100644 (file)
        status = "okay";
 };
 
+&hdmi {
+       ddc-i2c-bus = <&i2c3>;
+       status = "okay";
+};
+
 &i2c1 {
        clock-frequency = <100000>;
        pinctrl-names = "default";
 
 &ldb {
        status = "okay";
-       lvds-channel@0 {
-               crtcs = <&ipu1 0>, <&ipu1 1>, <&ipu2 0>, <&ipu2 1>;
-       };
 };
 
 &pcie {
index 5607c331fca8f4db3356a93a2aa75f97b1b2b11f..c139ac0ebe15ff0c0d1bdc7b06e0f01eba4273f3 100644 (file)
 
 /dts-v1/;
 #include "imx6q-phytec-pfla02.dtsi"
+#include "imx6qdl-phytec-pbab01.dtsi"
 
 / {
        model = "Phytec phyFLEX-i.MX6 Quad Carrier-Board";
        compatible = "phytec,imx6q-pbab01", "phytec,imx6q-pfla02", "fsl,imx6q";
-};
-
-&fec {
-       status = "okay";
-};
 
-&gpmi {
-       status = "okay";
+       chosen {
+               stdout-path = &uart4;
+       };
 };
 
 &sata {
-       status = "okay";
-};
-
-&uart4 {
-       status = "okay";
-};
-
-&usbh1 {
-       status = "okay";
-};
-
-&usbotg {
-       status = "okay";
-};
-
-&usdhc2 {
-       status = "okay";
-};
-
-&usdhc3 {
-       status = "okay";
+        status = "okay";
 };
index 324f1550976b6503d641c23a5da07c1187fc96c9..cd20d0a948de4ce45d726b6e0616d4de82bcb795 100644 (file)
  */
 
 #include "imx6q.dtsi"
+#include "imx6qdl-phytec-pfla02.dtsi"
 
 / {
-       model = "Phytec phyFLEX-i.MX6 Ouad";
+       model = "Phytec phyFLEX-i.MX6 Quad";
        compatible = "phytec,imx6q-pfla02", "fsl,imx6q";
 
        memory {
                reg = <0x10000000 0x80000000>;
        };
-
-       regulators {
-               compatible = "simple-bus";
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               reg_usb_otg_vbus: regulator@0 {
-                       compatible = "regulator-fixed";
-                       reg = <0>;
-                       regulator-name = "usb_otg_vbus";
-                       regulator-min-microvolt = <5000000>;
-                       regulator-max-microvolt = <5000000>;
-                       gpio = <&gpio4 15 0>;
-               };
-
-               reg_usb_h1_vbus: regulator@1 {
-                       compatible = "regulator-fixed";
-                       reg = <1>;
-                       regulator-name = "usb_h1_vbus";
-                       regulator-min-microvolt = <5000000>;
-                       regulator-max-microvolt = <5000000>;
-                       gpio = <&gpio1 0 0>;
-               };
-       };
-};
-
-&ecspi3 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_ecspi3>;
-       status = "okay";
-       fsl,spi-num-chipselects = <1>;
-       cs-gpios = <&gpio4 24 0>;
-
-       flash@0 {
-               compatible = "m25p80";
-               spi-max-frequency = <20000000>;
-               reg = <0>;
-       };
-};
-
-&i2c1 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_i2c1>;
-       status = "okay";
-
-       eeprom@50 {
-               compatible = "atmel,24c32";
-               reg = <0x50>;
-       };
-
-       pmic@58 {
-               compatible = "dialog,da9063";
-               reg = <0x58>;
-               interrupt-parent = <&gpio4>;
-               interrupts = <17 0x8>; /* active-low GPIO4_17 */
-
-               regulators {
-                       vddcore_reg: bcore1 {
-                               regulator-min-microvolt = <730000>;
-                               regulator-max-microvolt = <1380000>;
-                               regulator-always-on;
-                       };
-
-                       vddsoc_reg: bcore2 {
-                               regulator-min-microvolt = <730000>;
-                               regulator-max-microvolt = <1380000>;
-                               regulator-always-on;
-                       };
-
-                       vdd_ddr3_reg: bpro {
-                               regulator-min-microvolt = <1500000>;
-                               regulator-max-microvolt = <1500000>;
-                               regulator-always-on;
-                       };
-
-                       vdd_3v3_reg: bperi {
-                               regulator-min-microvolt = <3300000>;
-                               regulator-max-microvolt = <3300000>;
-                               regulator-always-on;
-                       };
-
-                       vdd_buckmem_reg: bmem {
-                               regulator-min-microvolt = <3300000>;
-                               regulator-max-microvolt = <3300000>;
-                               regulator-always-on;
-                       };
-
-                       vdd_eth_reg: bio {
-                               regulator-min-microvolt = <1200000>;
-                               regulator-max-microvolt = <1200000>;
-                               regulator-always-on;
-                       };
-
-                       vdd_eth_io_reg: ldo4 {
-                               regulator-min-microvolt = <2500000>;
-                               regulator-max-microvolt = <2500000>;
-                               regulator-always-on;
-                       };
-
-                       vdd_mx6_snvs_reg: ldo5 {
-                               regulator-min-microvolt = <3000000>;
-                               regulator-max-microvolt = <3000000>;
-                               regulator-always-on;
-                       };
-
-                       vdd_3v3_pmic_io_reg: ldo6 {
-                               regulator-min-microvolt = <3300000>;
-                               regulator-max-microvolt = <3300000>;
-                               regulator-always-on;
-                       };
-
-                       vdd_sd0_reg: ldo9 {
-                               regulator-min-microvolt = <3300000>;
-                               regulator-max-microvolt = <3300000>;
-                       };
-
-                       vdd_sd1_reg: ldo10 {
-                               regulator-min-microvolt = <3300000>;
-                               regulator-max-microvolt = <3300000>;
-                       };
-
-                       vdd_mx6_high_reg: ldo11 {
-                               regulator-min-microvolt = <3000000>;
-                               regulator-max-microvolt = <3000000>;
-                               regulator-always-on;
-                       };
-               };
-       };
-};
-
-&iomuxc {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_hog>;
-
-       imx6q-phytec-pfla02 {
-               pinctrl_hog: hoggrp {
-                       fsl,pins = <
-                               MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
-                               MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x80000000 /* SPI NOR chipselect */
-                               MX6QDL_PAD_DI0_PIN15__GPIO4_IO17  0x80000000 /* PMIC interrupt */
-                       >;
-               };
-
-               pinctrl_ecspi3: ecspi3grp {
-                       fsl,pins = <
-                               MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO      0x100b1
-                               MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI      0x100b1
-                               MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK      0x100b1
-                       >;
-               };
-
-               pinctrl_enet: enetgrp {
-                       fsl,pins = <
-                               MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
-                               MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
-                               MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
-                               MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN       0x1b0b0
-                       >;
-               };
-
-               pinctrl_gpmi_nand: gpminandgrp {
-                       fsl,pins = <
-                               MX6QDL_PAD_NANDF_CLE__NAND_CLE          0xb0b1
-                               MX6QDL_PAD_NANDF_ALE__NAND_ALE          0xb0b1
-                               MX6QDL_PAD_NANDF_WP_B__NAND_WP_B        0xb0b1
-                               MX6QDL_PAD_NANDF_RB0__NAND_READY_B      0xb000
-                               MX6QDL_PAD_NANDF_CS0__NAND_CE0_B        0xb0b1
-                               MX6QDL_PAD_NANDF_CS1__NAND_CE1_B        0xb0b1
-                               MX6QDL_PAD_SD4_CMD__NAND_RE_B           0xb0b1
-                               MX6QDL_PAD_SD4_CLK__NAND_WE_B           0xb0b1
-                               MX6QDL_PAD_NANDF_D0__NAND_DATA00        0xb0b1
-                               MX6QDL_PAD_NANDF_D1__NAND_DATA01        0xb0b1
-                               MX6QDL_PAD_NANDF_D2__NAND_DATA02        0xb0b1
-                               MX6QDL_PAD_NANDF_D3__NAND_DATA03        0xb0b1
-                               MX6QDL_PAD_NANDF_D4__NAND_DATA04        0xb0b1
-                               MX6QDL_PAD_NANDF_D5__NAND_DATA05        0xb0b1
-                               MX6QDL_PAD_NANDF_D6__NAND_DATA06        0xb0b1
-                               MX6QDL_PAD_NANDF_D7__NAND_DATA07        0xb0b1
-                               MX6QDL_PAD_SD4_DAT0__NAND_DQS           0x00b1
-                       >;
-               };
-
-               pinctrl_i2c1: i2c1grp {
-                       fsl,pins = <
-                               MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
-                               MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
-                       >;
-               };
-
-               pinctrl_uart4: uart4grp {
-                       fsl,pins = <
-                               MX6QDL_PAD_KEY_COL0__UART4_TX_DATA      0x1b0b1
-                               MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA      0x1b0b1
-                       >;
-               };
-
-               pinctrl_usbh1: usbh1grp {
-                       fsl,pins = <
-                               MX6QDL_PAD_GPIO_0__USB_H1_PWR           0x80000000
-                       >;
-               };
-
-               pinctrl_usbotg: usbotggrp {
-                       fsl,pins = <
-                               MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
-                               MX6QDL_PAD_KEY_COL4__USB_OTG_OC         0x1b0b0
-                               MX6QDL_PAD_KEY_ROW4__GPIO4_IO15         0x80000000
-                       >;
-               };
-
-               pinctrl_usdhc2: usdhc2grp {
-                       fsl,pins = <
-                               MX6QDL_PAD_SD2_CMD__SD2_CMD             0x17059
-                               MX6QDL_PAD_SD2_CLK__SD2_CLK             0x10059
-                               MX6QDL_PAD_SD2_DAT0__SD2_DATA0          0x17059
-                               MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x17059
-                               MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x17059
-                               MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x17059
-                       >;
-               };
-
-               pinctrl_usdhc3: usdhc3grp {
-                       fsl,pins = <
-                               MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
-                               MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
-                               MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
-                               MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
-                               MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
-                               MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
-                       >;
-               };
-
-               pinctrl_usdhc3_cdwp: usdhc3cdwp {
-                       fsl,pins = <
-                               MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000
-                               MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
-                       >;
-               };
-       };
-};
-
-&fec {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_enet>;
-       phy-mode = "rgmii";
-       phy-reset-gpios = <&gpio3 23 0>;
-       status = "disabled";
-};
-
-&gpmi {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_gpmi_nand>;
-       nand-on-flash-bbt;
-       status = "disabled";
-};
-
-&uart4 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_uart4>;
-       status = "disabled";
-};
-
-&usbh1 {
-       vbus-supply = <&reg_usb_h1_vbus>;
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_usbh1>;
-       status = "disabled";
-};
-
-&usbotg {
-       vbus-supply = <&reg_usb_otg_vbus>;
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_usbotg>;
-       disable-over-current;
-       status = "disabled";
-};
-
-&usdhc2 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_usdhc2>;
-       cd-gpios = <&gpio1 4 0>;
-       wp-gpios = <&gpio1 2 0>;
-       status = "disabled";
-};
-
-&usdhc3 {
-        pinctrl-names = "default";
-        pinctrl-0 = <&pinctrl_usdhc3
-                    &pinctrl_usdhc3_cdwp>;
-        cd-gpios = <&gpio1 27 0>;
-        wp-gpios = <&gpio1 29 0>;
-        status = "disabled";
 };
index ed397d149ab6533525c1e30b94fbf1770144fcf9..6c561060bf5cac65e9484b5c46a4439c6d910793 100644 (file)
        model = "Udoo i.MX6 Quad Board";
        compatible = "udoo,imx6q-udoo", "fsl,imx6q";
 
+       chosen {
+               stdout-path = &uart2;
+       };
+
        memory {
                reg = <0x10000000 0x40000000>;
        };
        status = "okay";
 };
 
+&hdmi {
+       ddc-i2c-bus = <&i2c2>;
+       status = "okay";
+};
+
+&i2c2 {
+       clock-frequency = <100000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c2>;
+       status = "okay";
+};
+
 &iomuxc {
        imx6q-udoo {
                pinctrl_enet: enetgrp {
                        >;
                };
 
+               pinctrl_i2c2: i2c2grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
+                               MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
+                       >;
+               };
+
                pinctrl_uart2: uart2grp {
                        fsl,pins = <
                                MX6QDL_PAD_EIM_D26__UART2_TX_DATA       0x1b0b1
index c2a24888a2768969263e1b8536e98ec869b4ff4f..25da82a03110f62eddc0b4b79ec637c0d4ac67d6 100644 (file)
        };
 };
 
+&hdmi {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_cubox_i_hdmi>;
+       ddc-i2c-bus = <&i2c2>;
+       status = "okay";
+};
+
+&i2c2 {
+       clock-frequency = <100000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_cubox_i_i2c2>;
+       status = "okay";
+};
+
 &i2c3 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_cubox_i_i2c3>;
 
 &iomuxc {
        cubox_i {
+               pinctrl_cubox_i_hdmi: cubox-i-hdmi {
+                       fsl,pins = <
+                               MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
+                       >;
+               };
+
+               pinctrl_cubox_i_i2c2: cubox-i-i2c2 {
+                       fsl,pins = <
+                               MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
+                               MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+                       >;
+               };
+
                pinctrl_cubox_i_i2c3: cubox-i-i2c3 {
                        fsl,pins = <
                                MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
index 25cf035dd36e16124bff1889fca6b488a1ca998c..2c253d6d20bd1fec6b71d18347f27ef0126e3f5e 100644 (file)
@@ -22,7 +22,7 @@
        };
 
        chosen {
-               linux,stdout-path = &uart1;
+               stdout-path = &uart1;
        };
 };
 
index 98a422153ce7b9d6bf9b292093763659af676a10..31665adcbf399ee436082d3ff3a1dc20334c9c9a 100644 (file)
        status = "okay";
 };
 
+&hdmi {
+       ddc-i2c-bus = <&i2c3>;
+       status = "okay";
+};
+
 &i2c1 {
        clock-frequency = <100000>;
        pinctrl-names = "default";
index 8e99c9a9bc762ab79309641383323cf463bbbcc8..367af3ec94353a18778df02a1130ac39dc734f6a 100644 (file)
                bootargs = "console=ttymxc1,115200";
        };
 
+       backlight {
+               compatible = "pwm-backlight";
+               pwms = <&pwm4 0 5000000>;
+               brightness-levels = <0 4 8 16 32 64 128 255>;
+               default-brightness-level = <7>;
+       };
+
        leds {
                compatible = "gpio-leds";
 
        status = "okay";
 };
 
+&hdmi {
+       ddc-i2c-bus = <&i2c3>;
+       status = "okay";
+};
+
 &i2c1 {
        clock-frequency = <100000>;
        pinctrl-names = "default";
                        >;
                };
 
+               pinctrl_pwm4: pwm4grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_SD1_CMD__PWM4_OUT            0x1b0b1
+                       >;
+               };
+
                pinctrl_uart1: uart1grp {
                        fsl,pins = <
                                MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
 
 &ldb {
        status = "okay";
+
        lvds-channel@0 {
-               crtcs = <&ipu1 0>, <&ipu1 1>;
+               fsl,data-mapping = "spwg";
+               fsl,data-width = <18>;
+               status = "okay";
+
+               display-timings {
+                       native-mode = <&timing0>;
+                       timing0: hsd100pxn1 {
+                               clock-frequency = <65000000>;
+                               hactive = <1024>;
+                               vactive = <768>;
+                               hback-porch = <220>;
+                               hfront-porch = <40>;
+                               vback-porch = <21>;
+                               vfront-porch = <7>;
+                               hsync-len = <60>;
+                               vsync-len = <10>;
+                       };
+               };
        };
 };
 
        status = "okay";
 };
 
+&pwm4 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_pwm4>;
+       status = "okay";
+};
+
 &ssi1 {
        fsl,mode = "i2s-slave";
        status = "okay";
index c8e5ae06deaf51474447675a1a3ade8658884f0d..c91b5a6c769bfd5f154ff41c0a6389ccb4184374 100644 (file)
                bootargs = "console=ttymxc1,115200";
        };
 
+       backlight {
+               compatible = "pwm-backlight";
+               pwms = <&pwm4 0 5000000>;
+               brightness-levels = <0 4 8 16 32 64 128 255>;
+               default-brightness-level = <7>;
+       };
+
        leds {
                compatible = "gpio-leds";
 
        status = "okay";
 };
 
+&hdmi {
+       ddc-i2c-bus = <&i2c3>;
+       status = "okay";
+};
+
 &i2c1 {
        clock-frequency = <100000>;
        pinctrl-names = "default";
                        >;
                };
 
+               pinctrl_pwm4: pwm4grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_SD1_CMD__PWM4_OUT            0x1b0b1
+                       >;
+               };
+
                pinctrl_uart1: uart1grp {
                        fsl,pins = <
                                MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
        };
 };
 
+&pwm4 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_pwm4>;
+       status = "okay";
+};
+
 &ssi1 {
        fsl,mode = "i2s-slave";
        status = "okay";
index 2795dfc8c92632ff0d6222e71e9826b59af232cc..698d3063b29563691147510bb2dc9c2965999c1a 100644 (file)
                bootargs = "console=ttymxc1,115200";
        };
 
+       backlight {
+               compatible = "pwm-backlight";
+               pwms = <&pwm4 0 5000000>;
+               brightness-levels = <0 4 8 16 32 64 128 255>;
+               default-brightness-level = <7>;
+       };
+
        leds {
                compatible = "gpio-leds";
 
        status = "okay";
 };
 
+&hdmi {
+       ddc-i2c-bus = <&i2c3>;
+       status = "okay";
+};
+
 &i2c1 {
        clock-frequency = <100000>;
        pinctrl-names = "default";
                        >;
                };
 
+               pinctrl_pwm4: pwm4grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_SD1_CMD__PWM4_OUT            0x1b0b1
+                       >;
+               };
+
                pinctrl_uart1: uart1grp {
                        fsl,pins = <
                                MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
        };
 };
 
+&pwm4 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_pwm4>;
+       status = "okay";
+};
+
 &ssi1 {
        fsl,mode = "i2s-slave";
        status = "okay";
index a3cb2fff8f612183bdf6b311d707a1f5210c2bec..d16066608e21ae3716bc52a58597dc51f6ed9241 100644 (file)
                                /* GPIO16 -> AR8035 25MHz */
                                MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0xc0000000
                                MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x80000000
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
                                /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x0a0b1
                                /* AR8035 pin strapping: IO voltage: pull up */
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
                                /* AR8035 pin strapping: PHYADDR#0: pull down */
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x130b0
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x13030
                                /* AR8035 pin strapping: PHYADDR#1: pull down */
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x130b0
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x13030
                                /* AR8035 pin strapping: MODE#1: pull up */
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
                                /* AR8035 pin strapping: MODE#3: pull up */
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
                                /* AR8035 pin strapping: MODE#0: pull down */
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x130b0
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x13030
 
                                /*
                                 * As the RMII pins are also connected to RGMII
index 99be301b52329cac017446c293a49a58374d90a8..4c4b17596c8b77329200c4c207ee68b13fc8de77 100644 (file)
 #include <dt-bindings/input/input.h>
 
 / {
+       chosen {
+               stdout-path = &uart2;
+       };
+
        memory {
                reg = <0x10000000 0x40000000>;
        };
diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi
new file mode 100644 (file)
index 0000000..5847212
--- /dev/null
@@ -0,0 +1,102 @@
+/*
+ * Copyright 2013 Christian Hemp, Phytec Messtechnik GmbH
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/ {
+       chosen {
+               linux,stdout-path = &uart4;
+       };
+};
+
+&fec {
+       status = "okay";
+};
+
+&gpmi {
+       status = "okay";
+};
+
+&hdmi {
+       status = "okay";
+};
+
+&i2c2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c2>;
+       clock-frequency = <100000>;
+       status = "okay";
+
+       tlv320@18 {
+               compatible = "ti,tlv320aic3x";
+               reg = <0x18>;
+       };
+
+       stmpe@41 {
+               compatible = "st,stmpe811";
+               reg = <0x41>;
+       };
+
+       rtc@51 {
+               compatible = "nxp,rtc8564";
+               reg = <0x51>;
+       };
+
+       adc@64 {
+               compatible = "maxim,max1037";
+               reg = <0x64>;
+       };
+};
+
+&i2c3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c3>;
+       clock-frequency = <100000>;
+       status = "okay";
+};
+
+&uart3 {
+       status = "okay";
+};
+
+&uart4 {
+       status = "okay";
+};
+
+&usbh1 {
+       status = "okay";
+};
+
+&usbotg {
+       status = "okay";
+};
+
+&usdhc2 {
+       status = "okay";
+};
+
+&usdhc3 {
+       status = "okay";
+};
+
+&iomuxc {
+       pinctrl_i2c2: i2c2grp {
+               fsl,pins = <
+                       MX6QDL_PAD_EIM_EB2__I2C2_SCL            0x4001b8b1
+                       MX6QDL_PAD_EIM_D16__I2C2_SDA            0x4001b8b1
+               >;
+       };
+
+       pinctrl_i2c3: i2c3grp {
+               fsl,pins = <
+                       MX6QDL_PAD_EIM_D17__I2C3_SCL            0x4001b8b1
+                       MX6QDL_PAD_EIM_D18__I2C3_SDA            0x4001b8b1
+               >;
+       };
+};
diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
new file mode 100644 (file)
index 0000000..faa3494
--- /dev/null
@@ -0,0 +1,356 @@
+/*
+ * Copyright 2013 Christian Hemp, Phytec Messtechnik GmbH
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+       model = "Phytec phyFLEX-i.MX6 Ouad";
+       compatible = "phytec,imx6q-pfla02", "fsl,imx6q";
+
+       memory {
+               reg = <0x10000000 0x80000000>;
+       };
+
+       regulators {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               reg_usb_otg_vbus: regulator@0 {
+                       compatible = "regulator-fixed";
+                       reg = <0>;
+                       regulator-name = "usb_otg_vbus";
+                       regulator-min-microvolt = <5000000>;
+                       regulator-max-microvolt = <5000000>;
+                       gpio = <&gpio4 15 0>;
+               };
+
+               reg_usb_h1_vbus: regulator@1 {
+                       compatible = "regulator-fixed";
+                       reg = <1>;
+                       regulator-name = "usb_h1_vbus";
+                       regulator-min-microvolt = <5000000>;
+                       regulator-max-microvolt = <5000000>;
+                       gpio = <&gpio1 0 0>;
+               };
+       };
+
+       gpio_leds: leds {
+               compatible = "gpio-leds";
+
+               green {
+                       label = "phyflex:green";
+                       gpios = <&gpio1 30 0>;
+               };
+
+               red {
+                       label = "phyflex:red";
+                       gpios = <&gpio2 31 0>;
+               };
+       };
+};
+
+&ecspi3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_ecspi3>;
+       status = "okay";
+       fsl,spi-num-chipselects = <1>;
+       cs-gpios = <&gpio4 24 0>;
+
+       flash@0 {
+               compatible = "m25p80";
+               spi-max-frequency = <20000000>;
+               reg = <0>;
+       };
+};
+
+&i2c1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c1>;
+       status = "okay";
+
+       eeprom@50 {
+               compatible = "atmel,24c32";
+               reg = <0x50>;
+       };
+
+       pmic@58 {
+               compatible = "dialog,da9063";
+               reg = <0x58>;
+               interrupt-parent = <&gpio4>;
+               interrupts = <17 0x8>; /* active-low GPIO4_17 */
+
+               regulators {
+                       vddcore_reg: bcore1 {
+                               regulator-min-microvolt = <730000>;
+                               regulator-max-microvolt = <1380000>;
+                               regulator-always-on;
+                       };
+
+                       vddsoc_reg: bcore2 {
+                               regulator-min-microvolt = <730000>;
+                               regulator-max-microvolt = <1380000>;
+                               regulator-always-on;
+                       };
+
+                       vdd_ddr3_reg: bpro {
+                               regulator-min-microvolt = <1500000>;
+                               regulator-max-microvolt = <1500000>;
+                               regulator-always-on;
+                       };
+
+                       vdd_3v3_reg: bperi {
+                               regulator-min-microvolt = <3300000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-always-on;
+                       };
+
+                       vdd_buckmem_reg: bmem {
+                               regulator-min-microvolt = <3300000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-always-on;
+                       };
+
+                       vdd_eth_reg: bio {
+                               regulator-min-microvolt = <1200000>;
+                               regulator-max-microvolt = <1200000>;
+                               regulator-always-on;
+                       };
+
+                       vdd_eth_io_reg: ldo4 {
+                               regulator-min-microvolt = <2500000>;
+                               regulator-max-microvolt = <2500000>;
+                               regulator-always-on;
+                       };
+
+                       vdd_mx6_snvs_reg: ldo5 {
+                               regulator-min-microvolt = <3000000>;
+                               regulator-max-microvolt = <3000000>;
+                               regulator-always-on;
+                       };
+
+                       vdd_3v3_pmic_io_reg: ldo6 {
+                               regulator-min-microvolt = <3300000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-always-on;
+                       };
+
+                       vdd_sd0_reg: ldo9 {
+                               regulator-min-microvolt = <3300000>;
+                               regulator-max-microvolt = <3300000>;
+                       };
+
+                       vdd_sd1_reg: ldo10 {
+                               regulator-min-microvolt = <3300000>;
+                               regulator-max-microvolt = <3300000>;
+                       };
+
+                       vdd_mx6_high_reg: ldo11 {
+                               regulator-min-microvolt = <3000000>;
+                               regulator-max-microvolt = <3000000>;
+                               regulator-always-on;
+                       };
+               };
+       };
+};
+
+&iomuxc {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_hog>;
+
+       imx6q-phytec-pfla02 {
+               pinctrl_hog: hoggrp {
+                       fsl,pins = <
+                               MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
+                               MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x80000000 /* SPI NOR chipselect */
+                               MX6QDL_PAD_DI0_PIN15__GPIO4_IO17  0x80000000 /* PMIC interrupt */
+                               MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* Green LED */
+                               MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x80000000 /* Red LED */
+                       >;
+               };
+
+               pinctrl_ecspi3: ecspi3grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO      0x100b1
+                               MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI      0x100b1
+                               MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK      0x100b1
+                       >;
+               };
+
+               pinctrl_enet: enetgrp {
+                       fsl,pins = <
+                               MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
+                               MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                               MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
+                               MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN       0x1b0b0
+                       >;
+               };
+
+               pinctrl_gpmi_nand: gpminandgrp {
+                       fsl,pins = <
+                               MX6QDL_PAD_NANDF_CLE__NAND_CLE          0xb0b1
+                               MX6QDL_PAD_NANDF_ALE__NAND_ALE          0xb0b1
+                               MX6QDL_PAD_NANDF_WP_B__NAND_WP_B        0xb0b1
+                               MX6QDL_PAD_NANDF_RB0__NAND_READY_B      0xb000
+                               MX6QDL_PAD_NANDF_CS0__NAND_CE0_B        0xb0b1
+                               MX6QDL_PAD_NANDF_CS1__NAND_CE1_B        0xb0b1
+                               MX6QDL_PAD_SD4_CMD__NAND_RE_B           0xb0b1
+                               MX6QDL_PAD_SD4_CLK__NAND_WE_B           0xb0b1
+                               MX6QDL_PAD_NANDF_D0__NAND_DATA00        0xb0b1
+                               MX6QDL_PAD_NANDF_D1__NAND_DATA01        0xb0b1
+                               MX6QDL_PAD_NANDF_D2__NAND_DATA02        0xb0b1
+                               MX6QDL_PAD_NANDF_D3__NAND_DATA03        0xb0b1
+                               MX6QDL_PAD_NANDF_D4__NAND_DATA04        0xb0b1
+                               MX6QDL_PAD_NANDF_D5__NAND_DATA05        0xb0b1
+                               MX6QDL_PAD_NANDF_D6__NAND_DATA06        0xb0b1
+                               MX6QDL_PAD_NANDF_D7__NAND_DATA07        0xb0b1
+                               MX6QDL_PAD_SD4_DAT0__NAND_DQS           0x00b1
+                       >;
+               };
+
+               pinctrl_i2c1: i2c1grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
+                               MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
+                       >;
+               };
+
+               pinctrl_uart3: uart3grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_EIM_D24__UART3_TX_DATA       0x1b0b1
+                               MX6QDL_PAD_EIM_D25__UART3_RX_DATA       0x1b0b1
+                               MX6QDL_PAD_EIM_D30__UART3_RTS_B         0x1b0b1
+                               MX6QDL_PAD_EIM_D31__UART3_CTS_B         0x1b0b1
+                       >;
+               };
+
+               pinctrl_uart4: uart4grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_KEY_COL0__UART4_TX_DATA      0x1b0b1
+                               MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA      0x1b0b1
+                       >;
+               };
+
+               pinctrl_usbh1: usbh1grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_GPIO_0__USB_H1_PWR           0x80000000
+                       >;
+               };
+
+               pinctrl_usbotg: usbotggrp {
+                       fsl,pins = <
+                               MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
+                               MX6QDL_PAD_KEY_COL4__USB_OTG_OC         0x1b0b0
+                               MX6QDL_PAD_KEY_ROW4__GPIO4_IO15         0x80000000
+                       >;
+               };
+
+               pinctrl_usdhc2: usdhc2grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_SD2_CMD__SD2_CMD             0x17059
+                               MX6QDL_PAD_SD2_CLK__SD2_CLK             0x10059
+                               MX6QDL_PAD_SD2_DAT0__SD2_DATA0          0x17059
+                               MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x17059
+                               MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x17059
+                               MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x17059
+                       >;
+               };
+
+               pinctrl_usdhc3: usdhc3grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
+                               MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
+                               MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
+                               MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
+                               MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
+                               MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
+                       >;
+               };
+
+               pinctrl_usdhc3_cdwp: usdhc3cdwp {
+                       fsl,pins = <
+                               MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000
+                               MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
+                       >;
+               };
+       };
+};
+
+&fec {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_enet>;
+       phy-mode = "rgmii";
+       phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
+       status = "disabled";
+};
+
+&gpmi {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_gpmi_nand>;
+       nand-on-flash-bbt;
+       status = "disabled";
+};
+
+&uart3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart3>;
+       status = "disabled";
+};
+
+&uart4 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart4>;
+       status = "disabled";
+};
+
+&usbh1 {
+       vbus-supply = <&reg_usb_h1_vbus>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usbh1>;
+       status = "disabled";
+};
+
+&usbotg {
+       vbus-supply = <&reg_usb_otg_vbus>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usbotg>;
+       disable-over-current;
+       status = "disabled";
+};
+
+&usdhc2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc2>;
+       cd-gpios = <&gpio1 4 0>;
+       wp-gpios = <&gpio1 2 0>;
+       status = "disabled";
+};
+
+&usdhc3 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_usdhc3
+                    &pinctrl_usdhc3_cdwp>;
+        cd-gpios = <&gpio1 27 0>;
+        wp-gpios = <&gpio1 29 0>;
+        status = "disabled";
+};
index 3bec128c7971d7d269f6814db6d55dbdac32f99a..6df6127bf83520252371d5b99d52296921b51c5b 100644 (file)
 #include <dt-bindings/input/input.h>
 
 / {
+       chosen {
+               stdout-path = &uart2;
+       };
+
        memory {
                reg = <0x10000000 0x40000000>;
        };
index 0d816d3be4b697a30998506be266244b78d45590..40ea36534643c84d7761c01a340df6fbef70e105 100644 (file)
 #include <dt-bindings/input/input.h>
 
 / {
+       chosen {
+               stdout-path = &uart1;
+       };
+
        memory {
                reg = <0x10000000 0x40000000>;
        };
                default-brightness-level = <7>;
                status = "okay";
        };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_gpio_leds>;
+
+               red {
+                       gpios = <&gpio1 2 0>;
+                       default-state = "on";
+               };
+       };
 };
 
 &audmux {
        status = "okay";
 };
 
+&hdmi {
+       ddc-i2c-bus = <&i2c2>;
+       status = "okay";
+};
+
 &i2c1 {
        clock-frequency = <100000>;
        pinctrl-names = "default";
                        >;
                };
 
+               pinctrl_pcie: pciegrp {
+                       fsl,pins = <
+                               MX6QDL_PAD_GPIO_17__GPIO7_IO12  0x80000000
+                       >;
+               };
+
                pinctrl_pwm1: pwm1grp {
                        fsl,pins = <
                                MX6QDL_PAD_SD1_DAT3__PWM1_OUT           0x1b0b1
                                MX6QDL_PAD_SD3_DAT7__SD3_DATA7          0x17059
                        >;
                };
+
+               pinctrl_usdhc4: usdhc4grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_SD4_CMD__SD4_CMD             0x17059
+                               MX6QDL_PAD_SD4_CLK__SD4_CLK             0x10059
+                               MX6QDL_PAD_SD4_DAT0__SD4_DATA0          0x17059
+                               MX6QDL_PAD_SD4_DAT1__SD4_DATA1          0x17059
+                               MX6QDL_PAD_SD4_DAT2__SD4_DATA2          0x17059
+                               MX6QDL_PAD_SD4_DAT3__SD4_DATA3          0x17059
+                               MX6QDL_PAD_SD4_DAT4__SD4_DATA4          0x17059
+                               MX6QDL_PAD_SD4_DAT5__SD4_DATA5          0x17059
+                               MX6QDL_PAD_SD4_DAT6__SD4_DATA6          0x17059
+                               MX6QDL_PAD_SD4_DAT7__SD4_DATA7          0x17059
+                       >;
+               };
+       };
+
+       gpio_leds {
+               pinctrl_gpio_leds: gpioledsgrp {
+                       fsl,pins = <
+                               MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000
+                       >;
+               };
        };
 };
 
        };
 };
 
+&pcie {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_pcie>;
+       reset-gpio = <&gpio7 12 0>;
+       status = "okay";
+};
+
 &pwm1 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_pwm1>;
        wp-gpios = <&gpio2 1 0>;
        status = "okay";
 };
+
+&usdhc4 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc4>;
+       bus-width = <8>;
+       non-removable;
+       no-1-8-v;
+       status = "okay";
+};
index bdfdf89d405fcf4ae2202844445eeb4adeaa80e7..5c6f10c43f65644bb4ab1367843fbf46918b90a9 100644 (file)
        status = "okay";
 };
 
+&hdmi {
+       ddc-i2c-bus = <&i2c1>;
+       status = "okay";
+};
+
+&i2c1 {
+       clock-frequency = <100000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c1>;
+       status = "okay";
+};
+
 &i2c2 {
        clock-frequency = <100000>;
        pinctrl-names = "default";
                        >;
                };
 
+               pinctrl_i2c1: i2c1grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
+                               MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
+                       >;
+               };
+
                pinctrl_i2c2: i2c2grp {
                        fsl,pins = <
                                MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
index 55cb926fa3f7ed4fbe043587e74d57af344c7bad..ce0599134a699dd338b6f42adef8378e94a7d6e1 100644 (file)
  * http://www.gnu.org/copyleft/gpl.html
  */
 
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
 #include "skeleton.dtsi"
 
 / {
        aliases {
+               ethernet0 = &fec;
                can0 = &can1;
                can1 = &can2;
                gpio0 = &gpio1;
@@ -46,8 +49,6 @@
        intc: interrupt-controller@00a01000 {
                compatible = "arm,cortex-a9-gic";
                #interrupt-cells = <3>;
-               #address-cells = <1>;
-               #size-cells = <1>;
                interrupt-controller;
                reg = <0x00a01000 0x1000>,
                      <0x00a00100 0x100>;
 
                ckil {
                        compatible = "fsl,imx-ckil", "fixed-clock";
+                       #clock-cells = <0>;
                        clock-frequency = <32768>;
                };
 
                ckih1 {
                        compatible = "fsl,imx-ckih1", "fixed-clock";
+                       #clock-cells = <0>;
                        clock-frequency = <0>;
                };
 
                osc {
                        compatible = "fsl,imx-osc", "fixed-clock";
+                       #clock-cells = <0>;
                        clock-frequency = <24000000>;
                };
        };
                                  0x81000000 0 0          0x01f80000 0 0x00010000 /* downstream I/O */
                                  0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */
                        num-lanes = <1>;
-                       interrupts = <0 123 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&clks 189>, <&clks 187>, <&clks 206>, <&clks 144>;
-                       clock-names = "pcie_ref_125m", "sata_ref_100m", "lvds_gate", "pcie_axi";
+                       interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "msi";
+                       #interrupt-cells = <1>;
+                       interrupt-map-mask = <0 0 0 0x7>;
+                       interrupt-map = <0 0 0 1 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 2 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 3 &intc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 4 &intc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clks 144>, <&clks 206>, <&clks 189>;
+                       clock-names = "pcie", "pcie_bus", "pcie_phy";
                        status = "disabled";
                };
 
index 864d8dfb51ca525ebc04c0769073fdeda273835b..a8d9a93fab85fd5031eb8c164fc676823392e0b2 100644 (file)
                                MX6SL_PAD_ECSPI1_MISO__ECSPI1_MISO      0x100b1
                                MX6SL_PAD_ECSPI1_MOSI__ECSPI1_MOSI      0x100b1
                                MX6SL_PAD_ECSPI1_SCLK__ECSPI1_SCLK      0x100b1
+                               MX6SL_PAD_ECSPI1_SS0__GPIO4_IO11        0x80000000
                        >;
                };
 
index 3cb4941afeef9ab6cb121b4271d78c522ff771f8..2d4e5285f3f36556a15c4d0b0ff6561ae3db4d2a 100644 (file)
@@ -14,6 +14,7 @@
 
 / {
        aliases {
+               ethernet0 = &fec;
                gpio0 = &gpio1;
                gpio1 = &gpio2;
                gpio2 = &gpio3;
@@ -68,8 +69,6 @@
        intc: interrupt-controller@00a01000 {
                compatible = "arm,cortex-a9-gic";
                #interrupt-cells = <3>;
-               #address-cells = <1>;
-               #size-cells = <1>;
                interrupt-controller;
                reg = <0x00a01000 0x1000>,
                      <0x00a00100 0x100>;
 
                ckil {
                        compatible = "fixed-clock";
+                       #clock-cells = <0>;
                        clock-frequency = <32768>;
                };
 
                osc {
                        compatible = "fixed-clock";
+                       #clock-cells = <0>;
                        clock-frequency = <24000000>;
                };
        };
index 74b3b63e94cf8cae0b6bf86817573551c99adfb5..c568f067604d91c72a432de366b80b922570e7ba 100644 (file)
 &usb1 {
        status = "okay";
 };
+
+&i2c0 {
+       dtt@50 {
+               compatible = "at,24c1024";
+               reg = <0x50>;
+       };
+};
+
+&aemif {
+       cs0 {
+               #address-cells = <2>;
+               #size-cells = <1>;
+               clock-ranges;
+               ranges;
+
+               ti,cs-chipselect = <0>;
+               /* all timings in nanoseconds */
+               ti,cs-min-turnaround-ns = <12>;
+               ti,cs-read-hold-ns = <6>;
+               ti,cs-read-strobe-ns = <23>;
+               ti,cs-read-setup-ns = <9>;
+               ti,cs-write-hold-ns = <8>;
+               ti,cs-write-strobe-ns = <23>;
+               ti,cs-write-setup-ns = <8>;
+
+               nand@0,0 {
+                       compatible = "ti,keystone-nand","ti,davinci-nand";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       reg = <0 0 0x4000000
+                              1 0 0x0000100>;
+
+                       ti,davinci-chipselect = <0>;
+                       ti,davinci-mask-ale = <0x2000>;
+                       ti,davinci-mask-cle = <0x4000>;
+                       ti,davinci-mask-chipsel = <0>;
+                       nand-ecc-mode = "hw";
+                       ti,davinci-ecc-bits = <4>;
+                       nand-on-flash-bbt;
+
+                       partition@0 {
+                               label = "u-boot";
+                               reg = <0x0 0x100000>;
+                               read-only;
+                       };
+
+                       partition@100000 {
+                               label = "params";
+                               reg = <0x100000 0x80000>;
+                               read-only;
+                       };
+
+                       partition@180000 {
+                               label = "ubifs";
+                               reg = <0x180000 0x1FE80000>;
+                       };
+               };
+       };
+};
+
+&spi0 {
+       nor_flash: n25q128a11@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "Micron,n25q128a11";
+               spi-max-frequency = <54000000>;
+               m25p,fast-read;
+               reg = <0>;
+
+               partition@0 {
+                       label = "u-boot-spl";
+                       reg = <0x0 0x80000>;
+                       read-only;
+               };
+
+               partition@1 {
+                       label = "misc";
+                       reg = <0x80000 0xf80000>;
+               };
+       };
+};
index c93d06f9f2a8db17e9d05b65766136c803247cff..1f90cbf27fd7f73e9cff64ece88f1136b8071fbd 100644 (file)
                };
        };
 };
+
+&i2c0 {
+       dtt@50 {
+               compatible = "at,24c1024";
+               reg = <0x50>;
+       };
+};
+
+&spi0 {
+       nor_flash: n25q128a11@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "Micron,n25q128a11";
+               spi-max-frequency = <54000000>;
+               m25p,fast-read;
+               reg = <0>;
+
+               partition@0 {
+                       label = "u-boot-spl";
+                       reg = <0x0 0x80000>;
+                       read-only;
+               };
+
+               partition@1 {
+                       label = "misc";
+                       reg = <0x80000 0xf80000>;
+               };
+       };
+};
index 50a70132ac9e45ec00a8d9d985c702277006205e..fec43128a2e0f946dabf80e18e287269571c4854 100644 (file)
 &usb {
        status = "okay";
 };
+
+&i2c0 {
+       dtt@50 {
+               compatible = "at,24c1024";
+               reg = <0x50>;
+       };
+};
+
+&aemif {
+       cs0 {
+               #address-cells = <2>;
+               #size-cells = <1>;
+               clock-ranges;
+               ranges;
+
+               ti,cs-chipselect = <0>;
+               /* all timings in nanoseconds */
+               ti,cs-min-turnaround-ns = <12>;
+               ti,cs-read-hold-ns = <6>;
+               ti,cs-read-strobe-ns = <23>;
+               ti,cs-read-setup-ns = <9>;
+               ti,cs-write-hold-ns = <8>;
+               ti,cs-write-strobe-ns = <23>;
+               ti,cs-write-setup-ns = <8>;
+
+               nand@0,0 {
+                       compatible = "ti,keystone-nand","ti,davinci-nand";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       reg = <0 0 0x4000000
+                              1 0 0x0000100>;
+
+                       ti,davinci-chipselect = <0>;
+                       ti,davinci-mask-ale = <0x2000>;
+                       ti,davinci-mask-cle = <0x4000>;
+                       ti,davinci-mask-chipsel = <0>;
+                       nand-ecc-mode = "hw";
+                       ti,davinci-ecc-bits = <4>;
+                       nand-on-flash-bbt;
+
+                       partition@0 {
+                               label = "u-boot";
+                               reg = <0x0 0x100000>;
+                               read-only;
+                       };
+
+                       partition@100000 {
+                               label = "params";
+                               reg = <0x100000 0x80000>;
+                               read-only;
+                       };
+
+                       partition@180000 {
+                               label = "ubifs";
+                               reg = <0x180000 0x7FE80000>;
+                       };
+               };
+       };
+};
+
+&spi0 {
+       nor_flash: n25q128a11@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "Micron,n25q128a11";
+               spi-max-frequency = <54000000>;
+               m25p,fast-read;
+               reg = <0>;
+
+               partition@0 {
+                       label = "u-boot-spl";
+                       reg = <0x0 0x80000>;
+                       read-only;
+               };
+
+               partition@1 {
+                       label = "misc";
+                       reg = <0x80000 0xf80000>;
+               };
+       };
+};
index 90823eb90c1b820544ca390026305f050c74fee7..d9f99e7deb83d6da54af0a0fa911b8b1134adf2b 100644 (file)
@@ -28,8 +28,6 @@
        gic: interrupt-controller {
                compatible = "arm,cortex-a15-gic";
                #interrupt-cells = <3>;
-               #size-cells = <0>;
-               #address-cells = <1>;
                interrupt-controller;
                reg = <0x0 0x02561000 0x0 0x1000>,
                      <0x0 0x02562000 0x0 0x2000>,
@@ -66,6 +64,7 @@
                compatible = "ti,keystone","simple-bus";
                interrupt-parent = <&gic>;
                ranges = <0x0 0x0 0x0 0xc0000000>;
+               dma-ranges = <0x80000000 0x8 0x00000000 0x80000000>;
 
                rstctrl: reset-controller {
                        compatible = "ti,keystone-reset";
                        interrupts = <GIC_SPI 283 IRQ_TYPE_EDGE_RISING>;
                        #address-cells = <1>;
                        #size-cells = <0>;
-
-                       dtt@50 {
-                               compatible = "at,24c1024";
-                               reg = <0x50>;
-                       };
                };
 
                i2c1: i2c@2530400 {
                        clock-frequency = <100000>;
                        clocks = <&clki2c>;
                        interrupts = <GIC_SPI 286 IRQ_TYPE_EDGE_RISING>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                };
 
                i2c2: i2c@2530800 {
                        clock-frequency = <100000>;
                        clocks = <&clki2c>;
                        interrupts = <GIC_SPI 289 IRQ_TYPE_EDGE_RISING>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                };
 
                spi0: spi@21000400 {
                        ti,davinci-spi-intr-line = <0>;
                        interrupts = <GIC_SPI 292 IRQ_TYPE_EDGE_RISING>;
                        clocks = <&clkspi>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                };
 
                spi1: spi@21000600 {
                        ti,davinci-spi-intr-line = <0>;
                        interrupts = <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>;
                        clocks = <&clkspi>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                };
 
                spi2: spi@21000800 {
                        ti,davinci-spi-intr-line = <0>;
                        interrupts = <GIC_SPI 300 IRQ_TYPE_EDGE_RISING>;
                        clocks = <&clkspi>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                };
 
                usb_phy: usb_phy@2620738 {
                        clock-names = "usb";
                        interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
                        ranges;
+                       dma-coherent;
+                       dma-ranges;
                        status = "disabled";
 
                        dwc3@2690000 {
index 3916937d6818032bc0c6aeb19594f8db3773479b..dd81508b919b87349b2cc3260f405470e84957d8 100644 (file)
@@ -1,6 +1,6 @@
 / {
        mbus {
-               pcie-controller {
+               pciec: pcie-controller {
                        compatible = "marvell,kirkwood-pcie";
                        status = "disabled";
                        device_type = "pci";
@@ -15,7 +15,7 @@
                                0x82000000 0x1 0     MBUS_ID(0x04, 0xe8) 0       1 0 /* Port 0.0 MEM */
                                0x81000000 0x1 0     MBUS_ID(0x04, 0xe0) 0       1 0 /* Port 0.0 IO  */>;
 
-                       pcie@1,0 {
+                       pcie0: pcie@1,0 {
                                device_type = "pci";
                                assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
                                reg = <0x0800 0 0 0 0>;
        };
 
        ocp@f1000000 {
-               pinctrl: pinctrl@10000 {
+               pinctrl: pin-controller@10000 {
                        compatible = "marvell,88f6192-pinctrl";
-                       reg = <0x10000 0x20>;
 
-                       pmx_nand: pmx-nand {
-                               marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
-                                              "mpp4", "mpp5", "mpp18",
-                                              "mpp19";
-                               marvell,function = "nand";
-                       };
                        pmx_sata0: pmx-sata0 {
                                marvell,pins = "mpp5", "mpp21", "mpp23";
                                marvell,function = "sata0";
                                marvell,pins = "mpp4", "mpp20", "mpp22";
                                marvell,function = "sata1";
                        };
-                       pmx_spi: pmx-spi {
-                               marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3";
-                               marvell,function = "spi";
-                       };
-                       pmx_twsi0: pmx-twsi0 {
-                               marvell,pins = "mpp8", "mpp9";
-                               marvell,function = "twsi0";
-                       };
-                       pmx_uart0: pmx-uart0 {
-                               marvell,pins = "mpp10", "mpp11";
-                               marvell,function = "uart0";
-                       };
-                       pmx_uart1: pmx-uart1 {
-                               marvell,pins = "mpp13", "mpp14";
-                               marvell,function = "uart1";
-                       };
                        pmx_sdio: pmx-sdio {
                                marvell,pins = "mpp12", "mpp13", "mpp14",
                                               "mpp15", "mpp16", "mpp17";
                        };
                };
 
-               rtc@10300 {
+               rtc: rtc@10300 {
                        compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc";
                        reg = <0x10300 0x20>;
                        interrupts = <53>;
                        clocks = <&gate_clk 7>;
                };
 
-               sata@80000 {
+               sata: sata@80000 {
                        compatible = "marvell,orion-sata";
                        reg = <0x80000 0x5000>;
                        interrupts = <21>;
@@ -92,7 +69,7 @@
                        status = "disabled";
                };
 
-               mvsdio@90000 {
+               sdio: mvsdio@90000 {
                        compatible = "marvell,orion-sdio";
                        reg = <0x90000 0x200>;
                        interrupts = <28>;
index 416d96e1302fab6e9af0d61ebb5cdbbe0290cfa7..7dc7d6782e8325012b8b7ad8fe52676ab15ca404 100644 (file)
@@ -1,6 +1,6 @@
 / {
        mbus {
-               pcie-controller {
+               pciec: pcie-controller {
                        compatible = "marvell,kirkwood-pcie";
                        status = "disabled";
                        device_type = "pci";
@@ -15,7 +15,7 @@
                                0x82000000 0x1 0     MBUS_ID(0x04, 0xe8) 0       1 0 /* Port 0.0 MEM */
                                0x81000000 0x1 0     MBUS_ID(0x04, 0xe0) 0       1 0 /* Port 0.0 IO  */>;
 
-                       pcie@1,0 {
+                       pcie0: pcie@1,0 {
                                device_type = "pci";
                                assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
                                reg = <0x0800 0 0 0 0>;
        };
 
        ocp@f1000000 {
-               pinctrl: pinctrl@10000 {
+               pinctrl: pin-controller@10000 {
                        compatible = "marvell,88f6281-pinctrl";
-                       reg = <0x10000 0x20>;
 
-                       pmx_nand: pmx-nand {
-                               marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
-                                              "mpp4", "mpp5", "mpp18",
-                                              "mpp19";
-                               marvell,function = "nand";
-                       };
                        pmx_sata0: pmx-sata0 {
                                marvell,pins = "mpp5", "mpp21", "mpp23";
                                marvell,function = "sata0";
                                marvell,pins = "mpp4", "mpp20", "mpp22";
                                marvell,function = "sata1";
                        };
-                       pmx_spi: pmx-spi {
-                               marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3";
-                               marvell,function = "spi";
-                       };
-                       pmx_twsi0: pmx-twsi0 {
-                               marvell,pins = "mpp8", "mpp9";
-                               marvell,function = "twsi0";
-                       };
-                       pmx_uart0: pmx-uart0 {
-                               marvell,pins = "mpp10", "mpp11";
-                               marvell,function = "uart0";
-                       };
-                       pmx_uart1: pmx-uart1 {
-                               marvell,pins = "mpp13", "mpp14";
-                               marvell,function = "uart1";
-                       };
                        pmx_sdio: pmx-sdio {
                                marvell,pins = "mpp12", "mpp13", "mpp14",
                                               "mpp15", "mpp16", "mpp17";
                        };
                };
 
-               rtc@10300 {
+               rtc: rtc@10300 {
                        compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc";
                        reg = <0x10300 0x20>;
                        interrupts = <53>;
                        clocks = <&gate_clk 7>;
                };
 
-               sata@80000 {
+               sata: sata@80000 {
                        compatible = "marvell,orion-sata";
                        reg = <0x80000 0x5000>;
                        interrupts = <21>;
@@ -94,7 +71,7 @@
                        status = "disabled";
                };
 
-               mvsdio@90000 {
+               sdio: mvsdio@90000 {
                        compatible = "marvell,orion-sdio";
                        reg = <0x90000 0x200>;
                        interrupts = <28>;
index 2902e0d7971d061599d13ef8733e3a3c4ad49fd2..4680eec990f0cd3bc92a985b57e954303ee2f0b4 100644 (file)
@@ -1,6 +1,6 @@
 / {
        mbus {
-               pcie-controller {
+               pciec: pcie-controller {
                        compatible = "marvell,kirkwood-pcie";
                        status = "disabled";
                        device_type = "pci";
@@ -19,7 +19,7 @@
                                0x82000000 0x2 0     MBUS_ID(0x04, 0xd8) 0       1 0 /* Port 1.0 MEM */
                                0x81000000 0x2 0     MBUS_ID(0x04, 0xd0) 0       1 0 /* Port 1.0 IO  */>;
 
-                       pcie@1,0 {
+                       pcie0: pcie@1,0 {
                                device_type = "pci";
                                assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
                                reg = <0x0800 0 0 0 0>;
@@ -36,7 +36,7 @@
                                status = "disabled";
                        };
 
-                       pcie@2,0 {
+                       pcie1: pcie@2,0 {
                                device_type = "pci";
                                assigned-addresses = <0x82001000 0 0x00044000 0 0x2000>;
                                reg = <0x1000 0 0 0 0>;
        };
        ocp@f1000000 {
 
-               pinctrl: pinctrl@10000 {
+               pinctrl: pin-controller@10000 {
                        compatible = "marvell,88f6282-pinctrl";
-                       reg = <0x10000 0x20>;
-
-                       pmx_nand: pmx-nand {
-                               marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
-                                                       "mpp4", "mpp5", "mpp18", "mpp19";
-                               marvell,function = "nand";
-                       };
 
                        pmx_sata0: pmx-sata0 {
                                marvell,pins = "mpp5", "mpp21", "mpp23";
                                marvell,pins = "mpp4", "mpp20", "mpp22";
                                marvell,function = "sata1";
                        };
-                       pmx_spi: pmx-spi {
-                               marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3";
-                               marvell,function = "spi";
-                       };
-                       pmx_twsi0: pmx-twsi0 {
-                               marvell,pins = "mpp8", "mpp9";
-                               marvell,function = "twsi0";
-                       };
 
+                       /*
+                        * Default I2C1 pinctrl setting on mpp36/mpp37,
+                        * overwrite marvell,pins on board level if required.
+                        */
                        pmx_twsi1: pmx-twsi1 {
                                marvell,pins = "mpp36", "mpp37";
                                marvell,function = "twsi1";
                        };
 
-                       pmx_uart0: pmx-uart0 {
-                               marvell,pins = "mpp10", "mpp11";
-                               marvell,function = "uart0";
-                       };
-
-                       pmx_uart1: pmx-uart1 {
-                               marvell,pins = "mpp13", "mpp14";
-                               marvell,function = "uart1";
-                       };
                        pmx_sdio: pmx-sdio {
                                marvell,pins = "mpp12", "mpp13", "mpp14",
                                               "mpp15", "mpp16", "mpp17";
                        };
                };
 
-               thermal@10078 {
+               thermal: thermal@10078 {
                        compatible = "marvell,kirkwood-thermal";
                        reg = <0x10078 0x4>;
                        status = "okay";
                };
 
-               rtc@10300 {
+               rtc: rtc@10300 {
                        compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc";
                        reg = <0x10300 0x20>;
                        interrupts = <53>;
                        clocks = <&gate_clk 7>;
                };
 
-               i2c@11100 {
+               i2c1: i2c@11100 {
                        compatible = "marvell,mv64xxx-i2c";
                        reg = <0x11100 0x20>;
                        #address-cells = <1>;
                        interrupts = <32>;
                        clock-frequency = <100000>;
                        clocks = <&gate_clk 7>;
+                       pinctrl-0 = <&pmx_twsi1>;
+                       pinctrl-names = "default";
                        status = "disabled";
                };
 
-               sata@80000 {
+               sata: sata@80000 {
                        compatible = "marvell,orion-sata";
                        reg = <0x80000 0x5000>;
                        interrupts = <21>;
                        status = "disabled";
                };
 
-               mvsdio@90000 {
+               sdio: mvsdio@90000 {
                        compatible = "marvell,orion-sdio";
                        reg = <0x90000 0x200>;
                        interrupts = <28>;
index 3271e4c8ea07c61549232e19c5489e62bfe3adf6..2e8e412b9db0ddb655adf70c4933f58216bffa9c 100644 (file)
@@ -1,31 +1,8 @@
 / {
        ocp@f1000000 {
-               pinctrl: pinctrl@10000 {
+               pinctrl: pin-controller@10000 {
                        compatible = "marvell,98dx4122-pinctrl";
-                       reg = <0x10000 0x20>;
 
-                       pmx_nand: pmx-nand {
-                               marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
-                                              "mpp4", "mpp5", "mpp18",
-                                              "mpp19";
-                               marvell,function = "nand";
-                       };
-                       pmx_spi: pmx-spi {
-                               marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3";
-                               marvell,function = "spi";
-                       };
-                       pmx_twsi0: pmx-twsi0 {
-                               marvell,pins = "mpp8", "mpp9";
-                               marvell,function = "twsi0";
-                       };
-                       pmx_uart0: pmx-uart0 {
-                               marvell,pins = "mpp10", "mpp11";
-                               marvell,function = "uart0";
-                       };
-                       pmx_uart1: pmx-uart1 {
-                               marvell,pins = "mpp13", "mpp14";
-                               marvell,function = "uart1";
-                       };
                };
        };
 };
index 40791053106bc9889b996544ef3de7e89440d626..c9247f8672ae14c24487f9b6902187c48e25fcd3 100644 (file)
@@ -30,6 +30,7 @@
 
        chosen {
                bootargs = "console=ttyS0,115200n8 earlyprintk";
+               stdout-path = &uart0;
        };
 
        mbus {
@@ -44,7 +45,7 @@
        };
 
        ocp@f1000000 {
-               pinctrl: pinctrl@10000 {
+               pinctrl: pin-controller@10000 {
                        pmx_button_power: pmx-button-power {
                                marvell,pins = "mpp39";
                                marvell,function = "gpio";
 
                spi@10600 {
                        status = "okay";
-                       pinctrl-0 = <&pmx_spi>;
-                       pinctrl-names = "default";
 
                        m25p16@0 {
                                #address-cells = <1>;
                                #size-cells = <1>;
-                               compatible = "m25p16";
+                               compatible = "st,m25p16";
                                reg = <0>;
                                spi-max-frequency = <40000000>;
                                mode = <0>;
                         * UART0_TX = Testpoint 66
                         * See the Excito Wiki for more details.
                         */
-                       pinctrl-0 = <&pmx_uart0>;
-                       pinctrl-names = "default";
                        status = "okay";
                };
 
index 0e06fd3cee4dc40113e94420f767d4ffba7301c7..ab6ab4933e6bae498216b00efc433ceaf9c157fa 100644 (file)
 
        chosen {
                bootargs = "console=ttyS0,115200n8";
+               stdout-path = &uart0;
        };
 
        ocp@f1000000 {
-               pinctrl: pinctrl@10000 {
+               pinctrl: pin-controller@10000 {
                        pmx_cloudbox_sata0: pmx-cloudbox-sata0 {
                                marvell,pins = "mpp15";
                                marvell,function = "sata0";
@@ -25,9 +26,6 @@
                };
 
                serial@12000 {
-                       pinctrl-0 = <&pmx_uart0>;
-                       pinctrl-names = "default";
-                       clock-frequency = <166666667>;
                        status = "okay";
                };
 
                };
 
                spi@10600 {
-                       pinctrl-0 = <&pmx_spi>;
-                       pinctrl-names = "default";
                        status = "okay";
 
                        flash@0 {
                                #address-cells = <1>;
                                #size-cells = <1>;
-                               compatible = "mx25l4005a";
+                               compatible = "mxicy,mx25l4005a";
                                reg = <0>;
                                spi-max-frequency = <20000000>;
                                mode = <0>;
index 02d1225ef99f8364c1d9a03987d73ed357b4c428..812df691ae3d11a82df137ae894aa069ef237d56 100644 (file)
 
        chosen {
                bootargs = "console=ttyS0,115200n8 earlyprintk";
+               stdout-path = &uart0;
        };
 
        ocp@f1000000 {
-               pinctrl@10000 {
+               pin-controller@10000 {
                        pmx_sdio_gpios: pmx-sdio-gpios {
                                marvell,pins = "mpp37", "mpp38";
                                marvell,function = "gpio";
                };
 
                serial@12000 {
-                       pinctrl-0 = <&pmx_uart0>;
-                       pinctrl-names = "default";
-                       clock-frequency = <200000000>;
-                       status = "ok";
+                       status = "okay";
                };
 
                sata@80000 {
@@ -59,8 +57,6 @@
 };
 
 &nand {
-       pinctrl-0 = <&pmx_nand>;
-       pinctrl-names = "default";
        chip-delay = <25>;
        status = "okay";
 
index bf7fe8ab88f4353d0e1688d7fdf8cbd9718e1f7e..d85ef0a91b5019d005dbbd199072aff4e90b14aa 100644 (file)
@@ -13,6 +13,7 @@
 
        chosen {
                bootargs = "console=ttyS0,115200n8 earlyprintk";
+               stdout-path = &uart0;
        };
 
        gpio-leds {
@@ -51,8 +52,6 @@
                };
 
                serial@12100 {
-                       pinctrl-0 = <&pmx_uart1>;
-                       pinctrl-names = "default";
                        status = "okay";
                };
        };
index cb9978c652f2d1635b762e5aa3ef09097aa0b79e..5e586ed04c58a45d2f6ddb61db84b4e9cd53e457 100644 (file)
@@ -13,6 +13,7 @@
 
        chosen {
                bootargs = "console=ttyS0,115200n8 earlyprintk";
+               stdout-path = &uart0;
        };
 
        gpio-leds {
index d5aa9564a287ee44589ede975c4d591f43747842..113dcf056dcfb792d4220ec089a9dae748e4a587 100644 (file)
@@ -50,7 +50,7 @@
        };
 
        ocp@f1000000 {
-               pinctrl: pinctrl@10000 {
+               pinctrl: pin-controller@10000 {
 
                        pinctrl-0 = <&pmx_power_back_on &pmx_present_sata0
                                     &pmx_present_sata1 &pmx_fan_tacho
 };
 
 &nand {
-       pinctrl-0 = <&pmx_nand>;
-       pinctrl-names = "default";
        status = "okay";
        chip-delay = <35>;
 
index f31312ebd0d60b17538dd1b8bd8250ee80bf88ea..849736349511433644dcf749633ff317737efb17 100644 (file)
 
        chosen {
                bootargs = "console=ttyS0,115200n8 earlyprintk root=/dev/sda1 rootdelay=10";
+               stdout-path = &uart0;
        };
 
        ocp@f1000000 {
-               pinctrl: pinctrl@10000 {
+               pinctrl: pin-controller@10000 {
                        pmx_usb_power_enable: pmx-usb-power-enable {
                                marvell,pins = "mpp29";
                                marvell,function = "gpio";
index ef3463e0ae1939be8bcffa3a7d0200c387a8dc5f..6467c7924195900f66e91e0ce3bdecc50cf13827 100644 (file)
 
        chosen {
                bootargs = "console=ttyS0,115200n8 earlyprintk";
+               stdout-path = &uart0;
        };
 
        ocp@f1000000 {
-               pinctrl: pinctrl@10000 {
+               pinctrl: pin-controller@10000 {
                        pmx_led_bluetooth: pmx-led-bluetooth {
                                marvell,pins = "mpp47";
                                marvell,function = "gpio";
 
                spi@10600 {
                        status = "okay";
-                       pinctrl-0 = <&pmx_spi>;
-                       pinctrl-names = "default";
 
                        m25p40@0 {
                                #address-cells = <1>;
                                #size-cells = <1>;
-                               compatible = "mx25l1606e";
+                               compatible = "mxicy,mx25l1606e";
                                reg = <0>;
                                spi-max-frequency = <50000000>;
                                mode = <0>;
index 772092c94ca34ab3546ad732ae6f6a06da4f724d..d4bcc1c7f6b31a1897baf620c9ce5634a10c52b8 100644 (file)
@@ -25,6 +25,7 @@
 
        chosen {
                bootargs = "console=ttyS0,115200n8";
+               stdout-path = &uart0;
        };
 
        gpio-fan-150-32-35 {
index aabafbe0da4c77f5e2381f93ab8dcc3ddd681dd3..95bf83b91b4acac4aaf659f796d4813c940c42e2 100644 (file)
@@ -25,6 +25,7 @@
 
        chosen {
                bootargs = "console=ttyS0,115200n8";
+               stdout-path = &uart0;
        };
 
        gpio-fan-150-32-35 {
index 16ec7fbab5734a3b1e8c2fdc2beb93b73cf85e6c..61f47fbe44d0d6b12354da1641a7c7cc05b5cf22 100644 (file)
@@ -24,6 +24,7 @@
 
        chosen {
                bootargs = "console=ttyS0,115200n8";
+               stdout-path = &uart0;
        };
 
        gpio-fan-100-15-35-1 {
index cff1b2388765bb86d7e751401d0b4c0890129721..bf4143c6cb8f10991d4abbaae126966f9f9c753c 100644 (file)
@@ -24,6 +24,7 @@
 
        chosen {
                bootargs = "console=ttyS0,115200n8";
+               stdout-path = &uart0;
        };
 
        gpio-fan-100-15-35-1 {
index 330411993d386547addb426980578259fa7c2476..6d25093a9ac48290eb52a8daae4ded18239ebcc3 100644 (file)
@@ -24,6 +24,7 @@
 
        chosen {
                bootargs = "console=ttyS0,115200n8";
+               stdout-path = &uart0;
        };
 
        gpio-fan-150-32-35 {
index 6052eaa37d4f3126d45236bd2e401b142d8ff15a..2f1933efcac1f4020f4c12b1e77a9662f843d0ce 100644 (file)
@@ -26,6 +26,7 @@
 
        chosen {
                bootargs = "console=ttyS0,115200n8";
+               stdout-path = &uart0;
        };
 
        gpio-fan-150-32-35 {
index 7f76cd30e84e73257d57f5cd8ca16ba249c70148..99afd462f956ff2030f8e6d639ffb2052a78857a 100644 (file)
@@ -27,6 +27,7 @@
 
        chosen {
                bootargs = "console=ttyS0,115200n8";
+               stdout-path = &uart0;
        };
 
        gpio-fan-100-15-35-1 {
index 1f83a00f1f74e4ebd4d919c707726ce1cace125d..f5c4213fc67cc8f7195d56f42a5fa1e3c54d9203 100644 (file)
@@ -25,6 +25,7 @@
 
        chosen {
                bootargs = "console=ttyS0,115200n8";
+               stdout-path = &uart0;
        };
 
        gpio-fan-100-32-35 {
index 0a573add44a252d8b6a2a7d4bd43d8488f355fd5..e80a962ebba0a54262b9ff31fc61196a0ebb02a4 100644 (file)
@@ -24,6 +24,7 @@
 
        chosen {
                bootargs = "console=ttyS0,115200n8";
+               stdout-path = &uart0;
        };
 
        gpio-fan-150-15-18 {
index 1848a6245fd30ab67a67c3833cd493c4fb16304e..cae5af4b88b56152583885707c9ae24751a126ea 100644 (file)
@@ -24,6 +24,7 @@
 
        chosen {
                bootargs = "console=ttyS0,115200n8";
+               stdout-path = &uart0;
        };
 
        gpio-fan-150-32-35 {
index a1737b4311c628b5329fac6b4083894841cc00e3..623cd4a37d7171bfe3d262513c98feb48eae0f71 100644 (file)
@@ -24,6 +24,7 @@
 
        chosen {
                bootargs = "console=ttyS0,115200n8";
+               stdout-path = &uart0;
        };
 
        gpio-fan-100-15-35-1 {
index 0cde914eceaee417b551ccbfccdfc148c19b243b..3348e330f0742f83828480048320a2902c047767 100644 (file)
@@ -24,6 +24,7 @@
 
        chosen {
                bootargs = "console=ttyS0,115200n8";
+               stdout-path = &uart0;
        };
 
        gpio-fan-150-15-18 {
index aef0cadc2c781f80855a514297bd8dc0d276064d..a0a1fad8b4de5fae9690a11ad0bc2670a2e0bd81 100644 (file)
@@ -24,6 +24,7 @@
 
        chosen {
                bootargs = "console=ttyS0,115200n8";
+               stdout-path = &uart0;
        };
 
        gpio-fan-100-15-35-1 {
index eb93294201070aa84cd212b23924e7720ecd9b24..aa60a0b049a7722dcb4b587e2f9cfd5fc56ae3de 100644 (file)
 
        chosen {
                bootargs = "console=ttyS0,115200n8 earlyprintk root=/dev/sda1 rootdelay=10";
+               stdout-path = &uart0;
        };
 
        ocp@f1000000 {
-               pinctrl: pinctrl@10000 {
+               pinctrl: pin-controller@10000 {
                        pmx_usb_power_enable: pmx-usb-power-enable {
                                marvell,pins = "mpp29";
                                marvell,function = "gpio";
index 2d51fce74a5ad17894d6e9661384f0aacdced2d1..c5a1fc75c7a3b43778e0f8634776a2d6a2150aed 100644 (file)
 
        chosen {
                bootargs = "console=ttyS0,115200n8 earlyprintk";
+               stdout-path = &uart0;
        };
 
        ocp@f1000000 {
-               pinctrl: pinctrl@10000 {
+               pinctrl: pin-controller@10000 {
                        pmx_led_health_r: pmx-led-health-r {
                                marvell,pins = "mpp46";
                                marvell,function = "gpio";
@@ -36,7 +37,6 @@
                        };
                };
                serial@12000 {
-                       clock-frequency = <200000000>;
                        status = "ok";
                };
 
        status = "okay";
 
        ethphy0: ethernet-phy@0 {
-               compatible = "marvell,88e1121";
+               /* Marvell 88E1121R */
+               compatible = "ethernet-phy-id0141.0cb0",
+                            "ethernet-phy-ieee802.3-c22";
                reg = <0>;
+               phy-connection-type = "rgmii-id";
        };
 
        ethphy1: ethernet-phy@1 {
-               compatible = "marvell,88e1121";
+               /* Marvell 88E1121R */
+               compatible = "ethernet-phy-id0141.0cb0",
+                            "ethernet-phy-ieee802.3-c22";
                reg = <1>;
+               phy-connection-type = "rgmii-id";
        };
 };
 
index a1add3f215e394aaeb006c711c5f2f8ce5fbf58c..bfa5edde179c30d38d55cb80dd462dc6c3ee8084 100644 (file)
 
        chosen {
                bootargs = "console=ttyS0,115200n8 earlyprintk";
+               stdout-path = &uart0;
        };
 
        ocp@f1000000 {
-               pinctrl: pinctrl@10000 {
+               pinctrl: pin-controller@10000 {
                        pmx_led_os_red: pmx-led-os-red {
                                marvell,pins = "mpp22";
                                marvell,function = "gpio";
 
 &nand {
        status = "okay";
-       pinctrl-0 = <&pmx_nand>;
-       pinctrl-names = "default";
 
        partition@0 {
                label = "u-boot";
index 8d8c80e3656d6ebaf36c71dfc0351dbe28efe5b3..38e31d15a62d3fc41d91425beba35a41c44fa7a1 100644 (file)
@@ -14,6 +14,7 @@
 
        chosen {
                bootargs = "console=ttyS0,115200n8 earlyprintk";
+               stdout-path = &uart0;
                linux,initrd-start = <0x4500040>;
                linux,initrd-end   = <0x4800000>;
        };
@@ -29,7 +30,7 @@
        };
 
        ocp@f1000000 {
-               pinctrl: pinctrl@10000 {
+               pinctrl: pin-controller@10000 {
                        pmx_button_reset: pmx-button-reset {
                                marvell,pins = "mpp12";
                                marvell,function = "gpio";
index 59e7a5adeedbcb7791994bc2a506dca5d73c2e05..05291f3990d03561ff50940f42956d5b11019724 100644 (file)
 
        chosen {
                bootargs = "console=ttyS0,115200n8 earlyprintk";
+               stdout-path = &uart0;
        };
 
        ocp@f1000000 {
-               pinctrl: pinctrl@10000 {
+               pinctrl: pin-controller@10000 {
                        pinctrl-0 = < &pmx_led_sata_brt_ctrl_1
                                      &pmx_led_sata_brt_ctrl_2
                                      &pmx_led_backup_brt_ctrl_1
index 04a1e44541b34b302a1e86100dd13a169e60c440..61139bf309858cba22f6c678e087fdd7e5cdd32c 100644 (file)
 
        chosen {
                bootargs = "console=ttyS0,115200n8 earlyprintk";
+               stdout-path = &uart0;
        };
 
        ocp@f1000000 {
-               pinctrl: pinctrl@10000 {
+               pinctrl: pin-controller@10000 {
                        pinctrl-0 = < &pmx_i2c_gpio_sda &pmx_i2c_gpio_scl >;
                        pinctrl-names = "default";
 
@@ -45,9 +46,7 @@
 };
 
 &nand {
-       pinctrl-0 = <&pmx_nand>;
-       pinctrl-names = "default";
-       status = "ok";
+       status = "okay";
        chip-delay = <25>;
 };
 
index c9e82eff9bf2e73af3204e9be1f79dff2bc62410..24425660e973c47edf90087589cf62fcef324208 100644 (file)
@@ -24,6 +24,7 @@
 
        chosen {
                bootargs = "console=ttyS0,115200n8 earlyprintk";
+               stdout-path = &uart0;
        };
 
        mbus {
 
        ocp@f1000000 {
                serial@12000 {
-                       pinctrl-0 = <&pmx_uart0>;
-                       pinctrl-names = "default";
                        status = "okay";
                };
 
                i2c@11000 {
-                       pinctrl-0 = <&pmx_twsi0>;
-                       pinctrl-names = "default";
                        status = "okay";
 
                        eeprom@50 {
-                               compatible = "at,24c04";
+                               compatible = "atmel,24c04";
                                pagesize = <16>;
                                reg = <0x50>;
                        };
                };
 
-               pinctrl: pinctrl@10000 {
+               pinctrl: pin-controller@10000 {
                        pmx_usb_power_enable: pmx-usb-power-enable {
                                marvell,pins = "mpp14";
                                marvell,function = "gpio";
 &nand {
        /* Total size : 512MB */
        status = "okay";
-       pinctrl-0 = <&pmx_nand>;
 
        partition@0 {
                label = "u-boot";
index 1656653d339b55cebf1456d189f90b142bb6ec75..53484474df1f4672ee3b1110f87ed86cbadd613a 100644 (file)
@@ -4,10 +4,11 @@
 / {
        chosen {
                bootargs = "console=ttyS0,115200n8 earlyprintk";
+               stdout-path = &uart0;
        };
 
        ocp@f1000000 {
-               pinctrl: pinctrl@10000 {
+               pinctrl: pin-controller@10000 {
                        pmx_power_hdd: pmx-power-hdd {
                                marvell,pins = "mpp10";
                                marvell,function = "gpo";
index 73722c06750182cd003bb67e264d574616415412..f3a991837515d4b97aec12aa2a21b9ddcefe8a2d 100644 (file)
                 reg = <0x00000000 0x20000000>;
         };
 
-        chosen {
-                bootargs = "console=ttyS0,115200n8 earlyprintk";
-        };
+       chosen {
+               bootargs = "console=ttyS0,115200n8 earlyprintk";
+               stdout-path = &uart0;
+       };
 
        mbus {
                pcie-controller {
@@ -27,7 +28,7 @@
        };
 
        ocp@f1000000 {
-               pinctrl: pinctrl@10000 {
+               pinctrl: pin-controller@10000 {
                        pmx_led_health: pmx-led-health {
                                marvell,pins = "mpp7";
                                marvell,function = "gpo";
 
                 };
 
-                serial@12000 {
-                        status = "ok";
-                        pinctrl-0 = <&pmx_uart0>;
-                        pinctrl-names = "default";
-                };
+               serial@12000 {
+                       status = "okay";
+               };
 
                rtc@10300 {
                        status = "disabled";
 };
 
 &nand {
-       pinctrl-0 = <&pmx_nand>;
-       pinctrl-names = "default";
        status = "okay";
 
        partition@0 {
index 2cb0dc529165dcd88cbbba8ae7df7da2647a041f..49f9295c7bacdfedd607a28fa75c4e9b2ada595e 100644 (file)
 
        chosen {
                bootargs = "console=ttyS0,115200n8 earlyprintk";
+               stdout-path = &uart0;
        };
 
        ocp@f1000000 {
-               pinctrl@10000 {
+               pin-controller@10000 {
                        pmx_usb_led: pmx-usb-led {
                                marvell,pins = "mpp12";
                                marvell,function = "gpo";
                };
 
                spi@10600 {
-                       pinctrl-0 = <&pmx_spi>;
-                       pinctrl-names = "default";
                        status = "okay";
 
                        flash@0 {
                                #address-cells = <1>;
                                #size-cells = <1>;
-                               compatible = "mx25l12805d";
+                               compatible = "mxicy,mx25l12805d";
                                reg = <0>;
                                spi-max-frequency = <50000000>;
                                mode = <0>;
                };
 
                serial@12000 {
-                       pinctrl-0 = <&pmx_uart0>;
-                       pinctrl-names = "default";
-                       clock-frequency = <200000000>;
-                       status = "ok";
+                       status = "okay";
                };
 
                ehci@50000 {
index 4838478019ccb94a88f6f4027f7e60125c42a6d9..fd733c63bc27da55aadb88b435fe8f2912aca8ad 100644 (file)
@@ -25,6 +25,7 @@
 
        chosen {
                bootargs = "console=ttyS0,115200n8 earlyprintk";
+               stdout-path = &uart0;
        };
 
        mbus {
@@ -38,7 +39,7 @@
        };
 
        ocp@f1000000 {
-               pinctrl: pinctrl@10000 {
+               pinctrl: pin-controller@10000 {
                        pmx_button_power: pmx-button-power {
                                marvell,pins = "mpp47";
                                marvell,function = "gpio";
                };
 
                serial@12000 {
-                       pinctrl-0 = <&pmx_uart0>;
-                       pinctrl-names = "default";
                        status = "okay";
                };
 
index 7c8a0d9d8d1fd02fc7dd6b02c2bb6986a7e04a42..b514d643fb6c5413abd3ad1c50bfeffe9d905a33 100644 (file)
@@ -25,6 +25,7 @@
 
        chosen {
                bootargs = "console=ttyS0,115200n8 earlyprintk";
+               stdout-path = &uart0;
        };
 
        mbus {
@@ -40,7 +41,7 @@
        };
 
        ocp@f1000000 {
-               pinctrl: pinctrl@10000 {
+               pinctrl: pin-controller@10000 {
                        pmx_button_power: pmx-button-power {
                                marvell,pins = "mpp47";
                                marvell,function = "gpio";
                };
 
                serial@12000 {
-                       pinctrl-0 = <&pmx_uart0>;
-                       pinctrl-names = "default";
                        status = "okay";
                };
 
index 743152f31a815b0e970b7dab80e4ed8af94adb87..fe6c0246db1ab4749bf453b7e312dbd6ca5667ae 100644 (file)
@@ -4,10 +4,11 @@
 / {
        chosen {
                bootargs = "console=ttyS0,115200n8";
+               stdout-path = &uart0;
        };
 
        ocp@f1000000 {
-               pinctrl: pinctrl@10000 {
+               pinctrl: pin-controller@10000 {
                        pmx_ns2_sata0: pmx-ns2-sata0 {
                                marvell,pins = "mpp21";
                                marvell,function = "sata0";
                };
 
                serial@12000 {
-                       pinctrl-0 = <&pmx_uart0>;
-                       pinctrl-names = "default";
                        status = "okay";
                };
 
                spi@10600 {
-                       pinctrl-0 = <&pmx_spi>;
-                       pinctrl-names = "default";
                        status = "okay";
 
                        flash@0 {
                                #address-cells = <1>;
                                #size-cells = <1>;
-                               compatible = "mx25l4005a";
+                               compatible = "mxicy,mx25l4005a";
                                reg = <0>;
                                spi-max-frequency = <20000000>;
                                mode = <0>;
                };
 
                i2c@11000 {
-                       pinctrl-0 = <&pmx_twsi0>;
-                       pinctrl-names = "default";
                        status = "okay";
 
                        eeprom@50 {
-                               compatible = "at,24c04";
+                               compatible = "atmel,24c04";
                                pagesize = <16>;
                                reg = <0x50>;
                        };
index 03fa24cf334468ff66095883b64ac5b76ae6bc42..6139df0f376c911f078408761acd5f86df09f53b 100644 (file)
@@ -1,6 +1,6 @@
 /dts-v1/;
 
-#include "kirkwood-nsa310-common.dtsi"
+#include "kirkwood-nsa3x0-common.dtsi"
 
 / {
        compatible = "zyxel,nsa310", "marvell,kirkwood-88f6281", "marvell,kirkwood";
@@ -12,6 +12,7 @@
 
        chosen {
                bootargs = "console=ttyS0,115200";
+               stdout-path = &uart0;
        };
 
        mbus {
@@ -25,7 +26,7 @@
        };
 
        ocp@f1000000 {
-               pinctrl: pinctrl@10000 {
+               pinctrl: pin-controller@10000 {
                        pinctrl-0 = <&pmx_unknown>;
                        pinctrl-names = "default";
 
                                marvell,function = "gpio";
                        };
 
-                       pmx_btn_reset: pmx-btn-reset {
-                               marvell,pins = "mpp36";
-                               marvell,function = "gpio";
-                       };
-
-                       pmx_btn_copy: pmx-btn-copy {
-                               marvell,pins = "mpp37";
-                               marvell,function = "gpio";
-                       };
-
-                       pmx_led_copy_green: pmx-led-copy-green {
-                               marvell,pins = "mpp39";
-                               marvell,function = "gpio";
-                       };
-
-                       pmx_led_copy_red: pmx-led-copy-red {
-                               marvell,pins = "mpp40";
-                               marvell,function = "gpio";
-                       };
-
                        pmx_led_hdd_green: pmx-led-hdd-green {
                                marvell,pins = "mpp41";
                                marvell,function = "gpio";
                                marvell,function = "gpio";
                        };
 
-                       pmx_btn_power: pmx-btn-power {
-                               marvell,pins = "mpp46";
-                               marvell,function = "gpio";
-                       };
                };
 
                i2c@11000 {
                        status = "okay";
 
                        adt7476: adt7476a@2e {
-                               compatible = "adt7476";
+                               compatible = "adi,adt7476";
                                reg = <0x2e>;
                        };
                };
        };
 
-       gpio_keys {
-               compatible = "gpio-keys";
-               #address-cells = <1>;
-               #size-cells = <0>;
-               pinctrl-0 = <&pmx_btn_reset &pmx_btn_copy &pmx_btn_power>;
-               pinctrl-names = "default";
-
-               button@1 {
-                       label = "Power Button";
-                       linux,code = <KEY_POWER>;
-                       gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
-               };
-               button@2 {
-                       label = "Copy Button";
-                       linux,code = <KEY_COPY>;
-                       gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
-               };
-               button@3 {
-                       label = "Reset Button";
-                       linux,code = <KEY_RESTART>;
-                       gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
-               };
-       };
-
        gpio-leds {
                compatible = "gpio-leds";
                pinctrl-0 = <&pmx_led_esata_green &pmx_led_esata_red
index a5e77945286776940aa38d363ad08bc081e85e3b..3d2b3d494c1913eafb7e43c3034cac912f1f5591 100644 (file)
@@ -1,6 +1,6 @@
 /dts-v1/;
 
-#include "kirkwood-nsa310-common.dtsi"
+#include "kirkwood-nsa3x0-common.dtsi"
 
 /*
  * There are at least two different NSA310 designs. This variant does
 
        chosen {
                bootargs = "console=ttyS0,115200";
+               stdout-path = &uart0;
        };
 
        ocp@f1000000 {
-               pinctrl: pinctrl@10000 {
+               pinctrl: pin-controller@10000 {
                        pinctrl-names = "default";
 
                        pmx_led_esata_green: pmx-led-esata-green {
                                marvell,function = "gpio";
                        };
 
-                       pmx_usb_power_off: pmx-usb-power-off {
-                               marvell,pins = "mpp21";
-                               marvell,function = "gpio";
-                       };
-
                        pmx_led_sys_green: pmx-led-sys-green {
                                marvell,pins = "mpp28";
                                marvell,function = "gpio";
                                marvell,function = "gpio";
                        };
 
-                       pmx_btn_reset: pmx-btn-reset {
-                               marvell,pins = "mpp36";
-                               marvell,function = "gpio";
-                       };
-
-                       pmx_btn_copy: pmx-btn-copy {
-                               marvell,pins = "mpp37";
-                               marvell,function = "gpio";
-                       };
-
-                       pmx_led_copy_green: pmx-led-copy-green {
-                               marvell,pins = "mpp39";
-                               marvell,function = "gpio";
-                       };
-
-                       pmx_led_copy_red: pmx-led-copy-red {
-                               marvell,pins = "mpp40";
-                               marvell,function = "gpio";
-                       };
-
                        pmx_led_hdd_green: pmx-led-hdd-green {
                                marvell,pins = "mpp41";
                                marvell,function = "gpio";
                                marvell,function = "gpio";
                        };
 
-                       pmx_btn_power: pmx-btn-power {
-                               marvell,pins = "mpp46";
-                               marvell,function = "gpio";
-                       };
-
                };
 
                i2c@11000 {
                        status = "okay";
 
                        lm85: lm85@2e {
-                               compatible = "lm85";
+                               compatible = "national,lm85";
                                reg = <0x2e>;
                        };
                };
        };
 
-       gpio_keys {
-               compatible = "gpio-keys";
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               button@1 {
-                       label = "Power Button";
-                       linux,code = <KEY_POWER>;
-                       gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
-               };
-               button@2 {
-                       label = "Copy Button";
-                       linux,code = <KEY_COPY>;
-                       gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
-               };
-               button@3 {
-                       label = "Reset Button";
-                       linux,code = <KEY_RESTART>;
-                       gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
-               };
-       };
-
        gpio-leds {
                compatible = "gpio-leds";
 
diff --git a/arch/arm/boot/dts/kirkwood-nsa320.dts b/arch/arm/boot/dts/kirkwood-nsa320.dts
new file mode 100644 (file)
index 0000000..24f686d
--- /dev/null
@@ -0,0 +1,215 @@
+/* Device tree file for the Zyxel NSA 320 NAS box.
+ *
+ * Copyright (c) 2014, Adam Baker <linux@baker-net.org.uk>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ * Based upon the board setup file created by Peter Schildmann */
+
+/dts-v1/;
+
+#include "kirkwood-nsa3x0-common.dtsi"
+
+/ {
+       model = "Zyxel NSA320";
+       compatible = "zyxel,nsa320", "marvell,kirkwood-88f6281", "marvell,kirkwood";
+
+       memory {
+               device_type = "memory";
+               reg = <0x00000000 0x20000000>;
+       };
+
+       chosen {
+               bootargs = "console=ttyS0,115200";
+               stdout-path = &uart0;
+       };
+
+       mbus {
+               pcie-controller {
+                       status = "okay";
+
+                       pcie@1,0 {
+                               status = "okay";
+                       };
+               };
+       };
+
+       ocp@f1000000 {
+               pinctrl: pin-controller@10000 {
+                       pinctrl-names = "default";
+
+                       /* SATA Activity and Present pins are not connected */
+                       pmx_sata0: pmx-sata0 {
+                               marvell,pins ;
+                               marvell,function = "sata0";
+                       };
+
+                       pmx_sata1: pmx-sata1 {
+                               marvell,pins ;
+                               marvell,function = "sata1";
+                       };
+
+                       pmx_led_hdd2_green: pmx-led-hdd2-green {
+                               marvell,pins = "mpp12";
+                               marvell,function = "gpio";
+                       };
+
+                       pmx_led_hdd2_red: pmx-led-hdd2-red {
+                               marvell,pins = "mpp13";
+                               marvell,function = "gpio";
+                       };
+
+                       pmx_mcu_data: pmx-mcu-data {
+                               marvell,pins = "mpp14";
+                               marvell,function = "gpio";
+                       };
+
+                       pmx_led_usb_green: pmx-led-usb-green {
+                               marvell,pins = "mpp15";
+                               marvell,function = "gpio";
+                       };
+
+                       pmx_mcu_clk: pmx-mcu-clk {
+                               marvell,pins = "mpp16";
+                               marvell,function = "gpio";
+                       };
+
+                       pmx_mcu_act: pmx-mcu-act {
+                               marvell,pins = "mpp17";
+                               marvell,function = "gpio";
+                       };
+
+                       pmx_led_sys_green: pmx-led-sys-green {
+                               marvell,pins = "mpp28";
+                               marvell,function = "gpio";
+                       };
+
+                       pmx_led_sys_orange: pmx-led-sys-orange {
+                               marvell,pins = "mpp29";
+                               marvell,function = "gpio";
+                       };
+
+                       pmx_led_hdd1_green: pmx-led-hdd1-green {
+                               marvell,pins = "mpp41";
+                               marvell,function = "gpio";
+                       };
+
+                       pmx_led_hdd1_red: pmx-led-hdd1-red {
+                               marvell,pins = "mpp42";
+                               marvell,function = "gpio";
+                       };
+
+                       pmx_htp: pmx-htp {
+                               marvell,pins = "mpp43";
+                               marvell,function = "gpio";
+                       };
+
+                       /* Buzzer needs to be switched at around 1kHz so is
+                          not compatible with the gpio-beeper driver. */
+                       pmx_buzzer: pmx-buzzer {
+                               marvell,pins = "mpp44";
+                               marvell,function = "gpio";
+                       };
+
+                       pmx_vid_b1: pmx-vid-b1 {
+                               marvell,pins = "mpp45";
+                               marvell,function = "gpio";
+                       };
+
+                       pmx_power_resume_data: pmx-power-resume-data {
+                               marvell,pins = "mpp47";
+                               marvell,function = "gpio";
+                       };
+
+                       pmx_power_resume_clk: pmx-power-resume-clk {
+                               marvell,pins = "mpp49";
+                               marvell,function = "gpio";
+                       };
+               };
+
+               i2c@11000 {
+                       status = "okay";
+
+                       pcf8563: pcf8563@51 {
+                               compatible = "nxp,pcf8563";
+                               reg = <0x51>;
+                       };
+               };
+       };
+
+       regulators {
+               usb0_power: regulator@1 {
+                       enable-active-high;
+               };
+       };
+
+       gpio-leds {
+               compatible = "gpio-leds";
+               pinctrl-0 = <&pmx_led_hdd2_green &pmx_led_hdd2_red
+                            &pmx_led_usb_green
+                            &pmx_led_sys_green &pmx_led_sys_orange
+                            &pmx_led_copy_green &pmx_led_copy_red
+                            &pmx_led_hdd1_green &pmx_led_hdd1_red>;
+               pinctrl-names = "default";
+
+               green-sys {
+                       label = "nsa320:green:sys";
+                       gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
+               };
+               orange-sys {
+                       label = "nsa320:orange:sys";
+                       gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>;
+               };
+               green-hdd1 {
+                       label = "nsa320:green:hdd1";
+                       gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
+               };
+               red-hdd1 {
+                       label = "nsa320:red:hdd1";
+                       gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
+               };
+               green-hdd2 {
+                       label = "nsa320:green:hdd2";
+                       gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
+               };
+               red-hdd2 {
+                       label = "nsa320:red:hdd2";
+                       gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
+               };
+               green-usb {
+                       label = "nsa320:green:usb";
+                       gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
+               };
+               green-copy {
+                       label = "nsa320:green:copy";
+                       gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
+               };
+               red-copy {
+                       label = "nsa320:red:copy";
+                       gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
+               };
+       };
+
+       /* The following pins are currently not assigned to a driver,
+          some of them should be configured as inputs.
+       pinctrl-0 = <&pmx_mcu_data &pmx_mcu_clk &pmx_mcu_act
+                    &pmx_htp &pmx_vid_b1
+                    &pmx_power_resume_data &pmx_power_resume_clk>; */
+};
+
+&mdio {
+       status = "okay";
+       ethphy0: ethernet-phy@1 {
+               reg = <1>;
+       };
+};
+
+&eth0 {
+       status = "okay";
+       ethernet0-port@0 {
+               phy-handle = <&ethphy0>;
+       };
+};
similarity index 58%
rename from arch/arm/boot/dts/kirkwood-nsa310-common.dtsi
rename to arch/arm/boot/dts/kirkwood-nsa3x0-common.dtsi
index aa78c2d11fe738fc843f716bd1a6f98ff1054a5b..9cb083b72404338f9fb0adc3f81c4ed293079047 100644 (file)
@@ -5,17 +5,42 @@
        model = "ZyXEL NSA310";
 
        ocp@f1000000 {
-               pinctrl: pinctrl@10000 {
+               pinctrl: pin-controller@10000 {
 
-                       pmx_usb_power_off: pmx-usb-power-off {
+                       pmx_usb_power: pmx-usb-power {
                                marvell,pins = "mpp21";
                                marvell,function = "gpio";
                        };
+
                        pmx_pwr_off: pmx-pwr-off {
                                marvell,pins = "mpp48";
                                marvell,function = "gpio";
                        };
 
+                       pmx_btn_reset: pmx-btn-reset {
+                               marvell,pins = "mpp36";
+                               marvell,function = "gpio";
+                       };
+
+                       pmx_btn_copy: pmx-btn-copy {
+                               marvell,pins = "mpp37";
+                               marvell,function = "gpio";
+                       };
+
+                       pmx_btn_power: pmx-btn-power {
+                               marvell,pins = "mpp46";
+                               marvell,function = "gpio";
+                       };
+
+                       pmx_led_copy_green: pmx-led-copy-green {
+                               marvell,pins = "mpp39";
+                               marvell,function = "gpio";
+                       };
+
+                       pmx_led_copy_red: pmx-led-copy-red {
+                               marvell,pins = "mpp40";
+                               marvell,function = "gpio";
+                       };
                };
 
                serial@12000 {
                gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>;
        };
 
+       gpio_keys {
+               compatible = "gpio-keys";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               pinctrl-0 = <&pmx_btn_reset &pmx_btn_copy &pmx_btn_power>;
+               pinctrl-names = "default";
+
+               button@1 {
+                       label = "Power Button";
+                       linux,code = <KEY_POWER>;
+                       gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
+               };
+               button@2 {
+                       label = "Copy Button";
+                       linux,code = <KEY_COPY>;
+                       gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
+               };
+               button@3 {
+                       label = "Reset Button";
+                       linux,code = <KEY_RESTART>;
+                       gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
+               };
+       };
+
+
        regulators {
                compatible = "simple-bus";
                #address-cells = <1>;
                #size-cells = <0>;
-               pinctrl-0 = <&pmx_usb_power_off>;
+               pinctrl-0 = <&pmx_usb_power>;
                pinctrl-names = "default";
 
-               usb0_power_off: regulator@1 {
+               usb0_power: regulator@1 {
                        compatible = "regulator-fixed";
                        reg = <1>;
-                       regulator-name = "USB Power Off";
+                       regulator-name = "USB Power";
                        regulator-min-microvolt = <5000000>;
                        regulator-max-microvolt = <5000000>;
                        regulator-always-on;
index b88da9392c32dd93780ead4c80dd8b5e4bf6934a..fb9dc227255d91a2a4bdb58a7adfac3072a80521 100644 (file)
 
        chosen {
                bootargs = "console=ttyS0,115200n8 earlyprintk";
+               stdout-path = &uart0;
        };
 
        ocp@f1000000 {
                serial@12000 {
-                       status = "ok";
-                       pinctrl-0 = <&pmx_uart0>;
-                       pinctrl-names = "default";
+                       status = "okay";
                };
 
                serial@12100 {
-                       status = "ok";
-                       pinctrl-0 = <&pmx_uart1>;
-                       pinctrl-names = "default";
+                       status = "okay";
                };
 
                sata@80000 {
 
                i2c@11100 {
                        status = "okay";
-                       pinctrl-0 = <&pmx_twsi1>;
-                       pinctrl-names = "default";
 
                        s35390a: s35390a@30 {
-                               compatible = "s35390a";
+                               compatible = "sii,s35390a";
                                reg = <0x30>;
                        };
                };
 
-               pinctrl: pinctrl@10000 {
+               pinctrl: pin-controller@10000 {
                        pinctrl-0 = <&pmx_dip_switches &pmx_gpio_header>;
                        pinctrl-names = "default";
 
 &nand {
        chip-delay = <25>;
        status = "okay";
-       pinctrl-0 = <&pmx_nand>;
-       pinctrl-names = "default";
 
        partition@0 {
                label = "uboot";
index b2f7cae0683959f7c75ba82b0a195762d7fd32f4..d5e3bc518968b4acf5e4b811d2944a84d12b79b8 100644 (file)
 
        chosen {
                bootargs = "console=ttyS0,115200n8 earlyprintk";
+               stdout-path = &uart0;
        };
 
        ocp@f1000000 {
                serial@12000 {
-                       status = "ok";
-                       pinctrl-0 = <&pmx_uart0>;
-                       pinctrl-names = "default";
+                       status = "okay";
                };
 
                serial@12100 {
-                       status = "ok";
-                       pinctrl-0 = <&pmx_uart1>;
-                       pinctrl-names = "default";
+                       status = "okay";
                };
 
                sata@80000 {
 
                i2c@11100 {
                        status = "okay";
-                       pinctrl-0 = <&pmx_twsi1>;
-                       pinctrl-names = "default";
 
                        s24c02: s24c02@50 {
-                               compatible = "24c02";
+                               compatible = "atmel,24c02";
                                reg = <0x50>;
                        };
                };
 
-               pinctrl: pinctrl@10000 {
+               pinctrl: pin-controller@10000 {
                        pinctrl-0 = <&pmx_dip_switches &pmx_gpio_header>;
                        pinctrl-names = "default";
 
                                marvell,pins = "mpp41", "mpp42", "mpp43";
                                marvell,function = "gpio";
                        };
-
-                       pmx_ge1: pmx-ge1 {
-                               marvell,pins = "mpp20", "mpp21", "mpp22", "mpp23",
-                                              "mpp24", "mpp25", "mpp26", "mpp27",
-                                              "mpp30", "mpp31", "mpp32", "mpp33";
-                               marvell,function = "ge1";
-                       };
                };
        };
 
 &nand {
        chip-delay = <25>;
        status = "okay";
-       pinctrl-0 = <&pmx_nand>;
-       pinctrl-names = "default";
 
        partition@0 {
                label = "uboot";
 
 &eth1 {
        status = "okay";
-       pinctrl-0 = <&pmx_ge1>;
-       pinctrl-names = "default";
        ethernet1-port@0 {
                phy-handle = <&ethphy1>;
        };
index e9dd850492976ca557d4545f8a18150751afed35..35a29dee8dd864f818c5cacd437a936eb2de0024 100644 (file)
@@ -26,6 +26,7 @@
 
        chosen {
                bootargs = "console=ttyS0,115200n8";
+               stdout-path = &uart0;
        };
 
        mbus {
@@ -39,7 +40,7 @@
        };
 
        ocp@f1000000 {
-               pinctrl: pinctrl@10000 {
+               pinctrl: pin-controller@10000 {
                        pinctrl-0 = <&pmx_usb_power>;
                        pinctrl-names = "default";
 
@@ -56,8 +57,6 @@
 
                spi@10600 {
                        status = "okay";
-                       pinctrl-0 = <&pmx_spi>;
-                       pinctrl-names = "default";
 
                        m25p128@0 {
                                #address-cells = <1>;
index d6368c39102e743ef74465f94a032ef8d94f7e70..26cf0e0ccefd3772f6e194b8102ea751408d3f6f 100644 (file)
@@ -22,6 +22,7 @@
 
        chosen {
                bootargs = "console=ttyS0,115200n8";
+               stdout-path = &uart0;
        };
 
        mbus {
@@ -35,7 +36,7 @@
        };
 
        ocp@f1000000 {
-               pinctrl: pinctrl@10000 {
+               pinctrl: pin-controller@10000 {
                        pinctrl-0 = <&pmx_sdio_cd>;
                        pinctrl-names = "default";
 
index 93ec3d00c6ab90b17ee11bac2fe6bb4cea23312e..3b19f1fd4caca99e687474b92a3a0729a13a1537 100644 (file)
@@ -24,6 +24,7 @@
 
        chosen {
                bootargs = "console=ttyS0,115200n8";
+               stdout-path = &uart0;
        };
 
        gpio-fan-100-15-35-3 {
index 311df4e5aa285e799d63fd06a10c45da1e24f309..921ca49e85a4dadf4cce6dc726e678c3044ef79b 100644 (file)
@@ -24,6 +24,7 @@
 
        chosen {
                bootargs = "console=ttyS0,115200n8";
+               stdout-path = &uart0;
        };
 
        gpio-fan-150-15-18 {
index f90da850bb31bca5f28c20e9f47c8132fd28bceb..02852b0c809f00020c01a7252b3dcc84254ae4ba 100644 (file)
@@ -24,6 +24,7 @@
 
        chosen {
                bootargs = "console=ttyS0,115200n8";
+               stdout-path = &uart0;
        };
 
        gpio-fan-100-15-35-3 {
index 1ff848d570a9a02921122140fd78f02d8759fd86..7196c7f3e1096fc4c42beb74db5ec2160e447ef2 100644 (file)
 
        chosen {
                bootargs = "console=ttyS0,115200n8 earlyprintk";
+               stdout-path = &uart0;
        };
 
        ocp@f1000000 {
-               pinctrl: pinctrl@10000 {
+               pinctrl: pin-controller@10000 {
 
                        pmx_usb_power_enable: pmx-usb-power-enable {
                                marvell,pins = "mpp29";
@@ -44,8 +45,6 @@
                        };
                };
                serial@12000 {
-                       pinctrl-0 = <&pmx_uart0>;
-                       pinctrl-names = "default";
                        status = "okay";
                };
        };
@@ -72,8 +71,6 @@
 };
 
 &nand {
-       pinctrl-0 = <&pmx_nand>;
-       pinctrl-names = "default";
        status = "okay";
 
        partition@0 {
index 4227c974729d003b211f14658ba44e19e70cea6e..811e0971fc588a2cc9f59ddbd8f64d51e38acb14 100644 (file)
@@ -25,7 +25,7 @@
        };
 
        ocp@f1000000 {
-               pinctrl: pinctrl@10000 {
+               pinctrl: pin-controller@10000 {
                        pmx_alarmled_12: pmx-alarmled-12 {
                                marvell,pins = "mpp12";
                                marvell,function = "gpio";
 
                spi@10600 {
                        status = "okay";
-                       pinctrl-0 = <&pmx_spi>;
-                       pinctrl-names = "default";
 
                        m25p80@0 {
                                #address-cells = <1>;
                i2c@11000 {
                        status = "okay";
                        clock-frequency = <400000>;
-                       pinctrl-0 = <&pmx_twsi0>;
-                       pinctrl-names = "default";
 
                        rs5c372: rs5c372@32 {
                                status = "disabled";
 
                serial@12000 {
                        status = "okay";
-                       pinctrl-0 = <&pmx_uart0>;
-                       pinctrl-names = "default";
                };
 
                serial@12100 {
                        status = "okay";
-                       pinctrl-0 = <&pmx_uart1>;
-                       pinctrl-names = "default";
                };
 
                poweroff@12100 {
index 7d1c7677a18f18c3fb1cc00463420545a5b6cb78..610ec0f95858b4691f7c275d8a0d794a27d8863b 100644 (file)
@@ -27,6 +27,7 @@
 
        chosen {
                bootargs = "console=ttyS0,115200n8";
+               stdout-path = &uart0;
        };
 
        mbus {
@@ -40,7 +41,7 @@
        };
 
        ocp@f1000000 {
-               pinctrl: pinctrl@10000 {
+               pinctrl: pin-controller@10000 {
                        pinctrl-0 = <&pmx_i2s &pmx_sysrst>;
                        pinctrl-names = "default";
 
                                marvell,function = "gpio";
                        };
 
-                       /*
-                        * Redefined from kirkwood-6281.dtsi, because
-                        * we don't use SPI CS on MPP0, but on MPP7.
-                        */
                        pmx_spi: pmx-spi {
                                marvell,pins = "mpp1", "mpp2", "mpp3", "mpp7";
                                marvell,function = "spi";
@@ -86,8 +83,6 @@
                };
 
                spi@10600 {
-                       pinctrl-0 = <&pmx_spi>;
-                       pinctrl-names = "default";
                        status = "okay";
 
                        flash@0 {
                        alc5621: alc5621@1a {
                                compatible = "realtek,alc5621";
                                reg = <0x1a>;
+                               #sound-dai-cells = <0>;
+                               add-ctrl = <0x3700>;
+                               jack-det-ctrl = <0x4810>;
                        };
                };
 
                gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
        };
 
+       sound {
+               compatible = "simple-audio-card";
+               simple-audio-card,format = "i2s";
+               simple-audio-card,routing =
+                       "Headphone Jack", "HPL",
+                       "Headphone Jack", "HPR",
+                       "Speaker", "SPKOUT",
+                       "Speaker", "SPKOUTN",
+                       "MIC1", "Mic Jack",
+                       "MIC2", "Mic Jack";
+               simple-audio-card,widgets =
+                       "Headphone", "Headphone Jack",
+                       "Speaker", "Speaker",
+                       "Microphone", "Mic Jack";
+
+               simple-audio-card,mclk-fs = <256>;
+
+               simple-audio-card,cpu {
+                       sound-dai = <&audio>;
+               };
+
+               simple-audio-card,codec {
+                       sound-dai = <&alc5621>;
+               };
+       };
 };
 
 &mdio {
index 5fc817c2cb87379dd3fbe9513dded60ae00c92e8..f5c8c0dd41dc82f7e7671f7713182186b250ec8e 100644 (file)
 
        chosen {
                bootargs = "console=ttyS0,115200n8 earlyprintk";
+               stdout-path = &uart0;
        };
 
        ocp@f1000000 {
-               pinctrl: pinctrl@10000 {
+               pinctrl: pin-controller@10000 {
                        /*
                         * Switch positions
                         *
@@ -85,9 +86,7 @@
                };
 
                serial@12000 {
-                       status = "ok";
-                       pinctrl-0 = <&pmx_uart0>;
-                       pinctrl-names = "default";
+                       status = "okay";
                };
 
                sata@80000 {
@@ -96,9 +95,7 @@
                };
 
                i2c@11000 {
-                       status = "ok";
-                       pinctrl-0 = <&pmx_twsi0>;
-                       pinctrl-names = "default";
+                       status = "okay";
                };
 
                mvsdio@90000 {
 
 &nand {
        status = "okay";
-       pinctrl-0 = <&pmx_nand>;
-       pinctrl-names = "default";
 
        partition@0 {
                label = "u-boot";
index c17ae45e19be3ffc33f500e172e3a6e04c439b10..9767d73f3857f972798f22047e93391290034581 100644 (file)
@@ -6,7 +6,7 @@
 
 / {
        ocp@f1000000 {
-               pinctrl: pinctrl@10000 {
+               pinctrl: pin-controller@10000 {
 
                        pinctrl-0 = <&pmx_ram_size &pmx_board_id>;
                        pinctrl-names = "default";
index 0713d072758a1e22a30b86bf3921cdc806cf6b61..bfc1a32d4e422d5ca25dc8e1def9d0f0f0209fce 100644 (file)
@@ -16,7 +16,7 @@
        };
 
        ocp@f1000000 {
-               pinctrl: pinctrl@10000 {
+               pinctrl: pin-controller@10000 {
 
                        pinctrl-0 = <&pmx_ram_size &pmx_board_id>;
                        pinctrl-names = "default";
index 911f3a8cee23ec0d5d28f07451338147eeb01893..df7f15276575ada26c356e224bb223c63e0b42f8 100644 (file)
@@ -9,6 +9,7 @@
 
        chosen {
                bootargs = "console=ttyS0,115200n8";
+               stdout-path = &uart0;
        };
 
        mbus {
@@ -25,8 +26,6 @@
                i2c@11000 {
                        status = "okay";
                        clock-frequency = <400000>;
-                       pinctrl-0 = <&pmx_twsi0>;
-                       pinctrl-names = "default";
 
                        s35390a: s35390a@30 {
                                compatible = "s35390a";
                        };
                };
                serial@12000 {
-                       clock-frequency = <200000000>;
                        status = "okay";
-                       pinctrl-0 = <&pmx_uart0>;
-                       pinctrl-names = "default";
                };
                serial@12100 {
-                       clock-frequency = <200000000>;
                        status = "okay";
-                       pinctrl-0 = <&pmx_uart1>;
-                       pinctrl-names = "default";
                };
                poweroff@12100 {
                        compatible = "qnap,power-off";
@@ -52,8 +45,6 @@
                };
                spi@10600 {
                        status = "okay";
-                       pinctrl-0 = <&pmx_spi>;
-                       pinctrl-names = "default";
 
                        m25p128@0 {
                                #address-cells = <1>;
index 1a9c624c7a928f9c67bd72e1bb372e61d4a911b0..30ab93bfb1e476d0722bdc17e1eb6b5ca43f353b 100644 (file)
@@ -14,7 +14,7 @@
        compatible = "qnap,ts419", "marvell,kirkwood";
 
        ocp@f1000000 {
-               pinctrl: pinctrl@10000 {
+               pinctrl: pin-controller@10000 {
                        pinctrl-names = "default";
 
                        pmx_USB_copy_button: pmx-USB-copy-button {
index 90384587c27843c563d2c4328ce9411f4c26458b..afc640cd80c5f6c6cf561550e3fb9133beb3d523 100644 (file)
@@ -40,7 +40,7 @@
                pcie-mem-aperture = <0xe0000000 0x10000000>; /* 256 MiB memory space */
                pcie-io-aperture  = <0xf2000000 0x100000>;   /*   1 MiB    I/O space */
 
-               crypto@0301 {
+               cesa: crypto@0301 {
                        compatible = "marvell,orion-crypto";
                        reg = <MBUS_ID(0xf0, 0x01) 0x30000 0x10000>,
                              <MBUS_ID(0x03, 0x01) 0 0x800>;
@@ -61,6 +61,8 @@
                        chip-delay = <25>;
                        /* set partition map and/or chip-delay in board dts */
                        clocks = <&gate_clk 7>;
+                       pinctrl-0 = <&pmx_nand>;
+                       pinctrl-names = "default";
                        status = "disabled";
                };
        };
                #address-cells = <1>;
                #size-cells = <1>;
 
+               pinctrl: pin-controller@10000 {
+                       /* set compatible property in SoC file */
+                       reg = <0x10000 0x20>;
+
+                       pmx_ge1: pmx-ge1 {
+                               marvell,pins = "mpp20", "mpp21", "mpp22", "mpp23",
+                                              "mpp24", "mpp25", "mpp26", "mpp27",
+                                              "mpp30", "mpp31", "mpp32", "mpp33";
+                               marvell,function = "ge1";
+                       };
+
+                       pmx_nand: pmx-nand {
+                               marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
+                                              "mpp4", "mpp5", "mpp18", "mpp19";
+                               marvell,function = "nand";
+                       };
+
+                       /*
+                        * Default SPI0 pinctrl setting with CSn on mpp0,
+                        * overwrite marvell,pins on board level if required.
+                        */
+                       pmx_spi: pmx-spi {
+                               marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3";
+                               marvell,function = "spi";
+                       };
+
+                       pmx_twsi0: pmx-twsi0 {
+                               marvell,pins = "mpp8", "mpp9";
+                               marvell,function = "twsi0";
+                       };
+
+                       /*
+                        * Default UART pinctrl setting without RTS/CTS,
+                        * overwrite marvell,pins on board level if required.
+                        */
+                       pmx_uart0: pmx-uart0 {
+                               marvell,pins = "mpp10", "mpp11";
+                               marvell,function = "uart0";
+                       };
+
+                       pmx_uart1: pmx-uart1 {
+                               marvell,pins = "mpp13", "mpp14";
+                               marvell,function = "uart1";
+                       };
+               };
+
                core_clk: core-clocks@10030 {
                        compatible = "marvell,kirkwood-core-clock";
                        reg = <0x10030 0x4>;
                        #clock-cells = <1>;
                };
 
-               spi@10600 {
+               spi0: spi@10600 {
                        compatible = "marvell,orion-spi";
                        #address-cells = <1>;
                        #size-cells = <0>;
                        interrupts = <23>;
                        reg = <0x10600 0x28>;
                        clocks = <&gate_clk 7>;
+                       pinctrl-0 = <&pmx_spi>;
+                       pinctrl-names = "default";
                        status = "disabled";
                };
 
                        interrupts = <29>;
                        clock-frequency = <100000>;
                        clocks = <&gate_clk 7>;
+                       pinctrl-0 = <&pmx_twsi0>;
+                       pinctrl-names = "default";
                        status = "disabled";
                };
 
-               serial@12000 {
+               uart0: serial@12000 {
                        compatible = "ns16550a";
                        reg = <0x12000 0x100>;
                        reg-shift = <2>;
                        interrupts = <33>;
                        clocks = <&gate_clk 7>;
+                       pinctrl-0 = <&pmx_uart0>;
+                       pinctrl-names = "default";
                        status = "disabled";
                };
 
-               serial@12100 {
+               uart1: serial@12100 {
                        compatible = "ns16550a";
                        reg = <0x12100 0x100>;
                        reg-shift = <2>;
                        interrupts = <34>;
                        clocks = <&gate_clk 7>;
+                       pinctrl-0 = <&pmx_uart1>;
+                       pinctrl-names = "default";
                        status = "disabled";
                };
 
                        reg = <0x20000 0x80>, <0x1500 0x20>;
                };
 
-               system-controller@20000 {
+               sysc: system-controller@20000 {
                        compatible = "marvell,orion-system-controller";
                        reg = <0x20000 0x120>;
                };
                        status = "okay";
                };
 
-               ehci@50000 {
+               usb0: ehci@50000 {
                        compatible = "marvell,orion-ehci";
                        reg = <0x50000 0x1000>;
                        interrupts = <19>;
                        status = "okay";
                };
 
-               xor@60800 {
+               dma0: xor@60800 {
                        compatible = "marvell,orion-xor";
                        reg = <0x60800 0x100
                               0x60A00 0x100>;
                        };
                };
 
-               xor@60900 {
+               dma1: xor@60900 {
                        compatible = "marvell,orion-xor";
                        reg = <0x60900 0x100
                               0x60B00 0x100>;
                        reg = <0x76000 0x4000>;
                        clocks = <&gate_clk 19>;
                        marvell,tx-checksum-limit = <1600>;
+                       pinctrl-0 = <&pmx_ge1>;
+                       pinctrl-names = "default";
                        status = "disabled";
 
                        ethernet1-port@0 {
 
                audio0: audio-controller@a0000 {
                        compatible = "marvell,kirkwood-audio";
+                       #sound-dai-cells = <0>;
                        reg = <0xa0000 0x2210>;
                        interrupts = <24>;
                        clocks = <&gate_clk 9>;
diff --git a/arch/arm/boot/dts/omap3-beagle-xm-ab.dts b/arch/arm/boot/dts/omap3-beagle-xm-ab.dts
new file mode 100644 (file)
index 0000000..7ac3bcf
--- /dev/null
@@ -0,0 +1,16 @@
+/*
+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "omap3-beagle-xm.dts"
+
+/ {
+       /* HS USB Port 2 Power enable was inverted with the xM C */
+       hsusb2_power: hsusb2_power_reg {
+               enable-active-high;
+       };
+};
index bf5a515a324752d8fd36e96fb288b07d3b2f31e1..da402f0fdab4861bf9b775b247cabaac192f8777 100644 (file)
                reg = <0 0 0>; /* CS0, offset 0 */
                nand-bus-width = <16>;
 
-               gpmc,device-nand;
                gpmc,sync-clk-ps = <0>;
                gpmc,cs-on-ns = <0>;
                gpmc,cs-rd-off-ns = <44>;
index 6369d9f43ca23e701197945ccf41483f3d7106b5..cc1dce6978f59323ba7579d66f6b29dd2a9b6d8b 100644 (file)
                /* no elm on omap3 */
 
                gpmc,mux-add-data = <0>;
-               gpmc,device-nand;
                gpmc,device-width = <2>;
                gpmc,wait-pin = <0>;
                gpmc,wait-monitoring-ns = <0>;
index 5e5790f631eba4b5b1085ac64a1c4d5a0f6062c9..acb9019dc437b66321ec7995dc16456678a2e42c 100644 (file)
@@ -74,7 +74,7 @@
        /*
         * XXX: Use a flat representation of the OMAP3 interconnect.
         * The real OMAP interconnect network is quite complex.
-        * Since that will not bring real advantage to represent that in DT for
+        * Since it will not bring real advantage to represent that in DT for
         * the moment, just use a fake OCP bus entry to represent the whole bus
         * hierarchy.
         */
index 27fcac874742894879bb978b8157f213a1c49eb2..649b5cd38b403102e9a6d5ddebf918a3e39ab73e 100644 (file)
@@ -72,7 +72,7 @@
        };
 
        /*
-        * The soc node represents the soc top level view. It is uses for IPs
+        * The soc node represents the soc top level view. It is used for IPs
         * that are not memory mapped in the MPU view or for the MPU itself.
         */
        soc {
@@ -96,7 +96,7 @@
        /*
         * XXX: Use a flat representation of the OMAP4 interconnect.
         * The real OMAP interconnect network is quite complex.
-        * Since that will not bring real advantage to represent that in DT for
+        * Since it will not bring real advantage to represent that in DT for
         * the moment, just use a fake OCP bus entry to represent the whole bus
         * hierarchy.
         */
index 6f3de22fb2660f20a61f2ec4438be6708ab40a6d..f8c9855ce587c15790f79a2f04e0ff02933f463f 100644 (file)
@@ -93,7 +93,7 @@
        };
 
        /*
-        * The soc node represents the soc top level view. It is uses for IPs
+        * The soc node represents the soc top level view. It is used for IPs
         * that are not memory mapped in the MPU view or for the MPU itself.
         */
        soc {
        /*
         * XXX: Use a flat representation of the OMAP3 interconnect.
         * The real OMAP interconnect network is quite complex.
-        * Since that will not bring real advantage to represent that in DT for
+        * Since it will not bring real advantage to represent that in DT for
         * the moment, just use a fake OCP bus entry to represent the whole bus
         * hierarchy.
         */
                                      <0x4a084c00 0x40>;
                                reg-names = "phy_rx", "phy_tx", "pll_ctrl";
                                ctrl-module = <&omap_control_usb3phy>;
+                               clocks = <&usb_phy_cm_clk32k>,
+                                        <&sys_clkin>,
+                                        <&usb_otg_ss_refclk960m>;
+                               clock-names =   "wkupclk",
+                                               "sysclk",
+                                               "refclk";
                                #phy-cells = <0>;
                        };
                };
index 62d0211bd19202a093fde2c45b51faec273c6bfa..82c5ac825386e4d5720d738cab456c2eba3078be 100644 (file)
@@ -55,7 +55,6 @@
                #interrupt-cells = <2>;
                interrupt-controller;
                reg = <0 0xe61c0000 0 0x200>;
-               interrupt-parent = <&gic>;
                interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>,
                             <0 1 IRQ_TYPE_LEVEL_HIGH>,
                             <0 2 IRQ_TYPE_LEVEL_HIGH>,
@@ -95,7 +94,6 @@
                #interrupt-cells = <2>;
                interrupt-controller;
                reg = <0 0xe61c0200 0 0x200>;
-               interrupt-parent = <&gic>;
                interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>,
                             <0 33 IRQ_TYPE_LEVEL_HIGH>,
                             <0 34 IRQ_TYPE_LEVEL_HIGH>,
                dma0: dma-controller@e6700020 {
                        compatible = "renesas,shdma-r8a73a4";
                        reg = <0 0xe6700020 0 0x89e0>;
-                       interrupt-parent = <&gic>;
                        interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH
                                        0 200 IRQ_TYPE_LEVEL_HIGH
                                        0 201 IRQ_TYPE_LEVEL_HIGH
                compatible = "renesas,rcar-thermal";
                reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>,
                         <0 0xe61f0200 0 0x38>, <0 0xe61f0300 0 0x38>;
-               interrupt-parent = <&gic>;
                interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
        };
 
                #size-cells = <0>;
                compatible = "renesas,rmobile-iic";
                reg = <0 0xe6500000 0 0x428>;
-               interrupt-parent = <&gic>;
                interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
                #size-cells = <0>;
                compatible = "renesas,rmobile-iic";
                reg = <0 0xe6510000 0 0x428>;
-               interrupt-parent = <&gic>;
                interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
                #size-cells = <0>;
                compatible = "renesas,rmobile-iic";
                reg = <0 0xe6520000 0 0x428>;
-               interrupt-parent = <&gic>;
                interrupts = <0 176 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
                #size-cells = <0>;
                compatible = "renesas,rmobile-iic";
                reg = <0 0xe6530000 0 0x428>;
-               interrupt-parent = <&gic>;
                interrupts = <0 177 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
                #size-cells = <0>;
                compatible = "renesas,rmobile-iic";
                reg = <0 0xe6540000 0 0x428>;
-               interrupt-parent = <&gic>;
                interrupts = <0 178 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
                #size-cells = <0>;
                compatible = "renesas,rmobile-iic";
                reg = <0 0xe60b0000 0 0x428>;
-               interrupt-parent = <&gic>;
                interrupts = <0 179 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
                #size-cells = <0>;
                compatible = "renesas,rmobile-iic";
                reg = <0 0xe6550000 0 0x428>;
-               interrupt-parent = <&gic>;
                interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
                #size-cells = <0>;
                compatible = "renesas,rmobile-iic";
                reg = <0 0xe6560000 0 0x428>;
-               interrupt-parent = <&gic>;
                interrupts = <0 185 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
                #size-cells = <0>;
                compatible = "renesas,rmobile-iic";
                reg = <0 0xe6570000 0 0x428>;
-               interrupt-parent = <&gic>;
                interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
        mmcif0: mmc@ee200000 {
                compatible = "renesas,sh-mmcif";
                reg = <0 0xee200000 0 0x80>;
-               interrupt-parent = <&gic>;
                interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>;
                reg-io-width = <4>;
                status = "disabled";
        mmcif1: mmc@ee220000 {
                compatible = "renesas,sh-mmcif";
                reg = <0 0xee220000 0 0x80>;
-               interrupt-parent = <&gic>;
                interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>;
                reg-io-width = <4>;
                status = "disabled";
        sdhi0: sd@ee100000 {
                compatible = "renesas,sdhi-r8a73a4";
                reg = <0 0xee100000 0 0x100>;
-               interrupt-parent = <&gic>;
                interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
                cap-sd-highspeed;
                status = "disabled";
        sdhi1: sd@ee120000 {
                compatible = "renesas,sdhi-r8a73a4";
                reg = <0 0xee120000 0 0x100>;
-               interrupt-parent = <&gic>;
                interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>;
                cap-sd-highspeed;
                status = "disabled";
        sdhi2: sd@ee140000 {
                compatible = "renesas,sdhi-r8a73a4";
                reg = <0 0xee140000 0 0x100>;
-               interrupt-parent = <&gic>;
                interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>;
                cap-sd-highspeed;
                status = "disabled";
index 95a849bf921f464fa4e59bcada97d7a048dcd876..486007d7ffe4ee2463560655819146e84708416d 100644 (file)
@@ -11,6 +11,7 @@
 /dts-v1/;
 #include "r8a7740.dtsi"
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/pwm/pwm.h>
 
 
                power-key {
                        gpios = <&pfc 99 GPIO_ACTIVE_LOW>;
-                       linux,code = <116>;
+                       linux,code = <KEY_POWER>;
                        label = "SW3";
                        gpio-key,wakeup;
                };
 
                back-key {
                        gpios = <&pfc 100 GPIO_ACTIVE_LOW>;
-                       linux,code = <158>;
+                       linux,code = <KEY_BACK>;
                        label = "SW4";
                };
 
                menu-key {
                        gpios = <&pfc 97 GPIO_ACTIVE_LOW>;
-                       linux,code = <139>;
+                       linux,code = <KEY_MENU>;
                        label = "SW5";
                };
 
                home-key {
                        gpios = <&pfc 98 GPIO_ACTIVE_LOW>;
-                       linux,code = <102>;
+                       linux,code = <KEY_HOME>;
                        label = "SW6";
                };
        };
                };
        };
 
+       i2c2: i2c@2 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "i2c-gpio";
+               gpios = <&pfc 208 GPIO_ACTIVE_HIGH /* sda */
+                        &pfc 91 GPIO_ACTIVE_HIGH /* scl */
+                       >;
+               i2c-gpio,delay-us = <5>;
+       };
+
        backlight {
                compatible = "pwm-backlight";
                pwms = <&tpu 2 33333 PWM_POLARITY_INVERTED>;
        };
 };
 
+&ether {
+       pinctrl-0 = <&ether_pins>;
+       pinctrl-names = "default";
+
+       phy-handle = <&phy0>;
+       status = "ok";
+
+       phy0: ethernet-phy@0 {
+               reg = <0>;
+       };
+};
+
 &i2c0 {
        status = "okay";
        touchscreen@55 {
        };
 };
 
+&i2c2 {
+       status = "okay";
+       rtc@30 {
+               compatible = "sii,s35390a";
+               reg = <0x30>;
+       };
+};
+
 &pfc {
        pinctrl-0 = <&scifa1_pins>;
        pinctrl-names = "default";
 
+       ether_pins: ether {
+               renesas,groups = "gether_mii", "gether_int";
+               renesas,function = "gether";
+       };
+
        scifa1_pins: serial1 {
                renesas,groups = "scifa1_data";
                renesas,function = "scifa1";
index 8280884bfa596b95d447b11505b775783dc260a2..636251b2afb363aa9b2990a0fe0b6441ec0f11de 100644 (file)
@@ -14,6 +14,7 @@
 
 / {
        compatible = "renesas,r8a7740";
+       interrupt-parent = <&gic>;
 
        cpus {
                #address-cells = <1>;
@@ -28,7 +29,6 @@
        gic: interrupt-controller@c2800000 {
                compatible = "arm,cortex-a9-gic";
                #interrupt-cells = <3>;
-               #address-cells = <1>;
                interrupt-controller;
                reg = <0xc2800000 0x1000>,
                      <0xc2000000 0x1000>;
@@ -49,7 +49,6 @@
                        <0xe6900020 1>,
                        <0xe6900040 1>,
                        <0xe6900060 1>;
-               interrupt-parent = <&gic>;
                interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
                              0 149 IRQ_TYPE_LEVEL_HIGH
                              0 149 IRQ_TYPE_LEVEL_HIGH
@@ -70,7 +69,6 @@
                        <0xe6900024 1>,
                        <0xe6900044 1>,
                        <0xe6900064 1>;
-               interrupt-parent = <&gic>;
                interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
                              0 149 IRQ_TYPE_LEVEL_HIGH
                              0 149 IRQ_TYPE_LEVEL_HIGH
@@ -91,7 +89,6 @@
                        <0xe6900028 1>,
                        <0xe6900048 1>,
                        <0xe6900068 1>;
-               interrupt-parent = <&gic>;
                interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
                              0 149 IRQ_TYPE_LEVEL_HIGH
                              0 149 IRQ_TYPE_LEVEL_HIGH
                        <0xe690002c 1>,
                        <0xe690004c 1>,
                        <0xe690006c 1>;
-               interrupt-parent = <&gic>;
                interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
                              0 149 IRQ_TYPE_LEVEL_HIGH
                              0 149 IRQ_TYPE_LEVEL_HIGH
                              0 149 IRQ_TYPE_LEVEL_HIGH>;
        };
 
+       ether: ethernet@e9a00000 {
+               compatible = "renesas,gether-r8a7740";
+               reg = <0xe9a00000 0x800>,
+                     <0xe9a01800 0x800>;
+               interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
+               /* clocks = <&mstp3_clks R8A7740_CLK_GETHER>; */
+               phy-mode = "mii";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+       };
+
        i2c0: i2c@fff20000 {
                #address-cells = <1>;
                #size-cells = <0>;
-               compatible = "renesas,rmobile-iic";
+               compatible = "renesas,iic-r8a7740", "renesas,rmobile-iic";
                reg = <0xfff20000 0x425>;
-               interrupt-parent = <&gic>;
                interrupts = <0 201 IRQ_TYPE_LEVEL_HIGH
                              0 202 IRQ_TYPE_LEVEL_HIGH
                              0 203 IRQ_TYPE_LEVEL_HIGH
        i2c1: i2c@e6c20000 {
                #address-cells = <1>;
                #size-cells = <0>;
-               compatible = "renesas,rmobile-iic";
+               compatible = "renesas,iic-r8a7740", "renesas,rmobile-iic";
                reg = <0xe6c20000 0x425>;
-               interrupt-parent = <&gic>;
                interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH
                              0 71 IRQ_TYPE_LEVEL_HIGH
                              0 72 IRQ_TYPE_LEVEL_HIGH
        };
 
        mmcif0: mmc@e6bd0000 {
-               compatible = "renesas,sh-mmcif";
+               compatible = "renesas,mmcif-r8a7740", "renesas,sh-mmcif";
                reg = <0xe6bd0000 0x100>;
-               interrupt-parent = <&gic>;
                interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH
                              0 57 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        sdhi0: sd@e6850000 {
                compatible = "renesas,sdhi-r8a7740";
                reg = <0xe6850000 0x100>;
-               interrupt-parent = <&gic>;
                interrupts = <0 117 IRQ_TYPE_LEVEL_HIGH
                              0 118 IRQ_TYPE_LEVEL_HIGH
                              0 119 IRQ_TYPE_LEVEL_HIGH>;
        sdhi1: sd@e6860000 {
                compatible = "renesas,sdhi-r8a7740";
                reg = <0xe6860000 0x100>;
-               interrupt-parent = <&gic>;
                interrupts = <0 121 IRQ_TYPE_LEVEL_HIGH
                              0 122 IRQ_TYPE_LEVEL_HIGH
                              0 123 IRQ_TYPE_LEVEL_HIGH>;
        sdhi2: sd@e6870000 {
                compatible = "renesas,sdhi-r8a7740";
                reg = <0xe6870000 0x100>;
-               interrupt-parent = <&gic>;
                interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH
                              0 126 IRQ_TYPE_LEVEL_HIGH
                              0 127 IRQ_TYPE_LEVEL_HIGH>;
 
        sh_fsi2: sound@fe1f0000 {
                #sound-dai-cells = <1>;
-               compatible = "renesas,sh_fsi2";
+               compatible = "renesas,fsi2-r8a7740", "renesas,sh_fsi2";
                reg = <0xfe1f0000 0x400>;
-               interrupt-parent = <&gic>;
                interrupts = <0 9 0x4>;
                status = "disabled";
        };
index 06cda19dac6a6dccef649109ca17eb4528327dc7..f76f6ec01e194c669ef0bcc055e78b20d602086a 100644 (file)
        pinctrl-0 = <&hspi0_pins>;
        pinctrl-names = "default";
        status = "okay";
+
+       flash: flash@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "spansion,s25fl008k";
+               reg = <0>;
+               spi-max-frequency = <104000000>;
+               m25p,fast-read;
+
+               partition@0 {
+                       label = "data(spi)";
+                       reg = <0x00000000 0x00100000>;
+               };
+       };
 };
index 85c5b3b99f5e3b87485f193750e8150815ff9e17..3af0a2187493101f142a2739bbec15172b0449b9 100644 (file)
@@ -20,6 +20,7 @@
 
 / {
        compatible = "renesas,r8a7778";
+       interrupt-parent = <&gic>;
 
        cpus {
                cpu@0 {
@@ -52,7 +53,6 @@
                        <0xfe780024 4>,
                        <0xfe780044 4>,
                        <0xfe780064 4>;
-               interrupt-parent = <&gic>;
                interrupts =   <0 27 IRQ_TYPE_LEVEL_HIGH
                                0 28 IRQ_TYPE_LEVEL_HIGH
                                0 29 IRQ_TYPE_LEVEL_HIGH
@@ -63,7 +63,6 @@
        gpio0: gpio@ffc40000 {
                compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
                reg = <0xffc40000 0x2c>;
-               interrupt-parent = <&gic>;
                interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
                #gpio-cells = <2>;
                gpio-controller;
@@ -75,7 +74,6 @@
        gpio1: gpio@ffc41000 {
                compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
                reg = <0xffc41000 0x2c>;
-               interrupt-parent = <&gic>;
                interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
                #gpio-cells = <2>;
                gpio-controller;
@@ -87,7 +85,6 @@
        gpio2: gpio@ffc42000 {
                compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
                reg = <0xffc42000 0x2c>;
-               interrupt-parent = <&gic>;
                interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
                #gpio-cells = <2>;
                gpio-controller;
@@ -99,7 +96,6 @@
        gpio3: gpio@ffc43000 {
                compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
                reg = <0xffc43000 0x2c>;
-               interrupt-parent = <&gic>;
                interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
                #gpio-cells = <2>;
                gpio-controller;
        gpio4: gpio@ffc44000 {
                compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
                reg = <0xffc44000 0x2c>;
-               interrupt-parent = <&gic>;
                interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
                #gpio-cells = <2>;
                gpio-controller;
                #size-cells = <0>;
                compatible = "renesas,i2c-r8a7778";
                reg = <0xffc70000 0x1000>;
-               interrupt-parent = <&gic>;
                interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
                #size-cells = <0>;
                compatible = "renesas,i2c-r8a7778";
                reg = <0xffc71000 0x1000>;
-               interrupt-parent = <&gic>;
                interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
                #size-cells = <0>;
                compatible = "renesas,i2c-r8a7778";
                reg = <0xffc72000 0x1000>;
-               interrupt-parent = <&gic>;
                interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
                #size-cells = <0>;
                compatible = "renesas,i2c-r8a7778";
                reg = <0xffc73000 0x1000>;
-               interrupt-parent = <&gic>;
                interrupts = <0 77 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
        mmcif: mmc@ffe4e000 {
                compatible = "renesas,sh-mmcif";
                reg = <0xffe4e000 0x100>;
-               interrupt-parent = <&gic>;
                interrupts = <0 61 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
        sdhi0: sd@ffe4c000 {
                compatible = "renesas,sdhi-r8a7778";
                reg = <0xffe4c000 0x100>;
-               interrupt-parent = <&gic>;
                interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>;
                cap-sd-highspeed;
                cap-sdio-irq;
        sdhi1: sd@ffe4d000 {
                compatible = "renesas,sdhi-r8a7778";
                reg = <0xffe4d000 0x100>;
-               interrupt-parent = <&gic>;
                interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>;
                cap-sd-highspeed;
                cap-sdio-irq;
        sdhi2: sd@ffe4f000 {
                compatible = "renesas,sdhi-r8a7778";
                reg = <0xffe4f000 0x100>;
-               interrupt-parent = <&gic>;
                interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
                cap-sd-highspeed;
                cap-sdio-irq;
        };
 
        hspi0: spi@fffc7000 {
-               compatible = "renesas,hspi";
+               compatible = "renesas,hspi-r8a7778", "renesas,hspi";
                reg = <0xfffc7000 0x18>;
-               interrupt-controller = <&gic>;
                interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
                status = "disabled";
        };
 
        hspi1: spi@fffc8000 {
-               compatible = "renesas,hspi";
+               compatible = "renesas,hspi-r8a7778", "renesas,hspi";
                reg = <0xfffc8000 0x18>;
-               interrupt-controller = <&gic>;
                interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
                status = "disabled";
        };
 
        hspi2: spi@fffc6000 {
-               compatible = "renesas,hspi";
+               compatible = "renesas,hspi-r8a7778", "renesas,hspi";
                reg = <0xfffc6000 0x18>;
-               interrupt-controller = <&gic>;
                interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
                status = "disabled";
        };
 };
index 76f5eef7d1cce9055587164f5a157a48ec66956a..b27c6373ff4d028b69c310f882d986ec57f8baf6 100644 (file)
@@ -45,6 +45,7 @@
                phy-mode = "mii";
                interrupt-parent = <&irqpin0>;
                interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
+               smsc,irq-push-pull;
                reg-io-width = <4>;
                vddvario-supply = <&fixedregulator3v3>;
                vdd33a-supply = <&fixedregulator3v3>;
index d0561d4c7c466056096969331d467f6196b9ff63..b517c8e6b42094c5637a1aae27a4eec4a0f83b82 100644 (file)
@@ -15,6 +15,7 @@
 
 / {
        compatible = "renesas,r8a7779";
+       interrupt-parent = <&gic>;
 
        cpus {
                #address-cells = <1>;
@@ -59,7 +60,6 @@
        gpio0: gpio@ffc40000 {
                compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
                reg = <0xffc40000 0x2c>;
-               interrupt-parent = <&gic>;
                interrupts = <0 141 IRQ_TYPE_LEVEL_HIGH>;
                #gpio-cells = <2>;
                gpio-controller;
@@ -71,7 +71,6 @@
        gpio1: gpio@ffc41000 {
                compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
                reg = <0xffc41000 0x2c>;
-               interrupt-parent = <&gic>;
                interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>;
                #gpio-cells = <2>;
                gpio-controller;
@@ -83,7 +82,6 @@
        gpio2: gpio@ffc42000 {
                compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
                reg = <0xffc42000 0x2c>;
-               interrupt-parent = <&gic>;
                interrupts = <0 143 IRQ_TYPE_LEVEL_HIGH>;
                #gpio-cells = <2>;
                gpio-controller;
@@ -95,7 +93,6 @@
        gpio3: gpio@ffc43000 {
                compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
                reg = <0xffc43000 0x2c>;
-               interrupt-parent = <&gic>;
                interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>;
                #gpio-cells = <2>;
                gpio-controller;
        gpio4: gpio@ffc44000 {
                compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
                reg = <0xffc44000 0x2c>;
-               interrupt-parent = <&gic>;
                interrupts = <0 145 IRQ_TYPE_LEVEL_HIGH>;
                #gpio-cells = <2>;
                gpio-controller;
        gpio5: gpio@ffc45000 {
                compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
                reg = <0xffc45000 0x2c>;
-               interrupt-parent = <&gic>;
                interrupts = <0 146 IRQ_TYPE_LEVEL_HIGH>;
                #gpio-cells = <2>;
                gpio-controller;
        gpio6: gpio@ffc46000 {
                compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
                reg = <0xffc46000 0x2c>;
-               interrupt-parent = <&gic>;
                interrupts = <0 147 IRQ_TYPE_LEVEL_HIGH>;
                #gpio-cells = <2>;
                gpio-controller;
                        <0xfe780024 4>,
                        <0xfe780044 4>,
                        <0xfe780064 4>;
-               interrupt-parent = <&gic>;
                interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH
                              0 28 IRQ_TYPE_LEVEL_HIGH
                              0 29 IRQ_TYPE_LEVEL_HIGH
                #size-cells = <0>;
                compatible = "renesas,i2c-r8a7779";
                reg = <0xffc70000 0x1000>;
-               interrupt-parent = <&gic>;
                interrupts = <0 79 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
                #size-cells = <0>;
                compatible = "renesas,i2c-r8a7779";
                reg = <0xffc71000 0x1000>;
-               interrupt-parent = <&gic>;
                interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
                #size-cells = <0>;
                compatible = "renesas,i2c-r8a7779";
                reg = <0xffc72000 0x1000>;
-               interrupt-parent = <&gic>;
                interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
                #size-cells = <0>;
                compatible = "renesas,i2c-r8a7779";
                reg = <0xffc73000 0x1000>;
-               interrupt-parent = <&gic>;
                interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
        sata: sata@fc600000 {
                compatible = "renesas,rcar-sata";
                reg = <0xfc600000 0x2000>;
-               interrupt-parent = <&gic>;
                interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>;
        };
 
        sdhi0: sd@ffe4c000 {
                compatible = "renesas,sdhi-r8a7779";
                reg = <0xffe4c000 0x100>;
-               interrupt-parent = <&gic>;
                interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH>;
                cap-sd-highspeed;
                cap-sdio-irq;
        sdhi1: sd@ffe4d000 {
                compatible = "renesas,sdhi-r8a7779";
                reg = <0xffe4d000 0x100>;
-               interrupt-parent = <&gic>;
                interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>;
                cap-sd-highspeed;
                cap-sdio-irq;
        sdhi2: sd@ffe4e000 {
                compatible = "renesas,sdhi-r8a7779";
                reg = <0xffe4e000 0x100>;
-               interrupt-parent = <&gic>;
                interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
                cap-sd-highspeed;
                cap-sdio-irq;
        sdhi3: sd@ffe4f000 {
                compatible = "renesas,sdhi-r8a7779";
                reg = <0xffe4f000 0x100>;
-               interrupt-parent = <&gic>;
                interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
                cap-sd-highspeed;
                cap-sdio-irq;
        };
 
        hspi0: spi@fffc7000 {
-               compatible = "renesas,hspi";
+               compatible = "renesas,hspi-r8a7779", "renesas,hspi";
                reg = <0xfffc7000 0x18>;
-               interrupt-controller = <&gic>;
                interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
                status = "disabled";
        };
 
        hspi1: spi@fffc8000 {
-               compatible = "renesas,hspi";
+               compatible = "renesas,hspi-r8a7779", "renesas,hspi";
                reg = <0xfffc8000 0x18>;
-               interrupt-controller = <&gic>;
                interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
                status = "disabled";
        };
 
        hspi2: spi@fffc6000 {
-               compatible = "renesas,hspi";
+               compatible = "renesas,hspi-r8a7779", "renesas,hspi";
                reg = <0xfffc6000 0x18>;
-               interrupt-controller = <&gic>;
                interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
                status = "disabled";
        };
 };
index 6e99eb2df076d7f1c7cdfdac46733c968256c0dd..86d676f629429ab3c304111fcdd987e91fca0c9a 100644 (file)
@@ -12,6 +12,7 @@
 /dts-v1/;
 #include "r8a7790.dtsi"
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
 
 / {
        model = "Lager";
                #size-cells = <1>;
        };
 
+       gpio_keys {
+               compatible = "gpio-keys";
+
+               button@1 {
+                       linux,code = <KEY_1>;
+                       label = "SW2-1";
+                       gpio-key,wakeup;
+                       debounce-interval = <20>;
+                       gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
+               };
+               button@2 {
+                       linux,code = <KEY_2>;
+                       label = "SW2-2";
+                       gpio-key,wakeup;
+                       debounce-interval = <20>;
+                       gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
+               };
+               button@3 {
+                       linux,code = <KEY_3>;
+                       label = "SW2-3";
+                       gpio-key,wakeup;
+                       debounce-interval = <20>;
+                       gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
+               };
+               button@4 {
+                       linux,code = <KEY_4>;
+                       label = "SW2-4";
+                       gpio-key,wakeup;
+                       debounce-interval = <20>;
+                       gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
+               };
+       };
+
        leds {
                compatible = "gpio-leds";
                led6 {
        };
 
        sdhi0_pins: sd0 {
-               renesas,gpios = "sdhi0_data4", "sdhi0_ctrl";
+               renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
                renesas,function = "sdhi0";
        };
 
        sdhi2_pins: sd2 {
-               renesas,gpios = "sdhi2_data4", "sdhi2_ctrl";
+               renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
                renesas,function = "sdhi2";
        };
 
                renesas,function = "mmc1";
        };
 
-       qspi_pins: spi {
+       qspi_pins: spi0 {
                renesas,groups = "qspi_ctrl", "qspi_data4";
                renesas,function = "qspi";
        };
+
+       msiof1_pins: spi2 {
+               renesas,groups = "msiof1_clk", "msiof1_sync", "msiof1_rx",
+                                "msiof1_tx";
+               renesas,function = "msiof1";
+       };
 };
 
 &ether {
                reg = <1>;
                interrupt-parent = <&irqc0>;
                interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+               micrel,led-mode = <1>;
        };
 };
 
        status = "okay";
 };
 
-&spi {
+&qspi {
        pinctrl-0 = <&qspi_pins>;
        pinctrl-names = "default";
 
                compatible = "spansion,s25fl512s";
                reg = <0>;
                spi-max-frequency = <30000000>;
+               spi-tx-bus-width = <4>;
+               spi-rx-bus-width = <4>;
                m25p,fast-read;
 
                partition@0 {
        };
 };
 
+&msiof1 {
+       pinctrl-0 = <&msiof1_pins>;
+       pinctrl-names = "default";
+
+       status = "okay";
+
+       pmic: pmic@0 {
+               compatible = "renesas,r2a11302ft";
+               reg = <0>;
+               spi-max-frequency = <6000000>;
+               spi-cpol;
+               spi-cpha;
+       };
+
+};
+
 &sdhi0 {
        pinctrl-0 = <&sdhi0_pins>;
        pinctrl-names = "default";
index 618e5b537eaf9deb5efbe34ee7f917f8ea95990b..e6130d6ff28eed65e1fed6ed9551085a24924526 100644 (file)
                i2c1 = &i2c1;
                i2c2 = &i2c2;
                i2c3 = &i2c3;
+               i2c4 = &iic0;
+               i2c5 = &iic1;
+               i2c6 = &iic2;
+               i2c7 = &iic3;
+               spi0 = &qspi;
+               spi1 = &msiof0;
+               spi2 = &msiof1;
+               spi3 = &msiof2;
+               spi4 = &msiof3;
        };
 
        cpus {
                gpio-ranges = <&pfc 0 0 32>;
                #interrupt-cells = <2>;
                interrupt-controller;
+               clocks = <&mstp9_clks R8A7790_CLK_GPIO0>;
        };
 
        gpio1: gpio@e6051000 {
                gpio-ranges = <&pfc 0 32 32>;
                #interrupt-cells = <2>;
                interrupt-controller;
+               clocks = <&mstp9_clks R8A7790_CLK_GPIO1>;
        };
 
        gpio2: gpio@e6052000 {
                gpio-ranges = <&pfc 0 64 32>;
                #interrupt-cells = <2>;
                interrupt-controller;
+               clocks = <&mstp9_clks R8A7790_CLK_GPIO2>;
        };
 
        gpio3: gpio@e6053000 {
                gpio-ranges = <&pfc 0 96 32>;
                #interrupt-cells = <2>;
                interrupt-controller;
+               clocks = <&mstp9_clks R8A7790_CLK_GPIO3>;
        };
 
        gpio4: gpio@e6054000 {
                gpio-ranges = <&pfc 0 128 32>;
                #interrupt-cells = <2>;
                interrupt-controller;
+               clocks = <&mstp9_clks R8A7790_CLK_GPIO4>;
        };
 
        gpio5: gpio@e6055000 {
                gpio-ranges = <&pfc 0 160 32>;
                #interrupt-cells = <2>;
                interrupt-controller;
+               clocks = <&mstp9_clks R8A7790_CLK_GPIO5>;
        };
 
        thermal@e61f0000 {
                status = "disabled";
        };
 
+       iic0: i2c@e6500000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
+               reg = <0 0xe6500000 0 0x425>;
+               interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp3_clks R8A7790_CLK_IIC0>;
+               status = "disabled";
+       };
+
+       iic1: i2c@e6510000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
+               reg = <0 0xe6510000 0 0x425>;
+               interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp3_clks R8A7790_CLK_IIC1>;
+               status = "disabled";
+       };
+
+       iic2: i2c@e6520000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
+               reg = <0 0xe6520000 0 0x425>;
+               interrupts = <0 176 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp3_clks R8A7790_CLK_IIC2>;
+               status = "disabled";
+       };
+
+       iic3: i2c@e60b0000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
+               reg = <0 0xe60b0000 0 0x425>;
+               interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp9_clks R8A7790_CLK_IICDVFS>;
+               status = "disabled";
+       };
+
        mmcif0: mmcif@ee200000 {
                compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
                reg = <0 0xee200000 0 0x80>;
                mstp3_clks: mstp3_clks@e615013c {
                        compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
                        reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
-                       clocks = <&cp_clk>, <&mmc1_clk>, <&sd3_clk>, <&sd2_clk>,
-                                <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>,
-                                <&mmc0_clk>, <&rclk_clk>;
+                       clocks = <&hp_clk>, <&cp_clk>, <&mmc1_clk>, <&sd3_clk>,
+                                <&sd2_clk>, <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>, <&mmc0_clk>,
+                                <&hp_clk>, <&hp_clk>, <&rclk_clk>;
                        #clock-cells = <1>;
                        renesas,clock-indices = <
-                               R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3
-                               R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0
-                               R8A7790_CLK_MMCIF0 R8A7790_CLK_CMT1
+                               R8A7790_CLK_IIC2 R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3
+                               R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0 R8A7790_CLK_MMCIF0
+                               R8A7790_CLK_IIC0 R8A7790_CLK_IIC1 R8A7790_CLK_CMT1
                        >;
                        clock-output-names =
-                               "tpu0", "mmcif1", "sdhi3", "sdhi2",
-                               "sdhi1", "sdhi0", "mmcif0", "cmt1";
+                               "iic2", "tpu0", "mmcif1", "sdhi3",
+                               "sdhi2", "sdhi1", "sdhi0", "mmcif0",
+                               "iic0", "iic1", "cmt1";
                };
                mstp5_clks: mstp5_clks@e6150144 {
                        compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
                mstp9_clks: mstp9_clks@e6150994 {
                        compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
                        reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
-                       clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>,
-                                <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>;
+                       clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>,
+                                <&cp_clk>, <&cp_clk>, <&cp_clk>,
+                                <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>, <&cp_clk>,
+                                <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>;
                        #clock-cells = <1>;
                        renesas,clock-indices = <
-                               R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_QSPI_MOD
-                               R8A7790_CLK_I2C3 R8A7790_CLK_I2C2 R8A7790_CLK_I2C1
-                               R8A7790_CLK_I2C0
+                               R8A7790_CLK_GPIO5 R8A7790_CLK_GPIO4 R8A7790_CLK_GPIO3
+                               R8A7790_CLK_GPIO2 R8A7790_CLK_GPIO1 R8A7790_CLK_GPIO0
+                               R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_QSPI_MOD R8A7790_CLK_IICDVFS
+                               R8A7790_CLK_I2C3 R8A7790_CLK_I2C2 R8A7790_CLK_I2C1 R8A7790_CLK_I2C0
                        >;
                        clock-output-names =
-                               "rcan1", "rcan0", "qspi_mod", "i2c3", "i2c2", "i2c1", "i2c0";
+                               "gpio5", "gpio4", "gpio3", "gpio2", "gpio1", "gpio0",
+                               "rcan1", "rcan0", "qspi_mod", "iic3",
+                               "i2c3", "i2c2", "i2c1", "i2c0";
                };
        };
 
-       spi: spi@e6b10000 {
+       qspi: spi@e6b10000 {
                compatible = "renesas,qspi-r8a7790", "renesas,qspi";
                reg = <0 0xe6b10000 0 0x2c>;
                interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
                #size-cells = <0>;
                status = "disabled";
        };
+
+       msiof0: spi@e6e20000 {
+               compatible = "renesas,msiof-r8a7790";
+               reg = <0 0xe6e20000 0 0x0064>;
+               interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp0_clks R8A7790_CLK_MSIOF0>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+       };
+
+       msiof1: spi@e6e10000 {
+               compatible = "renesas,msiof-r8a7790";
+               reg = <0 0xe6e10000 0 0x0064>;
+               interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp2_clks R8A7790_CLK_MSIOF1>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+       };
+
+       msiof2: spi@e6e00000 {
+               compatible = "renesas,msiof-r8a7790";
+               reg = <0 0xe6e00000 0 0x0064>;
+               interrupts = <0 158 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp2_clks R8A7790_CLK_MSIOF2>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+       };
+
+       msiof3: spi@e6c90000 {
+               compatible = "renesas,msiof-r8a7790";
+               reg = <0 0xe6c90000 0 0x0064>;
+               interrupts = <0 159 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp2_clks R8A7790_CLK_MSIOF3>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+       };
 };
diff --git a/arch/arm/boot/dts/r8a7791-henninger.dts b/arch/arm/boot/dts/r8a7791-henninger.dts
new file mode 100644 (file)
index 0000000..cc6d992
--- /dev/null
@@ -0,0 +1,219 @@
+/*
+ * Device Tree Source for the Henninger board
+ *
+ * Copyright (C) 2014 Renesas Solutions Corp.
+ * Copyright (C) 2014 Cogent Embedded, Inc.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2.  This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/dts-v1/;
+#include "r8a7791.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+       model = "Henninger";
+       compatible = "renesas,henninger", "renesas,r8a7791";
+
+       aliases {
+               serial0 = &scif0;
+       };
+
+       chosen {
+               bootargs = "console=ttySC0,38400 ignore_loglevel rw root=/dev/nfs ip=dhcp";
+       };
+
+       memory@40000000 {
+               device_type = "memory";
+               reg = <0 0x40000000 0 0x40000000>;
+       };
+
+       memory@200000000 {
+               device_type = "memory";
+               reg = <2 0x00000000 0 0x40000000>;
+       };
+
+       vcc_sdhi0: regulator@0 {
+               compatible = "regulator-fixed";
+
+               regulator-name = "SDHI0 Vcc";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-always-on;
+       };
+
+       vccq_sdhi0: regulator@1 {
+               compatible = "regulator-gpio";
+
+               regulator-name = "SDHI0 VccQ";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <3300000>;
+
+               gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
+               gpios-states = <1>;
+               states = <3300000 1
+                         1800000 0>;
+       };
+
+       vcc_sdhi2: regulator@2 {
+               compatible = "regulator-fixed";
+
+               regulator-name = "SDHI2 Vcc";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-always-on;
+       };
+
+       vccq_sdhi2: regulator@3 {
+               compatible = "regulator-gpio";
+
+               regulator-name = "SDHI2 VccQ";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <3300000>;
+
+               gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
+               gpios-states = <1>;
+               states = <3300000 1
+                         1800000 0>;
+       };
+};
+
+&extal_clk {
+       clock-frequency = <20000000>;
+};
+
+&pfc {
+       scif0_pins: serial0 {
+               renesas,groups = "scif0_data_d";
+               renesas,function = "scif0";
+       };
+
+       ether_pins: ether {
+               renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
+               renesas,function = "eth";
+       };
+
+       phy1_pins: phy1 {
+               renesas,groups = "intc_irq0";
+               renesas,function = "intc";
+       };
+
+       sdhi0_pins: sd0 {
+               renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
+               renesas,function = "sdhi0";
+       };
+
+       sdhi2_pins: sd2 {
+               renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
+               renesas,function = "sdhi2";
+       };
+
+       qspi_pins: spi0 {
+               renesas,groups = "qspi_ctrl", "qspi_data4";
+               renesas,function = "qspi";
+       };
+
+       msiof0_pins: spi1 {
+               renesas,groups = "msiof0_clk", "msiof0_sync", "msiof0_rx",
+                                "msiof0_tx";
+               renesas,function = "msiof0";
+       };
+};
+
+&scif0 {
+       pinctrl-0 = <&scif0_pins>;
+       pinctrl-names = "default";
+
+       status = "okay";
+};
+
+&ether {
+       pinctrl-0 = <&ether_pins &phy1_pins>;
+       pinctrl-names = "default";
+
+       phy-handle = <&phy1>;
+       renesas,ether-link-active-low;
+       status = "ok";
+
+       phy1: ethernet-phy@1 {
+               reg = <1>;
+               interrupt-parent = <&irqc0>;
+               interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+               micrel,led-mode = <1>;
+       };
+};
+
+&sata0 {
+       status = "okay";
+};
+
+&sdhi0 {
+       pinctrl-0 = <&sdhi0_pins>;
+       pinctrl-names = "default";
+
+       vmmc-supply = <&vcc_sdhi0>;
+       vqmmc-supply = <&vccq_sdhi0>;
+       cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
+       wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
+       status = "okay";
+};
+
+&sdhi2 {
+       pinctrl-0 = <&sdhi2_pins>;
+       pinctrl-names = "default";
+
+       vmmc-supply = <&vcc_sdhi2>;
+       vqmmc-supply = <&vccq_sdhi2>;
+       cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>;
+       status = "okay";
+};
+
+&qspi {
+       pinctrl-0 = <&qspi_pins>;
+       pinctrl-names = "default";
+
+       status = "okay";
+
+       flash@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "spansion,s25fl512s";
+               reg = <0>;
+               spi-max-frequency = <30000000>;
+               spi-tx-bus-width = <4>;
+               spi-rx-bus-width = <4>;
+               m25p,fast-read;
+
+               partition@0 {
+                       label = "loader_prg";
+                       reg = <0x00000000 0x00040000>;
+                       read-only;
+               };
+               partition@40000 {
+                       label = "user_prg";
+                       reg = <0x00040000 0x00400000>;
+                       read-only;
+               };
+               partition@440000 {
+                       label = "flash_fs";
+                       reg = <0x00440000 0x03bc0000>;
+               };
+       };
+};
+
+&msiof0 {
+       pinctrl-0 = <&msiof0_pins>;
+       pinctrl-names = "default";
+
+       status = "okay";
+
+       pmic@0 {
+               compatible = "renesas,r2a11302ft";
+               reg = <0>;
+               spi-max-frequency = <6000000>;
+               spi-cpol;
+               spi-cpha;
+       };
+};
index bdd73e6657b27a76ee2d2f7c37abdced267b96ae..0d69813def859eb1d235576acc565e9269a8e5d6 100644 (file)
@@ -13,6 +13,7 @@
 /dts-v1/;
 #include "r8a7791.dtsi"
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
 
 / {
        model = "Koelsch";
        gpio-keys {
                compatible = "gpio-keys";
 
+               key-1 {
+                       gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_1>;
+                       label = "SW2-1";
+                       gpio-key,wakeup;
+                       debounce-interval = <20>;
+               };
+               key-2 {
+                       gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_2>;
+                       label = "SW2-2";
+                       gpio-key,wakeup;
+                       debounce-interval = <20>;
+               };
+               key-3 {
+                       gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_3>;
+                       label = "SW2-3";
+                       gpio-key,wakeup;
+                       debounce-interval = <20>;
+               };
+               key-4 {
+                       gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_4>;
+                       label = "SW2-4";
+                       gpio-key,wakeup;
+                       debounce-interval = <20>;
+               };
                key-a {
                        gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
-                       linux,code = <30>;
+                       linux,code = <KEY_A>;
                        label = "SW30";
                        gpio-key,wakeup;
                        debounce-interval = <20>;
                };
                key-b {
                        gpios = <&gpio7 1 GPIO_ACTIVE_LOW>;
-                       linux,code = <48>;
+                       linux,code = <KEY_B>;
                        label = "SW31";
                        gpio-key,wakeup;
                        debounce-interval = <20>;
                };
                key-c {
                        gpios = <&gpio7 2 GPIO_ACTIVE_LOW>;
-                       linux,code = <46>;
+                       linux,code = <KEY_C>;
                        label = "SW32";
                        gpio-key,wakeup;
                        debounce-interval = <20>;
                };
                key-d {
                        gpios = <&gpio7 3 GPIO_ACTIVE_LOW>;
-                       linux,code = <32>;
+                       linux,code = <KEY_D>;
                        label = "SW33";
                        gpio-key,wakeup;
                        debounce-interval = <20>;
                };
                key-e {
                        gpios = <&gpio7 4 GPIO_ACTIVE_LOW>;
-                       linux,code = <18>;
+                       linux,code = <KEY_E>;
                        label = "SW34";
                        gpio-key,wakeup;
                        debounce-interval = <20>;
                };
                key-f {
                        gpios = <&gpio7 5 GPIO_ACTIVE_LOW>;
-                       linux,code = <33>;
+                       linux,code = <KEY_F>;
                        label = "SW35";
                        gpio-key,wakeup;
                        debounce-interval = <20>;
                };
                key-g {
                        gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
-                       linux,code = <34>;
+                       linux,code = <KEY_G>;
                        label = "SW36";
                        gpio-key,wakeup;
                        debounce-interval = <20>;
        };
 };
 
+&i2c6 {
+       status = "okay";
+       clock-frequency = <100000>;
+};
+
 &pfc {
        pinctrl-0 = <&du_pins &scif0_pins &scif1_pins>;
        pinctrl-names = "default";
 
-       i2c2_pins: i2c {
+       i2c2_pins: i2c2 {
                renesas,groups = "i2c2";
                renesas,function = "i2c2";
        };
        };
 
        sdhi0_pins: sd0 {
-               renesas,gpios = "sdhi0_data4", "sdhi0_ctrl";
+               renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
                renesas,function = "sdhi0";
        };
 
        sdhi1_pins: sd1 {
-               renesas,gpios = "sdhi1_data4", "sdhi1_ctrl";
+               renesas,groups = "sdhi1_data4", "sdhi1_ctrl";
                renesas,function = "sdhi1";
        };
 
        sdhi2_pins: sd2 {
-               renesas,gpios = "sdhi2_data4", "sdhi2_ctrl";
+               renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
                renesas,function = "sdhi2";
        };
 
-       qspi_pins: spi {
+       qspi_pins: spi0 {
                renesas,groups = "qspi_ctrl", "qspi_data4";
                renesas,function = "qspi";
        };
+
+       msiof0_pins: spi1 {
+               renesas,groups = "msiof0_clk", "msiof0_sync", "msiof0_rx",
+                                "msiof0_tx";
+               renesas,function = "msiof0";
+       };
 };
 
 &ether {
                reg = <1>;
                interrupt-parent = <&irqc0>;
                interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+               micrel,led-mode = <1>;
        };
 };
 
        status = "okay";
 };
 
-&spi {
+&qspi {
        pinctrl-0 = <&qspi_pins>;
        pinctrl-names = "default";
 
                compatible = "spansion,s25fl512s";
                reg = <0>;
                spi-max-frequency = <30000000>;
+               spi-tx-bus-width = <4>;
+               spi-rx-bus-width = <4>;
                m25p,fast-read;
 
                partition@0 {
                };
        };
 };
+
+&msiof0 {
+       pinctrl-0 = <&msiof0_pins>;
+       pinctrl-names = "default";
+
+       status = "okay";
+
+       pmic: pmic@0 {
+               compatible = "renesas,r2a11302ft";
+               reg = <0>;
+               spi-max-frequency = <6000000>;
+               spi-cpol;
+               spi-cpha;
+       };
+};
index 46181708e59c5c7d7e558743983a88efa9622e13..5eea08fb3722e480c24146887327b4676e3f4ca7 100644 (file)
                i2c3 = &i2c3;
                i2c4 = &i2c4;
                i2c5 = &i2c5;
+               i2c6 = &i2c6;
+               i2c7 = &i2c7;
+               i2c8 = &i2c8;
+               spi0 = &qspi;
+               spi1 = &msiof0;
+               spi2 = &msiof1;
+               spi3 = &msiof2;
        };
 
        cpus {
                        device_type = "cpu";
                        compatible = "arm,cortex-a15";
                        reg = <0>;
-                       clock-frequency = <1300000000>;
+                       clock-frequency = <1500000000>;
                };
 
                cpu1: cpu@1 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a15";
                        reg = <1>;
-                       clock-frequency = <1300000000>;
+                       clock-frequency = <1500000000>;
                };
        };
 
@@ -69,6 +76,7 @@
                gpio-ranges = <&pfc 0 0 32>;
                #interrupt-cells = <2>;
                interrupt-controller;
+               clocks = <&mstp9_clks R8A7791_CLK_GPIO0>;
        };
 
        gpio1: gpio@e6051000 {
@@ -80,6 +88,7 @@
                gpio-ranges = <&pfc 0 32 32>;
                #interrupt-cells = <2>;
                interrupt-controller;
+               clocks = <&mstp9_clks R8A7791_CLK_GPIO1>;
        };
 
        gpio2: gpio@e6052000 {
                gpio-ranges = <&pfc 0 64 32>;
                #interrupt-cells = <2>;
                interrupt-controller;
+               clocks = <&mstp9_clks R8A7791_CLK_GPIO2>;
        };
 
        gpio3: gpio@e6053000 {
                gpio-ranges = <&pfc 0 96 32>;
                #interrupt-cells = <2>;
                interrupt-controller;
+               clocks = <&mstp9_clks R8A7791_CLK_GPIO3>;
        };
 
        gpio4: gpio@e6054000 {
                gpio-ranges = <&pfc 0 128 32>;
                #interrupt-cells = <2>;
                interrupt-controller;
+               clocks = <&mstp9_clks R8A7791_CLK_GPIO4>;
        };
 
        gpio5: gpio@e6055000 {
                gpio-ranges = <&pfc 0 160 32>;
                #interrupt-cells = <2>;
                interrupt-controller;
+               clocks = <&mstp9_clks R8A7791_CLK_GPIO5>;
        };
 
        gpio6: gpio@e6055400 {
                gpio-ranges = <&pfc 0 192 32>;
                #interrupt-cells = <2>;
                interrupt-controller;
+               clocks = <&mstp9_clks R8A7791_CLK_GPIO6>;
        };
 
        gpio7: gpio@e6055800 {
                gpio-ranges = <&pfc 0 224 26>;
                #interrupt-cells = <2>;
                interrupt-controller;
+               clocks = <&mstp9_clks R8A7791_CLK_GPIO7>;
        };
 
        thermal@e61f0000 {
                             <0 17 IRQ_TYPE_LEVEL_HIGH>;
        };
 
+       /* The memory map in the User's Manual maps the cores to bus numbers */
        i2c0: i2c@e6508000 {
                #address-cells = <1>;
                #size-cells = <0>;
        };
 
        i2c5: i2c@e6528000 {
+               /* doesn't need pinmux */
                #address-cells = <1>;
                #size-cells = <0>;
                compatible = "renesas,i2c-r8a7791";
                status = "disabled";
        };
 
+       i2c6: i2c@e60b0000 {
+               /* doesn't need pinmux */
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic";
+               reg = <0 0xe60b0000 0 0x425>;
+               interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp9_clks R8A7791_CLK_IICDVFS>;
+               status = "disabled";
+       };
+
+       i2c7: i2c@e6500000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic";
+               reg = <0 0xe6500000 0 0x425>;
+               interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp3_clks R8A7791_CLK_IIC0>;
+               status = "disabled";
+       };
+
+       i2c8: i2c@e6510000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic";
+               reg = <0 0xe6510000 0 0x425>;
+               interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp3_clks R8A7791_CLK_IIC1>;
+               status = "disabled";
+       };
+
        pfc: pfc@e6060000 {
                compatible = "renesas,pfc-r8a7791";
                reg = <0 0xe6060000 0 0x250>;
        sdhi0: sd@ee100000 {
                compatible = "renesas,sdhi-r8a7791";
                reg = <0 0xee100000 0 0x200>;
-               interrupt-parent = <&gic>;
                interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp3_clks R8A7791_CLK_SDHI0>;
                status = "disabled";
        sdhi1: sd@ee140000 {
                compatible = "renesas,sdhi-r8a7791";
                reg = <0 0xee140000 0 0x100>;
-               interrupt-parent = <&gic>;
                interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp3_clks R8A7791_CLK_SDHI1>;
                status = "disabled";
        sdhi2: sd@ee160000 {
                compatible = "renesas,sdhi-r8a7791";
                reg = <0 0xee160000 0 0x100>;
-               interrupt-parent = <&gic>;
                interrupts = <0 168 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp3_clks R8A7791_CLK_SDHI2>;
                status = "disabled";
                mstp3_clks: mstp3_clks@e615013c {
                        compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
                        reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
-                       clocks = <&cp_clk>, <&sd2_clk>, <&sd1_clk>,
-                               <&cpg_clocks R8A7791_CLK_SD0>, <&mmc0_clk>, <&rclk_clk>;
+                       clocks = <&cp_clk>, <&sd2_clk>, <&sd1_clk>, <&cpg_clocks R8A7791_CLK_SD0>,
+                                <&mmc0_clk>, <&hp_clk>, <&hp_clk>, <&rclk_clk>;
                        #clock-cells = <1>;
                        renesas,clock-indices = <
-                               R8A7791_CLK_TPU0 R8A7791_CLK_SDHI2 R8A7791_CLK_SDHI1
-                               R8A7791_CLK_SDHI0 R8A7791_CLK_MMCIF0 R8A7791_CLK_CMT1
+                               R8A7791_CLK_TPU0 R8A7791_CLK_SDHI2 R8A7791_CLK_SDHI1 R8A7791_CLK_SDHI0
+                               R8A7791_CLK_MMCIF0 R8A7791_CLK_IIC0 R8A7791_CLK_IIC1 R8A7791_CLK_CMT1
                        >;
                        clock-output-names =
-                               "tpu0", "sdhi2", "sdhi1", "sdhi0", "mmcif0", "cmt1";
+                               "tpu0", "sdhi2", "sdhi1", "sdhi0",
+                               "mmcif0", "i2c7", "i2c8", "cmt1";
                };
                mstp5_clks: mstp5_clks@e6150144 {
                        compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
                mstp7_clks: mstp7_clks@e615014c {
                        compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
                        reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
-                       clocks = <&mp_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>,
+                       clocks = <&mp_clk>,  <&mp_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>,
                                 <&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
                                 <&zx_clk>, <&zx_clk>, <&zx_clk>;
                        #clock-cells = <1>;
                        renesas,clock-indices = <
-                               R8A7791_CLK_HSUSB R8A7791_CLK_HSCIF2 R8A7791_CLK_SCIF5
+                               R8A7791_CLK_EHCI R8A7791_CLK_HSUSB R8A7791_CLK_HSCIF2 R8A7791_CLK_SCIF5
                                R8A7791_CLK_SCIF4 R8A7791_CLK_HSCIF1 R8A7791_CLK_HSCIF0
                                R8A7791_CLK_SCIF3 R8A7791_CLK_SCIF2 R8A7791_CLK_SCIF1
                                R8A7791_CLK_SCIF0 R8A7791_CLK_DU1 R8A7791_CLK_DU0
                                R8A7791_CLK_LVDS0
                        >;
                        clock-output-names =
-                               "hsusb", "hscif2", "scif5", "scif4", "hscif1", "hscif0",
+                               "ehci", "hsusb", "hscif2", "scif5", "scif4", "hscif1", "hscif0",
                                "scif3", "scif2", "scif1", "scif0", "du1", "du0", "lvds0";
                };
                mstp8_clks: mstp8_clks@e6150990 {
                mstp9_clks: mstp9_clks@e6150994 {
                        compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
                        reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
-                       clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7791_CLK_QSPI>,
-                                <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
-                                <&p_clk>;
+                       clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
+                                <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
+                                <&p_clk>, <&p_clk>, <&cpg_clocks R8A7791_CLK_QSPI>, <&hp_clk>,
+                                <&cp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>,
+                                <&hp_clk>, <&hp_clk>;
                        #clock-cells = <1>;
                        renesas,clock-indices = <
-                               R8A7791_CLK_RCAN1 R8A7791_CLK_RCAN0 R8A7791_CLK_QSPI_MOD
-                               R8A7791_CLK_I2C5 R8A7791_CLK_I2C4 R8A7791_CLK_I2C3
-                               R8A7791_CLK_I2C2 R8A7791_CLK_I2C1 R8A7791_CLK_I2C0
+                               R8A7791_CLK_GPIO7 R8A7791_CLK_GPIO6 R8A7791_CLK_GPIO5 R8A7791_CLK_GPIO4
+                               R8A7791_CLK_GPIO3 R8A7791_CLK_GPIO2 R8A7791_CLK_GPIO1 R8A7791_CLK_GPIO0
+                               R8A7791_CLK_RCAN1 R8A7791_CLK_RCAN0 R8A7791_CLK_QSPI_MOD R8A7791_CLK_I2C5
+                               R8A7791_CLK_IICDVFS R8A7791_CLK_I2C4 R8A7791_CLK_I2C3 R8A7791_CLK_I2C2
+                               R8A7791_CLK_I2C1 R8A7791_CLK_I2C0
                        >;
                        clock-output-names =
-                               "rcan1", "rcan0", "qspi_mod", "i2c5", "i2c4", "i2c3",
-                               "i2c2", "i2c1", "i2c0";
+                               "gpio7", "gpio6", "gpio5", "gpio4", "gpio3", "gpio2", "gpio1", "gpio0",
+                               "rcan1", "rcan0", "qspi_mod", "i2c5", "i2c6", "i2c4", "i2c3", "i2c2",
+                               "i2c1", "i2c0";
                };
                mstp11_clks: mstp11_clks@e615099c {
                        compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
                };
        };
 
-       spi: spi@e6b10000 {
+       qspi: spi@e6b10000 {
                compatible = "renesas,qspi-r8a7791", "renesas,qspi";
                reg = <0 0xe6b10000 0 0x2c>;
                interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
                #size-cells = <0>;
                status = "disabled";
        };
+
+       msiof0: spi@e6e20000 {
+               compatible = "renesas,msiof-r8a7791";
+               reg = <0 0xe6e20000 0 0x0064>;
+               interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+       };
+
+       msiof1: spi@e6e10000 {
+               compatible = "renesas,msiof-r8a7791";
+               reg = <0 0xe6e10000 0 0x0064>;
+               interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp2_clks R8A7791_CLK_MSIOF1>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+       };
+
+       msiof2: spi@e6e00000 {
+               compatible = "renesas,msiof-r8a7791";
+               reg = <0 0xe6e00000 0 0x0064>;
+               interrupts = <0 158 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp2_clks R8A7791_CLK_MSIOF2>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+       };
 };
index 035df4053c21767b894871a0b37ff0d20006e296..afb327322a4a6d40538f30cdfca33aa3b25b39e3 100644 (file)
@@ -18,6 +18,7 @@
 
 / {
        model = "bq Curie 2";
+       compatible = "mundoreader,bq-curie2", "rockchip,rk3066a";
 
        memory {
                reg = <0x60000000 0x40000000>;
index 4d4dfbb59f4b53590aaf4fe61af6c013f793a03a..048c5de00551e1e108da32d57ab6e6a684468582 100644 (file)
@@ -79,7 +79,7 @@
 
                pinctrl@20008000 {
                        compatible = "rockchip,rk3066a-pinctrl";
-                       reg = <0x20008000 0x150>;
+                       rockchip,grf = <&grf>;
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges;
index 3ba1968a70abb55489d692dfb8ce2bebab683a23..a5eee55079cb7e622dfd6368cefff3b6329439a4 100644 (file)
@@ -17,6 +17,7 @@
 
 / {
        model = "Radxa Rock";
+       compatible = "radxa,rock", "rockchip,rk3188";
 
        memory {
                reg = <0x60000000 0x80000000>;
index bb36596ea20538ac9ac4d74f868c72fed40b5613..a494fb0cff648f8cec3c86af590fba88a45526c2 100644 (file)
 
                pinctrl@20008000 {
                        compatible = "rockchip,rk3188-pinctrl";
-                       reg = <0x20008000 0xa0>,
-                             <0x20008164 0x1a0>;
-                       reg-names = "base", "pull";
+                       rockchip,grf = <&grf>;
+                       rockchip,pmu = <&pmu>;
+
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges;
 
                        gpio0: gpio0@0x2000a000 {
                                compatible = "rockchip,rk3188-gpio-bank0";
-                               reg = <0x2000a000 0x100>,
-                                     <0x20004064 0x8>;
+                               reg = <0x2000a000 0x100>;
                                interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clk_gates8 9>;
 
 
                        uart0 {
                                uart0_xfer: uart0-xfer {
-                                       rockchip,pins = <RK_GPIO1 0 RK_FUNC_1 &pcfg_pull_none>,
+                                       rockchip,pins = <RK_GPIO1 0 RK_FUNC_1 &pcfg_pull_up>,
                                                        <RK_GPIO1 1 RK_FUNC_1 &pcfg_pull_none>;
                                };
 
 
                        uart1 {
                                uart1_xfer: uart1-xfer {
-                                       rockchip,pins = <RK_GPIO1 4 RK_FUNC_1 &pcfg_pull_none>,
+                                       rockchip,pins = <RK_GPIO1 4 RK_FUNC_1 &pcfg_pull_up>,
                                                        <RK_GPIO1 5 RK_FUNC_1 &pcfg_pull_none>;
                                };
 
 
                        uart2 {
                                uart2_xfer: uart2-xfer {
-                                       rockchip,pins = <RK_GPIO1 8 RK_FUNC_1 &pcfg_pull_none>,
+                                       rockchip,pins = <RK_GPIO1 8 RK_FUNC_1 &pcfg_pull_up>,
                                                        <RK_GPIO1 9 RK_FUNC_1 &pcfg_pull_none>;
                                };
                                /* no rts / cts for uart2 */
 
                        uart3 {
                                uart3_xfer: uart3-xfer {
-                                       rockchip,pins = <RK_GPIO1 10 RK_FUNC_1 &pcfg_pull_none>,
+                                       rockchip,pins = <RK_GPIO1 10 RK_FUNC_1 &pcfg_pull_up>,
                                                        <RK_GPIO1 11 RK_FUNC_1 &pcfg_pull_none>;
                                };
 
index 26e5a968d49d1ffa39619d172237f28c4c74f1a7..2adf1cc9e85df4478c5ed329911dd613356d97f9 100644 (file)
                        reg = <0x1013c000 0x100>;
                };
 
-               pmu@20004000 {
-                       compatible = "rockchip,rk3066-pmu";
+               pmu: pmu@20004000 {
+                       compatible = "rockchip,rk3066-pmu", "syscon";
                        reg = <0x20004000 0x100>;
                };
 
+               grf: grf@20008000 {
+                       compatible = "syscon";
+                       reg = <0x20008000 0x200>;
+               };
+
                gic: interrupt-controller@1013d000 {
                        compatible = "arm,cortex-a9-gic";
                        interrupt-controller;
index eabcfdbb403acc7ff40b409617a53c9831414c04..e0b15a6e8897fe84860a04d26d5d581b3f3161cf 100644 (file)
@@ -13,7 +13,7 @@
 #include <dt-bindings/pinctrl/at91.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/clk/at91.h>
+#include <dt-bindings/clock/at91.h>
 
 / {
        model = "Atmel SAMA5D3 family SoC";
                reg = <0x20000000 0x8000000>;
        };
 
+       slow_xtal: slow_xtal {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <0>;
+       };
+
+       main_xtal: main_xtal {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <0>;
+       };
+
        clocks {
                adc_op_clk: adc_op_clk{
                        compatible = "fixed-clock";
                                compatible = "atmel,at91sam9g45-ssc";
                                reg = <0xf0008000 0x4000>;
                                interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>;
+                               dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(13)>,
+                                      <&dma0 2 AT91_DMA_CFG_PER_ID(14)>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
                                clocks = <&ssc0_clk>;
                                compatible = "atmel,at91sam9g45-ssc";
                                reg = <0xf800c000 0x4000>;
                                interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>;
+                               dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(3)>,
+                                      <&dma1 2 AT91_DMA_CFG_PER_ID(4)>;
+                               dma-names = "tx", "rx";
                                pinctrl-names = "default";
                                pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
                                clocks = <&ssc1_clk>;
                                        };
                                };
 
+                               pwm0 {
+                                       pinctrl_pwm0_pwmh0_0: pwm0_pwmh0-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D4 and LCDDAT20 */
+                                       };
+                                       pinctrl_pwm0_pwmh0_1: pwm0_pwmh0-1 {
+                                               atmel,pins =
+                                                       <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* conflicts with GTX0 */
+                                       };
+                                       pinctrl_pwm0_pwml0_0: pwm0_pwml0-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D5 and LCDDAT21 */
+                                       };
+                                       pinctrl_pwm0_pwml0_1: pwm0_pwml0-1 {
+                                               atmel,pins =
+                                                       <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* conflicts with GTX1 */
+                                       };
+
+                                       pinctrl_pwm0_pwmh1_0: pwm0_pwmh1-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D6 and LCDDAT22 */
+                                       };
+                                       pinctrl_pwm0_pwmh1_1: pwm0_pwmh1-1 {
+                                               atmel,pins =
+                                                       <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* conflicts with GRX0 */
+                                       };
+                                       pinctrl_pwm0_pwmh1_2: pwm0_pwmh1-2 {
+                                               atmel,pins =
+                                                       <AT91_PIOB 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with G125CKO and RTS1 */
+                                       };
+                                       pinctrl_pwm0_pwml1_0: pwm0_pwml1-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D7 and LCDDAT23 */
+                                       };
+                                       pinctrl_pwm0_pwml1_1: pwm0_pwml1-1 {
+                                               atmel,pins =
+                                                       <AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* conflicts with GRX1 */
+                                       };
+                                       pinctrl_pwm0_pwml1_2: pwm0_pwml1-2 {
+                                               atmel,pins =
+                                                       <AT91_PIOE 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with IRQ */
+                                       };
+
+                                       pinctrl_pwm0_pwmh2_0: pwm0_pwmh2-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* conflicts with GTXCK */
+                                       };
+                                       pinctrl_pwm0_pwmh2_1: pwm0_pwmh2-1 {
+                                               atmel,pins =
+                                                       <AT91_PIOD 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;  /* conflicts with MCI0_DA4 and TIOA0 */
+                                       };
+                                       pinctrl_pwm0_pwml2_0: pwm0_pwml2-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* conflicts with GTXEN */
+                                       };
+                                       pinctrl_pwm0_pwml2_1: pwm0_pwml2-1 {
+                                               atmel,pins =
+                                                       <AT91_PIOD 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;  /* conflicts with MCI0_DA5 and TIOB0 */
+                                       };
+
+                                       pinctrl_pwm0_pwmh3_0: pwm0_pwmh3-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXDV */
+                                       };
+                                       pinctrl_pwm0_pwmh3_1: pwm0_pwmh3-1 {
+                                               atmel,pins =
+                                                       <AT91_PIOD 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;  /* conflicts with MCI0_DA6 and TCLK0 */
+                                       };
+                                       pinctrl_pwm0_pwml3_0: pwm0_pwml3-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXER */
+                                       };
+                                       pinctrl_pwm0_pwml3_1: pwm0_pwml3-1 {
+                                               atmel,pins =
+                                                       <AT91_PIOD 8 AT91_PERIPH_C AT91_PINCTRL_NONE>;  /* conflicts with MCI0_DA7 */
+                                       };
+                               };
+
                                spi0 {
                                        pinctrl_spi0: spi0-0 {
                                                atmel,pins =
                                #size-cells = <0>;
                                #interrupt-cells = <1>;
 
-                               clk32k: slck {
-                                       compatible = "fixed-clock";
+                               main_rc_osc: main_rc_osc {
+                                       compatible = "atmel,at91sam9x5-clk-main-rc-osc";
                                        #clock-cells = <0>;
-                                       clock-frequency = <32768>;
+                                       interrupt-parent = <&pmc>;
+                                       interrupts = <AT91_PMC_MOSCRCS>;
+                                       clock-frequency = <12000000>;
+                                       clock-accuracy = <50000000>;
                                };
 
-                               main: mainck {
-                                       compatible = "atmel,at91rm9200-clk-main";
+                               main_osc: main_osc {
+                                       compatible = "atmel,at91rm9200-clk-main-osc";
                                        #clock-cells = <0>;
                                        interrupt-parent = <&pmc>;
                                        interrupts = <AT91_PMC_MOSCS>;
-                                       clocks = <&clk32k>;
+                                       clocks = <&main_xtal>;
+                               };
+
+                               main: mainck {
+                                       compatible = "atmel,at91sam9x5-clk-main";
+                                       #clock-cells = <0>;
+                                       interrupt-parent = <&pmc>;
+                                       interrupts = <AT91_PMC_MOSCSELS>;
+                                       clocks = <&main_rc_osc &main_osc>;
                                };
 
                                plla: pllack {
                                status = "disabled";
                        };
 
+                       sckc@fffffe50 {
+                               compatible = "atmel,at91sam9x5-sckc";
+                               reg = <0xfffffe50 0x4>;
+
+                               slow_rc_osc: slow_rc_osc {
+                                       compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
+                                       #clock-cells = <0>;
+                                       clock-frequency = <32768>;
+                                       clock-accuracy = <50000000>;
+                                       atmel,startup-time-usec = <75>;
+                               };
+
+                               slow_osc: slow_osc {
+                                       compatible = "atmel,at91sam9x5-clk-slow-osc";
+                                       #clock-cells = <0>;
+                                       clocks = <&slow_xtal>;
+                                       atmel,startup-time-usec = <1200000>;
+                               };
+
+                               clk32k: slowck {
+                                       compatible = "atmel,at91sam9x5-clk-slow";
+                                       #clock-cells = <0>;
+                                       clocks = <&slow_rc_osc &slow_osc>;
+                               };
+                       };
+
                        rtc@fffffeb0 {
                                compatible = "atmel,at91rm9200-rtc";
                                reg = <0xfffffeb0 0x30>;
index b029fe7ef17a657946de4d2fe71168b4b03210d8..1b02208ea6ff2b70aab43ddd416b37ef0b9a2a1f 100644 (file)
@@ -9,7 +9,7 @@
 
 #include <dt-bindings/pinctrl/at91.h>
 #include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/clk/at91.h>
+#include <dt-bindings/clock/at91.h>
 
 / {
        ahb {
index 382b04431f66b621e01a9f2fe7a9e488ac4c171b..02848453ca0cf5447de27aaca6b233611173da4e 100644 (file)
@@ -9,7 +9,7 @@
 
 #include <dt-bindings/pinctrl/at91.h>
 #include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/clk/at91.h>
+#include <dt-bindings/clock/at91.h>
 
 / {
        aliases {
index a9fa75e4165205f9a1259f9a0821519faee54070..7a8d4c6115f72fdab533980a0f0d96eb6cb1469a 100644 (file)
@@ -9,7 +9,7 @@
 
 #include <dt-bindings/pinctrl/at91.h>
 #include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/clk/at91.h>
+#include <dt-bindings/clock/at91.h>
 
 / {
        aliases {
index f55ed072c8e6b1c0290a5aa3eb4ab4b7680e121b..b0b1331c1974cf1a3c70a708cda0044e887ced54 100644 (file)
                reg = <0x20000000 0x20000000>;
        };
 
+       slow_xtal {
+               clock-frequency = <32768>;
+       };
+
+       main_xtal {
+               clock-frequency = <12000000>;
+       };
+
        ahb {
                apb {
                        spi0: spi@f0004000 {
index dba739b6ef36faa57fc630708f7deb8903c1c4d5..306eef0f97ef21fc51a0410d2e2a6d59186986b8 100644 (file)
                                };
                        };
 
+                       ssc0: ssc@f0008000 {
+                               atmel,clk-from-rk-pin;
+                       };
+
                        /*
                         * i2c0 conflicts with ISI:
                         * disable it to allow the use of ISI
        };
 
        sound {
-               compatible = "atmel,sama5d3ek-wm8904";
+               compatible = "atmel,asoc-wm8904";
                pinctrl-names = "default";
                pinctrl-0 = <&pinctrl_pck0_as_audio_mck>;
 
                        "Headphone Jack", "HPOUTR",
                        "IN2L", "Line In Jack",
                        "IN2R", "Line In Jack",
+                       "MICBIAS", "IN1L",
                        "IN1L", "Mic";
 
                atmel,ssc-controller = <&ssc0>;
                atmel,audio-codec = <&wm8904>;
+
+               status = "disabled";
        };
 };
index eb8886b535e4a28345ac5ae848ce85de47fcbbe4..a99171c8a78222f97497b4d1de6f3897e2e5fca1 100644 (file)
@@ -14,6 +14,7 @@
 /dts-v1/;
 #include "sh73a0.dtsi"
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 
 / {
 
                back-key {
                        gpios = <&pcf8575 8 GPIO_ACTIVE_LOW>;
-                       linux,code = <158>;
+                       linux,code = <KEY_BACK>;
                        label = "SW3";
                };
 
                right-key {
                        gpios = <&pcf8575 9 GPIO_ACTIVE_LOW>;
-                       linux,code = <106>;
+                       linux,code = <KEY_RIGHT>;
                        label = "SW2-R";
                };
 
                left-key {
                        gpios = <&pcf8575 10 GPIO_ACTIVE_LOW>;
-                       linux,code = <105>;
+                       linux,code = <KEY_LEFT>;
                        label = "SW2-L";
                };
 
                enter-key {
                        gpios = <&pcf8575 11 GPIO_ACTIVE_LOW>;
-                       linux,code = <28>;
+                       linux,code = <KEY_ENTER>;
                        label = "SW2-P";
                };
 
                up-key {
                        gpios = <&pcf8575 12 GPIO_ACTIVE_LOW>;
-                       linux,code = <103>;
+                       linux,code = <KEY_UP>;
                        label = "SW2-U";
                };
 
                down-key {
                        gpios = <&pcf8575 13 GPIO_ACTIVE_LOW>;
-                       linux,code = <108>;
+                       linux,code = <KEY_DOWN>;
                        label = "SW2-D";
                };
 
                home-key {
                        gpios = <&pcf8575 14 GPIO_ACTIVE_LOW>;
-                       linux,code = <102>;
+                       linux,code = <KEY_HOME>;
                        label = "SW1";
                };
        };
index b7bd3b9a67533933623ba5b5c118ae46c035f019..5ecf552e1c009faf2317793e2b52ab6f24fc5655 100644 (file)
@@ -34,7 +34,6 @@
        gic: interrupt-controller@f0001000 {
                compatible = "arm,cortex-a9-gic";
                #interrupt-cells = <3>;
-               #address-cells = <1>;
                interrupt-controller;
                reg = <0xf0001000 0x1000>,
                      <0xf0000100 0x100>;
index 56fc214e6d2c3a6fd67f7ce41f11f0ec9a4c8abc..280966b92e5ed3863f0f9750b10a52fc9f4508d9 100644 (file)
@@ -15,7 +15,8 @@
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
-/include/ "skeleton.dtsi"
+#include "skeleton.dtsi"
+#include <dt-bindings/reset/altr,rst-mgr.h>
 
 / {
        #address-cells = <1>;
                        pdma: pdma@ffe01000 {
                                compatible = "arm,pl330", "arm,primecell";
                                reg = <0xffe01000 0x1000>;
-                               interrupts = <0 180 4>;
+                               interrupts = <0 104 4>,
+                                            <0 105 4>,
+                                            <0 106 4>,
+                                            <0 107 4>,
+                                            <0 108 4>,
+                                            <0 109 4>,
+                                            <0 110 4>,
+                                            <0 111 4>;
                                #dma-cells = <1>;
                                #dma-channels = <8>;
                                #dma-requests = <32>;
                        };
                };
 
+               can0: can@ffc00000 {
+                       compatible = "bosch,d_can";
+                       reg = <0xffc00000 0x1000>;
+                       interrupts = <0 131 4>, <0 132 4>, <0 133 4>, <0 134 4>;
+                       clocks = <&can0_clk>;
+                       status = "disabled";
+               };
+
+               can1: can@ffc01000 {
+                       compatible = "bosch,d_can";
+                       reg = <0xffc01000 0x1000>;
+                       interrupts = <0 135 4>, <0 136 4>, <0 137 4>, <0 138 4>;
+                       clocks = <&can1_clk>;
+                       status = "disabled";
+               };
+
                clkmgr@ffd04000 {
                                compatible = "altr,clk-mgr";
                                reg = <0xffd04000 0x1000>;
                                                        #clock-cells = <0>;
                                                        compatible = "altr,socfpga-perip-clk";
                                                        clocks = <&main_pll>;
-                                                       fixed-divider = <2>;
+                                                       div-reg = <0xe0 0 9>;
                                                        reg = <0x48>;
                                                };
 
                                                        #clock-cells = <0>;
                                                        compatible = "altr,socfpga-perip-clk";
                                                        clocks = <&main_pll>;
-                                                       fixed-divider = <4>;
+                                                       div-reg = <0xe4 0 9>;
                                                        reg = <0x4C>;
                                                };
 
                                                        #clock-cells = <0>;
                                                        compatible = "altr,socfpga-perip-clk";
                                                        clocks = <&main_pll>;
-                                                       fixed-divider = <4>;
+                                                       div-reg = <0xe8 0 9>;
                                                        reg = <0x50>;
                                                };
 
                        mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
                        clocks = <&emac0_clk>;
                        clock-names = "stmmaceth";
+                       resets = <&rst EMAC0_RESET>;
+                       reset-names = "stmmaceth";
                        status = "disabled";
                };
 
                        mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
                        clocks = <&emac1_clk>;
                        clock-names = "stmmaceth";
+                       resets = <&rst EMAC1_RESET>;
+                       reset-names = "stmmaceth";
+                       status = "disabled";
+               };
+
+               i2c0: i2c@ffc04000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "snps,designware-i2c";
+                       reg = <0xffc04000 0x1000>;
+                       clocks = <&l4_sp_clk>;
+                       interrupts = <0 158 0x4>;
+                       status = "disabled";
+               };
+
+               i2c1: i2c@ffc05000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "snps,designware-i2c";
+                       reg = <0xffc05000 0x1000>;
+                       clocks = <&l4_sp_clk>;
+                       interrupts = <0 159 0x4>;
+                       status = "disabled";
+               };
+
+               i2c2: i2c@ffc06000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "snps,designware-i2c";
+                       reg = <0xffc06000 0x1000>;
+                       clocks = <&l4_sp_clk>;
+                       interrupts = <0 160 0x4>;
+                       status = "disabled";
+               };
+
+               i2c3: i2c@ffc07000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "snps,designware-i2c";
+                       reg = <0xffc07000 0x1000>;
+                       clocks = <&l4_sp_clk>;
+                       interrupts = <0 161 0x4>;
                        status = "disabled";
                };
 
                        compatible = "snps,dw-apb-timer";
                        interrupts = <0 167 4>;
                        reg = <0xffc08000 0x1000>;
+                       clocks = <&l4_sp_clk>;
+                       clock-names = "timer";
                };
 
                timer1: timer1@ffc09000 {
                        compatible = "snps,dw-apb-timer";
                        interrupts = <0 168 4>;
                        reg = <0xffc09000 0x1000>;
+                       clocks = <&l4_sp_clk>;
+                       clock-names = "timer";
                };
 
                timer2: timer2@ffd00000 {
                        compatible = "snps,dw-apb-timer";
                        interrupts = <0 169 4>;
                        reg = <0xffd00000 0x1000>;
+                       clocks = <&osc1>;
+                       clock-names = "timer";
                };
 
                timer3: timer3@ffd01000 {
                        compatible = "snps,dw-apb-timer";
                        interrupts = <0 170 4>;
                        reg = <0xffd01000 0x1000>;
+                       clocks = <&osc1>;
+                       clock-names = "timer";
                };
 
                uart0: serial0@ffc02000 {
                        interrupts = <0 162 4>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
+                       clocks = <&l4_sp_clk>;
                };
 
                uart1: serial1@ffc03000 {
                        interrupts = <0 163 4>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
+                       clocks = <&l4_sp_clk>;
                };
 
-               rstmgr@ffd05000 {
+               rst: rstmgr@ffd05000 {
                        compatible = "altr,rst-mgr";
                        reg = <0xffd05000 0x1000>;
                };
 
+               usbphy0: usbphy@0 {
+                       #phy-cells = <0>;
+                       compatible = "usb-nop-xceiv";
+                       status = "okay";
+               };
+
+               usb0: usb@ffb00000 {
+                       compatible = "snps,dwc2";
+                       reg = <0xffb00000 0xffff>;
+                       interrupts = <0 125 4>;
+                       clocks = <&usb_mp_clk>;
+                       clock-names = "otg";
+                       phys = <&usbphy0>;
+                       phy-names = "usb2-phy";
+                       status = "disabled";
+               };
+
+               usb1: usb@ffb40000 {
+                       compatible = "snps,dwc2";
+                       reg = <0xffb40000 0xffff>;
+                       interrupts = <0 128 4>;
+                       clocks = <&usb_mp_clk>;
+                       clock-names = "otg";
+                       phys = <&usbphy0>;
+                       phy-names = "usb2-phy";
+                       status = "disabled";
+               };
+
                sysmgr: sysmgr@ffd08000 {
                        compatible = "altr,sys-mgr", "syscon";
                        reg = <0xffd08000 0x4000>;
index 6c87b7070ca77d0379e03b214a7a0f6601973bfc..12d1c2ccaf5ba4b22b12a4793dd1d6f8e51da38e 100644 (file)
@@ -15,7 +15,7 @@
  */
 
 /dts-v1/;
-/include/ "socfpga.dtsi"
+#include "socfpga.dtsi"
 
 / {
        soc {
                        };
                };
 
-               serial0@ffc02000 {
-                       clock-frequency = <100000000>;
-               };
-
-               serial1@ffc03000 {
-                       clock-frequency = <100000000>;
-               };
-
                sysmgr@ffd08000 {
                        cpu1-start-addr = <0xffd080c4>;
                };
-
-               timer0@ffc08000 {
-                       clock-frequency = <100000000>;
-               };
-
-               timer1@ffc09000 {
-                       clock-frequency = <100000000>;
-               };
-
-               timer2@ffd00000 {
-                       clock-frequency = <25000000>;
-               };
-
-               timer3@ffd01000 {
-                       clock-frequency = <25000000>;
-               };
        };
 };
index a87ee1c07661b466d9d8abc8ca323739f82d6b69..d532d171e3917dba36b2284be351d33774fdd7a4 100644 (file)
@@ -15,7 +15,7 @@
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
-/include/ "socfpga_arria5.dtsi"
+#include "socfpga_arria5.dtsi"
 
 / {
        model = "Altera SOCFPGA Arria V SoC Development Kit";
        rxdv-skew-ps = <0>;
        rxc-skew-ps = <2000>;
 };
+
+&i2c0 {
+       status = "okay";
+
+       eeprom@51 {
+               compatible = "atmel,24c32";
+               reg = <0x51>;
+               pagesize = <32>;
+       };
+
+       rtc@68 {
+               compatible = "dallas,ds1339";
+               reg = <0x68>;
+       };
+};
+
+&usb1 {
+       status = "okay";
+};
index ca41b0ebf461b12a413d36627a73fff323f5d69a..bf511828729f9fe8c7756b19eed1341a40a23789 100644 (file)
@@ -16,7 +16,7 @@
  */
 
 /dts-v1/;
-/include/ "socfpga.dtsi"
+#include "socfpga.dtsi"
 
 / {
        soc {
                        status = "okay";
                };
 
-               timer0@ffc08000 {
-                       clock-frequency = <100000000>;
-               };
-
-               timer1@ffc09000 {
-                       clock-frequency = <100000000>;
-               };
-
-               timer2@ffd00000 {
-                       clock-frequency = <25000000>;
-               };
-
-               timer3@ffd01000 {
-                       clock-frequency = <25000000>;
-               };
-
-               serial0@ffc02000 {
-                       clock-frequency = <100000000>;
-               };
-
-               serial1@ffc03000 {
-                       clock-frequency = <100000000>;
-               };
-
                sysmgr@ffd08000 {
                        cpu1-start-addr = <0xffd080c4>;
                };
index ae16d975196d62c1947cbf41187d0e47cb6a5e9a..45de1514af0ac24f36c0cf5a737a70c7da555213 100644 (file)
@@ -15,7 +15,7 @@
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
-/include/ "socfpga_cyclone5.dtsi"
+#include "socfpga_cyclone5.dtsi"
 
 / {
        model = "Altera SOCFPGA Cyclone V SoC Development Kit";
        rxdv-skew-ps = <0>;
        rxc-skew-ps = <2000>;
 };
+
+&i2c0 {
+       status = "okay";
+
+       eeprom@51 {
+               compatible = "atmel,24c32";
+               reg = <0x51>;
+               pagesize = <32>;
+       };
+
+       rtc@68 {
+               compatible = "dallas,ds1339";
+               reg = <0x68>;
+       };
+};
+
+&usb1 {
+       status = "okay";
+};
index b79e2a2bf17522504e5384a929ee2d3226a42654..d26f155f5fd9f64fcdbd1bcf12626c6008683b9b 100644 (file)
@@ -15,7 +15,7 @@
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
-/include/ "socfpga_cyclone5.dtsi"
+#include "socfpga_cyclone5.dtsi"
 
 / {
        model = "Terasic SoCkit";
@@ -52,3 +52,7 @@
        rxdv-skew-ps = <0>;
        rxc-skew-ps = <2000>;
 };
+
+&usb1 {
+       status = "okay";
+};
diff --git a/arch/arm/boot/dts/socfpga_cyclone5_socrates.dts b/arch/arm/boot/dts/socfpga_cyclone5_socrates.dts
new file mode 100644 (file)
index 0000000..a1814b4
--- /dev/null
@@ -0,0 +1,50 @@
+/*
+ *  Copyright (C) 2014 Steffen Trumtrar <s.trumtrar@pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "socfpga_cyclone5.dtsi"
+
+/ {
+       model = "EBV SOCrates";
+       compatible = "ebv,socrates", "altr,socfpga-cyclone5", "altr,socfpga";
+
+       chosen {
+               bootargs = "console=ttyS0,115200";
+       };
+
+       memory {
+               name = "memory";
+               device_type = "memory";
+               reg = <0x0 0x40000000>; /* 1GB */
+       };
+};
+
+&gmac1 {
+       status = "okay";
+};
+
+&i2c0 {
+       status = "okay";
+
+       rtc: rtc@68 {
+               compatible = "stm,m41t82";
+               reg = <0x68>;
+       };
+};
+
+&mmc {
+       status = "okay";
+};
index 87d6f759a9c187dc81c4ddcc718c97e87a7683ab..09792b41111058f2546577d3f7ddefdc78291b41 100644 (file)
@@ -16,7 +16,7 @@
  */
 
 /dts-v1/;
-/include/ "socfpga.dtsi"
+#include "socfpga.dtsi"
 
 / {
        model = "Altera SOCFPGA VT";
index 3075d2d3a8bec0b49b98cd93ff0dc0f5b9bd86fd..0aa6fef5ce22631f33af77b7f4b6c05f91072000 100644 (file)
@@ -1,7 +1,7 @@
 /*
  * DTS file for SPEAr320 Evaluation Baord
  *
- * Copyright 2012 Shiraz Hashim <shiraz.hashim@st.com>
+ * Copyright 2012 Shiraz Hashim <shiraz.linux.kernel@gmail.com>
  *
  * The code contained herein is licensed under the GNU General Public
  * License. You may obtain a copy of the GNU General Public License
diff --git a/arch/arm/boot/dts/stih407-b2120.dts b/arch/arm/boot/dts/stih407-b2120.dts
new file mode 100644 (file)
index 0000000..fe69f92
--- /dev/null
@@ -0,0 +1,78 @@
+/*
+ * Copyright (C) 2014 STMicroelectronics (R&D) Limited.
+ * Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+#include "stih407.dtsi"
+/ {
+       model = "STiH407 B2120";
+       compatible = "st,stih407-b2120", "st,stih407";
+
+       chosen {
+               bootargs = "console=ttyAS0,115200";
+               linux,stdout-path = &sbc_serial0;
+       };
+
+       memory {
+               device_type = "memory";
+               reg = <0x40000000 0x80000000>;
+       };
+
+       aliases {
+               ttyAS0 = &sbc_serial0;
+       };
+
+       soc {
+               sbc_serial0: serial@9530000 {
+                       status = "okay";
+               };
+
+               leds {
+                       compatible = "gpio-leds";
+                       red {
+                               #gpio-cells = <2>;
+                               label = "Front Panel LED";
+                               gpios = <&pio4 1 0>;
+                               linux,default-trigger = "heartbeat";
+                       };
+                       green {
+                               #gpio-cells = <2>;
+                               gpios = <&pio1 3 0>;
+                               default-state = "off";
+                       };
+               };
+
+               i2c@9842000 {
+                       status = "okay";
+               };
+
+               i2c@9843000 {
+                       status = "okay";
+               };
+
+               i2c@9844000 {
+                       status = "okay";
+               };
+
+               i2c@9845000 {
+                       status = "okay";
+               };
+
+               i2c@9540000 {
+                       status = "okay";
+               };
+
+               /* SSC11 to HDMI */
+               i2c@9541000 {
+                       status = "okay";
+                       /* HDMI V1.3a supports Standard mode only */
+                       clock-frequency = <100000>;
+                       st,i2c-min-scl-pulse-width-us = <0>;
+                       st,i2c-min-sda-pulse-width-us = <5>;
+               };
+       };
+};
diff --git a/arch/arm/boot/dts/stih407-clock.dtsi b/arch/arm/boot/dts/stih407-clock.dtsi
new file mode 100644 (file)
index 0000000..800f46f
--- /dev/null
@@ -0,0 +1,39 @@
+/*
+ * Copyright (C) 2014 STMicroelectronics R&D Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/ {
+       clocks {
+               /*
+                * Fixed 30MHz oscillator inputs to SoC
+                */
+               clk_sysin: clk-sysin {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <30000000>;
+               };
+
+               /*
+                * ARM Peripheral clock for timers
+                */
+               arm_periph_clk: arm-periph-clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <600000000>;
+               };
+
+               /*
+                * Bootloader initialized system infrastructure clock for
+                * serial devices.
+                */
+               clk_ext2f_a9: clockgen-c0@13 {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <200000000>;
+                       clock-output-names = "clk-s-icn-reg-0";
+               };
+       };
+};
diff --git a/arch/arm/boot/dts/stih407-pinctrl.dtsi b/arch/arm/boot/dts/stih407-pinctrl.dtsi
new file mode 100644 (file)
index 0000000..402844c
--- /dev/null
@@ -0,0 +1,615 @@
+/*
+ * Copyright (C) 2014 STMicroelectronics Limited.
+ * Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * publishhed by the Free Software Foundation.
+ */
+#include "st-pincfg.h"
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+/ {
+
+       aliases {
+               /* 0-5: PIO_SBC */
+               gpio0 = &pio0;
+               gpio1 = &pio1;
+               gpio2 = &pio2;
+               gpio3 = &pio3;
+               gpio4 = &pio4;
+               gpio5 = &pio5;
+               /* 10-19: PIO_FRONT0 */
+               gpio6 = &pio10;
+               gpio7 = &pio11;
+               gpio8 = &pio12;
+               gpio9 = &pio13;
+               gpio10 = &pio14;
+               gpio11 = &pio15;
+               gpio12 = &pio16;
+               gpio13 = &pio17;
+               gpio14 = &pio18;
+               gpio15 = &pio19;
+               /* 20: PIO_FRONT1 */
+               gpio16 = &pio20;
+               /* 30-35: PIO_REAR */
+               gpio17 = &pio30;
+               gpio18 = &pio31;
+               gpio19 = &pio32;
+               gpio20 = &pio33;
+               gpio21 = &pio34;
+               gpio22 = &pio35;
+               /* 40-42: PIO_FLASH */
+               gpio23 = &pio40;
+               gpio24 = &pio41;
+               gpio25 = &pio42;
+       };
+
+       soc {
+               pin-controller-sbc {
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       compatible = "st,stih407-sbc-pinctrl";
+                       st,syscfg = <&syscfg_sbc>;
+                       reg = <0x0961f080 0x4>;
+                       reg-names = "irqmux";
+                       interrupts = <GIC_SPI 188 IRQ_TYPE_NONE>;
+                       interrupts-names = "irqmux";
+                       ranges = <0 0x09610000 0x6000>;
+
+                       pio0: gpio@09610000 {
+                               gpio-controller;
+                               #gpio-cells = <1>;
+                               interrupt-controller;
+                               #interrupt-cells = <2>;
+                               reg = <0x0 0x100>;
+                               st,bank-name = "PIO0";
+                       };
+                       pio1: gpio@09611000 {
+                               gpio-controller;
+                               #gpio-cells = <1>;
+                               interrupt-controller;
+                               #interrupt-cells = <2>;
+                               reg = <0x1000 0x100>;
+                               st,bank-name = "PIO1";
+                       };
+                       pio2: gpio@09612000 {
+                               gpio-controller;
+                               #gpio-cells = <1>;
+                               interrupt-controller;
+                               #interrupt-cells = <2>;
+                               reg = <0x2000 0x100>;
+                               st,bank-name = "PIO2";
+                       };
+                       pio3: gpio@09613000 {
+                               gpio-controller;
+                               #gpio-cells = <1>;
+                               interrupt-controller;
+                               #interrupt-cells = <2>;
+                               reg = <0x3000 0x100>;
+                               st,bank-name = "PIO3";
+                       };
+                       pio4: gpio@09614000 {
+                               gpio-controller;
+                               #gpio-cells = <1>;
+                               interrupt-controller;
+                               #interrupt-cells = <2>;
+                               reg = <0x4000 0x100>;
+                               st,bank-name = "PIO4";
+                       };
+
+                       pio5: gpio@09615000 {
+                               gpio-controller;
+                               #gpio-cells = <1>;
+                               interrupt-controller;
+                               #interrupt-cells = <2>;
+                               reg = <0x5000 0x100>;
+                               st,bank-name = "PIO5";
+                       };
+
+                       rc {
+                               pinctrl_ir: ir0 {
+                                       st,pins {
+                                               ir = <&pio4 0 ALT2 IN>;
+                                       };
+                               };
+                       };
+
+                       /* SBC_ASC0 - UART10 */
+                       sbc_serial0 {
+                               pinctrl_sbc_serial0: sbc_serial0-0 {
+                                       st,pins {
+                                               tx = <&pio3 4 ALT1 OUT>;
+                                               rx = <&pio3 5 ALT1 IN>;
+                                       };
+                               };
+                       };
+                       /* SBC_ASC1 - UART11 */
+                       sbc_serial1 {
+                               pinctrl_sbc_serial1: sbc_serial1-0 {
+                                       st,pins {
+                                               tx = <&pio2 6 ALT3 OUT>;
+                                               rx = <&pio2 7 ALT3 IN>;
+                                       };
+                               };
+                       };
+
+                       i2c10 {
+                               pinctrl_i2c10_default: i2c10-default {
+                                       st,pins {
+                                               sda = <&pio4 6 ALT1 BIDIR>;
+                                               scl = <&pio4 5 ALT1 BIDIR>;
+                                       };
+                               };
+                       };
+
+                       i2c11 {
+                               pinctrl_i2c11_default: i2c11-default {
+                                       st,pins {
+                                               sda = <&pio5 1 ALT1 BIDIR>;
+                                               scl = <&pio5 0 ALT1 BIDIR>;
+                                       };
+                               };
+                       };
+
+                       keyscan {
+                               pinctrl_keyscan: keyscan {
+                                       st,pins {
+                                               keyin0 = <&pio4 0 ALT6 IN>;
+                                               keyin1 = <&pio4 5 ALT4 IN>;
+                                               keyin2 = <&pio0 4 ALT2 IN>;
+                                               keyin3 = <&pio2 6 ALT2 IN>;
+
+                                               keyout0 = <&pio4 6 ALT4 OUT>;
+                                               keyout1 = <&pio1 7 ALT2 OUT>;
+                                               keyout2 = <&pio0 6 ALT2 OUT>;
+                                               keyout3 = <&pio2 7 ALT2 OUT>;
+                                       };
+                               };
+                       };
+
+                       gmac1 {
+                               /*
+                                * Almost all the boards based on STiH407 SoC have an embedded
+                                * switch where the mdio/mdc have been used for managing the SMI
+                                * iface via I2C. For this reason these lines can be allocated
+                                * by using dedicated configuration (in case of there will be a
+                                * standard PHY transceiver on-board).
+                                */
+                               pinctrl_rgmii1: rgmii1-0 {
+                                       st,pins {
+
+                                               txd0 = <&pio0 0 ALT1 OUT DE_IO 0 CLK_A>;
+                                               txd1 = <&pio0 1 ALT1 OUT DE_IO 0 CLK_A>;
+                                               txd2 = <&pio0 2 ALT1 OUT DE_IO 0 CLK_A>;
+                                               txd3 = <&pio0 3 ALT1 OUT DE_IO 0 CLK_A>;
+                                               txen = <&pio0 5 ALT1 OUT DE_IO 0 CLK_A>;
+                                               txclk = <&pio0 6 ALT1 IN NICLK 0 CLK_A>;
+                                               rxd0 = <&pio1 4 ALT1 IN DE_IO 0 CLK_A>;
+                                               rxd1 = <&pio1 5 ALT1 IN DE_IO 0 CLK_A>;
+                                               rxd2 = <&pio1 6 ALT1 IN DE_IO 0 CLK_A>;
+                                               rxd3 = <&pio1 7 ALT1 IN DE_IO 0 CLK_A>;
+                                               rxdv = <&pio2 0 ALT1 IN DE_IO 0 CLK_A>;
+                                               rxclk = <&pio2 2 ALT1 IN NICLK 500 CLK_A>;
+                                               clk125 = <&pio3 7 ALT4 IN NICLK 0 CLK_A>;
+                                               phyclk = <&pio2 3 ALT4 OUT NICLK 1750 CLK_B>;
+                                       };
+                               };
+
+                               pinctrl_rgmii1_mdio: rgmii1-mdio {
+                                       st,pins {
+                                               mdio = <&pio1 0 ALT1 OUT BYPASS 0>;
+                                               mdc = <&pio1 1 ALT1 OUT NICLK 0 CLK_A>;
+                                               mdint = <&pio1 3 ALT1 IN BYPASS 0>;
+                                       };
+                               };
+
+                               pinctrl_mii1: mii1 {
+                                       st,pins {
+                                               txd0 = <&pio0 0 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
+                                               txd1 = <&pio0 1 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
+                                               txd2 = <&pio0 2 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
+                                               txd3 = <&pio0 3 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
+                                               txer = <&pio0 4 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
+                                               txen = <&pio0 5 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
+                                               txclk = <&pio0 6 ALT1 IN NICLK 0 CLK_A>;
+                                               col = <&pio0 7 ALT1 IN BYPASS 1000>;
+
+                                               mdio = <&pio1 0 ALT1 OUT BYPASS 1500>;
+                                               mdc = <&pio1 1 ALT1 OUT NICLK 0 CLK_A>;
+                                               crs = <&pio1 2 ALT1 IN BYPASS 1000>;
+                                               mdint = <&pio1 3 ALT1 IN BYPASS 0>;
+                                               rxd0 = <&pio1 4 ALT1 IN SE_NICLK_IO 0 CLK_A>;
+                                               rxd1 = <&pio1 5 ALT1 IN SE_NICLK_IO 0 CLK_A>;
+                                               rxd2 = <&pio1 6 ALT1 IN SE_NICLK_IO 0 CLK_A>;
+                                               rxd3 = <&pio1 7 ALT1 IN SE_NICLK_IO 0 CLK_A>;
+
+                                               rxdv = <&pio2 0 ALT1 IN SE_NICLK_IO 0 CLK_A>;
+                                               rx_er = <&pio2 1 ALT1 IN SE_NICLK_IO 0 CLK_A>;
+                                               rxclk = <&pio2 2 ALT1 IN NICLK 0 CLK_A>;
+                                               phyclk = <&pio2 3 ALT1 OUT NICLK 0 CLK_A>;
+                                       };
+                               };
+                       };
+
+                       pwm1 {
+                               pinctrl_pwm1_chan0_default: pwm1-0-default {
+                                       st,pins {
+                                               pwm-out = <&pio3 0 ALT1 OUT>;
+                                       };
+                               };
+                               pinctrl_pwm1_chan1_default: pwm1-1-default {
+                                       st,pins {
+                                               pwm-out = <&pio4 4 ALT1 OUT>;
+                                       };
+                               };
+                               pinctrl_pwm1_chan2_default: pwm1-2-default {
+                                       st,pins {
+                                               pwm-out = <&pio4 6 ALT3 OUT>;
+                                       };
+                               };
+                               pinctrl_pwm1_chan3_default: pwm1-3-default {
+                                       st,pins {
+                                               pwm-out = <&pio4 7 ALT3 OUT>;
+                                       };
+                               };
+                       };
+               };
+
+               pin-controller-front0 {
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       compatible = "st,stih407-front-pinctrl";
+                       st,syscfg = <&syscfg_front>;
+                       reg = <0x0920f080 0x4>;
+                       reg-names = "irqmux";
+                       interrupts = <GIC_SPI 189 IRQ_TYPE_NONE>;
+                       interrupts-names = "irqmux";
+                       ranges = <0 0x09200000 0x10000>;
+
+                       pio10: pio@09200000 {
+                               gpio-controller;
+                               #gpio-cells = <1>;
+                               interrupt-controller;
+                               #interrupt-cells = <2>;
+                               reg = <0x0 0x100>;
+                               st,bank-name = "PIO10";
+                       };
+                       pio11: pio@09201000 {
+                               gpio-controller;
+                               #gpio-cells = <1>;
+                               interrupt-controller;
+                               #interrupt-cells = <2>;
+                               reg = <0x1000 0x100>;
+                               st,bank-name = "PIO11";
+                       };
+                       pio12: pio@09202000 {
+                               gpio-controller;
+                               #gpio-cells = <1>;
+                               interrupt-controller;
+                               #interrupt-cells = <2>;
+                               reg = <0x2000 0x100>;
+                               st,bank-name = "PIO12";
+                       };
+                       pio13: pio@09203000 {
+                               gpio-controller;
+                               #gpio-cells = <1>;
+                               interrupt-controller;
+                               #interrupt-cells = <2>;
+                               reg = <0x3000 0x100>;
+                               st,bank-name = "PIO13";
+                       };
+                       pio14: pio@09204000 {
+                               gpio-controller;
+                               #gpio-cells = <1>;
+                               interrupt-controller;
+                               #interrupt-cells = <2>;
+                               reg = <0x4000 0x100>;
+                               st,bank-name = "PIO14";
+                       };
+                       pio15: pio@09205000 {
+                               gpio-controller;
+                               #gpio-cells = <1>;
+                               interrupt-controller;
+                               #interrupt-cells = <2>;
+                               reg = <0x5000 0x100>;
+                               st,bank-name = "PIO15";
+                       };
+                       pio16: pio@09206000 {
+                               gpio-controller;
+                               #gpio-cells = <1>;
+                               interrupt-controller;
+                               #interrupt-cells = <2>;
+                               reg = <0x6000 0x100>;
+                               st,bank-name = "PIO16";
+                       };
+                       pio17: pio@09207000 {
+                               gpio-controller;
+                               #gpio-cells = <1>;
+                               interrupt-controller;
+                               #interrupt-cells = <2>;
+                               reg = <0x7000 0x100>;
+                               st,bank-name = "PIO17";
+                       };
+                       pio18: pio@09208000 {
+                               gpio-controller;
+                               #gpio-cells = <1>;
+                               interrupt-controller;
+                               #interrupt-cells = <2>;
+                               reg = <0x8000 0x100>;
+                               st,bank-name = "PIO18";
+                       };
+                       pio19: pio@09209000 {
+                               gpio-controller;
+                               #gpio-cells = <1>;
+                               interrupt-controller;
+                               #interrupt-cells = <2>;
+                               reg = <0x9000 0x100>;
+                               st,bank-name = "PIO19";
+                       };
+
+                       /* Comms */
+                       serial0 {
+                               pinctrl_serial0: serial0-0 {
+                                       st,pins {
+                                               tx = <&pio17 0 ALT1 OUT>;
+                                               rx = <&pio17 1 ALT1 IN>;
+                                       };
+                               };
+                       };
+
+                       serial1 {
+                               pinctrl_serial1: serial1-0 {
+                                       st,pins {
+                                               tx = <&pio16 0 ALT1 OUT>;
+                                               rx = <&pio16 1 ALT1 IN>;
+                                       };
+                               };
+                       };
+
+                       serial2 {
+                               pinctrl_serial2: serial2-0 {
+                                       st,pins {
+                                               tx = <&pio15 0 ALT1 OUT>;
+                                               rx = <&pio15 1 ALT1 IN>;
+                                       };
+                               };
+                       };
+
+                       mmc1 {
+                               pinctrl_sd1: sd1-0 {
+                                       st,pins {
+                                               sd_clk = <&pio19 3 ALT5 BIDIR NICLK 0 CLK_B>;
+                                               sd_cmd = <&pio19 2 ALT5 BIDIR_PU BYPASS 0>;
+                                               sd_dat0 = <&pio19 4 ALT5 BIDIR_PU BYPASS 0>;
+                                               sd_dat1 = <&pio19 5 ALT5 BIDIR_PU BYPASS 0>;
+                                               sd_dat2 = <&pio19 6 ALT5 BIDIR_PU BYPASS 0>;
+                                               sd_dat3 = <&pio19 7 ALT5 BIDIR_PU BYPASS 0>;
+                                               sd_led = <&pio16 6 ALT6 OUT>;
+                                               sd_pwren = <&pio16 7 ALT6 OUT>;
+                                               sd_cd = <&pio19 0 ALT6 IN>;
+                                               sd_wp = <&pio19 1 ALT6 IN>;
+                                       };
+                               };
+                       };
+
+
+                       i2c0 {
+                               pinctrl_i2c0_default: i2c0-default {
+                                       st,pins {
+                                               sda = <&pio10 6 ALT2 BIDIR>;
+                                               scl = <&pio10 5 ALT2 BIDIR>;
+                                       };
+                               };
+                       };
+
+                       i2c1 {
+                               pinctrl_i2c1_default: i2c1-default {
+                                       st,pins {
+                                               sda = <&pio11 1 ALT2 BIDIR>;
+                                               scl = <&pio11 0 ALT2 BIDIR>;
+                                       };
+                               };
+                       };
+
+                       i2c2 {
+                               pinctrl_i2c2_default: i2c2-default {
+                                       st,pins {
+                                               sda = <&pio15 6 ALT2 BIDIR>;
+                                               scl = <&pio15 5 ALT2 BIDIR>;
+                                       };
+                               };
+                       };
+
+                       i2c3 {
+                               pinctrl_i2c3_default: i2c3-default {
+                                       st,pins {
+                                               sda = <&pio18 6 ALT1 BIDIR>;
+                                               scl = <&pio18 5 ALT1 BIDIR>;
+                                       };
+                               };
+                       };
+
+                       spi0 {
+                               pinctrl_spi0_default: spi0-default {
+                                       st,pins {
+                                               mtsr = <&pio12 6 ALT2 BIDIR>;
+                                               mrst = <&pio12 7 ALT2 BIDIR>;
+                                               scl = <&pio12 5 ALT2 BIDIR>;
+                                       };
+                               };
+                       };
+               };
+
+               pin-controller-front1 {
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       compatible = "st,stih407-front-pinctrl";
+                       st,syscfg = <&syscfg_front>;
+                       reg = <0x0921f080 0x4>;
+                       reg-names = "irqmux";
+                       interrupts = <GIC_SPI 190 IRQ_TYPE_NONE>;
+                       interrupts-names = "irqmux";
+                       ranges = <0 0x09210000 0x10000>;
+
+                       pio20: pio@09210000 {
+                               gpio-controller;
+                               #gpio-cells = <1>;
+                               interrupt-controller;
+                               #interrupt-cells = <2>;
+                               reg = <0x0 0x100>;
+                               st,bank-name = "PIO20";
+                       };
+               };
+
+               pin-controller-rear {
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       compatible = "st,stih407-rear-pinctrl";
+                       st,syscfg = <&syscfg_rear>;
+                       reg = <0x0922f080 0x4>;
+                       reg-names = "irqmux";
+                       interrupts = <GIC_SPI 191 IRQ_TYPE_NONE>;
+                       interrupts-names = "irqmux";
+                       ranges = <0 0x09220000 0x6000>;
+
+                       pio30: gpio@09220000 {
+                               gpio-controller;
+                               #gpio-cells = <1>;
+                               interrupt-controller;
+                               #interrupt-cells = <2>;
+                               reg = <0x0 0x100>;
+                               st,bank-name = "PIO30";
+                       };
+                       pio31: gpio@09221000 {
+                               gpio-controller;
+                               #gpio-cells = <1>;
+                               interrupt-controller;
+                               #interrupt-cells = <2>;
+                               reg = <0x1000 0x100>;
+                               st,bank-name = "PIO31";
+                       };
+                       pio32: gpio@09222000 {
+                               gpio-controller;
+                               #gpio-cells = <1>;
+                               interrupt-controller;
+                               #interrupt-cells = <2>;
+                               reg = <0x2000 0x100>;
+                               st,bank-name = "PIO32";
+                       };
+                       pio33: gpio@09223000 {
+                               gpio-controller;
+                               #gpio-cells = <1>;
+                               interrupt-controller;
+                               #interrupt-cells = <2>;
+                               reg = <0x3000 0x100>;
+                               st,bank-name = "PIO33";
+                       };
+                       pio34: gpio@09224000 {
+                               gpio-controller;
+                               #gpio-cells = <1>;
+                               interrupt-controller;
+                               #interrupt-cells = <2>;
+                               reg = <0x4000 0x100>;
+                               st,bank-name = "PIO34";
+                       };
+                       pio35: gpio@09225000 {
+                               gpio-controller;
+                               #gpio-cells = <1>;
+                               interrupt-controller;
+                               #interrupt-cells = <2>;
+                               reg = <0x5000 0x100>;
+                               st,bank-name = "PIO35";
+                       };
+
+                       i2c4 {
+                               pinctrl_i2c4_default: i2c4-default {
+                                       st,pins {
+                                               sda = <&pio30 1 ALT1 BIDIR>;
+                                               scl = <&pio30 0 ALT1 BIDIR>;
+                                       };
+                               };
+                       };
+
+                       i2c5 {
+                               pinctrl_i2c5_default: i2c5-default {
+                                       st,pins {
+                                               sda = <&pio34 4 ALT1 BIDIR>;
+                                               scl = <&pio34 3 ALT1 BIDIR>;
+                                       };
+                               };
+                       };
+
+                       usb3 {
+                               pinctrl_usb3: usb3-2 {
+                                       st,pins {
+                                               usb-oc-detect = <&pio35 4 ALT1 IN>;
+                                               usb-pwr-enable = <&pio35 5 ALT1 OUT>;
+                                               usb-vbus-valid = <&pio35 6 ALT1 IN>;
+                                       };
+                               };
+                       };
+
+                       pwm0 {
+                               pinctrl_pwm0_chan0_default: pwm0-0-default {
+                                       st,pins {
+                                               pwm-out = <&pio31 1 ALT1 OUT>;
+                                       };
+                               };
+                       };
+               };
+
+               pin-controller-flash {
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       compatible = "st,stih407-flash-pinctrl";
+                       st,syscfg = <&syscfg_flash>;
+                       reg = <0x0923f080 0x4>;
+                       reg-names = "irqmux";
+                       interrupts = <GIC_SPI 192 IRQ_TYPE_NONE>;
+                       interrupts-names = "irqmux";
+                       ranges = <0 0x09230000 0x3000>;
+
+                       pio40: gpio@09230000 {
+                               gpio-controller;
+                               #gpio-cells = <1>;
+                               interrupt-controller;
+                               #interrupt-cells = <2>;
+                               reg = <0 0x100>;
+                               st,bank-name = "PIO40";
+                       };
+                       pio41: gpio@09231000 {
+                               gpio-controller;
+                               #gpio-cells = <1>;
+                               interrupt-controller;
+                               #interrupt-cells = <2>;
+                               reg = <0x1000 0x100>;
+                               st,bank-name = "PIO41";
+                       };
+                       pio42: gpio@09232000 {
+                               gpio-controller;
+                               #gpio-cells = <1>;
+                               interrupt-controller;
+                               #interrupt-cells = <2>;
+                               reg = <0x2000 0x100>;
+                               st,bank-name = "PIO42";
+                       };
+
+                       mmc0 {
+                               pinctrl_mmc0: mmc0-0 {
+                                       st,pins {
+                                               emmc_clk = <&pio40 6 ALT1 BIDIR>;
+                                               emmc_cmd = <&pio40 7 ALT1 BIDIR_PU>;
+                                               emmc_d0 = <&pio41 0 ALT1 BIDIR_PU>;
+                                               emmc_d1 = <&pio41 1 ALT1 BIDIR_PU>;
+                                               emmc_d2 = <&pio41 2 ALT1 BIDIR_PU>;
+                                               emmc_d3 = <&pio41 3 ALT1 BIDIR_PU>;
+                                               emmc_d4 = <&pio41 4 ALT1 BIDIR_PU>;
+                                               emmc_d5 = <&pio41 5 ALT1 BIDIR_PU>;
+                                               emmc_d6 = <&pio41 6 ALT1 BIDIR_PU>;
+                                               emmc_d7 = <&pio41 7 ALT1 BIDIR_PU>;
+                                       };
+                               };
+                       };
+               };
+       };
+};
diff --git a/arch/arm/boot/dts/stih407.dtsi b/arch/arm/boot/dts/stih407.dtsi
new file mode 100644 (file)
index 0000000..4f9024f
--- /dev/null
@@ -0,0 +1,263 @@
+/*
+ * Copyright (C) 2014 STMicroelectronics Limited.
+ * Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * publishhed by the Free Software Foundation.
+ */
+#include "stih407-clock.dtsi"
+#include "stih407-pinctrl.dtsi"
+/ {
+       #address-cells = <1>;
+       #size-cells = <1>;
+
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               cpu@0 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a9";
+                       reg = <0>;
+               };
+               cpu@1 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a9";
+                       reg = <1>;
+               };
+       };
+
+       intc: interrupt-controller@08761000 {
+               compatible = "arm,cortex-a9-gic";
+               #interrupt-cells = <3>;
+               interrupt-controller;
+               reg = <0x08761000 0x1000>, <0x08760100 0x100>;
+       };
+
+       scu@08760000 {
+               compatible = "arm,cortex-a9-scu";
+               reg = <0x08760000 0x1000>;
+       };
+
+       timer@08760200 {
+               interrupt-parent = <&intc>;
+               compatible = "arm,cortex-a9-global-timer";
+               reg = <0x08760200 0x100>;
+               interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&arm_periph_clk>;
+       };
+
+       l2: cache-controller {
+               compatible = "arm,pl310-cache";
+               reg = <0x08762000 0x1000>;
+               arm,data-latency = <3 3 3>;
+               arm,tag-latency = <2 2 2>;
+               cache-unified;
+               cache-level = <2>;
+       };
+
+       soc {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               interrupt-parent = <&intc>;
+               ranges;
+               compatible = "simple-bus";
+
+               syscfg_sbc: sbc-syscfg@9620000 {
+                       compatible = "st,stih407-sbc-syscfg", "syscon";
+                       reg = <0x9620000 0x1000>;
+               };
+
+               syscfg_front: front-syscfg@9280000 {
+                       compatible = "st,stih407-front-syscfg", "syscon";
+                       reg = <0x9280000 0x1000>;
+               };
+
+               syscfg_rear: rear-syscfg@9290000 {
+                       compatible = "st,stih407-rear-syscfg", "syscon";
+                       reg = <0x9290000 0x1000>;
+               };
+
+               syscfg_flash: flash-syscfg@92a0000 {
+                       compatible = "st,stih407-flash-syscfg", "syscon";
+                       reg = <0x92a0000 0x1000>;
+               };
+
+               syscfg_sbc_reg: fvdp-lite-syscfg@9600000 {
+                       compatible = "st,stih407-sbc-reg-syscfg", "syscon";
+                       reg = <0x9600000 0x1000>;
+               };
+
+               syscfg_core: core-syscfg@92b0000 {
+                       compatible = "st,stih407-core-syscfg", "syscon";
+                       reg = <0x92b0000 0x1000>;
+               };
+
+               syscfg_lpm: lpm-syscfg@94b5100 {
+                       compatible = "st,stih407-lpm-syscfg", "syscon";
+                       reg = <0x94b5100 0x1000>;
+               };
+
+               serial@9830000 {
+                       compatible = "st,asc";
+                       reg = <0x9830000 0x2c>;
+                       interrupts = <GIC_SPI 122 IRQ_TYPE_NONE>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_serial0>;
+                       clocks = <&clk_ext2f_a9>;
+
+                       status = "disabled";
+               };
+
+               serial@9831000 {
+                       compatible = "st,asc";
+                       reg = <0x9831000 0x2c>;
+                       interrupts = <GIC_SPI 123 IRQ_TYPE_NONE>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_serial1>;
+                       clocks = <&clk_ext2f_a9>;
+
+                       status = "disabled";
+               };
+
+               serial@9832000 {
+                       compatible = "st,asc";
+                       reg = <0x9832000 0x2c>;
+                       interrupts = <GIC_SPI 124 IRQ_TYPE_NONE>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_serial2>;
+                       clocks = <&clk_ext2f_a9>;
+
+                       status = "disabled";
+               };
+
+               /* SBC_ASC0 - UART10 */
+               sbc_serial0: serial@9530000 {
+                       compatible = "st,asc";
+                       reg = <0x9530000 0x2c>;
+                       interrupts = <GIC_SPI 138 IRQ_TYPE_NONE>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_sbc_serial0>;
+                       clocks = <&clk_sysin>;
+
+                       status = "disabled";
+               };
+
+               serial@9531000 {
+                       compatible = "st,asc";
+                       reg = <0x9531000 0x2c>;
+                       interrupts = <GIC_SPI 139 IRQ_TYPE_NONE>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_sbc_serial1>;
+                       clocks = <&clk_sysin>;
+
+                       status = "disabled";
+               };
+
+               i2c@9840000 {
+                       compatible = "st,comms-ssc4-i2c";
+                       interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+                       reg = <0x9840000 0x110>;
+                       clocks = <&clk_ext2f_a9>;
+                       clock-names = "ssc";
+                       clock-frequency = <400000>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_i2c0_default>;
+
+                       status = "disabled";
+               };
+
+               i2c@9841000 {
+                       compatible = "st,comms-ssc4-i2c";
+                       reg = <0x9841000 0x110>;
+                       interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clk_ext2f_a9>;
+                       clock-names = "ssc";
+                       clock-frequency = <400000>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_i2c1_default>;
+
+                       status = "disabled";
+               };
+
+               i2c@9842000 {
+                       compatible = "st,comms-ssc4-i2c";
+                       reg = <0x9842000 0x110>;
+                       interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clk_ext2f_a9>;
+                       clock-names = "ssc";
+                       clock-frequency = <400000>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_i2c2_default>;
+
+                       status = "disabled";
+               };
+
+               i2c@9843000 {
+                       compatible = "st,comms-ssc4-i2c";
+                       reg = <0x9843000 0x110>;
+                       interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clk_ext2f_a9>;
+                       clock-names = "ssc";
+                       clock-frequency = <400000>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_i2c3_default>;
+
+                       status = "disabled";
+               };
+
+               i2c@9844000 {
+                       compatible = "st,comms-ssc4-i2c";
+                       reg = <0x9844000 0x110>;
+                       interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clk_ext2f_a9>;
+                       clock-names = "ssc";
+                       clock-frequency = <400000>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_i2c4_default>;
+
+                       status = "disabled";
+               };
+
+               i2c@9845000 {
+                       compatible = "st,comms-ssc4-i2c";
+                       reg = <0x9845000 0x110>;
+                       interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clk_ext2f_a9>;
+                       clock-names = "ssc";
+                       clock-frequency = <400000>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_i2c5_default>;
+
+                       status = "disabled";
+               };
+
+
+               /* SSCs on SBC */
+               i2c@9540000 {
+                       compatible = "st,comms-ssc4-i2c";
+                       reg = <0x9540000 0x110>;
+                       interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clk_sysin>;
+                       clock-names = "ssc";
+                       clock-frequency = <400000>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_i2c10_default>;
+
+                       status = "disabled";
+               };
+
+               i2c@9541000 {
+                       compatible = "st,comms-ssc4-i2c";
+                       reg = <0x9541000 0x110>;
+                       interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clk_sysin>;
+                       clock-names = "ssc";
+                       clock-frequency = <400000>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_i2c11_default>;
+
+                       status = "disabled";
+               };
+       };
+};
index d4af53160435f02f7a1fb3b6dd4788893b092ecb..bdfbd3765db2a48c6cd775b04d4e08e91f381f93 100644 (file)
@@ -11,5 +11,5 @@
 #include "stih41x-b2000.dtsi"
 / {
        model = "STiH415 B2000 Board";
-       compatible = "st,stih415", "st,stih415-b2000";
+       compatible = "st,stih415-b2000", "st,stih415";
 };
index 442b019e9a3a40da7f84031bdf5090a155719e7a..71903a87bd3151484bf152b1e06f04b07312d1f5 100644 (file)
@@ -11,5 +11,5 @@
 #include "stih41x-b2020.dtsi"
 / {
        model = "STiH415 B2020 Board";
-       compatible = "st,stih415", "st,stih415-b2020";
+       compatible = "st,stih415-b2020", "st,stih415";
 };
index d047dbc28d61ece8e763833ba6e1c76af9bfc2a0..3ee34514bc4b0f30d51884664c25c97b169c8dea 100644 (file)
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
+
+#include <dt-bindings/clock/stih415-clks.h>
+
 / {
        clocks {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
                /*
                 * Fixed 30MHz oscillator input to SoC
                 */
-               CLK_SYSIN: CLK_SYSIN {
+               clk_sysin: clk-sysin {
                        #clock-cells = <0>;
                        compatible = "fixed-clock";
                        clock-frequency = <30000000>;
                };
 
                /*
-                * ARM Peripheral clock for timers
+                * ClockGenAs on SASG1
                 */
-               arm_periph_clk: arm_periph_clk {
-                       #clock-cells = <0>;
-                       compatible = "fixed-clock";
-                       clock-frequency = <500000000>;
+               clockgen-a@fee62000 {
+                       reg = <0xfee62000 0xb48>;
+
+                       clk_s_a0_pll: clk-s-a0-pll {
+                               #clock-cells = <1>;
+                               compatible = "st,clkgena-plls-c65";
+
+                               clocks = <&clk_sysin>;
+
+                               clock-output-names = "clk-s-a0-pll0-hs",
+                                                    "clk-s-a0-pll0-ls",
+                                                    "clk-s-a0-pll1";
+                       };
+
+                       clk_s_a0_osc_prediv: clk-s-a0-osc-prediv {
+                               #clock-cells = <0>;
+                               compatible = "st,clkgena-prediv-c65",
+                                            "st,clkgena-prediv";
+
+                               clocks = <&clk_sysin>;
+
+                               clock-output-names = "clk-s-a0-osc-prediv";
+                       };
+
+                       clk_s_a0_hs: clk-s-a0-hs {
+                               #clock-cells = <1>;
+                               compatible = "st,clkgena-divmux-c65-hs",
+                                            "st,clkgena-divmux";
+
+                               clocks = <&clk_s_a0_osc_prediv>,
+                                        <&clk_s_a0_pll 0>, /* PLL0 HS */
+                                        <&clk_s_a0_pll 2>; /* PLL1 */
+
+                               clock-output-names = "clk-s-fdma-0",
+                                                    "clk-s-fdma-1",
+                                                    ""; /* clk-s-jit-sense */
+                                                    /* Fourth output unused */
+                       };
+
+                       clk_s_a0_ls: clk-s-a0-ls {
+                               #clock-cells = <1>;
+                               compatible = "st,clkgena-divmux-c65-ls",
+                                            "st,clkgena-divmux";
+
+                               clocks = <&clk_s_a0_osc_prediv>,
+                                        <&clk_s_a0_pll 1>, /* PLL0 LS */
+                                        <&clk_s_a0_pll 2>; /* PLL1 */
+
+                               clock-output-names = "clk-s-icn-reg-0",
+                                                    "clk-s-icn-if-0",
+                                                    "clk-s-icn-reg-lp-0",
+                                                    "clk-s-emiss",
+                                                    "clk-s-eth1-phy",
+                                                    "clk-s-mii-ref-out";
+                                                /* Remaining outputs unused */
+                       };
+               };
+
+               clockgen-a@fee81000 {
+                       reg = <0xfee81000 0xb48>;
+
+                       clk_s_a1_pll: clk-s-a1-pll {
+                               #clock-cells = <1>;
+                               compatible = "st,clkgena-plls-c65";
+
+                               clocks = <&clk_sysin>;
+
+                               clock-output-names = "clk-s-a1-pll0-hs",
+                                                    "clk-s-a1-pll0-ls",
+                                                    "clk-s-a1-pll1";
+                       };
+
+                       clk_s_a1_osc_prediv: clk-s-a1-osc-prediv {
+                               #clock-cells = <0>;
+                               compatible = "st,clkgena-prediv-c65",
+                                            "st,clkgena-prediv";
+
+                               clocks = <&clk_sysin>;
+
+                               clock-output-names = "clk-s-a1-osc-prediv";
+                       };
+
+                       clk_s_a1_hs: clk-s-a1-hs {
+                               #clock-cells = <1>;
+                               compatible = "st,clkgena-divmux-c65-hs",
+                                            "st,clkgena-divmux";
+
+                               clocks = <&clk_s_a1_osc_prediv>,
+                                        <&clk_s_a1_pll 0>, /* PLL0 HS */
+                                        <&clk_s_a1_pll 2>; /* PLL1 */
+
+                               clock-output-names = "", /* Reserved */
+                                                    "", /* Reserved */
+                                                    "clk-s-stac-phy",
+                                                    "clk-s-vtac-tx-phy";
+                       };
+
+                       clk_s_a1_ls: clk-s-a1-ls {
+                               #clock-cells = <1>;
+                               compatible = "st,clkgena-divmux-c65-ls",
+                                            "st,clkgena-divmux";
+
+                               clocks = <&clk_s_a1_osc_prediv>,
+                                        <&clk_s_a1_pll 1>, /* PLL0 LS */
+                                        <&clk_s_a1_pll 2>; /* PLL1 */
+
+                               clock-output-names = "clk-s-icn-if-2",
+                                                    "clk-s-card-mmc",
+                                                    "clk-s-icn-if-1",
+                                                    "clk-s-gmac0-phy",
+                                                    "clk-s-nand-ctrl",
+                                                    "", /* Reserved */
+                                                    "clk-s-mii0-ref-out",
+                                                    ""; /* clk-s-stac-sys */
+                                                /* Remaining outputs unused */
+                       };
                };
 
                /*
-                * Bootloader initialized system infrastructure clock for
-                * serial devices.
+                * ClockGenAs on MPE41
                 */
-               CLKS_ICN_REG_0: CLKS_ICN_REG_0 {
+               clockgen-a@fde12000 {
+                       reg = <0xfde12000 0xb50>;
+
+                       clk_m_a0_pll0: clk-m-a0-pll0 {
+                               #clock-cells = <1>;
+                               compatible = "st,plls-c32-a1x-0", "st,clkgen-plls-c32";
+
+                               clocks = <&clk_sysin>;
+
+                               clock-output-names = "clk-m-a0-pll0-phi0",
+                                                    "clk-m-a0-pll0-phi1",
+                                                    "clk-m-a0-pll0-phi2",
+                                                    "clk-m-a0-pll0-phi3";
+                       };
+
+                       clk_m_a0_pll1: clk-m-a0-pll1 {
+                               #clock-cells = <1>;
+                               compatible = "st,plls-c32-a1x-1", "st,clkgen-plls-c32";
+
+                               clocks = <&clk_sysin>;
+
+                               clock-output-names = "clk-m-a0-pll1-phi0",
+                                                    "clk-m-a0-pll1-phi1",
+                                                    "clk-m-a0-pll1-phi2",
+                                                    "clk-m-a0-pll1-phi3";
+                       };
+
+                       clk_m_a0_osc_prediv: clk-m-a0-osc-prediv {
+                               #clock-cells = <0>;
+                               compatible = "st,clkgena-prediv-c32",
+                                            "st,clkgena-prediv";
+
+                               clocks = <&clk_sysin>;
+
+                               clock-output-names = "clk-m-a0-osc-prediv";
+                       };
+
+                       clk_m_a0_div0: clk-m-a0-div0 {
+                               #clock-cells = <1>;
+                               compatible = "st,clkgena-divmux-c32-odf0",
+                                            "st,clkgena-divmux";
+
+                               clocks = <&clk_m_a0_osc_prediv>,
+                                        <&clk_m_a0_pll0 0>, /* PLL0 PHI0 */
+                                        <&clk_m_a0_pll1 0>; /* PLL1 PHI0 */
+
+                               clock-output-names = "clk-m-apb-pm", /* Unused */
+                                                    "", /* Unused */
+                                                    "", /* Unused */
+                                                    "", /* Unused */
+                                                    "clk-m-pp-dmu-0",
+                                                    "clk-m-pp-dmu-1",
+                                                    "clk-m-icm-disp",
+                                                    ""; /* Unused */
+                       };
+
+                       clk_m_a0_div1: clk-m-a0-div1 {
+                               #clock-cells = <1>;
+                               compatible = "st,clkgena-divmux-c32-odf1",
+                                            "st,clkgena-divmux";
+
+                               clocks = <&clk_m_a0_osc_prediv>,
+                                        <&clk_m_a0_pll0 1>, /* PLL0 PHI1 */
+                                        <&clk_m_a0_pll1 1>; /* PLL1 PHI1 */
+
+                               clock-output-names = "", /* Unused */
+                                                    "", /* Unused */
+                                                    "clk-m-a9-ext2f",
+                                                    "clk-m-st40rt",
+                                                    "clk-m-st231-dmu-0",
+                                                    "clk-m-st231-dmu-1",
+                                                    "clk-m-st231-aud",
+                                                    "clk-m-st231-gp-0";
+                       };
+
+                       clk_m_a0_div2: clk-m-a0-div2 {
+                               #clock-cells = <1>;
+                               compatible = "st,clkgena-divmux-c32-odf2",
+                                            "st,clkgena-divmux";
+
+                               clocks = <&clk_m_a0_osc_prediv>,
+                                        <&clk_m_a0_pll0 2>, /* PLL0 PHI2 */
+                                        <&clk_m_a0_pll1 2>; /* PLL1 PHI2 */
+
+                               clock-output-names = "clk-m-st231-gp-1",
+                                                    "clk-m-icn-cpu",
+                                                    "clk-m-icn-stac",
+                                                    "clk-m-icn-dmu-0",
+                                                    "clk-m-icn-dmu-1",
+                                                    "", /* Unused */
+                                                    "", /* Unused */
+                                                    ""; /* Unused */
+                       };
+
+                       clk_m_a0_div3: clk-m-a0-div3 {
+                               #clock-cells = <1>;
+                               compatible = "st,clkgena-divmux-c32-odf3",
+                                            "st,clkgena-divmux";
+
+                               clocks = <&clk_m_a0_osc_prediv>,
+                                        <&clk_m_a0_pll0 3>, /* PLL0 PHI3 */
+                                        <&clk_m_a0_pll1 3>; /* PLL1 PHI3 */
+
+                               clock-output-names = "", /* Unused */
+                                                    "", /* Unused */
+                                                    "", /* Unused */
+                                                    "", /* Unused */
+                                                    "", /* Unused */
+                                                    "", /* Unused */
+                                                    "clk-m-icn-eram",
+                                                    "clk-m-a9-trace";
+                       };
+               };
+
+               clockgen-a@fd6db000 {
+                       reg = <0xfd6db000 0xb50>;
+
+                       clk_m_a1_pll0: clk-m-a1-pll0 {
+                               #clock-cells = <1>;
+                               compatible = "st,plls-c32-a1x-0", "st,clkgen-plls-c32";
+
+                               clocks = <&clk_sysin>;
+
+                               clock-output-names = "clk-m-a1-pll0-phi0",
+                                                    "clk-m-a1-pll0-phi1",
+                                                    "clk-m-a1-pll0-phi2",
+                                                    "clk-m-a1-pll0-phi3";
+                       };
+
+                       clk_m_a1_pll1: clk-m-a1-pll1 {
+                               #clock-cells = <1>;
+                               compatible = "st,plls-c32-a1x-1", "st,clkgen-plls-c32";
+
+                               clocks = <&clk_sysin>;
+
+                               clock-output-names = "clk-m-a1-pll1-phi0",
+                                                    "clk-m-a1-pll1-phi1",
+                                                    "clk-m-a1-pll1-phi2",
+                                                    "clk-m-a1-pll1-phi3";
+                       };
+
+                       clk_m_a1_osc_prediv: clk-m-a1-osc-prediv {
+                               #clock-cells = <0>;
+                               compatible = "st,clkgena-prediv-c32",
+                                            "st,clkgena-prediv";
+
+                               clocks = <&clk_sysin>;
+
+                               clock-output-names = "clk-m-a1-osc-prediv";
+                       };
+
+                       clk_m_a1_div0: clk-m-a1-div0 {
+                               #clock-cells = <1>;
+                               compatible = "st,clkgena-divmux-c32-odf0",
+                                            "st,clkgena-divmux";
+
+                               clocks = <&clk_m_a1_osc_prediv>,
+                                        <&clk_m_a1_pll0 0>, /* PLL0 PHI0 */
+                                        <&clk_m_a1_pll1 0>; /* PLL1 PHI0 */
+
+                               clock-output-names = "clk-m-fdma-12",
+                                                    "clk-m-fdma-10",
+                                                    "clk-m-fdma-11",
+                                                    "clk-m-hva-lmi",
+                                                    "clk-m-proc-sc",
+                                                    "clk-m-tp",
+                                                    "clk-m-icn-gpu",
+                                                    "clk-m-icn-vdp-0";
+                       };
+
+                       clk_m_a1_div1: clk-m-a1-div1 {
+                               #clock-cells = <1>;
+                               compatible = "st,clkgena-divmux-c32-odf1",
+                                            "st,clkgena-divmux";
+
+                               clocks = <&clk_m_a1_osc_prediv>,
+                                        <&clk_m_a1_pll0 1>, /* PLL0 PHI1 */
+                                        <&clk_m_a1_pll1 1>; /* PLL1 PHI1 */
+
+                               clock-output-names = "clk-m-icn-vdp-1",
+                                                    "clk-m-icn-vdp-2",
+                                                    "clk-m-icn-vdp-3",
+                                                    "clk-m-prv-t1-bus",
+                                                    "clk-m-icn-vdp-4",
+                                                    "clk-m-icn-reg-10",
+                                                    "", /* Unused */
+                                                    ""; /* clk-m-icn-st231 */
+                       };
+
+                       clk_m_a1_div2: clk-m-a1-div2 {
+                               #clock-cells = <1>;
+                               compatible = "st,clkgena-divmux-c32-odf2",
+                                            "st,clkgena-divmux";
+
+                               clocks = <&clk_m_a1_osc_prediv>,
+                                        <&clk_m_a1_pll0 2>, /* PLL0 PHI2 */
+                                        <&clk_m_a1_pll1 2>; /* PLL1 PHI2 */
+
+                               clock-output-names = "clk-m-fvdp-proc-alt",
+                                                    "", /* Unused */
+                                                    "", /* Unused */
+                                                    "", /* Unused */
+                                                    "", /* Unused */
+                                                    "", /* Unused */
+                                                    "", /* Unused */
+                                                    ""; /* Unused */
+                       };
+
+                       clk_m_a1_div3: clk-m-a1-div3 {
+                               #clock-cells = <1>;
+                               compatible = "st,clkgena-divmux-c32-odf3",
+                                            "st,clkgena-divmux";
+
+                               clocks = <&clk_m_a1_osc_prediv>,
+                                        <&clk_m_a1_pll0 3>, /* PLL0 PHI3 */
+                                        <&clk_m_a1_pll1 3>; /* PLL1 PHI3 */
+
+                               clock-output-names = "", /* Unused */
+                                                    "", /* Unused */
+                                                    "", /* Unused */
+                                                    "", /* Unused */
+                                                    "", /* Unused */
+                                                    "", /* Unused */
+                                                    "", /* Unused */
+                                                    ""; /* Unused */
+                       };
+               };
+
+               clk_m_a9_ext2f_div2: clk-m-a9-ext2f-div2 {
                        #clock-cells = <0>;
-                       compatible = "fixed-clock";
-                       clock-frequency = <100000000>;
+                       compatible = "fixed-factor-clock";
+                       clocks = <&clk_m_a0_div1 2>;
+                       clock-div = <2>;
+                       clock-mult = <1>;
                };
 
-               CLKS_GMAC0_PHY: clockgenA1@7 {
+               clockgen-a@fd345000 {
+                       reg = <0xfd345000 0xb50>;
+
+                       clk_m_a2_pll0: clk-m-a2-pll0 {
+                               #clock-cells = <1>;
+                               compatible = "st,plls-c32-a1x-0", "st,clkgen-plls-c32";
+
+                               clocks = <&clk_sysin>;
+
+                               clock-output-names = "clk-m-a2-pll0-phi0",
+                                                    "clk-m-a2-pll0-phi1",
+                                                    "clk-m-a2-pll0-phi2",
+                                                    "clk-m-a2-pll0-phi3";
+                       };
+
+                       clk_m_a2_pll1: clk-m-a2-pll1 {
+                               #clock-cells = <1>;
+                               compatible = "st,plls-c32-a1x-1", "st,clkgen-plls-c32";
+
+                               clocks = <&clk_sysin>;
+
+                               clock-output-names = "clk-m-a2-pll1-phi0",
+                                                    "clk-m-a2-pll1-phi1",
+                                                    "clk-m-a2-pll1-phi2",
+                                                    "clk-m-a2-pll1-phi3";
+                       };
+
+                       clk_m_a2_osc_prediv: clk-m-a2-osc-prediv {
+                               #clock-cells = <0>;
+                               compatible = "st,clkgena-prediv-c32",
+                                            "st,clkgena-prediv";
+
+                               clocks = <&clk_sysin>;
+
+                               clock-output-names = "clk-m-a2-osc-prediv";
+                       };
+
+                       clk_m_a2_div0: clk-m-a2-div0 {
+                               #clock-cells = <1>;
+                               compatible = "st,clkgena-divmux-c32-odf0",
+                                            "st,clkgena-divmux";
+
+                               clocks = <&clk_m_a2_osc_prediv>,
+                                        <&clk_m_a2_pll0 0>, /* PLL0 PHI0 */
+                                        <&clk_m_a2_pll1 0>; /* PLL1 PHI0 */
+
+                               clock-output-names = "clk-m-vtac-main-phy",
+                                                    "clk-m-vtac-aux-phy",
+                                                    "clk-m-stac-phy",
+                                                    "clk-m-stac-sys",
+                                                    "", /* clk-m-mpestac-pg */
+                                                    "", /* clk-m-mpestac-wc */
+                                                    "", /* clk-m-mpevtacaux-pg*/
+                                                    ""; /* clk-m-mpevtacmain-pg*/
+                       };
+
+                       clk_m_a2_div1: clk-m-a2-div1 {
+                               #clock-cells = <1>;
+                               compatible = "st,clkgena-divmux-c32-odf1",
+                                            "st,clkgena-divmux";
+
+                               clocks = <&clk_m_a2_osc_prediv>,
+                                        <&clk_m_a2_pll0 1>, /* PLL0 PHI1 */
+                                        <&clk_m_a2_pll1 1>; /* PLL1 PHI1 */
+
+                               clock-output-names = "", /* clk-m-mpevtacrx0-wc */
+                                                    "", /* clk-m-mpevtacrx1-wc */
+                                                    "clk-m-compo-main",
+                                                    "clk-m-compo-aux",
+                                                    "clk-m-bdisp-0",
+                                                    "clk-m-bdisp-1",
+                                                    "clk-m-icn-bdisp-0",
+                                                    "clk-m-icn-bdisp-1";
+                       };
+
+                       clk_m_a2_div2: clk-m-a2-div2 {
+                               #clock-cells = <1>;
+                               compatible = "st,clkgena-divmux-c32-odf2",
+                                            "st,clkgena-divmux";
+
+                               clocks = <&clk_m_a2_osc_prediv>,
+                                        <&clk_m_a2_pll0 2>, /* PLL0 PHI2 */
+                                        <&clk_m_a2_pll1 2>; /* PLL1 PHI2 */
+
+                               clock-output-names = "", /* clk-m-icn-hqvdp0 */
+                                                    "", /* clk-m-icn-hqvdp1 */
+                                                    "clk-m-icn-compo",
+                                                    "", /* clk-m-icn-vdpaux */
+                                                    "clk-m-icn-ts",
+                                                    "clk-m-icn-reg-lp-10",
+                                                    "clk-m-dcephy-impctrl",
+                                                    ""; /* Unused */
+                       };
+
+                       clk_m_a2_div3: clk-m-a2-div3 {
+                               #clock-cells = <1>;
+                               compatible = "st,clkgena-divmux-c32-odf3",
+                                            "st,clkgena-divmux";
+
+                               clocks = <&clk_m_a2_osc_prediv>,
+                                        <&clk_m_a2_pll0 3>, /* PLL0 PHI3 */
+                                        <&clk_m_a2_pll1 3>; /* PLL1 PHI3 */
+
+                               clock-output-names = ""; /* Unused */
+                                               /* Remaining outputs unused */
+                       };
+               };
+
+               /*
+                * A9 PLL
+                */
+               clockgen-a9@fdde00d8 {
+                       reg = <0xfdde00d8 0x70>;
+
+                       clockgen_a9_pll: clockgen-a9-pll {
+                               #clock-cells = <1>;
+                               compatible = "st,stih415-plls-c32-a9", "st,clkgen-plls-c32";
+
+                               clocks = <&clk_sysin>;
+                               clock-output-names = "clockgen-a9-pll-odf";
+                       };
+               };
+
+               /*
+                * ARM CPU related clocks
+                */
+               clk_m_a9: clk-m-a9@fdde00d8 {
                        #clock-cells = <0>;
-                       compatible = "fixed-clock";
-                       clock-frequency = <25000000>;
-                       clock-output-names = "CLKS_GMAC0_PHY";
+                       compatible = "st,stih415-clkgen-a9-mux", "st,clkgen-mux";
+                       reg = <0xfdde00d8 0x4>;
+                       clocks = <&clockgen_a9_pll 0>,
+                                <&clockgen_a9_pll 0>,
+                                <&clk_m_a0_div1 2>,
+                                <&clk_m_a9_ext2f_div2>;
                };
 
-               CLKS_ETH1_PHY: clockgenA0@7 {
+               /*
+                * ARM Peripheral clock for timers
+                */
+               arm_periph_clk: clk-m-a9-periphs {
                        #clock-cells = <0>;
-                       compatible = "fixed-clock";
-                       clock-frequency = <25000000>;
-                       clock-output-names = "CLKS_ETH1_PHY";
+                       compatible = "fixed-factor-clock";
+                       clocks = <&clk_m_a9>;
+                       clock-div = <2>;
+                       clock-mult = <1>;
                };
        };
 };
index f09fb10a3791a7e4fc238f4e47548fc7f86da705..8509a037ae2193d8da6ab290b7bf256313328dab 100644 (file)
@@ -49,7 +49,7 @@
                        reg             = <0xfe61f080 0x4>;
                        reg-names       = "irqmux";
                        interrupts      = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
-                       interrupts-names = "irqmux";
+                       interrupt-names = "irqmux";
                        ranges          = <0 0xfe610000 0x5000>;
 
                        PIO0: gpio@fe610000 {
                                };
                        };
 
+                       keyscan {
+                               pinctrl_keyscan: keyscan {
+                                       st,pins {
+                                               keyin0 = <&PIO0 2 ALT2 IN>;
+                                               keyin1 = <&PIO0 3 ALT2 IN>;
+                                               keyin2 = <&PIO0 4 ALT2 IN>;
+                                               keyin3 = <&PIO2 6 ALT2 IN>;
+
+                                               keyout0 = <&PIO1 6 ALT2 OUT>;
+                                               keyout1 = <&PIO1 7 ALT2 OUT>;
+                                               keyout2 = <&PIO0 6 ALT2 OUT>;
+                                               keyout3 = <&PIO2 7 ALT2 OUT>;
+                                       };
+                               };
+                       };
+
                        sbc_i2c0 {
                                pinctrl_sbc_i2c0_default: sbc_i2c0-default {
                                        st,pins {
                        reg             = <0xfee0f080 0x4>;
                        reg-names       = "irqmux";
                        interrupts      = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>;
-                       interrupts-names = "irqmux";
+                       interrupt-names = "irqmux";
                        ranges          = <0 0xfee00000 0x8000>;
 
                        PIO5: gpio@fee00000 {
                        reg             = <0xfe82f080 0x4>;
                        reg-names       = "irqmux";
                        interrupts      = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
-                       interrupts-names = "irqmux";
+                       interrupt-names = "irqmux";
                        ranges          = <0 0xfe820000 0x8000>;
 
                        PIO13: gpio@fe820000 {
                        reg             = <0xfd6bf080 0x4>;
                        reg-names       = "irqmux";
                        interrupts      = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
-                       interrupts-names = "irqmux";
+                       interrupt-names = "irqmux";
                        ranges          = <0 0xfd6b0000 0x3000>;
 
                        PIO100: gpio@fd6b0000 {
                        reg             = <0xfd33f080 0x4>;
                        reg-names       = "irqmux";
                        interrupts      = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
-                       interrupts-names = "irqmux";
+                       interrupt-names = "irqmux";
                        ranges          = <0 0xfd330000 0x5000>;
 
                        PIO103: gpio@fd330000 {
index d89064c20c8a43ed3bdfd5e934526f72c5da5a54..d6f254f302fe84c9a8c6ef857f5d64c1912fa2d7 100644 (file)
@@ -82,7 +82,7 @@
                        interrupts      = <0 197 0>;
                        pinctrl-names   = "default";
                        pinctrl-0       = <&pinctrl_serial2>;
-                       clocks          = <&CLKS_ICN_REG_0>;
+                       clocks          = <&clk_s_a0_ls CLK_ICN_REG>;
                };
 
                /* SBC comms block ASCs in SASG1 */
@@ -91,7 +91,7 @@
                        status          = "disabled";
                        reg             = <0xfe531000 0x2c>;
                        interrupts      = <0 210 0>;
-                       clocks          = <&CLK_SYSIN>;
+                       clocks          = <&clk_sysin>;
                        pinctrl-names   = "default";
                        pinctrl-0       = <&pinctrl_sbc_serial1>;
                };
                        compatible      = "st,comms-ssc4-i2c";
                        reg             = <0xfed40000 0x110>;
                        interrupts      = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks          = <&CLKS_ICN_REG_0>;
+                       clocks          = <&clk_s_a0_ls CLK_ICN_REG>;
                        clock-names     = "ssc";
                        clock-frequency = <400000>;
                        pinctrl-names   = "default";
                        compatible      = "st,comms-ssc4-i2c";
                        reg             = <0xfed41000 0x110>;
                        interrupts      = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks          = <&CLKS_ICN_REG_0>;
+                       clocks          = <&clk_s_a0_ls CLK_ICN_REG>;
                        clock-names     = "ssc";
                        clock-frequency = <400000>;
                        pinctrl-names   = "default";
                        compatible      = "st,comms-ssc4-i2c";
                        reg             = <0xfe540000 0x110>;
                        interrupts      = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks          = <&CLK_SYSIN>;
+                       clocks          = <&clk_sysin>;
                        clock-names     = "ssc";
                        clock-frequency = <400000>;
                        pinctrl-names   = "default";
                        compatible      = "st,comms-ssc4-i2c";
                        reg             = <0xfe541000 0x110>;
                        interrupts      = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks          = <&CLK_SYSIN>;
+                       clocks          = <&clk_sysin>;
                        clock-names     = "ssc";
                        clock-frequency = <400000>;
                        pinctrl-names   = "default";
                        pinctrl-names   = "default";
                        pinctrl-0       = <&pinctrl_mii0>;
                        clock-names     = "stmmaceth";
-                       clocks          = <&CLKS_GMAC0_PHY>;
+                       clocks          = <&clk_s_a1_ls CLK_GMAC0_PHY>;
                };
 
                ethernet1: dwmac@fef08000 {
                        pinctrl-names   = "default";
                        pinctrl-0       = <&pinctrl_mii1>;
                        clock-names     = "stmmaceth";
-                       clocks          = <&CLKS_ETH1_PHY>;
+                       clocks          = <&clk_s_a0_ls CLK_ETH1_PHY>;
                };
 
                rc: rc@fe518000 {
                        compatible      = "st,comms-irb";
                        reg             = <0xfe518000 0x234>;
                        interrupts      =  <0 203 0>;
-                       clocks          = <&CLK_SYSIN>;
+                       clocks          = <&clk_sysin>;
                        rx-mode         = "infrared";
                        pinctrl-names   = "default";
                        pinctrl-0       = <&pinctrl_ir>;
                        resets          = <&softreset STIH415_IRB_SOFTRESET>;
                };
+
+               keyscan: keyscan@fe4b0000 {
+                       compatible = "st,sti-keyscan";
+                       status = "disabled";
+                       reg = <0xfe4b0000 0x2000>;
+                       interrupts = <GIC_SPI 212 IRQ_TYPE_NONE>;
+                       clocks = <&clk_sysin>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_keyscan>;
+                       resets  = <&powerdown STIH415_KEYSCAN_POWERDOWN>,
+                                 <&softreset STIH415_KEYSCAN_SOFTRESET>;
+               };
        };
 };
index a5eb6eee10bfec5af14c3aa277bb81ab75939f8d..488e80a5d69d57507fda4745578679cd3f6c0469 100644 (file)
@@ -9,8 +9,7 @@
 /dts-v1/;
 #include "stih416.dtsi"
 #include "stih41x-b2000.dtsi"
-
 / {
-       compatible = "st,stih416", "st,stih416-b2000";
        model = "STiH416 B2000";
+       compatible = "st,stih416-b2000", "st,stih416";
 };
diff --git a/arch/arm/boot/dts/stih416-b2020-revE.dts b/arch/arm/boot/dts/stih416-b2020-revE.dts
new file mode 100644 (file)
index 0000000..ba0fa2c
--- /dev/null
@@ -0,0 +1,35 @@
+/*
+ * Copyright (C) 2014 STMicroelectronics (R&D) Limited.
+ * Author: Lee Jones <lee.jones@linaro.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * publishhed by the Free Software Foundation.
+ */
+/dts-v1/;
+#include "stih416.dtsi"
+#include "stih41x-b2020.dtsi"
+/ {
+       model = "STiH416 B2020 REV-E";
+       compatible = "st,stih416-b2020", "st,stih416";
+
+       soc {
+               leds {
+                       compatible = "gpio-leds";
+                       red {
+                               #gpio-cells             = <1>;
+                               label                   = "Front Panel LED";
+                               gpios                   = <&PIO4 1>;
+                               linux,default-trigger   = "heartbeat";
+                       };
+                       green {
+                               gpios                   = <&PIO1 3>;
+                               default-state           = "off";
+                       };
+               };
+
+               ethernet1: dwmac@fef08000 {
+                       snps,reset-gpio = <&PIO0 7>;
+               };
+       };
+};
index 276f28da573abe3cb7ea90f6e39a842954328f20..4e2df66b99eaf2443e03a8062eebd1b2ea6f7686 100644 (file)
@@ -11,6 +11,5 @@
 #include "stih41x-b2020.dtsi"
 / {
        model = "STiH416 B2020";
-       compatible = "st,stih416", "st,stih416-b2020";
-
+       compatible = "st,stih416-b2020", "st,stih416";
 };
index a6942c75cbbbbf4de002588576306cd97c205193..5b4fb838cddb61a71c747cfc05789a80f2f48c27 100644 (file)
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
+
+#include <dt-bindings/clock/stih416-clks.h>
+
 / {
        clocks {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
                /*
                 * Fixed 30MHz oscillator inputs to SoC
                 */
-               CLK_SYSIN: CLK_SYSIN {
+               clk_sysin: clk-sysin {
                        #clock-cells = <0>;
                        compatible = "fixed-clock";
                        clock-frequency = <30000000>;
-                       clock-output-names = "CLK_SYSIN";
+               };
+
+               /*
+                * ClockGenAs on SASG2
+                */
+               clockgen-a@fee62000 {
+                       reg = <0xfee62000 0xb48>;
+
+                       clk_s_a0_pll: clk-s-a0-pll {
+                               #clock-cells = <1>;
+                               compatible = "st,clkgena-plls-c65";
+
+                               clocks = <&clk_sysin>;
+
+                               clock-output-names = "clk-s-a0-pll0-hs",
+                                                    "clk-s-a0-pll0-ls",
+                                                    "clk-s-a0-pll1";
+                       };
+
+                       clk_s_a0_osc_prediv: clk-s-a0-osc-prediv {
+                               #clock-cells = <0>;
+                               compatible = "st,clkgena-prediv-c65",
+                                            "st,clkgena-prediv";
+
+                               clocks = <&clk_sysin>;
+
+                               clock-output-names = "clk-s-a0-osc-prediv";
+                       };
+
+                       clk_s_a0_hs: clk-s-a0-hs {
+                               #clock-cells = <1>;
+                               compatible = "st,clkgena-divmux-c65-hs",
+                                            "st,clkgena-divmux";
+
+                               clocks = <&clk_s_a0_osc_prediv>,
+                                        <&clk_s_a0_pll 0>, /* PLL0 HS */
+                                        <&clk_s_a0_pll 2>; /* PLL1 */
+
+                               clock-output-names = "clk-s-fdma-0",
+                                                    "clk-s-fdma-1",
+                                                    ""; /* clk-s-jit-sense */
+                                                    /* Fourth output unused */
+                       };
+
+                       clk_s_a0_ls: clk-s-a0-ls {
+                               #clock-cells = <1>;
+                               compatible = "st,clkgena-divmux-c65-ls",
+                                            "st,clkgena-divmux";
+
+                               clocks = <&clk_s_a0_osc_prediv>,
+                                        <&clk_s_a0_pll 1>, /* PLL0 LS */
+                                        <&clk_s_a0_pll 2>; /* PLL1 */
+
+                               clock-output-names = "clk-s-icn-reg-0",
+                                                    "clk-s-icn-if-0",
+                                                    "clk-s-icn-reg-lp-0",
+                                                    "clk-s-emiss",
+                                                    "clk-s-eth1-phy",
+                                                    "clk-s-mii-ref-out";
+                                                    /* Remaining outputs unused */
+                       };
+               };
+
+               clockgen-a@fee81000 {
+                       reg = <0xfee81000 0xb48>;
+
+                       clk_s_a1_pll: clk-s-a1-pll {
+                               #clock-cells = <1>;
+                               compatible = "st,clkgena-plls-c65";
+
+                               clocks = <&clk_sysin>;
+
+                               clock-output-names = "clk-s-a1-pll0-hs",
+                                                    "clk-s-a1-pll0-ls",
+                                                    "clk-s-a1-pll1";
+                       };
+
+                       clk_s_a1_osc_prediv: clk-s-a1-osc-prediv {
+                               #clock-cells = <0>;
+                               compatible = "st,clkgena-prediv-c65",
+                                            "st,clkgena-prediv";
+
+                               clocks = <&clk_sysin>;
+
+                               clock-output-names = "clk-s-a1-osc-prediv";
+                       };
+
+                       clk_s_a1_hs: clk-s-a1-hs {
+                               #clock-cells = <1>;
+                               compatible = "st,clkgena-divmux-c65-hs",
+                                            "st,clkgena-divmux";
+
+                               clocks = <&clk_s_a1_osc_prediv>,
+                                        <&clk_s_a1_pll 0>, /* PLL0 HS */
+                                        <&clk_s_a1_pll 2>; /* PLL1 */
+
+                               clock-output-names = "", /* Reserved */
+                                                    "", /* Reserved */
+                                                    "clk-s-stac-phy",
+                                                    "clk-s-vtac-tx-phy";
+                       };
+
+                       clk_s_a1_ls: clk-s-a1-ls {
+                               #clock-cells = <1>;
+                               compatible = "st,clkgena-divmux-c65-ls",
+                                            "st,clkgena-divmux";
+
+                               clocks = <&clk_s_a1_osc_prediv>,
+                                        <&clk_s_a1_pll 1>, /* PLL0 LS */
+                                        <&clk_s_a1_pll 2>; /* PLL1 */
+
+                               clock-output-names = "clk-s-icn-if-2",
+                                                    "clk-s-card-mmc-0",
+                                                    "clk-s-icn-if-1",
+                                                    "clk-s-gmac0-phy",
+                                                    "clk-s-nand-ctrl",
+                                                    "", /* Reserved */
+                                                    "clk-s-mii0-ref-out",
+                                                    "clk-s-stac-sys",
+                                                    "clk-s-card-mmc-1";
+                                                    /* Remaining outputs unused */
+                       };
+               };
+
+               /*
+                * ClockGenAs on MPE42
+                */
+               clockgen-a@fde12000 {
+                       reg = <0xfde12000 0xb50>;
+
+                       clk_m_a0_pll0: clk-m-a0-pll0 {
+                               #clock-cells = <1>;
+                               compatible = "st,plls-c32-a1x-0", "st,clkgen-plls-c32";
+
+                               clocks = <&clk_sysin>;
+
+                               clock-output-names = "clk-m-a0-pll0-phi0",
+                                                    "clk-m-a0-pll0-phi1",
+                                                    "clk-m-a0-pll0-phi2",
+                                                    "clk-m-a0-pll0-phi3";
+                       };
+
+                       clk_m_a0_pll1: clk-m-a0-pll1 {
+                               #clock-cells = <1>;
+                               compatible = "st,plls-c32-a1x-1", "st,clkgen-plls-c32";
+
+                               clocks = <&clk_sysin>;
+
+                               clock-output-names = "clk-m-a0-pll1-phi0",
+                                                    "clk-m-a0-pll1-phi1",
+                                                    "clk-m-a0-pll1-phi2",
+                                                    "clk-m-a0-pll1-phi3";
+                       };
+
+                       clk_m_a0_osc_prediv: clk-m-a0-osc-prediv {
+                               #clock-cells = <0>;
+                               compatible = "st,clkgena-prediv-c32",
+                                            "st,clkgena-prediv";
+
+                               clocks = <&clk_sysin>;
+
+                               clock-output-names = "clk-m-a0-osc-prediv";
+                       };
+
+                       clk_m_a0_div0: clk-m-a0-div0 {
+                               #clock-cells = <1>;
+                               compatible = "st,clkgena-divmux-c32-odf0",
+                                            "st,clkgena-divmux";
+
+                               clocks = <&clk_m_a0_osc_prediv>,
+                                        <&clk_m_a0_pll0 0>, /* PLL0 PHI0 */
+                                        <&clk_m_a0_pll1 0>; /* PLL1 PHI0 */
+
+                               clock-output-names = "", /* Unused */
+                                                    "", /* Unused */
+                                                    "clk-m-fdma-12",
+                                                    "", /* Unused */
+                                                    "clk-m-pp-dmu-0",
+                                                    "clk-m-pp-dmu-1",
+                                                    "clk-m-icm-lmi",
+                                                    "clk-m-vid-dmu-0";
+                       };
+
+                       clk_m_a0_div1: clk-m-a0-div1 {
+                               #clock-cells = <1>;
+                               compatible = "st,clkgena-divmux-c32-odf1",
+                                            "st,clkgena-divmux";
+
+                               clocks = <&clk_m_a0_osc_prediv>,
+                                        <&clk_m_a0_pll0 1>, /* PLL0 PHI1 */
+                                        <&clk_m_a0_pll1 1>; /* PLL1 PHI1 */
+
+                               clock-output-names = "clk-m-vid-dmu-1",
+                                                    "", /* Unused */
+                                                    "clk-m-a9-ext2f",
+                                                    "clk-m-st40rt",
+                                                    "clk-m-st231-dmu-0",
+                                                    "clk-m-st231-dmu-1",
+                                                    "clk-m-st231-aud",
+                                                    "clk-m-st231-gp-0";
+                       };
+
+                       clk_m_a0_div2: clk-m-a0-div2 {
+                               #clock-cells = <1>;
+                               compatible = "st,clkgena-divmux-c32-odf2",
+                                            "st,clkgena-divmux";
+
+                               clocks = <&clk_m_a0_osc_prediv>,
+                                        <&clk_m_a0_pll0 2>, /* PLL0 PHI2 */
+                                        <&clk_m_a0_pll1 2>; /* PLL1 PHI2 */
+
+                               clock-output-names = "clk-m-st231-gp-1",
+                                                    "clk-m-icn-cpu",
+                                                    "clk-m-icn-stac",
+                                                    "clk-m-tx-icn-dmu-0",
+                                                    "clk-m-tx-icn-dmu-1",
+                                                    "clk-m-tx-icn-ts",
+                                                    "clk-m-icn-vdp-0",
+                                                    "clk-m-icn-vdp-1";
+                       };
+
+                       clk_m_a0_div3: clk-m-a0-div3 {
+                               #clock-cells = <1>;
+                               compatible = "st,clkgena-divmux-c32-odf3",
+                                            "st,clkgena-divmux";
+
+                               clocks = <&clk_m_a0_osc_prediv>,
+                                        <&clk_m_a0_pll0 3>, /* PLL0 PHI3 */
+                                        <&clk_m_a0_pll1 3>; /* PLL1 PHI3 */
+
+                               clock-output-names = "", /* Unused */
+                                                    "", /* Unused */
+                                                    "", /* Unused */
+                                                    "", /* Unused */
+                                                    "clk-m-icn-vp8",
+                                                    "", /* Unused */
+                                                    "clk-m-icn-reg-11",
+                                                    "clk-m-a9-trace";
+                       };
+               };
+
+               clockgen-a@fd6db000 {
+                       reg = <0xfd6db000 0xb50>;
+
+                       clk_m_a1_pll0: clk-m-a1-pll0 {
+                               #clock-cells = <1>;
+                               compatible = "st,plls-c32-a1x-0", "st,clkgen-plls-c32";
+
+                               clocks = <&clk_sysin>;
+
+                               clock-output-names = "clk-m-a1-pll0-phi0",
+                                                    "clk-m-a1-pll0-phi1",
+                                                    "clk-m-a1-pll0-phi2",
+                                                    "clk-m-a1-pll0-phi3";
+                       };
+
+                       clk_m_a1_pll1: clk-m-a1-pll1 {
+                               #clock-cells = <1>;
+                               compatible = "st,plls-c32-a1x-1", "st,clkgen-plls-c32";
+
+                               clocks = <&clk_sysin>;
+
+                               clock-output-names = "clk-m-a1-pll1-phi0",
+                                                    "clk-m-a1-pll1-phi1",
+                                                    "clk-m-a1-pll1-phi2",
+                                                    "clk-m-a1-pll1-phi3";
+                       };
+
+                       clk_m_a1_osc_prediv: clk-m-a1-osc-prediv {
+                               #clock-cells = <0>;
+                               compatible = "st,clkgena-prediv-c32",
+                                            "st,clkgena-prediv";
+
+                               clocks = <&clk_sysin>;
+
+                               clock-output-names = "clk-m-a1-osc-prediv";
+                       };
+
+                       clk_m_a1_div0: clk-m-a1-div0 {
+                               #clock-cells = <1>;
+                               compatible = "st,clkgena-divmux-c32-odf0",
+                                            "st,clkgena-divmux";
+
+                               clocks = <&clk_m_a1_osc_prediv>,
+                                        <&clk_m_a1_pll0 0>, /* PLL0 PHI0 */
+                                        <&clk_m_a1_pll1 0>; /* PLL1 PHI0 */
+
+                               clock-output-names = "", /* Unused */
+                                                    "clk-m-fdma-10",
+                                                    "clk-m-fdma-11",
+                                                    "clk-m-hva-alt",
+                                                    "clk-m-proc-sc",
+                                                    "clk-m-tp",
+                                                    "clk-m-rx-icn-dmu-0",
+                                                    "clk-m-rx-icn-dmu-1";
+                       };
+
+                       clk_m_a1_div1: clk-m-a1-div1 {
+                               #clock-cells = <1>;
+                               compatible = "st,clkgena-divmux-c32-odf1",
+                                            "st,clkgena-divmux";
+
+                               clocks = <&clk_m_a1_osc_prediv>,
+                                        <&clk_m_a1_pll0 1>, /* PLL0 PHI1 */
+                                        <&clk_m_a1_pll1 1>; /* PLL1 PHI1 */
+
+                               clock-output-names = "clk-m-rx-icn-ts",
+                                                    "clk-m-rx-icn-vdp-0",
+                                                    "", /* Unused */
+                                                    "clk-m-prv-t1-bus",
+                                                    "clk-m-icn-reg-12",
+                                                    "clk-m-icn-reg-10",
+                                                    "", /* Unused */
+                                                    "clk-m-icn-st231";
+                       };
+
+                       clk_m_a1_div2: clk-m-a1-div2 {
+                               #clock-cells = <1>;
+                               compatible = "st,clkgena-divmux-c32-odf2",
+                                            "st,clkgena-divmux";
+
+                               clocks = <&clk_m_a1_osc_prediv>,
+                                        <&clk_m_a1_pll0 2>, /* PLL0 PHI2 */
+                                        <&clk_m_a1_pll1 2>; /* PLL1 PHI2 */
+
+                               clock-output-names = "clk-m-fvdp-proc-alt",
+                                                    "clk-m-icn-reg-13",
+                                                    "clk-m-tx-icn-gpu",
+                                                    "clk-m-rx-icn-gpu",
+                                                    "", /* Unused */
+                                                    "", /* Unused */
+                                                    "", /* clk-m-apb-pm-12 */
+                                                    ""; /* Unused */
+                       };
+
+                       clk_m_a1_div3: clk-m-a1-div3 {
+                               #clock-cells = <1>;
+                               compatible = "st,clkgena-divmux-c32-odf3",
+                                            "st,clkgena-divmux";
+
+                               clocks = <&clk_m_a1_osc_prediv>,
+                                        <&clk_m_a1_pll0 3>, /* PLL0 PHI3 */
+                                        <&clk_m_a1_pll1 3>; /* PLL1 PHI3 */
+
+                               clock-output-names = "", /* Unused */
+                                                    "", /* Unused */
+                                                    "", /* Unused */
+                                                    "", /* Unused */
+                                                    "", /* Unused */
+                                                    "", /* Unused */
+                                                    "", /* Unused */
+                                                    ""; /* clk-m-gpu-alt */
+                       };
+               };
+
+               clk_m_a9_ext2f_div2: clk-m-a9-ext2f-div2 {
+                       #clock-cells = <0>;
+                       compatible = "fixed-factor-clock";
+                       clocks = <&clk_m_a0_div1 2>;
+                       clock-div = <2>;
+                       clock-mult = <1>;
+               };
+
+               clockgen-a@fd345000 {
+                       reg = <0xfd345000 0xb50>;
+
+                       clk_m_a2_pll0: clk-m-a2-pll0 {
+                               #clock-cells = <1>;
+                               compatible = "st,plls-c32-a1x-0", "st,clkgen-plls-c32";
+
+                               clocks = <&clk_sysin>;
+
+                               clock-output-names = "clk-m-a2-pll0-phi0",
+                                                    "clk-m-a2-pll0-phi1",
+                                                    "clk-m-a2-pll0-phi2",
+                                                    "clk-m-a2-pll0-phi3";
+                       };
+
+                       clk_m_a2_pll1: clk-m-a2-pll1 {
+                               #clock-cells = <1>;
+                               compatible = "st,plls-c32-a1x-1", "st,clkgen-plls-c32";
+
+                               clocks = <&clk_sysin>;
+
+                               clock-output-names = "clk-m-a2-pll1-phi0",
+                                                    "clk-m-a2-pll1-phi1",
+                                                    "clk-m-a2-pll1-phi2",
+                                                    "clk-m-a2-pll1-phi3";
+                       };
+
+                       clk_m_a2_osc_prediv: clk-m-a2-osc-prediv {
+                               #clock-cells = <0>;
+                               compatible = "st,clkgena-prediv-c32",
+                                            "st,clkgena-prediv";
+
+                               clocks = <&clk_sysin>;
+
+                               clock-output-names = "clk-m-a2-osc-prediv";
+                       };
+
+                       clk_m_a2_div0: clk-m-a2-div0 {
+                               #clock-cells = <1>;
+                               compatible = "st,clkgena-divmux-c32-odf0",
+                                            "st,clkgena-divmux";
+
+                               clocks = <&clk_m_a2_osc_prediv>,
+                                        <&clk_m_a2_pll0 0>, /* PLL0 PHI0 */
+                                        <&clk_m_a2_pll1 0>; /* PLL1 PHI0 */
+
+                               clock-output-names = "clk-m-vtac-main-phy",
+                                                    "clk-m-vtac-aux-phy",
+                                                    "clk-m-stac-phy",
+                                                    "clk-m-stac-sys",
+                                                    "", /* clk-m-mpestac-pg */
+                                                    "", /* clk-m-mpestac-wc */
+                                                    "", /* clk-m-mpevtacaux-pg*/
+                                                    ""; /* clk-m-mpevtacmain-pg*/
+                       };
+
+                       clk_m_a2_div1: clk-m-a2-div1 {
+                               #clock-cells = <1>;
+                               compatible = "st,clkgena-divmux-c32-odf1",
+                                            "st,clkgena-divmux";
+
+                               clocks = <&clk_m_a2_osc_prediv>,
+                                        <&clk_m_a2_pll0 1>, /* PLL0 PHI1 */
+                                        <&clk_m_a2_pll1 1>; /* PLL1 PHI1 */
+
+                               clock-output-names = "", /* clk-m-mpevtacrx0-wc */
+                                                    "", /* clk-m-mpevtacrx1-wc */
+                                                    "clk-m-compo-main",
+                                                    "clk-m-compo-aux",
+                                                    "clk-m-bdisp-0",
+                                                    "clk-m-bdisp-1",
+                                                    "clk-m-icn-bdisp",
+                                                    "clk-m-icn-compo";
+                       };
+
+                       clk_m_a2_div2: clk-m-a2-div2 {
+                               #clock-cells = <1>;
+                               compatible = "st,clkgena-divmux-c32-odf2",
+                                            "st,clkgena-divmux";
+
+                               clocks = <&clk_m_a2_osc_prediv>,
+                                        <&clk_m_a2_pll0 2>, /* PLL0 PHI2 */
+                                        <&clk_m_a2_pll1 2>; /* PLL1 PHI2 */
+
+                               clock-output-names = "clk-m-icn-vdp-2",
+                                                    "", /* Unused */
+                                                    "clk-m-icn-reg-14",
+                                                    "clk-m-mdtp",
+                                                    "clk-m-jpegdec",
+                                                    "", /* Unused */
+                                                    "clk-m-dcephy-impctrl",
+                                                    ""; /* Unused */
+                       };
+
+                       clk_m_a2_div3: clk-m-a2-div3 {
+                               #clock-cells = <1>;
+                               compatible = "st,clkgena-divmux-c32-odf3",
+                                            "st,clkgena-divmux";
+
+                               clocks = <&clk_m_a2_osc_prediv>,
+                                        <&clk_m_a2_pll0 3>, /* PLL0 PHI3 */
+                                        <&clk_m_a2_pll1 3>; /* PLL1 PHI3 */
+
+                               clock-output-names = "", /* Unused */
+                                                    ""; /* clk-m-apb-pm-11 */
+                                                    /* Remaining outputs unused */
+                       };
+               };
+
+               /*
+                * A9 PLL
+                */
+               clockgen-a9@fdde08b0 {
+                       reg = <0xfdde08b0 0x70>;
+
+                       clockgen_a9_pll: clockgen-a9-pll {
+                               #clock-cells = <1>;
+                               compatible = "st,stih416-plls-c32-a9", "st,clkgen-plls-c32";
+
+                               clocks = <&clk_sysin>;
+                               clock-output-names = "clockgen-a9-pll-odf";
+                       };
+               };
+
+               /*
+                * ARM CPU related clocks
+                */
+               clk_m_a9: clk-m-a9@fdde08ac {
+                       #clock-cells = <0>;
+                       compatible = "st,stih416-clkgen-a9-mux", "st,clkgen-mux";
+                       reg = <0xfdde08ac 0x4>;
+                       clocks = <&clockgen_a9_pll 0>,
+                                <&clockgen_a9_pll 0>,
+                                <&clk_m_a0_div1 2>,
+                                <&clk_m_a9_ext2f_div2>;
                };
 
                /*
                 * ARM Peripheral clock for timers
                 */
-               arm_periph_clk: arm_periph_clk {
+               arm_periph_clk: clk-m-a9-periphs {
                        #clock-cells = <0>;
-                       compatible = "fixed-clock";
-                       clock-frequency = <600000000>;
+                       compatible = "fixed-factor-clock";
+                       clocks = <&clk_m_a9>;
+                       clock-div = <2>;
+                       clock-mult = <1>;
                };
 
                /*
-                * Bootloader initialized system infrastructure clock for
-                * serial devices.
+                * Frequency synthesizers on the SASG2
                 */
-               CLK_S_ICN_REG_0: clockgenA0@4 {
+               clockgen_b0: clockgen-b0@fee108b4 {
+                       #clock-cells = <1>;
+                       compatible = "st,stih416-quadfs216", "st,quadfs";
+                       reg = <0xfee108b4 0x44>;
+
+                       clocks = <&clk_sysin>;
+                       clock-output-names = "clk-s-usb48",
+                                            "clk-s-dss",
+                                            "clk-s-stfe-frc-2",
+                                            "clk-s-thsens-scard";
+               };
+
+               clockgen_b1: clockgen-b1@fe8308c4 {
+                       #clock-cells = <1>;
+                       compatible = "st,stih416-quadfs216", "st,quadfs";
+                       reg = <0xfe8308c4 0x44>;
+
+                       clocks = <&clk_sysin>;
+                       clock-output-names = "clk-s-pcm-0",
+                                            "clk-s-pcm-1",
+                                            "clk-s-pcm-2",
+                                            "clk-s-pcm-3";
+               };
+
+               clockgen_c: clockgen-c@fe8307d0 {
+                       #clock-cells = <1>;
+                       compatible = "st,stih416-quadfs432", "st,quadfs";
+                       reg = <0xfe8307d0 0x44>;
+
+                       clocks = <&clk_sysin>;
+                       clock-output-names = "clk-s-c-fs0-ch0",
+                                            "clk-s-c-vcc-sd",
+                                            "clk-s-c-fs0-ch2";
+               };
+
+               clk_s_vcc_hd: clk-s-vcc-hd@fe8308b8 {
                        #clock-cells = <0>;
-                       compatible = "fixed-clock";
-                       clock-frequency = <100000000>;
-                       clock-output-names = "CLK_S_ICN_REG_0";
+                       compatible = "st,stih416-clkgenc-vcc-hd", "st,clkgen-mux";
+                       reg = <0xfe8308b8 0x4>; /* SYSCFG2558 */
+
+                       clocks = <&clk_sysin>,
+                                <&clockgen_c 0>;
                };
 
-               CLK_S_GMAC0_PHY: clockgenA1@7 {
+               /*
+                * Add a dummy clock for the HDMI PHY for the VCC input mux
+                */
+               clk_s_tmds_fromphy: clk-s-tmds-fromphy {
                        #clock-cells = <0>;
                        compatible = "fixed-clock";
-                       clock-frequency = <25000000>;
-                       clock-output-names = "CLK_S_GMAC0_PHY";
+                       clock-frequency = <0>;
+               };
+
+               clockgen_c_vcc: clockgen-c-vcc@fe8308ac {
+                       #clock-cells = <1>;
+                       compatible = "st,stih416-clkgenc", "st,clkgen-vcc";
+                       reg = <0xfe8308ac 0xc>; /* SYSCFG2555,2556,2557 */
+
+                       clocks = <&clk_s_vcc_hd>,
+                                <&clockgen_c 1>,
+                                <&clk_s_tmds_fromphy>,
+                                <&clockgen_c 2>;
+
+                       clock-output-names  = "clk-s-pix-hdmi",
+                                             "clk-s-pix-dvo",
+                                             "clk-s-out-dvo",
+                                             "clk-s-pix-hd",
+                                             "clk-s-hddac",
+                                             "clk-s-denc",
+                                             "clk-s-sddac",
+                                             "clk-s-pix-main",
+                                             "clk-s-pix-aux",
+                                             "clk-s-stfe-frc-0",
+                                             "clk-s-ref-mcru",
+                                             "clk-s-slave-mcru",
+                                             "clk-s-tmds-hdmi",
+                                             "clk-s-hdmi-reject-pll",
+                                             "clk-s-thsens";
                };
 
-               CLK_S_ETH1_PHY: clockgenA0@7 {
+               clockgen_d: clockgen-d@fee107e0 {
+                       #clock-cells = <1>;
+                       compatible = "st,stih416-quadfs216", "st,quadfs";
+                       reg = <0xfee107e0 0x44>;
+
+                       clocks = <&clk_sysin>;
+                       clock-output-names = "clk-s-ccsc",
+                                            "clk-s-stfe-frc-1",
+                                            "clk-s-tsout-1",
+                                            "clk-s-mchi";
+               };
+
+               /*
+                * Frequency synthesizers on the MPE42
+                */
+               clockgen_e: clockgen-e@fd3208bc {
+                       #clock-cells = <1>;
+                       compatible = "st,stih416-quadfs660-E", "st,quadfs";
+                       reg = <0xfd3208bc 0xb0>;
+
+                       clocks = <&clk_sysin>;
+                       clock-output-names = "clk-m-pix-mdtp-0",
+                                            "clk-m-pix-mdtp-1",
+                                            "clk-m-pix-mdtp-2",
+                                            "clk-m-mpelpc";
+               };
+
+               clockgen_f: clockgen-f@fd320878 {
+                       #clock-cells = <1>;
+                       compatible = "st,stih416-quadfs660-F", "st,quadfs";
+                       reg = <0xfd320878 0xf0>;
+
+                       clocks = <&clk_sysin>;
+                       clock-output-names = "clk-m-main-vidfs",
+                                            "clk-m-hva-fs",
+                                            "clk-m-fvdp-vcpu",
+                                            "clk-m-fvdp-proc-fs";
+               };
+
+               clk_m_fvdp_proc: clk-m-fvdp-proc@fd320910 {
+                       #clock-cells = <0>;
+                       compatible = "st,stih416-clkgenf-vcc-fvdp", "st,clkgen-mux";
+                       reg = <0xfd320910 0x4>; /* SYSCFG8580 */
+
+                       clocks = <&clk_m_a1_div2 0>,
+                                <&clockgen_f 3>;
+               };
+
+               clk_m_hva: clk-m-hva@fd690868 {
+                       #clock-cells = <0>;
+                       compatible = "st,stih416-clkgenf-vcc-hva", "st,clkgen-mux";
+                       reg = <0xfd690868 0x4>; /* SYSCFG9538 */
+
+                       clocks = <&clockgen_f 1>,
+                                <&clk_m_a1_div0 3>;
+               };
+
+               clk_m_f_vcc_hd: clk-m-f-vcc-hd@fd32086c {
+                       #clock-cells = <0>;
+                       compatible = "st,stih416-clkgenf-vcc-hd", "st,clkgen-mux";
+                       reg = <0xfd32086c 0x4>; /* SYSCFG8539 */
+
+                       clocks = <&clockgen_c_vcc 7>,
+                                <&clockgen_f 0>;
+               };
+
+               clk_m_f_vcc_sd: clk-m-f-vcc-sd@fd32086c {
+                       #clock-cells = <0>;
+                       compatible = "st,stih416-clkgenf-vcc-sd", "st,clkgen-mux";
+                       reg = <0xfd32086c 0x4>; /* SYSCFG8539 */
+
+                       clocks = <&clockgen_c_vcc 8>,
+                                <&clockgen_f 1>;
+               };
+
+               /*
+                * Add a dummy clock for the HDMIRx external signal clock
+                */
+               clk_m_pix_hdmirx_sas: clk-m-pix-hdmirx-sas {
                        #clock-cells = <0>;
                        compatible = "fixed-clock";
-                       clock-frequency = <25000000>;
-                       clock-output-names = "CLK_S_ETH1_PHY";
+                       clock-frequency = <0>;
+               };
+
+               clockgen_f_vcc: clockgen-f-vcc@fd32086c {
+                       #clock-cells = <1>;
+                       compatible = "st,stih416-clkgenf", "st,clkgen-vcc";
+                       reg = <0xfd32086c 0xc>; /* SYSCFG8539,8540,8541 */
+
+                       clocks = <&clk_m_f_vcc_hd>,
+                                <&clk_m_f_vcc_sd>,
+                                <&clockgen_f 0>,
+                                <&clk_m_pix_hdmirx_sas>;
+
+                       clock-output-names  = "clk-m-pix-main-pipe",
+                                             "clk-m-pix-aux-pipe",
+                                             "clk-m-pix-main-cru",
+                                             "clk-m-pix-aux-cru",
+                                             "clk-m-xfer-be-compo",
+                                             "clk-m-xfer-pip-compo",
+                                             "clk-m-xfer-aux-compo",
+                                             "clk-m-vsens",
+                                             "clk-m-pix-hdmirx-0",
+                                             "clk-m-pix-hdmirx-1";
+               };
+
+               /*
+                * DDR PLL
+                */
+               clockgen-ddr@0xfdde07d8 {
+                       reg = <0xfdde07d8 0x110>;
+
+                       clockgen_ddr_pll: clockgen-ddr-pll {
+                               #clock-cells = <1>;
+                               compatible = "st,stih416-plls-c32-ddr", "st,clkgen-plls-c32";
+
+                               clocks = <&clk_sysin>;
+                               clock-output-names = "clockgen-ddr0",
+                                                    "clockgen-ddr1";
+                       };
+               };
+
+               /*
+                * GPU PLL
+                */
+               clockgen-gpu@fd68ff00 {
+                       reg = <0xfd68ff00 0x910>;
+
+                       clockgen_gpu_pll: clockgen-gpu-pll {
+                               #clock-cells = <1>;
+                               compatible = "st,stih416-gpu-pll-c32", "st,clkgengpu-pll-c32";
+
+                               clocks = <&clk_sysin>;
+                               clock-output-names = "clockgen-gpu-pll";
+                       };
                };
        };
 };
index aeea304086eb3b57c5682539643f0d6ca4540c0d..ee6c119e261e89e8a887b18a78fdfdff284c0975 100644 (file)
@@ -53,7 +53,7 @@
                        reg             = <0xfe61f080 0x4>;
                        reg-names       = "irqmux";
                        interrupts      = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
-                       interrupts-names = "irqmux";
+                       interrupt-names = "irqmux";
                        ranges          = <0 0xfe610000 0x6000>;
 
                        PIO0: gpio@fe610000 {
                                };
                        };
 
+                       keyscan {
+                               pinctrl_keyscan: keyscan {
+                                       st,pins {
+                                               keyin0 = <&PIO0 2 ALT2 IN>;
+                                               keyin1 = <&PIO0 3 ALT2 IN>;
+                                               keyin2 = <&PIO0 4 ALT2 IN>;
+                                               keyin3 = <&PIO2 6 ALT2 IN>;
+
+                                               keyout0 = <&PIO1 6 ALT2 OUT>;
+                                               keyout1 = <&PIO1 7 ALT2 OUT>;
+                                               keyout2 = <&PIO0 6 ALT2 OUT>;
+                                               keyout3 = <&PIO2 7 ALT2 OUT>;
+                                       };
+                               };
+                       };
+
                        sbc_i2c0 {
                                pinctrl_sbc_i2c0_default: sbc_i2c0-default {
                                        st,pins {
                        reg             = <0xfee0f080 0x4>;
                        reg-names       = "irqmux";
                        interrupts      = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
-                       interrupts-names = "irqmux";
+                       interrupt-names = "irqmux";
                        ranges          = <0 0xfee00000 0x10000>;
 
                        PIO5: gpio@fee00000 {
                        reg             = <0xfe82f080 0x4>;
                        reg-names       = "irqmux";
                        interrupts      = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
-                       interrupts-names = "irqmux";
+                       interrupt-names = "irqmux";
                        ranges          = <0 0xfe820000 0x6000>;
 
                        PIO13: gpio@fe820000 {
                        reg             = <0xfd6bf080 0x4>;
                        reg-names       = "irqmux";
                        interrupts      = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
-                       interrupts-names = "irqmux";
+                       interrupt-names = "irqmux";
                        ranges          = <0 0xfd6b0000 0x3000>;
 
                        PIO100: gpio@fd6b0000 {
                        reg             = <0xfd33f080 0x4>;
                        reg-names       = "irqmux";
                        interrupts      = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
-                       interrupts-names = "irqmux";
+                       interrupt-names = "irqmux";
                        ranges                  = <0 0xfd330000 0x5000>;
 
                        PIO103: gpio@fd330000 {
index 78746d20382e3b653a1489decaf94602007b6e21..06473c5d9ea989493f9675e857a1efa538ac32c7 100644 (file)
@@ -89,7 +89,7 @@
                        status          = "disabled";
                        reg             = <0xfed32000 0x2c>;
                        interrupts      = <0 197 0>;
-                       clocks          = <&CLK_S_ICN_REG_0>;
+                       clocks          = <&clk_s_a0_ls CLK_ICN_REG>;
                        pinctrl-names   = "default";
                        pinctrl-0       = <&pinctrl_serial2 &pinctrl_serial2_oe>;
                };
                        interrupts      = <0 210 0>;
                        pinctrl-names   = "default";
                        pinctrl-0       = <&pinctrl_sbc_serial1>;
-                       clocks          = <&CLK_SYSIN>;
+                       clocks          = <&clk_sysin>;
                };
 
                i2c@fed40000 {
                        compatible      = "st,comms-ssc4-i2c";
                        reg             = <0xfed40000 0x110>;
                        interrupts      = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks          = <&CLK_S_ICN_REG_0>;
+                       clocks          = <&clk_s_a0_ls CLK_ICN_REG>;
                        clock-names     = "ssc";
                        clock-frequency = <400000>;
                        pinctrl-names   = "default";
                        compatible      = "st,comms-ssc4-i2c";
                        reg             = <0xfed41000 0x110>;
                        interrupts      = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks          = <&CLK_S_ICN_REG_0>;
+                       clocks          = <&clk_s_a0_ls CLK_ICN_REG>;
                        clock-names     = "ssc";
                        clock-frequency = <400000>;
                        pinctrl-names   = "default";
                        compatible      = "st,comms-ssc4-i2c";
                        reg             = <0xfe540000 0x110>;
                        interrupts      = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks          = <&CLK_SYSIN>;
+                       clocks          = <&clk_sysin>;
                        clock-names     = "ssc";
                        clock-frequency = <400000>;
                        pinctrl-names   = "default";
                        compatible      = "st,comms-ssc4-i2c";
                        reg             = <0xfe541000 0x110>;
                        interrupts      = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks          = <&CLK_SYSIN>;
+                       clocks          = <&clk_sysin>;
                        clock-names     = "ssc";
                        clock-frequency = <400000>;
                        pinctrl-names   = "default";
                        pinctrl-names   = "default";
                        pinctrl-0       = <&pinctrl_mii0>;
                        clock-names     = "stmmaceth";
-                       clocks          = <&CLK_S_GMAC0_PHY>;
+                       clocks          = <&clk_s_a1_ls CLK_GMAC0_PHY>;
                };
 
                ethernet1: dwmac@fef08000 {
                        pinctrl-names   = "default";
                        pinctrl-0       = <&pinctrl_mii1>;
                        clock-names     = "stmmaceth";
-                       clocks          = <&CLK_S_ETH1_PHY>;
+                       clocks          = <&clk_s_a0_ls CLK_ETH1_PHY>;
                };
 
                rc: rc@fe518000 {
                        reg             = <0xfe518000 0x234>;
                        interrupts      =  <0 203 0>;
                        rx-mode         = "infrared";
-                       clocks          = <&CLK_SYSIN>;
+                       clocks          = <&clk_sysin>;
                        pinctrl-names   = "default";
                        pinctrl-0       = <&pinctrl_ir>;
                        resets          = <&softreset STIH416_IRB_SOFTRESET>;
 
                        status = "disabled";
                };
+
+               keyscan: keyscan@fe4b0000 {
+                       compatible = "st,sti-keyscan";
+                       status = "disabled";
+                       reg = <0xfe4b0000 0x2000>;
+                       interrupts = <GIC_SPI 212 IRQ_TYPE_NONE>;
+                       clocks = <&clk_sysin>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_keyscan>;
+                       resets  = <&powerdown STIH416_KEYSCAN_POWERDOWN>,
+                                 <&softreset STIH416_KEYSCAN_SOFTRESET>;
+               };
        };
 };
index bf65c49095af08fa0e81e3f679461f4d63288c0e..b3dd6ca5c2ae0bff23f33fd3fbc0e3d8c11c6c28 100644 (file)
@@ -6,6 +6,7 @@
  * it under the terms of the GNU General Public License version 2 as
  * publishhed by the Free Software Foundation.
  */
+#include <dt-bindings/input/input.h>
 / {
 
        memory{
@@ -14,7 +15,7 @@
        };
 
        chosen {
-               bootargs = "console=ttyAS0,115200";
+               bootargs = "console=ttyAS0,115200 clk_ignore_unused";
                linux,stdout-path = &serial2;
        };
 
                        snps,reset-active-low;
                        snps,reset-delays-us    = <0 10000 10000>;
                };
+
+               keyscan: keyscan@fe4b0000 {
+                       keypad,num-rows = <4>;
+                       keypad,num-columns = <4>;
+                       st,debounce-us = <5000>;
+                       linux,keymap = < MATRIX_KEY(0x00, 0x00, KEY_F13)
+                                        MATRIX_KEY(0x00, 0x01, KEY_F9)
+                                        MATRIX_KEY(0x00, 0x02, KEY_F5)
+                                        MATRIX_KEY(0x00, 0x03, KEY_F1)
+                                        MATRIX_KEY(0x01, 0x00, KEY_F14)
+                                        MATRIX_KEY(0x01, 0x01, KEY_F10)
+                                        MATRIX_KEY(0x01, 0x02, KEY_F6)
+                                        MATRIX_KEY(0x01, 0x03, KEY_F2)
+                                        MATRIX_KEY(0x02, 0x00, KEY_F15)
+                                        MATRIX_KEY(0x02, 0x01, KEY_F11)
+                                        MATRIX_KEY(0x02, 0x02, KEY_F7)
+                                        MATRIX_KEY(0x02, 0x03, KEY_F3)
+                                        MATRIX_KEY(0x03, 0x00, KEY_F16)
+                                        MATRIX_KEY(0x03, 0x01, KEY_F12)
+                                        MATRIX_KEY(0x03, 0x02, KEY_F8)
+                                        MATRIX_KEY(0x03, 0x03, KEY_F4) >;
+               };
        };
 };
index 838513f9ddc0f7bd6d526c73e46a68408a47d15b..d8a84295c328bf778d35ad064c55a63f21ed96c4 100644 (file)
@@ -14,7 +14,7 @@
        };
 
        chosen {
-               bootargs = "console=ttyAS0,115200";
+               bootargs = "console=ttyAS0,115200 clk_ignore_unused";
                linux,stdout-path = &sbc_serial1;
        };
 
index f5b9898d9c6e60330417abc3cfad494d27474d75..5cb0e63376b532e97535ac9e6637ff433198a75c 100644 (file)
@@ -1,3 +1,10 @@
+/*
+ * Copyright (C) 2014 STMicroelectronics Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * publishhed by the Free Software Foundation.
+ */
 / {
        #address-cells = <1>;
        #size-cells = <1>;
index fa746aea5e66397e5fc4b727e55a338bdc9df06a..0b97c071dd56b974897fcd2e445aeb1b23bac879 100644 (file)
                        };
                };
 
+               mmc0: mmc@01c0f000 {
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+                       vmmc-supply = <&reg_vcc3v3>;
+                       bus-width = <4>;
+                       cd-gpios = <&pio 7 1 0>; /* PH1 */
+                       cd-inverted;
+                       status = "okay";
+               };
+
                usbphy: phy@01c13400 {
                        usb1_vbus-supply = <&reg_usb1_vbus>;
                        usb2_vbus-supply = <&reg_usb2_vbus>;
index 4684cbe6843b4207d9aae236db50e647b3f25c65..c200eacc66e8ba06f4d578b569b0d1063fa59b0f 100644 (file)
                        };
                };
 
+               mmc0: mmc@01c0f000 {
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+                       vmmc-supply = <&reg_vcc3v3>;
+                       bus-width = <4>;
+                       cd-gpios = <&pio 7 1 0>; /* PH1 */
+                       cd-inverted;
+                       status = "okay";
+               };
+
                usbphy: phy@01c13400 {
                        usb1_vbus-supply = <&reg_usb1_vbus>;
                        usb2_vbus-supply = <&reg_usb2_vbus>;
index d7c17e46ce23096aafe13f88c7d480ebdea83d32..547fadcb984b98e8296f2865ccd2c1a8f52df01c 100644 (file)
                        };
                };
 
+               mmc0: mmc@01c0f000 {
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+                       vmmc-supply = <&reg_vcc3v3>;
+                       bus-width = <4>;
+                       cd-gpios = <&pio 7 1 0>; /* PH1 */
+                       cd-inverted;
+                       status = "okay";
+               };
+
                usbphy: phy@01c13400 {
                        usb1_vbus-supply = <&reg_usb1_vbus>;
                        usb2_vbus-supply = <&reg_usb2_vbus>;
index fe9272ee55c30a41d93f263832470e130bd334a5..f13723e18b86964a1e486bdcea013cce0942691a 100644 (file)
        };
 
        soc@01c00000 {
+               mmc0: mmc@01c0f000 {
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+                       vmmc-supply = <&reg_vcc3v3>;
+                       bus-width = <4>;
+                       cd-gpios = <&pio 7 1 0>; /* PH1 */
+                       cd-inverted;
+                       status = "okay";
+               };
+
                uart0: serial@01c28000 {
                        pinctrl-names = "default";
                        pinctrl-0 = <&uart0_pins_a>;
index dd84a9e313b3e9f7ee9f52fce22fdf32d098d1c7..c01cea50cf0c7f175ec594ad31b645dbbd240256 100644 (file)
        compatible = "pineriver,mini-xplus", "allwinner,sun4i-a10";
 
        soc@01c00000 {
+               mmc0: mmc@01c0f000 {
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+                       vmmc-supply = <&reg_vcc3v3>;
+                       bus-width = <4>;
+                       cd-gpios = <&pio 7 1 0>; /* PH1 */
+                       cd-inverted;
+                       status = "okay";
+               };
+
                usbphy: phy@01c13400 {
                        usb1_vbus-supply = <&reg_usb1_vbus>;
                        usb2_vbus-supply = <&reg_usb2_vbus>;
index 66cf0c7cf5b7a34f687fc4fa37c9c2baac213cdf..d46a7dbecef5b241f09755ab77a9707f6a76a30a 100644 (file)
                        };
                };
 
+               mmc0: mmc@01c0f000 {
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+                       vmmc-supply = <&reg_vcc3v3>;
+                       bus-width = <4>;
+                       cd-gpios = <&pio 7 1 0>; /* PH1 */
+                       cd-inverted;
+                       status = "okay";
+               };
+
                usbphy: phy@01c13400 {
                        usb1_vbus-supply = <&reg_usb1_vbus>;
                        usb2_vbus-supply = <&reg_usb2_vbus>;
index 255b47e7019c10278ca03b6e87c7ac48b970a7fd..fb03bccb78d2b5f085b75478d942980e46ddcee4 100644 (file)
                        };
                };
 
+               mmc0: mmc@01c0f000 {
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+                       vmmc-supply = <&reg_vcc3v3>;
+                       bus-width = <4>;
+                       cd-gpios = <&pio 7 1 0>; /* PH1 */
+                       cd-inverted;
+                       status = "okay";
+               };
+
                usbphy: phy@01c13400 {
                        usb1_vbus-supply = <&reg_usb1_vbus>;
                        usb2_vbus-supply = <&reg_usb2_vbus>;
index 9174724571e24782a2a3ae57d40538e33890912e..c7b794ed337d710b42510e02591d7dd101fc75c4 100644 (file)
                        #size-cells = <0>;
                };
 
+               mmc0: mmc@01c0f000 {
+                       compatible = "allwinner,sun4i-a10-mmc";
+                       reg = <0x01c0f000 0x1000>;
+                       clocks = <&ahb_gates 8>, <&mmc0_clk>;
+                       clock-names = "ahb", "mmc";
+                       interrupts = <32>;
+                       status = "disabled";
+               };
+
+               mmc1: mmc@01c10000 {
+                       compatible = "allwinner,sun4i-a10-mmc";
+                       reg = <0x01c10000 0x1000>;
+                       clocks = <&ahb_gates 9>, <&mmc1_clk>;
+                       clock-names = "ahb", "mmc";
+                       interrupts = <33>;
+                       status = "disabled";
+               };
+
+               mmc2: mmc@01c11000 {
+                       compatible = "allwinner,sun4i-a10-mmc";
+                       reg = <0x01c11000 0x1000>;
+                       clocks = <&ahb_gates 10>, <&mmc2_clk>;
+                       clock-names = "ahb", "mmc";
+                       interrupts = <34>;
+                       status = "disabled";
+               };
+
+               mmc3: mmc@01c12000 {
+                       compatible = "allwinner,sun4i-a10-mmc";
+                       reg = <0x01c12000 0x1000>;
+                       clocks = <&ahb_gates 11>, <&mmc3_clk>;
+                       clock-names = "ahb", "mmc";
+                       interrupts = <35>;
+                       status = "disabled";
+               };
+
                usbphy: phy@01c13400 {
                        #phy-cells = <1>;
                        compatible = "allwinner,sun4i-a10-usb-phy";
                        #size-cells = <0>;
                        #gpio-cells = <3>;
 
+                       pwm0_pins_a: pwm0@0 {
+                               allwinner,pins = "PB2";
+                               allwinner,function = "pwm";
+                               allwinner,drive = <0>;
+                               allwinner,pull = <0>;
+                       };
+
+                       pwm1_pins_a: pwm1@0 {
+                               allwinner,pins = "PI3";
+                               allwinner,function = "pwm";
+                               allwinner,drive = <0>;
+                               allwinner,pull = <0>;
+                       };
+
                        uart0_pins_a: uart0@0 {
                                allwinner,pins = "PB22", "PB23";
                                allwinner,function = "uart0";
                                allwinner,drive = <0>;
                                allwinner,pull = <0>;
                        };
+
+                       mmc0_pins_a: mmc0@0 {
+                               allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";
+                               allwinner,function = "mmc0";
+                               allwinner,drive = <2>;
+                               allwinner,pull = <0>;
+                       };
+
+                       mmc0_cd_pin_reference_design: mmc0_cd_pin@0 {
+                               allwinner,pins = "PH1";
+                               allwinner,function = "gpio_in";
+                               allwinner,drive = <0>;
+                               allwinner,pull = <1>;
+                       };
                };
 
                timer@01c20c00 {
                        interrupts = <24>;
                };
 
+               pwm: pwm@01c20e00 {
+                       compatible = "allwinner,sun4i-a10-pwm";
+                       reg = <0x01c20e00 0xc>;
+                       clocks = <&osc24M>;
+                       #pwm-cells = <3>;
+                       status = "disabled";
+               };
+
                sid: eeprom@01c23800 {
                        compatible = "allwinner,sun4i-a10-sid";
                        reg = <0x01c23800 0x10>;
                        clocks = <&apb1_gates 0>;
                        clock-frequency = <100000>;
                        status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                };
 
                i2c1: i2c@01c2b000 {
                        clocks = <&apb1_gates 1>;
                        clock-frequency = <100000>;
                        status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                };
 
                i2c2: i2c@01c2b400 {
                        clocks = <&apb1_gates 2>;
                        clock-frequency = <100000>;
                        status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                };
        };
 };
index 23611b71d3aa65736b0419abaafe0a93491e2907..ea9519da57643ffbbc2539fe5396c1f24dceace9 100644 (file)
                        };
                };
 
+               mmc0: mmc@01c0f000 {
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_olinuxino_micro>;
+                       vmmc-supply = <&reg_vcc3v3>;
+                       bus-width = <4>;
+                       cd-gpios = <&pio 6 1 0>; /* PG1 */
+                       cd-inverted;
+                       status = "okay";
+               };
+
+               mmc1: mmc@01c10000 {
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&mmc1_pins_a>, <&mmc1_cd_pin_olinuxino_micro>;
+                       vmmc-supply = <&reg_vcc3v3>;
+                       bus-width = <4>;
+                       cd-gpios = <&pio 6 13 0>; /* PG13 */
+                       cd-inverted;
+                       status = "okay";
+               };
+
                usbphy: phy@01c13400 {
                        usb1_vbus-supply = <&reg_usb1_vbus>;
                        status = "okay";
                };
 
                pinctrl@01c20800 {
+                       mmc0_cd_pin_olinuxino_micro: mmc0_cd_pin@0 {
+                               allwinner,pins = "PG1";
+                               allwinner,function = "gpio_in";
+                               allwinner,drive = <0>;
+                               allwinner,pull = <1>;
+                       };
+
+                       mmc1_cd_pin_olinuxino_micro: mmc1_cd_pin@0 {
+                               allwinner,pins = "PG13";
+                               allwinner,function = "gpio_in";
+                               allwinner,drive = <0>;
+                               allwinner,pull = <1>;
+                       };
+
                        led_pins_olinuxino: led_pins@0 {
                                allwinner,pins = "PE3";
                                allwinner,function = "gpio_out";
diff --git a/arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts b/arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts
new file mode 100644 (file)
index 0000000..43a9376
--- /dev/null
@@ -0,0 +1,100 @@
+/*
+ * Copyright 2014 Hans de Goede <hdegoede@redhat.com>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "sun5i-a10s.dtsi"
+/include/ "sunxi-common-regulators.dtsi"
+
+/ {
+       model = "R7 A10s hdmi tv-stick";
+       compatible = "allwinner,r7-tv-dongle", "allwinner,sun5i-a10s";
+
+       soc@01c00000 {
+               mmc0: mmc@01c0f000 {
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_r7>;
+                       vmmc-supply = <&reg_vcc3v3>;
+                       bus-width = <4>;
+                       cd-gpios = <&pio 6 1 0>; /* PG1 */
+                       cd-inverted;
+                       status = "okay";
+               };
+
+               mmc1: mmc@01c10000 {
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&mmc1_pins_a>;
+                       vmmc-supply = <&reg_vcc3v3>;
+                       bus-width = <4>;
+                       non-removable;
+                       status = "okay";
+               };
+
+               usbphy: phy@01c13400 {
+                       usb1_vbus-supply = <&reg_usb1_vbus>;
+                       status = "okay";
+               };
+
+               ehci0: usb@01c14000 {
+                       status = "okay";
+               };
+
+               ohci0: usb@01c14400 {
+                       status = "okay";
+               };
+
+               pinctrl@01c20800 {
+                       mmc0_cd_pin_r7: mmc0_cd_pin@0 {
+                               allwinner,pins = "PG1";
+                               allwinner,function = "gpio_in";
+                               allwinner,drive = <0>;
+                               allwinner,pull = <1>;
+                       };
+
+                       led_pins_r7: led_pins@0 {
+                               allwinner,pins = "PB2";
+                               allwinner,function = "gpio_out";
+                               allwinner,drive = <1>;
+                               allwinner,pull = <0>;
+                       };
+
+                       usb1_vbus_pin_r7: usb1_vbus_pin@0 {
+                               allwinner,pins = "PG13";
+                               allwinner,function = "gpio_out";
+                               allwinner,drive = <0>;
+                               allwinner,pull = <0>;
+                       };
+               };
+
+               uart0: serial@01c28000 {
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&uart0_pins_a>;
+                       status = "okay";
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-names = "default";
+               pinctrl-0 = <&led_pins_r7>;
+
+               green {
+                       label = "r7-tv-dongle:green:usr";
+                       gpios = <&pio 1 2 0>;
+                       default-state = "on";
+               };
+       };
+
+       reg_usb1_vbus: usb1-vbus {
+               pinctrl-0 = <&usb1_vbus_pin_r7>;
+               gpio = <&pio 6 13 0>;
+               status = "okay";
+       };
+};
index 79989ed5658d570b36626d871ba6ee2cd083db6e..aa1dd59dc34aa6f36871c3832144dd4b476e538a 100644 (file)
                        #size-cells = <0>;
                };
 
+               mmc0: mmc@01c0f000 {
+                       compatible = "allwinner,sun5i-a13-mmc";
+                       reg = <0x01c0f000 0x1000>;
+                       clocks = <&ahb_gates 8>, <&mmc0_clk>;
+                       clock-names = "ahb", "mmc";
+                       interrupts = <32>;
+                       status = "disabled";
+               };
+
+               mmc1: mmc@01c10000 {
+                       compatible = "allwinner,sun5i-a13-mmc";
+                       reg = <0x01c10000 0x1000>;
+                       clocks = <&ahb_gates 9>, <&mmc1_clk>;
+                       clock-names = "ahb", "mmc";
+                       interrupts = <33>;
+                       status = "disabled";
+               };
+
+               mmc2: mmc@01c11000 {
+                       compatible = "allwinner,sun5i-a13-mmc";
+                       reg = <0x01c11000 0x1000>;
+                       clocks = <&ahb_gates 10>, <&mmc2_clk>;
+                       clock-names = "ahb", "mmc";
+                       interrupts = <34>;
+                       status = "disabled";
+               };
+
                usbphy: phy@01c13400 {
                        #phy-cells = <1>;
                        compatible = "allwinner,sun5i-a13-usb-phy";
                                allwinner,drive = <0>;
                                allwinner,pull = <0>;
                        };
+
+                       mmc0_pins_a: mmc0@0 {
+                               allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";
+                               allwinner,function = "mmc0";
+                               allwinner,drive = <2>;
+                               allwinner,pull = <0>;
+                       };
+
+                       mmc1_pins_a: mmc1@0 {
+                               allwinner,pins = "PG3","PG4","PG5","PG6","PG7","PG8";
+                               allwinner,function = "mmc1";
+                               allwinner,drive = <2>;
+                               allwinner,pull = <0>;
+                       };
                };
 
                timer@01c20c00 {
index 11169d5b5b86af143ed554b3617aba22bd4e3d50..fa44b026483b34c59197bb8d1d2594c068b81448 100644 (file)
        compatible = "olimex,a13-olinuxino-micro", "allwinner,sun5i-a13";
 
        soc@01c00000 {
+               mmc0: mmc@01c0f000 {
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_olinuxinom>;
+                       vmmc-supply = <&reg_vcc3v3>;
+                       bus-width = <4>;
+                       cd-gpios = <&pio 6 0 0>; /* PG0 */
+                       cd-inverted;
+                       status = "okay";
+               };
+
                usbphy: phy@01c13400 {
                        usb1_vbus-supply = <&reg_usb1_vbus>;
                        status = "okay";
                };
 
                pinctrl@01c20800 {
+                       mmc0_cd_pin_olinuxinom: mmc0_cd_pin@0 {
+                               allwinner,pins = "PG0";
+                               allwinner,function = "gpio_in";
+                               allwinner,drive = <0>;
+                               allwinner,pull = <1>;
+                       };
+
                        led_pins_olinuxinom: led_pins@0 {
                                allwinner,pins = "PG9";
                                allwinner,function = "gpio_out";
index 7a9187bbeb28fd6574ede79d7e74f4f928d96a9a..429994e1943e83eda0ce8a0fa9ef29d39f435628 100644 (file)
        compatible = "olimex,a13-olinuxino", "allwinner,sun5i-a13";
 
        soc@01c00000 {
+               mmc0: mmc@01c0f000 {
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_olinuxino>;
+                       vmmc-supply = <&reg_vcc3v3>;
+                       bus-width = <4>;
+                       cd-gpios = <&pio 6 0 0>; /* PG0 */
+                       cd-inverted;
+                       status = "okay";
+               };
+
                usbphy: phy@01c13400 {
                        usb1_vbus-supply = <&reg_usb1_vbus>;
                        status = "okay";
                };
 
                pinctrl@01c20800 {
+                       mmc0_cd_pin_olinuxino: mmc0_cd_pin@0 {
+                               allwinner,pins = "PG0";
+                               allwinner,function = "gpio_in";
+                               allwinner,drive = <0>;
+                               allwinner,pull = <1>;
+                       };
+
                        led_pins_olinuxino: led_pins@0 {
                                allwinner,pins = "PG9";
                                allwinner,function = "gpio_out";
index f01c315bdc4b0e1a37b34e4456ef95fb92f01352..c9fdb7b3ecd9cc4140c7ca83fe19df5087948430 100644 (file)
                        #size-cells = <0>;
                };
 
+               mmc0: mmc@01c0f000 {
+                       compatible = "allwinner,sun5i-a13-mmc";
+                       reg = <0x01c0f000 0x1000>;
+                       clocks = <&ahb_gates 8>, <&mmc0_clk>;
+                       clock-names = "ahb", "mmc";
+                       interrupts = <32>;
+                       status = "disabled";
+               };
+
+               mmc2: mmc@01c11000 {
+                       compatible = "allwinner,sun5i-a13-mmc";
+                       reg = <0x01c11000 0x1000>;
+                       clocks = <&ahb_gates 10>, <&mmc2_clk>;
+                       clock-names = "ahb", "mmc";
+                       interrupts = <34>;
+                       status = "disabled";
+               };
+
                usbphy: phy@01c13400 {
                        #phy-cells = <1>;
                        compatible = "allwinner,sun5i-a13-usb-phy";
                                allwinner,drive = <0>;
                                allwinner,pull = <0>;
                        };
+
+                       mmc0_pins_a: mmc0@0 {
+                               allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";
+                               allwinner,function = "mmc0";
+                               allwinner,drive = <2>;
+                               allwinner,pull = <0>;
+                       };
                };
 
                timer@01c20c00 {
                        clocks = <&apb1_gates 0>;
                        clock-frequency = <100000>;
                        status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                };
 
                i2c1: i2c@01c2b000 {
                        clocks = <&apb1_gates 1>;
                        clock-frequency = <100000>;
                        status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                };
 
                i2c2: i2c@01c2b400 {
                        clocks = <&apb1_gates 2>;
                        clock-frequency = <100000>;
                        status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                };
 
                timer@01c60000 {
diff --git a/arch/arm/boot/dts/sun6i-a31-app4-evb1.dts b/arch/arm/boot/dts/sun6i-a31-app4-evb1.dts
new file mode 100644 (file)
index 0000000..2bbf886
--- /dev/null
@@ -0,0 +1,57 @@
+/*
+ * Copyright 2014 Boris Brezillon
+ *
+ * Boris Brezillon <boris.brezillon@free-electrons.com>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "sun6i-a31.dtsi"
+/include/ "sunxi-common-regulators.dtsi"
+
+/ {
+       model = "Allwinner A31 APP4 EVB1 Evaluation Board";
+       compatible = "allwinner,app4-evb1", "allwinner,sun6i-a31";
+
+       chosen {
+               bootargs = "earlyprintk console=ttyS0,115200";
+       };
+
+       soc@01c00000 {
+               pio: pinctrl@01c20800 {
+                       usb1_vbus_pin_a: usb1_vbus_pin@0 {
+                               allwinner,pins = "PH27";
+                               allwinner,function = "gpio_out";
+                               allwinner,drive = <0>;
+                               allwinner,pull = <0>;
+                       };
+               };
+
+               usbphy: phy@01c19400 {
+                       usb1_vbus-supply = <&reg_usb1_vbus>;
+                       status = "okay";
+               };
+
+               ehci0: usb@01c1a000 {
+                       status = "okay";
+               };
+
+               uart0: serial@01c28000 {
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&uart0_pins_a>;
+                       status = "okay";
+               };
+       };
+
+       reg_usb1_vbus: usb1-vbus {
+               pinctrl-0 = <&usb1_vbus_pin_a>;
+               gpio = <&pio 7 27 0>;
+               status = "okay";
+       };
+};
diff --git a/arch/arm/boot/dts/sun6i-a31-m9.dts b/arch/arm/boot/dts/sun6i-a31-m9.dts
new file mode 100644 (file)
index 0000000..bc6115d
--- /dev/null
@@ -0,0 +1,50 @@
+/*
+ * Copyright 2014 Hans de Goede <hdegoede@redhat.com>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "sun6i-a31.dtsi"
+/include/ "sunxi-common-regulators.dtsi"
+
+/ {
+       model = "Mele M9 / A1000G Quad top set box";
+       compatible = "mele,m9", "allwinner,sun6i-a31";
+
+       chosen {
+               bootargs = "earlyprintk console=ttyS0,115200";
+       };
+
+       soc@01c00000 {
+               mmc0: mmc@01c0f000 {
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_m9>;
+                       vmmc-supply = <&reg_vcc3v3>;
+                       bus-width = <4>;
+                       cd-gpios = <&pio 7 22 0>; /* PH22 */
+                       cd-inverted;
+                       status = "okay";
+               };
+
+               pio: pinctrl@01c20800 {
+                       mmc0_cd_pin_m9: mmc0_cd_pin@0 {
+                               allwinner,pins = "PH22";
+                               allwinner,function = "gpio_in";
+                               allwinner,drive = <0>;
+                               allwinner,pull = <1>;
+                       };
+               };
+
+               uart0: serial@01c28000 {
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&uart0_pins_a>;
+                       status = "okay";
+               };
+       };
+};
index d45efa74827cb542655bf618b9b24d2d4c178c01..2ad880c0821d6edf83f93d5ce580f68332022e63 100644 (file)
                reg = <0x40000000 0x80000000>;
        };
 
+       pmu {
+               compatible = "arm,cortex-a7-pmu", "arm,cortex-a15-pmu";
+               interrupts = <0 120 4>,
+                            <0 121 4>,
+                            <0 122 4>,
+                            <0 123 4>;
+       };
+
        clocks {
                #address-cells = <1>;
                #size-cells = <1>;
                                        "apb2_uart4", "apb2_uart5";
                };
 
+               mmc0_clk: clk@01c20088 {
+                       #clock-cells = <0>;
+                       compatible = "allwinner,sun4i-a10-mod0-clk";
+                       reg = <0x01c20088 0x4>;
+                       clocks = <&osc24M>, <&pll6>;
+                       clock-output-names = "mmc0";
+               };
+
+               mmc1_clk: clk@01c2008c {
+                       #clock-cells = <0>;
+                       compatible = "allwinner,sun4i-a10-mod0-clk";
+                       reg = <0x01c2008c 0x4>;
+                       clocks = <&osc24M>, <&pll6>;
+                       clock-output-names = "mmc1";
+               };
+
+               mmc2_clk: clk@01c20090 {
+                       #clock-cells = <0>;
+                       compatible = "allwinner,sun4i-a10-mod0-clk";
+                       reg = <0x01c20090 0x4>;
+                       clocks = <&osc24M>, <&pll6>;
+                       clock-output-names = "mmc2";
+               };
+
+               mmc3_clk: clk@01c20094 {
+                       #clock-cells = <0>;
+                       compatible = "allwinner,sun4i-a10-mod0-clk";
+                       reg = <0x01c20094 0x4>;
+                       clocks = <&osc24M>, <&pll6>;
+                       clock-output-names = "mmc3";
+               };
+
                spi0_clk: clk@01c200a0 {
                        #clock-cells = <0>;
                        compatible = "allwinner,sun4i-a10-mod0-clk";
                        clocks = <&osc24M>, <&pll6>;
                        clock-output-names = "spi3";
                };
+
+               usb_clk: clk@01c200cc {
+                       #clock-cells = <1>;
+                       #reset-cells = <1>;
+                       compatible = "allwinner,sun6i-a31-usb-clk";
+                       reg = <0x01c200cc 0x4>;
+                       clocks = <&osc24M>;
+                       clock-output-names = "usb_phy0", "usb_phy1", "usb_phy2",
+                                            "usb_ohci0", "usb_ohci1",
+                                            "usb_ohci2";
+               };
        };
 
        soc@01c00000 {
                #size-cells = <1>;
                ranges;
 
-               nmi_intc: interrupt-controller@01f00c0c {
-                       compatible = "allwinner,sun6i-a31-sc-nmi";
-                       interrupt-controller;
-                       #interrupt-cells = <2>;
-                       reg = <0x01f00c0c 0x38>;
-                       interrupts = <0 32 4>;
+               dma: dma-controller@01c02000 {
+                       compatible = "allwinner,sun6i-a31-dma";
+                       reg = <0x01c02000 0x1000>;
+                       interrupts = <0 50 4>;
+                       clocks = <&ahb1_gates 6>;
+                       resets = <&ahb1_rst 6>;
+                       #dma-cells = <1>;
+               };
+
+               mmc0: mmc@01c0f000 {
+                       compatible = "allwinner,sun5i-a13-mmc";
+                       reg = <0x01c0f000 0x1000>;
+                       clocks = <&ahb1_gates 8>, <&mmc0_clk>;
+                       clock-names = "ahb", "mmc";
+                       resets = <&ahb1_rst 8>;
+                       reset-names = "ahb";
+                       interrupts = <0 60 4>;
+                       status = "disabled";
+               };
+
+               mmc1: mmc@01c10000 {
+                       compatible = "allwinner,sun5i-a13-mmc";
+                       reg = <0x01c10000 0x1000>;
+                       clocks = <&ahb1_gates 9>, <&mmc1_clk>;
+                       clock-names = "ahb", "mmc";
+                       resets = <&ahb1_rst 9>;
+                       reset-names = "ahb";
+                       interrupts = <0 61 4>;
+                       status = "disabled";
+               };
+
+               mmc2: mmc@01c11000 {
+                       compatible = "allwinner,sun5i-a13-mmc";
+                       reg = <0x01c11000 0x1000>;
+                       clocks = <&ahb1_gates 10>, <&mmc2_clk>;
+                       clock-names = "ahb", "mmc";
+                       resets = <&ahb1_rst 10>;
+                       reset-names = "ahb";
+                       interrupts = <0 62 4>;
+                       status = "disabled";
+               };
+
+               mmc3: mmc@01c12000 {
+                       compatible = "allwinner,sun5i-a13-mmc";
+                       reg = <0x01c12000 0x1000>;
+                       clocks = <&ahb1_gates 11>, <&mmc3_clk>;
+                       clock-names = "ahb", "mmc";
+                       resets = <&ahb1_rst 11>;
+                       reset-names = "ahb";
+                       interrupts = <0 63 4>;
+                       status = "disabled";
+               };
+
+               usbphy: phy@01c19400 {
+                       compatible = "allwinner,sun6i-a31-usb-phy";
+                       reg = <0x01c19400 0x10>,
+                             <0x01c1a800 0x4>,
+                             <0x01c1b800 0x4>;
+                       reg-names = "phy_ctrl",
+                                   "pmu1",
+                                   "pmu2";
+                       clocks = <&usb_clk 8>,
+                                <&usb_clk 9>,
+                                <&usb_clk 10>;
+                       clock-names = "usb0_phy",
+                                     "usb1_phy",
+                                     "usb2_phy";
+                       resets = <&usb_clk 0>,
+                                <&usb_clk 1>,
+                                <&usb_clk 2>;
+                       reset-names = "usb0_reset",
+                                     "usb1_reset",
+                                     "usb2_reset";
+                       status = "disabled";
+                       #phy-cells = <1>;
+               };
+
+               ehci0: usb@01c1a000 {
+                       compatible = "allwinner,sun6i-a31-ehci", "generic-ehci";
+                       reg = <0x01c1a000 0x100>;
+                       interrupts = <0 72 4>;
+                       clocks = <&ahb1_gates 26>;
+                       resets = <&ahb1_rst 26>;
+                       phys = <&usbphy 1>;
+                       phy-names = "usb";
+                       status = "disabled";
+               };
+
+               ohci0: usb@01c1a400 {
+                       compatible = "allwinner,sun6i-a31-ohci", "generic-ohci";
+                       reg = <0x01c1a400 0x100>;
+                       interrupts = <0 73 4>;
+                       clocks = <&ahb1_gates 29>, <&usb_clk 16>;
+                       resets = <&ahb1_rst 29>;
+                       phys = <&usbphy 1>;
+                       phy-names = "usb";
+                       status = "disabled";
+               };
+
+               ehci1: usb@01c1b000 {
+                       compatible = "allwinner,sun6i-a31-ehci", "generic-ehci";
+                       reg = <0x01c1b000 0x100>;
+                       interrupts = <0 74 4>;
+                       clocks = <&ahb1_gates 27>;
+                       resets = <&ahb1_rst 27>;
+                       phys = <&usbphy 2>;
+                       phy-names = "usb";
+                       status = "disabled";
+               };
+
+               ohci1: usb@01c1b400 {
+                       compatible = "allwinner,sun6i-a31-ohci", "generic-ohci";
+                       reg = <0x01c1b400 0x100>;
+                       interrupts = <0 75 4>;
+                       clocks = <&ahb1_gates 30>, <&usb_clk 17>;
+                       resets = <&ahb1_rst 30>;
+                       phys = <&usbphy 2>;
+                       phy-names = "usb";
+                       status = "disabled";
+               };
+
+               ohci2: usb@01c1c000 {
+                       compatible = "allwinner,sun6i-a31-ohci", "generic-ohci";
+                       reg = <0x01c1c400 0x100>;
+                       interrupts = <0 77 4>;
+                       clocks = <&ahb1_gates 31>, <&usb_clk 18>;
+                       resets = <&ahb1_rst 31>;
+                       status = "disabled";
                };
 
                pio: pinctrl@01c20800 {
                                allwinner,drive = <0>;
                                allwinner,pull = <0>;
                        };
+
+                       mmc0_pins_a: mmc0@0 {
+                               allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";
+                               allwinner,function = "mmc0";
+                               allwinner,drive = <2>;
+                               allwinner,pull = <0>;
+                       };
                };
 
                ahb1_rst: reset@01c202c0 {
                        reg-io-width = <4>;
                        clocks = <&apb2_gates 16>;
                        resets = <&apb2_rst 16>;
+                       dmas = <&dma 6>, <&dma 6>;
+                       dma-names = "rx", "tx";
                        status = "disabled";
                };
 
                        reg-io-width = <4>;
                        clocks = <&apb2_gates 17>;
                        resets = <&apb2_rst 17>;
+                       dmas = <&dma 7>, <&dma 7>;
+                       dma-names = "rx", "tx";
                        status = "disabled";
                };
 
                        reg-io-width = <4>;
                        clocks = <&apb2_gates 18>;
                        resets = <&apb2_rst 18>;
+                       dmas = <&dma 8>, <&dma 8>;
+                       dma-names = "rx", "tx";
                        status = "disabled";
                };
 
                        reg-io-width = <4>;
                        clocks = <&apb2_gates 19>;
                        resets = <&apb2_rst 19>;
+                       dmas = <&dma 9>, <&dma 9>;
+                       dma-names = "rx", "tx";
                        status = "disabled";
                };
 
                        reg-io-width = <4>;
                        clocks = <&apb2_gates 20>;
                        resets = <&apb2_rst 20>;
+                       dmas = <&dma 10>, <&dma 10>;
+                       dma-names = "rx", "tx";
                        status = "disabled";
                };
 
                        reg-io-width = <4>;
                        clocks = <&apb2_gates 21>;
                        resets = <&apb2_rst 21>;
+                       dmas = <&dma 22>, <&dma 22>;
+                       dma-names = "rx", "tx";
                        status = "disabled";
                };
 
                        interrupts = <0 65 4>;
                        clocks = <&ahb1_gates 20>, <&spi0_clk>;
                        clock-names = "ahb", "mod";
+                       dmas = <&dma 23>, <&dma 23>;
+                       dma-names = "rx", "tx";
                        resets = <&ahb1_rst 20>;
                        status = "disabled";
                };
                        interrupts = <0 66 4>;
                        clocks = <&ahb1_gates 21>, <&spi1_clk>;
                        clock-names = "ahb", "mod";
+                       dmas = <&dma 24>, <&dma 24>;
+                       dma-names = "rx", "tx";
                        resets = <&ahb1_rst 21>;
                        status = "disabled";
                };
                        interrupts = <0 67 4>;
                        clocks = <&ahb1_gates 22>, <&spi2_clk>;
                        clock-names = "ahb", "mod";
+                       dmas = <&dma 25>, <&dma 25>;
+                       dma-names = "rx", "tx";
                        resets = <&ahb1_rst 22>;
                        status = "disabled";
                };
                        interrupts = <0 68 4>;
                        clocks = <&ahb1_gates 23>, <&spi3_clk>;
                        clock-names = "ahb", "mod";
+                       dmas = <&dma 26>, <&dma 26>;
+                       dma-names = "rx", "tx";
                        resets = <&ahb1_rst 23>;
                        status = "disabled";
                };
                        interrupts = <1 9 0xf04>;
                };
 
+               nmi_intc: interrupt-controller@01f00c0c {
+                       compatible = "allwinner,sun6i-a31-sc-nmi";
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
+                       reg = <0x01f00c0c 0x38>;
+                       interrupts = <0 32 4>;
+               };
+
+               prcm@01f01400 {
+                       compatible = "allwinner,sun6i-a31-prcm";
+                       reg = <0x01f01400 0x200>;
+
+                       ar100: ar100_clk {
+                               compatible = "allwinner,sun6i-a31-ar100-clk";
+                               #clock-cells = <0>;
+                               clocks = <&osc32k>, <&osc24M>, <&pll6>, <&pll6>;
+                               clock-output-names = "ar100";
+                       };
+
+                       ahb0: ahb0_clk {
+                               compatible = "fixed-factor-clock";
+                               #clock-cells = <0>;
+                               clock-div = <1>;
+                               clock-mult = <1>;
+                               clocks = <&ar100>;
+                               clock-output-names = "ahb0";
+                       };
+
+                       apb0: apb0_clk {
+                               compatible = "allwinner,sun6i-a31-apb0-clk";
+                               #clock-cells = <0>;
+                               clocks = <&ahb0>;
+                               clock-output-names = "apb0";
+                       };
+
+                       apb0_gates: apb0_gates_clk {
+                               compatible = "allwinner,sun6i-a31-apb0-gates-clk";
+                               #clock-cells = <1>;
+                               clocks = <&apb0>;
+                               clock-output-names = "apb0_pio", "apb0_ir",
+                                               "apb0_timer", "apb0_p2wi",
+                                               "apb0_uart", "apb0_1wire",
+                                               "apb0_i2c";
+                       };
+
+                       apb0_rst: apb0_rst {
+                               compatible = "allwinner,sun6i-a31-clock-reset";
+                               #reset-cells = <1>;
+                       };
+               };
+
                cpucfg@01f01c00 {
                        compatible = "allwinner,sun6i-a31-cpuconfig";
                        reg = <0x01f01c00 0x300>;
                };
 
-               prcm@01f01c00 {
-                       compatible = "allwinner,sun6i-a31-prcm";
-                       reg = <0x01f01400 0x200>;
+               r_pio: pinctrl@01f02c00 {
+                       compatible = "allwinner,sun6i-a31-r-pinctrl";
+                       reg = <0x01f02c00 0x400>;
+                       interrupts = <0 45 4>,
+                                    <0 46 4>;
+                       clocks = <&apb0_gates 0>;
+                       resets = <&apb0_rst 0>;
+                       gpio-controller;
+                       interrupt-controller;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       #gpio-cells = <3>;
                };
        };
 };
index 68de89ffbdfad7cca723fd53fe7c3d280b09046a..a5ad945197e833487c0ce09bdc94bbaf84850730 100644 (file)
        compatible = "cubietech,cubieboard2", "allwinner,sun7i-a20";
 
        soc@01c00000 {
+               mmc0: mmc@01c0f000 {
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+                       vmmc-supply = <&reg_vcc3v3>;
+                       bus-width = <4>;
+                       cd-gpios = <&pio 7 1 0>; /* PH1 */
+                       cd-inverted;
+                       status = "okay";
+               };
+
                usbphy: phy@01c13400 {
                        usb1_vbus-supply = <&reg_usb1_vbus>;
                        usb2_vbus-supply = <&reg_usb2_vbus>;
index cb25d3c8da5833bae48d777325be4081b11bedb8..b7e79d0bf4a7e89dd13e25982e57bf8d22b65577 100644 (file)
        compatible = "cubietech,cubietruck", "allwinner,sun7i-a20";
 
        soc@01c00000 {
+               mmc0: mmc@01c0f000 {
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+                       vmmc-supply = <&reg_vcc3v3>;
+                       bus-width = <4>;
+                       cd-gpios = <&pio 7 1 0>; /* PH1 */
+                       cd-inverted;
+                       status = "okay";
+               };
+
+               mmc3: mmc@01c12000 {
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&mmc3_pins_a>;
+                       vmmc-supply = <&reg_vmmc3>;
+                       non-removable;
+                       status = "okay";
+               };
+
                usbphy: phy@01c13400 {
                        usb1_vbus-supply = <&reg_usb1_vbus>;
                        usb2_vbus-supply = <&reg_usb2_vbus>;
                };
 
                pinctrl@01c20800 {
+                       mmc3_pins_a: mmc3@0 {
+                               /* AP6210 requires pull-up */
+                               allwinner,pull = <1>;
+                       };
+
+                       vmmc3_pin_cubietruck: vmmc3_pin@0 {
+                               allwinner,pins = "PH9";
+                               allwinner,function = "gpio_out";
+                               allwinner,drive = <0>;
+                               allwinner,pull = <0>;
+                       };
+
                        ahci_pwr_pin_cubietruck: ahci_pwr_pin@1 {
                                allwinner,pins = "PH12";
                                allwinner,function = "gpio_out";
                        };
                };
 
+               pwm: pwm@01c20e00 {
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pwm0_pins_a>, <&pwm1_pins_a>;
+                       status = "okay";
+               };
+
                uart0: serial@01c28000 {
                        pinctrl-names = "default";
                        pinctrl-0 = <&uart0_pins_a>;
        reg_usb2_vbus: usb2-vbus {
                status = "okay";
        };
+
+       reg_vmmc3: vmmc3 {
+               compatible = "regulator-fixed";
+               pinctrl-names = "default";
+               pinctrl-0 = <&vmmc3_pin_cubietruck>;
+               regulator-name = "vmmc3";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               enable-active-high;
+               gpio = <&pio 7 9 0>;
+       };
 };
index eeadf76362fa4238875bc83f6b0853edbba9c5c6..b759630bc9a99d9461d8bb171274881dca59c016 100644 (file)
                        status = "okay";
                };
 
+               mmc0: mmc@01c0f000 {
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+                       vmmc-supply = <&reg_vcc3v3>;
+                       bus-width = <4>;
+                       cd-gpios = <&pio 7 1 0>; /* PH1 */
+                       cd-inverted;
+                       status = "okay";
+               };
+
+               mmc3: mmc@01c12000 {
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&mmc3_pins_a>, <&mmc3_cd_pin_olinuxinom>;
+                       vmmc-supply = <&reg_vcc3v3>;
+                       bus-width = <4>;
+                       cd-gpios = <&pio 7 11 0>; /* PH11 */
+                       cd-inverted;
+                       status = "okay";
+               };
+
                usbphy: phy@01c13400 {
                        usb1_vbus-supply = <&reg_usb1_vbus>;
                        usb2_vbus-supply = <&reg_usb2_vbus>;
                };
 
                pinctrl@01c20800 {
+                       mmc3_cd_pin_olinuxinom: mmc3_cd_pin@0 {
+                               allwinner,pins = "PH11";
+                               allwinner,function = "gpio_in";
+                               allwinner,drive = <0>;
+                               allwinner,pull = <1>;
+                       };
+
                        led_pins_olinuxino: led_pins@0 {
                                allwinner,pins = "PH2";
                                allwinner,function = "gpio_out";
index 32efc105df834de3c3143938bf0cfdebbf5d1b55..56df970ffe25337f0090a9f43aad7d501c9be700 100644 (file)
                             <1 10 0xf08>;
        };
 
+       pmu {
+               compatible = "arm,cortex-a7-pmu", "arm,cortex-a15-pmu";
+               interrupts = <0 120 4>,
+                            <0 121 4>;
+       };
+
        clocks {
                #address-cells = <1>;
                #size-cells = <1>;
                        #size-cells = <0>;
                };
 
+               mmc0: mmc@01c0f000 {
+                       compatible = "allwinner,sun5i-a13-mmc";
+                       reg = <0x01c0f000 0x1000>;
+                       clocks = <&ahb_gates 8>, <&mmc0_clk>;
+                       clock-names = "ahb", "mmc";
+                       interrupts = <0 32 4>;
+                       status = "disabled";
+               };
+
+               mmc1: mmc@01c10000 {
+                       compatible = "allwinner,sun5i-a13-mmc";
+                       reg = <0x01c10000 0x1000>;
+                       clocks = <&ahb_gates 9>, <&mmc1_clk>;
+                       clock-names = "ahb", "mmc";
+                       interrupts = <0 33 4>;
+                       status = "disabled";
+               };
+
+               mmc2: mmc@01c11000 {
+                       compatible = "allwinner,sun5i-a13-mmc";
+                       reg = <0x01c11000 0x1000>;
+                       clocks = <&ahb_gates 10>, <&mmc2_clk>;
+                       clock-names = "ahb", "mmc";
+                       interrupts = <0 34 4>;
+                       status = "disabled";
+               };
+
+               mmc3: mmc@01c12000 {
+                       compatible = "allwinner,sun5i-a13-mmc";
+                       reg = <0x01c12000 0x1000>;
+                       clocks = <&ahb_gates 11>, <&mmc3_clk>;
+                       clock-names = "ahb", "mmc";
+                       interrupts = <0 35 4>;
+                       status = "disabled";
+               };
+
                usbphy: phy@01c13400 {
                        #phy-cells = <1>;
                        compatible = "allwinner,sun7i-a20-usb-phy";
                        #size-cells = <0>;
                        #gpio-cells = <3>;
 
+                       pwm0_pins_a: pwm0@0 {
+                               allwinner,pins = "PB2";
+                               allwinner,function = "pwm";
+                               allwinner,drive = <0>;
+                               allwinner,pull = <0>;
+                       };
+
+                       pwm1_pins_a: pwm1@0 {
+                               allwinner,pins = "PI3";
+                               allwinner,function = "pwm";
+                               allwinner,drive = <0>;
+                               allwinner,pull = <0>;
+                       };
+
                        uart0_pins_a: uart0@0 {
                                allwinner,pins = "PB22", "PB23";
                                allwinner,function = "uart0";
                                allwinner,drive = <0>;
                                allwinner,pull = <0>;
                        };
+
+                       mmc0_pins_a: mmc0@0 {
+                               allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";
+                               allwinner,function = "mmc0";
+                               allwinner,drive = <2>;
+                               allwinner,pull = <0>;
+                       };
+
+                       mmc0_cd_pin_reference_design: mmc0_cd_pin@0 {
+                               allwinner,pins = "PH1";
+                               allwinner,function = "gpio_in";
+                               allwinner,drive = <0>;
+                               allwinner,pull = <1>;
+                       };
+
+                       mmc3_pins_a: mmc3@0 {
+                               allwinner,pins = "PI4","PI5","PI6","PI7","PI8","PI9";
+                               allwinner,function = "mmc3";
+                               allwinner,drive = <2>;
+                               allwinner,pull = <0>;
+                       };
                };
 
                timer@01c20c00 {
                        interrupts = <0 24 4>;
                };
 
+               pwm: pwm@01c20e00 {
+                       compatible = "allwinner,sun7i-a20-pwm";
+                       reg = <0x01c20e00 0xc>;
+                       clocks = <&osc24M>;
+                       #pwm-cells = <3>;
+                       status = "disabled";
+               };
+
                sid: eeprom@01c23800 {
                        compatible = "allwinner,sun7i-a20-sid";
                        reg = <0x01c23800 0x200>;
                        clocks = <&apb1_gates 0>;
                        clock-frequency = <100000>;
                        status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                };
 
                i2c1: i2c@01c2b000 {
                        clocks = <&apb1_gates 1>;
                        clock-frequency = <100000>;
                        status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                };
 
                i2c2: i2c@01c2b400 {
                        clocks = <&apb1_gates 2>;
                        clock-frequency = <100000>;
                        status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                };
 
                i2c3: i2c@01c2b800 {
                        clocks = <&apb1_gates 3>;
                        clock-frequency = <100000>;
                        status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                };
 
                i2c4: i2c@01c2bc00 {
                        clocks = <&apb1_gates 15>;
                        clock-frequency = <100000>;
                        status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                };
 
                gmac: ethernet@01c50000 {
index 18eeac0670b98ee705131e4bedd61b3b64d4f9b6..026bd83f078ff6b58f9ffbd76c8b380ab318eafb 100644 (file)
                gpio = <&pio 7 3 0>;
                status = "disabled";
        };
+
+       reg_vcc3v3: vcc3v3 {
+               compatible = "regulator-fixed";
+               regulator-name = "vcc3v3";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+       };
 };
index a288a12823ed84a1ba42ffae2a1a4e9bd0cd61b6..5c21d216515a3d5a06b76a4b449cc72ef208b6af 100644 (file)
@@ -25,6 +25,7 @@
                hdmi@54280000 {
                        status = "okay";
 
+                       hdmi-supply = <&vdd_5v0_hdmi>;
                        vdd-supply = <&vdd_hdmi_reg>;
                        pll-supply = <&palmas_smps3_reg>;
 
@@ -36,6 +37,8 @@
                dsi@54300000 {
                        status = "okay";
 
+                       avdd-dsi-csi-supply = <&avdd_1v2_reg>;
+
                        panel@0 {
                                compatible = "panasonic,vvx10f004b00",
                                             "simple-panel";
                                                regulator-max-microvolt = <2800000>;
                                        };
 
-                                       ldo3 {
+                                       avdd_1v2_reg: ldo3 {
                                                regulator-name = "avdd-dsi-csi";
                                                regulator-min-microvolt = <1200000>;
                                                regulator-max-microvolt = <1200000>;
-                                               regulator-always-on;
-                                               regulator-boot-on;
                                        };
 
                                        ldo4 {
 
        sdhci@78000400 {
                cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
+               wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_HIGH>;
                bus-width = <4>;
                status = "okay";
        };
                        regulator-name = "vdd_hdmi_5v0";
                        regulator-min-microvolt = <5000000>;
                        regulator-max-microvolt = <5000000>;
-                       enable-active-high;
-                       gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
                        vin-supply = <&tps65090_dcdc1_reg>;
                };
 
                        enable-active-high;
                        gpio = <&palmas_gpio 6 0>;
                };
+
+               vdd_5v0_hdmi: regulator@7 {
+                       compatible = "regulator-fixed";
+                       reg = <7>;
+                       regulator-name = "VDD_5V0_HDMI_CON";
+                       regulator-min-microvolt = <5000000>;
+                       regulator-max-microvolt = <5000000>;
+                       gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
+                       enable-active-high;
+                       vin-supply = <&tps65090_dcdc1_reg>;
+               };
        };
 
        sound {
diff --git a/arch/arm/boot/dts/tegra114-roth.dts b/arch/arm/boot/dts/tegra114-roth.dts
new file mode 100644 (file)
index 0000000..0b0e8e0
--- /dev/null
@@ -0,0 +1,1113 @@
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+#include "tegra114.dtsi"
+
+/ {
+       model = "NVIDIA SHIELD";
+       compatible = "nvidia,roth", "nvidia,tegra114";
+
+       chosen {
+               /* SHIELD's bootloader's arguments need to be overridden */
+               bootargs = "console=ttyS0,115200n8 console=tty1 gpt fbcon=rotate:1";
+               /* SHIELD's bootloader will place initrd at this address */
+               linux,initrd-start = <0x82000000>;
+               linux,initrd-end = <0x82800000>;
+       };
+
+       firmware {
+               trusted-foundations {
+                       compatible = "tlm,trusted-foundations";
+                       tlm,version-major = <2>;
+                       tlm,version-minor = <8>;
+               };
+       };
+
+       memory {
+               /* memory >= 0x79600000 is reserved for firmware usage */
+               reg = <0x80000000 0x79600000>;
+       };
+
+       pinmux@70000868 {
+               pinctrl-names = "default";
+               pinctrl-0 = <&state_default>;
+
+               state_default: pinmux {
+                       clk1_out_pw4 {
+                               nvidia,pins = "clk1_out_pw4";
+                               nvidia,function = "extperiph1";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       dap1_din_pn1 {
+                               nvidia,pins = "dap1_din_pn1";
+                               nvidia,function = "i2s0";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_ENABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       dap1_dout_pn2 {
+                               nvidia,pins = "dap1_dout_pn2",
+                                               "dap1_fs_pn0",
+                                               "dap1_sclk_pn3";
+                               nvidia,function = "i2s0";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       dap2_din_pa4 {
+                               nvidia,pins = "dap2_din_pa4";
+                               nvidia,function = "i2s1";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_ENABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       dap2_dout_pa5 {
+                               nvidia,pins = "dap2_dout_pa5",
+                                               "dap2_fs_pa2",
+                                               "dap2_sclk_pa3";
+                               nvidia,function = "i2s1";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       dap4_din_pp5 {
+                               nvidia,pins = "dap4_din_pp5",
+                                               "dap4_dout_pp6",
+                                               "dap4_fs_pp4",
+                                               "dap4_sclk_pp7";
+                               nvidia,function = "i2s3";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       dvfs_pwm_px0 {
+                               nvidia,pins = "dvfs_pwm_px0",
+                                               "dvfs_clk_px2";
+                               nvidia,function = "cldvfs";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       ulpi_clk_py0 {
+                               nvidia,pins = "ulpi_clk_py0",
+                                               "ulpi_data0_po1",
+                                               "ulpi_data1_po2",
+                                               "ulpi_data2_po3",
+                                               "ulpi_data3_po4",
+                                               "ulpi_data4_po5",
+                                               "ulpi_data5_po6",
+                                               "ulpi_data6_po7",
+                                               "ulpi_data7_po0";
+                               nvidia,function = "ulpi";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       ulpi_dir_py1 {
+                               nvidia,pins = "ulpi_dir_py1",
+                                               "ulpi_nxt_py2";
+                               nvidia,function = "ulpi";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_ENABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       ulpi_stp_py3 {
+                               nvidia,pins = "ulpi_stp_py3";
+                               nvidia,function = "ulpi";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       cam_i2c_scl_pbb1 {
+                               nvidia,pins = "cam_i2c_scl_pbb1",
+                                               "cam_i2c_sda_pbb2";
+                               nvidia,function = "i2c3";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                               nvidia,lock = <TEGRA_PIN_DISABLE>;
+                               nvidia,open-drain = <TEGRA_PIN_DISABLE>;
+                       };
+                       cam_mclk_pcc0 {
+                               nvidia,pins = "cam_mclk_pcc0",
+                                               "pbb0";
+                               nvidia,function = "vi_alt3";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                               nvidia,lock = <TEGRA_PIN_DISABLE>;
+                       };
+                       pbb4 {
+                               nvidia,pins = "pbb4";
+                               nvidia,function = "vgp4";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                               nvidia,lock = <TEGRA_PIN_DISABLE>;
+                       };
+                       gen2_i2c_scl_pt5 {
+                               nvidia,pins = "gen2_i2c_scl_pt5",
+                                               "gen2_i2c_sda_pt6";
+                               nvidia,function = "i2c2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                               nvidia,lock = <TEGRA_PIN_DISABLE>;
+                               nvidia,open-drain = <TEGRA_PIN_DISABLE>;
+                       };
+                       gmi_a16_pj7 {
+                               nvidia,pins = "gmi_a16_pj7",
+                                               "gmi_a19_pk7";
+                               nvidia,function = "uartd";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       gmi_a17_pb0 {
+                               nvidia,pins = "gmi_a17_pb0",
+                                               "gmi_a18_pb1";
+                               nvidia,function = "uartd";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_ENABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       gmi_ad5_pg5 {
+                               nvidia,pins = "gmi_ad5_pg5",
+                                               "gmi_wr_n_pi0";
+                               nvidia,function = "spi4";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       gmi_ad6_pg6 {
+                               nvidia,pins = "gmi_ad6_pg6",
+                                               "gmi_ad7_pg7";
+                               nvidia,function = "spi4";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       gmi_ad12_ph4 {
+                               nvidia,pins = "gmi_ad12_ph4";
+                               nvidia,function = "rsvd4";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       gmi_cs6_n_pi13 {
+                               nvidia,pins = "gmi_cs6_n_pi3";
+                               nvidia,function = "nand";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_ENABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       gmi_ad9_ph1 {
+                               nvidia,pins = "gmi_ad9_ph1";
+                               nvidia,function = "pwm1";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       gmi_cs1_n_pj2 {
+                               nvidia,pins = "gmi_cs1_n_pj2",
+                                               "gmi_oe_n_pi1";
+                               nvidia,function = "soc";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_ENABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       gmi_rst_n_pi4 {
+                               nvidia,pins = "gmi_rst_n_pi4";
+                               nvidia,function = "gmi";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       gmi_iordy_pi5 {
+                               nvidia,pins = "gmi_iordy_pi5";
+                               nvidia,function = "gmi";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_ENABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       clk2_out_pw5 {
+                               nvidia,pins = "clk2_out_pw5";
+                               nvidia,function = "extperiph2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       sdmmc1_clk_pz0 {
+                               nvidia,pins = "sdmmc1_clk_pz0";
+                               nvidia,function = "sdmmc1";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       sdmmc1_cmd_pz1 {
+                               nvidia,pins = "sdmmc1_cmd_pz1",
+                                               "sdmmc1_dat0_py7",
+                                               "sdmmc1_dat1_py6",
+                                               "sdmmc1_dat2_py5",
+                                               "sdmmc1_dat3_py4";
+                               nvidia,function = "sdmmc1";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       sdmmc3_clk_pa6 {
+                               nvidia,pins = "sdmmc3_clk_pa6";
+                               nvidia,function = "sdmmc3";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       sdmmc3_cmd_pa7 {
+                               nvidia,pins = "sdmmc3_cmd_pa7",
+                                               "sdmmc3_dat0_pb7",
+                                               "sdmmc3_dat1_pb6",
+                                               "sdmmc3_dat2_pb5",
+                                               "sdmmc3_dat3_pb4",
+                                               "sdmmc3_cd_n_pv2",
+                                               "sdmmc3_clk_lb_out_pee4",
+                                               "sdmmc3_clk_lb_in_pee5";
+                               nvidia,function = "sdmmc3";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       kb_col4_pq4 {
+                               nvidia,pins = "kb_col4_pq4";
+                               nvidia,function = "sdmmc3";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_ENABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       sdmmc4_clk_pcc4 {
+                               nvidia,pins = "sdmmc4_clk_pcc4";
+                               nvidia,function = "sdmmc4";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       sdmmc4_cmd_pt7 {
+                               nvidia,pins = "sdmmc4_cmd_pt7",
+                                               "sdmmc4_dat0_paa0",
+                                               "sdmmc4_dat1_paa1",
+                                               "sdmmc4_dat2_paa2",
+                                               "sdmmc4_dat3_paa3",
+                                               "sdmmc4_dat4_paa4",
+                                               "sdmmc4_dat5_paa5",
+                                               "sdmmc4_dat6_paa6",
+                                               "sdmmc4_dat7_paa7";
+                               nvidia,function = "sdmmc4";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       clk_32k_out_pa0 {
+                               nvidia,pins = "clk_32k_out_pa0";
+                               nvidia,function = "blink";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       kb_col0_pq0 {
+                               nvidia,pins = "kb_col0_pq0",
+                                               "kb_col1_pq1",
+                                               "kb_col2_pq2",
+                                               "kb_row0_pr0",
+                                               "kb_row1_pr1",
+                                               "kb_row2_pr2",
+                                               "kb_row8_ps0";
+                               nvidia,function = "kbc";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       kb_row7_pr7 {
+                               nvidia,pins = "kb_row7_pr7";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       kb_row10_ps2 {
+                               nvidia,pins = "kb_row10_ps2";
+                               nvidia,function = "uarta";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_ENABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       kb_row9_ps1 {
+                               nvidia,pins = "kb_row9_ps1";
+                               nvidia,function = "uarta";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       pwr_i2c_scl_pz6 {
+                               nvidia,pins = "pwr_i2c_scl_pz6",
+                                               "pwr_i2c_sda_pz7";
+                               nvidia,function = "i2cpwr";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                               nvidia,lock = <TEGRA_PIN_DISABLE>;
+                               nvidia,open-drain = <TEGRA_PIN_DISABLE>;
+                       };
+                       sys_clk_req_pz5 {
+                               nvidia,pins = "sys_clk_req_pz5";
+                               nvidia,function = "sysclk";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       core_pwr_req {
+                               nvidia,pins = "core_pwr_req";
+                               nvidia,function = "pwron";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       cpu_pwr_req {
+                               nvidia,pins = "cpu_pwr_req";
+                               nvidia,function = "cpu";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       pwr_int_n {
+                               nvidia,pins = "pwr_int_n";
+                               nvidia,function = "pmi";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_ENABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       reset_out_n {
+                               nvidia,pins = "reset_out_n";
+                               nvidia,function = "reset_out_n";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       clk3_out_pee0 {
+                               nvidia,pins = "clk3_out_pee0";
+                               nvidia,function = "extperiph3";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       gen1_i2c_scl_pc4 {
+                               nvidia,pins = "gen1_i2c_scl_pc4",
+                                               "gen1_i2c_sda_pc5";
+                               nvidia,function = "i2c1";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                               nvidia,lock = <TEGRA_PIN_DISABLE>;
+                               nvidia,open-drain = <TEGRA_PIN_DISABLE>;
+                       };
+                       uart2_cts_n_pj5 {
+                               nvidia,pins = "uart2_cts_n_pj5";
+                               nvidia,function = "uartb";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_ENABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       uart2_rts_n_pj6 {
+                               nvidia,pins = "uart2_rts_n_pj6";
+                               nvidia,function = "uartb";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       uart2_rxd_pc3 {
+                               nvidia,pins = "uart2_rxd_pc3";
+                               nvidia,function = "irda";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_ENABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       uart2_txd_pc2 {
+                               nvidia,pins = "uart2_txd_pc2";
+                               nvidia,function = "irda";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       uart3_cts_n_pa1 {
+                               nvidia,pins = "uart3_cts_n_pa1",
+                                               "uart3_rxd_pw7";
+                               nvidia,function = "uartc";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_ENABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       uart3_rts_n_pc0 {
+                               nvidia,pins = "uart3_rts_n_pc0",
+                                               "uart3_txd_pw6";
+                               nvidia,function = "uartc";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       owr {
+                               nvidia,pins = "owr";
+                               nvidia,function = "owr";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       hdmi_cec_pee3 {
+                               nvidia,pins = "hdmi_cec_pee3";
+                               nvidia,function = "cec";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                               nvidia,lock = <TEGRA_PIN_DISABLE>;
+                               nvidia,open-drain = <TEGRA_PIN_DISABLE>;
+                       };
+                       ddc_scl_pv4 {
+                               nvidia,pins = "ddc_scl_pv4",
+                                               "ddc_sda_pv5";
+                               nvidia,function = "i2c4";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                               nvidia,lock = <TEGRA_PIN_DISABLE>;
+                               nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
+                       };
+                       spdif_in_pk6 {
+                               nvidia,pins = "spdif_in_pk6";
+                               nvidia,function = "usb";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                               nvidia,lock = <TEGRA_PIN_DISABLE>;
+                       };
+                       usb_vbus_en0_pn4 {
+                               nvidia,pins = "usb_vbus_en0_pn4";
+                               nvidia,function = "usb";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                               nvidia,lock = <TEGRA_PIN_DISABLE>;
+                               nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+                       };
+                       gpio_x6_aud_px6 {
+                               nvidia,pins = "gpio_x6_aud_px6";
+                               nvidia,function = "spi6";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_ENABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       gpio_x1_aud_px1 {
+                               nvidia,pins = "gpio_x1_aud_px1";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       gpio_x7_aud_px7 {
+                               nvidia,pins = "gpio_x7_aud_px7";
+                               nvidia,function = "rsvd1";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       gmi_adv_n_pk0 {
+                               nvidia,pins = "gmi_adv_n_pk0";
+                               nvidia,function = "gmi";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_ENABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       gmi_cs0_n_pj0 {
+                               nvidia,pins = "gmi_cs0_n_pj0";
+                               nvidia,function = "gmi";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       pu3 {
+                               nvidia,pins = "pu3";
+                               nvidia,function = "pwm0";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       gpio_x4_aud_px4 {
+                               nvidia,pins = "gpio_x4_aud_px4",
+                                               "gpio_x5_aud_px5";
+                               nvidia,function = "rsvd1";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       gpio_x3_aud_px3 {
+                               nvidia,pins = "gpio_x3_aud_px3";
+                               nvidia,function = "rsvd4";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       gpio_w2_aud_pw2 {
+                               nvidia,pins = "gpio_w2_aud_pw2";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       gpio_w3_aud_pw3 {
+                               nvidia,pins = "gpio_w3_aud_pw3";
+                               nvidia,function = "spi6";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       dap3_fs_pp0 {
+                               nvidia,pins = "dap3_fs_pp0",
+                                               "dap3_din_pp1",
+                                               "dap3_dout_pp2",
+                                               "dap3_sclk_pp3";
+                               nvidia,function = "i2s2";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       pv0 {
+                               nvidia,pins = "pv0";
+                               nvidia,function = "rsvd4";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       pv1 {
+                               nvidia,pins = "pv1";
+                               nvidia,function = "rsvd1";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       pbb3 {
+                               nvidia,pins = "pbb3",
+                                               "pbb5",
+                                               "pbb6",
+                                               "pbb7";
+                               nvidia,function = "rsvd4";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       pcc1 {
+                               nvidia,pins = "pcc1",
+                                               "pcc2";
+                               nvidia,function = "rsvd4";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       gmi_ad0_pg0 {
+                               nvidia,pins = "gmi_ad0_pg0",
+                                               "gmi_ad1_pg1";
+                               nvidia,function = "gmi";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       gmi_ad10_ph2 {
+                               nvidia,pins = "gmi_ad10_ph2",
+                                               "gmi_ad12_ph4",
+                                               "gmi_ad15_ph7",
+                                               "gmi_cs3_n_pk4";
+                               nvidia,function = "gmi";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       gmi_ad11_ph3 {
+                               nvidia,pins = "gmi_ad11_ph3",
+                                               "gmi_ad13_ph5",
+                                               "gmi_ad8_ph0",
+                                               "gmi_clk_pk1",
+                                               "gmi_cs2_n_pk3";
+                               nvidia,function = "gmi";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       gmi_ad14_ph6 {
+                               nvidia,pins = "gmi_ad14_ph6",
+                                               "gmi_cs0_n_pj0",
+                                               "gmi_cs4_n_pk2",
+                                               "gmi_cs7_n_pi6",
+                                               "gmi_dqs_p_pj3",
+                                               "gmi_wp_n_pc7";
+                               nvidia,function = "gmi";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       gmi_ad2_pg2 {
+                               nvidia,pins = "gmi_ad2_pg2",
+                                               "gmi_ad3_pg3";
+                               nvidia,function = "gmi";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       sdmmc1_wp_n_pv3 {
+                               nvidia,pins = "sdmmc1_wp_n_pv3";
+                               nvidia,function = "spi4";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       clk2_req_pcc5 {
+                               nvidia,pins = "clk2_req_pcc5";
+                               nvidia,function = "rsvd4";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       kb_col3_pq3 {
+                               nvidia,pins = "kb_col3_pq3";
+                               nvidia,function = "pwm2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       kb_col5_pq5 {
+                               nvidia,pins = "kb_col5_pq5";
+                               nvidia,function = "kbc";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       kb_col6_pq6 {
+                               nvidia,pins = "kb_col6_pq6",
+                                               "kb_col7_pq7";
+                               nvidia,function = "kbc";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       kb_row3_pr3 {
+                               nvidia,pins = "kb_row3_pr3",
+                                               "kb_row4_pr4",
+                                               "kb_row6_pr6";
+                               nvidia,function = "kbc";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       clk3_req_pee1 {
+                               nvidia,pins = "clk3_req_pee1";
+                               nvidia,function = "rsvd4";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       pu2 {
+                               nvidia,pins = "pu2";
+                               nvidia,function = "rsvd1";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       hdmi_int_pn7 {
+                               nvidia,pins = "hdmi_int_pn7";
+                               nvidia,function = "rsvd1";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       drive_sdio1 {
+                               nvidia,pins = "drive_sdio1";
+                               nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
+                               nvidia,schmitt = <TEGRA_PIN_DISABLE>;
+                               nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
+                               nvidia,pull-down-strength = <36>;
+                               nvidia,pull-up-strength = <20>;
+                               nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOW>;
+                               nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOW>;
+                       };
+                       drive_sdio3 {
+                               nvidia,pins = "drive_sdio3";
+                               nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
+                               nvidia,schmitt = <TEGRA_PIN_DISABLE>;
+                               nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
+                               nvidia,pull-down-strength = <36>;
+                               nvidia,pull-up-strength = <20>;
+                               nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
+                               nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
+                       };
+                       drive_gma {
+                               nvidia,pins = "drive_gma";
+                               nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
+                               nvidia,schmitt = <TEGRA_PIN_DISABLE>;
+                               nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
+                               nvidia,pull-down-strength = <2>;
+                               nvidia,pull-up-strength = <2>;
+                               nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
+                               nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
+                               nvidia,drive-type = <1>;
+                       };
+               };
+       };
+
+       /* Usable on reworked devices only */
+       serial@70006300 {
+               status = "okay";
+       };
+
+       pwm@7000a000 {
+               status = "okay";
+       };
+
+       i2c@7000d000 {
+               status = "okay";
+               clock-frequency = <400000>;
+
+               regulator@43 {
+                       compatible = "ti,tps51632";
+                       reg = <0x43>;
+                       regulator-name = "vdd-cpu";
+                       regulator-min-microvolt = <500000>;
+                       regulator-max-microvolt = <1520000>;
+                       regulator-always-on;
+                       regulator-boot-on;
+               };
+
+               palmas: pmic@58 {
+                       compatible = "ti,palmas";
+                       reg = <0x58>;
+                       interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_LOW>;
+
+                       #interrupt-cells = <2>;
+                       interrupt-controller;
+
+                       ti,system-power-controller;
+
+                       palmas_gpio: gpio {
+                               compatible = "ti,palmas-gpio";
+                               gpio-controller;
+                               #gpio-cells = <2>;
+                       };
+
+                       pmic {
+                               compatible = "ti,tps65913-pmic", "ti,palmas-pmic";
+
+                               regulators {
+                                       smps12 {
+                                               regulator-name = "vdd-ddr";
+                                               regulator-min-microvolt = <1200000>;
+                                               regulator-max-microvolt = <1500000>;
+                                               regulator-always-on;
+                                               regulator-boot-on;
+                                       };
+
+                                       vdd_1v8: smps3 {
+                                               regulator-name = "vdd-1v8";
+                                               regulator-min-microvolt = <1800000>;
+                                               regulator-max-microvolt = <1800000>;
+                                               regulator-always-on;
+                                               regulator-boot-on;
+                                       };
+
+                                       smps457 {
+                                               regulator-name = "vdd-soc";
+                                               regulator-min-microvolt = <900000>;
+                                               regulator-max-microvolt = <1400000>;
+                                               regulator-always-on;
+                                               regulator-boot-on;
+                                       };
+
+                                       smps8 {
+                                               regulator-name = "avdd-pll-1v05";
+                                               regulator-min-microvolt = <1050000>;
+                                               regulator-max-microvolt = <1050000>;
+                                               regulator-always-on;
+                                               regulator-boot-on;
+                                       };
+
+                                       smps9 {
+                                               regulator-name = "vdd-2v85-emmc";
+                                               regulator-min-microvolt = <2800000>;
+                                               regulator-max-microvolt = <2800000>;
+                                               regulator-always-on;
+                                       };
+
+                                       smps10_out1 {
+                                               regulator-name = "vdd-fan";
+                                               regulator-min-microvolt = <5000000>;
+                                               regulator-max-microvolt = <5000000>;
+                                               regulator-always-on;
+                                               regulator-boot-on;
+                                       };
+
+                                       smps10_out2 {
+                                               regulator-name = "vdd-5v0-sys";
+                                               regulator-min-microvolt = <5000000>;
+                                               regulator-max-microvolt = <5000000>;
+                                               regulator-always-on;
+                                               regulator-boot-on;
+                                       };
+
+                                       ldo2 {
+                                               regulator-name = "vdd-2v8-display";
+                                               regulator-min-microvolt = <2800000>;
+                                               regulator-max-microvolt = <2800000>;
+                                               regulator-boot-on;
+                                       };
+
+                                       ldo3 {
+                                               regulator-name = "avdd-1v2";
+                                               regulator-min-microvolt = <1200000>;
+                                               regulator-max-microvolt = <1200000>;
+                                               regulator-always-on;
+                                               regulator-boot-on;
+                                       };
+
+                                       ldo4 {
+                                               regulator-name = "vpp-fuse";
+                                               regulator-min-microvolt = <1800000>;
+                                               regulator-max-microvolt = <1800000>;
+                                       };
+
+                                       ldo5 {
+                                               regulator-name = "avdd-hdmi-pll";
+                                               regulator-min-microvolt = <1200000>;
+                                               regulator-max-microvolt = <1200000>;
+                                       };
+
+                                       ldo6 {
+                                               regulator-name = "vdd-sensor-2v8";
+                                               regulator-min-microvolt = <2850000>;
+                                               regulator-max-microvolt = <2850000>;
+                                       };
+
+                                       ldo8 {
+                                               regulator-name = "vdd-rtc";
+                                               regulator-min-microvolt = <1100000>;
+                                               regulator-max-microvolt = <1100000>;
+                                               regulator-always-on;
+                                               regulator-boot-on;
+                                               ti,enable-ldo8-tracking;
+                                       };
+
+                                       vddio_sdmmc3: ldo9 {
+                                               regulator-name = "vddio-sdmmc3";
+                                               regulator-min-microvolt = <1800000>;
+                                               regulator-max-microvolt = <3300000>;
+                                               regulator-always-on;
+                                               regulator-boot-on;
+                                       };
+
+                                       ldousb {
+                                               regulator-name = "avdd-usb-hdmi";
+                                               regulator-min-microvolt = <3300000>;
+                                               regulator-max-microvolt = <3300000>;
+                                               regulator-always-on;
+                                               regulator-boot-on;
+                                       };
+
+                                       vdd_3v3_sys: regen1 {
+                                               regulator-name = "rail-3v3";
+                                               regulator-max-microvolt = <3300000>;
+                                               regulator-always-on;
+                                               regulator-boot-on;
+                                       };
+
+                                       regen2 {
+                                               regulator-name = "rail-5v0";
+                                               regulator-max-microvolt = <5000000>;
+                                               regulator-always-on;
+                                               regulator-boot-on;
+                                       };
+
+                               };
+                       };
+
+                       rtc {
+                               compatible = "ti,palmas-rtc";
+                               interrupt-parent = <&palmas>;
+                               interrupts = <8 0>;
+                       };
+
+               };
+       };
+
+       pmc@7000e400 {
+               nvidia,invert-interrupt;
+       };
+
+       /* SD card */
+       sdhci@78000400 {
+               status = "okay";
+               bus-width = <4>;
+               vmmc-supply = <&vddio_sdmmc3>;
+               cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
+               power-gpios = <&gpio TEGRA_GPIO(H, 0) GPIO_ACTIVE_HIGH>;
+       };
+
+       /* eMMC */
+       sdhci@78000600 {
+               status = "okay";
+               bus-width = <8>;
+               vmmc-supply = <&vdd_1v8>;
+               non-removable;
+       };
+
+       /* External USB port (must be powered) */
+       usb@7d000000 {
+               status = "okay";
+       };
+
+       usb-phy@7d000000 {
+               status = "okay";
+               nvidia,xcvr-setup = <7>;
+               nvidia,xcvr-lsfslew = <2>;
+               nvidia,xcvr-lsrslew = <2>;
+               interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+               /* Should be changed to "otg" once we have vbus_supply */
+               /* As of now, USB devices need to be powered externally */
+               dr_mode = "host";
+       };
+
+       /* SHIELD controller */
+       usb@7d008000 {
+               status = "okay";
+       };
+
+       usb-phy@7d008000 {
+               status = "okay";
+               nvidia,xcvr-setup = <7>;
+               nvidia,xcvr-lsfslew = <2>;
+               nvidia,xcvr-lsrslew = <2>;
+       };
+
+       backlight: backlight {
+               compatible = "pwm-backlight";
+               pwms = <&pwm 1 40000>;
+
+               brightness-levels = <0 4 8 16 32 64 128 255>;
+               default-brightness-level = <6>;
+
+               power-supply = <&lcd_bl_en>;
+               enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
+       };
+
+       clocks {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               clk32k_in: clock {
+                       compatible = "fixed-clock";
+                       reg=<0>;
+                       #clock-cells = <0>;
+                       clock-frequency = <32768>;
+               };
+       };
+
+       gpio-keys {
+               compatible = "gpio-keys";
+
+               back {
+                       label = "Back";
+                       gpios = <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_BACK>;
+               };
+
+               home {
+                       label = "Home";
+                       gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_HOME>;
+               };
+
+               power {
+                       label = "Power";
+                       gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_POWER>;
+                       gpio-key,wakeup;
+               };
+       };
+
+       regulators {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               lcd_bl_en: regulator@0 {
+                       compatible = "regulator-fixed";
+                       reg = <0>;
+                       regulator-name = "lcd_bl_en";
+                       regulator-min-microvolt = <5000000>;
+                       regulator-max-microvolt = <5000000>;
+                       regulator-boot-on;
+               };
+
+               regulator@1 {
+                       compatible = "regulator-fixed";
+                       reg = <1>;
+                       regulator-name = "vdd_lcd_1v8";
+                       regulator-min-microvolt = <1800000>;
+                       regulator-max-microvolt = <1800000>;
+                       vin-supply = <&vdd_1v8>;
+                       enable-active-high;
+                       gpio = <&gpio TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
+                       regulator-boot-on;
+               };
+
+               regulator@2 {
+                       compatible = "regulator-fixed";
+                       reg = <2>;
+                       regulator-name = "vdd_1v8_ts";
+                       regulator-min-microvolt = <1800000>;
+                       regulator-max-microvolt = <1800000>;
+                       gpio = <&gpio TEGRA_GPIO(K, 3) GPIO_ACTIVE_LOW>;
+                       regulator-boot-on;
+               };
+
+               regulator@3 {
+                       compatible = "regulator-fixed";
+                       reg = <3>;
+                       regulator-name = "vdd_3v3_ts";
+                       regulator-min-microvolt = <3300000>;
+                       regulator-max-microvolt = <3300000>;
+                       enable-active-high;
+                       gpio = <&gpio TEGRA_GPIO(H, 5) GPIO_ACTIVE_HIGH>;
+                       regulator-boot-on;
+               };
+
+               regulator@4 {
+                       compatible = "regulator-fixed";
+                       reg = <4>;
+                       regulator-name = "vdd_1v8_com";
+                       regulator-min-microvolt = <1800000>;
+                       regulator-max-microvolt = <1800000>;
+                       vin-supply = <&vdd_1v8>;
+                       enable-active-high;
+                       gpio = <&gpio TEGRA_GPIO(X, 1) GPIO_ACTIVE_HIGH>;
+                       regulator-boot-on;
+               };
+
+               regulator@5 {
+                       compatible = "regulator-fixed";
+                       reg = <5>;
+                       regulator-name = "vdd_3v3_com";
+                       regulator-min-microvolt = <3300000>;
+                       regulator-max-microvolt = <3300000>;
+                       vin-supply = <&vdd_3v3_sys>;
+                       enable-active-high;
+                       gpio = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_HIGH>;
+                       regulator-always-on;
+                       regulator-boot-on;
+               };
+       };
+};
diff --git a/arch/arm/boot/dts/tegra114-tn7.dts b/arch/arm/boot/dts/tegra114-tn7.dts
new file mode 100644 (file)
index 0000000..9636621
--- /dev/null
@@ -0,0 +1,348 @@
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+#include "tegra114.dtsi"
+
+/ {
+       model = "Tegra Note 7";
+       compatible = "nvidia,tn7", "nvidia,tegra114";
+
+       chosen {
+               /* TN7's bootloader's arguments need to be overridden */
+               bootargs = "console=ttyS0,115200n8 console=tty1 gpt fbcon=rotate:2";
+               /* TN7's bootloader will place initrd at this address */
+               linux,initrd-start = <0x82000000>;
+               linux,initrd-end = <0x82800000>;
+       };
+
+       firmware {
+               trusted-foundations {
+                       compatible = "tlm,trusted-foundations";
+                       tlm,version-major = <2>;
+                       tlm,version-minor = <8>;
+               };
+       };
+
+       memory {
+               /* memory >= 0x37e00000 is reserved for firmware usage */
+               reg = <0x80000000 0x37e00000>;
+       };
+
+       host1x@50000000 {
+               dsi@54300000 {
+                       status = "okay";
+
+                       vdd-supply = <&vdd_1v2_ap>;
+
+                       panel@0 {
+                               compatible = "lg,ld070wx3-sl01";
+                               reg = <0>;
+
+                               power-supply = <&vdd_lcd>;
+                               backlight = <&backlight>;
+                       };
+               };
+       };
+
+       serial@70006300 {
+               status = "okay";
+       };
+
+       pwm@7000a000 {
+               status = "okay";
+       };
+
+       i2c@7000d000 {
+               status = "okay";
+               clock-frequency = <400000>;
+
+               palmas: pmic@58 {
+                       compatible = "ti,palmas";
+                       reg = <0x58>;
+                       interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_LOW>;
+
+                       #interrupt-cells = <2>;
+                       interrupt-controller;
+
+                       ti,system-power-controller;
+
+                       palmas_gpio: gpio {
+                               compatible = "ti,palmas-gpio";
+                               gpio-controller;
+                               #gpio-cells = <2>;
+                       };
+
+                       pmic {
+                               compatible = "ti,tps65913-pmic", "ti,palmas-pmic";
+
+                               ldoln-in-supply = <&vdd_smps10_out2>;
+
+                               regulators {
+                                       smps123 {
+                                               regulator-name = "vd-cpu";
+                                               regulator-min-microvolt = <1000000>;
+                                               regulator-max-microvolt = <1000000>;
+                                               regulator-always-on;
+                                               regulator-boot-on;
+                                       };
+
+                                       smps45 {
+                                               regulator-name = "vd-soc";
+                                               regulator-min-microvolt = <1100000>;
+                                               regulator-max-microvolt = <1100000>;
+                                               regulator-always-on;
+                                               regulator-boot-on;
+                                       };
+
+                                       smps6 {
+                                               regulator-name = "va-lcd-hv";
+                                               regulator-min-microvolt = <3000000>;
+                                               regulator-max-microvolt = <3000000>;
+                                               regulator-always-on;
+                                               regulator-boot-on;
+                                       };
+
+                                       smps7 {
+                                               regulator-name = "vd-ddr";
+                                               regulator-min-microvolt = <1350000>;
+                                               regulator-max-microvolt = <1350000>;
+                                               regulator-always-on;
+                                               regulator-boot-on;
+                                       };
+
+                                       vdd_1v8: smps8 {
+                                               regulator-name = "vs-pmu-1v8";
+                                               regulator-min-microvolt = <1800000>;
+                                               regulator-max-microvolt = <1800000>;
+                                               regulator-always-on;
+                                               regulator-boot-on;
+                                       };
+
+                                       vdd_2v9_sys: smps9 {
+                                               regulator-name = "vs-sys-2v9";
+                                               regulator-min-microvolt = <2900000>;
+                                               regulator-max-microvolt = <2900000>;
+                                               regulator-always-on;
+                                               regulator-boot-on;
+                                       };
+
+                                       vdd_smps10_out1: smps10_out1 {
+                                               regulator-name = "vd-smps10-out1";
+                                               regulator-min-microvolt = <5000000>;
+                                               regulator-max-microvolt = <5000000>;
+                                               regulator-always-on;
+                                               regulator-boot-on;
+                                       };
+
+                                       vdd_smps10_out2: smps10_out2 {
+                                               regulator-name = "vd-smps10-out2";
+                                               regulator-min-microvolt = <5000000>;
+                                               regulator-max-microvolt = <5000000>;
+                                               regulator-always-on;
+                                               regulator-boot-on;
+                                       };
+
+                                       ldo1 {
+                                               regulator-name = "va-pllx";
+                                               regulator-min-microvolt = <1050000>;
+                                               regulator-max-microvolt = <1050000>;
+                                               regulator-always-on;
+                                               regulator-boot-on;
+                                       };
+
+                                       vdd_1v2_ap: ldo2 {
+                                               regulator-name = "va-ap-1v2";
+                                               regulator-min-microvolt = <1200000>;
+                                               regulator-max-microvolt = <1200000>;
+                                               regulator-always-on;
+                                               regulator-boot-on;
+                                       };
+
+                                       ldo3 {
+                                               regulator-name = "vd-fuse";
+                                               regulator-min-microvolt = <1800000>;
+                                               regulator-max-microvolt = <1800000>;
+                                               regulator-always-on;
+                                               regulator-boot-on;
+                                       };
+
+                                       ldo4 {
+                                               regulator-name = "vd-ts-hv";
+                                               regulator-min-microvolt = <3200000>;
+                                               regulator-max-microvolt = <3200000>;
+                                               regulator-always-on;
+                                               regulator-boot-on;
+                                       };
+
+                                       ldo5 {
+                                               regulator-name = "va-cam2-hv";
+                                               regulator-min-microvolt = <2700000>;
+                                               regulator-max-microvolt = <2700000>;
+                                       };
+
+                                       ldo6 {
+                                               regulator-name = "va-sns-hv";
+                                               regulator-min-microvolt = <2850000>;
+                                               regulator-max-microvolt = <2850000>;
+                                       };
+
+                                       ldo7 {
+                                               regulator-name = "va-cam1-hv";
+                                               regulator-min-microvolt = <2700000>;
+                                               regulator-max-microvolt = <2700000>;
+                                       };
+
+                                       ldo8 {
+                                               regulator-name = "va-ap-rtc";
+                                               regulator-min-microvolt = <1100000>;
+                                               regulator-max-microvolt = <1100000>;
+                                               ti,enable-ldo8-tracking;
+                                               regulator-always-on;
+                                               regulator-boot-on;
+                                       };
+
+                                       ldo9 {
+                                               regulator-name = "vi-sdcard";
+                                               regulator-min-microvolt = <2900000>;
+                                               regulator-max-microvolt = <2900000>;
+                                       };
+
+                                       ldousb {
+                                               regulator-name = "avdd-usb";
+                                               regulator-min-microvolt = <3300000>;
+                                               regulator-max-microvolt = <3300000>;
+                                               regulator-always-on;
+                                               regulator-boot-on;
+                                       };
+
+                                       ldoln {
+                                               regulator-name = "va-hdmi";
+                                               regulator-min-microvolt = <3300000>;
+                                               regulator-max-microvolt = <3300000>;
+                                       };
+                               };
+                       };
+
+                       rtc {
+                               compatible = "ti,palmas-rtc";
+                               interrupt-parent = <&palmas>;
+                               interrupts = <8 0>;
+                       };
+
+               };
+       };
+
+       pmc@7000e400 {
+               nvidia,invert-interrupt;
+       };
+
+       /* eMMC */
+       sdhci@78000600 {
+               status = "okay";
+               bus-width = <8>;
+               vmmc-supply = <&vdd_1v8>;
+               non-removable;
+       };
+
+       usb@7d000000 {
+               status = "okay";
+       };
+
+       usb-phy@7d000000 {
+               status = "okay";
+               nvidia,xcvr-setup = <7>;
+               nvidia,xcvr-lsfslew = <2>;
+               nvidia,xcvr-lsrslew = <2>;
+               interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+               /* Should be changed to "otg" once we have vbus_supply */
+               /* As of now, USB devices need to be powered externally */
+               dr_mode = "host";
+       };
+
+       backlight: backlight {
+               compatible = "pwm-backlight";
+               pwms = <&pwm 1 40000>;
+
+               brightness-levels = <0 4 8 16 32 64 128 255>;
+               default-brightness-level = <6>;
+
+               power-supply = <&lcd_bl_en>;
+       };
+
+       clocks {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               clk32k_in: clock {
+                       compatible = "fixed-clock";
+                       reg = <0>;
+                       #clock-cells = <0>;
+                       clock-frequency = <32768>;
+               };
+       };
+
+       gpio-keys {
+               compatible = "gpio-keys";
+
+               power {
+                       label = "Power";
+                       gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_POWER>;
+                       gpio-key,wakeup;
+               };
+
+               volume_down {
+                       label = "Volume Down";
+                       gpios = <&gpio TEGRA_GPIO(Q, 2) GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_VOLUMEDOWN>;
+               };
+
+               volume_up {
+                       label = "Volume Up";
+                       gpios = <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_VOLUMEUP>;
+               };
+       };
+
+       regulators {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               /* FIXME: output of BQ24192 */
+               vs_sys: regulator@0 {
+                       compatible = "regulator-fixed";
+                       reg = <0>;
+                       regulator-name = "VS_SYS";
+                       regulator-min-microvolt = <4200000>;
+                       regulator-max-microvolt = <4200000>;
+                       regulator-always-on;
+                       regulator-boot-on;
+               };
+
+               lcd_bl_en: regulator@1 {
+                       compatible = "regulator-fixed";
+                       reg = <1>;
+                       regulator-name = "VDD_LCD_BL";
+                       regulator-min-microvolt = <16500000>;
+                       regulator-max-microvolt = <16500000>;
+                       gpio = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
+                       enable-active-high;
+                       vin-supply = <&vs_sys>;
+                       regulator-boot-on;
+               };
+
+               vdd_lcd: regulator@2 {
+                       compatible = "regulator-fixed";
+                       reg = <2>;
+                       regulator-name = "VD_LCD_1V8";
+                       regulator-min-microvolt = <1800000>;
+                       regulator-max-microvolt = <1800000>;
+                       gpio = <&palmas_gpio 4 GPIO_ACTIVE_HIGH>;
+                       enable-active-high;
+                       vin-supply = <&vdd_1v8>;
+                       regulator-boot-on;
+               };
+       };
+};
diff --git a/arch/arm/boot/dts/tegra124-jetson-tk1.dts b/arch/arm/boot/dts/tegra124-jetson-tk1.dts
new file mode 100644 (file)
index 0000000..e31fb61
--- /dev/null
@@ -0,0 +1,1827 @@
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+#include "tegra124.dtsi"
+
+/ {
+       model = "NVIDIA Tegra124 Jetson TK1";
+       compatible = "nvidia,jetson-tk1", "nvidia,tegra124";
+
+       aliases {
+               rtc0 = "/i2c@0,7000d000/pmic@40";
+               rtc1 = "/rtc@0,7000e000";
+       };
+
+       memory {
+               reg = <0x0 0x80000000 0x0 0x80000000>;
+       };
+
+       host1x@0,50000000 {
+               hdmi@0,54280000 {
+                       status = "okay";
+
+                       hdmi-supply = <&vdd_5v0_hdmi>;
+                       pll-supply = <&vdd_hdmi_pll>;
+                       vdd-supply = <&vdd_3v3_hdmi>;
+
+                       nvidia,ddc-i2c-bus = <&hdmi_ddc>;
+                       nvidia,hpd-gpio =
+                               <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
+               };
+       };
+
+       pinmux: pinmux@0,70000868 {
+               pinctrl-names = "default";
+               pinctrl-0 = <&state_default>;
+
+               state_default: pinmux {
+                       clk_32k_out_pa0 {
+                               nvidia,pins = "clk_32k_out_pa0";
+                               nvidia,function = "soc";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       uart3_cts_n_pa1 {
+                               nvidia,pins = "uart3_cts_n_pa1";
+                               nvidia,function = "uartc";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       dap2_fs_pa2 {
+                               nvidia,pins = "dap2_fs_pa2";
+                               nvidia,function = "i2s1";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       dap2_sclk_pa3 {
+                               nvidia,pins = "dap2_sclk_pa3";
+                               nvidia,function = "i2s1";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       dap2_din_pa4 {
+                               nvidia,pins = "dap2_din_pa4";
+                               nvidia,function = "i2s1";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       dap2_dout_pa5 {
+                               nvidia,pins = "dap2_dout_pa5";
+                               nvidia,function = "i2s1";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       sdmmc3_clk_pa6 {
+                               nvidia,pins = "sdmmc3_clk_pa6";
+                               nvidia,function = "sdmmc3";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       sdmmc3_cmd_pa7 {
+                               nvidia,pins = "sdmmc3_cmd_pa7";
+                               nvidia,function = "sdmmc3";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       pb0 {
+                               nvidia,pins = "pb0";
+                               nvidia,function = "uartd";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       pb1 {
+                               nvidia,pins = "pb1";
+                               nvidia,function = "uartd";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       sdmmc3_dat3_pb4 {
+                               nvidia,pins = "sdmmc3_dat3_pb4";
+                               nvidia,function = "sdmmc3";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       sdmmc3_dat2_pb5 {
+                               nvidia,pins = "sdmmc3_dat2_pb5";
+                               nvidia,function = "sdmmc3";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       sdmmc3_dat1_pb6 {
+                               nvidia,pins = "sdmmc3_dat1_pb6";
+                               nvidia,function = "sdmmc3";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       sdmmc3_dat0_pb7 {
+                               nvidia,pins = "sdmmc3_dat0_pb7";
+                               nvidia,function = "sdmmc3";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       uart3_rts_n_pc0 {
+                               nvidia,pins = "uart3_rts_n_pc0";
+                               nvidia,function = "uartc";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       uart2_txd_pc2 {
+                               nvidia,pins = "uart2_txd_pc2";
+                               nvidia,function = "irda";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       uart2_rxd_pc3 {
+                               nvidia,pins = "uart2_rxd_pc3";
+                               nvidia,function = "irda";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       gen1_i2c_scl_pc4 {
+                               nvidia,pins = "gen1_i2c_scl_pc4";
+                               nvidia,function = "i2c1";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                               nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+                       };
+                       gen1_i2c_sda_pc5 {
+                               nvidia,pins = "gen1_i2c_sda_pc5";
+                               nvidia,function = "i2c1";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                               nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+                       };
+                       pc7 {
+                               nvidia,pins = "pc7";
+                               nvidia,function = "rsvd1";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       pg0 {
+                               nvidia,pins = "pg0";
+                               nvidia,function = "rsvd1";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       pg1 {
+                               nvidia,pins = "pg1";
+                               nvidia,function = "rsvd1";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       pg2 {
+                               nvidia,pins = "pg2";
+                               nvidia,function = "rsvd1";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       pg3 {
+                               nvidia,pins = "pg3";
+                               nvidia,function = "rsvd1";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       pg4 {
+                               nvidia,pins = "pg4";
+                               nvidia,function = "spi4";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       pg5 {
+                               nvidia,pins = "pg5";
+                               nvidia,function = "spi4";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       pg6 {
+                               nvidia,pins = "pg6";
+                               nvidia,function = "spi4";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       pg7 {
+                               nvidia,pins = "pg7";
+                               nvidia,function = "spi4";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       ph0 {
+                               nvidia,pins = "ph0";
+                               nvidia,function = "gmi";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_ENABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       ph1 {
+                               nvidia,pins = "ph1";
+                               nvidia,function = "pwm1";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       ph2 {
+                               nvidia,pins = "ph2";
+                               nvidia,function = "gmi";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       ph3 {
+                               nvidia,pins = "ph3";
+                               nvidia,function = "gmi";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       ph4 {
+                               nvidia,pins = "ph4";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       ph5 {
+                               nvidia,pins = "ph5";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       ph6 {
+                               nvidia,pins = "ph6";
+                               nvidia,function = "gmi";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       ph7 {
+                               nvidia,pins = "ph7";
+                               nvidia,function = "gmi";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       pi0 {
+                               nvidia,pins = "pi0";
+                               nvidia,function = "rsvd1";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       pi1 {
+                               nvidia,pins = "pi1";
+                               nvidia,function = "rsvd1";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_ENABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       pi2 {
+                               nvidia,pins = "pi2";
+                               nvidia,function = "rsvd4";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       pi3 {
+                               nvidia,pins = "pi3";
+                               nvidia,function = "spi4";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       pi4 {
+                               nvidia,pins = "pi4";
+                               nvidia,function = "gmi";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       pi5 {
+                               nvidia,pins = "pi5";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       pi6 {
+                               nvidia,pins = "pi6";
+                               nvidia,function = "rsvd1";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       pi7 {
+                               nvidia,pins = "pi7";
+                               nvidia,function = "rsvd1";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_ENABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       pj0 {
+                               nvidia,pins = "pj0";
+                               nvidia,function = "rsvd1";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       pj2 {
+                               nvidia,pins = "pj2";
+                               nvidia,function = "rsvd1";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       uart2_cts_n_pj5 {
+                               nvidia,pins = "uart2_cts_n_pj5";
+                               nvidia,function = "uartb";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       uart2_rts_n_pj6 {
+                               nvidia,pins = "uart2_rts_n_pj6";
+                               nvidia,function = "uartb";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       pj7 {
+                               nvidia,pins = "pj7";
+                               nvidia,function = "uartd";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       pk0 {
+                               nvidia,pins = "pk0";
+                               nvidia,function = "soc";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       pk1 {
+                               nvidia,pins = "pk1";
+                               nvidia,function = "rsvd4";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       pk2 {
+                               nvidia,pins = "pk2";
+                               nvidia,function = "rsvd1";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       pk3 {
+                               nvidia,pins = "pk3";
+                               nvidia,function = "gmi";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       pk4 {
+                               nvidia,pins = "pk4";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       spdif_out_pk5 {
+                               nvidia,pins = "spdif_out_pk5";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       spdif_in_pk6 {
+                               nvidia,pins = "spdif_in_pk6";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       pk7 {
+                               nvidia,pins = "pk7";
+                               nvidia,function = "uartd";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       dap1_fs_pn0 {
+                               nvidia,pins = "dap1_fs_pn0";
+                               nvidia,function = "i2s0";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       dap1_din_pn1 {
+                               nvidia,pins = "dap1_din_pn1";
+                               nvidia,function = "i2s0";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       dap1_dout_pn2 {
+                               nvidia,pins = "dap1_dout_pn2";
+                               nvidia,function = "sata";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       dap1_sclk_pn3 {
+                               nvidia,pins = "dap1_sclk_pn3";
+                               nvidia,function = "i2s0";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       usb_vbus_en0_pn4 {
+                               nvidia,pins = "usb_vbus_en0_pn4";
+                               nvidia,function = "usb";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                               nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+                       };
+                       usb_vbus_en1_pn5 {
+                               nvidia,pins = "usb_vbus_en1_pn5";
+                               nvidia,function = "usb";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                               nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+                       };
+                       hdmi_int_pn7 {
+                               nvidia,pins = "hdmi_int_pn7";
+                               nvidia,function = "rsvd1";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                               nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
+                       };
+                       ulpi_data7_po0 {
+                               nvidia,pins = "ulpi_data7_po0";
+                               nvidia,function = "ulpi";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       ulpi_data0_po1 {
+                               nvidia,pins = "ulpi_data0_po1";
+                               nvidia,function = "ulpi";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       ulpi_data1_po2 {
+                               nvidia,pins = "ulpi_data1_po2";
+                               nvidia,function = "ulpi";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       ulpi_data2_po3 {
+                               nvidia,pins = "ulpi_data2_po3";
+                               nvidia,function = "ulpi";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       ulpi_data3_po4 {
+                               nvidia,pins = "ulpi_data3_po4";
+                               nvidia,function = "ulpi";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       ulpi_data4_po5 {
+                               nvidia,pins = "ulpi_data4_po5";
+                               nvidia,function = "ulpi";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       ulpi_data5_po6 {
+                               nvidia,pins = "ulpi_data5_po6";
+                               nvidia,function = "ulpi";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       ulpi_data6_po7 {
+                               nvidia,pins = "ulpi_data6_po7";
+                               nvidia,function = "ulpi";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       dap3_fs_pp0 {
+                               nvidia,pins = "dap3_fs_pp0";
+                               nvidia,function = "i2s2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       dap3_din_pp1 {
+                               nvidia,pins = "dap3_din_pp1";
+                               nvidia,function = "i2s2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       dap3_dout_pp2 {
+                               nvidia,pins = "dap3_dout_pp2";
+                               nvidia,function = "rsvd4";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       dap3_sclk_pp3 {
+                               nvidia,pins = "dap3_sclk_pp3";
+                               nvidia,function = "rsvd3";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_ENABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       dap4_fs_pp4 {
+                               nvidia,pins = "dap4_fs_pp4";
+                               nvidia,function = "i2s3";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       dap4_din_pp5 {
+                               nvidia,pins = "dap4_din_pp5";
+                               nvidia,function = "i2s3";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       dap4_dout_pp6 {
+                               nvidia,pins = "dap4_dout_pp6";
+                               nvidia,function = "i2s3";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       dap4_sclk_pp7 {
+                               nvidia,pins = "dap4_sclk_pp7";
+                               nvidia,function = "i2s3";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       kb_col0_pq0 {
+                               nvidia,pins = "kb_col0_pq0";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       kb_col1_pq1 {
+                               nvidia,pins = "kb_col1_pq1";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       kb_col2_pq2 {
+                               nvidia,pins = "kb_col2_pq2";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       kb_col3_pq3 {
+                               nvidia,pins = "kb_col3_pq3";
+                               nvidia,function = "kbc";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_ENABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       kb_col4_pq4 {
+                               nvidia,pins = "kb_col4_pq4";
+                               nvidia,function = "sdmmc3";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       kb_col5_pq5 {
+                               nvidia,pins = "kb_col5_pq5";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       kb_col6_pq6 {
+                               nvidia,pins = "kb_col6_pq6";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       kb_col7_pq7 {
+                               nvidia,pins = "kb_col7_pq7";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       kb_row0_pr0 {
+                               nvidia,pins = "kb_row0_pr0";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       kb_row1_pr1 {
+                               nvidia,pins = "kb_row1_pr1";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       kb_row2_pr2 {
+                               nvidia,pins = "kb_row2_pr2";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       kb_row3_pr3 {
+                               nvidia,pins = "kb_row3_pr3";
+                               nvidia,function = "sys";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       kb_row4_pr4 {
+                               nvidia,pins = "kb_row4_pr4";
+                               nvidia,function = "rsvd3";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       kb_row5_pr5 {
+                               nvidia,pins = "kb_row5_pr5";
+                               nvidia,function = "rsvd3";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       kb_row6_pr6 {
+                               nvidia,pins = "kb_row6_pr6";
+                               nvidia,function = "displaya_alt";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       kb_row7_pr7 {
+                               nvidia,pins = "kb_row7_pr7";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       kb_row8_ps0 {
+                               nvidia,pins = "kb_row8_ps0";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       kb_row9_ps1 {
+                               nvidia,pins = "kb_row9_ps1";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       kb_row10_ps2 {
+                               nvidia,pins = "kb_row10_ps2";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       kb_row11_ps3 {
+                               nvidia,pins = "kb_row11_ps3";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       kb_row12_ps4 {
+                               nvidia,pins = "kb_row12_ps4";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       kb_row13_ps5 {
+                               nvidia,pins = "kb_row13_ps5";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       kb_row14_ps6 {
+                               nvidia,pins = "kb_row14_ps6";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       kb_row15_ps7 {
+                               nvidia,pins = "kb_row15_ps7";
+                               nvidia,function = "soc";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       kb_row16_pt0 {
+                               nvidia,pins = "kb_row16_pt0";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       kb_row17_pt1 {
+                               nvidia,pins = "kb_row17_pt1";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       gen2_i2c_scl_pt5 {
+                               nvidia,pins = "gen2_i2c_scl_pt5";
+                               nvidia,function = "i2c2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                               nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+                       };
+                       gen2_i2c_sda_pt6 {
+                               nvidia,pins = "gen2_i2c_sda_pt6";
+                               nvidia,function = "i2c2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                               nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+                       };
+                       sdmmc4_cmd_pt7 {
+                               nvidia,pins = "sdmmc4_cmd_pt7";
+                               nvidia,function = "sdmmc4";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       pu0 {
+                               nvidia,pins = "pu0";
+                               nvidia,function = "rsvd4";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       pu1 {
+                               nvidia,pins = "pu1";
+                               nvidia,function = "rsvd1";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       pu2 {
+                               nvidia,pins = "pu2";
+                               nvidia,function = "rsvd1";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       pu3 {
+                               nvidia,pins = "pu3";
+                               nvidia,function = "gmi";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       pu4 {
+                               nvidia,pins = "pu4";
+                               nvidia,function = "gmi";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       pu5 {
+                               nvidia,pins = "pu5";
+                               nvidia,function = "gmi";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       pu6 {
+                               nvidia,pins = "pu6";
+                               nvidia,function = "rsvd3";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       pv0 {
+                               nvidia,pins = "pv0";
+                               nvidia,function = "rsvd1";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       pv1 {
+                               nvidia,pins = "pv1";
+                               nvidia,function = "rsvd1";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       sdmmc3_cd_n_pv2 {
+                               nvidia,pins = "sdmmc3_cd_n_pv2";
+                               nvidia,function = "sdmmc3";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       sdmmc1_wp_n_pv3 {
+                               nvidia,pins = "sdmmc1_wp_n_pv3";
+                               nvidia,function = "sdmmc1";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_ENABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       ddc_scl_pv4 {
+                               nvidia,pins = "ddc_scl_pv4";
+                               nvidia,function = "i2c4";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                               nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
+                       };
+                       ddc_sda_pv5 {
+                               nvidia,pins = "ddc_sda_pv5";
+                               nvidia,function = "i2c4";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                               nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
+                       };
+                       gpio_w2_aud_pw2 {
+                               nvidia,pins = "gpio_w2_aud_pw2";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       gpio_w3_aud_pw3 {
+                               nvidia,pins = "gpio_w3_aud_pw3";
+                               nvidia,function = "spi6";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       dap_mclk1_pw4 {
+                               nvidia,pins = "dap_mclk1_pw4";
+                               nvidia,function = "extperiph1";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       clk2_out_pw5 {
+                               nvidia,pins = "clk2_out_pw5";
+                               nvidia,function = "extperiph2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       uart3_txd_pw6 {
+                               nvidia,pins = "uart3_txd_pw6";
+                               nvidia,function = "uartc";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       uart3_rxd_pw7 {
+                               nvidia,pins = "uart3_rxd_pw7";
+                               nvidia,function = "uartc";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       dvfs_pwm_px0 {
+                               nvidia,pins = "dvfs_pwm_px0";
+                               nvidia,function = "cldvfs";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       gpio_x1_aud_px1 {
+                               nvidia,pins = "gpio_x1_aud_px1";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       dvfs_clk_px2 {
+                               nvidia,pins = "dvfs_clk_px2";
+                               nvidia,function = "cldvfs";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       gpio_x3_aud_px3 {
+                               nvidia,pins = "gpio_x3_aud_px3";
+                               nvidia,function = "rsvd4";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       gpio_x4_aud_px4 {
+                               nvidia,pins = "gpio_x4_aud_px4";
+                               nvidia,function = "gmi";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       gpio_x5_aud_px5 {
+                               nvidia,pins = "gpio_x5_aud_px5";
+                               nvidia,function = "rsvd4";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       gpio_x6_aud_px6 {
+                               nvidia,pins = "gpio_x6_aud_px6";
+                               nvidia,function = "gmi";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       gpio_x7_aud_px7 {
+                               nvidia,pins = "gpio_x7_aud_px7";
+                               nvidia,function = "rsvd1";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       ulpi_clk_py0 {
+                               nvidia,pins = "ulpi_clk_py0";
+                               nvidia,function = "spi1";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       ulpi_dir_py1 {
+                               nvidia,pins = "ulpi_dir_py1";
+                               nvidia,function = "spi1";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       ulpi_nxt_py2 {
+                               nvidia,pins = "ulpi_nxt_py2";
+                               nvidia,function = "spi1";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       ulpi_stp_py3 {
+                               nvidia,pins = "ulpi_stp_py3";
+                               nvidia,function = "spi1";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       sdmmc1_dat3_py4 {
+                               nvidia,pins = "sdmmc1_dat3_py4";
+                               nvidia,function = "sdmmc1";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       sdmmc1_dat2_py5 {
+                               nvidia,pins = "sdmmc1_dat2_py5";
+                               nvidia,function = "sdmmc1";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       sdmmc1_dat1_py6 {
+                               nvidia,pins = "sdmmc1_dat1_py6";
+                               nvidia,function = "sdmmc1";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       sdmmc1_dat0_py7 {
+                               nvidia,pins = "sdmmc1_dat0_py7";
+                               nvidia,function = "sdmmc1";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       sdmmc1_clk_pz0 {
+                               nvidia,pins = "sdmmc1_clk_pz0";
+                               nvidia,function = "sdmmc1";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       sdmmc1_cmd_pz1 {
+                               nvidia,pins = "sdmmc1_cmd_pz1";
+                               nvidia,function = "sdmmc1";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       pwr_i2c_scl_pz6 {
+                               nvidia,pins = "pwr_i2c_scl_pz6";
+                               nvidia,function = "i2cpwr";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                               nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+                       };
+                       pwr_i2c_sda_pz7 {
+                               nvidia,pins = "pwr_i2c_sda_pz7";
+                               nvidia,function = "i2cpwr";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                               nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+                       };
+                       sdmmc4_dat0_paa0 {
+                               nvidia,pins = "sdmmc4_dat0_paa0";
+                               nvidia,function = "sdmmc4";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       sdmmc4_dat1_paa1 {
+                               nvidia,pins = "sdmmc4_dat1_paa1";
+                               nvidia,function = "sdmmc4";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       sdmmc4_dat2_paa2 {
+                               nvidia,pins = "sdmmc4_dat2_paa2";
+                               nvidia,function = "sdmmc4";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       sdmmc4_dat3_paa3 {
+                               nvidia,pins = "sdmmc4_dat3_paa3";
+                               nvidia,function = "sdmmc4";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       sdmmc4_dat4_paa4 {
+                               nvidia,pins = "sdmmc4_dat4_paa4";
+                               nvidia,function = "sdmmc4";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       sdmmc4_dat5_paa5 {
+                               nvidia,pins = "sdmmc4_dat5_paa5";
+                               nvidia,function = "sdmmc4";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       sdmmc4_dat6_paa6 {
+                               nvidia,pins = "sdmmc4_dat6_paa6";
+                               nvidia,function = "sdmmc4";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       sdmmc4_dat7_paa7 {
+                               nvidia,pins = "sdmmc4_dat7_paa7";
+                               nvidia,function = "sdmmc4";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       pbb0 {
+                               nvidia,pins = "pbb0";
+                               nvidia,function = "vimclk2_alt";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       cam_i2c_scl_pbb1 {
+                               nvidia,pins = "cam_i2c_scl_pbb1";
+                               nvidia,function = "i2c3";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                               nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+                       };
+                       cam_i2c_sda_pbb2 {
+                               nvidia,pins = "cam_i2c_sda_pbb2";
+                               nvidia,function = "i2c3";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                               nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+                       };
+                       pbb3 {
+                               nvidia,pins = "pbb3";
+                               nvidia,function = "vgp3";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       pbb4 {
+                               nvidia,pins = "pbb4";
+                               nvidia,function = "vgp4";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       pbb5 {
+                               nvidia,pins = "pbb5";
+                               nvidia,function = "rsvd3";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       pbb6 {
+                               nvidia,pins = "pbb6";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       pbb7 {
+                               nvidia,pins = "pbb7";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       cam_mclk_pcc0 {
+                               nvidia,pins = "cam_mclk_pcc0";
+                               nvidia,function = "vi_alt3";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       pcc1 {
+                               nvidia,pins = "pcc1";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       pcc2 {
+                               nvidia,pins = "pcc2";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       sdmmc4_clk_pcc4 {
+                               nvidia,pins = "sdmmc4_clk_pcc4";
+                               nvidia,function = "sdmmc4";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       clk2_req_pcc5 {
+                               nvidia,pins = "clk2_req_pcc5";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       clk3_out_pee0 {
+                               nvidia,pins = "clk3_out_pee0";
+                               nvidia,function = "extperiph3";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       clk3_req_pee1 {
+                               nvidia,pins = "clk3_req_pee1";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       dap_mclk1_req_pee2 {
+                               nvidia,pins = "dap_mclk1_req_pee2";
+                               nvidia,function = "sata";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       hdmi_cec_pee3 {
+                               nvidia,pins = "hdmi_cec_pee3";
+                               nvidia,function = "cec";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                               nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+                       };
+                       sdmmc3_clk_lb_out_pee4 {
+                               nvidia,pins = "sdmmc3_clk_lb_out_pee4";
+                               nvidia,function = "sdmmc3";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       sdmmc3_clk_lb_in_pee5 {
+                               nvidia,pins = "sdmmc3_clk_lb_in_pee5";
+                               nvidia,function = "sdmmc3";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       dp_hpd_pff0 {
+                               nvidia,pins = "dp_hpd_pff0";
+                               nvidia,function = "dp";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       usb_vbus_en2_pff1 {
+                               nvidia,pins = "usb_vbus_en2_pff1";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                               nvidia,open-drain = <TEGRA_PIN_DISABLE>;
+                       };
+                       pff2 {
+                               nvidia,pins = "pff2";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                               nvidia,open-drain = <TEGRA_PIN_DISABLE>;
+                       };
+                       core_pwr_req {
+                               nvidia,pins = "core_pwr_req";
+                               nvidia,function = "pwron";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       cpu_pwr_req {
+                               nvidia,pins = "cpu_pwr_req";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       pwr_int_n {
+                               nvidia,pins = "pwr_int_n";
+                               nvidia,function = "pmi";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       reset_out_n {
+                               nvidia,pins = "reset_out_n";
+                               nvidia,function = "reset_out_n";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+                       owr {
+                               nvidia,pins = "owr";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_ENABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                               nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
+                       };
+                       clk_32k_in {
+                               nvidia,pins = "clk_32k_in";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       jtag_rtck {
+                               nvidia,pins = "jtag_rtck";
+                               nvidia,function = "rtck";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                       };
+               };
+       };
+
+       /* DB9 serial port */
+       serial@0,70006300 {
+               status = "okay";
+       };
+
+       /* Expansion GEN1_I2C_*, mini-PCIe I2C, on-board components */
+       i2c@0,7000c000 {
+               status = "okay";
+               clock-frequency = <100000>;
+
+               rt5639: audio-codec@1c {
+                       compatible = "realtek,rt5639";
+                       reg = <0x1c>;
+                       interrupt-parent = <&gpio>;
+                       interrupts = <TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>;
+                       realtek,ldo1-en-gpios =
+                               <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_HIGH>;
+               };
+
+               temperature-sensor@4c {
+                       compatible = "ti,tmp451";
+                       reg = <0x4c>;
+                       interrupt-parent = <&gpio>;
+                       interrupts = <TEGRA_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
+               };
+
+               eeprom@56 {
+                       compatible = "atmel,24c02";
+                       reg = <0x56>;
+                       pagesize = <8>;
+               };
+       };
+
+       /* Expansion GEN2_I2C_* */
+       i2c@0,7000c400 {
+               status = "okay";
+               clock-frequency = <100000>;
+       };
+
+       /* Expansion CAM_I2C_* */
+       i2c@0,7000c500 {
+               status = "okay";
+               clock-frequency = <100000>;
+       };
+
+       /* HDMI DDC */
+       hdmi_ddc: i2c@0,7000c700 {
+               status = "okay";
+               clock-frequency = <100000>;
+       };
+
+       /* Expansion PWR_I2C_*, on-board components */
+       i2c@0,7000d000 {
+               status = "okay";
+               clock-frequency = <400000>;
+
+               pmic: pmic@40 {
+                       compatible = "ams,as3722";
+                       reg = <0x40>;
+                       interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
+
+                       ams,system-power-controller;
+
+                       #interrupt-cells = <2>;
+                       interrupt-controller;
+
+                       gpio-controller;
+                       #gpio-cells = <2>;
+
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&as3722_default>;
+
+                       as3722_default: pinmux {
+                               gpio0 {
+                                       pins = "gpio0";
+                                       function = "gpio";
+                                       bias-pull-down;
+                               };
+
+                               gpio1_2_4_7 {
+                                       pins = "gpio1", "gpio2", "gpio4", "gpio7";
+                                       function = "gpio";
+                                       bias-pull-up;
+                               };
+
+                               gpio3_5_6 {
+                                       pins = "gpio3", "gpio5", "gpio6";
+                                       bias-high-impedance;
+                               };
+                       };
+
+                       regulators {
+                               vsup-sd2-supply = <&vdd_5v0_sys>;
+                               vsup-sd3-supply = <&vdd_5v0_sys>;
+                               vsup-sd4-supply = <&vdd_5v0_sys>;
+                               vsup-sd5-supply = <&vdd_5v0_sys>;
+                               vin-ldo0-supply = <&vdd_1v35_lp0>;
+                               vin-ldo1-6-supply = <&vdd_3v3_run>;
+                               vin-ldo2-5-7-supply = <&vddio_1v8>;
+                               vin-ldo3-4-supply = <&vdd_3v3_sys>;
+                               vin-ldo9-10-supply = <&vdd_5v0_sys>;
+                               vin-ldo11-supply = <&vdd_3v3_run>;
+
+                               sd0 {
+                                       regulator-name = "+VDD_CPU_AP";
+                                       regulator-min-microvolt = <700000>;
+                                       regulator-max-microvolt = <1400000>;
+                                       regulator-min-microamp = <3500000>;
+                                       regulator-max-microamp = <3500000>;
+                                       regulator-always-on;
+                                       regulator-boot-on;
+                                       ams,external-control = <2>;
+                               };
+
+                               sd1 {
+                                       regulator-name = "+VDD_CORE";
+                                       regulator-min-microvolt = <700000>;
+                                       regulator-max-microvolt = <1350000>;
+                                       regulator-min-microamp = <2500000>;
+                                       regulator-max-microamp = <2500000>;
+                                       regulator-always-on;
+                                       regulator-boot-on;
+                                       ams,external-control = <1>;
+                               };
+
+                               vdd_1v35_lp0: sd2 {
+                                       regulator-name = "+1.35V_LP0(sd2)";
+                                       regulator-min-microvolt = <1350000>;
+                                       regulator-max-microvolt = <1350000>;
+                                       regulator-always-on;
+                                       regulator-boot-on;
+                               };
+
+                               sd3 {
+                                       regulator-name = "+1.35V_LP0(sd3)";
+                                       regulator-min-microvolt = <1350000>;
+                                       regulator-max-microvolt = <1350000>;
+                                       regulator-always-on;
+                                       regulator-boot-on;
+                               };
+
+                               vdd_1v05_run: sd4 {
+                                       regulator-name = "+1.05V_RUN";
+                                       regulator-min-microvolt = <1050000>;
+                                       regulator-max-microvolt = <1050000>;
+                               };
+
+                               vddio_1v8: sd5 {
+                                       regulator-name = "+1.8V_VDDIO";
+                                       regulator-min-microvolt = <1800000>;
+                                       regulator-max-microvolt = <1800000>;
+                                       regulator-boot-on;
+                                       regulator-always-on;
+                               };
+
+                               sd6 {
+                                       regulator-name = "+VDD_GPU_AP";
+                                       regulator-min-microvolt = <650000>;
+                                       regulator-max-microvolt = <1200000>;
+                                       regulator-min-microamp = <3500000>;
+                                       regulator-max-microamp = <3500000>;
+                                       regulator-boot-on;
+                                       regulator-always-on;
+                               };
+
+                               ldo0 {
+                                       regulator-name = "+1.05V_RUN_AVDD";
+                                       regulator-min-microvolt = <1050000>;
+                                       regulator-max-microvolt = <1050000>;
+                                       regulator-boot-on;
+                                       regulator-always-on;
+                                       ams,external-control = <1>;
+                               };
+
+                               ldo1 {
+                                       regulator-name = "+1.8V_RUN_CAM";
+                                       regulator-min-microvolt = <1800000>;
+                                       regulator-max-microvolt = <1800000>;
+                               };
+
+                               ldo2 {
+                                       regulator-name = "+1.2V_GEN_AVDD";
+                                       regulator-min-microvolt = <1200000>;
+                                       regulator-max-microvolt = <1200000>;
+                                       regulator-boot-on;
+                                       regulator-always-on;
+                               };
+
+                               ldo3 {
+                                       regulator-name = "+1.05V_LP0_VDD_RTC";
+                                       regulator-min-microvolt = <1000000>;
+                                       regulator-max-microvolt = <1000000>;
+                                       regulator-boot-on;
+                                       regulator-always-on;
+                                       ams,enable-tracking;
+                               };
+
+                               ldo4 {
+                                       regulator-name = "+2.8V_RUN_CAM";
+                                       regulator-min-microvolt = <2800000>;
+                                       regulator-max-microvolt = <2800000>;
+                               };
+
+                               ldo5 {
+                                       regulator-name = "+1.2V_RUN_CAM_FRONT";
+                                       regulator-min-microvolt = <1200000>;
+                                       regulator-max-microvolt = <1200000>;
+                               };
+
+                               vddio_sdmmc3: ldo6 {
+                                       regulator-name = "+VDDIO_SDMMC3";
+                                       regulator-min-microvolt = <1800000>;
+                                       regulator-max-microvolt = <3300000>;
+                               };
+
+                               ldo7 {
+                                       regulator-name = "+1.05V_RUN_CAM_REAR";
+                                       regulator-min-microvolt = <1050000>;
+                                       regulator-max-microvolt = <1050000>;
+                               };
+
+                               ldo9 {
+                                       regulator-name = "+3.3V_RUN_TOUCH";
+                                       regulator-min-microvolt = <2800000>;
+                                       regulator-max-microvolt = <2800000>;
+                               };
+
+                               ldo10 {
+                                       regulator-name = "+2.8V_RUN_CAM_AF";
+                                       regulator-min-microvolt = <2800000>;
+                                       regulator-max-microvolt = <2800000>;
+                               };
+
+                               ldo11 {
+                                       regulator-name = "+1.8V_RUN_VPP_FUSE";
+                                       regulator-min-microvolt = <1800000>;
+                                       regulator-max-microvolt = <1800000>;
+                               };
+                       };
+               };
+       };
+
+       /* Expansion TS_SPI_* */
+       spi@0,7000d400 {
+               status = "okay";
+       };
+
+       /* Internal SPI */
+       spi@0,7000da00 {
+               status = "okay";
+               spi-max-frequency = <25000000>;
+               spi-flash@0 {
+                       compatible = "winbond,w25q32dw";
+                       reg = <0>;
+                       spi-max-frequency = <20000000>;
+               };
+       };
+
+       pmc@0,7000e400 {
+               nvidia,invert-interrupt;
+               nvidia,suspend-mode = <1>;
+               nvidia,cpu-pwr-good-time = <500>;
+               nvidia,cpu-pwr-off-time = <300>;
+               nvidia,core-pwr-good-time = <641 3845>;
+               nvidia,core-pwr-off-time = <61036>;
+               nvidia,core-power-req-active-high;
+               nvidia,sys-clock-req-active-high;
+       };
+
+       /* SD card */
+       sdhci@0,700b0400 {
+               status = "okay";
+               cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
+               power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
+               wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_HIGH>;
+               bus-width = <4>;
+               vqmmc-supply = <&vddio_sdmmc3>;
+       };
+
+       /* eMMC */
+       sdhci@0,700b0600 {
+               status = "okay";
+               bus-width = <8>;
+       };
+
+       ahub@0,70300000 {
+               i2s@0,70301100 {
+                       status = "okay";
+               };
+       };
+
+       /* mini-PCIe USB */
+       usb@0,7d004000 {
+               status = "okay";
+       };
+
+       usb-phy@0,7d004000 {
+               status = "okay";
+       };
+
+       /* USB A connector */
+       usb@0,7d008000 {
+               status = "okay";
+       };
+
+       usb-phy@0,7d008000 {
+               status = "okay";
+               vbus-supply = <&vdd_usb3_vbus>;
+       };
+
+       clocks {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               clk32k_in: clock@0 {
+                       compatible = "fixed-clock";
+                       reg = <0>;
+                       #clock-cells = <0>;
+                       clock-frequency = <32768>;
+               };
+       };
+
+       gpio-keys {
+               compatible = "gpio-keys";
+
+               power {
+                       label = "Power";
+                       gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_POWER>;
+                       debounce-interval = <10>;
+                       gpio-key,wakeup;
+               };
+       };
+
+       regulators {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               vdd_mux: regulator@0 {
+                       compatible = "regulator-fixed";
+                       reg = <0>;
+                       regulator-name = "+VDD_MUX";
+                       regulator-min-microvolt = <12000000>;
+                       regulator-max-microvolt = <12000000>;
+                       regulator-always-on;
+                       regulator-boot-on;
+               };
+
+               vdd_5v0_sys: regulator@1 {
+                       compatible = "regulator-fixed";
+                       reg = <1>;
+                       regulator-name = "+5V_SYS";
+                       regulator-min-microvolt = <5000000>;
+                       regulator-max-microvolt = <5000000>;
+                       regulator-always-on;
+                       regulator-boot-on;
+                       vin-supply = <&vdd_mux>;
+               };
+
+               vdd_3v3_sys: regulator@2 {
+                       compatible = "regulator-fixed";
+                       reg = <2>;
+                       regulator-name = "+3.3V_SYS";
+                       regulator-min-microvolt = <3300000>;
+                       regulator-max-microvolt = <3300000>;
+                       regulator-always-on;
+                       regulator-boot-on;
+                       vin-supply = <&vdd_mux>;
+               };
+
+               vdd_3v3_run: regulator@3 {
+                       compatible = "regulator-fixed";
+                       reg = <3>;
+                       regulator-name = "+3.3V_RUN";
+                       regulator-min-microvolt = <3300000>;
+                       regulator-max-microvolt = <3300000>;
+                       regulator-always-on;
+                       regulator-boot-on;
+                       gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
+                       enable-active-high;
+                       vin-supply = <&vdd_3v3_sys>;
+               };
+
+               vdd_3v3_hdmi: regulator@4 {
+                       compatible = "regulator-fixed";
+                       reg = <4>;
+                       regulator-name = "+3.3V_AVDD_HDMI_AP_GATED";
+                       regulator-min-microvolt = <3300000>;
+                       regulator-max-microvolt = <3300000>;
+                       vin-supply = <&vdd_3v3_run>;
+               };
+
+               vdd_usb1_vbus: regulator@7 {
+                       compatible = "regulator-fixed";
+                       reg = <7>;
+                       regulator-name = "+USB0_VBUS_SW";
+                       regulator-min-microvolt = <5000000>;
+                       regulator-max-microvolt = <5000000>;
+                       gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
+                       enable-active-high;
+                       gpio-open-drain;
+                       vin-supply = <&vdd_5v0_sys>;
+               };
+
+               vdd_usb3_vbus: regulator@8 {
+                       compatible = "regulator-fixed";
+                       reg = <8>;
+                       regulator-name = "+5V_USB_HS";
+                       regulator-min-microvolt = <5000000>;
+                       regulator-max-microvolt = <5000000>;
+                       gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
+                       enable-active-high;
+                       gpio-open-drain;
+                       vin-supply = <&vdd_5v0_sys>;
+               };
+
+               vdd_3v3_lp0: regulator@10 {
+                       compatible = "regulator-fixed";
+                       reg = <10>;
+                       regulator-name = "+3.3V_LP0";
+                       regulator-min-microvolt = <3300000>;
+                       regulator-max-microvolt = <3300000>;
+                       regulator-always-on;
+                       regulator-boot-on;
+                       gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
+                       enable-active-high;
+                       vin-supply = <&vdd_3v3_sys>;
+               };
+
+               vdd_hdmi_pll: regulator@11 {
+                       compatible = "regulator-fixed";
+                       reg = <11>;
+                       regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL";
+                       regulator-min-microvolt = <1050000>;
+                       regulator-max-microvolt = <1050000>;
+                       gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
+                       vin-supply = <&vdd_1v05_run>;
+               };
+
+               vdd_5v0_hdmi: regulator@12 {
+                       compatible = "regulator-fixed";
+                       reg = <12>;
+                       regulator-name = "+5V_HDMI_CON";
+                       regulator-min-microvolt = <5000000>;
+                       regulator-max-microvolt = <5000000>;
+                       gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
+                       enable-active-high;
+                       vin-supply = <&vdd_5v0_sys>;
+               };
+       };
+
+       sound {
+               compatible = "nvidia,tegra-audio-rt5640-jetson-tk1",
+                            "nvidia,tegra-audio-rt5640";
+               nvidia,model = "NVIDIA Tegra Jetson TK1";
+
+               nvidia,audio-routing =
+                       "Headphones", "HPOR",
+                       "Headphones", "HPOL",
+                       "Mic Jack", "MICBIAS1",
+                       "IN2P", "Mic Jack";
+
+               nvidia,i2s-controller = <&tegra_i2s1>;
+               nvidia,audio-codec = <&rt5639>;
+
+               nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_LOW>;
+
+               clocks = <&tegra_car TEGRA124_CLK_PLL_A>,
+                        <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
+                        <&tegra_car TEGRA124_CLK_EXTERN1>;
+               clock-names = "pll_a", "pll_a_out0", "mclk";
+       };
+};
index c17283c0459807f1906080deca248f4fb638b192..f0bb8424402572f01077abf1e023a18f630d2fb5 100644 (file)
        };
 
        host1x@0,50000000 {
+               hdmi@0,54280000 {
+                       status = "okay";
+
+                       vdd-supply = <&vdd_3v3_hdmi>;
+                       pll-supply = <&vdd_hdmi_pll>;
+                       hdmi-supply = <&vdd_5v0_hdmi>;
+
+                       nvidia,ddc-i2c-bus = <&hdmi_ddc>;
+                       nvidia,hpd-gpio =
+                               <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
+               };
+
                sor@0,54540000 {
                        status = "okay";
 
                clock-frequency = <100000>;
        };
 
-       i2c@0,7000c700 {
+       hdmi_ddc: i2c@0,7000c700 {
                status = "okay";
                clock-frequency = <100000>;
        };
                                        regulator-boot-on;
                                };
 
-                               sd4 {
+                               vdd_1v05_run: sd4 {
                                        regulator-name = "+1.05V_RUN";
                                        regulator-min-microvolt = <1050000>;
                                        regulator-max-microvolt = <1050000>;
        sdhci@0,700b0400 {
                cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
                power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
+               wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
                status = "okay";
                bus-width = <4>;
-               vmmc-supply = <&vddio_sdmmc3>;
+               vqmmc-supply = <&vddio_sdmmc3>;
        };
 
        sdhci@0,700b0600 {
                        regulator-name = "+3.3V_RUN";
                        regulator-min-microvolt = <3300000>;
                        regulator-max-microvolt = <3300000>;
+                       regulator-always-on;
+                       regulator-boot-on;
                        gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
                        enable-active-high;
                        vin-supply = <&vdd_3v3_sys>;
                        enable-active-high;
                        vin-supply = <&vdd_3v3_sys>;
                };
+
+               vdd_hdmi_pll: regulator@11 {
+                       compatible = "regulator-fixed";
+                       reg = <11>;
+                       regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL";
+                       regulator-min-microvolt = <1050000>;
+                       regulator-max-microvolt = <1050000>;
+                       gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
+                       vin-supply = <&vdd_1v05_run>;
+               };
+
+               vdd_5v0_hdmi: regulator@12 {
+                       compatible = "regulator-fixed";
+                       reg = <12>;
+                       regulator-name = "+5V_HDMI_CON";
+                       regulator-min-microvolt = <5000000>;
+                       regulator-max-microvolt = <5000000>;
+                       gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
+                       enable-active-high;
+                       vin-supply = <&vdd_5v0_sys>;
+               };
        };
 
        sound {
index cf45a1a394835ecc64309e00f58f5b33a5855260..6e6bc4e8185c3e836b8a09b0ce5c90f135f9f118 100644 (file)
                        nvidia,head = <1>;
                };
 
+               hdmi@0,54280000 {
+                       compatible = "nvidia,tegra124-hdmi";
+                       reg = <0x0 0x54280000 0x0 0x00040000>;
+                       interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&tegra_car TEGRA124_CLK_HDMI>,
+                                <&tegra_car TEGRA124_CLK_PLL_D2_OUT0>;
+                       clock-names = "hdmi", "parent";
+                       resets = <&tegra_car 51>;
+                       reset-names = "hdmi";
+                       status = "disabled";
+               };
+
                sor@0,54540000 {
                        compatible = "nvidia,tegra124-sor";
                        reg = <0x0 0x54540000 0x0 0x00040000>;
                status = "disabled";
        };
 
-       serial@0,70006400 {
-               compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
-               reg = <0x0 0x70006400 0x0 0x40>;
-               reg-shift = <2>;
-               interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&tegra_car TEGRA124_CLK_UARTE>;
-               resets = <&tegra_car 66>;
-               reset-names = "serial";
-               dmas = <&apbdma 20>, <&apbdma 20>;
-               dma-names = "rx", "tx";
-               status = "disabled";
-       };
-
        pwm@0,7000a000 {
                compatible = "nvidia,tegra124-pwm", "nvidia,tegra20-pwm";
                reg = <0x0 0x7000a000 0x0 0x100>;
index 3fb1f50f6d4628a3bdc42214450e03ace2a41e2d..f45aad688d9b5296239795860231de5d3340eab1 100644 (file)
@@ -28,6 +28,7 @@
                hdmi@54280000 {
                        status = "okay";
 
+                       hdmi-supply = <&vdd_5v0_hdmi>;
                        vdd-supply = <&hdmi_vdd_reg>;
                        pll-supply = <&hdmi_pll_reg>;
 
                        gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
                        enable-active-high;
                };
+
+               vdd_5v0_hdmi: regulator@6 {
+                       compatible = "regulator-fixed";
+                       reg = <6>;
+                       regulator-name = "VDDIO_HDMI";
+                       regulator-min-microvolt = <5000000>;
+                       regulator-max-microvolt = <5000000>;
+                       gpio = <&gpio TEGRA_GPIO(T, 2) GPIO_ACTIVE_HIGH>;
+                       enable-active-high;
+                       vin-supply = <&vdd_5v0_reg>;
+               };
        };
 
        sound {
index e93fe45b7803e7030d1dbb114ea7db12da8b6026..3189791a92897654701118ed2733432dceba57dd 100644 (file)
@@ -40,6 +40,7 @@
                hdmi@54280000 {
                        status = "okay";
 
+                       hdmi-supply = <&vdd_5v0_hdmi>;
                        vdd-supply = <&sys_3v3_reg>;
                        pll-supply = <&vio_reg>;
 
                        gpio = <&gpio TEGRA_GPIO(L, 7) GPIO_ACTIVE_HIGH>;
                        vin-supply = <&sys_3v3_reg>;
                };
+
+               vdd_5v0_hdmi: regulator@8 {
+                       compatible = "regulator-fixed";
+                       reg = <8>;
+                       regulator-name = "+VDD_5V_HDMI";
+                       regulator-min-microvolt = <5000000>;
+                       regulator-max-microvolt = <5000000>;
+                       regulator-always-on;
+                       regulator-boot-on;
+                       vin-supply = <&sys_3v3_reg>;
+               };
        };
 
        sound {
diff --git a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
new file mode 100644 (file)
index 0000000..7793abd
--- /dev/null
@@ -0,0 +1,205 @@
+/dts-v1/;
+
+#include "tegra30-colibri.dtsi"
+
+/ {
+       model = "Toradex Colibri T30 on Colibri Evaluation Board";
+       compatible = "toradex,colibri_t30-eval-v3", "toradex,colibri_t30", "nvidia,tegra30";
+
+       aliases {
+               rtc0 = "/i2c@7000c000/rtc@68";
+               rtc1 = "/i2c@7000d000/tps65911@2d";
+               rtc2 = "/rtc@7000e000";
+       };
+
+       host1x@50000000 {
+               dc@54200000 {
+                       rgb {
+                               status = "okay";
+                               nvidia,panel = <&panel>;
+                       };
+               };
+               hdmi@54280000 {
+                       status = "okay";
+               };
+       };
+
+       serial@70006000 {
+               status = "okay";
+       };
+
+       serial@70006040 {
+               compatible = "nvidia,tegra30-hsuart";
+               status = "okay";
+       };
+
+       serial@70006300 {
+               compatible = "nvidia,tegra30-hsuart";
+               status = "okay";
+       };
+
+       pwm@7000a000 {
+               status = "okay";
+       };
+
+       /*
+        * GEN1_I2C: I2C_SDA/SCL on SODIMM pin 194/196 (e.g. RTC on carrier
+        * board)
+        */
+       i2c@7000c000 {
+               status = "okay";
+               clock-frequency = <100000>;
+
+               /* M41T0M6 real time clock on carrier board */
+               rtc@68 {
+                       compatible = "stm,m41t00";
+                       reg = <0x68>;
+               };
+       };
+
+       /* DDC_CLOCK/DATA on X3 pin 15/16 (e.g. display EDID) */
+       hdmiddc: i2c@7000c700 {
+               status = "okay";
+       };
+
+       /* SPI1: Colibri SSP */
+       spi@7000d400 {
+               status = "okay";
+               spi-max-frequency = <25000000>;
+               can0: can@0 {
+                       compatible = "microchip,mcp2515";
+                       reg = <0>;
+                       clocks = <&clk16m>;
+                       interrupt-parent = <&gpio>;
+                       interrupts = <TEGRA_GPIO(S, 0) GPIO_ACTIVE_LOW>;
+                       spi-max-frequency = <10000000>;
+               };
+               spidev0: spi@1 {
+                       compatible = "spidev";
+                       reg = <1>;
+                       spi-max-frequency = <25000000>;
+               };
+       };
+
+       sdhci@78000200 {
+               status = "okay";
+               bus-width = <4>;
+               cd-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>;
+               no-1-8-v;
+       };
+
+       /* EHCI instance 0: USB1_DP/N -> USBC_P/N */
+       usb@7d000000 {
+               status = "okay";
+       };
+
+       usb-phy@7d000000 {
+               status = "okay";
+               dr_mode = "otg";
+               vbus-supply = <&usbc_vbus_reg>;
+       };
+
+       /* EHCI instance 2: USB3_DP/N -> USBH_P/N */
+       usb@7d008000 {
+               status = "okay";
+       };
+
+       usb-phy@7d008000 {
+               status = "okay";
+               vbus-supply = <&usbh_vbus_reg>;
+       };
+
+       backlight: backlight {
+               compatible = "pwm-backlight";
+
+               /* PWM<A> */
+               pwms = <&pwm 0 5000000>;
+               brightness-levels = <255 128 64 32 16 8 4 0>;
+               default-brightness-level = <6>;
+               /* BL_ON */
+               enable-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
+       };
+
+       clocks {
+               clk16m: clk@1 {
+                       compatible = "fixed-clock";
+                       reg=<1>;
+                       #clock-cells = <0>;
+                       clock-frequency = <16000000>;
+                       clock-output-names = "clk16m";
+               };
+       };
+
+       gpio-keys {
+               compatible = "gpio-keys";
+
+               power {
+                       label = "Power";
+                       gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>;
+                       linux,code = <KEY_POWER>;
+                       debounce-interval = <10>;
+                       gpio-key,wakeup;
+               };
+       };
+
+       panel: panel {
+               /*
+                * edt,et057090dhu: EDT 5.7" LCD TFT
+                * edt,et070080dh6: EDT 7.0" LCD TFT
+                */
+               compatible = "edt,et057090dhu", "simple-panel";
+
+               backlight = <&backlight>;
+       };
+
+       pwmleds {
+               compatible = "pwm-leds";
+
+               pwmb {
+                       label = "PWM<B>";
+                       pwms = <&pwm 1 19600>;
+                       max-brightness = <255>;
+               };
+               pwmc {
+                       label = "PWM<C>";
+                       pwms = <&pwm 2 19600>;
+                       max-brightness = <255>;
+               };
+               pwmd {
+                       label = "PWM<D>";
+                       pwms = <&pwm 3 19600>;
+                       max-brightness = <255>;
+               };
+       };
+
+       regulators {
+               sys_5v0_reg: regulator@1 {
+                       compatible = "regulator-fixed";
+                       reg = <1>;
+                       regulator-name = "5v0";
+                       regulator-min-microvolt = <5000000>;
+                       regulator-max-microvolt = <5000000>;
+                       regulator-always-on;
+               };
+
+               usbc_vbus_reg: regulator@2 {
+                       compatible = "regulator-fixed";
+                       reg = <2>;
+                       regulator-name = "usbc_vbus";
+                       regulator-min-microvolt = <5000000>;
+                       regulator-max-microvolt = <5000000>;
+                       vin-supply = <&sys_5v0_reg>;
+               };
+
+               /* USBH_PEN */
+               usbh_vbus_reg: regulator@3 {
+                       compatible = "regulator-fixed";
+                       reg = <3>;
+                       regulator-name = "usbh_vbus";
+                       regulator-min-microvolt = <5000000>;
+                       regulator-max-microvolt = <5000000>;
+                       gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
+                       vin-supply = <&sys_5v0_reg>;
+               };
+       };
+};
diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi
new file mode 100644 (file)
index 0000000..bf16f8e
--- /dev/null
@@ -0,0 +1,377 @@
+#include <dt-bindings/input/input.h>
+#include "tegra30.dtsi"
+
+/*
+ * Toradex Colibri T30 Device Tree
+ * Compatible for Revisions 1.1B/1.1C/1.1D
+ */
+/ {
+       model = "Toradex Colibri T30";
+       compatible = "toradex,colibri_t30", "nvidia,tegra30";
+
+       memory {
+               reg = <0x80000000 0x40000000>;
+       };
+
+       host1x@50000000 {
+               hdmi@54280000 {
+                       vdd-supply = <&sys_3v3_reg>;
+                       pll-supply = <&vio_reg>;
+
+                       nvidia,hpd-gpio =
+                               <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
+                       nvidia,ddc-i2c-bus = <&hdmiddc>;
+               };
+       };
+
+       pinmux@70000868 {
+               pinctrl-names = "default";
+               pinctrl-0 = <&state_default>;
+
+               state_default: pinmux {
+                       /* Colibri BL_ON */
+                       pv2 {
+                               nvidia,pins = "pv2";
+                               nvidia,function = "rsvd4";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       /* Colibri Backlight PWM<A> */
+                       sdmmc3_dat3_pb4 {
+                               nvidia,pins =   "sdmmc3_dat3_pb4";
+                               nvidia,function = "pwm0";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       /* Colibri CAN_INT */
+                       kb_row8_ps0 {
+                               nvidia,pins = "kb_row8_ps0";
+                               nvidia,function = "kbc";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       /*
+                        * Colibri L_BIAS, LCD_M1 is muxed with LCD_DE
+                        * todays display need DE, disable LCD_M1
+                        */
+                       lcd_m1_pw1 {
+                               nvidia,pins = "lcd_m1_pw1";
+                               nvidia,function = "rsvd3";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       /* Thermal alert, need to be disabled */
+                       lcd_dc1_pd2 {
+                               nvidia,pins = "lcd_dc1_pd2";
+                               nvidia,function = "rsvd3";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       /* Colibri MMC */
+                       kb_row10_ps2 {
+                               nvidia,pins = "kb_row10_ps2";
+                               nvidia,function = "sdmmc2";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                       };
+                       kb_row11_ps3 {
+                               nvidia,pins =   "kb_row11_ps3",
+                                               "kb_row12_ps4",
+                                               "kb_row13_ps5",
+                                               "kb_row14_ps6",
+                                               "kb_row15_ps7";
+                               nvidia,function = "sdmmc2";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       /* Colibri SSP */
+                       ulpi_clk_py0 {
+                               nvidia,pins =   "ulpi_clk_py0",
+                                               "ulpi_dir_py1",
+                                               "ulpi_nxt_py2",
+                                               "ulpi_stp_py3";
+                               nvidia,function = "spi1";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                       };
+                       sdmmc3_dat6_pd3 {
+                               nvidia,pins =   "sdmmc3_dat6_pd3",
+                                               "sdmmc3_dat7_pd4";
+                               nvidia,function = "spdif";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_ENABLE>;
+                       };
+
+                       /* Colibri UART_A */
+                       ulpi_data0 {
+                               nvidia,pins =   "ulpi_data0_po1",
+                                               "ulpi_data1_po2",
+                                               "ulpi_data2_po3",
+                                               "ulpi_data3_po4",
+                                               "ulpi_data4_po5",
+                                               "ulpi_data5_po6",
+                                               "ulpi_data6_po7",
+                                               "ulpi_data7_po0";
+                               nvidia,function = "uarta";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       /* Colibri UART_B */
+                       gmi_a16_pj7 {
+                               nvidia,pins =   "gmi_a16_pj7",
+                                               "gmi_a17_pb0",
+                                               "gmi_a18_pb1",
+                                               "gmi_a19_pk7";
+                               nvidia,function = "uartd";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       /* Colibri UART_C */
+                       uart2_rxd {
+                               nvidia,pins =   "uart2_rxd_pc3",
+                                               "uart2_txd_pc2";
+                               nvidia,function = "uartb";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       /* eMMC */
+                       sdmmc4_clk_pcc4 {
+                               nvidia,pins =   "sdmmc4_clk_pcc4",
+                                               "sdmmc4_rst_n_pcc3";
+                               nvidia,function = "sdmmc4";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                       };
+                       sdmmc4_dat0_paa0 {
+                               nvidia,pins =   "sdmmc4_dat0_paa0",
+                                               "sdmmc4_dat1_paa1",
+                                               "sdmmc4_dat2_paa2",
+                                               "sdmmc4_dat3_paa3",
+                                               "sdmmc4_dat4_paa4",
+                                               "sdmmc4_dat5_paa5",
+                                               "sdmmc4_dat6_paa6",
+                                               "sdmmc4_dat7_paa7";
+                               nvidia,function = "sdmmc4";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                       };
+               };
+       };
+
+       hdmiddc: i2c@7000c700 {
+               clock-frequency = <100000>;
+       };
+
+       /*
+        * PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and
+        * touch screen controller
+        */
+       i2c@7000d000 {
+               status = "okay";
+               clock-frequency = <100000>;
+
+               pmic: tps65911@2d {
+                       compatible = "ti,tps65911";
+                       reg = <0x2d>;
+
+                       interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
+                       #interrupt-cells = <2>;
+                       interrupt-controller;
+
+                       ti,system-power-controller;
+
+                       #gpio-cells = <2>;
+                       gpio-controller;
+
+                       vcc1-supply = <&sys_3v3_reg>;
+                       vcc2-supply = <&sys_3v3_reg>;
+                       vcc3-supply = <&vio_reg>;
+                       vcc4-supply = <&sys_3v3_reg>;
+                       vcc5-supply = <&sys_3v3_reg>;
+                       vcc6-supply = <&vio_reg>;
+                       vcc7-supply = <&sys_5v0_reg>;
+                       vccio-supply = <&sys_3v3_reg>;
+
+                       regulators {
+                               /* SW1: +V1.35_VDDIO_DDR */
+                               vdd1_reg: vdd1 {
+                                       regulator-name = "vddio_ddr_1v35";
+                                       regulator-min-microvolt = <1350000>;
+                                       regulator-max-microvolt = <1350000>;
+                                       regulator-always-on;
+                               };
+
+                               /* SW2: unused */
+
+                               /* SW CTRL: +V1.0_VDD_CPU */
+                               vddctrl_reg: vddctrl {
+                                       regulator-name = "vdd_cpu,vdd_sys";
+                                       regulator-min-microvolt = <1150000>;
+                                       regulator-max-microvolt = <1150000>;
+                                       regulator-always-on;
+                               };
+
+                               /* SWIO: +V1.8 */
+                               vio_reg: vio {
+                                       regulator-name = "vdd_1v8_gen";
+                                       regulator-min-microvolt = <1800000>;
+                                       regulator-max-microvolt = <1800000>;
+                                       regulator-always-on;
+                               };
+
+                               /* LDO1: unused */
+
+                               /*
+                                * EN_+V3.3 switching via FET:
+                                * +V3.3_AUDIO_AVDD_S, +V3.3 and +V1.8_VDD_LAN
+                                * see also v3_3 fixed supply
+                                */
+                               ldo2_reg: ldo2 {
+                                       regulator-name = "en_3v3";
+                                       regulator-min-microvolt = <3300000>;
+                                       regulator-max-microvolt = <3300000>;
+                                       regulator-always-on;
+                               };
+
+                               /* LDO3: unused */
+
+                               /* +V1.2_VDD_RTC */
+                               ldo4_reg: ldo4 {
+                                       regulator-name = "vdd_rtc";
+                                       regulator-min-microvolt = <1200000>;
+                                       regulator-max-microvolt = <1200000>;
+                                       regulator-always-on;
+                               };
+
+                               /*
+                                * +V2.8_AVDD_VDAC:
+                                * only required for analog RGB
+                                */
+                               ldo5_reg: ldo5 {
+                                       regulator-name = "avdd_vdac";
+                                       regulator-min-microvolt = <2800000>;
+                                       regulator-max-microvolt = <2800000>;
+                                       regulator-always-on;
+                               };
+
+                               /*
+                                * +V1.05_AVDD_PLLE: avdd_plle should be 1.05V
+                                * but LDO6 can't set voltage in 50mV
+                                * granularity
+                                */
+                               ldo6_reg: ldo6 {
+                                       regulator-name = "avdd_plle";
+                                       regulator-min-microvolt = <1100000>;
+                                       regulator-max-microvolt = <1100000>;
+                               };
+
+                               /* +V1.2_AVDD_PLL */
+                               ldo7_reg: ldo7 {
+                                       regulator-name = "avdd_pll";
+                                       regulator-min-microvolt = <1200000>;
+                                       regulator-max-microvolt = <1200000>;
+                                       regulator-always-on;
+                               };
+
+                               /* +V1.0_VDD_DDR_HS */
+                               ldo8_reg: ldo8 {
+                                       regulator-name = "vdd_ddr_hs";
+                                       regulator-min-microvolt = <1000000>;
+                                       regulator-max-microvolt = <1000000>;
+                                       regulator-always-on;
+                               };
+                       };
+               };
+
+               /*
+                * LM95245 temperature sensor
+                * Note: OVERT_N directly connected to PMIC PWRDN
+                */
+               temp-sensor@4c {
+                       compatible = "national,lm95245";
+                       reg = <0x4c>;
+               };
+
+               /* SW: +V1.2_VDD_CORE */
+               tps62362@60 {
+                       compatible = "ti,tps62362";
+                       reg = <0x60>;
+
+                       regulator-name = "tps62362-vout";
+                       regulator-min-microvolt = <900000>;
+                       regulator-max-microvolt = <1400000>;
+                       regulator-boot-on;
+                       regulator-always-on;
+                       ti,vsel0-state-low;
+                       /* VSEL1: EN_CORE_DVFS_N low for DVFS */
+                       ti,vsel1-state-low;
+               };
+       };
+
+       pmc@7000e400 {
+               nvidia,invert-interrupt;
+               nvidia,suspend-mode = <1>;
+               nvidia,cpu-pwr-good-time = <5000>;
+               nvidia,cpu-pwr-off-time = <5000>;
+               nvidia,core-pwr-good-time = <3845 3845>;
+               nvidia,core-pwr-off-time = <0>;
+               nvidia,core-power-req-active-high;
+               nvidia,sys-clock-req-active-high;
+       };
+
+       emmc: sdhci@78000600 {
+               status = "okay";
+               bus-width = <8>;
+               non-removable;
+       };
+
+       /* EHCI instance 1: USB2_DP/N -> AX88772B */
+       usb@7d004000 {
+               status = "okay";
+       };
+
+       usb-phy@7d004000 {
+               status = "okay";
+               nvidia,is-wired = <1>;
+       };
+
+       clocks {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               clk32k_in: clk@0 {
+                       compatible = "fixed-clock";
+                       reg=<0>;
+                       #clock-cells = <0>;
+                       clock-frequency = <32768>;
+               };
+       };
+
+       regulators {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               sys_3v3_reg: regulator@100 {
+                       compatible = "regulator-fixed";
+                       reg = <100>;
+                       regulator-name = "3v3";
+                       regulator-min-microvolt = <3300000>;
+                       regulator-max-microvolt = <3300000>;
+                       regulator-always-on;
+               };
+       };
+};
diff --git a/arch/arm/boot/dts/vf610-colibri.dts b/arch/arm/boot/dts/vf610-colibri.dts
new file mode 100644 (file)
index 0000000..aecc7db
--- /dev/null
@@ -0,0 +1,123 @@
+/*
+ * Copyright 2014 Toradex AG
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+/dts-v1/;
+#include "vf610.dtsi"
+
+/ {
+       model = "Toradex Colibri VF61 COM";
+       compatible = "toradex,vf610-colibri", "fsl,vf610";
+
+       chosen {
+               bootargs = "console=ttyLP0,115200";
+       };
+
+       memory {
+               reg = <0x80000000 0x10000000>;
+       };
+
+       clocks {
+               enet_ext {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <50000000>;
+               };
+       };
+
+};
+
+&esdhc1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_esdhc1>;
+       bus-width = <4>;
+       status = "okay";
+};
+
+&fec1 {
+       phy-mode = "rmii";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_fec1>;
+       status = "okay";
+};
+
+&L2 {
+       arm,data-latency = <2 1 2>;
+       arm,tag-latency = <3 2 3>;
+};
+
+&uart0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart0>;
+       status = "okay";
+};
+
+&uart1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart1>;
+       status = "okay";
+};
+
+&uart2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart2>;
+       status = "okay";
+};
+
+&iomuxc {
+       vf610-colibri {
+               pinctrl_esdhc1: esdhc1grp {
+                       fsl,fsl,pins = <
+                               VF610_PAD_PTA24__ESDHC1_CLK     0x31ef
+                               VF610_PAD_PTA25__ESDHC1_CMD     0x31ef
+                               VF610_PAD_PTA26__ESDHC1_DAT0    0x31ef
+                               VF610_PAD_PTA27__ESDHC1_DAT1    0x31ef
+                               VF610_PAD_PTA28__ESDHC1_DATA2   0x31ef
+                               VF610_PAD_PTA29__ESDHC1_DAT3    0x31ef
+                               VF610_PAD_PTB20__GPIO_42        0x219d
+                       >;
+               };
+
+               pinctrl_fec1: fec1grp {
+                       fsl,pins = <
+                               VF610_PAD_PTC9__ENET_RMII1_MDC          0x30d2
+                               VF610_PAD_PTC10__ENET_RMII1_MDIO        0x30d3
+                               VF610_PAD_PTC11__ENET_RMII1_CRS         0x30d1
+                               VF610_PAD_PTC12__ENET_RMII_RXD1         0x30d1
+                               VF610_PAD_PTC13__ENET_RMII1_RXD0        0x30d1
+                               VF610_PAD_PTC14__ENET_RMII1_RXER        0x30d1
+                               VF610_PAD_PTC15__ENET_RMII1_TXD1        0x30d2
+                               VF610_PAD_PTC16__ENET_RMII1_TXD0        0x30d2
+                               VF610_PAD_PTC17__ENET_RMII1_TXEN        0x30d2
+                       >;
+               };
+
+               pinctrl_uart0: uart0grp {
+                       fsl,pins = <
+                               VF610_PAD_PTB10__UART0_TX               0x21a2
+                               VF610_PAD_PTB11__UART0_RX               0x21a1
+                       >;
+               };
+
+               pinctrl_uart1: uart1grp {
+                       fsl,pins = <
+                               VF610_PAD_PTB4__UART1_TX                0x21a2
+                               VF610_PAD_PTB5__UART1_RX                0x21a1
+                       >;
+               };
+
+               pinctrl_uart2: uart2grp {
+                       fsl,pins = <
+                               VF610_PAD_PTD0__UART2_TX                0x21a2
+                               VF610_PAD_PTD1__UART2_RX                0x21a1
+                               VF610_PAD_PTD2__UART2_RTS               0x21a2
+                               VF610_PAD_PTD3__UART2_CTS               0x21a1
+                       >;
+               };
+       };
+};
index 7dd1d6ede5258e9b45c384bd2384428b0e8a7818..11d733406c7ed5f1078228b93a1837b3102eedb7 100644 (file)
        clocks {
                audio_ext {
                        compatible = "fixed-clock";
+                       #clock-cells = <0>;
                        clock-frequency = <24576000>;
                };
 
                enet_ext {
                        compatible = "fixed-clock";
+                       #clock-cells = <0>;
                        clock-frequency = <50000000>;
                };
        };
        };
 };
 
+&esdhc1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_esdhc1>;
+       bus-width = <4>;
+       status = "okay";
+};
+
 &fec0 {
        phy-mode = "rmii";
        pinctrl-names = "default";
                        >;
                };
 
+               pinctrl_esdhc1: esdhc1grp {
+                       fsl,fsl,pins = <
+                               VF610_PAD_PTA24__ESDHC1_CLK     0x31ef
+                               VF610_PAD_PTA25__ESDHC1_CMD     0x31ef
+                               VF610_PAD_PTA26__ESDHC1_DAT0    0x31ef
+                               VF610_PAD_PTA27__ESDHC1_DAT1    0x31ef
+                               VF610_PAD_PTA28__ESDHC1_DATA2   0x31ef
+                               VF610_PAD_PTA29__ESDHC1_DAT3    0x31ef
+                               VF610_PAD_PTA7__GPIO_134        0x219d
+                       >;
+               };
+
                pinctrl_fec0: fec0grp {
                        fsl,pins = <
                                VF610_PAD_PTA6__RMII_CLKIN              0x30d1
                        >;
                };
 
+               pinctrl_pwm0: pwm0grp {
+                       fsl,pins = <
+                               VF610_PAD_PTB0__FTM0_CH0                0x1582
+                               VF610_PAD_PTB1__FTM0_CH1                0x1582
+                               VF610_PAD_PTB2__FTM0_CH2                0x1582
+                               VF610_PAD_PTB3__FTM0_CH3                0x1582
+                               VF610_PAD_PTB6__FTM0_CH6                0x1582
+                               VF610_PAD_PTB7__FTM0_CH7                0x1582
+                       >;
+               };
+
                pinctrl_sai2: sai2grp {
                        fsl,pins = <
                                VF610_PAD_PTA16__SAI2_TX_BCLK           0x02ed
        };
 };
 
+&pwm0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_pwm0>;
+       status = "okay";
+};
+
 &sai2 {
        #sound-dai-cells = <0>;
        pinctrl-names = "default";
index 8048733676693de212e505aeae15ae5ad020c01c..73355ddc51861ced14a605a1f24e08834598e11c 100644 (file)
 
                sxosc {
                        compatible = "fixed-clock";
+                       #clock-cells = <0>;
                        clock-frequency = <32768>;
                };
 
                fxosc {
                        compatible = "fixed-clock";
+                       #clock-cells = <0>;
                        clock-frequency = <24000000>;
                };
        };
@@ -72,8 +74,6 @@
                        intc: interrupt-controller@40002000 {
                                compatible = "arm,cortex-a9-gic";
                                #interrupt-cells = <3>;
-                               #address-cells = <1>;
-                               #size-cells = <1>;
                                interrupt-controller;
                                reg = <0x40003000 0x1000>,
                                      <0x40002100 0x100>;
                                clock-names = "pit";
                        };
 
+                       pwm0: pwm@40038000 {
+                               compatible = "fsl,vf610-ftm-pwm";
+                               #pwm-cells = <3>;
+                               reg = <0x40038000 0x1000>;
+                               clock-names = "ftm_sys", "ftm_ext",
+                                             "ftm_fix", "ftm_cnt_clk_en";
+                               clocks = <&clks VF610_CLK_FTM0>,
+                                       <&clks VF610_CLK_FTM0_EXT_SEL>,
+                                       <&clks VF610_CLK_FTM0_FIX_SEL>,
+                                       <&clks VF610_CLK_FTM0_EXT_FIX_EN>;
+                               status = "disabled";
+                       };
+
                        adc0: adc@4003b000 {
                                compatible = "fsl,vf610-adc";
                                reg = <0x4003b000 0x1000>;
                                status = "disabled";
                        };
 
+                       esdhc1: esdhc@400b2000 {
+                               compatible = "fsl,imx53-esdhc";
+                               reg = <0x400b2000 0x4000>;
+                               interrupts = <0 28 0x04>;
+                               clocks = <&clks VF610_CLK_IPG_BUS>,
+                                       <&clks VF610_CLK_PLATFORM_BUS>,
+                                       <&clks VF610_CLK_ESDHC1>;
+                               clock-names = "ipg", "ahb", "per";
+                               status = "disabled";
+                       };
+
                        fec0: ethernet@400d0000 {
                                compatible = "fsl,mvf600-fec";
                                reg = <0x400d0000 0x1000>;
index 511180769af5c0fb31acd6beb58cb1031a417a1d..c1176abc34d92d0491eeeadf74a926ff7fc360ed 100644 (file)
@@ -24,6 +24,7 @@
                        device_type = "cpu";
                        reg = <0>;
                        clocks = <&clkc 3>;
+                       clock-latency = <1000>;
                        operating-points = <
                                /* kHz    uV */
                                666667  1000000
                interrupt-parent = <&intc>;
                ranges;
 
+               i2c0: zynq-i2c@e0004000 {
+                       compatible = "cdns,i2c-r1p10";
+                       status = "disabled";
+                       clocks = <&clkc 38>;
+                       interrupt-parent = <&intc>;
+                       interrupts = <0 25 4>;
+                       reg = <0xe0004000 0x1000>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
+               i2c1: zynq-i2c@e0005000 {
+                       compatible = "cdns,i2c-r1p10";
+                       status = "disabled";
+                       clocks = <&clkc 39>;
+                       interrupt-parent = <&intc>;
+                       interrupts = <0 48 4>;
+                       reg = <0xe0005000 0x1000>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
                intc: interrupt-controller@f8f01000 {
                        compatible = "arm,cortex-a9-gic";
                        #interrupt-cells = <3>;
index c913f77a21ebfbb84c4533eaa94d5bcd905e3edb..5e09cee33d4230773f8687fd3e187f22e49d0b77 100644 (file)
        phy-mode = "rgmii";
 };
 
+&i2c0 {
+       status = "okay";
+       clock-frequency = <400000>;
+
+       i2cswitch@74 {
+               compatible = "nxp,pca9548";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0x74>;
+
+               i2c@0 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0>;
+                       si570: clock-generator@5d {
+                               #clock-cells = <0>;
+                               compatible = "silabs,si570";
+                               temperature-stability = <50>;
+                               reg = <0x5d>;
+                               factory-fout = <156250000>;
+                               clock-frequency = <148500000>;
+                       };
+               };
+
+               i2c@2 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <2>;
+                       eeprom@54 {
+                               compatible = "at,24c08";
+                               reg = <0x54>;
+                       };
+               };
+
+               i2c@3 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <3>;
+                       gpio@21 {
+                               compatible = "ti,tca6416";
+                               reg = <0x21>;
+                               gpio-controller;
+                               #gpio-cells = <2>;
+                       };
+               };
+
+               i2c@4 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <4>;
+                       rtc@51 {
+                               compatible = "nxp,pcf8563";
+                               reg = <0x51>;
+                       };
+               };
+
+               i2c@7 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <7>;
+                       hwmon@52 {
+                               compatible = "ti,ucd9248";
+                               reg = <52>;
+                       };
+                       hwmon@53 {
+                               compatible = "ti,ucd9248";
+                               reg = <53>;
+                       };
+                       hwmon@54 {
+                               compatible = "ti,ucd9248";
+                               reg = <54>;
+                       };
+               };
+       };
+};
+
 &sdhci0 {
        status = "okay";
 };
index 88f62c50382ec59e5f35cc7a1319cb41c1585f13..4cc9913078cd6427ab69d206a21ba8d44c5c431d 100644 (file)
        phy-mode = "rgmii";
 };
 
+&i2c0 {
+       status = "okay";
+       clock-frequency = <400000>;
+
+       i2cswitch@74 {
+               compatible = "nxp,pca9548";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0x74>;
+
+               i2c@0 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0>;
+                       si570: clock-generator@5d {
+                               #clock-cells = <0>;
+                               compatible = "silabs,si570";
+                               temperature-stability = <50>;
+                               reg = <0x5d>;
+                               factory-fout = <156250000>;
+                               clock-frequency = <148500000>;
+                       };
+               };
+
+               i2c@2 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <2>;
+                       eeprom@54 {
+                               compatible = "at,24c08";
+                               reg = <0x54>;
+                       };
+               };
+
+               i2c@3 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <3>;
+                       gpio@21 {
+                               compatible = "ti,tca6416";
+                               reg = <0x21>;
+                               gpio-controller;
+                               #gpio-cells = <2>;
+                       };
+               };
+
+               i2c@4 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <4>;
+                       rtc@51 {
+                               compatible = "nxp,pcf8563";
+                               reg = <0x51>;
+                       };
+               };
+
+               i2c@7 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <7>;
+                       ucd90120@65 {
+                               compatible = "ti,ucd90120";
+                               reg = <0x65>;
+                       };
+               };
+       };
+};
+
 &sdhci0 {
        status = "okay";
 };
index 5774b6ea7ad55ab0e6c56a5239c475f00a9feb32..f01c0ee0c87ebd94debc320f5714bf247dfe5ab7 100644 (file)
@@ -797,10 +797,8 @@ static int __init bL_switcher_init(void)
 {
        int ret;
 
-       if (MAX_NR_CLUSTERS != 2) {
-               pr_err("%s: only dual cluster systems are supported\n", __func__);
-               return -EINVAL;
-       }
+       if (!mcpm_is_available())
+               return -ENODEV;
 
        cpu_notifier(bL_switcher_hotplug_callback, 0);
 
index 1e361abc29eb0e106492223348de051d1e4e9f3d..86fd60fefbc935a788b52bdf8701efebbe5d5f8d 100644 (file)
@@ -48,6 +48,11 @@ int __init mcpm_platform_register(const struct mcpm_platform_ops *ops)
        return 0;
 }
 
+bool mcpm_is_available(void)
+{
+       return (platform_ops) ? true : false;
+}
+
 int mcpm_cpu_power_up(unsigned int cpu, unsigned int cluster)
 {
        if (!platform_ops)
index e181a50fd65a9713000317c1cf04b16136d95477..c6661a60025d5e524287ffbc07846160877b0d86 100644 (file)
@@ -83,7 +83,6 @@ CONFIG_KEYBOARD_GPIO=y
 # CONFIG_INPUT_MOUSE is not set
 CONFIG_INPUT_TOUCHSCREEN=y
 CONFIG_TOUCHSCREEN_ATMEL_MXT=m
-CONFIG_TOUCHSCREEN_ATMEL_TSADCC=y
 # CONFIG_SERIO is not set
 # CONFIG_LEGACY_PTYS is not set
 CONFIG_SERIAL_ATMEL=y
@@ -146,6 +145,8 @@ CONFIG_DMADEVICES=y
 CONFIG_AT_HDMAC=y
 CONFIG_DMATEST=m
 # CONFIG_IOMMU_SUPPORT is not set
+CONFIG_IIO=y
+CONFIG_AT91_ADC=y
 CONFIG_EXT4_FS=y
 CONFIG_FANOTIFY=y
 CONFIG_VFAT_FS=y
index 85f846ae9ff21e77d8126bda271660f108c0cc75..5d7797d43d23e4c3d8b91d875cdb22ceaa1da11d 100644 (file)
@@ -45,7 +45,6 @@ CONFIG_INPUT_EVDEV=y
 # CONFIG_INPUT_KEYBOARD is not set
 # CONFIG_INPUT_MOUSE is not set
 CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_ATMEL_TSADCC=y
 # CONFIG_SERIO is not set
 CONFIG_SERIAL_ATMEL=y
 CONFIG_SERIAL_ATMEL_CONSOLE=y
@@ -65,6 +64,8 @@ CONFIG_MMC=y
 CONFIG_MMC_ATMELMCI=m
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_AT91SAM9=y
+CONFIG_IIO=y
+CONFIG_AT91_ADC=y
 CONFIG_EXT2_FS=y
 CONFIG_MSDOS_FS=y
 CONFIG_VFAT_FS=y
index 01004640ee4d0dc206bc239e06fce21f8fd3625f..3df3f3a79ef447a0ced4eed988685caf4392f609 100644 (file)
@@ -132,7 +132,7 @@ CONFIG_CRC_ITU_T=y
 CONFIG_CRC7=y
 CONFIG_XZ_DEC=y
 CONFIG_AVERAGE=y
-CONFIG_PINCTRL_CAPRI=y
+CONFIG_PINCTRL_BCM281XX=y
 CONFIG_WATCHDOG=y
 CONFIG_BCM_KONA_WDT=y
 CONFIG_BCM_KONA_WDT_DEBUG=y
index 4ce7b70ea9011634de2bcb9f1b0ff4f29e046ecd..e07a227ec0dbb331bae2428427dc36fec444adec 100644 (file)
@@ -65,6 +65,7 @@ CONFIG_TCG_TIS_I2C_INFINEON=y
 CONFIG_I2C=y
 CONFIG_I2C_MUX=y
 CONFIG_I2C_ARB_GPIO_CHALLENGE=y
+CONFIG_I2C_EXYNOS5=y
 CONFIG_I2C_S3C2410=y
 CONFIG_DEBUG_GPIO=y
 # CONFIG_HWMON is not set
index a9667957b7578bac7b218ea9163e657ecb385f88..a4e8d017f25bae466d8b0a918c753196870e9d78 100644 (file)
@@ -226,7 +226,7 @@ CONFIG_USB_DWC3=m
 CONFIG_USB_TEST=y
 CONFIG_NOP_USB_XCEIV=y
 CONFIG_OMAP_USB2=y
-CONFIG_OMAP_USB3=y
+CONFIG_TI_PIPE3=y
 CONFIG_AM335X_PHY_USB=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DEBUG=y
index dc3881e07630c8924356436936927d020055862a..869fa18ebeb2303ca678e193642284e7e9352047 100644 (file)
@@ -122,7 +122,6 @@ CONFIG_KEYBOARD_GPIO=y
 # CONFIG_INPUT_MOUSE is not set
 CONFIG_INPUT_TOUCHSCREEN=y
 CONFIG_TOUCHSCREEN_ATMEL_MXT=y
-CONFIG_TOUCHSCREEN_ATMEL_TSADCC=y
 # CONFIG_SERIO is not set
 CONFIG_LEGACY_PTY_COUNT=4
 CONFIG_SERIAL_ATMEL=y
index fd81a1b99cce5a0971315fb17bfb7f1c87f67773..aaa95ab606a83a647bfbc0f88de6a892f67123d6 100644 (file)
@@ -11,6 +11,7 @@ CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_LBDAF is not set
 # CONFIG_BLK_DEV_BSG is not set
+CONFIG_PARTITION_ADVANCED=y
 # CONFIG_IOSCHED_CFQ is not set
 # CONFIG_ARCH_MULTI_V7 is not set
 CONFIG_ARCH_U300=y
@@ -21,7 +22,6 @@ CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
 CONFIG_CMDLINE="root=/dev/ram0 rw rootfstype=rootfs console=ttyAMA0,115200n8 lpj=515072"
 CONFIG_CPU_IDLE=y
-CONFIG_FPE_NWFPE=y
 # CONFIG_SUSPEND is not set
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 # CONFIG_PREVENT_FIRMWARE_BUILD is not set
@@ -64,8 +64,8 @@ CONFIG_TMPFS=y
 CONFIG_NLS_CODEPAGE_437=y
 CONFIG_NLS_ISO8859_1=y
 CONFIG_PRINTK_TIME=y
+CONFIG_DEBUG_INFO=y
 CONFIG_DEBUG_FS=y
 # CONFIG_SCHED_DEBUG is not set
 CONFIG_TIMER_STATS=y
 # CONFIG_DEBUG_PREEMPT is not set
-CONFIG_DEBUG_INFO=y
index 65f77885c1674df038d6d92d17603e76e0058a46..d219d6a43238c6e354639500af4e5a9d56ff8714 100644 (file)
@@ -1,16 +1,16 @@
 # CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
-CONFIG_NO_HZ=y
+CONFIG_NO_HZ_IDLE=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
+CONFIG_PARTITION_ADVANCED=y
 CONFIG_ARCH_U8500=y
 CONFIG_MACH_HREFV60=y
 CONFIG_MACH_SNOWBALL=y
-CONFIG_MACH_UX500_DT=y
 CONFIG_SMP=y
 CONFIG_NR_CPUS=2
 CONFIG_PREEMPT=y
@@ -34,16 +34,22 @@ CONFIG_IP_PNP=y
 CONFIG_IP_PNP_DHCP=y
 CONFIG_NETFILTER=y
 CONFIG_PHONET=y
-# CONFIG_WIRELESS is not set
+CONFIG_CFG80211=y
+CONFIG_CFG80211_DEBUGFS=y
+CONFIG_MAC80211=y
+CONFIG_MAC80211_LEDS=y
 CONFIG_CAIF=y
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=65536
 CONFIG_SENSORS_BH1780=y
 CONFIG_NETDEVICES=y
 CONFIG_SMSC911X=y
 CONFIG_SMSC_PHY=y
-# CONFIG_WLAN is not set
+CONFIG_CW1200=y
+CONFIG_CW1200_WLAN_SDIO=y
 # CONFIG_INPUT_MOUSEDEV_PSAUX is not set
 CONFIG_INPUT_EVDEV=y
 # CONFIG_KEYBOARD_ATKBD is not set
@@ -85,15 +91,12 @@ CONFIG_AB8500_USB=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_ETH=m
 CONFIG_MMC=y
-CONFIG_MMC_UNSAFE_RESUME=y
-# CONFIG_MMC_BLOCK_BOUNCE is not set
 CONFIG_MMC_ARMMMCI=y
 CONFIG_NEW_LEDS=y
 CONFIG_LEDS_CLASS=y
 CONFIG_LEDS_LM3530=y
 CONFIG_LEDS_GPIO=y
 CONFIG_LEDS_LP5521=y
-CONFIG_LEDS_TRIGGERS=y
 CONFIG_LEDS_TRIGGER_HEARTBEAT=y
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_AB8500=y
@@ -103,6 +106,11 @@ CONFIG_STE_DMA40=y
 CONFIG_STAGING=y
 CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4=y
 CONFIG_HSEM_U8500=y
+CONFIG_IIO=y
+CONFIG_IIO_ST_ACCEL_3AXIS=y
+CONFIG_IIO_ST_GYRO_3AXIS=y
+CONFIG_IIO_ST_MAGN_3AXIS=y
+CONFIG_IIO_ST_PRESS=y
 CONFIG_EXT2_FS=y
 CONFIG_EXT2_FS_XATTR=y
 CONFIG_EXT2_FS_POSIX_ACL=y
@@ -110,8 +118,6 @@ CONFIG_EXT2_FS_SECURITY=y
 CONFIG_EXT3_FS=y
 CONFIG_EXT4_FS=y
 CONFIG_VFAT_FS=y
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
 CONFIG_TMPFS=y
 CONFIG_TMPFS_POSIX_ACL=y
 # CONFIG_MISC_FILESYSTEMS is not set
index c651e3b26ec703b08cea0128eb76c23d9aa94d46..4764344367d4b3a14381aca696f01d335b75d50f 100644 (file)
@@ -222,22 +222,22 @@ static inline int cpu_is_xsc3(void)
 #endif
 
 /*
- * Marvell's PJ4 core is based on V7 version. It has some modification
- * for coprocessor setting. For this reason, we need a way to distinguish
- * it.
+ * Marvell's PJ4 and PJ4B cores are based on V7 version,
+ * but require a specical sequence for enabling coprocessors.
+ * For this reason, we need a way to distinguish them.
  */
-#ifndef CONFIG_CPU_PJ4
-#define cpu_is_pj4()   0
-#else
+#if defined(CONFIG_CPU_PJ4) || defined(CONFIG_CPU_PJ4B)
 static inline int cpu_is_pj4(void)
 {
        unsigned int id;
 
        id = read_cpuid_id();
-       if ((id & 0xfffffff0) == 0x562f5840)
+       if ((id & 0xff0fff00) == 0x560f5800)
                return 1;
 
        return 0;
 }
+#else
+#define cpu_is_pj4()   0
 #endif
 #endif
index 191ada6e4d2db3393270ef9595e9cc083e441909..662c7bd061081b2fadfc0e790e719d14cc526d77 100644 (file)
                /* Select the best insn combination to perform the   */ \
                /* actual __m * __n / (__p << 64) operation.         */ \
                if (!__c) {                                             \
-                       asm (   "umull  %Q0, %R0, %1, %Q2\n\t"          \
+                       asm (   "umull  %Q0, %R0, %Q1, %Q2\n\t"         \
                                "mov    %Q0, #0"                        \
                                : "=&r" (__res)                         \
                                : "r" (__m), "r" (__n)                  \
index 608516ebabfe6111a651f3a5ca6e63c607046fab..a5ff410dcdb6a47a03a03214bcc0d66fdc33da94 100644 (file)
@@ -53,6 +53,13 @@ void mcpm_set_early_poke(unsigned cpu, unsigned cluster,
  * CPU/cluster power operations API for higher subsystems to use.
  */
 
+/**
+ * mcpm_is_available - returns whether MCPM is initialized and available
+ *
+ * This returns true or false accordingly.
+ */
+bool mcpm_is_available(void);
+
 /**
  * mcpm_cpu_power_up - make given CPU in given cluster runable
  *
index 0baf7f0d939484264b089c772112657cb9f15c75..f1a0dace3efee423e7727e143550aae06f081fd5 100644 (file)
@@ -98,15 +98,25 @@ static inline void __tlb_alloc_page(struct mmu_gather *tlb)
        }
 }
 
-static inline void tlb_flush_mmu(struct mmu_gather *tlb)
+static inline void tlb_flush_mmu_tlbonly(struct mmu_gather *tlb)
 {
        tlb_flush(tlb);
+}
+
+static inline void tlb_flush_mmu_free(struct mmu_gather *tlb)
+{
        free_pages_and_swap_cache(tlb->pages, tlb->nr);
        tlb->nr = 0;
        if (tlb->pages == tlb->local)
                __tlb_alloc_page(tlb);
 }
 
+static inline void tlb_flush_mmu(struct mmu_gather *tlb)
+{
+       tlb_flush_mmu_tlbonly(tlb);
+       tlb_flush_mmu_free(tlb);
+}
+
 static inline void
 tlb_gather_mmu(struct mmu_gather *tlb, struct mm_struct *mm, unsigned long start, unsigned long end)
 {
index fb5584d0cc050a6c55b30ff8342615a5a39a1c2f..ba94446c72d9127633de59545a3691390ecdfc5d 100644 (file)
 #define __NR_finit_module              (__NR_SYSCALL_BASE+379)
 #define __NR_sched_setattr             (__NR_SYSCALL_BASE+380)
 #define __NR_sched_getattr             (__NR_SYSCALL_BASE+381)
+#define __NR_renameat2                 (__NR_SYSCALL_BASE+382)
 
 /*
  * This may need to be greater than __NR_last_syscall+1 in order to
index a766bcbaf8adfbca3e4bb5ef4446bc5700454d7d..040619c32d68dfe4ce63726f44fcedcc9fe6b2cf 100644 (file)
@@ -79,6 +79,7 @@ obj-$(CONFIG_CPU_XSCALE)      += xscale-cp0.o
 obj-$(CONFIG_CPU_XSC3)         += xscale-cp0.o
 obj-$(CONFIG_CPU_MOHAWK)       += xscale-cp0.o
 obj-$(CONFIG_CPU_PJ4)          += pj4-cp0.o
+obj-$(CONFIG_CPU_PJ4B)         += pj4-cp0.o
 obj-$(CONFIG_IWMMXT)           += iwmmxt.o
 obj-$(CONFIG_PERF_EVENTS)      += perf_regs.o
 obj-$(CONFIG_HW_PERF_EVENTS)   += perf_event.o perf_event_cpu.o
index 166e945de832f22b603d6b0de2ca3eb92f2ec732..8f51bdcdacbbf6675933f38fb595adbdc825f4c2 100644 (file)
                CALL(sys_finit_module)
 /* 380 */      CALL(sys_sched_setattr)
                CALL(sys_sched_getattr)
+               CALL(sys_renameat2)
 #ifndef syscalls_counted
 .equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
 #define syscalls_counted
index f8c08839edf3053c3ee9ac884fab3f61e8ba84b3..591d6e4a64922cda2cd23531e32aa43d339c5dd3 100644 (file)
@@ -587,7 +587,7 @@ __fixup_pv_table:
        add     r6, r6, r3      @ adjust __pv_phys_pfn_offset address
        add     r7, r7, r3      @ adjust __pv_offset address
        mov     r0, r8, lsr #12 @ convert to PFN
-       str     r0, [r6, #LOW_OFFSET]   @ save computed PHYS_OFFSET to __pv_phys_pfn_offset
+       str     r0, [r6]        @ save computed PHYS_OFFSET to __pv_phys_pfn_offset
        strcc   ip, [r7, #HIGH_OFFSET]  @ save to __pv_offset high bits
        mov     r6, r3, lsr #24 @ constant for add/sub instructions
        teq     r3, r6, lsl #24 @ must be 16MiB aligned
index a08783823b32fdde6dd73d7022b042b64c321bca..2452dd1bef53b0eb719dcda0ce127c2f5ddaeec9 100644 (file)
 #include <asm/thread_info.h>
 #include <asm/asm-offsets.h>
 
-#if defined(CONFIG_CPU_PJ4)
+#if defined(CONFIG_CPU_PJ4) || defined(CONFIG_CPU_PJ4B)
 #define PJ4(code...)           code
 #define XSC(code...)
-#else
+#elif defined(CONFIG_CPU_MOHAWK) || \
+       defined(CONFIG_CPU_XSC3) || \
+       defined(CONFIG_CPU_XSCALE)
 #define PJ4(code...)
 #define XSC(code...)           code
+#else
+#error "Unsupported iWMMXt architecture"
 #endif
 
 #define MMX_WR0                        (0x00)
index f0d180d8b29f4e22558a98fdf9366ebaf1c0c0cb..8cf0996aa1a8d795bfdb65add498aa1552829382 100644 (file)
@@ -184,3 +184,10 @@ void machine_kexec(struct kimage *image)
 
        soft_restart(reboot_entry_phys);
 }
+
+void arch_crash_save_vmcoreinfo(void)
+{
+#ifdef CONFIG_ARM_LPAE
+       VMCOREINFO_CONFIG(ARM_LPAE);
+#endif
+}
index fc72086362842436381d0595c1afea648eb7b830..8153e36b24917e96c8fa69d18bd78e8b0c130c1a 100644 (file)
@@ -45,7 +45,7 @@ static int iwmmxt_do(struct notifier_block *self, unsigned long cmd, void *t)
        return NOTIFY_DONE;
 }
 
-static struct notifier_block iwmmxt_notifier_block = {
+static struct notifier_block __maybe_unused iwmmxt_notifier_block = {
        .notifier_call  = iwmmxt_do,
 };
 
@@ -72,6 +72,33 @@ static void __init pj4_cp_access_write(u32 value)
                : "=r" (temp) : "r" (value));
 }
 
+static int __init pj4_get_iwmmxt_version(void)
+{
+       u32 cp_access, wcid;
+
+       cp_access = pj4_cp_access_read();
+       pj4_cp_access_write(cp_access | 0xf);
+
+       /* check if coprocessor 0 and 1 are available */
+       if ((pj4_cp_access_read() & 0xf) != 0xf) {
+               pj4_cp_access_write(cp_access);
+               return -ENODEV;
+       }
+
+       /* read iWMMXt coprocessor id register p1, c0 */
+       __asm__ __volatile__ ("mrc    p1, 0, %0, c0, c0, 0\n" : "=r" (wcid));
+
+       pj4_cp_access_write(cp_access);
+
+       /* iWMMXt v1 */
+       if ((wcid & 0xffffff00) == 0x56051000)
+               return 1;
+       /* iWMMXt v2 */
+       if ((wcid & 0xffffff00) == 0x56052000)
+               return 2;
+
+       return -EINVAL;
+}
 
 /*
  * Disable CP0/CP1 on boot, and let call_fpe() and the iWMMXt lazy
@@ -79,17 +106,26 @@ static void __init pj4_cp_access_write(u32 value)
  */
 static int __init pj4_cp0_init(void)
 {
-       u32 cp_access;
+       u32 __maybe_unused cp_access;
+       int vers;
 
        if (!cpu_is_pj4())
                return 0;
 
+       vers = pj4_get_iwmmxt_version();
+       if (vers < 0)
+               return 0;
+
+#ifndef CONFIG_IWMMXT
+       pr_info("PJ4 iWMMXt coprocessor detected, but kernel support is missing.\n");
+#else
        cp_access = pj4_cp_access_read() & ~0xf;
        pj4_cp_access_write(cp_access);
 
-       printk(KERN_INFO "PJ4 iWMMXt coprocessor enabled.\n");
+       pr_info("PJ4 iWMMXt v%d coprocessor enabled.\n", vers);
        elf_hwcap |= HWCAP_IWMMXT;
        thread_register_notifier(&iwmmxt_notifier_block);
+#endif
 
        return 0;
 }
index 702bd329d9d0cd4f8b0912ca3a9694f942f1a568..e90a3148f38540c98c9f7a34ccce3f9ab7de7581 100644 (file)
@@ -203,9 +203,9 @@ asmlinkage long sys_oabi_fcntl64(unsigned int fd, unsigned int cmd,
        int ret;
 
        switch (cmd) {
-       case F_GETLKP:
-       case F_SETLKP:
-       case F_SETLKPW:
+       case F_OFD_GETLK:
+       case F_OFD_SETLK:
+       case F_OFD_SETLKW:
        case F_GETLK64:
        case F_SETLK64:
        case F_SETLKW64:
index 466bd299b1a8aad54949364d976d9c5430c2375e..4be5bb150bdddea694fbf71bffa6dd8e9b855177 100644 (file)
@@ -23,7 +23,7 @@ config KVM
        select HAVE_KVM_CPU_RELAX_INTERCEPT
        select KVM_MMIO
        select KVM_ARM_HOST
-       depends on ARM_VIRT_EXT && ARM_LPAE
+       depends on ARM_VIRT_EXT && ARM_LPAE && !CPU_BIG_ENDIAN
        ---help---
          Support hosting virtualized guest machines. You will also
          need to select one or more of the processor modules below.
index 80bb1e6c2c2906d0764ae5b696e72053c8faff9c..16f804938b8fea9fee56fa93991cf8c45cf141e5 100644 (file)
@@ -42,6 +42,8 @@ static unsigned long hyp_idmap_start;
 static unsigned long hyp_idmap_end;
 static phys_addr_t hyp_idmap_vector;
 
+#define pgd_order get_order(PTRS_PER_PGD * sizeof(pgd_t))
+
 #define kvm_pmd_huge(_x)       (pmd_huge(_x) || pmd_trans_huge(_x))
 
 static void kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa)
@@ -293,14 +295,14 @@ void free_boot_hyp_pgd(void)
        if (boot_hyp_pgd) {
                unmap_range(NULL, boot_hyp_pgd, hyp_idmap_start, PAGE_SIZE);
                unmap_range(NULL, boot_hyp_pgd, TRAMPOLINE_VA, PAGE_SIZE);
-               kfree(boot_hyp_pgd);
+               free_pages((unsigned long)boot_hyp_pgd, pgd_order);
                boot_hyp_pgd = NULL;
        }
 
        if (hyp_pgd)
                unmap_range(NULL, hyp_pgd, TRAMPOLINE_VA, PAGE_SIZE);
 
-       kfree(init_bounce_page);
+       free_page((unsigned long)init_bounce_page);
        init_bounce_page = NULL;
 
        mutex_unlock(&kvm_hyp_pgd_mutex);
@@ -330,7 +332,7 @@ void free_hyp_pgds(void)
                for (addr = VMALLOC_START; is_vmalloc_addr((void*)addr); addr += PGDIR_SIZE)
                        unmap_range(NULL, hyp_pgd, KERN_TO_HYP(addr), PGDIR_SIZE);
 
-               kfree(hyp_pgd);
+               free_pages((unsigned long)hyp_pgd, pgd_order);
                hyp_pgd = NULL;
        }
 
@@ -1024,7 +1026,7 @@ int kvm_mmu_init(void)
                size_t len = __hyp_idmap_text_end - __hyp_idmap_text_start;
                phys_addr_t phys_base;
 
-               init_bounce_page = kmalloc(PAGE_SIZE, GFP_KERNEL);
+               init_bounce_page = (void *)__get_free_page(GFP_KERNEL);
                if (!init_bounce_page) {
                        kvm_err("Couldn't allocate HYP init bounce page\n");
                        err = -ENOMEM;
@@ -1050,8 +1052,9 @@ int kvm_mmu_init(void)
                         (unsigned long)phys_base);
        }
 
-       hyp_pgd = kzalloc(PTRS_PER_PGD * sizeof(pgd_t), GFP_KERNEL);
-       boot_hyp_pgd = kzalloc(PTRS_PER_PGD * sizeof(pgd_t), GFP_KERNEL);
+       hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, pgd_order);
+       boot_hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, pgd_order);
+
        if (!hyp_pgd || !boot_hyp_pgd) {
                kvm_err("Hyp mode PGD not allocated\n");
                err = -ENOMEM;
index b2d2cf4dc0523fcc4175db241b61e66017e72ea0..45b55e0f0db62de039bebe152c3d503048b655e8 100644 (file)
@@ -167,7 +167,6 @@ config SOC_AT91SAM9X5
        select HAVE_AT91_DBGU0
        select HAVE_FB_ATMEL
        select SOC_AT91SAM9
-       select AT91_USE_OLD_CLK
        select HAVE_AT91_UTMI
        select HAVE_AT91_SMD
        select HAVE_AT91_USB_CLK
@@ -183,7 +182,6 @@ config SOC_AT91SAM9N12
        select HAVE_AT91_DBGU0
        select HAVE_FB_ATMEL
        select SOC_AT91SAM9
-       select AT91_USE_OLD_CLK
        select HAVE_AT91_USB_CLK
        help
          Select this if you are using Atmel's AT91SAM9N12 SoC.
index f3f19f21352aa94275755f882226027d58a39287..4860918b411eaa1a348bc5a2570b02238cdbe08b 100644 (file)
@@ -25,6 +25,7 @@
 
 #include "board.h"
 #include "generic.h"
+#include "gpio.h"
 
 
 /* --------------------------------------------------------------------
index 8b1b0a8700259961d04617ee064eb036679f8acd..14a6e35801ff8db88e32ca7867b50b2c6f5fd5d5 100644 (file)
 #include <mach/at91sam9260_matrix.h>
 #include <mach/at91_matrix.h>
 #include <mach/at91sam9_smc.h>
-#include <mach/at91_adc.h>
 #include <mach/hardware.h>
 
 #include "board.h"
 #include "generic.h"
-
+#include "gpio.h"
 
 /* --------------------------------------------------------------------
  *  USB Host
@@ -1296,7 +1295,7 @@ static struct resource adc_resources[] = {
 };
 
 static struct platform_device at91_adc_device = {
-       .name           = "at91_adc",
+       .name           = "at91sam9260-adc",
        .id             = -1,
        .dev            = {
                                .platform_data          = &adc_data,
@@ -1325,13 +1324,6 @@ static struct at91_adc_trigger at91_adc_triggers[] = {
        },
 };
 
-static struct at91_adc_reg_desc at91_adc_register_g20 = {
-       .channel_base = AT91_ADC_CHR(0),
-       .drdy_mask = AT91_ADC_DRDY,
-       .status_register = AT91_ADC_SR,
-       .trigger_register = AT91_ADC_MR,
-};
-
 void __init at91_add_device_adc(struct at91_adc_data *data)
 {
        if (!data)
@@ -1349,9 +1341,7 @@ void __init at91_add_device_adc(struct at91_adc_data *data)
        if (data->use_external_triggers)
                at91_set_A_periph(AT91_PIN_PA22, 0);
 
-       data->num_channels = 4;
        data->startup_time = 10;
-       data->registers = &at91_adc_register_g20;
        data->trigger_number = 4;
        data->trigger_list = at91_adc_triggers;
 
index 80e35895d28fb74f06d852d5712cb4c283b56a47..43b21f456f6e65624971001820574e83c055afa2 100644 (file)
@@ -29,7 +29,7 @@
 
 #include "board.h"
 #include "generic.h"
-
+#include "gpio.h"
 
 /* --------------------------------------------------------------------
  *  USB Host
index 43d53d6156dd7fd60384da67afb3784cf08c88f4..953616e5dbcb25a33f91172fd60e197c293922e2 100644 (file)
@@ -28,6 +28,7 @@
 
 #include "board.h"
 #include "generic.h"
+#include "gpio.h"
 
 
 /* --------------------------------------------------------------------
index 5e6f498db0a8d1bbda3bd2bad51f8dd4ce1b4576..9d3d544ac19c95476c2a1cf513b6283100dba923 100644 (file)
@@ -182,7 +182,7 @@ static struct clk vdec_clk = {
 static struct clk adc_op_clk = {
        .name           = "adc_op_clk",
        .type           = CLK_TYPE_PERIPHERAL,
-       .rate_hz        = 13200000,
+       .rate_hz        = 300000,
 };
 
 /* AES/TDES/SHA clock - Only for sam9m11/sam9g56 */
index 77b04c2edd783485d89f229a5c9c075bc68ab468..d943363c18454a3cce963c7ae824e68dd40fe366 100644 (file)
@@ -25,7 +25,6 @@
 #include <linux/fb.h>
 #include <video/atmel_lcdc.h>
 
-#include <mach/at91_adc.h>
 #include <mach/at91sam9g45.h>
 #include <mach/at91sam9g45_matrix.h>
 #include <mach/at91_matrix.h>
@@ -39,6 +38,7 @@
 #include "board.h"
 #include "generic.h"
 #include "clock.h"
+#include "gpio.h"
 
 
 /* --------------------------------------------------------------------
@@ -1133,58 +1133,7 @@ static void __init at91_add_device_rtc(void) {}
 
 
 /* --------------------------------------------------------------------
- *  Touchscreen
- * -------------------------------------------------------------------- */
-
-#if defined(CONFIG_TOUCHSCREEN_ATMEL_TSADCC) || defined(CONFIG_TOUCHSCREEN_ATMEL_TSADCC_MODULE)
-static u64 tsadcc_dmamask = DMA_BIT_MASK(32);
-static struct at91_tsadcc_data tsadcc_data;
-
-static struct resource tsadcc_resources[] = {
-       [0] = {
-               .start  = AT91SAM9G45_BASE_TSC,
-               .end    = AT91SAM9G45_BASE_TSC + SZ_16K - 1,
-               .flags  = IORESOURCE_MEM,
-       },
-       [1] = {
-               .start  = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC,
-               .end    = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC,
-               .flags  = IORESOURCE_IRQ,
-       }
-};
-
-static struct platform_device at91sam9g45_tsadcc_device = {
-       .name           = "atmel_tsadcc",
-       .id             = -1,
-       .dev            = {
-                               .dma_mask               = &tsadcc_dmamask,
-                               .coherent_dma_mask      = DMA_BIT_MASK(32),
-                               .platform_data          = &tsadcc_data,
-       },
-       .resource       = tsadcc_resources,
-       .num_resources  = ARRAY_SIZE(tsadcc_resources),
-};
-
-void __init at91_add_device_tsadcc(struct at91_tsadcc_data *data)
-{
-       if (!data)
-               return;
-
-       at91_set_gpio_input(AT91_PIN_PD20, 0);  /* AD0_XR */
-       at91_set_gpio_input(AT91_PIN_PD21, 0);  /* AD1_XL */
-       at91_set_gpio_input(AT91_PIN_PD22, 0);  /* AD2_YT */
-       at91_set_gpio_input(AT91_PIN_PD23, 0);  /* AD3_TB */
-
-       tsadcc_data = *data;
-       platform_device_register(&at91sam9g45_tsadcc_device);
-}
-#else
-void __init at91_add_device_tsadcc(struct at91_tsadcc_data *data) {}
-#endif
-
-
-/* --------------------------------------------------------------------
- *  ADC
+ *  ADC and touchscreen
  * -------------------------------------------------------------------- */
 
 #if IS_ENABLED(CONFIG_AT91_ADC)
@@ -1204,7 +1153,7 @@ static struct resource adc_resources[] = {
 };
 
 static struct platform_device at91_adc_device = {
-       .name           = "at91_adc",
+       .name           = "at91sam9g45-adc",
        .id             = -1,
        .dev            = {
                                .platform_data  = &adc_data,
@@ -1236,13 +1185,6 @@ static struct at91_adc_trigger at91_adc_triggers[] = {
        },
 };
 
-static struct at91_adc_reg_desc at91_adc_register_g45 = {
-       .channel_base = AT91_ADC_CHR(0),
-       .drdy_mask = AT91_ADC_DRDY,
-       .status_register = AT91_ADC_SR,
-       .trigger_register = 0x08,
-};
-
 void __init at91_add_device_adc(struct at91_adc_data *data)
 {
        if (!data)
@@ -1268,9 +1210,7 @@ void __init at91_add_device_adc(struct at91_adc_data *data)
        if (data->use_external_triggers)
                at91_set_A_periph(AT91_PIN_PD28, 0);
 
-       data->num_channels = 8;
        data->startup_time = 40;
-       data->registers = &at91_adc_register_g45;
        data->trigger_number = 4;
        data->trigger_list = at91_adc_triggers;
 
index f2ea7b0a02da8f95073fe01d36d048c712a88712..c8988fe5ff7065861a12a47fe19cd2b11e016f65 100644 (file)
 #include "board.h"
 #include "soc.h"
 #include "generic.h"
-#include "clock.h"
 #include "sam9_smc.h"
 
+#if defined(CONFIG_OLD_CLK_AT91)
+#include "clock.h"
 /* --------------------------------------------------------------------
  *  Clocks
  * -------------------------------------------------------------------- */
@@ -215,6 +216,9 @@ static void __init at91sam9n12_register_clocks(void)
                         ARRAY_SIZE(periph_clocks_lookups));
 
 }
+#else
+#define at91sam9n12_register_clocks NULL
+#endif
 
 /* --------------------------------------------------------------------
  *  AT91SAM9N12 processor initialization
index 57f12d86c0e6166c38019b7b7f6acac75078451b..a79960f57e6abff18647e9951a844ef6fb0ef3db 100644 (file)
@@ -153,6 +153,11 @@ static struct clk ac97_clk = {
        .pmc_mask       = 1 << AT91SAM9RL_ID_AC97C,
        .type           = CLK_TYPE_PERIPHERAL,
 };
+static struct clk adc_op_clk = {
+       .name           = "adc_op_clk",
+       .type           = CLK_TYPE_PERIPHERAL,
+       .rate_hz        = 1000000,
+};
 
 static struct clk *periph_clocks[] __initdata = {
        &pioA_clk,
@@ -178,6 +183,7 @@ static struct clk *periph_clocks[] __initdata = {
        &udphs_clk,
        &lcdc_clk,
        &ac97_clk,
+       &adc_op_clk,
        // irq0
 };
 
@@ -216,6 +222,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
        CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),
        CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),
        CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioD_clk),
+       CLKDEV_CON_ID("adc_clk", &tsc_clk),
 };
 
 static struct clk_lookup usart_clocks_lookups[] = {
index 428fc412aaf1e223da13a0d675aea08681391210..044ad8bc69632c8866249cb4410a70dd8d029664 100644 (file)
 #include <mach/at91sam9_smc.h>
 #include <mach/hardware.h>
 #include <linux/platform_data/dma-atmel.h>
+#include <linux/platform_data/at91_adc.h>
 
 #include "board.h"
 #include "generic.h"
+#include "gpio.h"
 
 
 /* --------------------------------------------------------------------
@@ -608,14 +610,13 @@ static void __init at91_add_device_tc(void) { }
 
 
 /* --------------------------------------------------------------------
- *  Touchscreen
+ *  ADC and Touchscreen
  * -------------------------------------------------------------------- */
 
-#if defined(CONFIG_TOUCHSCREEN_ATMEL_TSADCC) || defined(CONFIG_TOUCHSCREEN_ATMEL_TSADCC_MODULE)
-static u64 tsadcc_dmamask = DMA_BIT_MASK(32);
-static struct at91_tsadcc_data tsadcc_data;
+#if IS_ENABLED(CONFIG_AT91_ADC)
+static struct at91_adc_data adc_data;
 
-static struct resource tsadcc_resources[] = {
+static struct resource adc_resources[] = {
        [0] = {
                .start  = AT91SAM9RL_BASE_TSC,
                .end    = AT91SAM9RL_BASE_TSC + SZ_16K - 1,
@@ -628,36 +629,71 @@ static struct resource tsadcc_resources[] = {
        }
 };
 
-static struct platform_device at91sam9rl_tsadcc_device = {
-       .name           = "atmel_tsadcc",
-       .id             = -1,
-       .dev            = {
-                               .dma_mask               = &tsadcc_dmamask,
-                               .coherent_dma_mask      = DMA_BIT_MASK(32),
-                               .platform_data          = &tsadcc_data,
+static struct platform_device at91_adc_device = {
+       .name           = "at91sam9rl-adc",
+       .id             = -1,
+       .dev            = {
+               .platform_data  = &adc_data,
        },
-       .resource       = tsadcc_resources,
-       .num_resources  = ARRAY_SIZE(tsadcc_resources),
+       .resource       = adc_resources,
+       .num_resources  = ARRAY_SIZE(adc_resources),
 };
 
-void __init at91_add_device_tsadcc(struct at91_tsadcc_data *data)
+static struct at91_adc_trigger at91_adc_triggers[] = {
+       [0] = {
+               .name = "external-rising",
+               .value = 1,
+               .is_external = true,
+       },
+       [1] = {
+               .name = "external-falling",
+               .value = 2,
+               .is_external = true,
+       },
+       [2] = {
+               .name = "external-any",
+               .value = 3,
+               .is_external = true,
+       },
+       [3] = {
+               .name = "continuous",
+               .value = 6,
+               .is_external = false,
+       },
+};
+
+void __init at91_add_device_adc(struct at91_adc_data *data)
 {
        if (!data)
                return;
 
-       at91_set_A_periph(AT91_PIN_PA17, 0);    /* AD0_XR */
-       at91_set_A_periph(AT91_PIN_PA18, 0);    /* AD1_XL */
-       at91_set_A_periph(AT91_PIN_PA19, 0);    /* AD2_YT */
-       at91_set_A_periph(AT91_PIN_PA20, 0);    /* AD3_TB */
-
-       tsadcc_data = *data;
-       platform_device_register(&at91sam9rl_tsadcc_device);
+       if (test_bit(0, &data->channels_used))
+               at91_set_A_periph(AT91_PIN_PA17, 0);
+       if (test_bit(1, &data->channels_used))
+               at91_set_A_periph(AT91_PIN_PA18, 0);
+       if (test_bit(2, &data->channels_used))
+               at91_set_A_periph(AT91_PIN_PA19, 0);
+       if (test_bit(3, &data->channels_used))
+               at91_set_A_periph(AT91_PIN_PA20, 0);
+       if (test_bit(4, &data->channels_used))
+               at91_set_A_periph(AT91_PIN_PD6, 0);
+       if (test_bit(5, &data->channels_used))
+               at91_set_A_periph(AT91_PIN_PD7, 0);
+
+       if (data->use_external_triggers)
+               at91_set_A_periph(AT91_PIN_PB15, 0);
+
+       data->startup_time = 40;
+       data->trigger_number = 4;
+       data->trigger_list = at91_adc_triggers;
+
+       adc_data = *data;
+       platform_device_register(&at91_adc_device);
 }
 #else
-void __init at91_add_device_tsadcc(struct at91_tsadcc_data *data) {}
+void __init at91_add_device_adc(struct at91_adc_data *data) {}
 #endif
 
-
 /* --------------------------------------------------------------------
  *  RTC
  * -------------------------------------------------------------------- */
index 9ad781d5ee7cc9d5cd76650d395dffac9c98e0ca..028268ff3722c3589009cd81a7dab38186cefdc8 100644 (file)
 #include "board.h"
 #include "soc.h"
 #include "generic.h"
-#include "clock.h"
 #include "sam9_smc.h"
 
+#if defined(CONFIG_OLD_CLK_AT91)
+#include "clock.h"
 /* --------------------------------------------------------------------
  *  Clocks
  * -------------------------------------------------------------------- */
@@ -313,6 +314,9 @@ static void __init at91sam9x5_register_clocks(void)
        clk_register(&pck0);
        clk_register(&pck1);
 }
+#else
+#define at91sam9x5_register_clocks     NULL
+#endif
 
 /* --------------------------------------------------------------------
  *  AT91SAM9x5 processor initialization
index 35ab632bbf68a169f5e2b1671d7ba79506ccffae..3f6dbcc340228dedfecbfc7718c8bfe564a11973 100644 (file)
@@ -39,7 +39,7 @@
 #include "at91_aic.h"
 #include "board.h"
 #include "generic.h"
-
+#include "gpio.h"
 
 static void __init onearm_init_early(void)
 {
index f95e31cda4b33ac1de9101991ea8556167697619..597c649170aa6f0940ac9e4497b29260f829f52d 100644 (file)
@@ -46,6 +46,7 @@
 #include "at91_aic.h"
 #include "board.h"
 #include "generic.h"
+#include "gpio.h"
 
 
 static void __init afeb9260_init_early(void)
index 112e867c4abea764f19cb0470ba253f6e00585d2..a30502c8d3790b89ac80d04b3d12d7290f9e14b7 100644 (file)
@@ -44,6 +44,7 @@
 #include "board.h"
 #include "sam9_smc.h"
 #include "generic.h"
+#include "gpio.h"
 
 
 static void __init cam60_init_early(void)
index 92983050a9bd2bc78e7ec12f5f69045d18777d7a..47313d3ee037e03d341a5253d21784706345dc80 100644 (file)
@@ -39,6 +39,7 @@
 #include "at91_aic.h"
 #include "board.h"
 #include "generic.h"
+#include "gpio.h"
 
 
 static void __init carmeva_init_early(void)
index 008527efdbcf6af4d05b56311e3a9678f486c819..2037f78c84e7c7c4e0eef21f4f050a2a07d3ae0d 100644 (file)
@@ -48,6 +48,7 @@
 #include "board.h"
 #include "sam9_smc.h"
 #include "generic.h"
+#include "gpio.h"
 
 static void __init cpu9krea_init_early(void)
 {
index 42f1353a4bafe5566a9c705640b6e210d18e43ac..c094350c93142d2d72ef63771a4bec9474ae3f64 100644 (file)
@@ -43,6 +43,8 @@
 #include "at91_aic.h"
 #include "board.h"
 #include "generic.h"
+#include "gpio.h"
+
 
 static struct gpio_led cpuat91_leds[] = {
        {
index e5fde215225b2d245dbe419cab59cf8cfdd8210b..0e35a45cf8d44ee1b4705e7cf9b915e78a6ba6f2 100644 (file)
@@ -42,7 +42,7 @@
 #include "at91_aic.h"
 #include "board.h"
 #include "generic.h"
-
+#include "gpio.h"
 
 static void __init csb337_init_early(void)
 {
index fdf11061c577585d15297ff12595ba65888e9e10..18d027f529a882982ed691b5b94aac2a21020aee 100644 (file)
@@ -39,6 +39,7 @@
 #include "at91_aic.h"
 #include "board.h"
 #include "generic.h"
+#include "gpio.h"
 
 
 static void __init csb637_init_early(void)
index f9be8161bbfafab9ace4dcfc5e74978c06f8a2c8..aa457a8b22f5c197f15090468cb123092cc41e6e 100644 (file)
@@ -38,6 +38,7 @@
 #include "at91_aic.h"
 #include "board.h"
 #include "generic.h"
+#include "gpio.h"
 
 
 static void __init eb9200_init_early(void)
index b2fcd71262ba2c8c7e4ed72e8913b66e35b09a16..ede1373ccabaeb05dda7e985be53818fdf0f20aa 100644 (file)
@@ -42,6 +42,7 @@
 #include "at91_aic.h"
 #include "board.h"
 #include "generic.h"
+#include "gpio.h"
 
 
 static void __init ecb_at91init_early(void)
index 77de410efc90a94a5f2ba20eb68f28d9b88699ce..4e75321a8f2a4072d1da9da86590dd7718a40780 100644 (file)
@@ -31,6 +31,8 @@
 #include "at91_aic.h"
 #include "board.h"
 #include "generic.h"
+#include "gpio.h"
+
 
 static void __init eco920_init_early(void)
 {
index 737c08563628ef40ce68020b8f2f9d56ba8e918a..68f1ab6bd08f499dc7e9a5366071024d14685150 100644 (file)
@@ -37,6 +37,7 @@
 #include "at91_aic.h"
 #include "board.h"
 #include "generic.h"
+#include "gpio.h"
 
 static void __init flexibity_init_early(void)
 {
index c20a870ea9c9295e01eda9842650a3aa593533fd..8b22c60bb2384546b8019268a3179ad8ae57944e 100644 (file)
@@ -47,6 +47,7 @@
 #include "board.h"
 #include "sam9_smc.h"
 #include "generic.h"
+#include "gpio.h"
 
 /*
  * The FOX Board G20 hardware comes as the "Netus G20" board with
index 416bae8435eeaaeb526eb79bf363cfc5fccb764b..b729dd1271bfbb2210e0e564a11cbbfbfd73e6fe 100644 (file)
@@ -39,6 +39,7 @@
 #include "generic.h"
 #include "gsia18s.h"
 #include "stamp9g20.h"
+#include "gpio.h"
 
 static void __init gsia18s_init_early(void)
 {
index 88e2f5d2d16dfca5e301c6ef826019a3786e8c6c..93b1df42f639c3032b43b322fda870edcdc0c022 100644 (file)
@@ -39,6 +39,7 @@
 #include "at91_aic.h"
 #include "board.h"
 #include "generic.h"
+#include "gpio.h"
 
 
 static void __init kafa_init_early(void)
index 0c519d9ebffc578c7c740ce7b8d440699648a5a0..d58d36225e080048e4c527b20adf6cb91a008db8 100644 (file)
@@ -42,6 +42,7 @@
 #include "at91_aic.h"
 #include "board.h"
 #include "generic.h"
+#include "gpio.h"
 
 
 static void __init kb9202_init_early(void)
index 5f25fa54eb93e9887bea2bced02521941c53a63c..b48d95ec5152954d26e9485c0a5e1f97977a1d5f 100644 (file)
@@ -37,6 +37,7 @@
 #include "sam9_smc.h"
 #include "generic.h"
 #include "stamp9g20.h"
+#include "gpio.h"
 
 
 static void __init pcontrol_g20_init_early(void)
index ab2b2ec36c14a965bbb67aa31717c9adbe92882f..2c0f2d554d8466fdbb42a982da680ac15ab805fb 100644 (file)
@@ -43,6 +43,7 @@
 #include "at91_aic.h"
 #include "board.h"
 #include "generic.h"
+#include "gpio.h"
 
 
 static void __init picotux200_init_early(void)
index 8b17dadc1aba23766c954614fadf894c1dc8ec9d..953cea416754f9d593dfb4c233d79983319a55ad 100644 (file)
@@ -45,6 +45,7 @@
 #include "at91_aic.h"
 #include "board.h"
 #include "generic.h"
+#include "gpio.h"
 
 
 static void __init ek_init_early(void)
index f6d7f1958c7e5822661ac6517f48aa4de21a7247..f28e8b74df4b2fb2512e1d97425ac4a85e31d2a0 100644 (file)
@@ -31,6 +31,7 @@
 #include "at91_aic.h"
 #include "board.h"
 #include "generic.h"
+#include "gpio.h"
 
 static void __init rsi_ews_init_early(void)
 {
index 43ee4dc43b50f8851a423721315a3a7f22b8091d..d24dda67e2d343c49259b654c3d2d8d5266759aa 100644 (file)
@@ -43,6 +43,7 @@
 #include "board.h"
 #include "sam9_smc.h"
 #include "generic.h"
+#include "gpio.h"
 
 
 static void __init ek_init_early(void)
index f4f8735315dafd8247f686e756423d8b9608a013..65dea12d685ef98ef32e04aade12bf1f2be0d9b5 100644 (file)
@@ -49,6 +49,7 @@
 #include "board.h"
 #include "sam9_smc.h"
 #include "generic.h"
+#include "gpio.h"
 
 
 static void __init ek_init_early(void)
index 473546b9408bf087a6b1a38950a9cf2157b3497f..4637432de08f32486e0345b71bc15af121e69d95 100644 (file)
@@ -53,6 +53,7 @@
 #include "board.h"
 #include "sam9_smc.h"
 #include "generic.h"
+#include "gpio.h"
 
 
 static void __init ek_init_early(void)
index 2f931915c80c8d2f9a6c9059cf2e6eb07d2093a7..cd2726ee5addc96c52fdf6f443aba0c6b425e080 100644 (file)
@@ -52,6 +52,7 @@
 #include "board.h"
 #include "sam9_smc.h"
 #include "generic.h"
+#include "gpio.h"
 
 
 static void __init ek_init_early(void)
index f9cd1f2c71469f6ee3809981c643aaebdd439d7b..e1be6e25b380aab2e002f3b80352be164b637877 100644 (file)
@@ -50,6 +50,7 @@
 #include "board.h"
 #include "sam9_smc.h"
 #include "generic.h"
+#include "gpio.h"
 
 /*
  * board revision encoding
index ef39078c8ce214973352a22055421d7404cb4952..1ea61328f30dc19feddf682197f2d853174ee7fc 100644 (file)
@@ -50,6 +50,7 @@
 #include "board.h"
 #include "sam9_smc.h"
 #include "generic.h"
+#include "gpio.h"
 
 
 static void __init ek_init_early(void)
@@ -300,21 +301,13 @@ static struct atmel_lcdfb_pdata __initdata ek_lcdc_data;
 
 
 /*
- * Touchscreen
- */
-static struct at91_tsadcc_data ek_tsadcc_data = {
-       .adc_clock              = 300000,
-       .pendet_debounce        = 0x0d,
-       .ts_sample_hold_time    = 0x0a,
-};
-
-/*
- * ADCs
+ * ADCs and touchscreen
  */
 static struct at91_adc_data ek_adc_data = {
        .channels_used = BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6) | BIT(7),
        .use_external_triggers = true,
        .vref = 3300,
+       .touchscreen_type = ATMEL_ADC_TOUCHSCREEN_4WIRE,
 };
 
 /*
@@ -485,9 +478,7 @@ static void __init ek_board_init(void)
        at91_add_device_isi(&isi_data, true);
        /* LCD Controller */
        at91_add_device_lcdc(&ek_lcdc_data);
-       /* Touch Screen */
-       at91_add_device_tsadcc(&ek_tsadcc_data);
-       /* ADC */
+       /* ADC and touchscreen */
        at91_add_device_adc(&ek_adc_data);
        /* Push Buttons */
        ek_add_device_buttons();
index 604eecf6cd70d03b57c34e6a2736f9feceb5be98..b64648b4a1fc9a8720d0b3f45495b08240beba48 100644 (file)
@@ -18,6 +18,7 @@
 #include <linux/clk.h>
 #include <linux/input.h>
 #include <linux/gpio_keys.h>
+#include <linux/platform_data/at91_adc.h>
 
 #include <video/atmel_lcdc.h>
 
@@ -38,6 +39,7 @@
 #include "board.h"
 #include "sam9_smc.h"
 #include "generic.h"
+#include "gpio.h"
 
 
 static void __init ek_init_early(void)
@@ -229,12 +231,13 @@ static struct gpio_led ek_leds[] = {
 
 
 /*
- * Touchscreen
+ * ADC + Touchscreen
  */
-static struct at91_tsadcc_data ek_tsadcc_data = {
-       .adc_clock              = 1000000,
-       .pendet_debounce        = 0x0f,
-       .ts_sample_hold_time    = 0x03,
+static struct at91_adc_data ek_adc_data = {
+       .channels_used = BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5),
+       .use_external_triggers = true,
+       .vref = 3300,
+       .touchscreen_type = ATMEL_ADC_TOUCHSCREEN_4WIRE,
 };
 
 
@@ -310,8 +313,8 @@ static void __init ek_board_init(void)
        at91_add_device_lcdc(&ek_lcdc_data);
        /* AC97 */
        at91_add_device_ac97(&ek_ac97_data);
-       /* Touch Screen Controller */
-       at91_add_device_tsadcc(&ek_tsadcc_data);
+       /* Touch Screen Controller + ADC */
+       at91_add_device_adc(&ek_adc_data);
        /* LEDs */
        at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
        /* Push Buttons */
index f1d49e929ccbb039594b7f3b27cb332232fd403a..1b870e6def0cf54b5ea692e5e244a7d69a187b61 100644 (file)
@@ -38,6 +38,7 @@
 #include "board.h"
 #include "sam9_smc.h"
 #include "generic.h"
+#include "gpio.h"
 
 #define SNAPPER9260_IO_EXP_GPIO(x)     (NR_BUILTIN_GPIO + (x))
 
index e4a5ac17cdbcb79c020635431ba1ebdf7057c062..3b575036ff961ce73d3e657b1f289a4962993556 100644 (file)
@@ -32,6 +32,7 @@
 #include "board.h"
 #include "sam9_smc.h"
 #include "generic.h"
+#include "gpio.h"
 
 
 void __init stamp9g20_init_early(void)
index be083771df2e813ba055aa05237bb56aa99d4d86..46fdb0c68a68063f51fd3bff7d8039bce9e90758 100644 (file)
@@ -50,6 +50,7 @@
 #include "at91_aic.h"
 #include "board.h"
 #include "generic.h"
+#include "gpio.h"
 
 
 static void __init yl9200_init_early(void)
index 6c08b341167d308df456eb1a0e79b4f10b5a9e00..4e773b55bc2d4625fb41641a77895522d6a38d9b 100644 (file)
@@ -118,9 +118,6 @@ struct isi_platform_data;
 extern void __init at91_add_device_isi(struct isi_platform_data *data,
                bool use_pck_as_mck);
 
- /* Touchscreen Controller */
-extern void __init at91_add_device_tsadcc(struct at91_tsadcc_data *data);
-
 /* CAN */
 extern void __init at91_add_device_can(struct at91_can_data *data);
 
index a5afcf76550e3d592f1e7eaf8024327cb6716de3..12ed05bbdc5c7a6ba57cd466c0879b3cde49149f 100644 (file)
@@ -29,6 +29,7 @@
 #include <mach/at91_pio.h>
 
 #include "generic.h"
+#include "gpio.h"
 
 #define MAX_NB_GPIO_PER_BANK   32
 
similarity index 96%
rename from arch/arm/mach-at91/include/mach/gpio.h
rename to arch/arm/mach-at91/gpio.h
index 5fc23771c15455a4874211ba49ae2b012ffe6566..eed465ab0dd7d14c589880f4a242ce74138e7030 100644 (file)
@@ -209,14 +209,6 @@ extern int at91_get_gpio_value(unsigned pin);
 extern void at91_gpio_suspend(void);
 extern void at91_gpio_resume(void);
 
-#ifdef CONFIG_PINCTRL_AT91
-extern void at91_pinctrl_gpio_suspend(void);
-extern void at91_pinctrl_gpio_resume(void);
-#else
-static inline void at91_pinctrl_gpio_suspend(void) {}
-static inline void at91_pinctrl_gpio_resume(void) {}
-#endif
-
 #endif /* __ASSEMBLY__ */
 
 #endif
diff --git a/arch/arm/mach-at91/include/mach/at91_adc.h b/arch/arm/mach-at91/include/mach/at91_adc.h
deleted file mode 100644 (file)
index c287307..0000000
+++ /dev/null
@@ -1,107 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/at91_adc.h
- *
- * Copyright (C) SAN People
- *
- * Analog-to-Digital Converter (ADC) registers.
- * Based on AT91SAM9260 datasheet revision D.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef AT91_ADC_H
-#define AT91_ADC_H
-
-#define AT91_ADC_CR            0x00            /* Control Register */
-#define                AT91_ADC_SWRST          (1 << 0)        /* Software Reset */
-#define                AT91_ADC_START          (1 << 1)        /* Start Conversion */
-
-#define AT91_ADC_MR            0x04            /* Mode Register */
-#define                AT91_ADC_TRGEN          (1 << 0)        /* Trigger Enable */
-#define                AT91_ADC_TRGSEL         (7 << 1)        /* Trigger Selection */
-#define                        AT91_ADC_TRGSEL_TC0             (0 << 1)
-#define                        AT91_ADC_TRGSEL_TC1             (1 << 1)
-#define                        AT91_ADC_TRGSEL_TC2             (2 << 1)
-#define                        AT91_ADC_TRGSEL_EXTERNAL        (6 << 1)
-#define                AT91_ADC_LOWRES         (1 << 4)        /* Low Resolution */
-#define                AT91_ADC_SLEEP          (1 << 5)        /* Sleep Mode */
-#define                AT91_ADC_PRESCAL_9260   (0x3f << 8)     /* Prescalar Rate Selection */
-#define                AT91_ADC_PRESCAL_9G45   (0xff << 8)
-#define                        AT91_ADC_PRESCAL_(x)    ((x) << 8)
-#define                AT91_ADC_STARTUP_9260   (0x1f << 16)    /* Startup Up Time */
-#define                AT91_ADC_STARTUP_9G45   (0x7f << 16)
-#define                AT91_ADC_STARTUP_9X5    (0xf << 16)
-#define                        AT91_ADC_STARTUP_(x)    ((x) << 16)
-#define                AT91_ADC_SHTIM          (0xf  << 24)    /* Sample & Hold Time */
-#define                        AT91_ADC_SHTIM_(x)      ((x) << 24)
-
-#define AT91_ADC_CHER          0x10            /* Channel Enable Register */
-#define AT91_ADC_CHDR          0x14            /* Channel Disable Register */
-#define AT91_ADC_CHSR          0x18            /* Channel Status Register */
-#define                AT91_ADC_CH(n)          (1 << (n))      /* Channel Number */
-
-#define AT91_ADC_SR            0x1C            /* Status Register */
-#define                AT91_ADC_EOC(n)         (1 << (n))      /* End of Conversion on Channel N */
-#define                AT91_ADC_OVRE(n)        (1 << ((n) + 8))/* Overrun Error on Channel N */
-#define                AT91_ADC_DRDY           (1 << 16)       /* Data Ready */
-#define                AT91_ADC_GOVRE          (1 << 17)       /* General Overrun Error */
-#define                AT91_ADC_ENDRX          (1 << 18)       /* End of RX Buffer */
-#define                AT91_ADC_RXFUFF         (1 << 19)       /* RX Buffer Full */
-
-#define AT91_ADC_SR_9X5                0x30            /* Status Register for 9x5 */
-#define                AT91_ADC_SR_DRDY_9X5    (1 << 24)       /* Data Ready */
-
-#define AT91_ADC_LCDR          0x20            /* Last Converted Data Register */
-#define                AT91_ADC_LDATA          (0x3ff)
-
-#define AT91_ADC_IER           0x24            /* Interrupt Enable Register */
-#define AT91_ADC_IDR           0x28            /* Interrupt Disable Register */
-#define AT91_ADC_IMR           0x2C            /* Interrupt Mask Register */
-#define                AT91_ADC_IER_PEN        (1 << 29)
-#define                AT91_ADC_IER_NOPEN      (1 << 30)
-#define                AT91_ADC_IER_XRDY       (1 << 20)
-#define                AT91_ADC_IER_YRDY       (1 << 21)
-#define                AT91_ADC_IER_PRDY       (1 << 22)
-#define                AT91_ADC_ISR_PENS       (1 << 31)
-
-#define AT91_ADC_CHR(n)                (0x30 + ((n) * 4))      /* Channel Data Register N */
-#define                AT91_ADC_DATA           (0x3ff)
-
-#define AT91_ADC_CDR0_9X5      (0x50)                  /* Channel Data Register 0 for 9X5 */
-
-#define AT91_ADC_ACR           0x94    /* Analog Control Register */
-#define                AT91_ADC_ACR_PENDETSENS (0x3 << 0)      /* pull-up resistor */
-
-#define AT91_ADC_TSMR          0xB0
-#define                AT91_ADC_TSMR_TSMODE    (3 << 0)        /* Touch Screen Mode */
-#define                        AT91_ADC_TSMR_TSMODE_NONE               (0 << 0)
-#define                        AT91_ADC_TSMR_TSMODE_4WIRE_NO_PRESS     (1 << 0)
-#define                        AT91_ADC_TSMR_TSMODE_4WIRE_PRESS        (2 << 0)
-#define                        AT91_ADC_TSMR_TSMODE_5WIRE              (3 << 0)
-#define                AT91_ADC_TSMR_TSAV      (3 << 4)        /* Averages samples */
-#define                        AT91_ADC_TSMR_TSAV_(x)          ((x) << 4)
-#define                AT91_ADC_TSMR_SCTIM     (0x0f << 16)    /* Switch closure time */
-#define                AT91_ADC_TSMR_PENDBC    (0x0f << 28)    /* Pen Debounce time */
-#define                        AT91_ADC_TSMR_PENDBC_(x)        ((x) << 28)
-#define                AT91_ADC_TSMR_NOTSDMA   (1 << 22)       /* No Touchscreen DMA */
-#define                AT91_ADC_TSMR_PENDET_DIS        (0 << 24)       /* Pen contact detection disable */
-#define                AT91_ADC_TSMR_PENDET_ENA        (1 << 24)       /* Pen contact detection enable */
-
-#define AT91_ADC_TSXPOSR       0xB4
-#define AT91_ADC_TSYPOSR       0xB8
-#define AT91_ADC_TSPRESSR      0xBC
-
-#define AT91_ADC_TRGR_9260     AT91_ADC_MR
-#define AT91_ADC_TRGR_9G45     0x08
-#define AT91_ADC_TRGR_9X5      0xC0
-
-/* Trigger Register bit field */
-#define                AT91_ADC_TRGR_TRGPER    (0xffff << 16)
-#define                        AT91_ADC_TRGR_TRGPER_(x)        ((x) << 16)
-#define                AT91_ADC_TRGR_TRGMOD    (0x7 << 0)
-#define                        AT91_ADC_TRGR_MOD_PERIOD_TRIG   (5 << 0)
-
-#endif
index f17aa3150019bfe3e16ed1fa67e48a434f9c12ae..56338245653aea10f094ec765f0d9afdb99ae580 100644 (file)
 /* Clocks */
 #define AT91_SLOW_CLOCK                32768           /* slow clock */
 
+/*
+ * FIXME: this is needed to communicate between the pinctrl driver and
+ * the PM implementation in the machine. Possibly part of the PM
+ * implementation should be moved down into the pinctrl driver and get
+ * called as part of the generic suspend/resume path.
+ */
+#ifndef __ASSEMBLY__
+#ifdef CONFIG_PINCTRL_AT91
+extern void at91_pinctrl_gpio_suspend(void);
+extern void at91_pinctrl_gpio_resume(void);
+#else
+static inline void at91_pinctrl_gpio_suspend(void) {}
+static inline void at91_pinctrl_gpio_resume(void) {}
+#endif
+#endif
 
 #endif
index 3e22978b5547a0eb80638a9f495f970e5da4d10e..77c4d8fd03fd56c0ee04ad1b64212f56f83fe015 100644 (file)
@@ -16,6 +16,7 @@
 #include <linux/platform_device.h>
 
 #include "board.h"
+#include "gpio.h"
 
 
 /* ------------------------------------------------------------------------- */
index 8bda1cefdf96ad500f84641cbcb8fa300c3b13df..e95554532987e431ae509d47aa8f4f0dc70833e6 100644 (file)
@@ -32,6 +32,7 @@
 #include "at91_aic.h"
 #include "generic.h"
 #include "pm.h"
+#include "gpio.h"
 
 /*
  * Show the reason for the previous system reset.
index 9ef3f83efaffa642c9bbe26d68aa71750072c28e..963c51fb606c520a17df85b75621b5d6b2e15ea0 100644 (file)
@@ -18,6 +18,7 @@
 void mct_init(void __iomem *base, int irq_g0, int irq_l0, int irq_l1);
 
 struct map_desc;
+extern void __iomem *sysram_ns_base_addr;
 void exynos_init_io(void);
 void exynos_restart(enum reboot_mode mode, const char *cmd);
 void exynos_cpuidle_init(void);
index b32a907d021d4a2b5a809a22899cb237464d0d57..e973ff5de7b394fdb11e5dd7962992c32485827c 100644 (file)
@@ -114,51 +114,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
        },
 };
 
-static struct map_desc exynos4_iodesc0[] __initdata = {
-       {
-               .virtual        = (unsigned long)S5P_VA_SYSRAM,
-               .pfn            = __phys_to_pfn(EXYNOS4_PA_SYSRAM0),
-               .length         = SZ_4K,
-               .type           = MT_DEVICE,
-       },
-};
-
-static struct map_desc exynos4_iodesc1[] __initdata = {
-       {
-               .virtual        = (unsigned long)S5P_VA_SYSRAM,
-               .pfn            = __phys_to_pfn(EXYNOS4_PA_SYSRAM1),
-               .length         = SZ_4K,
-               .type           = MT_DEVICE,
-       },
-};
-
-static struct map_desc exynos4210_iodesc[] __initdata = {
-       {
-               .virtual        = (unsigned long)S5P_VA_SYSRAM_NS,
-               .pfn            = __phys_to_pfn(EXYNOS4210_PA_SYSRAM_NS),
-               .length         = SZ_4K,
-               .type           = MT_DEVICE,
-       },
-};
-
-static struct map_desc exynos4x12_iodesc[] __initdata = {
-       {
-               .virtual        = (unsigned long)S5P_VA_SYSRAM_NS,
-               .pfn            = __phys_to_pfn(EXYNOS4x12_PA_SYSRAM_NS),
-               .length         = SZ_4K,
-               .type           = MT_DEVICE,
-       },
-};
-
-static struct map_desc exynos5250_iodesc[] __initdata = {
-       {
-               .virtual        = (unsigned long)S5P_VA_SYSRAM_NS,
-               .pfn            = __phys_to_pfn(EXYNOS5250_PA_SYSRAM_NS),
-               .length         = SZ_4K,
-               .type           = MT_DEVICE,
-       },
-};
-
 static struct map_desc exynos5_iodesc[] __initdata = {
        {
                .virtual        = (unsigned long)S3C_VA_SYS,
@@ -180,11 +135,6 @@ static struct map_desc exynos5_iodesc[] __initdata = {
                .pfn            = __phys_to_pfn(EXYNOS5_PA_SROMC),
                .length         = SZ_4K,
                .type           = MT_DEVICE,
-       }, {
-               .virtual        = (unsigned long)S5P_VA_SYSRAM,
-               .pfn            = __phys_to_pfn(EXYNOS5_PA_SYSRAM),
-               .length         = SZ_4K,
-               .type           = MT_DEVICE,
        }, {
                .virtual        = (unsigned long)S5P_VA_CMU,
                .pfn            = __phys_to_pfn(EXYNOS5_PA_CMU),
@@ -280,20 +230,6 @@ static void __init exynos_map_io(void)
 
        if (soc_is_exynos5())
                iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc));
-
-       if (soc_is_exynos4210()) {
-               if (samsung_rev() == EXYNOS4210_REV_0)
-                       iotable_init(exynos4_iodesc0,
-                                               ARRAY_SIZE(exynos4_iodesc0));
-               else
-                       iotable_init(exynos4_iodesc1,
-                                               ARRAY_SIZE(exynos4_iodesc1));
-               iotable_init(exynos4210_iodesc, ARRAY_SIZE(exynos4210_iodesc));
-       }
-       if (soc_is_exynos4212() || soc_is_exynos4412())
-               iotable_init(exynos4x12_iodesc, ARRAY_SIZE(exynos4x12_iodesc));
-       if (soc_is_exynos5250())
-               iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc));
 }
 
 void __init exynos_init_io(void)
index 932129ef26c66054a2bdeecaef9c0af1a9bba788..4135edbc0270867a77c8772ec9d29a853b45cee1 100644 (file)
@@ -18,6 +18,9 @@
 
 #include <mach/map.h>
 
+#include <plat/cpu.h>
+
+#include "common.h"
 #include "smc.h"
 
 static int exynos_do_idle(void)
@@ -28,13 +31,29 @@ static int exynos_do_idle(void)
 
 static int exynos_cpu_boot(int cpu)
 {
+       /*
+        * The second parameter of SMC_CMD_CPU1BOOT command means CPU id.
+        * But, Exynos4212 has only one secondary CPU so second parameter
+        * isn't used for informing secure firmware about CPU id.
+        */
+       if (soc_is_exynos4212())
+               cpu = 0;
+
        exynos_smc(SMC_CMD_CPU1BOOT, cpu, 0, 0);
        return 0;
 }
 
 static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr)
 {
-       void __iomem *boot_reg = S5P_VA_SYSRAM_NS + 0x1c + 4*cpu;
+       void __iomem *boot_reg;
+
+       if (!sysram_ns_base_addr)
+               return -ENODEV;
+
+       boot_reg = sysram_ns_base_addr + 0x1c;
+
+       if (!soc_is_exynos4212())
+               boot_reg += 4*cpu;
 
        __raw_writel(boot_addr, boot_reg);
        return 0;
index 7b046b59d9ecc8829a98699ed84a6ffcbad4a8f5..548269a606340aad4bd275684b4b9d98fc5e7f68 100644 (file)
 
 #include <plat/map-s5p.h>
 
-#define EXYNOS4_PA_SYSRAM0             0x02025000
-#define EXYNOS4_PA_SYSRAM1             0x02020000
-#define EXYNOS5_PA_SYSRAM              0x02020000
-#define EXYNOS4210_PA_SYSRAM_NS                0x0203F000
-#define EXYNOS4x12_PA_SYSRAM_NS                0x0204F000
-#define EXYNOS5250_PA_SYSRAM_NS                0x0204F000
-
 #define EXYNOS_PA_CHIPID               0x10000000
 
 #define EXYNOS4_PA_SYSCON              0x10010000
index 03e5e9f9470536c01180963261dabf0c0c0eca08..c11c5418e0fc9ee80fd857b5a5fa15065a633df0 100644 (file)
@@ -20,6 +20,7 @@
 #include <linux/jiffies.h>
 #include <linux/smp.h>
 #include <linux/io.h>
+#include <linux/of_address.h>
 
 #include <asm/cacheflush.h>
 #include <asm/smp_plat.h>
 
 extern void exynos4_secondary_startup(void);
 
+static void __iomem *sysram_base_addr;
+void __iomem *sysram_ns_base_addr;
+
+static void __init exynos_smp_prepare_sysram(void)
+{
+       struct device_node *node;
+
+       for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram") {
+               if (!of_device_is_available(node))
+                       continue;
+               sysram_base_addr = of_iomap(node, 0);
+               break;
+       }
+
+       for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram-ns") {
+               if (!of_device_is_available(node))
+                       continue;
+               sysram_ns_base_addr = of_iomap(node, 0);
+               break;
+       }
+}
+
 static inline void __iomem *cpu_boot_reg_base(void)
 {
        if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1)
                return S5P_INFORM5;
-       return S5P_VA_SYSRAM;
+       return sysram_base_addr;
 }
 
 static inline void __iomem *cpu_boot_reg(int cpu)
@@ -45,6 +68,8 @@ static inline void __iomem *cpu_boot_reg(int cpu)
        void __iomem *boot_reg;
 
        boot_reg = cpu_boot_reg_base();
+       if (!boot_reg)
+               return ERR_PTR(-ENODEV);
        if (soc_is_exynos4412())
                boot_reg += 4*cpu;
        else if (soc_is_exynos5420())
@@ -90,6 +115,7 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
        unsigned long timeout;
        unsigned long phys_cpu = cpu_logical_map(cpu);
+       int ret = -ENOSYS;
 
        /*
         * Set synchronisation state between this boot processor
@@ -146,8 +172,18 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
                 * Try to set boot address using firmware first
                 * and fall back to boot register if it fails.
                 */
-               if (call_firmware_op(set_cpu_boot_addr, phys_cpu, boot_addr))
+               ret = call_firmware_op(set_cpu_boot_addr, phys_cpu, boot_addr);
+               if (ret && ret != -ENOSYS)
+                       goto fail;
+               if (ret == -ENOSYS) {
+                       void __iomem *boot_reg = cpu_boot_reg(phys_cpu);
+
+                       if (IS_ERR(boot_reg)) {
+                               ret = PTR_ERR(boot_reg);
+                               goto fail;
+                       }
                        __raw_writel(boot_addr, cpu_boot_reg(phys_cpu));
+               }
 
                call_firmware_op(cpu_boot, phys_cpu);
 
@@ -163,9 +199,10 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
         * now the secondary core is starting up let it run its
         * calibrations, then wait for it to finish
         */
+fail:
        spin_unlock(&boot_lock);
 
-       return pen_release != -1 ? -ENOSYS : 0;
+       return pen_release != -1 ? ret : 0;
 }
 
 /*
@@ -205,6 +242,8 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
        if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9)
                scu_enable(scu_base_addr());
 
+       exynos_smp_prepare_sysram();
+
        /*
         * Write the address of secondary startup into the
         * system-wide flags register. The boot monitor waits
@@ -217,12 +256,21 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
        for (i = 1; i < max_cpus; ++i) {
                unsigned long phys_cpu;
                unsigned long boot_addr;
+               int ret;
 
                phys_cpu = cpu_logical_map(i);
                boot_addr = virt_to_phys(exynos4_secondary_startup);
 
-               if (call_firmware_op(set_cpu_boot_addr, phys_cpu, boot_addr))
+               ret = call_firmware_op(set_cpu_boot_addr, phys_cpu, boot_addr);
+               if (ret && ret != -ENOSYS)
+                       break;
+               if (ret == -ENOSYS) {
+                       void __iomem *boot_reg = cpu_boot_reg(phys_cpu);
+
+                       if (IS_ERR(boot_reg))
+                               break;
                        __raw_writel(boot_addr, cpu_boot_reg(phys_cpu));
+               }
        }
 }
 
index b0e7f9d2c245ff093f1f08e11672e740f5170db0..2b4d6acfa34abdd67a6c6ed9becb44345dd17929 100644 (file)
@@ -208,8 +208,8 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
         * the "output_enable" bit as a gate, even though it's really just
         * enabling clock output.
         */
-       clk[lvds1_gate] = imx_clk_gate("lvds1_gate", "dummy", base + 0x160, 10);
-       clk[lvds2_gate] = imx_clk_gate("lvds2_gate", "dummy", base + 0x160, 11);
+       clk[lvds1_gate] = imx_clk_gate("lvds1_gate", "lvds1_sel", base + 0x160, 10);
+       clk[lvds2_gate] = imx_clk_gate("lvds2_gate", "lvds2_sel", base + 0x160, 11);
 
        /*                                name              parent_name        reg       idx */
        clk[pll2_pfd0_352m] = imx_clk_pfd("pll2_pfd0_352m", "pll2_bus",     base + 0x100, 0);
@@ -258,14 +258,14 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
        clk[ipu2_sel]         = imx_clk_mux("ipu2_sel",         base + 0x3c, 14, 2, ipu_sels,          ARRAY_SIZE(ipu_sels));
        clk[ldb_di0_sel]      = imx_clk_mux_flags("ldb_di0_sel", base + 0x2c, 9,  3, ldb_di_sels,      ARRAY_SIZE(ldb_di_sels), CLK_SET_RATE_PARENT);
        clk[ldb_di1_sel]      = imx_clk_mux_flags("ldb_di1_sel", base + 0x2c, 12, 3, ldb_di_sels,      ARRAY_SIZE(ldb_di_sels), CLK_SET_RATE_PARENT);
-       clk[ipu1_di0_pre_sel] = imx_clk_mux("ipu1_di0_pre_sel", base + 0x34, 6,  3, ipu_di_pre_sels,   ARRAY_SIZE(ipu_di_pre_sels));
-       clk[ipu1_di1_pre_sel] = imx_clk_mux("ipu1_di1_pre_sel", base + 0x34, 15, 3, ipu_di_pre_sels,   ARRAY_SIZE(ipu_di_pre_sels));
-       clk[ipu2_di0_pre_sel] = imx_clk_mux("ipu2_di0_pre_sel", base + 0x38, 6,  3, ipu_di_pre_sels,   ARRAY_SIZE(ipu_di_pre_sels));
-       clk[ipu2_di1_pre_sel] = imx_clk_mux("ipu2_di1_pre_sel", base + 0x38, 15, 3, ipu_di_pre_sels,   ARRAY_SIZE(ipu_di_pre_sels));
-       clk[ipu1_di0_sel]     = imx_clk_mux("ipu1_di0_sel",     base + 0x34, 0,  3, ipu1_di0_sels,     ARRAY_SIZE(ipu1_di0_sels));
-       clk[ipu1_di1_sel]     = imx_clk_mux("ipu1_di1_sel",     base + 0x34, 9,  3, ipu1_di1_sels,     ARRAY_SIZE(ipu1_di1_sels));
-       clk[ipu2_di0_sel]     = imx_clk_mux("ipu2_di0_sel",     base + 0x38, 0,  3, ipu2_di0_sels,     ARRAY_SIZE(ipu2_di0_sels));
-       clk[ipu2_di1_sel]     = imx_clk_mux("ipu2_di1_sel",     base + 0x38, 9,  3, ipu2_di1_sels,     ARRAY_SIZE(ipu2_di1_sels));
+       clk[ipu1_di0_pre_sel] = imx_clk_mux_flags("ipu1_di0_pre_sel", base + 0x34, 6,  3, ipu_di_pre_sels,   ARRAY_SIZE(ipu_di_pre_sels), CLK_SET_RATE_PARENT);
+       clk[ipu1_di1_pre_sel] = imx_clk_mux_flags("ipu1_di1_pre_sel", base + 0x34, 15, 3, ipu_di_pre_sels,   ARRAY_SIZE(ipu_di_pre_sels), CLK_SET_RATE_PARENT);
+       clk[ipu2_di0_pre_sel] = imx_clk_mux_flags("ipu2_di0_pre_sel", base + 0x38, 6,  3, ipu_di_pre_sels,   ARRAY_SIZE(ipu_di_pre_sels), CLK_SET_RATE_PARENT);
+       clk[ipu2_di1_pre_sel] = imx_clk_mux_flags("ipu2_di1_pre_sel", base + 0x38, 15, 3, ipu_di_pre_sels,   ARRAY_SIZE(ipu_di_pre_sels), CLK_SET_RATE_PARENT);
+       clk[ipu1_di0_sel]     = imx_clk_mux_flags("ipu1_di0_sel",     base + 0x34, 0,  3, ipu1_di0_sels,     ARRAY_SIZE(ipu1_di0_sels), CLK_SET_RATE_PARENT);
+       clk[ipu1_di1_sel]     = imx_clk_mux_flags("ipu1_di1_sel",     base + 0x34, 9,  3, ipu1_di1_sels,     ARRAY_SIZE(ipu1_di1_sels), CLK_SET_RATE_PARENT);
+       clk[ipu2_di0_sel]     = imx_clk_mux_flags("ipu2_di0_sel",     base + 0x38, 0,  3, ipu2_di0_sels,     ARRAY_SIZE(ipu2_di0_sels), CLK_SET_RATE_PARENT);
+       clk[ipu2_di1_sel]     = imx_clk_mux_flags("ipu2_di1_sel",     base + 0x38, 9,  3, ipu2_di1_sels,     ARRAY_SIZE(ipu2_di1_sels), CLK_SET_RATE_PARENT);
        clk[hsi_tx_sel]       = imx_clk_mux("hsi_tx_sel",       base + 0x30, 28, 1, hsi_tx_sels,       ARRAY_SIZE(hsi_tx_sels));
        clk[pcie_axi_sel]     = imx_clk_mux("pcie_axi_sel",     base + 0x18, 10, 1, pcie_axi_sels,     ARRAY_SIZE(pcie_axi_sels));
        clk[ssi1_sel]         = imx_clk_fixup_mux("ssi1_sel",   base + 0x1c, 10, 2, ssi_sels,          ARRAY_SIZE(ssi_sels),          imx_cscmr1_fixup);
@@ -445,6 +445,15 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
                clk_set_parent(clk[ldb_di1_sel], clk[pll5_video_div]);
        }
 
+       clk_set_parent(clk[ipu1_di0_pre_sel], clk[pll5_video_div]);
+       clk_set_parent(clk[ipu1_di1_pre_sel], clk[pll5_video_div]);
+       clk_set_parent(clk[ipu2_di0_pre_sel], clk[pll5_video_div]);
+       clk_set_parent(clk[ipu2_di1_pre_sel], clk[pll5_video_div]);
+       clk_set_parent(clk[ipu1_di0_sel], clk[ipu1_di0_pre]);
+       clk_set_parent(clk[ipu1_di1_sel], clk[ipu1_di1_pre]);
+       clk_set_parent(clk[ipu2_di0_sel], clk[ipu2_di0_pre]);
+       clk_set_parent(clk[ipu2_di1_sel], clk[ipu2_di1_pre]);
+
        /*
         * The gpmi needs 100MHz frequency in the EDO/Sync mode,
         * We can not get the 100MHz from the pll2_pfd0_352m.
index 43a90c8d68375594bb97d3a904021b534e217805..9cfebc5c7455b36b1123ae100efa513bd8fdbcdf 100644 (file)
@@ -48,7 +48,7 @@ static struct omap_dss_board_info rx51_dss_board_info = {
 
 static int __init rx51_video_init(void)
 {
-       if (!machine_is_nokia_rx51() && !of_machine_is_compatible("nokia,omap3-n900"))
+       if (!machine_is_nokia_rx51())
                return 0;
 
        if (omap_mux_init_gpio(RX51_LCD_RESET_GPIO, OMAP_PIN_OUTPUT)) {
index 2649ce445845288725c011bd66147cc103018339..332af927f4d3460f5852b3878279986ef965b675 100644 (file)
@@ -209,7 +209,7 @@ u8 omap2_init_dpll_parent(struct clk_hw *hw)
                if (v == OMAP3XXX_EN_DPLL_LPBYPASS ||
                    v == OMAP3XXX_EN_DPLL_FRBYPASS)
                        return 1;
-       } else if (soc_is_am33xx() || cpu_is_omap44xx()) {
+       } else if (soc_is_am33xx() || cpu_is_omap44xx() || soc_is_am43xx()) {
                if (v == OMAP4XXX_EN_DPLL_LPBYPASS ||
                    v == OMAP4XXX_EN_DPLL_FRBYPASS ||
                    v == OMAP4XXX_EN_DPLL_MNBYPASS)
@@ -255,7 +255,7 @@ unsigned long omap2_get_dpll_rate(struct clk_hw_omap *clk)
                if (v == OMAP3XXX_EN_DPLL_LPBYPASS ||
                    v == OMAP3XXX_EN_DPLL_FRBYPASS)
                        return __clk_get_rate(dd->clk_bypass);
-       } else if (soc_is_am33xx() || cpu_is_omap44xx()) {
+       } else if (soc_is_am33xx() || cpu_is_omap44xx() || soc_is_am43xx()) {
                if (v == OMAP4XXX_EN_DPLL_LPBYPASS ||
                    v == OMAP4XXX_EN_DPLL_FRBYPASS ||
                    v == OMAP4XXX_EN_DPLL_MNBYPASS)
index ab43755364f5a7c06ecfc367c0f055d65876dc54..9fe8c949305c3aff97626ca3edd5268696d57a8f 100644 (file)
@@ -501,7 +501,7 @@ static int gpmc_cs_delete_mem(int cs)
        int r;
 
        spin_lock(&gpmc_mem_lock);
-       r = release_resource(&gpmc_cs_mem[cs]);
+       r = release_resource(res);
        res->start = 0;
        res->end = 0;
        spin_unlock(&gpmc_mem_lock);
@@ -527,6 +527,14 @@ static int gpmc_cs_remap(int cs, u32 base)
                pr_err("%s: requested chip-select is disabled\n", __func__);
                return -ENODEV;
        }
+
+       /*
+        * Make sure we ignore any device offsets from the GPMC partition
+        * allocated for the chip select and that the new base confirms
+        * to the GPMC 16MB minimum granularity.
+        */ 
+       base &= ~(SZ_16M - 1);
+
        gpmc_cs_get_memconf(cs, &old_base, &size);
        if (base == old_base)
                return 0;
@@ -586,6 +594,8 @@ EXPORT_SYMBOL(gpmc_cs_request);
 
 void gpmc_cs_free(int cs)
 {
+       struct resource *res = &gpmc_cs_mem[cs];
+
        spin_lock(&gpmc_mem_lock);
        if (cs >= gpmc_cs_num || cs < 0 || !gpmc_cs_reserved(cs)) {
                printk(KERN_ERR "Trying to free non-reserved GPMC CS%d\n", cs);
@@ -594,7 +604,8 @@ void gpmc_cs_free(int cs)
                return;
        }
        gpmc_cs_disable_mem(cs);
-       release_resource(&gpmc_cs_mem[cs]);
+       if (res->flags)
+               release_resource(res);
        gpmc_cs_set_reserved(cs, 0);
        spin_unlock(&gpmc_mem_lock);
 }
index 1f33f5db10d5a2dde0d90bd29f1eb6fce9b65995..66c60fe1104c9efabd02e99b8b5ca7755e9738ce 100644 (file)
@@ -2546,11 +2546,12 @@ static int __init _init(struct omap_hwmod *oh, void *data)
                return -EINVAL;
        }
 
-       if (np)
+       if (np) {
                if (of_find_property(np, "ti,no-reset-on-init", NULL))
                        oh->flags |= HWMOD_INIT_NO_RESET;
                if (of_find_property(np, "ti,no-idle-on-init", NULL))
                        oh->flags |= HWMOD_INIT_NO_IDLE;
+       }
 
        oh->_state = _HWMOD_STATE_INITIALIZED;
 
index a123ff0070bd65138394fa6248f611ef2cc10573..71ac7d5f338593e4e7f27ed8b4cb81465b28b7db 100644 (file)
@@ -1964,7 +1964,7 @@ static struct omap_hwmod_irq_info omap3xxx_usb_host_hs_irqs[] = {
 static struct omap_hwmod omap3xxx_usb_host_hs_hwmod = {
        .name           = "usb_host_hs",
        .class          = &omap3xxx_usb_host_hs_hwmod_class,
-       .clkdm_name     = "l3_init_clkdm",
+       .clkdm_name     = "usbhost_clkdm",
        .mpu_irqs       = omap3xxx_usb_host_hs_irqs,
        .main_clk       = "usbhost_48m_fck",
        .prcm = {
@@ -2047,7 +2047,7 @@ static struct omap_hwmod_irq_info omap3xxx_usb_tll_hs_irqs[] = {
 static struct omap_hwmod omap3xxx_usb_tll_hs_hwmod = {
        .name           = "usb_tll_hs",
        .class          = &omap3xxx_usb_tll_hs_hwmod_class,
-       .clkdm_name     = "l3_init_clkdm",
+       .clkdm_name     = "core_l4_clkdm",
        .mpu_irqs       = omap3xxx_usb_tll_hs_irqs,
        .main_clk       = "usbtll_fck",
        .prcm = {
index 1f3770a8a7286fd7650f76d46917408d0ff52b96..87099bb6de692771ce7d26a720f0bec5836d6beb 100644 (file)
@@ -330,10 +330,6 @@ void omap_sram_idle(void)
                        omap3_sram_restore_context();
                        omap2_sms_restore_context();
                }
-               if (core_next_state == PWRDM_POWER_OFF)
-                       omap2_prm_clear_mod_reg_bits(OMAP3430_AUTO_OFF_MASK,
-                                              OMAP3430_GR_MOD,
-                                              OMAP3_PRM_VOLTCTRL_OFFSET);
        }
        omap3_intc_resume_idle();
 
index 8bc02913517cd14a6e96f05295ff94f9fd250ee3..0e1bb46264f9c1bed329538a01088c27903a37ed 100644 (file)
@@ -14,6 +14,7 @@
 
 #include <linux/gpio.h>
 #include <linux/mfd/asic3.h>
+#include "irqs.h" /* PXA_NR_BUILTIN_GPIO */
 
 #define HX4700_ASIC3_GPIO_BASE PXA_NR_BUILTIN_GPIO
 #define HX4700_EGPIO_BASE      (HX4700_ASIC3_GPIO_BASE + ASIC3_NUM_GPIOS)
index dbfa5a26cfff85b1ffdac6afdcc7ab26d21c0177..072842f6491b8efb0bc0ac7e3d3b04e3d6ffaefe 100644 (file)
@@ -152,7 +152,7 @@ static void __init rockchip_smp_prepare_cpus(unsigned int max_cpus)
 
        node = of_find_compatible_node(NULL, NULL, "rockchip,rk3066-pmu");
        if (!node) {
-               pr_err("%s: could not find sram dt node\n", __func__);
+               pr_err("%s: could not find pmu dt node\n", __func__);
                return;
        }
 
index 2858f380beaefba938f6dbdf75ec81874af62168..486063db2a2ffd501ca67cf7d62f0e0750464010 100644 (file)
@@ -992,6 +992,7 @@ static struct asoc_simple_card_info fsi_wm8978_info = {
        .platform       = "sh_fsi2",
        .daifmt         = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM,
        .cpu_dai = {
+               .fmt    = SND_SOC_DAIFMT_IB_NF,
                .name   = "fsia-dai",
        },
        .codec_dai = {
index f0104bfe544e378c6a778d853fbd3fc822669087..18c7e0311aa679c60a634963a3f64ddf7484dffd 100644 (file)
@@ -588,14 +588,12 @@ static struct asoc_simple_card_info rsnd_card_info = {
        .card           = "SSI01-AK4643",
        .codec          = "ak4642-codec.2-0012",
        .platform       = "rcar_sound",
-       .daifmt         = SND_SOC_DAIFMT_LEFT_J,
+       .daifmt         = SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_CBM_CFM,
        .cpu_dai = {
                .name   = "rcar_sound",
-               .fmt    = SND_SOC_DAIFMT_CBS_CFS,
        },
        .codec_dai = {
                .name   = "ak4642-hifi",
-               .fmt    = SND_SOC_DAIFMT_CBM_CFM,
                .sysclk = 11289600,
        },
 };
index 2009a9bc63562af9d761c47f433a4b3d6a80f25d..9989b1b06ffd7dae363552e4d1b973f99f423f0a 100644 (file)
@@ -170,7 +170,7 @@ static struct clk mstp_clks[MSTP_NR] = {
        [MSTP010] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 10, 0), /* SSI2 */
        [MSTP009] = SH_CLK_MSTP32(&p_clk, MSTPCR0,  9, 0), /* SSI3 */
        [MSTP008] = SH_CLK_MSTP32(&p_clk, MSTPCR0,  8, 0), /* SRU */
-       [MSTP007] = SH_CLK_MSTP32(&p_clk, MSTPCR0,  7, 0), /* HSPI */
+       [MSTP007] = SH_CLK_MSTP32(&s_clk, MSTPCR0,  7, 0), /* HSPI */
 };
 
 static struct clk_lookup lookups[] = {
index ed85473a047fe9e0a0baf0d8b054940df868848c..c52192dc3d9f9e3040bf5f5c49c7ce8d644276d6 100644 (file)
@@ -3,7 +3,7 @@
  *
  * Picked from realview
  * Copyright (c) 2012 ST Microelectronics Limited
- * Shiraz Hashim <shiraz.hashim@st.com>
+ * Shiraz Hashim <shiraz.linux.kernel@gmail.com>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
index 5c4a19887b2bb13b1c4779a6a676acc18ad35d52..c19751fff2c60d3737b3b2c98688b0dd48d85c44 100644 (file)
@@ -4,7 +4,7 @@
  * based upon linux/arch/arm/mach-realview/platsmp.c
  *
  * Copyright (C) 2012 ST Microelectronics Ltd.
- * Shiraz Hashim <shiraz.hashim@st.com>
+ * Shiraz Hashim <shiraz.linux.kernel@gmail.com>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
index 218ba5b67d9298bbd0bc8716fe6e107fe5788782..26fda4ed4d51413301d148477cd4d18e2bef7884 100644 (file)
@@ -2,7 +2,7 @@
  * arch/arm/plat-spear/time.c
  *
  * Copyright (C) 2010 ST Microelectronics
- * Shiraz Hashim<shiraz.hashim@st.com>
+ * Shiraz Hashim<shiraz.linux.kernel@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
@@ -71,7 +71,7 @@ static void clockevent_set_mode(enum clock_event_mode mode,
 static int clockevent_next_event(unsigned long evt,
                                 struct clock_event_device *clk_event_dev);
 
-static void spear_clocksource_init(void)
+static void __init spear_clocksource_init(void)
 {
        u32 tick_rate;
        u16 val;
index 92d660f9610f4ca94092a81749e578372731939f..55b305d51669c576d7b85f6d9fa07f45739ab644 100644 (file)
@@ -70,7 +70,4 @@ config TEGRA_AHB
          which controls AHB bus master arbitration and some
          performance parameters(priority, prefech size).
 
-config TEGRA_EMC_SCALING_ENABLE
-       bool "Enable scaling the memory frequency"
-
 endmenu
index 788495d35cf9ea6d920a69a8fd6cc2a7b46fd7c0..30b993399ed7758062f1f458b05d3fee2c9cd7b8 100644 (file)
@@ -51,12 +51,14 @@ static int dcscb_allcpus_mask[2];
 static int dcscb_power_up(unsigned int cpu, unsigned int cluster)
 {
        unsigned int rst_hold, cpumask = (1 << cpu);
-       unsigned int all_mask = dcscb_allcpus_mask[cluster];
+       unsigned int all_mask;
 
        pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster);
        if (cpu >= 4 || cluster >= 2)
                return -EINVAL;
 
+       all_mask = dcscb_allcpus_mask[cluster];
+
        /*
         * Since this is called with IRQs enabled, and no arch_spin_lock_irq
         * variant exists, we need to disable IRQs manually here.
@@ -101,11 +103,12 @@ static void dcscb_power_down(void)
        cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
        cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
        cpumask = (1 << cpu);
-       all_mask = dcscb_allcpus_mask[cluster];
 
        pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster);
        BUG_ON(cpu >= 4 || cluster >= 2);
 
+       all_mask = dcscb_allcpus_mask[cluster];
+
        __mcpm_cpu_going_down(cpu, cluster);
 
        arch_spin_lock(&dcscb_lock);
index c26ef5b92ca78587ce35b0f597a9cea66f9d592a..2c2754e79cb37d3fbcd9aff04ca086e4ba6f5274 100644 (file)
@@ -392,7 +392,7 @@ static irqreturn_t ve_spc_irq_handler(int irq, void *data)
  *  +--------------------------+
  *  | 31      20 | 19        0 |
  *  +--------------------------+
- *  |   u_volt   |  freq(kHz)  |
+ *  |   m_volt   |  freq(kHz)  |
  *  +--------------------------+
  */
 #define MULT_FACTOR    20
@@ -414,7 +414,7 @@ static int ve_spc_populate_opps(uint32_t cluster)
                ret = ve_spc_read_sys_cfg(SYSCFG_SCC, off, &data);
                if (!ret) {
                        opps->freq = (data & FREQ_MASK) * MULT_FACTOR;
-                       opps->u_volt = data >> VOLT_SHIFT;
+                       opps->u_volt = (data >> VOLT_SHIFT) * 1000;
                } else {
                        break;
                }
index f5ad9ee70426b0f2a285cc463739a01173994875..5bf7c3c3b3018aa37a721a222714873bec8b92ff 100644 (file)
@@ -420,29 +420,29 @@ config CPU_32v3
        bool
        select CPU_USE_DOMAINS if MMU
        select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
-       select TLS_REG_EMUL if SMP || !MMU
        select NEED_KUSER_HELPERS
+       select TLS_REG_EMUL if SMP || !MMU
 
 config CPU_32v4
        bool
        select CPU_USE_DOMAINS if MMU
        select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
-       select TLS_REG_EMUL if SMP || !MMU
        select NEED_KUSER_HELPERS
+       select TLS_REG_EMUL if SMP || !MMU
 
 config CPU_32v4T
        bool
        select CPU_USE_DOMAINS if MMU
        select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
-       select TLS_REG_EMUL if SMP || !MMU
        select NEED_KUSER_HELPERS
+       select TLS_REG_EMUL if SMP || !MMU
 
 config CPU_32v5
        bool
        select CPU_USE_DOMAINS if MMU
        select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
-       select TLS_REG_EMUL if SMP || !MMU
        select NEED_KUSER_HELPERS
+       select TLS_REG_EMUL if SMP || !MMU
 
 config CPU_32v6
        bool
index f62aa0677e5c4b69918d1ab36e39fada230d3d59..6b00be1f971e15958cc40c369c88ca872f645aa6 100644 (file)
@@ -1963,8 +1963,8 @@ arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, size_t size)
        mapping->nr_bitmaps = 1;
        mapping->extensions = extensions;
        mapping->base = base;
-       mapping->size = bitmap_size << PAGE_SHIFT;
        mapping->bits = BITS_PER_BYTE * bitmap_size;
+       mapping->size = mapping->bits << PAGE_SHIFT;
 
        spin_lock_init(&mapping->lock);
 
index 6cac43bd1d86c63638993bafa8ba989fea52e91f..423f56dd40283c3f7615a5aec0c1d5422313d61a 100644 (file)
@@ -866,6 +866,8 @@ vfp_double_multiply_accumulate(int dd, int dn, int dm, u32 fpscr, u32 negate, ch
                vdp.sign = vfp_sign_negate(vdp.sign);
 
        vfp_double_unpack(&vdn, vfp_get_double(dd));
+       if (vdn.exponent == 0 && vdn.significand)
+               vfp_double_normalise_denormal(&vdn);
        if (negate & NEG_SUBTRACT)
                vdn.sign = vfp_sign_negate(vdn.sign);
 
index b252631b406bd22bcbe040ede3d3f4dfbea8e987..4f96c1617aaec257a68496464aacbafe1f8d7ab8 100644 (file)
@@ -915,6 +915,8 @@ vfp_single_multiply_accumulate(int sd, int sn, s32 m, u32 fpscr, u32 negate, cha
        v = vfp_get_float(sd);
        pr_debug("VFP: s%u = %08x\n", sd, v);
        vfp_single_unpack(&vsn, v);
+       if (vsn.exponent == 0 && vsn.significand)
+               vfp_single_normalise_denormal(&vsn);
        if (negate & NEG_SUBTRACT)
                vsn.sign = vfp_sign_negate(vsn.sign);
 
index e6e4d3749a6e9d1eef343ec1f502c265a17c8e6d..e759af5d70988ea27959db20c7ef510a621ad335 100644 (file)
@@ -323,8 +323,6 @@ menu "CPU Power Management"
 
 source "drivers/cpuidle/Kconfig"
 
-source "kernel/power/Kconfig"
-
 source "drivers/cpufreq/Kconfig"
 
 endmenu
index 93f4b2dd92484863e8015da4a622a0c17745de5a..f8c40a66e65ddb3d3a4c327379d0eec2b234ce50 100644 (file)
                              <0x0 0x1f21e000 0x0 0x1000>,
                              <0x0 0x1f217000 0x0 0x1000>;
                        interrupts = <0x0 0x86 0x4>;
+                       dma-coherent;
                        status = "disabled";
                        clocks = <&sata01clk 0>;
                        phys = <&phy1 0>;
                              <0x0 0x1f22e000 0x0 0x1000>,
                              <0x0 0x1f227000 0x0 0x1000>;
                        interrupts = <0x0 0x87 0x4>;
+                       dma-coherent;
                        status = "ok";
                        clocks = <&sata23clk 0>;
                        phys = <&phy2 0>;
                              <0x0 0x1f23d000 0x0 0x1000>,
                              <0x0 0x1f23e000 0x0 0x1000>;
                        interrupts = <0x0 0x88 0x4>;
+                       dma-coherent;
                        status = "ok";
                        clocks = <&sata45clk 0>;
                        phys = <&phy3 0>;
index f600d400c07d2cb7e615a13bbe9d02fe3959714d..aff0292c8f4da75957ed0f3bee43ab1f804ae862 100644 (file)
@@ -22,6 +22,9 @@ typedef struct {
        void *vdso;
 } mm_context_t;
 
+#define INIT_MM_CONTEXT(name) \
+       .context.id_lock = __RAW_SPIN_LOCK_UNLOCKED(name.context.id_lock),
+
 #define ASID(mm)       ((mm)->context.id & 0xffff)
 
 extern void paging_init(void);
index 72cadf52ca807f181261b1599b25944374de5544..80e2c08900d68c0e0345fe0d831e6d1070515064 100644 (file)
@@ -19,6 +19,7 @@
 #ifndef __ASM_TLB_H
 #define __ASM_TLB_H
 
+#define  __tlb_remove_pmd_tlb_entry __tlb_remove_pmd_tlb_entry
 
 #include <asm-generic/tlb.h>
 
@@ -99,5 +100,10 @@ static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp,
 }
 #endif
 
+static inline void __tlb_remove_pmd_tlb_entry(struct mmu_gather *tlb, pmd_t *pmdp,
+                                               unsigned long address)
+{
+       tlb_add_flush(tlb, address);
+}
 
 #endif
index bb8eb8a78e67d2c7906f40aa0f4db2ef0c4ef5f5..c8d8fc17bd5a6bb6def9c878acae69fbb7bee359 100644 (file)
@@ -403,8 +403,9 @@ __SYSCALL(378, sys_kcmp)
 __SYSCALL(379, sys_finit_module)
 __SYSCALL(380, sys_sched_setattr)
 __SYSCALL(381, sys_sched_getattr)
+__SYSCALL(382, sys_renameat2)
 
-#define __NR_compat_syscalls           379
+#define __NR_compat_syscalls           383
 
 /*
  * Compat syscall numbers used by the AArch64 kernel.
index ed3955a95747286ebcb3f705c107dc1b3af90423..a7fb874b595edc0c095430792de9c8883590855f 100644 (file)
@@ -318,9 +318,6 @@ static int brk_handler(unsigned long addr, unsigned int esr,
        if (call_break_hook(regs, esr) == DBG_HOOK_HANDLED)
                return 0;
 
-       pr_warn("unexpected brk exception at %lx, esr=0x%x\n",
-                       (long)instruction_pointer(regs), esr);
-
        if (!user_mode(regs))
                return -EFAULT;
 
index ffbbdde7aba10480c12b41d552d1fb41da6097df..2dc36d00addffad4a4bd10ef0a6b1bac21170a49 100644 (file)
@@ -143,10 +143,8 @@ static int __init setup_early_printk(char *buf)
        }
        /* no options parsing yet */
 
-       if (paddr) {
-               set_fixmap_io(FIX_EARLYCON_MEM_BASE, paddr);
-               early_base = (void __iomem *)fix_to_virt(FIX_EARLYCON_MEM_BASE);
-       }
+       if (paddr)
+               early_base = (void __iomem *)set_fixmap_offset_io(FIX_EARLYCON_MEM_BASE, paddr);
 
        printch = match->printch;
        early_console = &early_console_dev;
index 720853f70b6bab01a650e39548872472bcfff0b0..7ec784653b29fad2b1eba1c49a21e9e499a6c167 100644 (file)
@@ -393,11 +393,10 @@ void __init setup_arch(char **cmdline_p)
 
 static int __init arm64_device_init(void)
 {
-       of_clk_init(NULL);
        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
        return 0;
 }
-arch_initcall(arm64_device_init);
+arch_initcall_sync(arm64_device_init);
 
 static DEFINE_PER_CPU(struct cpu, cpu_data);
 
index 29c39d5d77e31983d49ff2754b0413cd5bd48ff8..6815987b50f822af8ff1e8a8c4f8605fc83a6a7e 100644 (file)
@@ -33,6 +33,7 @@
 #include <linux/irq.h>
 #include <linux/delay.h>
 #include <linux/clocksource.h>
+#include <linux/clk-provider.h>
 
 #include <clocksource/arm_arch_timer.h>
 
@@ -65,6 +66,7 @@ void __init time_init(void)
 {
        u32 arch_timer_rate;
 
+       of_clk_init(NULL);
        clocksource_of_init();
 
        arch_timer_rate = arch_timer_get_rate();
index 0ba347e59f06a7dbfe3fe7dcc884f9435c791d6e..c851eb44dc505f8b250b7e1205b1a5ccb35afc8c 100644 (file)
 #include <linux/slab.h>
 #include <linux/dma-mapping.h>
 #include <linux/dma-contiguous.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
 #include <linux/vmalloc.h>
 #include <linux/swiotlb.h>
+#include <linux/amba/bus.h>
 
 #include <asm/cacheflush.h>
 
@@ -305,17 +308,45 @@ struct dma_map_ops coherent_swiotlb_dma_ops = {
 };
 EXPORT_SYMBOL(coherent_swiotlb_dma_ops);
 
+static int dma_bus_notifier(struct notifier_block *nb,
+                           unsigned long event, void *_dev)
+{
+       struct device *dev = _dev;
+
+       if (event != BUS_NOTIFY_ADD_DEVICE)
+               return NOTIFY_DONE;
+
+       if (of_property_read_bool(dev->of_node, "dma-coherent"))
+               set_dma_ops(dev, &coherent_swiotlb_dma_ops);
+
+       return NOTIFY_OK;
+}
+
+static struct notifier_block platform_bus_nb = {
+       .notifier_call = dma_bus_notifier,
+};
+
+static struct notifier_block amba_bus_nb = {
+       .notifier_call = dma_bus_notifier,
+};
+
 extern int swiotlb_late_init_with_default_size(size_t default_size);
 
 static int __init swiotlb_late_init(void)
 {
        size_t swiotlb_size = min(SZ_64M, MAX_ORDER_NR_PAGES << PAGE_SHIFT);
 
-       dma_ops = &coherent_swiotlb_dma_ops;
+       /*
+        * These must be registered before of_platform_populate().
+        */
+       bus_register_notifier(&platform_bus_type, &platform_bus_nb);
+       bus_register_notifier(&amba_bustype, &amba_bus_nb);
+
+       dma_ops = &noncoherent_swiotlb_dma_ops;
 
        return swiotlb_late_init_with_default_size(swiotlb_size);
 }
-subsys_initcall(swiotlb_late_init);
+arch_initcall(swiotlb_late_init);
 
 #define PREALLOC_DMA_DEBUG_ENTRIES     4096
 
index 6b7e89569a3a9ff8518e7c6ee856603f1e9fb93b..0a472c41a67fa9dc33e9c746c24a402d6f306289 100644 (file)
@@ -374,6 +374,9 @@ int kern_addr_valid(unsigned long addr)
        if (pmd_none(*pmd))
                return 0;
 
+       if (pmd_sect(*pmd))
+               return pfn_valid(pmd_pfn(*pmd));
+
        pte = pte_offset_kernel(pmd, addr);
        if (pte_none(*pte))
                return 0;
diff --git a/arch/hexagon/include/asm/barrier.h b/arch/hexagon/include/asm/barrier.h
deleted file mode 100644 (file)
index 4e863da..0000000
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * Memory barrier definitions for the Hexagon architecture
- *
- * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-#ifndef _ASM_BARRIER_H
-#define _ASM_BARRIER_H
-
-#define rmb()                          barrier()
-#define read_barrier_depends()         barrier()
-#define wmb()                          barrier()
-#define mb()                           barrier()
-#define smp_rmb()                      barrier()
-#define smp_read_barrier_depends()     barrier()
-#define smp_wmb()                      barrier()
-#define smp_mb()                       barrier()
-
-/*  Set a value and use a memory barrier.  Used by the scheduler somewhere.  */
-#define set_mb(var, value) \
-       do { var = value; mb(); } while (0)
-
-#endif /* _ASM_BARRIER_H */
index bc5efc7c3f3f8ead3608780ba5e2f5b9e212e20c..39d64e0df1de6dd62caf650fdb3ed5f969f280cc 100644 (file)
@@ -91,18 +91,9 @@ extern struct ia64_tr_entry *ia64_idtrs[NR_CPUS];
 #define RR_RID_MASK    0x00000000ffffff00L
 #define RR_TO_RID(val)         ((val >> 8) & 0xffffff)
 
-/*
- * Flush the TLB for address range START to END and, if not in fast mode, release the
- * freed pages that where gathered up to this point.
- */
 static inline void
-ia64_tlb_flush_mmu (struct mmu_gather *tlb, unsigned long start, unsigned long end)
+ia64_tlb_flush_mmu_tlbonly(struct mmu_gather *tlb, unsigned long start, unsigned long end)
 {
-       unsigned long i;
-       unsigned int nr;
-
-       if (!tlb->need_flush)
-               return;
        tlb->need_flush = 0;
 
        if (tlb->fullmm) {
@@ -135,6 +126,14 @@ ia64_tlb_flush_mmu (struct mmu_gather *tlb, unsigned long start, unsigned long e
                flush_tlb_range(&vma, ia64_thash(start), ia64_thash(end));
        }
 
+}
+
+static inline void
+ia64_tlb_flush_mmu_free(struct mmu_gather *tlb)
+{
+       unsigned long i;
+       unsigned int nr;
+
        /* lastly, release the freed pages */
        nr = tlb->nr;
 
@@ -144,6 +143,19 @@ ia64_tlb_flush_mmu (struct mmu_gather *tlb, unsigned long start, unsigned long e
                free_page_and_swap_cache(tlb->pages[i]);
 }
 
+/*
+ * Flush the TLB for address range START to END and, if not in fast mode, release the
+ * freed pages that where gathered up to this point.
+ */
+static inline void
+ia64_tlb_flush_mmu (struct mmu_gather *tlb, unsigned long start, unsigned long end)
+{
+       if (!tlb->need_flush)
+               return;
+       ia64_tlb_flush_mmu_tlbonly(tlb, start, end);
+       ia64_tlb_flush_mmu_free(tlb);
+}
+
 static inline void __tlb_alloc_page(struct mmu_gather *tlb)
 {
        unsigned long addr = __get_free_pages(GFP_NOWAIT | __GFP_NOWARN, 0);
@@ -206,6 +218,16 @@ static inline int __tlb_remove_page(struct mmu_gather *tlb, struct page *page)
        return tlb->max - tlb->nr;
 }
 
+static inline void tlb_flush_mmu_tlbonly(struct mmu_gather *tlb)
+{
+       ia64_tlb_flush_mmu_tlbonly(tlb, tlb->start_addr, tlb->end_addr);
+}
+
+static inline void tlb_flush_mmu_free(struct mmu_gather *tlb)
+{
+       ia64_tlb_flush_mmu_free(tlb);
+}
+
 static inline void tlb_flush_mmu(struct mmu_gather *tlb)
 {
        ia64_tlb_flush_mmu(tlb, tlb->start_addr, tlb->end_addr);
index e6f80fcf013bbbf16a30d7dd804c4b181685e15a..a4acddad0c78e84aa64055ca0cff7cc650cae720 100644 (file)
@@ -259,7 +259,7 @@ start_ap:
         * Switch into virtual mode:
         */
        movl r16=(IA64_PSR_IT|IA64_PSR_IC|IA64_PSR_DT|IA64_PSR_RT|IA64_PSR_DFH|IA64_PSR_BN \
-                 |IA64_PSR_DI|IA64_PSR_AC)
+                 |IA64_PSR_DI)
        ;;
        mov cr.ipsr=r16
        movl r17=1f
index 689ffcaa284e4ddbdbe1503b12d0713c7cb5c017..18e794a572489d7b308f7a779991d9c05351c463 100644 (file)
@@ -58,7 +58,7 @@
 #include <asm/unistd.h>
 #include <asm/errno.h>
 
-#if 1
+#if 0
 # define PSR_DEFAULT_BITS      psr.ac
 #else
 # define PSR_DEFAULT_BITS      0
index 24018484c6e93391060e0157540d804867bb6f58..397e34a63e188ea2a17953e5cbb20589356d0f2d 100644 (file)
@@ -64,7 +64,7 @@
 #include "kvm_minstate.h"
 #include "vti.h"
 
-#if 1
+#if 0
 # define PSR_DEFAULT_BITS   psr.ac
 #else
 # define PSR_DEFAULT_BITS   0
index c2bb4f896ce788cbba4b6c48cd18ef875e5bdfd6..3aa5b46b2d40d0c7549142072debd16e1667ad81 100644 (file)
@@ -635,7 +635,7 @@ static void octeon_irq_cpu_offline_ciu(struct irq_data *data)
                cpumask_clear(&new_affinity);
                cpumask_set_cpu(cpumask_first(cpu_online_mask), &new_affinity);
        }
-       __irq_set_affinity_locked(data, &new_affinity);
+       irq_set_affinity_locked(data, &new_affinity, false);
 }
 
 static int octeon_irq_ciu_set_affinity(struct irq_data *data,
index e422b38d3113b0c38bd7d6c495ccc99849e0da71..9e67cdea3c7484eb46739f3f2799ef5aae58d27b 100644 (file)
@@ -29,15 +29,15 @@ void (*flush_cache_range)(struct vm_area_struct *vma, unsigned long start,
 void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page,
        unsigned long pfn);
 void (*flush_icache_range)(unsigned long start, unsigned long end);
+EXPORT_SYMBOL_GPL(flush_icache_range);
 void (*local_flush_icache_range)(unsigned long start, unsigned long end);
 
 void (*__flush_cache_vmap)(void);
 void (*__flush_cache_vunmap)(void);
 
 void (*__flush_kernel_vmap_range)(unsigned long vaddr, int size);
-void (*__invalidate_kernel_vmap_range)(unsigned long vaddr, int size);
-
 EXPORT_SYMBOL_GPL(__flush_kernel_vmap_range);
+void (*__invalidate_kernel_vmap_range)(unsigned long vaddr, int size);
 
 /* MIPS specific cache operations */
 void (*flush_cache_sigtramp)(unsigned long addr);
index 628ddc22faa8928599553f0b18e748fa4cb06fae..afe1300ab667fa4626a480e467e9375e77fd72a7 100644 (file)
@@ -1,8 +1,7 @@
 #ifndef _ASMPARISC_SHMPARAM_H
 #define _ASMPARISC_SHMPARAM_H
 
-#define __ARCH_FORCE_SHMLBA    1
-
-#define SHMLBA 0x00400000   /* attach addr needs to be 4 Mb aligned */
+#define SHMLBA    PAGE_SIZE    /* attach addr a multiple of this */
+#define SHM_COLOUR 0x00400000  /* shared mappings colouring */
 
 #endif /* _ASMPARISC_SHMPARAM_H */
index a580642555b6f0e7f087ade117ce062cb303d429..348356c99514f0cdfb8876b9f22c0464ab8e3734 100644 (file)
@@ -1,6 +1,8 @@
 # UAPI Header export list
 include include/uapi/asm-generic/Kbuild.asm
 
+generic-y += resource.h
+
 header-y += bitsperlong.h
 header-y += byteorder.h
 header-y += errno.h
@@ -13,7 +15,6 @@ header-y += msgbuf.h
 header-y += pdc.h
 header-y += posix_types.h
 header-y += ptrace.h
-header-y += resource.h
 header-y += sembuf.h
 header-y += setup.h
 header-y += shmbuf.h
diff --git a/arch/parisc/include/uapi/asm/resource.h b/arch/parisc/include/uapi/asm/resource.h
deleted file mode 100644 (file)
index 8b06343..0000000
+++ /dev/null
@@ -1,7 +0,0 @@
-#ifndef _ASM_PARISC_RESOURCE_H
-#define _ASM_PARISC_RESOURCE_H
-
-#define _STK_LIM_MAX   10 * _STK_LIM
-#include <asm-generic/resource.h>
-
-#endif
index a6ffc775a9f8105381b3da46214290a421a79c6c..f6448c7c62b51f3785c758b2073b0eb967362633 100644 (file)
@@ -323,7 +323,8 @@ void flush_dcache_page(struct page *page)
                 * specifically accesses it, of course) */
 
                flush_tlb_page(mpnt, addr);
-               if (old_addr == 0 || (old_addr & (SHMLBA - 1)) != (addr & (SHMLBA - 1))) {
+               if (old_addr == 0 || (old_addr & (SHM_COLOUR - 1))
+                                     != (addr & (SHM_COLOUR - 1))) {
                        __flush_cache_page(mpnt, addr, page_to_phys(page));
                        if (old_addr)
                                printk(KERN_ERR "INEQUIVALENT ALIASES 0x%lx and 0x%lx in file %s\n", old_addr, addr, mpnt->vm_file ? (char *)mpnt->vm_file->f_path.dentry->d_name.name : "(null)");
index b7cadc4a06cdf40c033cff1e2b8c8f83d2a6df3a..31ffa9b5532216620d9a6106d2d4b76e7501ee0b 100644 (file)
@@ -45,7 +45,7 @@
 
 static int get_offset(unsigned int last_mmap)
 {
-       return (last_mmap & (SHMLBA-1)) >> PAGE_SHIFT;
+       return (last_mmap & (SHM_COLOUR-1)) >> PAGE_SHIFT;
 }
 
 static unsigned long shared_align_offset(unsigned int last_mmap,
@@ -57,8 +57,8 @@ static unsigned long shared_align_offset(unsigned int last_mmap,
 static inline unsigned long COLOR_ALIGN(unsigned long addr,
                         unsigned int last_mmap, unsigned long pgoff)
 {
-       unsigned long base = (addr+SHMLBA-1) & ~(SHMLBA-1);
-       unsigned long off  = (SHMLBA-1) &
+       unsigned long base = (addr+SHM_COLOUR-1) & ~(SHM_COLOUR-1);
+       unsigned long off  = (SHM_COLOUR-1) &
                (shared_align_offset(last_mmap, pgoff) << PAGE_SHIFT);
 
        return base + off;
@@ -101,7 +101,7 @@ unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr,
        if (flags & MAP_FIXED) {
                if ((flags & MAP_SHARED) && last_mmap &&
                    (addr - shared_align_offset(last_mmap, pgoff))
-                               & (SHMLBA - 1))
+                               & (SHM_COLOUR - 1))
                        return -EINVAL;
                goto found_addr;
        }
@@ -122,7 +122,7 @@ unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr,
        info.length = len;
        info.low_limit = mm->mmap_legacy_base;
        info.high_limit = mmap_upper_limit();
-       info.align_mask = last_mmap ? (PAGE_MASK & (SHMLBA - 1)) : 0;
+       info.align_mask = last_mmap ? (PAGE_MASK & (SHM_COLOUR - 1)) : 0;
        info.align_offset = shared_align_offset(last_mmap, pgoff);
        addr = vm_unmapped_area(&info);
 
@@ -161,7 +161,7 @@ arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0,
        if (flags & MAP_FIXED) {
                if ((flags & MAP_SHARED) && last_mmap &&
                    (addr - shared_align_offset(last_mmap, pgoff))
-                       & (SHMLBA - 1))
+                       & (SHM_COLOUR - 1))
                        return -EINVAL;
                goto found_addr;
        }
@@ -182,7 +182,7 @@ arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0,
        info.length = len;
        info.low_limit = PAGE_SIZE;
        info.high_limit = mm->mmap_base;
-       info.align_mask = last_mmap ? (PAGE_MASK & (SHMLBA - 1)) : 0;
+       info.align_mask = last_mmap ? (PAGE_MASK & (SHM_COLOUR - 1)) : 0;
        info.align_offset = shared_align_offset(last_mmap, pgoff);
        addr = vm_unmapped_area(&info);
        if (!(addr & ~PAGE_MASK))
index 80e5dd248934e26ca94916c1e1f7c2cd6cffbefd..83ead0ea127d23cdcb10115a5b04d76f40e10612 100644 (file)
        ENTRY_COMP(vmsplice)
        ENTRY_COMP(move_pages)          /* 295 */
        ENTRY_SAME(getcpu)
-       ENTRY_SAME(epoll_pwait)
+       ENTRY_COMP(epoll_pwait)
        ENTRY_COMP(statfs64)
        ENTRY_COMP(fstatfs64)
        ENTRY_COMP(kexec_load)          /* 300 */
index 413dc1769299685f00289193ca301ba7e2c0839d..b2b441b32341acbc473533ecbd24057b8c564eda 100644 (file)
@@ -470,7 +470,7 @@ static unsigned long pa_memcpy(void *dstp, const void *srcp, unsigned long len)
                return 0;
 
        /* if a load or store fault occured we can get the faulty addr */
-       d = &__get_cpu_var(exception_data);
+       d = this_cpu_ptr(&exception_data);
        fault_addr = d->fault_addr;
 
        /* error in load or store? */
index 9d08c71a967ed2e1e86189272369f4b794b8453c..747550762f3ca25acf6dabdfcc7d8aef9de31779 100644 (file)
@@ -151,7 +151,7 @@ int fixup_exception(struct pt_regs *regs)
        fix = search_exception_tables(regs->iaoq[0]);
        if (fix) {
                struct exception_data *d;
-               d = &__get_cpu_var(exception_data);
+               d = this_cpu_ptr(&exception_data);
                d->fault_ip = regs->iaoq[0];
                d->fault_space = regs->isr;
                d->fault_addr = regs->ior;
index a28f02165e97032c8eda569e97b06a4dc81fb0f9..d367a0aece2aac8b067a6c7bf51c43ef3d488eda 100644 (file)
@@ -139,18 +139,18 @@ static struct addr_range prep_initrd(struct addr_range vmlinux, void *chosen,
  * edit the command line passed to vmlinux (by setting /chosen/bootargs).
  * The buffer is put in it's own section so that tools may locate it easier.
  */
-static char cmdline[COMMAND_LINE_SIZE]
+static char cmdline[BOOT_COMMAND_LINE_SIZE]
        __attribute__((__section__("__builtin_cmdline")));
 
 static void prep_cmdline(void *chosen)
 {
        if (cmdline[0] == '\0')
-               getprop(chosen, "bootargs", cmdline, COMMAND_LINE_SIZE-1);
+               getprop(chosen, "bootargs", cmdline, BOOT_COMMAND_LINE_SIZE-1);
 
        printf("\n\rLinux/PowerPC load: %s", cmdline);
        /* If possible, edit the command line */
        if (console_ops.edit_cmdline)
-               console_ops.edit_cmdline(cmdline, COMMAND_LINE_SIZE);
+               console_ops.edit_cmdline(cmdline, BOOT_COMMAND_LINE_SIZE);
        printf("\n\r");
 
        /* Put the command line back into the devtree for the kernel */
@@ -174,7 +174,7 @@ void start(void)
         * built-in command line wasn't set by an external tool */
        if ((loader_info.cmdline_len > 0) && (cmdline[0] == '\0'))
                memmove(cmdline, loader_info.cmdline,
-                       min(loader_info.cmdline_len, COMMAND_LINE_SIZE-1));
+                       min(loader_info.cmdline_len, BOOT_COMMAND_LINE_SIZE-1));
 
        if (console_ops.open && (console_ops.open() < 0))
                exit();
index b3218ce451bb9be8081dd77cc75f0a3114468be1..8aad3c55aeda2885e331b8c7ebd52436c219e74b 100644 (file)
@@ -15,7 +15,7 @@
 #include "types.h"
 #include "string.h"
 
-#define        COMMAND_LINE_SIZE       512
+#define        BOOT_COMMAND_LINE_SIZE  2048
 #define        MAX_PATH_LEN            256
 #define        MAX_PROP_LEN            256 /* What should this be? */
 
index 9954d98871d061dfc9abb8c33fefcbbe00d8d2ea..4ec2d86d3c50571a2a62f27c31f00739595ed219 100644 (file)
@@ -47,13 +47,13 @@ BSS_STACK(4096);
  * The buffer is put in it's own section so that tools may locate it easier.
  */
 
-static char cmdline[COMMAND_LINE_SIZE]
+static char cmdline[BOOT_COMMAND_LINE_SIZE]
        __attribute__((__section__("__builtin_cmdline")));
 
 static void prep_cmdline(void *chosen)
 {
        if (cmdline[0] == '\0')
-               getprop(chosen, "bootargs", cmdline, COMMAND_LINE_SIZE-1);
+               getprop(chosen, "bootargs", cmdline, BOOT_COMMAND_LINE_SIZE-1);
        else
                setprop_str(chosen, "bootargs", cmdline);
 
index a2efdaa020b0f30b11a08b1352b1f9d7388ad3af..66ad7a74116f15dd803ef7e887b7988ac5efa61a 100644 (file)
@@ -41,14 +41,14 @@ struct opal_takeover_args {
  * size except the last one in the list to be as well.
  */
 struct opal_sg_entry {
-       void    *data;
-       long    length;
+       __be64 data;
+       __be64 length;
 };
 
-/* sg list */
+/* SG list */
 struct opal_sg_list {
-       unsigned long num_entries;
-       struct opal_sg_list *next;
+       __be64 length;
+       __be64 next;
        struct opal_sg_entry entry[];
 };
 
@@ -858,8 +858,8 @@ int64_t opal_lpc_write(uint32_t chip_id, enum OpalLPCAddressType addr_type,
 int64_t opal_lpc_read(uint32_t chip_id, enum OpalLPCAddressType addr_type,
                      uint32_t addr, __be32 *data, uint32_t sz);
 
-int64_t opal_read_elog(uint64_t buffer, size_t size, uint64_t log_id);
-int64_t opal_get_elog_size(uint64_t *log_id, size_t *size, uint64_t *elog_type);
+int64_t opal_read_elog(uint64_t buffer, uint64_t size, uint64_t log_id);
+int64_t opal_get_elog_size(__be64 *log_id, __be64 *size, __be64 *elog_type);
 int64_t opal_write_elog(uint64_t buffer, uint64_t size, uint64_t offset);
 int64_t opal_send_ack_elog(uint64_t log_id);
 void opal_resend_pending_logs(void);
@@ -868,23 +868,24 @@ int64_t opal_validate_flash(uint64_t buffer, uint32_t *size, uint32_t *result);
 int64_t opal_manage_flash(uint8_t op);
 int64_t opal_update_flash(uint64_t blk_list);
 int64_t opal_dump_init(uint8_t dump_type);
-int64_t opal_dump_info(uint32_t *dump_id, uint32_t *dump_size);
-int64_t opal_dump_info2(uint32_t *dump_id, uint32_t *dump_size, uint32_t *dump_type);
+int64_t opal_dump_info(__be32 *dump_id, __be32 *dump_size);
+int64_t opal_dump_info2(__be32 *dump_id, __be32 *dump_size, __be32 *dump_type);
 int64_t opal_dump_read(uint32_t dump_id, uint64_t buffer);
 int64_t opal_dump_ack(uint32_t dump_id);
 int64_t opal_dump_resend_notification(void);
 
-int64_t opal_get_msg(uint64_t buffer, size_t size);
-int64_t opal_check_completion(uint64_t buffer, size_t size, uint64_t token);
+int64_t opal_get_msg(uint64_t buffer, uint64_t size);
+int64_t opal_check_completion(uint64_t buffer, uint64_t size, uint64_t token);
 int64_t opal_sync_host_reboot(void);
 int64_t opal_get_param(uint64_t token, uint32_t param_id, uint64_t buffer,
-               size_t length);
+               uint64_t length);
 int64_t opal_set_param(uint64_t token, uint32_t param_id, uint64_t buffer,
-               size_t length);
+               uint64_t length);
 int64_t opal_sensor_read(uint32_t sensor_hndl, int token, __be32 *sensor_data);
 
 /* Internal functions */
-extern int early_init_dt_scan_opal(unsigned long node, const char *uname, int depth, void *data);
+extern int early_init_dt_scan_opal(unsigned long node, const char *uname,
+                                  int depth, void *data);
 extern int early_init_dt_scan_recoverable_ranges(unsigned long node,
                                 const char *uname, int depth, void *data);
 
@@ -893,10 +894,6 @@ extern int opal_put_chars(uint32_t vtermno, const char *buf, int total_len);
 
 extern void hvc_opal_init_early(void);
 
-/* Internal functions */
-extern int early_init_dt_scan_opal(unsigned long node, const char *uname,
-                                  int depth, void *data);
-
 extern int opal_notifier_register(struct notifier_block *nb);
 extern int opal_notifier_unregister(struct notifier_block *nb);
 
@@ -906,9 +903,6 @@ extern void opal_notifier_enable(void);
 extern void opal_notifier_disable(void);
 extern void opal_notifier_update_evt(uint64_t evt_mask, uint64_t evt_val);
 
-extern int opal_get_chars(uint32_t vtermno, char *buf, int count);
-extern int opal_put_chars(uint32_t vtermno, const char *buf, int total_len);
-
 extern int __opal_async_get_token(void);
 extern int opal_async_get_token_interruptible(void);
 extern int __opal_async_release_token(int token);
@@ -916,8 +910,6 @@ extern int opal_async_release_token(int token);
 extern int opal_async_wait_response(uint64_t token, struct opal_msg *msg);
 extern int opal_get_sensor_data(u32 sensor_hndl, u32 *sensor_data);
 
-extern void hvc_opal_init_early(void);
-
 struct rtc_time;
 extern int opal_set_rtc_time(struct rtc_time *tm);
 extern void opal_get_rtc_time(struct rtc_time *tm);
@@ -937,6 +929,10 @@ extern int opal_resync_timebase(void);
 
 extern void opal_lpc_init(void);
 
+struct opal_sg_list *opal_vmalloc_to_sg_list(void *vmalloc_addr,
+                                            unsigned long vmalloc_size);
+void opal_free_sg_list(struct opal_sg_list *sg);
+
 #endif /* __ASSEMBLY__ */
 
 #endif /* __OPAL_H */
index 552df83f1a49627ddd1d49e1ba982c743a5bfefe..ae3fb68cb28e8df5cb53f078ccc5bcc923c8231c 100644 (file)
@@ -1 +1,6 @@
-#include <asm-generic/setup.h>
+#ifndef _UAPI_ASM_POWERPC_SETUP_H
+#define _UAPI_ASM_POWERPC_SETUP_H
+
+#define COMMAND_LINE_SIZE      2048
+
+#endif /* _UAPI_ASM_POWERPC_SETUP_H */
index 2a4779091a5809a42b64d187224dc46da59fa07c..155013da27e05cb801ba961b102d41f3edbfb48d 100644 (file)
@@ -208,7 +208,7 @@ long sys_pciconfig_iobase(long which, unsigned long in_bus,
                          unsigned long in_devfn)
 {
        struct pci_controller* hose;
-       struct pci_bus *bus = NULL;
+       struct pci_bus *tmp_bus, *bus = NULL;
        struct device_node *hose_node;
 
        /* Argh ! Please forgive me for that hack, but that's the
@@ -229,10 +229,12 @@ long sys_pciconfig_iobase(long which, unsigned long in_bus,
         * used on pre-domains setup. We return the first match
         */
 
-       list_for_each_entry(bus, &pci_root_buses, node) {
-               if (in_bus >= bus->number && in_bus <= bus->busn_res.end)
+       list_for_each_entry(tmp_bus, &pci_root_buses, node) {
+               if (in_bus >= tmp_bus->number &&
+                   in_bus <= tmp_bus->busn_res.end) {
+                       bus = tmp_bus;
                        break;
-               bus = NULL;
+               }
        }
        if (bus == NULL || bus->dev.of_node == NULL)
                return -ENODEV;
index 3bd77edd7610ce20267a880069972624eafed62e..450850a49dced7919c3c2d349c2d70aae7cea0ad 100644 (file)
@@ -120,6 +120,7 @@ EXPORT_SYMBOL(giveup_spe);
 EXPORT_SYMBOL(flush_instruction_cache);
 #endif
 EXPORT_SYMBOL(flush_dcache_range);
+EXPORT_SYMBOL(flush_icache_range);
 
 #ifdef CONFIG_SMP
 #ifdef CONFIG_PPC32
index 2f3cdb01506de3d7791712ecd6ffeaf1fcd36352..658e89d2025b0b2dd65bb812d2c89d65867c1015 100644 (file)
@@ -705,7 +705,7 @@ static int __init rtas_flash_init(void)
        if (rtas_token("ibm,update-flash-64-and-reboot") ==
                       RTAS_UNKNOWN_SERVICE) {
                pr_info("rtas_flash: no firmware flash support\n");
-               return 1;
+               return -EINVAL;
        }
 
        rtas_validate_flash_data.buf = kzalloc(VALIDATE_BUF_SIZE, GFP_KERNEL);
index ffbb871c2bd803827fa5a78658f29d2fa8a1dbd6..b031f932c0cc3dcc0c452c88f8ba2c3c88cf641d 100644 (file)
@@ -242,6 +242,12 @@ kvm_novcpu_exit:
  */
        .globl  kvm_start_guest
 kvm_start_guest:
+
+       /* Set runlatch bit the minute you wake up from nap */
+       mfspr   r1, SPRN_CTRLF
+       ori     r1, r1, 1
+       mtspr   SPRN_CTRLT, r1
+
        ld      r2,PACATOC(r13)
 
        li      r0,KVM_HWTHREAD_IN_KVM
@@ -309,6 +315,11 @@ kvm_no_guest:
        li      r0, KVM_HWTHREAD_IN_NAP
        stb     r0, HSTATE_HWTHREAD_STATE(r13)
 kvm_do_nap:
+       /* Clear the runlatch bit before napping */
+       mfspr   r2, SPRN_CTRLF
+       clrrdi  r2, r2, 1
+       mtspr   SPRN_CTRLT, r2
+
        li      r3, LPCR_PECE0
        mfspr   r4, SPRN_LPCR
        rlwimi  r4, r3, 0, LPCR_PECE0 | LPCR_PECE1
@@ -1999,8 +2010,13 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_206)
 
        /*
         * Take a nap until a decrementer or external or doobell interrupt
-        * occurs, with PECE1, PECE0 and PECEDP set in LPCR
+        * occurs, with PECE1, PECE0 and PECEDP set in LPCR. Also clear the
+        * runlatch bit before napping.
         */
+       mfspr   r2, SPRN_CTRLF
+       clrrdi  r2, r2, 1
+       mtspr   SPRN_CTRLT, r2
+
        li      r0,1
        stb     r0,HSTATE_HWTHREAD_REQ(r13)
        mfspr   r5,SPRN_LPCR
index 3ea26c25590be1dabe4a057882f35b77f5dfe7c1..cf1d325eae8be814953650cf6b94fd349c0fdd12 100644 (file)
@@ -82,17 +82,14 @@ static inline void __tlbie(unsigned long vpn, int psize, int apsize, int ssize)
                va &= ~((1ul << mmu_psize_defs[apsize].shift) - 1);
                va |= penc << 12;
                va |= ssize << 8;
-               /* Add AVAL part */
-               if (psize != apsize) {
-                       /*
-                        * MPSS, 64K base page size and 16MB parge page size
-                        * We don't need all the bits, but rest of the bits
-                        * must be ignored by the processor.
-                        * vpn cover upto 65 bits of va. (0...65) and we need
-                        * 58..64 bits of va.
-                        */
-                       va |= (vpn & 0xfe);
-               }
+               /*
+                * AVAL bits:
+                * We don't need all the bits, but rest of the bits
+                * must be ignored by the processor.
+                * vpn cover upto 65 bits of va. (0...65) and we need
+                * 58..64 bits of va.
+                */
+               va |= (vpn & 0xfe); /* AVAL */
                va |= 1; /* L */
                asm volatile(ASM_FTR_IFCLR("tlbie %0,1", PPC_TLBIE(%1,%0), %2)
                             : : "r" (va), "r"(0), "i" (CPU_FTR_ARCH_206)
@@ -133,17 +130,14 @@ static inline void __tlbiel(unsigned long vpn, int psize, int apsize, int ssize)
                va &= ~((1ul << mmu_psize_defs[apsize].shift) - 1);
                va |= penc << 12;
                va |= ssize << 8;
-               /* Add AVAL part */
-               if (psize != apsize) {
-                       /*
-                        * MPSS, 64K base page size and 16MB parge page size
-                        * We don't need all the bits, but rest of the bits
-                        * must be ignored by the processor.
-                        * vpn cover upto 65 bits of va. (0...65) and we need
-                        * 58..64 bits of va.
-                        */
-                       va |= (vpn & 0xfe);
-               }
+               /*
+                * AVAL bits:
+                * We don't need all the bits, but rest of the bits
+                * must be ignored by the processor.
+                * vpn cover upto 65 bits of va. (0...65) and we need
+                * 58..64 bits of va.
+                */
+               va |= (vpn & 0xfe);
                va |= 1; /* L */
                asm volatile(".long 0x7c000224 | (%0 << 11) | (1 << 21)"
                             : : "r"(va) : "memory");
index 4ebbb9e99286e4f663c979197620bba64f6f04b7..3b181b22cd469b1990305a95c8164340f5441c7c 100644 (file)
@@ -232,6 +232,7 @@ int __node_distance(int a, int b)
 
        return distance;
 }
+EXPORT_SYMBOL(__node_distance);
 
 static void initialize_distance_lookup_table(int nid,
                const __be32 *associativity)
index 297c9105141365e81316a888176fe80611b5b08a..e0766b82e1656721ff9e93586b47552414936973 100644 (file)
@@ -155,16 +155,28 @@ static ssize_t read_offset_data(void *dest, size_t dest_len,
        return copy_len;
 }
 
-static unsigned long h_get_24x7_catalog_page(char page[static 4096],
-                                            u32 version, u32 index)
+static unsigned long h_get_24x7_catalog_page_(unsigned long phys_4096,
+                                             unsigned long version,
+                                             unsigned long index)
 {
-       WARN_ON(!IS_ALIGNED((unsigned long)page, 4096));
+       pr_devel("h_get_24x7_catalog_page(0x%lx, %lu, %lu)",
+                       phys_4096,
+                       version,
+                       index);
+       WARN_ON(!IS_ALIGNED(phys_4096, 4096));
        return plpar_hcall_norets(H_GET_24X7_CATALOG_PAGE,
-                       virt_to_phys(page),
+                       phys_4096,
                        version,
                        index);
 }
 
+static unsigned long h_get_24x7_catalog_page(char page[],
+                                            u64 version, u32 index)
+{
+       return h_get_24x7_catalog_page_(virt_to_phys(page),
+                                       version, index);
+}
+
 static ssize_t catalog_read(struct file *filp, struct kobject *kobj,
                            struct bin_attribute *bin_attr, char *buf,
                            loff_t offset, size_t count)
@@ -173,7 +185,7 @@ static ssize_t catalog_read(struct file *filp, struct kobject *kobj,
        ssize_t ret = 0;
        size_t catalog_len = 0, catalog_page_len = 0, page_count = 0;
        loff_t page_offset = 0;
-       uint32_t catalog_version_num = 0;
+       uint64_t catalog_version_num = 0;
        void *page = kmem_cache_alloc(hv_page_cache, GFP_USER);
        struct hv_24x7_catalog_page_0 *page_0 = page;
        if (!page)
@@ -185,7 +197,7 @@ static ssize_t catalog_read(struct file *filp, struct kobject *kobj,
                goto e_free;
        }
 
-       catalog_version_num = be32_to_cpu(page_0->version);
+       catalog_version_num = be64_to_cpu(page_0->version);
        catalog_page_len = be32_to_cpu(page_0->length);
        catalog_len = catalog_page_len * 4096;
 
@@ -208,8 +220,9 @@ static ssize_t catalog_read(struct file *filp, struct kobject *kobj,
                                page, 4096, page_offset * 4096);
 e_free:
        if (hret)
-               pr_err("h_get_24x7_catalog_page(ver=%d, page=%lld) failed: rc=%ld\n",
-                               catalog_version_num, page_offset, hret);
+               pr_err("h_get_24x7_catalog_page(ver=%lld, page=%lld) failed:"
+                      " rc=%ld\n",
+                      catalog_version_num, page_offset, hret);
        kfree(page);
 
        pr_devel("catalog_read: offset=%lld(%lld) count=%zu(%zu) catalog_len=%zu(%zu) => %zd\n",
@@ -243,7 +256,7 @@ e_free:                                                             \
 static DEVICE_ATTR_RO(_name)
 
 PAGE_0_ATTR(catalog_version, "%lld\n",
-               (unsigned long long)be32_to_cpu(page_0->version));
+               (unsigned long long)be64_to_cpu(page_0->version));
 PAGE_0_ATTR(catalog_len, "%lld\n",
                (unsigned long long)be32_to_cpu(page_0->length) * 4096);
 static BIN_ATTR_RO(catalog, 0/* real length varies */);
@@ -485,13 +498,13 @@ static int hv_24x7_init(void)
        struct hv_perf_caps caps;
 
        if (!firmware_has_feature(FW_FEATURE_LPAR)) {
-               pr_info("not a virtualized system, not enabling\n");
+               pr_debug("not a virtualized system, not enabling\n");
                return -ENODEV;
        }
 
        hret = hv_perf_caps_get(&caps);
        if (hret) {
-               pr_info("could not obtain capabilities, error 0x%80lx, not enabling\n",
+               pr_debug("could not obtain capabilities, not enabling, rc=%ld\n",
                                hret);
                return -ENODEV;
        }
index 278ba7b9c2b525287f930445e71e04bd538e3236..c9d399a2df82e6727fa78b4de69fb867cc85552f 100644 (file)
@@ -78,7 +78,7 @@ static ssize_t kernel_version_show(struct device *dev,
        return sprintf(page, "0x%x\n", COUNTER_INFO_VERSION_CURRENT);
 }
 
-DEVICE_ATTR_RO(kernel_version);
+static DEVICE_ATTR_RO(kernel_version);
 HV_CAPS_ATTR(version, "0x%x\n");
 HV_CAPS_ATTR(ga, "%d\n");
 HV_CAPS_ATTR(expanded, "%d\n");
@@ -273,13 +273,13 @@ static int hv_gpci_init(void)
        struct hv_perf_caps caps;
 
        if (!firmware_has_feature(FW_FEATURE_LPAR)) {
-               pr_info("not a virtualized system, not enabling\n");
+               pr_debug("not a virtualized system, not enabling\n");
                return -ENODEV;
        }
 
        hret = hv_perf_caps_get(&caps);
        if (hret) {
-               pr_info("could not obtain capabilities, error 0x%80lx, not enabling\n",
+               pr_debug("could not obtain capabilities, not enabling, rc=%ld\n",
                                hret);
                return -ENODEV;
        }
index b9827b0d87e4cd69cdff9f51216ea9429c79fb41..788a1977b9a5203cc9a477be6f9a2a7b71cdd754 100644 (file)
@@ -209,89 +209,20 @@ static struct kobj_type dump_ktype = {
        .default_attrs = dump_default_attrs,
 };
 
-static void free_dump_sg_list(struct opal_sg_list *list)
-{
-       struct opal_sg_list *sg1;
-       while (list) {
-               sg1 = list->next;
-               kfree(list);
-               list = sg1;
-       }
-       list = NULL;
-}
-
-static struct opal_sg_list *dump_data_to_sglist(struct dump_obj *dump)
-{
-       struct opal_sg_list *sg1, *list = NULL;
-       void *addr;
-       int64_t size;
-
-       addr = dump->buffer;
-       size = dump->size;
-
-       sg1 = kzalloc(PAGE_SIZE, GFP_KERNEL);
-       if (!sg1)
-               goto nomem;
-
-       list = sg1;
-       sg1->num_entries = 0;
-       while (size > 0) {
-               /* Translate virtual address to physical address */
-               sg1->entry[sg1->num_entries].data =
-                       (void *)(vmalloc_to_pfn(addr) << PAGE_SHIFT);
-
-               if (size > PAGE_SIZE)
-                       sg1->entry[sg1->num_entries].length = PAGE_SIZE;
-               else
-                       sg1->entry[sg1->num_entries].length = size;
-
-               sg1->num_entries++;
-               if (sg1->num_entries >= SG_ENTRIES_PER_NODE) {
-                       sg1->next = kzalloc(PAGE_SIZE, GFP_KERNEL);
-                       if (!sg1->next)
-                               goto nomem;
-
-                       sg1 = sg1->next;
-                       sg1->num_entries = 0;
-               }
-               addr += PAGE_SIZE;
-               size -= PAGE_SIZE;
-       }
-       return list;
-
-nomem:
-       pr_err("%s : Failed to allocate memory\n", __func__);
-       free_dump_sg_list(list);
-       return NULL;
-}
-
-static void sglist_to_phy_addr(struct opal_sg_list *list)
-{
-       struct opal_sg_list *sg, *next;
-
-       for (sg = list; sg; sg = next) {
-               next = sg->next;
-               /* Don't translate NULL pointer for last entry */
-               if (sg->next)
-                       sg->next = (struct opal_sg_list *)__pa(sg->next);
-               else
-                       sg->next = NULL;
-
-               /* Convert num_entries to length */
-               sg->num_entries =
-                       sg->num_entries * sizeof(struct opal_sg_entry) + 16;
-       }
-}
-
-static int64_t dump_read_info(uint32_t *id, uint32_t *size, uint32_t *type)
+static int64_t dump_read_info(uint32_t *dump_id, uint32_t *dump_size, uint32_t *dump_type)
 {
+       __be32 id, size, type;
        int rc;
-       *type = 0xffffffff;
 
-       rc = opal_dump_info2(id, size, type);
+       type = cpu_to_be32(0xffffffff);
 
+       rc = opal_dump_info2(&id, &size, &type);
        if (rc == OPAL_PARAMETER)
-               rc = opal_dump_info(id, size);
+               rc = opal_dump_info(&id, &size);
+
+       *dump_id = be32_to_cpu(id);
+       *dump_size = be32_to_cpu(size);
+       *dump_type = be32_to_cpu(type);
 
        if (rc)
                pr_warn("%s: Failed to get dump info (%d)\n",
@@ -314,15 +245,12 @@ static int64_t dump_read_data(struct dump_obj *dump)
        }
 
        /* Generate SG list */
-       list = dump_data_to_sglist(dump);
+       list = opal_vmalloc_to_sg_list(dump->buffer, dump->size);
        if (!list) {
                rc = -ENOMEM;
                goto out;
        }
 
-       /* Translate sg list addr to real address */
-       sglist_to_phy_addr(list);
-
        /* First entry address */
        addr = __pa(list);
 
@@ -341,7 +269,7 @@ static int64_t dump_read_data(struct dump_obj *dump)
                        __func__, dump->id);
 
        /* Free SG list */
-       free_dump_sg_list(list);
+       opal_free_sg_list(list);
 
 out:
        return rc;
index ef7bc2a978627422d659d783ea21f0869975df53..10268c41d8302dd39ed73f4e0ad98dd6deb5e25f 100644 (file)
@@ -238,18 +238,25 @@ static struct elog_obj *create_elog_obj(uint64_t id, size_t size, uint64_t type)
 
 static void elog_work_fn(struct work_struct *work)
 {
-       size_t elog_size;
+       __be64 size;
+       __be64 id;
+       __be64 type;
+       uint64_t elog_size;
        uint64_t log_id;
        uint64_t elog_type;
        int rc;
        char name[2+16+1];
 
-       rc = opal_get_elog_size(&log_id, &elog_size, &elog_type);
+       rc = opal_get_elog_size(&id, &size, &type);
        if (rc != OPAL_SUCCESS) {
                pr_err("ELOG: Opal log read failed\n");
                return;
        }
 
+       elog_size = be64_to_cpu(size);
+       log_id = be64_to_cpu(id);
+       elog_type = be64_to_cpu(type);
+
        BUG_ON(elog_size > OPAL_MAX_ERRLOG_SIZE);
 
        if (elog_size >= OPAL_MAX_ERRLOG_SIZE)
index 714ef972406bcacf66a4a896283c6fb25963ca16..dc487ff0470401b0613b28958ff102dbcc5103e1 100644 (file)
@@ -79,9 +79,6 @@
 /* XXX: Assume candidate image size is <= 1GB */
 #define MAX_IMAGE_SIZE 0x40000000
 
-/* Flash sg list version */
-#define SG_LIST_VERSION (1UL)
-
 /* Image status */
 enum {
        IMAGE_INVALID,
@@ -131,11 +128,15 @@ static DEFINE_MUTEX(image_data_mutex);
  */
 static inline void opal_flash_validate(void)
 {
-       struct validate_flash_t *args_buf = &validate_flash_data;
+       long ret;
+       void *buf = validate_flash_data.buf;
+       __be32 size, result;
 
-       args_buf->status = opal_validate_flash(__pa(args_buf->buf),
-                                              &(args_buf->buf_size),
-                                              &(args_buf->result));
+       ret = opal_validate_flash(__pa(buf), &size, &result);
+
+       validate_flash_data.status = ret;
+       validate_flash_data.buf_size = be32_to_cpu(size);
+       validate_flash_data.result = be32_to_cpu(result);
 }
 
 /*
@@ -267,94 +268,12 @@ static ssize_t manage_store(struct kobject *kobj,
        return count;
 }
 
-/*
- * Free sg list
- */
-static void free_sg_list(struct opal_sg_list *list)
-{
-       struct opal_sg_list *sg1;
-       while (list) {
-               sg1 = list->next;
-               kfree(list);
-               list = sg1;
-       }
-       list = NULL;
-}
-
-/*
- * Build candidate image scatter gather list
- *
- * list format:
- *   -----------------------------------
- *  |  VER (8) | Entry length in bytes  |
- *   -----------------------------------
- *  |  Pointer to next entry            |
- *   -----------------------------------
- *  |  Address of memory area 1         |
- *   -----------------------------------
- *  |  Length of memory area 1          |
- *   -----------------------------------
- *  |   .........                       |
- *   -----------------------------------
- *  |   .........                       |
- *   -----------------------------------
- *  |  Address of memory area N         |
- *   -----------------------------------
- *  |  Length of memory area N          |
- *   -----------------------------------
- */
-static struct opal_sg_list *image_data_to_sglist(void)
-{
-       struct opal_sg_list *sg1, *list = NULL;
-       void *addr;
-       int size;
-
-       addr = image_data.data;
-       size = image_data.size;
-
-       sg1 = kzalloc(PAGE_SIZE, GFP_KERNEL);
-       if (!sg1)
-               return NULL;
-
-       list = sg1;
-       sg1->num_entries = 0;
-       while (size > 0) {
-               /* Translate virtual address to physical address */
-               sg1->entry[sg1->num_entries].data =
-                       (void *)(vmalloc_to_pfn(addr) << PAGE_SHIFT);
-
-               if (size > PAGE_SIZE)
-                       sg1->entry[sg1->num_entries].length = PAGE_SIZE;
-               else
-                       sg1->entry[sg1->num_entries].length = size;
-
-               sg1->num_entries++;
-               if (sg1->num_entries >= SG_ENTRIES_PER_NODE) {
-                       sg1->next = kzalloc(PAGE_SIZE, GFP_KERNEL);
-                       if (!sg1->next) {
-                               pr_err("%s : Failed to allocate memory\n",
-                                      __func__);
-                               goto nomem;
-                       }
-
-                       sg1 = sg1->next;
-                       sg1->num_entries = 0;
-               }
-               addr += PAGE_SIZE;
-               size -= PAGE_SIZE;
-       }
-       return list;
-nomem:
-       free_sg_list(list);
-       return NULL;
-}
-
 /*
  * OPAL update flash
  */
 static int opal_flash_update(int op)
 {
-       struct opal_sg_list *sg, *list, *next;
+       struct opal_sg_list *list;
        unsigned long addr;
        int64_t rc = OPAL_PARAMETER;
 
@@ -364,30 +283,13 @@ static int opal_flash_update(int op)
                goto flash;
        }
 
-       list = image_data_to_sglist();
+       list = opal_vmalloc_to_sg_list(image_data.data, image_data.size);
        if (!list)
                goto invalid_img;
 
        /* First entry address */
        addr = __pa(list);
 
-       /* Translate sg list address to absolute */
-       for (sg = list; sg; sg = next) {
-               next = sg->next;
-               /* Don't translate NULL pointer for last entry */
-               if (sg->next)
-                       sg->next = (struct opal_sg_list *)__pa(sg->next);
-               else
-                       sg->next = NULL;
-
-               /*
-                * Convert num_entries to version/length format
-                * to satisfy OPAL.
-                */
-               sg->num_entries = (SG_LIST_VERSION << 56) |
-                       (sg->num_entries * sizeof(struct opal_sg_entry) + 16);
-       }
-
        pr_alert("FLASH: Image is %u bytes\n", image_data.size);
        pr_alert("FLASH: Image update requested\n");
        pr_alert("FLASH: Image will be updated during system reboot\n");
index 6b614726baf2add5f95237647f128c5c7119e173..d202f9bc3683f5ad0072282173ddfb510b1aec9a 100644 (file)
@@ -39,10 +39,11 @@ struct param_attr {
        struct kobj_attribute kobj_attr;
 };
 
-static int opal_get_sys_param(u32 param_id, u32 length, void *buffer)
+static ssize_t opal_get_sys_param(u32 param_id, u32 length, void *buffer)
 {
        struct opal_msg msg;
-       int ret, token;
+       ssize_t ret;
+       int token;
 
        token = opal_async_get_token_interruptible();
        if (token < 0) {
@@ -59,7 +60,7 @@ static int opal_get_sys_param(u32 param_id, u32 length, void *buffer)
 
        ret = opal_async_wait_response(token, &msg);
        if (ret) {
-               pr_err("%s: Failed to wait for the async response, %d\n",
+               pr_err("%s: Failed to wait for the async response, %zd\n",
                                __func__, ret);
                goto out_token;
        }
@@ -111,7 +112,7 @@ static ssize_t sys_param_show(struct kobject *kobj,
 {
        struct param_attr *attr = container_of(kobj_attr, struct param_attr,
                        kobj_attr);
-       int ret;
+       ssize_t ret;
 
        mutex_lock(&opal_sysparam_mutex);
        ret = opal_get_sys_param(attr->param_id, attr->param_size,
@@ -121,9 +122,10 @@ static ssize_t sys_param_show(struct kobject *kobj,
 
        memcpy(buf, param_data_buf, attr->param_size);
 
+       ret = attr->param_size;
 out:
        mutex_unlock(&opal_sysparam_mutex);
-       return ret ? ret : attr->param_size;
+       return ret;
 }
 
 static ssize_t sys_param_store(struct kobject *kobj,
@@ -131,14 +133,20 @@ static ssize_t sys_param_store(struct kobject *kobj,
 {
        struct param_attr *attr = container_of(kobj_attr, struct param_attr,
                        kobj_attr);
-       int ret;
+       ssize_t ret;
+
+        /* MAX_PARAM_DATA_LEN is sizeof(param_data_buf) */
+        if (count > MAX_PARAM_DATA_LEN)
+                count = MAX_PARAM_DATA_LEN;
 
        mutex_lock(&opal_sysparam_mutex);
        memcpy(param_data_buf, buf, count);
        ret = opal_set_sys_param(attr->param_id, attr->param_size,
                        param_data_buf);
        mutex_unlock(&opal_sysparam_mutex);
-       return ret ? ret : count;
+       if (!ret)
+               ret = count;
+       return ret;
 }
 
 void __init opal_sys_param_init(void)
@@ -214,13 +222,13 @@ void __init opal_sys_param_init(void)
        }
 
        if (of_property_read_u32_array(sysparam, "param-len", size, count)) {
-               pr_err("SYSPARAM: Missing propery param-len in the DT\n");
+               pr_err("SYSPARAM: Missing property param-len in the DT\n");
                goto out_free_perm;
        }
 
 
        if (of_property_read_u8_array(sysparam, "param-perm", perm, count)) {
-               pr_err("SYSPARAM: Missing propery param-perm in the DT\n");
+               pr_err("SYSPARAM: Missing property param-perm in the DT\n");
                goto out_free_perm;
        }
 
@@ -233,6 +241,12 @@ void __init opal_sys_param_init(void)
 
        /* For each of the parameters, populate the parameter attributes */
        for (i = 0; i < count; i++) {
+               if (size[i] > MAX_PARAM_DATA_LEN) {
+                       pr_warn("SYSPARAM: Not creating parameter %d as size "
+                               "exceeds buffer length\n", i);
+                       continue;
+               }
+
                sysfs_attr_init(&attr[i].kobj_attr.attr);
                attr[i].param_id = id[i];
                attr[i].param_size = size[i];
index 49d2f00019e5d8092f7f32e9b3c6dfc53cceeee6..360ad80c754ce3c97ad9b9fead5ad4806e5f6666 100644 (file)
@@ -242,14 +242,14 @@ void opal_notifier_update_evt(uint64_t evt_mask,
 void opal_notifier_enable(void)
 {
        int64_t rc;
-       uint64_t evt = 0;
+       __be64 evt = 0;
 
        atomic_set(&opal_notifier_hold, 0);
 
        /* Process pending events */
        rc = opal_poll_events(&evt);
        if (rc == OPAL_SUCCESS && evt)
-               opal_do_notifier(evt);
+               opal_do_notifier(be64_to_cpu(evt));
 }
 
 void opal_notifier_disable(void)
@@ -529,7 +529,7 @@ static irqreturn_t opal_interrupt(int irq, void *data)
 
        opal_handle_interrupt(virq_to_hw(irq), &events);
 
-       opal_do_notifier(events);
+       opal_do_notifier(be64_to_cpu(events));
 
        return IRQ_HANDLED;
 }
@@ -638,3 +638,66 @@ void opal_shutdown(void)
 
 /* Export this so that test modules can use it */
 EXPORT_SYMBOL_GPL(opal_invalid_call);
+
+/* Convert a region of vmalloc memory to an opal sg list */
+struct opal_sg_list *opal_vmalloc_to_sg_list(void *vmalloc_addr,
+                                            unsigned long vmalloc_size)
+{
+       struct opal_sg_list *sg, *first = NULL;
+       unsigned long i = 0;
+
+       sg = kzalloc(PAGE_SIZE, GFP_KERNEL);
+       if (!sg)
+               goto nomem;
+
+       first = sg;
+
+       while (vmalloc_size > 0) {
+               uint64_t data = vmalloc_to_pfn(vmalloc_addr) << PAGE_SHIFT;
+               uint64_t length = min(vmalloc_size, PAGE_SIZE);
+
+               sg->entry[i].data = cpu_to_be64(data);
+               sg->entry[i].length = cpu_to_be64(length);
+               i++;
+
+               if (i >= SG_ENTRIES_PER_NODE) {
+                       struct opal_sg_list *next;
+
+                       next = kzalloc(PAGE_SIZE, GFP_KERNEL);
+                       if (!next)
+                               goto nomem;
+
+                       sg->length = cpu_to_be64(
+                                       i * sizeof(struct opal_sg_entry) + 16);
+                       i = 0;
+                       sg->next = cpu_to_be64(__pa(next));
+                       sg = next;
+               }
+
+               vmalloc_addr += length;
+               vmalloc_size -= length;
+       }
+
+       sg->length = cpu_to_be64(i * sizeof(struct opal_sg_entry) + 16);
+
+       return first;
+
+nomem:
+       pr_err("%s : Failed to allocate memory\n", __func__);
+       opal_free_sg_list(first);
+       return NULL;
+}
+
+void opal_free_sg_list(struct opal_sg_list *sg)
+{
+       while (sg) {
+               uint64_t next = be64_to_cpu(sg->next);
+
+               kfree(sg);
+
+               if (next)
+                       sg = __va(next);
+               else
+                       sg = NULL;
+       }
+}
index 3b2b4fb3585b6b9fac45878041772285591d1d63..98824aa991731882cca87f806f464198f356ff26 100644 (file)
@@ -343,7 +343,6 @@ static void pnv_ioda_setup_same_PE(struct pci_bus *bus, struct pnv_ioda_pe *pe)
                                pci_name(dev));
                        continue;
                }
-               pci_dev_get(dev);
                pdn->pcidev = dev;
                pdn->pe_number = pe->pe_number;
                pe->dma_weight += pnv_ioda_dma_weight(dev);
@@ -462,7 +461,7 @@ static void pnv_pci_ioda_dma_dev_setup(struct pnv_phb *phb, struct pci_dev *pdev
 
        pe = &phb->ioda.pe_array[pdn->pe_number];
        WARN_ON(get_dma_ops(&pdev->dev) != &dma_iommu_ops);
-       set_iommu_table_base_and_group(&pdev->dev, &pe->tce32_table);
+       set_iommu_table_base(&pdev->dev, &pe->tce32_table);
 }
 
 static int pnv_pci_ioda_dma_set_mask(struct pnv_phb *phb,
index 61cf8fa9c61b50489009b94c99c993fffaddde28..8723d32632f55b6eb49b25d55711140f60a95fe7 100644 (file)
@@ -162,18 +162,62 @@ static void pnv_shutdown(void)
 }
 
 #ifdef CONFIG_KEXEC
+static void pnv_kexec_wait_secondaries_down(void)
+{
+       int my_cpu, i, notified = -1;
+
+       my_cpu = get_cpu();
+
+       for_each_online_cpu(i) {
+               uint8_t status;
+               int64_t rc;
+
+               if (i == my_cpu)
+                       continue;
+
+               for (;;) {
+                       rc = opal_query_cpu_status(get_hard_smp_processor_id(i),
+                                                  &status);
+                       if (rc != OPAL_SUCCESS || status != OPAL_THREAD_STARTED)
+                               break;
+                       barrier();
+                       if (i != notified) {
+                               printk(KERN_INFO "kexec: waiting for cpu %d "
+                                      "(physical %d) to enter OPAL\n",
+                                      i, paca[i].hw_cpu_id);
+                               notified = i;
+                       }
+               }
+       }
+}
+
 static void pnv_kexec_cpu_down(int crash_shutdown, int secondary)
 {
        xics_kexec_teardown_cpu(secondary);
 
-       /* Return secondary CPUs to firmware on OPAL v3 */
-       if (firmware_has_feature(FW_FEATURE_OPALv3) && secondary) {
+       /* On OPAL v3, we return all CPUs to firmware */
+
+       if (!firmware_has_feature(FW_FEATURE_OPALv3))
+               return;
+
+       if (secondary) {
+               /* Return secondary CPUs to firmware on OPAL v3 */
                mb();
                get_paca()->kexec_state = KEXEC_STATE_REAL_MODE;
                mb();
 
                /* Return the CPU to OPAL */
                opal_return_cpu();
+       } else if (crash_shutdown) {
+               /*
+                * On crash, we don't wait for secondaries to go
+                * down as they might be unreachable or hung, so
+                * instead we just wait a bit and move on.
+                */
+               mdelay(1);
+       } else {
+               /* Primary waits for the secondaries to have reached OPAL */
+               pnv_kexec_wait_secondaries_down();
        }
 }
 #endif /* CONFIG_KEXEC */
index 908672bdcea6b2c77d75763a05d10f476e2b2d75..bf5fcd452168c6056492115c0232b40f25a2e407 100644 (file)
@@ -30,6 +30,7 @@
 #include <asm/cputhreads.h>
 #include <asm/xics.h>
 #include <asm/opal.h>
+#include <asm/runlatch.h>
 
 #include "powernv.h"
 
@@ -156,7 +157,9 @@ static void pnv_smp_cpu_kill_self(void)
         */
        mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1);
        while (!generic_check_cpu_restart(cpu)) {
+               ppc64_runlatch_off();
                power7_nap();
+               ppc64_runlatch_on();
                if (!generic_check_cpu_restart(cpu)) {
                        DBG("CPU%d Unexpected exit while offline !\n", cpu);
                        /* We may be getting an IPI, so we re-enable
index 9b8e05078a63e73a2993cc89890793353a45f9ea..20d62975856fb7fa5795a566629bbb69aa7a3139 100644 (file)
@@ -88,13 +88,14 @@ void set_default_offline_state(int cpu)
 
 static void rtas_stop_self(void)
 {
-       struct rtas_args args = {
-               .token = cpu_to_be32(rtas_stop_self_token),
+       static struct rtas_args args = {
                .nargs = 0,
                .nret = 1,
                .rets = &args.args[0],
        };
 
+       args.token = cpu_to_be32(rtas_stop_self_token);
+
        local_irq_disable();
 
        BUG_ON(rtas_stop_self_token == RTAS_UNKNOWN_SERVICE);
index 573b488fc48b8a9b79674806d27599993c96b362..7f75c94af822c40322d8a4a751e983ad0e2bcdae 100644 (file)
@@ -100,10 +100,10 @@ static int pseries_remove_memblock(unsigned long base, unsigned int memblock_siz
 
        start_pfn = base >> PAGE_SHIFT;
 
-       if (!pfn_valid(start_pfn)) {
-               memblock_remove(base, memblock_size);
-               return 0;
-       }
+       lock_device_hotplug();
+
+       if (!pfn_valid(start_pfn))
+               goto out;
 
        block_sz = memory_block_size_bytes();
        sections_per_block = block_sz / MIN_MEMORY_BLOCK_SIZE;
@@ -114,8 +114,10 @@ static int pseries_remove_memblock(unsigned long base, unsigned int memblock_siz
                base += MIN_MEMORY_BLOCK_SIZE;
        }
 
+out:
        /* Update memory regions for memory remove */
        memblock_remove(base, memblock_size);
+       unlock_device_hotplug();
        return 0;
 }
 
index 64603a10b86313aace9d570494fcd86853357253..4914fd3f41eca710778ceaee742f29fee5137faf 100644 (file)
@@ -1058,7 +1058,7 @@ static int __init apm821xx_pciex_core_init(struct device_node *np)
        return 1;
 }
 
-static int apm821xx_pciex_init_port_hw(struct ppc4xx_pciex_port *port)
+static int __init apm821xx_pciex_init_port_hw(struct ppc4xx_pciex_port *port)
 {
        u32 val;
 
index 6e670f88d125d79fd2108575a6f6509e74985678..ebc2913f9ee0bd29f1a8594da675a279d38c8640 100644 (file)
@@ -22,8 +22,8 @@ struct ccwgroup_device {
 /* public: */
        unsigned int count;
        struct device   dev;
-       struct ccw_device *cdev[0];
        struct work_struct ungroup_work;
+       struct ccw_device *cdev[0];
 };
 
 /**
index d091aa1aaf118e6ab3767c863d2813e84e99c077..bf9c823d4020ec2549aecba28996a08d9d69fdc4 100644 (file)
 #define SIGP_STATUS_INCORRECT_STATE    0x00000200UL
 #define SIGP_STATUS_NOT_RUNNING                0x00000400UL
 
+#ifndef __ASSEMBLY__
+
+static inline int __pcpu_sigp(u16 addr, u8 order, u32 parm, u32 *status)
+{
+       register unsigned int reg1 asm ("1") = parm;
+       int cc;
+
+       asm volatile(
+               "       sigp    %1,%2,0(%3)\n"
+               "       ipm     %0\n"
+               "       srl     %0,28\n"
+               : "=d" (cc), "+d" (reg1) : "d" (addr), "a" (order) : "cc");
+       if (status && cc == 1)
+               *status = reg1;
+       return cc;
+}
+
+#endif /* __ASSEMBLY__ */
+
 #endif /* __S390_ASM_SIGP_H */
index 16077939409622fc946b943f4556d91cc272211c..21703f85b48d8d0c1c1c229791a2cfe1dc9294d8 100644 (file)
@@ -7,6 +7,8 @@
 #ifndef __ASM_SMP_H
 #define __ASM_SMP_H
 
+#include <asm/sigp.h>
+
 #ifdef CONFIG_SMP
 
 #include <asm/lowcore.h>
@@ -50,9 +52,18 @@ static inline int smp_store_status(int cpu) { return 0; }
 static inline int smp_vcpu_scheduled(int cpu) { return 1; }
 static inline void smp_yield_cpu(int cpu) { }
 static inline void smp_yield(void) { }
-static inline void smp_stop_cpu(void) { }
 static inline void smp_fill_possible_mask(void) { }
 
+static inline void smp_stop_cpu(void)
+{
+       u16 pcpu = stap();
+
+       for (;;) {
+               __pcpu_sigp(pcpu, SIGP_STOP, 0, NULL);
+               cpu_relax();
+       }
+}
+
 #endif /* CONFIG_SMP */
 
 #ifdef CONFIG_HOTPLUG_CPU
index c544b6f05d95e8e6fee2ef5b5f6f24d7acaf19d8..a25f09fbaf3634f4d71ebdf8fa84ca116a07fe4f 100644 (file)
@@ -59,12 +59,23 @@ static inline void tlb_gather_mmu(struct mmu_gather *tlb,
        tlb->batch = NULL;
 }
 
-static inline void tlb_flush_mmu(struct mmu_gather *tlb)
+static inline void tlb_flush_mmu_tlbonly(struct mmu_gather *tlb)
 {
        __tlb_flush_mm_lazy(tlb->mm);
+}
+
+static inline void tlb_flush_mmu_free(struct mmu_gather *tlb)
+{
        tlb_table_flush(tlb);
 }
 
+
+static inline void tlb_flush_mmu(struct mmu_gather *tlb)
+{
+       tlb_flush_mmu_tlbonly(tlb);
+       tlb_flush_mmu_free(tlb);
+}
+
 static inline void tlb_finish_mmu(struct mmu_gather *tlb,
                                  unsigned long start, unsigned long end)
 {
index 5eb5c9ddb120027df003990329a0b7ede4cbfa59..3802d2d3a18d7cf4abf5604d6f66e01b6e34424d 100644 (file)
 #define __NR_finit_module      344
 #define __NR_sched_setattr     345
 #define __NR_sched_getattr     346
-#define NR_syscalls 345
+#define __NR_renameat2         347
+#define NR_syscalls 348
 
 /* 
  * There are some system calls that are not present on 64 bit, some
index 824c39dfddfc98ddb952ea7b03193b671e1fa0f0..45cdb37aa6f812813c69d08102e4e1f521e5df1f 100644 (file)
@@ -1,5 +1,5 @@
 /*
- *  Compat sytem call wrappers.
+ *  Compat system call wrappers.
  *
  *    Copyright IBM Corp. 2014
  */
@@ -213,3 +213,4 @@ COMPAT_SYSCALL_WRAP5(kcmp, pid_t, pid1, pid_t, pid2, int, type, unsigned long, i
 COMPAT_SYSCALL_WRAP3(finit_module, int, fd, const char __user *, uargs, int, flags);
 COMPAT_SYSCALL_WRAP3(sched_setattr, pid_t, pid, struct sched_attr __user *, attr, unsigned int, flags);
 COMPAT_SYSCALL_WRAP4(sched_getattr, pid_t, pid, struct sched_attr __user *, attr, unsigned int, size, unsigned int, flags);
+COMPAT_SYSCALL_WRAP5(renameat2, int, olddfd, const char __user *, oldname, int, newdfd, const char __user *, newname, unsigned int, flags);
index e6af9406987c9982689e5f500612f14d49c1b0b0..acb412442e5e95d36039371b5143012d75b9436c 100644 (file)
@@ -144,10 +144,10 @@ void show_registers(struct pt_regs *regs)
        char *mode;
 
        mode = user_mode(regs) ? "User" : "Krnl";
-       printk("%s PSW : %p %p (%pSR)\n",
-              mode, (void *) regs->psw.mask,
-              (void *) regs->psw.addr,
-              (void *) regs->psw.addr);
+       printk("%s PSW : %p %p", mode, (void *)regs->psw.mask, (void *)regs->psw.addr);
+       if (!user_mode(regs))
+               printk(" (%pSR)", (void *)regs->psw.addr);
+       printk("\n");
        printk("           R:%x T:%x IO:%x EX:%x Key:%x M:%x W:%x "
               "P:%x AS:%x CC:%x PM:%x", mask_bits(regs, PSW_MASK_PER),
               mask_bits(regs, PSW_MASK_DAT), mask_bits(regs, PSW_MASK_IO),
index 4ac8fafec95fa87d0b680c6222ac3c9e9f06700a..1c82619eb4f768343f8a9c20f8f30a00ba7370fd 100644 (file)
@@ -64,7 +64,7 @@ void update_cr_regs(struct task_struct *task)
                if (task->thread.per_flags & PER_FLAG_NO_TE)
                        cr_new &= ~(1UL << 55);
                if (cr_new != cr)
-                       __ctl_load(cr, 0, 0);
+                       __ctl_load(cr_new, 0, 0);
                /* Set or clear transaction execution TDC bits 62 and 63. */
                __ctl_store(cr, 2, 2);
                cr_new = cr & ~3UL;
index f70f2489fa5fe241fd107596d2879d0fe331f7bc..88d1ca81e2dd7fc5ac74fc31c4b0eca47aec754f 100644 (file)
@@ -1027,3 +1027,35 @@ void __init setup_arch(char **cmdline_p)
        /* Setup zfcpdump support */
        setup_zfcpdump();
 }
+
+#ifdef CONFIG_32BIT
+static int no_removal_warning __initdata;
+
+static int __init parse_no_removal_warning(char *str)
+{
+       no_removal_warning = 1;
+       return 0;
+}
+__setup("no_removal_warning", parse_no_removal_warning);
+
+static int __init removal_warning(void)
+{
+       if (no_removal_warning)
+               return 0;
+       printk(KERN_ALERT "\n\n");
+       printk(KERN_CONT "Warning - you are using a 31 bit kernel!\n\n");
+       printk(KERN_CONT "We plan to remove 31 bit kernel support from the kernel sources in March 2015.\n");
+       printk(KERN_CONT "Currently we assume that nobody is using the 31 bit kernel on old 31 bit\n");
+       printk(KERN_CONT "hardware anymore. If you think that the code should not be removed and also\n");
+       printk(KERN_CONT "future versions of the Linux kernel should be able to run in 31 bit mode\n");
+       printk(KERN_CONT "please let us know. Please write to:\n");
+       printk(KERN_CONT "linux390@de.ibm.com (mail address) and/or\n");
+       printk(KERN_CONT "linux-s390@vger.kernel.org (mailing list).\n\n");
+       printk(KERN_CONT "Thank you!\n\n");
+       printk(KERN_CONT "If this kernel runs on a 64 bit machine you may consider using a 64 bit kernel.\n");
+       printk(KERN_CONT "This message can be disabled with the \"no_removal_warning\" kernel parameter.\n");
+       schedule_timeout_uninterruptible(300 * HZ);
+       return 0;
+}
+early_initcall(removal_warning);
+#endif
index 512ce1cde2a4ca03c88350db6520581436968ba9..86e65ec3422b9585a9281b7204bcfce24181f10d 100644 (file)
@@ -82,21 +82,6 @@ DEFINE_MUTEX(smp_cpu_state_mutex);
 /*
  * Signal processor helper functions.
  */
-static inline int __pcpu_sigp(u16 addr, u8 order, u32 parm, u32 *status)
-{
-       register unsigned int reg1 asm ("1") = parm;
-       int cc;
-
-       asm volatile(
-               "       sigp    %1,%2,0(%3)\n"
-               "       ipm     %0\n"
-               "       srl     %0,28\n"
-               : "=d" (cc), "+d" (reg1) : "d" (addr), "a" (order) : "cc");
-       if (status && cc == 1)
-               *status = reg1;
-       return cc;
-}
-
 static inline int __pcpu_sigp_relax(u16 addr, u8 order, u32 parm, u32 *status)
 {
        int cc;
index 542ef488bac176fb0b3a1efed9e34e2e2af0c730..fe5cdf29a001be0e52fd0436bbbabd3603d37f66 100644 (file)
@@ -355,3 +355,4 @@ SYSCALL(sys_kcmp,sys_kcmp,compat_sys_kcmp)
 SYSCALL(sys_finit_module,sys_finit_module,compat_sys_finit_module)
 SYSCALL(sys_sched_setattr,sys_sched_setattr,compat_sys_sched_setattr) /* 345 */
 SYSCALL(sys_sched_getattr,sys_sched_getattr,compat_sys_sched_getattr)
+SYSCALL(sys_renameat2,sys_renameat2,compat_sys_renameat2)
index 23f866b4c7f1f3564747c8e1251ea3a05bae420d..7416efe8eae419c1249cf60c8f60dc268d1487cc 100644 (file)
@@ -338,9 +338,6 @@ static inline unsigned long strnlen_user_srst(const char __user *src,
        register unsigned long reg0 asm("0") = 0;
        unsigned long tmp1, tmp2;
 
-       if (unlikely(!size))
-               return 0;
-       update_primary_asce(current);
        asm volatile(
                "   la    %2,0(%1)\n"
                "   la    %3,0(%0,%1)\n"
@@ -359,6 +356,8 @@ static inline unsigned long strnlen_user_srst(const char __user *src,
 
 unsigned long __strnlen_user(const char __user *src, unsigned long size)
 {
+       if (unlikely(!size))
+               return 0;
        update_primary_asce(current);
        return strnlen_user_srst(src, size);
 }
index 19f623f1f21c4134fc5f6a803d60b4a8d47f3b32..2f51a998a67e383b1ab50c0d08985109bd7e3e51 100644 (file)
@@ -126,6 +126,133 @@ static inline int user_space_fault(struct pt_regs *regs)
        return 0;
 }
 
+static int bad_address(void *p)
+{
+       unsigned long dummy;
+
+       return probe_kernel_address((unsigned long *)p, dummy);
+}
+
+#ifdef CONFIG_64BIT
+static void dump_pagetable(unsigned long asce, unsigned long address)
+{
+       unsigned long *table = __va(asce & PAGE_MASK);
+
+       pr_alert("AS:%016lx ", asce);
+       switch (asce & _ASCE_TYPE_MASK) {
+       case _ASCE_TYPE_REGION1:
+               table = table + ((address >> 53) & 0x7ff);
+               if (bad_address(table))
+                       goto bad;
+               pr_cont("R1:%016lx ", *table);
+               if (*table & _REGION_ENTRY_INVALID)
+                       goto out;
+               table = (unsigned long *)(*table & _REGION_ENTRY_ORIGIN);
+               /* fallthrough */
+       case _ASCE_TYPE_REGION2:
+               table = table + ((address >> 42) & 0x7ff);
+               if (bad_address(table))
+                       goto bad;
+               pr_cont("R2:%016lx ", *table);
+               if (*table & _REGION_ENTRY_INVALID)
+                       goto out;
+               table = (unsigned long *)(*table & _REGION_ENTRY_ORIGIN);
+               /* fallthrough */
+       case _ASCE_TYPE_REGION3:
+               table = table + ((address >> 31) & 0x7ff);
+               if (bad_address(table))
+                       goto bad;
+               pr_cont("R3:%016lx ", *table);
+               if (*table & (_REGION_ENTRY_INVALID | _REGION3_ENTRY_LARGE))
+                       goto out;
+               table = (unsigned long *)(*table & _REGION_ENTRY_ORIGIN);
+               /* fallthrough */
+       case _ASCE_TYPE_SEGMENT:
+               table = table + ((address >> 20) & 0x7ff);
+               if (bad_address(table))
+                       goto bad;
+               pr_cont(KERN_CONT "S:%016lx ", *table);
+               if (*table & (_SEGMENT_ENTRY_INVALID | _SEGMENT_ENTRY_LARGE))
+                       goto out;
+               table = (unsigned long *)(*table & _SEGMENT_ENTRY_ORIGIN);
+       }
+       table = table + ((address >> 12) & 0xff);
+       if (bad_address(table))
+               goto bad;
+       pr_cont("P:%016lx ", *table);
+out:
+       pr_cont("\n");
+       return;
+bad:
+       pr_cont("BAD\n");
+}
+
+#else /* CONFIG_64BIT */
+
+static void dump_pagetable(unsigned long asce, unsigned long address)
+{
+       unsigned long *table = __va(asce & PAGE_MASK);
+
+       pr_alert("AS:%08lx ", asce);
+       table = table + ((address >> 20) & 0x7ff);
+       if (bad_address(table))
+               goto bad;
+       pr_cont("S:%08lx ", *table);
+       if (*table & _SEGMENT_ENTRY_INVALID)
+               goto out;
+       table = (unsigned long *)(*table & _SEGMENT_ENTRY_ORIGIN);
+       table = table + ((address >> 12) & 0xff);
+       if (bad_address(table))
+               goto bad;
+       pr_cont("P:%08lx ", *table);
+out:
+       pr_cont("\n");
+       return;
+bad:
+       pr_cont("BAD\n");
+}
+
+#endif /* CONFIG_64BIT */
+
+static void dump_fault_info(struct pt_regs *regs)
+{
+       unsigned long asce;
+
+       pr_alert("Fault in ");
+       switch (regs->int_parm_long & 3) {
+       case 3:
+               pr_cont("home space ");
+               break;
+       case 2:
+               pr_cont("secondary space ");
+               break;
+       case 1:
+               pr_cont("access register ");
+               break;
+       case 0:
+               pr_cont("primary space ");
+               break;
+       }
+       pr_cont("mode while using ");
+       if (!user_space_fault(regs)) {
+               asce = S390_lowcore.kernel_asce;
+               pr_cont("kernel ");
+       }
+#ifdef CONFIG_PGSTE
+       else if ((current->flags & PF_VCPU) && S390_lowcore.gmap) {
+               struct gmap *gmap = (struct gmap *)S390_lowcore.gmap;
+               asce = gmap->asce;
+               pr_cont("gmap ");
+       }
+#endif
+       else {
+               asce = S390_lowcore.user_asce;
+               pr_cont("user ");
+       }
+       pr_cont("ASCE.\n");
+       dump_pagetable(asce, regs->int_parm_long & __FAIL_ADDR_MASK);
+}
+
 static inline void report_user_fault(struct pt_regs *regs, long signr)
 {
        if ((task_pid_nr(current) > 1) && !show_unhandled_signals)
@@ -138,8 +265,9 @@ static inline void report_user_fault(struct pt_regs *regs, long signr)
               regs->int_code);
        print_vma_addr(KERN_CONT "in ", regs->psw.addr & PSW_ADDR_INSN);
        printk(KERN_CONT "\n");
-       printk(KERN_ALERT "failing address: %lX\n",
-              regs->int_parm_long & __FAIL_ADDR_MASK);
+       printk(KERN_ALERT "failing address: %016lx TEID: %016lx\n",
+              regs->int_parm_long & __FAIL_ADDR_MASK, regs->int_parm_long);
+       dump_fault_info(regs);
        show_regs(regs);
 }
 
@@ -177,11 +305,13 @@ static noinline void do_no_context(struct pt_regs *regs)
        address = regs->int_parm_long & __FAIL_ADDR_MASK;
        if (!user_space_fault(regs))
                printk(KERN_ALERT "Unable to handle kernel pointer dereference"
-                      " at virtual kernel address %p\n", (void *)address);
+                      " in virtual kernel address space\n");
        else
                printk(KERN_ALERT "Unable to handle kernel paging request"
-                      " at virtual user address %p\n", (void *)address);
-
+                      " in virtual user address space\n");
+       printk(KERN_ALERT "failing address: %016lx TEID: %016lx\n",
+              regs->int_parm_long & __FAIL_ADDR_MASK, regs->int_parm_long);
+       dump_fault_info(regs);
        die(regs, "Oops");
        do_exit(SIGKILL);
 }
index 9c36dc398f9070afb4d6151d214623d1cbcf9f4a..452d3ebd9d0fba3b513a6978b096bd22b27c1b46 100644 (file)
@@ -276,7 +276,6 @@ static void bpf_jit_noleaks(struct bpf_jit *jit, struct sock_filter *filter)
        case BPF_S_LD_W_IND:
        case BPF_S_LD_H_IND:
        case BPF_S_LD_B_IND:
-       case BPF_S_LDX_B_MSH:
        case BPF_S_LD_IMM:
        case BPF_S_LD_MEM:
        case BPF_S_MISC_TXA:
index 362192ed12fef1789d2c23d21c654f19632006a0..62f80d2a9df9f35c22b761b58cc7d8d747a689f4 100644 (file)
@@ -86,6 +86,14 @@ tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
        }
 }
 
+static inline void tlb_flush_mmu_tlbonly(struct mmu_gather *tlb)
+{
+}
+
+static inline void tlb_flush_mmu_free(struct mmu_gather *tlb)
+{
+}
+
 static inline void tlb_flush_mmu(struct mmu_gather *tlb)
 {
 }
index 29b0301c18aab26f2a613d397da9856a8d1eec3b..16eb63fac57de1395bc70507c3616f64af68ab4f 100644 (file)
@@ -58,14 +58,26 @@ tlb_gather_mmu(struct mmu_gather *tlb, struct mm_struct *mm, unsigned long start
 extern void flush_tlb_mm_range(struct mm_struct *mm, unsigned long start,
                               unsigned long end);
 
+static inline void
+tlb_flush_mmu_tlbonly(struct mmu_gather *tlb)
+{
+       flush_tlb_mm_range(tlb->mm, tlb->start, tlb->end);
+}
+
+static inline void
+tlb_flush_mmu_free(struct mmu_gather *tlb)
+{
+       init_tlb_gather(tlb);
+}
+
 static inline void
 tlb_flush_mmu(struct mmu_gather *tlb)
 {
        if (!tlb->need_flush)
                return;
 
-       flush_tlb_mm_range(tlb->mm, tlb->start, tlb->end);
-       init_tlb_gather(tlb);
+       tlb_flush_mmu_tlbonly(tlb);
+       tlb_flush_mmu_free(tlb);
 }
 
 /* tlb_finish_mmu
index 75298d3358e7f3d2c7ff4e2b2c5ed8b81a8dca6d..08eec0b691b061ade61d8f9df7258ea4bee49f42 100644 (file)
@@ -136,6 +136,7 @@ extern int os_ioctl_generic(int fd, unsigned int cmd, unsigned long arg);
 extern int os_get_ifname(int fd, char *namebuf);
 extern int os_set_slip(int fd);
 extern int os_mode_fd(int fd, int mode);
+extern int os_fsync_file(int fd);
 
 extern int os_seek_file(int fd, unsigned long long offset);
 extern int os_open_file(const char *file, struct openflags flags, int mode);
index f116db15d4028217767f2a7f51dc0bba38b151a9..30fdd5d0067b26c91fb8c831da5a1d4008c79e22 100644 (file)
@@ -103,6 +103,7 @@ void __init setup_physmem(unsigned long start, unsigned long reserve_end,
         */
        os_seek_file(physmem_fd, __pa(&__syscall_stub_start));
        os_write_file(physmem_fd, &__syscall_stub_start, PAGE_SIZE);
+       os_fsync_file(physmem_fd);
 
        bootmap_size = init_bootmem(pfn, pfn + delta);
        free_bootmem(__pa(reserve_end) + bootmap_size,
index 07a750197bb09d3b5ce59b631aed874d58603386..08d90fba952c3e1ba07e0fa488012aa26a6b473c 100644 (file)
@@ -237,6 +237,12 @@ void os_close_file(int fd)
 {
        close(fd);
 }
+int os_fsync_file(int fd)
+{
+       if (fsync(fd) < 0)
+           return -errno;
+       return 0;
+}
 
 int os_seek_file(int fd, unsigned long long offset)
 {
index e1704ff600ff9e677a98a4711d5c8b7b2ff8cf6a..df9191acd926cfb3b5a0c3582549105ac0729d5a 100644 (file)
@@ -151,6 +151,7 @@ int __init main(int argc, char **argv, char **envp)
 #endif
 
        do_uml_initcalls();
+       change_sig(SIGPIPE, 0);
        ret = linux_main(argc, argv);
 
        /*
index 3c4af77e51a2f9047ad603fe1032334111d08e9f..897e9ad0c108ed7ef70571628ed2fde039109508 100644 (file)
 #include <string.h>
 #include <sys/stat.h>
 #include <sys/mman.h>
-#include <sys/param.h>
+#include <sys/vfs.h>
+#include <linux/magic.h>
 #include <init.h>
 #include <os.h>
 
-/* Modified by which_tmpdir, which is called during early boot */
-static char *default_tmpdir = "/tmp";
-
-/*
- *  Modified when creating the physical memory file and when checking
- * the tmp filesystem for usability, both happening during early boot.
- */
+/* Set by make_tempfile() during early boot. */
 static char *tempdir = NULL;
 
-static void __init find_tempdir(void)
+/* Check if dir is on tmpfs. Return 0 if yes, -1 if no or error. */
+static int __init check_tmpfs(const char *dir)
 {
-       const char *dirs[] = { "TMP", "TEMP", "TMPDIR", NULL };
-       int i;
-       char *dir = NULL;
-
-       if (tempdir != NULL)
-               /* We've already been called */
-               return;
-       for (i = 0; dirs[i]; i++) {
-               dir = getenv(dirs[i]);
-               if ((dir != NULL) && (*dir != '\0'))
-                       break;
-       }
-       if ((dir == NULL) || (*dir == '\0'))
-               dir = default_tmpdir;
+       struct statfs st;
 
-       tempdir = malloc(strlen(dir) + 2);
-       if (tempdir == NULL) {
-               fprintf(stderr, "Failed to malloc tempdir, "
-                       "errno = %d\n", errno);
-               return;
-       }
-       strcpy(tempdir, dir);
-       strcat(tempdir, "/");
-}
-
-/*
- * Remove bytes from the front of the buffer and refill it so that if there's a
- * partial string that we care about, it will be completed, and we can recognize
- * it.
- */
-static int pop(int fd, char *buf, size_t size, size_t npop)
-{
-       ssize_t n;
-       size_t len = strlen(&buf[npop]);
-
-       memmove(buf, &buf[npop], len + 1);
-       n = read(fd, &buf[len], size - len - 1);
-       if (n < 0)
-               return -errno;
-
-       buf[len + n] = '\0';
-       return 1;
-}
-
-/*
- * This will return 1, with the first character in buf being the
- * character following the next instance of c in the file.  This will
- * read the file as needed.  If there's an error, -errno is returned;
- * if the end of the file is reached, 0 is returned.
- */
-static int next(int fd, char *buf, size_t size, char c)
-{
-       ssize_t n;
-       char *ptr;
-
-       while ((ptr = strchr(buf, c)) == NULL) {
-               n = read(fd, buf, size - 1);
-               if (n == 0)
-                       return 0;
-               else if (n < 0)
-                       return -errno;
-
-               buf[n] = '\0';
+       printf("Checking if %s is on tmpfs...", dir);
+       if (statfs(dir, &st) < 0) {
+               printf("%s\n", strerror(errno));
+       } else if (st.f_type != TMPFS_MAGIC) {
+               printf("no\n");
+       } else {
+               printf("OK\n");
+               return 0;
        }
-
-       return pop(fd, buf, size, ptr - buf + 1);
+       return -1;
 }
 
 /*
- * Decode an octal-escaped and space-terminated path of the form used by
- * /proc/mounts. May be used to decode a path in-place. "out" must be at least
- * as large as the input. The output is always null-terminated. "len" gets the
- * length of the output, excluding the trailing null. Returns 0 if a full path
- * was successfully decoded, otherwise an error.
+ * Choose the tempdir to use. We want something on tmpfs so that our memory is
+ * not subject to the host's vm.dirty_ratio. If a tempdir is specified in the
+ * environment, we use that even if it's not on tmpfs, but we warn the user.
+ * Otherwise, we try common tmpfs locations, and if no tmpfs directory is found
+ * then we fall back to /tmp.
  */
-static int decode_path(const char *in, char *out, size_t *len)
+static char * __init choose_tempdir(void)
 {
-       char *first = out;
-       int c;
+       static const char * const vars[] = {
+               "TMPDIR",
+               "TMP",
+               "TEMP",
+               NULL
+       };
+       static const char fallback_dir[] = "/tmp";
+       static const char * const tmpfs_dirs[] = {
+               "/dev/shm",
+               fallback_dir,
+               NULL
+       };
        int i;
-       int ret = -EINVAL;
-       while (1) {
-               switch (*in) {
-               case '\0':
-                       goto out;
-
-               case ' ':
-                       ret = 0;
-                       goto out;
-
-               case '\\':
-                       in++;
-                       c = 0;
-                       for (i = 0; i < 3; i++) {
-                               if (*in < '0' || *in > '7')
-                                       goto out;
-                               c = (c << 3) | (*in++ - '0');
-                       }
-                       *(unsigned char *)out++ = (unsigned char) c;
-                       break;
-
-               default:
-                       *out++ = *in++;
-                       break;
+       const char *dir;
+
+       printf("Checking environment variables for a tempdir...");
+       for (i = 0; vars[i]; i++) {
+               dir = getenv(vars[i]);
+               if ((dir != NULL) && (*dir != '\0')) {
+                       printf("%s\n", dir);
+                       if (check_tmpfs(dir) >= 0)
+                               goto done;
+                       else
+                               goto warn;
                }
        }
+       printf("none found\n");
 
-out:
-       *out = '\0';
-       *len = out - first;
-       return ret;
-}
-
-/*
- * Computes the length of s when encoded with three-digit octal escape sequences
- * for the characters in chars.
- */
-static size_t octal_encoded_length(const char *s, const char *chars)
-{
-       size_t len = strlen(s);
-       while ((s = strpbrk(s, chars)) != NULL) {
-               len += 3;
-               s++;
-       }
-
-       return len;
-}
-
-enum {
-       OUTCOME_NOTHING_MOUNTED,
-       OUTCOME_TMPFS_MOUNT,
-       OUTCOME_NON_TMPFS_MOUNT,
-};
-
-/* Read a line of /proc/mounts data looking for a tmpfs mount at "path". */
-static int read_mount(int fd, char *buf, size_t bufsize, const char *path,
-                     int *outcome)
-{
-       int found;
-       int match;
-       char *space;
-       size_t len;
-
-       enum {
-               MATCH_NONE,
-               MATCH_EXACT,
-               MATCH_PARENT,
-       };
-
-       found = next(fd, buf, bufsize, ' ');
-       if (found != 1)
-               return found;
-
-       /*
-        * If there's no following space in the buffer, then this path is
-        * truncated, so it can't be the one we're looking for.
-        */
-       space = strchr(buf, ' ');
-       if (space) {
-               match = MATCH_NONE;
-               if (!decode_path(buf, buf, &len)) {
-                       if (!strcmp(buf, path))
-                               match = MATCH_EXACT;
-                       else if (!strncmp(buf, path, len)
-                                && (path[len] == '/' || !strcmp(buf, "/")))
-                               match = MATCH_PARENT;
-               }
-
-               found = pop(fd, buf, bufsize, space - buf + 1);
-               if (found != 1)
-                       return found;
-
-               switch (match) {
-               case MATCH_EXACT:
-                       if (!strncmp(buf, "tmpfs", strlen("tmpfs")))
-                               *outcome = OUTCOME_TMPFS_MOUNT;
-                       else
-                               *outcome = OUTCOME_NON_TMPFS_MOUNT;
-                       break;
-
-               case MATCH_PARENT:
-                       /* This mount obscures any previous ones. */
-                       *outcome = OUTCOME_NOTHING_MOUNTED;
-                       break;
-               }
+       for (i = 0; tmpfs_dirs[i]; i++) {
+               dir = tmpfs_dirs[i];
+               if (check_tmpfs(dir) >= 0)
+                       goto done;
        }
 
-       return next(fd, buf, bufsize, '\n');
+       dir = fallback_dir;
+warn:
+       printf("Warning: tempdir %s is not on tmpfs\n", dir);
+done:
+       /* Make a copy since getenv results may not remain valid forever. */
+       return strdup(dir);
 }
 
-/* which_tmpdir is called only during early boot */
-static int checked_tmpdir = 0;
-
 /*
- * Look for a tmpfs mounted at /dev/shm.  I couldn't find a cleaner
- * way to do this than to parse /proc/mounts.  statfs will return the
- * same filesystem magic number and fs id for both /dev and /dev/shm
- * when they are both tmpfs, so you can't tell if they are different
- * filesystems.  Also, there seems to be no other way of finding the
- * mount point of a filesystem from within it.
- *
- * If a /dev/shm tmpfs entry is found, then we switch to using it.
- * Otherwise, we stay with the default /tmp.
+ * Create an unlinked tempfile in a suitable tempdir. template must be the
+ * basename part of the template with a leading '/'.
  */
-static void which_tmpdir(void)
+static int __init make_tempfile(const char *template)
 {
+       char *tempname;
        int fd;
-       int found;
-       int outcome;
-       char *path;
-       char *buf;
-       size_t bufsize;
 
-       if (checked_tmpdir)
-               return;
-
-       checked_tmpdir = 1;
-
-       printf("Checking for tmpfs mount on /dev/shm...");
-
-       path = realpath("/dev/shm", NULL);
-       if (!path) {
-               printf("failed to check real path, errno = %d\n", errno);
-               return;
-       }
-       printf("%s...", path);
-
-       /*
-        * The buffer needs to be able to fit the full octal-escaped path, a
-        * space, and a trailing null in order to successfully decode it.
-        */
-       bufsize = octal_encoded_length(path, " \t\n\\") + 2;
-
-       if (bufsize < 128)
-               bufsize = 128;
-
-       buf = malloc(bufsize);
-       if (!buf) {
-               printf("malloc failed, errno = %d\n", errno);
-               goto out;
-       }
-       buf[0] = '\0';
-
-       fd = open("/proc/mounts", O_RDONLY);
-       if (fd < 0) {
-               printf("failed to open /proc/mounts, errno = %d\n", errno);
-               goto out1;
-       }
-
-       outcome = OUTCOME_NOTHING_MOUNTED;
-       while (1) {
-               found = read_mount(fd, buf, bufsize, path, &outcome);
-               if (found != 1)
-                       break;
-       }
-
-       if (found < 0) {
-               printf("read returned errno %d\n", -found);
-       } else {
-               switch (outcome) {
-               case OUTCOME_TMPFS_MOUNT:
-                       printf("OK\n");
-                       default_tmpdir = "/dev/shm";
-                       break;
-
-               case OUTCOME_NON_TMPFS_MOUNT:
-                       printf("not tmpfs\n");
-                       break;
-
-               default:
-                       printf("nothing mounted on /dev/shm\n");
-                       break;
+       if (tempdir == NULL) {
+               tempdir = choose_tempdir();
+               if (tempdir == NULL) {
+                       fprintf(stderr, "Failed to choose tempdir: %s\n",
+                               strerror(errno));
+                       return -1;
                }
        }
 
-       close(fd);
-out1:
-       free(buf);
-out:
-       free(path);
-}
-
-static int __init make_tempfile(const char *template, char **out_tempname,
-                               int do_unlink)
-{
-       char *tempname;
-       int fd;
-
-       which_tmpdir();
-       tempname = malloc(MAXPATHLEN);
+       tempname = malloc(strlen(tempdir) + strlen(template) + 1);
        if (tempname == NULL)
                return -1;
 
-       find_tempdir();
-       if ((tempdir == NULL) || (strlen(tempdir) >= MAXPATHLEN))
-               goto out;
-
-       if (template[0] != '/')
-               strcpy(tempname, tempdir);
-       else
-               tempname[0] = '\0';
-       strncat(tempname, template, MAXPATHLEN-1-strlen(tempname));
+       strcpy(tempname, tempdir);
+       strcat(tempname, template);
        fd = mkstemp(tempname);
        if (fd < 0) {
                fprintf(stderr, "open - cannot create %s: %s\n", tempname,
                        strerror(errno));
                goto out;
        }
-       if (do_unlink && (unlink(tempname) < 0)) {
+       if (unlink(tempname) < 0) {
                perror("unlink");
                goto close;
        }
-       if (out_tempname) {
-               *out_tempname = tempname;
-       } else
-               free(tempname);
+       free(tempname);
        return fd;
 close:
        close(fd);
@@ -351,14 +131,14 @@ out:
        return -1;
 }
 
-#define TEMPNAME_TEMPLATE "vm_file-XXXXXX"
+#define TEMPNAME_TEMPLATE "/vm_file-XXXXXX"
 
 static int __init create_tmp_file(unsigned long long len)
 {
        int fd, err;
        char zero;
 
-       fd = make_tempfile(TEMPNAME_TEMPLATE, NULL, 1);
+       fd = make_tempfile(TEMPNAME_TEMPLATE);
        if (fd < 0)
                exit(1);
 
@@ -402,7 +182,6 @@ int __init create_mem_file(unsigned long long len)
        return fd;
 }
 
-
 void __init check_tmpexec(void)
 {
        void *addr;
@@ -410,14 +189,13 @@ void __init check_tmpexec(void)
 
        addr = mmap(NULL, UM_KERN_PAGE_SIZE,
                    PROT_READ | PROT_WRITE | PROT_EXEC, MAP_PRIVATE, fd, 0);
-       printf("Checking PROT_EXEC mmap in %s...",tempdir);
-       fflush(stdout);
+       printf("Checking PROT_EXEC mmap in %s...", tempdir);
        if (addr == MAP_FAILED) {
                err = errno;
-               perror("failed");
+               printf("%s\n", strerror(err));
                close(fd);
                if (err == EPERM)
-                       printf("%s must be not mounted noexec\n",tempdir);
+                       printf("%s must be not mounted noexec\n", tempdir);
                exit(1);
        }
        printf("OK\n");
index 602f57e590b57fafd8dcf461c9a5468842d9c29e..ce6ad7e6a7d7c7ba743884bbee2bcf77262f814d 100644 (file)
@@ -83,7 +83,9 @@ else
         KBUILD_CFLAGS += -m64
 
         # Don't autogenerate traditional x87, MMX or SSE instructions
-        KBUILD_CFLAGS += -mno-mmx -mno-sse -mno-80387 -mno-fp-ret-in-387
+        KBUILD_CFLAGS += -mno-mmx -mno-sse
+        KBUILD_CFLAGS += $(call cc-option,-mno-80387)
+        KBUILD_CFLAGS += $(call cc-option,-mno-fp-ret-in-387)
 
        # Use -mpreferred-stack-boundary=3 if supported.
        KBUILD_CFLAGS += $(call cc-option,-mpreferred-stack-boundary=3)
@@ -250,8 +252,8 @@ archclean:
 PHONY += kvmconfig
 kvmconfig:
        $(if $(wildcard $(objtree)/.config),, $(error You need an existing .config for this target))
-       $(Q)$(CONFIG_SHELL) $(srctree)/scripts/kconfig/merge_config.sh -m -O $(objtree) $(objtree)/.config arch/x86/configs/kvm_guest.config
-       $(Q)yes "" | $(MAKE) oldconfig
+       $(Q)$(CONFIG_SHELL) $(srctree)/scripts/kconfig/merge_config.sh -m -O $(objtree) $(objtree)/.config $(srctree)/arch/x86/configs/kvm_guest.config
+       $(Q)yes "" | $(MAKE) -f $(srctree)/Makefile oldconfig
 
 define archhelp
   echo  '* bzImage      - Compressed kernel image (arch/x86/boot/bzImage)'
index fcaf9c961265c8ac6c78c9a8734f7cf3a0c6ae1b..7de069afb382e4d3f43febb087ac21979b28d087 100644 (file)
@@ -60,7 +60,7 @@
                          | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
                          | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
                          | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
-                         | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
+                         | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE | X86_CR4_SMAP))
 
 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
 
index 6ad4658de7056e02f104b505f35910587ec712f3..d23aa82e7a7bc25c702be004f804a0c9d02c15f7 100644 (file)
@@ -3425,6 +3425,11 @@ int get_nr_irqs_gsi(void)
        return nr_irqs_gsi;
 }
 
+unsigned int arch_dynirq_lower_bound(unsigned int from)
+{
+       return from < nr_irqs_gsi ? nr_irqs_gsi : from;
+}
+
 int __init arch_probe_nr_irqs(void)
 {
        int nr;
index eeee23ff75ef8ddb28a002d26b5bee98b21e03ca..68317c80de7f65723c3f909762c6204629ef562d 100644 (file)
@@ -598,7 +598,6 @@ void machine_check_poll(enum mcp_flags flags, mce_banks_t *b)
 {
        struct mce m;
        int i;
-       unsigned long *v;
 
        this_cpu_inc(mce_poll_count);
 
@@ -618,8 +617,7 @@ void machine_check_poll(enum mcp_flags flags, mce_banks_t *b)
                if (!(m.status & MCI_STATUS_VAL))
                        continue;
 
-               v = &get_cpu_var(mce_polled_error);
-               set_bit(0, v);
+               this_cpu_write(mce_polled_error, 1);
                /*
                 * Uncorrected or signalled events are handled by the exception
                 * handler when it is enabled, so don't process those here.
index 3bdb95ae8c430fa8bacc76a9f644c4abce8ec35e..9a316b21df8bd4df741a2507513f5879712a2dee 100644 (file)
@@ -42,7 +42,7 @@ static DEFINE_PER_CPU(mce_banks_t, mce_banks_owned);
  * cmci_discover_lock protects against parallel discovery attempts
  * which could race against each other.
  */
-static DEFINE_RAW_SPINLOCK(cmci_discover_lock);
+static DEFINE_SPINLOCK(cmci_discover_lock);
 
 #define CMCI_THRESHOLD         1
 #define CMCI_POLL_INTERVAL     (30 * HZ)
@@ -144,14 +144,14 @@ static void cmci_storm_disable_banks(void)
        int bank;
        u64 val;
 
-       raw_spin_lock_irqsave(&cmci_discover_lock, flags);
+       spin_lock_irqsave(&cmci_discover_lock, flags);
        owned = __get_cpu_var(mce_banks_owned);
        for_each_set_bit(bank, owned, MAX_NR_BANKS) {
                rdmsrl(MSR_IA32_MCx_CTL2(bank), val);
                val &= ~MCI_CTL2_CMCI_EN;
                wrmsrl(MSR_IA32_MCx_CTL2(bank), val);
        }
-       raw_spin_unlock_irqrestore(&cmci_discover_lock, flags);
+       spin_unlock_irqrestore(&cmci_discover_lock, flags);
 }
 
 static bool cmci_storm_detect(void)
@@ -211,7 +211,7 @@ static void cmci_discover(int banks)
        int i;
        int bios_wrong_thresh = 0;
 
-       raw_spin_lock_irqsave(&cmci_discover_lock, flags);
+       spin_lock_irqsave(&cmci_discover_lock, flags);
        for (i = 0; i < banks; i++) {
                u64 val;
                int bios_zero_thresh = 0;
@@ -266,7 +266,7 @@ static void cmci_discover(int banks)
                        WARN_ON(!test_bit(i, __get_cpu_var(mce_poll_banks)));
                }
        }
-       raw_spin_unlock_irqrestore(&cmci_discover_lock, flags);
+       spin_unlock_irqrestore(&cmci_discover_lock, flags);
        if (mca_cfg.bios_cmci_threshold && bios_wrong_thresh) {
                pr_info_once(
                        "bios_cmci_threshold: Some banks do not have valid thresholds set\n");
@@ -316,10 +316,10 @@ void cmci_clear(void)
 
        if (!cmci_supported(&banks))
                return;
-       raw_spin_lock_irqsave(&cmci_discover_lock, flags);
+       spin_lock_irqsave(&cmci_discover_lock, flags);
        for (i = 0; i < banks; i++)
                __cmci_disable_bank(i);
-       raw_spin_unlock_irqrestore(&cmci_discover_lock, flags);
+       spin_unlock_irqrestore(&cmci_discover_lock, flags);
 }
 
 static void cmci_rediscover_work_func(void *arg)
@@ -360,9 +360,9 @@ void cmci_disable_bank(int bank)
        if (!cmci_supported(&banks))
                return;
 
-       raw_spin_lock_irqsave(&cmci_discover_lock, flags);
+       spin_lock_irqsave(&cmci_discover_lock, flags);
        __cmci_disable_bank(bank);
-       raw_spin_unlock_irqrestore(&cmci_discover_lock, flags);
+       spin_unlock_irqrestore(&cmci_discover_lock, flags);
 }
 
 static void intel_init_cmci(void)
index 059218ed5208e83ab40d44374064a53fdeab5568..619f7699487aa1ec60f5a2687bede8e19d0a2c7a 100644 (file)
@@ -59,7 +59,7 @@
 #define INTEL_RAPL_PKG         0x2     /* pseudo-encoding */
 #define RAPL_IDX_RAM_NRG_STAT  2       /* DRAM */
 #define INTEL_RAPL_RAM         0x3     /* pseudo-encoding */
-#define RAPL_IDX_PP1_NRG_STAT  3       /* DRAM */
+#define RAPL_IDX_PP1_NRG_STAT  3       /* gpu */
 #define INTEL_RAPL_PP1         0x4     /* pseudo-encoding */
 
 /* Clients have PP0, PKG */
                         1<<RAPL_IDX_PKG_NRG_STAT|\
                         1<<RAPL_IDX_RAM_NRG_STAT)
 
+/* Servers have PP0, PKG, RAM, PP1 */
+#define RAPL_IDX_HSW   (1<<RAPL_IDX_PP0_NRG_STAT|\
+                        1<<RAPL_IDX_PKG_NRG_STAT|\
+                        1<<RAPL_IDX_RAM_NRG_STAT|\
+                        1<<RAPL_IDX_PP1_NRG_STAT)
+
 /*
  * event code: LSB 8 bits, passed in attr->config
  * any other bit is reserved
@@ -425,6 +431,24 @@ static struct attribute *rapl_events_cln_attr[] = {
        NULL,
 };
 
+static struct attribute *rapl_events_hsw_attr[] = {
+       EVENT_PTR(rapl_cores),
+       EVENT_PTR(rapl_pkg),
+       EVENT_PTR(rapl_gpu),
+       EVENT_PTR(rapl_ram),
+
+       EVENT_PTR(rapl_cores_unit),
+       EVENT_PTR(rapl_pkg_unit),
+       EVENT_PTR(rapl_gpu_unit),
+       EVENT_PTR(rapl_ram_unit),
+
+       EVENT_PTR(rapl_cores_scale),
+       EVENT_PTR(rapl_pkg_scale),
+       EVENT_PTR(rapl_gpu_scale),
+       EVENT_PTR(rapl_ram_scale),
+       NULL,
+};
+
 static struct attribute_group rapl_pmu_events_group = {
        .name = "events",
        .attrs = NULL, /* patched at runtime */
@@ -511,6 +535,7 @@ static int rapl_cpu_prepare(int cpu)
        struct rapl_pmu *pmu = per_cpu(rapl_pmu, cpu);
        int phys_id = topology_physical_package_id(cpu);
        u64 ms;
+       u64 msr_rapl_power_unit_bits;
 
        if (pmu)
                return 0;
@@ -518,6 +543,10 @@ static int rapl_cpu_prepare(int cpu)
        if (phys_id < 0)
                return -1;
 
+       /* protect rdmsrl() to handle virtualization */
+       if (rdmsrl_safe(MSR_RAPL_POWER_UNIT, &msr_rapl_power_unit_bits))
+               return -1;
+
        pmu = kzalloc_node(sizeof(*pmu), GFP_KERNEL, cpu_to_node(cpu));
        if (!pmu)
                return -1;
@@ -531,8 +560,7 @@ static int rapl_cpu_prepare(int cpu)
         *
         * we cache in local PMU instance
         */
-       rdmsrl(MSR_RAPL_POWER_UNIT, pmu->hw_unit);
-       pmu->hw_unit = (pmu->hw_unit >> 8) & 0x1FULL;
+       pmu->hw_unit = (msr_rapl_power_unit_bits >> 8) & 0x1FULL;
        pmu->pmu = &rapl_pmu_class;
 
        /*
@@ -631,11 +659,14 @@ static int __init rapl_pmu_init(void)
        switch (boot_cpu_data.x86_model) {
        case 42: /* Sandy Bridge */
        case 58: /* Ivy Bridge */
-       case 60: /* Haswell */
-       case 69: /* Haswell-Celeron */
                rapl_cntr_mask = RAPL_IDX_CLN;
                rapl_pmu_events_group.attrs = rapl_events_cln_attr;
                break;
+       case 60: /* Haswell */
+       case 69: /* Haswell-Celeron */
+               rapl_cntr_mask = RAPL_IDX_HSW;
+               rapl_pmu_events_group.attrs = rapl_events_hsw_attr;
+               break;
        case 45: /* Sandy Bridge-EP */
        case 62: /* IvyTown */
                rapl_cntr_mask = RAPL_IDX_SRV;
@@ -650,7 +681,9 @@ static int __init rapl_pmu_init(void)
        cpu_notifier_register_begin();
 
        for_each_online_cpu(cpu) {
-               rapl_cpu_prepare(cpu);
+               ret = rapl_cpu_prepare(cpu);
+               if (ret)
+                       goto out;
                rapl_cpu_init(cpu);
        }
 
@@ -673,6 +706,7 @@ static int __init rapl_pmu_init(void)
                hweight32(rapl_cntr_mask),
                ktime_to_ms(pmu->timer_interval));
 
+out:
        cpu_notifier_register_done();
 
        return 0;
index b0cc3809723d4f50bb7009691eabdfa9682b81e1..6e2537c3219060b31a9344c5df0dd90d8d3afbd2 100644 (file)
@@ -240,7 +240,7 @@ static u32 __init intel_stolen_base(int num, int slot, int func, size_t stolen_s
        return base;
 }
 
-#define KB(x)  ((x) * 1024)
+#define KB(x)  ((x) * 1024UL)
 #define MB(x)  (KB (KB (x)))
 #define GB(x)  (MB (KB (x)))
 
index 79a3f9682871ae81d02e08cbd169d5ba96e175aa..61b17dc2c277346ae2c869da691ec19ab000e1ad 100644 (file)
@@ -897,9 +897,10 @@ int __kprobes kprobe_fault_handler(struct pt_regs *regs, int trapnr)
        struct kprobe *cur = kprobe_running();
        struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
 
-       switch (kcb->kprobe_status) {
-       case KPROBE_HIT_SS:
-       case KPROBE_REENTER:
+       if (unlikely(regs->ip == (unsigned long)cur->ainsn.insn)) {
+               /* This must happen on single-stepping */
+               WARN_ON(kcb->kprobe_status != KPROBE_HIT_SS &&
+                       kcb->kprobe_status != KPROBE_REENTER);
                /*
                 * We are here because the instruction being single
                 * stepped caused a page fault. We reset the current
@@ -914,9 +915,8 @@ int __kprobes kprobe_fault_handler(struct pt_regs *regs, int trapnr)
                else
                        reset_current_kprobe();
                preempt_enable_no_resched();
-               break;
-       case KPROBE_HIT_ACTIVE:
-       case KPROBE_HIT_SSDONE:
+       } else if (kcb->kprobe_status == KPROBE_HIT_ACTIVE ||
+                  kcb->kprobe_status == KPROBE_HIT_SSDONE) {
                /*
                 * We increment the nmissed count for accounting,
                 * we can also use npre/npostfault count for accounting
@@ -945,10 +945,8 @@ int __kprobes kprobe_fault_handler(struct pt_regs *regs, int trapnr)
                 * fixup routine could not handle it,
                 * Let do_page_fault() fix it.
                 */
-               break;
-       default:
-               break;
        }
+
        return 0;
 }
 
index 654b46574b916c20ac4472aace3ffe4165f131fd..3399d3a997303322a9b5dc425080dd3553f98594 100644 (file)
@@ -114,8 +114,8 @@ EXPORT_SYMBOL(machine_real_restart);
  */
 static int __init set_pci_reboot(const struct dmi_system_id *d)
 {
-       if (reboot_type != BOOT_CF9) {
-               reboot_type = BOOT_CF9;
+       if (reboot_type != BOOT_CF9_FORCE) {
+               reboot_type = BOOT_CF9_FORCE;
                pr_info("%s series board detected. Selecting %s-method for reboots.\n",
                        d->ident, "PCI");
        }
@@ -458,20 +458,23 @@ void __attribute__((weak)) mach_reboot_fixups(void)
 }
 
 /*
- * Windows compatible x86 hardware expects the following on reboot:
+ * To the best of our knowledge Windows compatible x86 hardware expects
+ * the following on reboot:
  *
  * 1) If the FADT has the ACPI reboot register flag set, try it
  * 2) If still alive, write to the keyboard controller
  * 3) If still alive, write to the ACPI reboot register again
  * 4) If still alive, write to the keyboard controller again
  * 5) If still alive, call the EFI runtime service to reboot
- * 6) If still alive, write to the PCI IO port 0xCF9 to reboot
- * 7) If still alive, inform BIOS to do a proper reboot
+ * 6) If no EFI runtime service, call the BIOS to do a reboot
  *
- * If the machine is still alive at this stage, it gives up. We default to
- * following the same pattern, except that if we're still alive after (7) we'll
- * try to force a triple fault and then cycle between hitting the keyboard
- * controller and doing that
+ * We default to following the same pattern. We also have
+ * two other reboot methods: 'triple fault' and 'PCI', which
+ * can be triggered via the reboot= kernel boot option or
+ * via quirks.
+ *
+ * This means that this function can never return, it can misbehave
+ * by not rebooting properly and hanging.
  */
 static void native_machine_emergency_restart(void)
 {
@@ -492,6 +495,11 @@ static void native_machine_emergency_restart(void)
        for (;;) {
                /* Could also try the reset bit in the Hammer NB */
                switch (reboot_type) {
+               case BOOT_ACPI:
+                       acpi_reboot();
+                       reboot_type = BOOT_KBD;
+                       break;
+
                case BOOT_KBD:
                        mach_reboot_fixups(); /* For board specific fixups */
 
@@ -509,43 +517,29 @@ static void native_machine_emergency_restart(void)
                        }
                        break;
 
-               case BOOT_TRIPLE:
-                       load_idt(&no_idt);
-                       __asm__ __volatile__("int3");
-
-                       /* We're probably dead after this, but... */
-                       reboot_type = BOOT_KBD;
-                       break;
-
-               case BOOT_BIOS:
-                       machine_real_restart(MRR_BIOS);
-
-                       /* We're probably dead after this, but... */
-                       reboot_type = BOOT_TRIPLE;
-                       break;
-
-               case BOOT_ACPI:
-                       acpi_reboot();
-                       reboot_type = BOOT_KBD;
-                       break;
-
                case BOOT_EFI:
                        if (efi_enabled(EFI_RUNTIME_SERVICES))
                                efi.reset_system(reboot_mode == REBOOT_WARM ?
                                                 EFI_RESET_WARM :
                                                 EFI_RESET_COLD,
                                                 EFI_SUCCESS, 0, NULL);
-                       reboot_type = BOOT_CF9_COND;
+                       reboot_type = BOOT_BIOS;
+                       break;
+
+               case BOOT_BIOS:
+                       machine_real_restart(MRR_BIOS);
+
+                       /* We're probably dead after this, but... */
+                       reboot_type = BOOT_CF9_SAFE;
                        break;
 
-               case BOOT_CF9:
+               case BOOT_CF9_FORCE:
                        port_cf9_safe = true;
                        /* Fall through */
 
-               case BOOT_CF9_COND:
+               case BOOT_CF9_SAFE:
                        if (port_cf9_safe) {
-                               u8 reboot_code = reboot_mode == REBOOT_WARM ?
-                                       0x06 : 0x0E;
+                               u8 reboot_code = reboot_mode == REBOOT_WARM ?  0x06 : 0x0E;
                                u8 cf9 = inb(0xcf9) & ~reboot_code;
                                outb(cf9|2, 0xcf9); /* Request hard reset */
                                udelay(50);
@@ -553,7 +547,15 @@ static void native_machine_emergency_restart(void)
                                outb(cf9|reboot_code, 0xcf9);
                                udelay(50);
                        }
-                       reboot_type = BOOT_BIOS;
+                       reboot_type = BOOT_TRIPLE;
+                       break;
+
+               case BOOT_TRIPLE:
+                       load_idt(&no_idt);
+                       __asm__ __volatile__("int3");
+
+                       /* We're probably dead after this, but... */
+                       reboot_type = BOOT_KBD;
                        break;
                }
        }
index f6584a90aba346566d38b6df763a9b0669fd733f..5edc34b5b9514df1f63af487a314ab4053d197a2 100644 (file)
@@ -26,6 +26,9 @@
 
 #define TOPOLOGY_REGISTER_OFFSET 0x10
 
+/* Flag below is initialized once during vSMP PCI initialization. */
+static int irq_routing_comply = 1;
+
 #if defined CONFIG_PCI && defined CONFIG_PARAVIRT
 /*
  * Interrupt control on vSMPowered systems:
@@ -101,6 +104,10 @@ static void __init set_vsmp_pv_ops(void)
 #ifdef CONFIG_SMP
        if (cap & ctl & BIT(8)) {
                ctl &= ~BIT(8);
+
+               /* Interrupt routing set to ignore */
+               irq_routing_comply = 0;
+
 #ifdef CONFIG_PROC_FS
                /* Don't let users change irq affinity via procfs */
                no_irq_affinity = 1;
@@ -218,7 +225,9 @@ static void vsmp_apic_post_init(void)
 {
        /* need to update phys_pkg_id */
        apic->phys_pkg_id = apicid_phys_pkg_id;
-       apic->vector_allocation_domain = fill_vector_allocation_domain;
+
+       if (!irq_routing_comply)
+               apic->vector_allocation_domain = fill_vector_allocation_domain;
 }
 
 void __init vsmp_init(void)
index bea60671ef8a8c17227e4c4124c0f52a7c8c6f63..f47a104a749cd9d55c046c5752881ed553669d31 100644 (file)
@@ -308,7 +308,7 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
        const u32 kvm_supported_word9_x86_features =
                F(FSGSBASE) | F(BMI1) | F(HLE) | F(AVX2) | F(SMEP) |
                F(BMI2) | F(ERMS) | f_invpcid | F(RTM) | f_mpx | F(RDSEED) |
-               F(ADX);
+               F(ADX) | F(SMAP);
 
        /* all calls to cpuid_count() should be made on the same cpu */
        get_cpu();
index a2a1bb7ed8c1b32677db62d4f5bf4303cd1cb9b2..eeecbed26ac7ce6097fd6669435d73b221f047b2 100644 (file)
@@ -48,6 +48,14 @@ static inline bool guest_cpuid_has_smep(struct kvm_vcpu *vcpu)
        return best && (best->ebx & bit(X86_FEATURE_SMEP));
 }
 
+static inline bool guest_cpuid_has_smap(struct kvm_vcpu *vcpu)
+{
+       struct kvm_cpuid_entry2 *best;
+
+       best = kvm_find_cpuid_entry(vcpu, 7, 0);
+       return best && (best->ebx & bit(X86_FEATURE_SMAP));
+}
+
 static inline bool guest_cpuid_has_fsgsbase(struct kvm_vcpu *vcpu)
 {
        struct kvm_cpuid_entry2 *best;
index f5704d9e5ddcd980bc20fd421b3763ae5c5922b0..813d31038b93bf8d7232db9435e2ee0e59996118 100644 (file)
@@ -3601,20 +3601,27 @@ static void reset_rsvds_bits_mask_ept(struct kvm_vcpu *vcpu,
        }
 }
 
-static void update_permission_bitmask(struct kvm_vcpu *vcpu,
+void update_permission_bitmask(struct kvm_vcpu *vcpu,
                struct kvm_mmu *mmu, bool ept)
 {
        unsigned bit, byte, pfec;
        u8 map;
-       bool fault, x, w, u, wf, uf, ff, smep;
+       bool fault, x, w, u, wf, uf, ff, smapf, cr4_smap, cr4_smep, smap = 0;
 
-       smep = kvm_read_cr4_bits(vcpu, X86_CR4_SMEP);
+       cr4_smep = kvm_read_cr4_bits(vcpu, X86_CR4_SMEP);
+       cr4_smap = kvm_read_cr4_bits(vcpu, X86_CR4_SMAP);
        for (byte = 0; byte < ARRAY_SIZE(mmu->permissions); ++byte) {
                pfec = byte << 1;
                map = 0;
                wf = pfec & PFERR_WRITE_MASK;
                uf = pfec & PFERR_USER_MASK;
                ff = pfec & PFERR_FETCH_MASK;
+               /*
+                * PFERR_RSVD_MASK bit is set in PFEC if the access is not
+                * subject to SMAP restrictions, and cleared otherwise. The
+                * bit is only meaningful if the SMAP bit is set in CR4.
+                */
+               smapf = !(pfec & PFERR_RSVD_MASK);
                for (bit = 0; bit < 8; ++bit) {
                        x = bit & ACC_EXEC_MASK;
                        w = bit & ACC_WRITE_MASK;
@@ -3626,12 +3633,33 @@ static void update_permission_bitmask(struct kvm_vcpu *vcpu,
                                /* Allow supervisor writes if !cr0.wp */
                                w |= !is_write_protection(vcpu) && !uf;
                                /* Disallow supervisor fetches of user code if cr4.smep */
-                               x &= !(smep && u && !uf);
+                               x &= !(cr4_smep && u && !uf);
+
+                               /*
+                                * SMAP:kernel-mode data accesses from user-mode
+                                * mappings should fault. A fault is considered
+                                * as a SMAP violation if all of the following
+                                * conditions are ture:
+                                *   - X86_CR4_SMAP is set in CR4
+                                *   - An user page is accessed
+                                *   - Page fault in kernel mode
+                                *   - if CPL = 3 or X86_EFLAGS_AC is clear
+                                *
+                                *   Here, we cover the first three conditions.
+                                *   The fourth is computed dynamically in
+                                *   permission_fault() and is in smapf.
+                                *
+                                *   Also, SMAP does not affect instruction
+                                *   fetches, add the !ff check here to make it
+                                *   clearer.
+                                */
+                               smap = cr4_smap && u && !uf && !ff;
                        } else
                                /* Not really needed: no U/S accesses on ept  */
                                u = 1;
 
-                       fault = (ff && !x) || (uf && !u) || (wf && !w);
+                       fault = (ff && !x) || (uf && !u) || (wf && !w) ||
+                               (smapf && smap);
                        map |= fault << bit;
                }
                mmu->permissions[byte] = map;
index 292615274358ee33a1afeb1eef159901ae6f164e..3842e70bdb7cf92f916acabcb5480b8b93367a60 100644 (file)
 #define PT_DIRECTORY_LEVEL 2
 #define PT_PAGE_TABLE_LEVEL 1
 
-#define PFERR_PRESENT_MASK (1U << 0)
-#define PFERR_WRITE_MASK (1U << 1)
-#define PFERR_USER_MASK (1U << 2)
-#define PFERR_RSVD_MASK (1U << 3)
-#define PFERR_FETCH_MASK (1U << 4)
+#define PFERR_PRESENT_BIT 0
+#define PFERR_WRITE_BIT 1
+#define PFERR_USER_BIT 2
+#define PFERR_RSVD_BIT 3
+#define PFERR_FETCH_BIT 4
+
+#define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT)
+#define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT)
+#define PFERR_USER_MASK (1U << PFERR_USER_BIT)
+#define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT)
+#define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT)
 
 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4]);
 void kvm_mmu_set_mmio_spte_mask(u64 mmio_mask);
@@ -73,6 +79,8 @@ int handle_mmio_page_fault_common(struct kvm_vcpu *vcpu, u64 addr, bool direct);
 void kvm_init_shadow_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *context);
 void kvm_init_shadow_ept_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *context,
                bool execonly);
+void update_permission_bitmask(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
+               bool ept);
 
 static inline unsigned int kvm_mmu_available_pages(struct kvm *kvm)
 {
@@ -110,10 +118,30 @@ static inline bool is_write_protection(struct kvm_vcpu *vcpu)
  * Will a fault with a given page-fault error code (pfec) cause a permission
  * fault with the given access (in ACC_* format)?
  */
-static inline bool permission_fault(struct kvm_mmu *mmu, unsigned pte_access,
-                                   unsigned pfec)
+static inline bool permission_fault(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
+                                   unsigned pte_access, unsigned pfec)
 {
-       return (mmu->permissions[pfec >> 1] >> pte_access) & 1;
+       int cpl = kvm_x86_ops->get_cpl(vcpu);
+       unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
+
+       /*
+        * If CPL < 3, SMAP prevention are disabled if EFLAGS.AC = 1.
+        *
+        * If CPL = 3, SMAP applies to all supervisor-mode data accesses
+        * (these are implicit supervisor accesses) regardless of the value
+        * of EFLAGS.AC.
+        *
+        * This computes (cpl < 3) && (rflags & X86_EFLAGS_AC), leaving
+        * the result in X86_EFLAGS_AC. We then insert it in place of
+        * the PFERR_RSVD_MASK bit; this bit will always be zero in pfec,
+        * but it will be one in index if SMAP checks are being overridden.
+        * It is important to keep this branchless.
+        */
+       unsigned long smap = (cpl - 3) & (rflags & X86_EFLAGS_AC);
+       int index = (pfec >> 1) +
+                   (smap >> (X86_EFLAGS_AC_BIT - PFERR_RSVD_BIT + 1));
+
+       return (mmu->permissions[index] >> pte_access) & 1;
 }
 
 void kvm_mmu_invalidate_zap_all_pages(struct kvm *kvm);
index b1e6c1bf68d3bec7b13ebfd8c6e8f518b87a1d9c..123efd3ec29f2e9e3bdadffe48c0beb0650222ae 100644 (file)
@@ -353,7 +353,7 @@ retry_walk:
                walker->ptes[walker->level - 1] = pte;
        } while (!is_last_gpte(mmu, walker->level, pte));
 
-       if (unlikely(permission_fault(mmu, pte_access, access))) {
+       if (unlikely(permission_fault(vcpu, mmu, pte_access, access))) {
                errcode |= PFERR_PRESENT_MASK;
                goto error;
        }
index 1320e0f8e61174d9a5c1da8d17e455f4a839cb1a..33e8c028842fb4b0b59bc269a973b195a104cdf8 100644 (file)
@@ -503,7 +503,7 @@ static inline struct vcpu_vmx *to_vmx(struct kvm_vcpu *vcpu)
                                [number##_HIGH] = VMCS12_OFFSET(name)+4
 
 
-static const unsigned long shadow_read_only_fields[] = {
+static unsigned long shadow_read_only_fields[] = {
        /*
         * We do NOT shadow fields that are modified when L0
         * traps and emulates any vmx instruction (e.g. VMPTRLD,
@@ -526,10 +526,10 @@ static const unsigned long shadow_read_only_fields[] = {
        GUEST_LINEAR_ADDRESS,
        GUEST_PHYSICAL_ADDRESS
 };
-static const int max_shadow_read_only_fields =
+static int max_shadow_read_only_fields =
        ARRAY_SIZE(shadow_read_only_fields);
 
-static const unsigned long shadow_read_write_fields[] = {
+static unsigned long shadow_read_write_fields[] = {
        GUEST_RIP,
        GUEST_RSP,
        GUEST_CR0,
@@ -558,7 +558,7 @@ static const unsigned long shadow_read_write_fields[] = {
        HOST_FS_SELECTOR,
        HOST_GS_SELECTOR
 };
-static const int max_shadow_read_write_fields =
+static int max_shadow_read_write_fields =
        ARRAY_SIZE(shadow_read_write_fields);
 
 static const unsigned short vmcs_field_to_offset_table[] = {
@@ -3009,6 +3009,41 @@ static void free_kvm_area(void)
        }
 }
 
+static void init_vmcs_shadow_fields(void)
+{
+       int i, j;
+
+       /* No checks for read only fields yet */
+
+       for (i = j = 0; i < max_shadow_read_write_fields; i++) {
+               switch (shadow_read_write_fields[i]) {
+               case GUEST_BNDCFGS:
+                       if (!vmx_mpx_supported())
+                               continue;
+                       break;
+               default:
+                       break;
+               }
+
+               if (j < i)
+                       shadow_read_write_fields[j] =
+                               shadow_read_write_fields[i];
+               j++;
+       }
+       max_shadow_read_write_fields = j;
+
+       /* shadowed fields guest access without vmexit */
+       for (i = 0; i < max_shadow_read_write_fields; i++) {
+               clear_bit(shadow_read_write_fields[i],
+                         vmx_vmwrite_bitmap);
+               clear_bit(shadow_read_write_fields[i],
+                         vmx_vmread_bitmap);
+       }
+       for (i = 0; i < max_shadow_read_only_fields; i++)
+               clear_bit(shadow_read_only_fields[i],
+                         vmx_vmread_bitmap);
+}
+
 static __init int alloc_kvm_area(void)
 {
        int cpu;
@@ -3039,6 +3074,8 @@ static __init int hardware_setup(void)
                enable_vpid = 0;
        if (!cpu_has_vmx_shadow_vmcs())
                enable_shadow_vmcs = 0;
+       if (enable_shadow_vmcs)
+               init_vmcs_shadow_fields();
 
        if (!cpu_has_vmx_ept() ||
            !cpu_has_vmx_ept_4levels()) {
@@ -3484,13 +3521,14 @@ static int vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
                        hw_cr4 &= ~X86_CR4_PAE;
                        hw_cr4 |= X86_CR4_PSE;
                        /*
-                        * SMEP is disabled if CPU is in non-paging mode in
-                        * hardware. However KVM always uses paging mode to
+                        * SMEP/SMAP is disabled if CPU is in non-paging mode
+                        * in hardware. However KVM always uses paging mode to
                         * emulate guest non-paging mode with TDP.
-                        * To emulate this behavior, SMEP needs to be manually
-                        * disabled when guest switches to non-paging mode.
+                        * To emulate this behavior, SMEP/SMAP needs to be
+                        * manually disabled when guest switches to non-paging
+                        * mode.
                         */
-                       hw_cr4 &= ~X86_CR4_SMEP;
+                       hw_cr4 &= ~(X86_CR4_SMEP | X86_CR4_SMAP);
                } else if (!(cr4 & X86_CR4_PAE)) {
                        hw_cr4 &= ~X86_CR4_PAE;
                }
@@ -8802,14 +8840,6 @@ static int __init vmx_init(void)
 
        memset(vmx_vmread_bitmap, 0xff, PAGE_SIZE);
        memset(vmx_vmwrite_bitmap, 0xff, PAGE_SIZE);
-       /* shadowed read/write fields */
-       for (i = 0; i < max_shadow_read_write_fields; i++) {
-               clear_bit(shadow_read_write_fields[i], vmx_vmwrite_bitmap);
-               clear_bit(shadow_read_write_fields[i], vmx_vmread_bitmap);
-       }
-       /* shadowed read only fields */
-       for (i = 0; i < max_shadow_read_only_fields; i++)
-               clear_bit(shadow_read_only_fields[i], vmx_vmread_bitmap);
 
        /*
         * Allow direct access to the PC debug port (it is often used for I/O
index 9d1b5cd4d34cc6f585b7f18a1ac2c5ba266c9b28..8b8fc0b792baeddf76a1b0ee3dac3a6a9b5cd0de 100644 (file)
@@ -652,6 +652,9 @@ int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
        if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
                return 1;
 
+       if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
+               return 1;
+
        if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
                return 1;
 
@@ -680,6 +683,9 @@ int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
            (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
                kvm_mmu_reset_context(vcpu);
 
+       if ((cr4 ^ old_cr4) & X86_CR4_SMAP)
+               update_permission_bitmask(vcpu, vcpu->arch.walk_mmu, false);
+
        if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
                kvm_update_cpuid(vcpu);
 
@@ -1117,7 +1123,6 @@ static inline u64 get_kernel_ns(void)
 {
        struct timespec ts;
 
-       WARN_ON(preemptible());
        ktime_get_ts(&ts);
        monotonic_to_bootbased(&ts);
        return timespec_to_ns(&ts);
@@ -4164,7 +4169,8 @@ static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
                | (write ? PFERR_WRITE_MASK : 0);
 
        if (vcpu_match_mmio_gva(vcpu, gva)
-           && !permission_fault(vcpu->arch.walk_mmu, vcpu->arch.access, access)) {
+           && !permission_fault(vcpu, vcpu->arch.walk_mmu,
+                                vcpu->arch.access, access)) {
                *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
                                        (gva & (PAGE_SIZE - 1));
                trace_vcpu_match_mmio(gva, *gpa, write, false);
index f325af26107c2fde096fe2961d3579e2f3b78e91..3323c274524835a2191295338ecc790aba2ec674 100644 (file)
@@ -54,5 +54,7 @@ syshdr-$(CONFIG_X86_64)               += syscalls_64.h
 
 targets        += $(uapisyshdr-y) $(syshdr-y)
 
+PHONY += all
 all: $(addprefix $(uapi)/,$(uapisyshdr-y))
 all: $(addprefix $(out)/,$(syshdr-y))
+       @:
index 96bc506ac6de7db16e1b0dd7ce161587e60f673c..d6b867921612f69f8800fbf309652ade49170a89 100644 (file)
 350    i386    finit_module            sys_finit_module
 351    i386    sched_setattr           sys_sched_setattr
 352    i386    sched_getattr           sys_sched_getattr
+353    i386    renameat2               sys_renameat2
index e8120346903b504b554c0a5aca9910cd1ad72a37..604a37efd4d5fd10ae54a1455a98e608a963f6d7 100644 (file)
@@ -40,4 +40,6 @@ $(obj)/insn_sanity.o: $(srctree)/arch/x86/lib/insn.c $(srctree)/arch/x86/lib/ina
 HOST_EXTRACFLAGS += -I$(srctree)/tools/include
 hostprogs-y    += relocs
 relocs-objs     := relocs_32.o relocs_64.o relocs_common.o
+PHONY += relocs
 relocs: $(obj)/relocs
+       @:
index 2e263f367b139c30da34b9e346007e206132955e..9df017ab2285a015a111cc384a0f28d6e488bbf8 100644 (file)
@@ -9,12 +9,9 @@ SECTIONS
 #ifdef BUILD_VDSO32
 #include <asm/vdso32.h>
 
-       .hpet_sect : {
-               hpet_page = . - VDSO_OFFSET(VDSO_HPET_PAGE);
-       } :text :hpet_sect
+       hpet_page = . - VDSO_OFFSET(VDSO_HPET_PAGE);
 
-       .vvar_sect : {
-               vvar = . - VDSO_OFFSET(VDSO_VVAR_PAGE);
+       vvar = . - VDSO_OFFSET(VDSO_VVAR_PAGE);
 
        /* Place all vvars at the offsets in asm/vvar.h. */
 #define EMIT_VVAR(name, offset) vvar_ ## name = vvar + offset;
@@ -22,7 +19,6 @@ SECTIONS
 #include <asm/vvar.h>
 #undef __VVAR_KERNEL_LDS
 #undef EMIT_VVAR
-       } :text :vvar_sect
 #endif
        . = SIZEOF_HEADERS;
 
@@ -61,7 +57,12 @@ SECTIONS
         */
        . = ALIGN(0x100);
 
-       .text           : { *(.text*) }                 :text   =0x90909090
+       .text           : { *(.text*) }                 :text   =0x90909090,
+
+       /*
+        * The comma above works around a bug in gold:
+        * https://sourceware.org/bugzilla/show_bug.cgi?id=16804
+        */
 
        /DISCARD/ : {
                *(.discard)
@@ -84,8 +85,4 @@ PHDRS
        dynamic         PT_DYNAMIC      FLAGS(4);               /* PF_R */
        note            PT_NOTE         FLAGS(4);               /* PF_R */
        eh_frame_hdr    PT_GNU_EH_FRAME;
-#ifdef BUILD_VDSO32
-       vvar_sect       PT_NULL         FLAGS(4);               /* PF_R */
-       hpet_sect       PT_NULL         FLAGS(4);               /* PF_R */
-#endif
 }
index a18eadd8bb4039a6616b2f5b31afd1c72dd68c88..7005974c3ff308a2504def1cb035d393ed82693f 100644 (file)
@@ -441,10 +441,11 @@ static int xen_cpu_up(unsigned int cpu, struct task_struct *idle)
        irq_ctx_init(cpu);
 #else
        clear_tsk_thread_flag(idle, TIF_FORK);
+#endif
        per_cpu(kernel_stack, cpu) =
                (unsigned long)task_stack_page(idle) -
                KERNEL_STACK_OFFSET + THREAD_SIZE;
-#endif
+
        xen_setup_runstate_info(cpu);
        xen_setup_timer(cpu);
        xen_init_lock_cpu(cpu);
index 4d3acc34a998e5aca97d58c9573e822a29905626..0ba5f3b967f0041c5ea6445f898a944008b96c58 100644 (file)
@@ -274,7 +274,7 @@ void __init xen_init_spinlocks(void)
                printk(KERN_DEBUG "xen: PV spinlocks disabled\n");
                return;
        }
-
+       printk(KERN_DEBUG "xen: PV spinlocks enabled\n");
        pv_lock_ops.lock_spinning = PV_CALLEE_SAVE(xen_lock_spinning);
        pv_lock_ops.unlock_kick = xen_unlock_kick;
 }
@@ -290,6 +290,9 @@ static __init int xen_init_spinlocks_jump(void)
        if (!xen_pvspin)
                return 0;
 
+       if (!xen_domain())
+               return 0;
+
        static_key_slow_inc(&paravirt_ticketlocks_enabled);
        return 0;
 }
index 33ca6e42a4caabb412350563a1f8349fd77b7789..fd92a64d748e1ca1a3838fe3c26f977f41a8b984 100644 (file)
@@ -75,6 +75,17 @@ ENDPROC(xen_sysexit)
  * stack state in whatever form its in, we keep things simple by only
  * using a single register which is pushed/popped on the stack.
  */
+
+.macro POP_FS
+1:
+       popw %fs
+.pushsection .fixup, "ax"
+2:     movw $0, (%esp)
+       jmp 1b
+.popsection
+       _ASM_EXTABLE(1b,2b)
+.endm
+
 ENTRY(xen_iret)
        /* test eflags for special cases */
        testl $(X86_EFLAGS_VM | XEN_EFLAGS_NMI), 8(%esp)
@@ -83,15 +94,13 @@ ENTRY(xen_iret)
        push %eax
        ESP_OFFSET=4    # bytes pushed onto stack
 
-       /*
-        * Store vcpu_info pointer for easy access.  Do it this way to
-        * avoid having to reload %fs
-        */
+       /* Store vcpu_info pointer for easy access */
 #ifdef CONFIG_SMP
-       GET_THREAD_INFO(%eax)
-       movl %ss:TI_cpu(%eax), %eax
-       movl %ss:__per_cpu_offset(,%eax,4), %eax
-       mov %ss:xen_vcpu(%eax), %eax
+       pushw %fs
+       movl $(__KERNEL_PERCPU), %eax
+       movl %eax, %fs
+       movl %fs:xen_vcpu, %eax
+       POP_FS
 #else
        movl %ss:xen_vcpu, %eax
 #endif
index e3ced91b1784af3881de45870427a37a2d2dc029..d05d81b19b50c229b2aa100bf01f8ac2818c0c1c 100644 (file)
@@ -53,8 +53,8 @@ obj-y                         += gpu/
 obj-$(CONFIG_CONNECTOR)                += connector/
 
 # i810fb and intelfb depend on char/agp/
-obj-$(CONFIG_FB_I810)           += video/i810/
-obj-$(CONFIG_FB_INTEL)          += video/intelfb/
+obj-$(CONFIG_FB_I810)           += video/fbdev/i810/
+obj-$(CONFIG_FB_INTEL)          += video/fbdev/intelfb/
 
 obj-$(CONFIG_PARPORT)          += parport/
 obj-y                          += base/ block/ misc/ mfd/ nfc/
index c29c2c3ec0ad8ffc2c6427393593dbf147899d1b..b06f5f55ada952ced85de9c845dfb49cac421633 100644 (file)
@@ -170,6 +170,9 @@ static int acpi_processor_hotadd_init(struct acpi_processor *pr)
        acpi_status status;
        int ret;
 
+       if (pr->apic_id == -1)
+               return -ENODEV;
+
        status = acpi_evaluate_integer(pr->handle, "_STA", NULL, &sta);
        if (ACPI_FAILURE(status) || !(sta & ACPI_STA_DEVICE_PRESENT))
                return -ENODEV;
@@ -260,10 +263,8 @@ static int acpi_processor_get_info(struct acpi_device *device)
        }
 
        apic_id = acpi_get_apicid(pr->handle, device_declaration, pr->acpi_id);
-       if (apic_id < 0) {
+       if (apic_id < 0)
                acpi_handle_debug(pr->handle, "failed to get CPU APIC ID.\n");
-               return -ENODEV;
-       }
        pr->apic_id = apic_id;
 
        cpu_index = acpi_map_cpuid(pr->apic_id, pr->acpi_id);
index 68d97441432cca3140d2151a50af3384b034464a..12878e1982f77d5f69fcad7d266f7ac922f2a12d 100644 (file)
 #include "accommon.h"
 #include "acdispat.h"
 #include "acinterp.h"
+#include "amlcode.h"
 
 #define _COMPONENT          ACPI_EXECUTER
 ACPI_MODULE_NAME("exfield")
 
+/* Local prototypes */
+static u32
+acpi_ex_get_serial_access_length(u32 accessor_type, u32 access_length);
+
+/*******************************************************************************
+ *
+ * FUNCTION:    acpi_get_serial_access_bytes
+ *
+ * PARAMETERS:  accessor_type   - The type of the protocol indicated by region
+ *                                field access attributes
+ *              access_length   - The access length of the region field
+ *
+ * RETURN:      Decoded access length
+ *
+ * DESCRIPTION: This routine returns the length of the generic_serial_bus
+ *              protocol bytes
+ *
+ ******************************************************************************/
+
+static u32
+acpi_ex_get_serial_access_length(u32 accessor_type, u32 access_length)
+{
+       u32 length;
+
+       switch (accessor_type) {
+       case AML_FIELD_ATTRIB_QUICK:
+
+               length = 0;
+               break;
+
+       case AML_FIELD_ATTRIB_SEND_RCV:
+       case AML_FIELD_ATTRIB_BYTE:
+
+               length = 1;
+               break;
+
+       case AML_FIELD_ATTRIB_WORD:
+       case AML_FIELD_ATTRIB_WORD_CALL:
+
+               length = 2;
+               break;
+
+       case AML_FIELD_ATTRIB_MULTIBYTE:
+       case AML_FIELD_ATTRIB_RAW_BYTES:
+       case AML_FIELD_ATTRIB_RAW_PROCESS:
+
+               length = access_length;
+               break;
+
+       case AML_FIELD_ATTRIB_BLOCK:
+       case AML_FIELD_ATTRIB_BLOCK_CALL:
+       default:
+
+               length = ACPI_GSBUS_BUFFER_SIZE;
+               break;
+       }
+
+       return (length);
+}
+
 /*******************************************************************************
  *
  * FUNCTION:    acpi_ex_read_data_from_field
@@ -63,8 +124,9 @@ ACPI_MODULE_NAME("exfield")
  *              Buffer, depending on the size of the field.
  *
  ******************************************************************************/
+
 acpi_status
-acpi_ex_read_data_from_field(struct acpi_walk_state *walk_state,
+acpi_ex_read_data_from_field(struct acpi_walk_state * walk_state,
                             union acpi_operand_object *obj_desc,
                             union acpi_operand_object **ret_buffer_desc)
 {
@@ -73,6 +135,7 @@ acpi_ex_read_data_from_field(struct acpi_walk_state *walk_state,
        acpi_size length;
        void *buffer;
        u32 function;
+       u16 accessor_type;
 
        ACPI_FUNCTION_TRACE_PTR(ex_read_data_from_field, obj_desc);
 
@@ -116,9 +179,22 @@ acpi_ex_read_data_from_field(struct acpi_walk_state *walk_state,
                            ACPI_READ | (obj_desc->field.attribute << 16);
                } else if (obj_desc->field.region_obj->region.space_id ==
                           ACPI_ADR_SPACE_GSBUS) {
-                       length = ACPI_GSBUS_BUFFER_SIZE;
-                       function =
-                           ACPI_READ | (obj_desc->field.attribute << 16);
+                       accessor_type = obj_desc->field.attribute;
+                       length = acpi_ex_get_serial_access_length(accessor_type,
+                                                                 obj_desc->
+                                                                 field.
+                                                                 access_length);
+
+                       /*
+                        * Add additional 2 bytes for modeled generic_serial_bus data buffer:
+                        * typedef struct {
+                        *     BYTEStatus; // Byte 0 of the data buffer
+                        *     BYTELength; // Byte 1 of the data buffer
+                        *     BYTE[x-1]Data; // Bytes 2-x of the arbitrary length data buffer,
+                        * }
+                        */
+                       length += 2;
+                       function = ACPI_READ | (accessor_type << 16);
                } else {        /* IPMI */
 
                        length = ACPI_IPMI_BUFFER_SIZE;
@@ -231,6 +307,7 @@ acpi_ex_write_data_to_field(union acpi_operand_object *source_desc,
        void *buffer;
        union acpi_operand_object *buffer_desc;
        u32 function;
+       u16 accessor_type;
 
        ACPI_FUNCTION_TRACE_PTR(ex_write_data_to_field, obj_desc);
 
@@ -284,9 +361,22 @@ acpi_ex_write_data_to_field(union acpi_operand_object *source_desc,
                            ACPI_WRITE | (obj_desc->field.attribute << 16);
                } else if (obj_desc->field.region_obj->region.space_id ==
                           ACPI_ADR_SPACE_GSBUS) {
-                       length = ACPI_GSBUS_BUFFER_SIZE;
-                       function =
-                           ACPI_WRITE | (obj_desc->field.attribute << 16);
+                       accessor_type = obj_desc->field.attribute;
+                       length = acpi_ex_get_serial_access_length(accessor_type,
+                                                                 obj_desc->
+                                                                 field.
+                                                                 access_length);
+
+                       /*
+                        * Add additional 2 bytes for modeled generic_serial_bus data buffer:
+                        * typedef struct {
+                        *     BYTEStatus; // Byte 0 of the data buffer
+                        *     BYTELength; // Byte 1 of the data buffer
+                        *     BYTE[x-1]Data; // Bytes 2-x of the arbitrary length data buffer,
+                        * }
+                        */
+                       length += 2;
+                       function = ACPI_WRITE | (accessor_type << 16);
                } else {        /* IPMI */
 
                        length = ACPI_IPMI_BUFFER_SIZE;
index e7e5844c87d0c8de87379ae7ea6eef8ad91cb79f..cf925c4f36b70ee173ad2ad5a688416cfdb31734 100644 (file)
@@ -380,9 +380,8 @@ static void acpi_bus_notify(acpi_handle handle, u32 type, void *data)
                break;
 
        default:
-               acpi_handle_warn(handle, "Unsupported event type 0x%x\n", type);
-               ost_code = ACPI_OST_SC_UNRECOGNIZED_NOTIFY;
-               goto err;
+               acpi_handle_debug(handle, "Unknown event type 0x%x\n", type);
+               break;
        }
 
        adev = acpi_bus_get_acpi_device(handle);
index d7d32c28829b17834507bf8683f2c2a5c77d0a0d..ad11ba4a412dedc893ae4bdbb9230b3583bbf00b 100644 (file)
@@ -206,13 +206,13 @@ unlock:
        spin_unlock_irqrestore(&ec->lock, flags);
 }
 
-static int acpi_ec_sync_query(struct acpi_ec *ec);
+static int acpi_ec_sync_query(struct acpi_ec *ec, u8 *data);
 
 static int ec_check_sci_sync(struct acpi_ec *ec, u8 state)
 {
        if (state & ACPI_EC_FLAG_SCI) {
                if (!test_and_set_bit(EC_FLAGS_QUERY_PENDING, &ec->flags))
-                       return acpi_ec_sync_query(ec);
+                       return acpi_ec_sync_query(ec, NULL);
        }
        return 0;
 }
@@ -443,10 +443,8 @@ acpi_handle ec_get_handle(void)
 
 EXPORT_SYMBOL(ec_get_handle);
 
-static int acpi_ec_query_unlocked(struct acpi_ec *ec, u8 *data);
-
 /*
- * Clears stale _Q events that might have accumulated in the EC.
+ * Process _Q events that might have accumulated in the EC.
  * Run with locked ec mutex.
  */
 static void acpi_ec_clear(struct acpi_ec *ec)
@@ -455,7 +453,7 @@ static void acpi_ec_clear(struct acpi_ec *ec)
        u8 value = 0;
 
        for (i = 0; i < ACPI_EC_CLEAR_MAX; i++) {
-               status = acpi_ec_query_unlocked(ec, &value);
+               status = acpi_ec_sync_query(ec, &value);
                if (status || !value)
                        break;
        }
@@ -582,13 +580,18 @@ static void acpi_ec_run(void *cxt)
        kfree(handler);
 }
 
-static int acpi_ec_sync_query(struct acpi_ec *ec)
+static int acpi_ec_sync_query(struct acpi_ec *ec, u8 *data)
 {
        u8 value = 0;
        int status;
        struct acpi_ec_query_handler *handler, *copy;
-       if ((status = acpi_ec_query_unlocked(ec, &value)))
+
+       status = acpi_ec_query_unlocked(ec, &value);
+       if (data)
+               *data = value;
+       if (status)
                return status;
+
        list_for_each_entry(handler, &ec->list, node) {
                if (value == handler->query_bit) {
                        /* have custom handler for this bit */
@@ -612,7 +615,7 @@ static void acpi_ec_gpe_query(void *ec_cxt)
        if (!ec)
                return;
        mutex_lock(&ec->mutex);
-       acpi_ec_sync_query(ec);
+       acpi_ec_sync_query(ec, NULL);
        mutex_unlock(&ec->mutex);
 }
 
index 20e03a7eb8b431f692e534f6a3d895a2c2cd9476..c2706047337f17c0fad38b3161cabc93d95be0e5 100644 (file)
@@ -116,7 +116,7 @@ config AHCI_ST
 
 config AHCI_IMX
        tristate "Freescale i.MX AHCI SATA support"
-       depends on MFD_SYSCON
+       depends on MFD_SYSCON && (ARCH_MXC || COMPILE_TEST)
        help
          This option enables support for the Freescale i.MX SoC's
          onboard AHCI SATA.
@@ -134,8 +134,7 @@ config AHCI_SUNXI
 
 config AHCI_XGENE
        tristate "APM X-Gene 6.0Gbps AHCI SATA host controller support"
-       depends on ARM64 || COMPILE_TEST
-       select PHY_XGENE
+       depends on PHY_XGENE
        help
         This option enables support for APM X-Gene SoC SATA host controller.
 
index 5a0bf8ed649b8cf9266530ef309aec89a54f99ef..71e15b73513d22ed2bf5ac34afec9b5f42679fe7 100644 (file)
@@ -1164,9 +1164,9 @@ static inline void ahci_gtf_filter_workaround(struct ata_host *host)
 #endif
 
 static int ahci_init_interrupts(struct pci_dev *pdev, unsigned int n_ports,
-                        struct ahci_host_priv *hpriv)
+                               struct ahci_host_priv *hpriv)
 {
-       int nvec;
+       int rc, nvec;
 
        if (hpriv->flags & AHCI_HFLAG_NO_MSI)
                goto intx;
@@ -1183,12 +1183,19 @@ static int ahci_init_interrupts(struct pci_dev *pdev, unsigned int n_ports,
        if (nvec < n_ports)
                goto single_msi;
 
-       nvec = pci_enable_msi_range(pdev, nvec, nvec);
-       if (nvec == -ENOSPC)
+       rc = pci_enable_msi_exact(pdev, nvec);
+       if (rc == -ENOSPC)
                goto single_msi;
-       else if (nvec < 0)
+       else if (rc < 0)
                goto intx;
 
+       /* fallback to single MSI mode if the controller enforced MRSM mode */
+       if (readl(hpriv->mmio + HOST_CTL) & HOST_MRSM) {
+               pci_disable_msi(pdev);
+               printk(KERN_INFO "ahci: MRSM is on, fallback to single MSI\n");
+               goto single_msi;
+       }
+
        return nvec;
 
 single_msi:
@@ -1232,18 +1239,18 @@ int ahci_host_activate(struct ata_host *host, int irq, unsigned int n_msis)
                return rc;
 
        for (i = 0; i < host->n_ports; i++) {
-               const char* desc;
                struct ahci_port_priv *pp = host->ports[i]->private_data;
 
-               /* pp is NULL for dummy ports */
-               if (pp)
-                       desc = pp->irq_desc;
-               else
-                       desc = dev_driver_string(host->dev);
+               /* Do not receive interrupts sent by dummy ports */
+               if (!pp) {
+                       disable_irq(irq + i);
+                       continue;
+               }
 
-               rc = devm_request_threaded_irq(host->dev,
-                       irq + i, ahci_hw_interrupt, ahci_thread_fn, IRQF_SHARED,
-                       desc, host->ports[i]);
+               rc = devm_request_threaded_irq(host->dev, irq + i,
+                                              ahci_hw_interrupt,
+                                              ahci_thread_fn, IRQF_SHARED,
+                                              pp->irq_desc, host->ports[i]);
                if (rc)
                        goto out_free_irqs;
        }
index 51af275b3388541baad3f7bf021a098de9da9bf0..b5eb886da22635c3c76775bc0ef6374af3464b98 100644 (file)
@@ -94,6 +94,7 @@ enum {
        /* HOST_CTL bits */
        HOST_RESET              = (1 << 0),  /* reset controller; self-clear */
        HOST_IRQ_EN             = (1 << 1),  /* global IRQ enable */
+       HOST_MRSM               = (1 << 2),  /* MSI Revert to Single Message */
        HOST_AHCI_EN            = (1 << 31), /* AHCI enabled */
 
        /* HOST_CAP bits */
index c19734d96d7e6a029a1adf9667ce5a897708b58c..943cc8b83e59bb7f1b293abce887be717047ffff 100644 (file)
@@ -4224,8 +4224,10 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = {
        { "PIONEER DVD-RW  DVR-216D",   NULL,   ATA_HORKAGE_NOSETXFER },
 
        /* devices that don't properly handle queued TRIM commands */
-       { "Micron_M500*",               NULL,   ATA_HORKAGE_NO_NCQ_TRIM, },
-       { "Crucial_CT???M500SSD*",      NULL,   ATA_HORKAGE_NO_NCQ_TRIM, },
+       { "Micron_M500*",               "MU0[1-4]*",    ATA_HORKAGE_NO_NCQ_TRIM, },
+       { "Crucial_CT???M500SSD*",      "MU0[1-4]*",    ATA_HORKAGE_NO_NCQ_TRIM, },
+       { "Micron_M550*",               NULL,           ATA_HORKAGE_NO_NCQ_TRIM, },
+       { "Crucial_CT???M550SSD*",      NULL,           ATA_HORKAGE_NO_NCQ_TRIM, },
 
        /*
         * Some WD SATA-I drives spin up and down erratically when the link
@@ -4792,21 +4794,26 @@ void swap_buf_le16(u16 *buf, unsigned int buf_words)
 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
 {
        struct ata_queued_cmd *qc = NULL;
-       unsigned int i;
+       unsigned int i, tag;
 
        /* no command while frozen */
        if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
                return NULL;
 
-       /* the last tag is reserved for internal command. */
-       for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
-               if (!test_and_set_bit(i, &ap->qc_allocated)) {
-                       qc = __ata_qc_from_tag(ap, i);
+       for (i = 0; i < ATA_MAX_QUEUE; i++) {
+               tag = (i + ap->last_tag + 1) % ATA_MAX_QUEUE;
+
+               /* the last tag is reserved for internal command. */
+               if (tag == ATA_TAG_INTERNAL)
+                       continue;
+
+               if (!test_and_set_bit(tag, &ap->qc_allocated)) {
+                       qc = __ata_qc_from_tag(ap, tag);
+                       qc->tag = tag;
+                       ap->last_tag = tag;
                        break;
                }
-
-       if (qc)
-               qc->tag = i;
+       }
 
        return qc;
 }
index 6fac524c2f500381ac8d76b2a94bf4d88314f1e7..4edb1a81f63f68e3f37680b7334a3d7b81788f96 100644 (file)
@@ -898,9 +898,12 @@ static int arasan_cf_probe(struct platform_device *pdev)
 
        cf_card_detect(acdev, 0);
 
-       return ata_host_activate(host, acdev->irq, irq_handler, 0,
-                       &arasan_cf_sht);
+       ret = ata_host_activate(host, acdev->irq, irq_handler, 0,
+                               &arasan_cf_sht);
+       if (!ret)
+               return 0;
 
+       cf_exit(acdev);
 free_clk:
        clk_put(acdev->clk);
        return ret;
index e9c87274a781551d4496ac81b213855dd766ae41..8a66f23af4c40bd0ffd9e01776c02a16b26f0584 100644 (file)
@@ -407,12 +407,13 @@ static int pata_at91_probe(struct platform_device *pdev)
 
        host->private_data = info;
 
-       return ata_host_activate(host, gpio_is_valid(irq) ? gpio_to_irq(irq) : 0,
-                       gpio_is_valid(irq) ? ata_sff_interrupt : NULL,
-                       irq_flags, &pata_at91_sht);
+       ret = ata_host_activate(host, gpio_is_valid(irq) ? gpio_to_irq(irq) : 0,
+                               gpio_is_valid(irq) ? ata_sff_interrupt : NULL,
+                               irq_flags, &pata_at91_sht);
+       if (ret)
+               goto err_put;
 
-       if (!ret)
-               return 0;
+       return 0;
 
 err_put:
        clk_put(info->mck);
index a79566d056666f0d0449785856b679492d71456b..0610e78c8a2a8334cfa8b6d585285606af3613bc 100644 (file)
@@ -594,9 +594,13 @@ static int __init pata_s3c_probe(struct platform_device *pdev)
 
        platform_set_drvdata(pdev, host);
 
-       return ata_host_activate(host, info->irq,
-                       info->irq ? pata_s3c_irq : NULL,
-                       0, &pata_s3c_sht);
+       ret = ata_host_activate(host, info->irq,
+                               info->irq ? pata_s3c_irq : NULL,
+                               0, &pata_s3c_sht);
+       if (ret)
+               goto stop_clk;
+
+       return 0;
 
 stop_clk:
        clk_disable(info->clk);
index 0dd65281cc65bb6a368143bea0373c2c373787dd..20da3ad1696b58ef6aa6a91830070063e1dc21d7 100644 (file)
@@ -614,39 +614,6 @@ void device_remove_bin_file(struct device *dev,
 }
 EXPORT_SYMBOL_GPL(device_remove_bin_file);
 
-/**
- * device_schedule_callback_owner - helper to schedule a callback for a device
- * @dev: device.
- * @func: callback function to invoke later.
- * @owner: module owning the callback routine
- *
- * Attribute methods must not unregister themselves or their parent device
- * (which would amount to the same thing).  Attempts to do so will deadlock,
- * since unregistration is mutually exclusive with driver callbacks.
- *
- * Instead methods can call this routine, which will attempt to allocate
- * and schedule a workqueue request to call back @func with @dev as its
- * argument in the workqueue's process context.  @dev will be pinned until
- * @func returns.
- *
- * This routine is usually called via the inline device_schedule_callback(),
- * which automatically sets @owner to THIS_MODULE.
- *
- * Returns 0 if the request was submitted, -ENOMEM if storage could not
- * be allocated, -ENODEV if a reference to @owner isn't available.
- *
- * NOTE: This routine won't work if CONFIG_SYSFS isn't set!  It uses an
- * underlying sysfs routine (since it is intended for use by attribute
- * methods), and if sysfs isn't available you'll get nothing but -ENOSYS.
- */
-int device_schedule_callback_owner(struct device *dev,
-               void (*func)(struct device *), struct module *owner)
-{
-       return sysfs_schedule_callback(&dev->kobj,
-                       (void (*)(void *)) func, dev, owner);
-}
-EXPORT_SYMBOL_GPL(device_schedule_callback_owner);
-
 static void klist_children_get(struct klist_node *n)
 {
        struct device_private *p = to_device_private_parent(n);
index 06051767393f7638d4ea02a14bfc5a8a689a0305..62ec61e8f84ac90d7c4e433ccc4ead67ff96fbd3 100644 (file)
@@ -52,6 +52,7 @@ static DEFINE_MUTEX(deferred_probe_mutex);
 static LIST_HEAD(deferred_probe_pending_list);
 static LIST_HEAD(deferred_probe_active_list);
 static struct workqueue_struct *deferred_wq;
+static atomic_t deferred_trigger_count = ATOMIC_INIT(0);
 
 /**
  * deferred_probe_work_func() - Retry probing devices in the active list.
@@ -135,6 +136,17 @@ static bool driver_deferred_probe_enable = false;
  * This functions moves all devices from the pending list to the active
  * list and schedules the deferred probe workqueue to process them.  It
  * should be called anytime a driver is successfully bound to a device.
+ *
+ * Note, there is a race condition in multi-threaded probe. In the case where
+ * more than one device is probing at the same time, it is possible for one
+ * probe to complete successfully while another is about to defer. If the second
+ * depends on the first, then it will get put on the pending list after the
+ * trigger event has already occured and will be stuck there.
+ *
+ * The atomic 'deferred_trigger_count' is used to determine if a successful
+ * trigger has occurred in the midst of probing a driver. If the trigger count
+ * changes in the midst of a probe, then deferred processing should be triggered
+ * again.
  */
 static void driver_deferred_probe_trigger(void)
 {
@@ -147,6 +159,7 @@ static void driver_deferred_probe_trigger(void)
         * into the active list so they can be retried by the workqueue
         */
        mutex_lock(&deferred_probe_mutex);
+       atomic_inc(&deferred_trigger_count);
        list_splice_tail_init(&deferred_probe_pending_list,
                              &deferred_probe_active_list);
        mutex_unlock(&deferred_probe_mutex);
@@ -187,8 +200,8 @@ static void driver_bound(struct device *dev)
                return;
        }
 
-       pr_debug("driver: '%s': %s: bound to device '%s'\n", dev_name(dev),
-                __func__, dev->driver->name);
+       pr_debug("driver: '%s': %s: bound to device '%s'\n", dev->driver->name,
+                __func__, dev_name(dev));
 
        klist_add_tail(&dev->p->knode_driver, &dev->driver->p->klist_devices);
 
@@ -265,6 +278,7 @@ static DECLARE_WAIT_QUEUE_HEAD(probe_waitqueue);
 static int really_probe(struct device *dev, struct device_driver *drv)
 {
        int ret = 0;
+       int local_trigger_count = atomic_read(&deferred_trigger_count);
 
        atomic_inc(&probe_count);
        pr_debug("bus: '%s': %s: probing driver %s with device %s\n",
@@ -310,6 +324,9 @@ probe_failed:
                /* Driver requested deferred probing */
                dev_info(dev, "Driver %s requests probe deferral\n", drv->name);
                driver_deferred_probe_add(dev);
+               /* Did a trigger occur while probing? Need to re-trigger if yes */
+               if (local_trigger_count != atomic_read(&deferred_trigger_count))
+                       driver_deferred_probe_trigger();
        } else if (ret != -ENODEV && ret != -ENXIO) {
                /* driver matched but the probe failed */
                printk(KERN_WARNING
index e714709704e4578ccc3703ca30108e596461ad28..5b47210889e038d72f7a172062b3c4ddd2daa07d 100644 (file)
@@ -13,6 +13,7 @@
 #include <linux/string.h>
 #include <linux/platform_device.h>
 #include <linux/of_device.h>
+#include <linux/of_irq.h>
 #include <linux/module.h>
 #include <linux/init.h>
 #include <linux/dma-mapping.h>
@@ -87,7 +88,11 @@ int platform_get_irq(struct platform_device *dev, unsigned int num)
                return -ENXIO;
        return dev->archdata.irqs[num];
 #else
-       struct resource *r = platform_get_resource(dev, IORESOURCE_IRQ, num);
+       struct resource *r;
+       if (IS_ENABLED(CONFIG_OF_IRQ) && dev->dev.of_node)
+               return of_irq_get(dev->dev.of_node, num);
+
+       r = platform_get_resource(dev, IORESOURCE_IRQ, num);
 
        return r ? r->start : -ENXIO;
 #endif
index bbcbd3c4392689ef5022af42d0a09bb504be7253..be7c1fb7c0c96fa4d19bda57bf465c836a630091 100644 (file)
@@ -39,8 +39,7 @@
 static ssize_t show_##name(struct device *dev,                 \
                struct device_attribute *attr, char *buf)       \
 {                                                              \
-       unsigned int cpu = dev->id;                             \
-       return sprintf(buf, "%d\n", topology_##name(cpu));      \
+       return sprintf(buf, "%d\n", topology_##name(dev->id));  \
 }
 
 #if defined(topology_thread_cpumask) || defined(topology_core_cpumask) || \
index fbae63e3d304350261e536159e960ab70b5ba409..6e9f74a5c0950369be357b60a320fcac21578d45 100644 (file)
@@ -40,7 +40,7 @@ config SGI_MBCS
 source "drivers/tty/serial/Kconfig"
 
 config TTY_PRINTK
-       bool "TTY driver to output user messages via printk"
+       tristate "TTY driver to output user messages via printk"
        depends on EXPERT && TTY
        default n
        ---help---
index 8c3b255e629a8253f040175c968905f10a064716..e900961cdd2e8878c9b45dba4b1e30d87fb40b6a 100644 (file)
@@ -61,18 +61,18 @@ static int bcm2835_rng_probe(struct platform_device *pdev)
        }
        bcm2835_rng_ops.priv = (unsigned long)rng_base;
 
+       /* set warm-up count & enable */
+       __raw_writel(RNG_WARMUP_COUNT, rng_base + RNG_STATUS);
+       __raw_writel(RNG_RBGEN, rng_base + RNG_CTRL);
+
        /* register driver */
        err = hwrng_register(&bcm2835_rng_ops);
        if (err) {
                dev_err(dev, "hwrng registration failed\n");
                iounmap(rng_base);
-       } else {
+       } else
                dev_info(dev, "hwrng registered\n");
 
-               /* set warm-up count & enable */
-               __raw_writel(RNG_WARMUP_COUNT, rng_base + RNG_STATUS);
-               __raw_writel(RNG_RBGEN, rng_base + RNG_CTRL);
-       }
        return err;
 }
 
index 0baa8fab4ea7af195589b73319c5712771a9821a..db1c9b7adaa6670f4a5d1d3f6a40d9249a98a501 100644 (file)
@@ -50,6 +50,18 @@ config IPMI_SI
         Currently, only KCS and SMIC are supported.  If
         you are using IPMI, you should probably say "y" here.
 
+config IPMI_SI_PROBE_DEFAULTS
+       bool 'Probe for all possible IPMI system interfaces by default'
+       default n
+       depends on IPMI_SI
+       help
+        Modern systems will usually expose IPMI interfaces via a discoverable
+        firmware mechanism such as ACPI or DMI. Older systems do not, and so
+        the driver is forced to probe hardware manually. This may cause boot
+        delays. Say "n" here to disable this manual probing. IPMI will then
+        only be available on older systems if the "ipmi_si_intf.trydefaults=1"
+        boot argument is passed.
+
 config IPMI_WATCHDOG
        tristate 'IPMI Watchdog Timer'
        help
index f5e4cd7617f689fc11c4cb6ee49c58fb8818479a..61e71616689b7c3bd5441230b5af30df79df837c 100644 (file)
@@ -352,7 +352,7 @@ static inline void write_all_bytes(struct si_sm_data *bt)
 
 static inline int read_all_bytes(struct si_sm_data *bt)
 {
-       unsigned char i;
+       unsigned int i;
 
        /*
         * length is "framing info", minimum = 4: NetFn, Seq, Cmd, cCode.
index 6a4bdc18955a52070d41af4adb61c6728248704a..8c25f596808a9a2b50d9f14b9a750b26fc079b74 100644 (file)
@@ -251,8 +251,9 @@ static inline int check_obf(struct si_sm_data *kcs, unsigned char status,
        if (!GET_STATUS_OBF(status)) {
                kcs->obf_timeout -= time;
                if (kcs->obf_timeout < 0) {
-                   start_error_recovery(kcs, "OBF not ready in time");
-                   return 1;
+                       kcs->obf_timeout = OBF_RETRY_TIMEOUT;
+                       start_error_recovery(kcs, "OBF not ready in time");
+                       return 1;
                }
                return 0;
        }
index ec4e10fcf1a51b58f690ad329bdc068bc8252c2f..e6db9381b2c7656886020da0a441fa9558a1ab08 100644 (file)
@@ -55,6 +55,7 @@ static struct ipmi_recv_msg *ipmi_alloc_recv_msg(void);
 static int ipmi_init_msghandler(void);
 static void smi_recv_tasklet(unsigned long);
 static void handle_new_recv_msgs(ipmi_smi_t intf);
+static void need_waiter(ipmi_smi_t intf);
 
 static int initialized;
 
@@ -73,14 +74,28 @@ static struct proc_dir_entry *proc_ipmi_root;
  */
 #define MAX_MSG_TIMEOUT                60000
 
+/* Call every ~1000 ms. */
+#define IPMI_TIMEOUT_TIME      1000
+
+/* How many jiffies does it take to get to the timeout time. */
+#define IPMI_TIMEOUT_JIFFIES   ((IPMI_TIMEOUT_TIME * HZ) / 1000)
+
+/*
+ * Request events from the queue every second (this is the number of
+ * IPMI_TIMEOUT_TIMES between event requests).  Hopefully, in the
+ * future, IPMI will add a way to know immediately if an event is in
+ * the queue and this silliness can go away.
+ */
+#define IPMI_REQUEST_EV_TIME   (1000 / (IPMI_TIMEOUT_TIME))
+
 /*
  * The main "user" data structure.
  */
 struct ipmi_user {
        struct list_head link;
 
-       /* Set to "0" when the user is destroyed. */
-       int valid;
+       /* Set to false when the user is destroyed. */
+       bool valid;
 
        struct kref refcount;
 
@@ -92,7 +107,7 @@ struct ipmi_user {
        ipmi_smi_t intf;
 
        /* Does this interface receive IPMI events? */
-       int gets_events;
+       bool gets_events;
 };
 
 struct cmd_rcvr {
@@ -383,6 +398,9 @@ struct ipmi_smi {
        unsigned int     waiting_events_count; /* How many events in queue? */
        char             delivering_events;
        char             event_msg_printed;
+       atomic_t         event_waiters;
+       unsigned int     ticks_to_req_ev;
+       int              last_needs_timer;
 
        /*
         * The event receiver for my BMC, only really used at panic
@@ -395,7 +413,7 @@ struct ipmi_smi {
 
        /* For handling of maintenance mode. */
        int maintenance_mode;
-       int maintenance_mode_enable;
+       bool maintenance_mode_enable;
        int auto_maintenance_timeout;
        spinlock_t maintenance_mode_lock; /* Used in a timer... */
 
@@ -451,7 +469,6 @@ static DEFINE_MUTEX(ipmi_interfaces_mutex);
 static LIST_HEAD(smi_watchers);
 static DEFINE_MUTEX(smi_watchers_mutex);
 
-
 #define ipmi_inc_stat(intf, stat) \
        atomic_inc(&(intf)->stats[IPMI_STAT_ ## stat])
 #define ipmi_get_stat(intf, stat) \
@@ -772,6 +789,7 @@ static int intf_next_seq(ipmi_smi_t           intf,
                *seq = i;
                *seqid = intf->seq_table[i].seqid;
                intf->curr_seq = (i+1)%IPMI_IPMB_NUM_SEQ;
+               need_waiter(intf);
        } else {
                rv = -EAGAIN;
        }
@@ -941,7 +959,7 @@ int ipmi_create_user(unsigned int          if_num,
        new_user->handler = handler;
        new_user->handler_data = handler_data;
        new_user->intf = intf;
-       new_user->gets_events = 0;
+       new_user->gets_events = false;
 
        if (!try_module_get(intf->handlers->owner)) {
                rv = -ENODEV;
@@ -962,10 +980,15 @@ int ipmi_create_user(unsigned int          if_num,
         */
        mutex_unlock(&ipmi_interfaces_mutex);
 
-       new_user->valid = 1;
+       new_user->valid = true;
        spin_lock_irqsave(&intf->seq_lock, flags);
        list_add_rcu(&new_user->link, &intf->users);
        spin_unlock_irqrestore(&intf->seq_lock, flags);
+       if (handler->ipmi_watchdog_pretimeout) {
+               /* User wants pretimeouts, so make sure to watch for them. */
+               if (atomic_inc_return(&intf->event_waiters) == 1)
+                       need_waiter(intf);
+       }
        *user = new_user;
        return 0;
 
@@ -1019,7 +1042,13 @@ int ipmi_destroy_user(ipmi_user_t user)
        struct cmd_rcvr  *rcvr;
        struct cmd_rcvr  *rcvrs = NULL;
 
-       user->valid = 0;
+       user->valid = false;
+
+       if (user->handler->ipmi_watchdog_pretimeout)
+               atomic_dec(&intf->event_waiters);
+
+       if (user->gets_events)
+               atomic_dec(&intf->event_waiters);
 
        /* Remove the user from the interface's sequence table. */
        spin_lock_irqsave(&intf->seq_lock, flags);
@@ -1155,25 +1184,23 @@ int ipmi_set_maintenance_mode(ipmi_user_t user, int mode)
        if (intf->maintenance_mode != mode) {
                switch (mode) {
                case IPMI_MAINTENANCE_MODE_AUTO:
-                       intf->maintenance_mode = mode;
                        intf->maintenance_mode_enable
                                = (intf->auto_maintenance_timeout > 0);
                        break;
 
                case IPMI_MAINTENANCE_MODE_OFF:
-                       intf->maintenance_mode = mode;
-                       intf->maintenance_mode_enable = 0;
+                       intf->maintenance_mode_enable = false;
                        break;
 
                case IPMI_MAINTENANCE_MODE_ON:
-                       intf->maintenance_mode = mode;
-                       intf->maintenance_mode_enable = 1;
+                       intf->maintenance_mode_enable = true;
                        break;
 
                default:
                        rv = -EINVAL;
                        goto out_unlock;
                }
+               intf->maintenance_mode = mode;
 
                maintenance_mode_update(intf);
        }
@@ -1184,7 +1211,7 @@ int ipmi_set_maintenance_mode(ipmi_user_t user, int mode)
 }
 EXPORT_SYMBOL(ipmi_set_maintenance_mode);
 
-int ipmi_set_gets_events(ipmi_user_t user, int val)
+int ipmi_set_gets_events(ipmi_user_t user, bool val)
 {
        unsigned long        flags;
        ipmi_smi_t           intf = user->intf;
@@ -1194,8 +1221,18 @@ int ipmi_set_gets_events(ipmi_user_t user, int val)
        INIT_LIST_HEAD(&msgs);
 
        spin_lock_irqsave(&intf->events_lock, flags);
+       if (user->gets_events == val)
+               goto out;
+
        user->gets_events = val;
 
+       if (val) {
+               if (atomic_inc_return(&intf->event_waiters) == 1)
+                       need_waiter(intf);
+       } else {
+               atomic_dec(&intf->event_waiters);
+       }
+
        if (intf->delivering_events)
                /*
                 * Another thread is delivering events for this, so
@@ -1289,6 +1326,9 @@ int ipmi_register_for_cmd(ipmi_user_t   user,
                goto out_unlock;
        }
 
+       if (atomic_inc_return(&intf->event_waiters) == 1)
+               need_waiter(intf);
+
        list_add_rcu(&rcvr->link, &intf->cmd_rcvrs);
 
  out_unlock:
@@ -1330,6 +1370,7 @@ int ipmi_unregister_for_cmd(ipmi_user_t   user,
        mutex_unlock(&intf->cmd_rcvrs_mutex);
        synchronize_rcu();
        while (rcvrs) {
+               atomic_dec(&intf->event_waiters);
                rcvr = rcvrs;
                rcvrs = rcvr->next;
                kfree(rcvr);
@@ -1535,7 +1576,7 @@ static int i_ipmi_request(ipmi_user_t          user,
                                = IPMI_MAINTENANCE_MODE_TIMEOUT;
                        if (!intf->maintenance_mode
                            && !intf->maintenance_mode_enable) {
-                               intf->maintenance_mode_enable = 1;
+                               intf->maintenance_mode_enable = true;
                                maintenance_mode_update(intf);
                        }
                        spin_unlock_irqrestore(&intf->maintenance_mode_lock,
@@ -2876,6 +2917,8 @@ int ipmi_register_smi(struct ipmi_smi_handlers *handlers,
                     (unsigned long) intf);
        atomic_set(&intf->watchdog_pretimeouts_to_deliver, 0);
        spin_lock_init(&intf->events_lock);
+       atomic_set(&intf->event_waiters, 0);
+       intf->ticks_to_req_ev = IPMI_REQUEST_EV_TIME;
        INIT_LIST_HEAD(&intf->waiting_events);
        intf->waiting_events_count = 0;
        mutex_init(&intf->cmd_rcvrs_mutex);
@@ -3965,7 +4008,8 @@ smi_from_recv_msg(ipmi_smi_t intf, struct ipmi_recv_msg *recv_msg,
 
 static void check_msg_timeout(ipmi_smi_t intf, struct seq_table *ent,
                              struct list_head *timeouts, long timeout_period,
-                             int slot, unsigned long *flags)
+                             int slot, unsigned long *flags,
+                             unsigned int *waiting_msgs)
 {
        struct ipmi_recv_msg     *msg;
        struct ipmi_smi_handlers *handlers;
@@ -3977,8 +4021,10 @@ static void check_msg_timeout(ipmi_smi_t intf, struct seq_table *ent,
                return;
 
        ent->timeout -= timeout_period;
-       if (ent->timeout > 0)
+       if (ent->timeout > 0) {
+               (*waiting_msgs)++;
                return;
+       }
 
        if (ent->retries_left == 0) {
                /* The message has used all its retries. */
@@ -3995,6 +4041,8 @@ static void check_msg_timeout(ipmi_smi_t intf, struct seq_table *ent,
                struct ipmi_smi_msg *smi_msg;
                /* More retries, send again. */
 
+               (*waiting_msgs)++;
+
                /*
                 * Start with the max timer, set to normal timer after
                 * the message is sent.
@@ -4040,117 +4088,118 @@ static void check_msg_timeout(ipmi_smi_t intf, struct seq_table *ent,
        }
 }
 
-static void ipmi_timeout_handler(long timeout_period)
+static unsigned int ipmi_timeout_handler(ipmi_smi_t intf, long timeout_period)
 {
-       ipmi_smi_t           intf;
        struct list_head     timeouts;
        struct ipmi_recv_msg *msg, *msg2;
        unsigned long        flags;
        int                  i;
+       unsigned int         waiting_msgs = 0;
 
-       rcu_read_lock();
-       list_for_each_entry_rcu(intf, &ipmi_interfaces, link) {
-               tasklet_schedule(&intf->recv_tasklet);
-
-               /*
-                * Go through the seq table and find any messages that
-                * have timed out, putting them in the timeouts
-                * list.
-                */
-               INIT_LIST_HEAD(&timeouts);
-               spin_lock_irqsave(&intf->seq_lock, flags);
-               for (i = 0; i < IPMI_IPMB_NUM_SEQ; i++)
-                       check_msg_timeout(intf, &(intf->seq_table[i]),
-                                         &timeouts, timeout_period, i,
-                                         &flags);
-               spin_unlock_irqrestore(&intf->seq_lock, flags);
+       /*
+        * Go through the seq table and find any messages that
+        * have timed out, putting them in the timeouts
+        * list.
+        */
+       INIT_LIST_HEAD(&timeouts);
+       spin_lock_irqsave(&intf->seq_lock, flags);
+       for (i = 0; i < IPMI_IPMB_NUM_SEQ; i++)
+               check_msg_timeout(intf, &(intf->seq_table[i]),
+                                 &timeouts, timeout_period, i,
+                                 &flags, &waiting_msgs);
+       spin_unlock_irqrestore(&intf->seq_lock, flags);
 
-               list_for_each_entry_safe(msg, msg2, &timeouts, link)
-                       deliver_err_response(msg, IPMI_TIMEOUT_COMPLETION_CODE);
+       list_for_each_entry_safe(msg, msg2, &timeouts, link)
+               deliver_err_response(msg, IPMI_TIMEOUT_COMPLETION_CODE);
 
-               /*
-                * Maintenance mode handling.  Check the timeout
-                * optimistically before we claim the lock.  It may
-                * mean a timeout gets missed occasionally, but that
-                * only means the timeout gets extended by one period
-                * in that case.  No big deal, and it avoids the lock
-                * most of the time.
-                */
+       /*
+        * Maintenance mode handling.  Check the timeout
+        * optimistically before we claim the lock.  It may
+        * mean a timeout gets missed occasionally, but that
+        * only means the timeout gets extended by one period
+        * in that case.  No big deal, and it avoids the lock
+        * most of the time.
+        */
+       if (intf->auto_maintenance_timeout > 0) {
+               spin_lock_irqsave(&intf->maintenance_mode_lock, flags);
                if (intf->auto_maintenance_timeout > 0) {
-                       spin_lock_irqsave(&intf->maintenance_mode_lock, flags);
-                       if (intf->auto_maintenance_timeout > 0) {
-                               intf->auto_maintenance_timeout
-                                       -= timeout_period;
-                               if (!intf->maintenance_mode
-                                   && (intf->auto_maintenance_timeout <= 0)) {
-                                       intf->maintenance_mode_enable = 0;
-                                       maintenance_mode_update(intf);
-                               }
+                       intf->auto_maintenance_timeout
+                               -= timeout_period;
+                       if (!intf->maintenance_mode
+                           && (intf->auto_maintenance_timeout <= 0)) {
+                               intf->maintenance_mode_enable = false;
+                               maintenance_mode_update(intf);
                        }
-                       spin_unlock_irqrestore(&intf->maintenance_mode_lock,
-                                              flags);
                }
+               spin_unlock_irqrestore(&intf->maintenance_mode_lock,
+                                      flags);
        }
-       rcu_read_unlock();
+
+       tasklet_schedule(&intf->recv_tasklet);
+
+       return waiting_msgs;
 }
 
-static void ipmi_request_event(void)
+static void ipmi_request_event(ipmi_smi_t intf)
 {
-       ipmi_smi_t               intf;
        struct ipmi_smi_handlers *handlers;
 
-       rcu_read_lock();
-       /*
-        * Called from the timer, no need to check if handlers is
-        * valid.
-        */
-       list_for_each_entry_rcu(intf, &ipmi_interfaces, link) {
-               /* No event requests when in maintenance mode. */
-               if (intf->maintenance_mode_enable)
-                       continue;
+       /* No event requests when in maintenance mode. */
+       if (intf->maintenance_mode_enable)
+               return;
 
-               handlers = intf->handlers;
-               if (handlers)
-                       handlers->request_events(intf->send_info);
-       }
-       rcu_read_unlock();
+       handlers = intf->handlers;
+       if (handlers)
+               handlers->request_events(intf->send_info);
 }
 
 static struct timer_list ipmi_timer;
 
-/* Call every ~1000 ms. */
-#define IPMI_TIMEOUT_TIME      1000
-
-/* How many jiffies does it take to get to the timeout time. */
-#define IPMI_TIMEOUT_JIFFIES   ((IPMI_TIMEOUT_TIME * HZ) / 1000)
-
-/*
- * Request events from the queue every second (this is the number of
- * IPMI_TIMEOUT_TIMES between event requests).  Hopefully, in the
- * future, IPMI will add a way to know immediately if an event is in
- * the queue and this silliness can go away.
- */
-#define IPMI_REQUEST_EV_TIME   (1000 / (IPMI_TIMEOUT_TIME))
-
 static atomic_t stop_operation;
-static unsigned int ticks_to_req_ev = IPMI_REQUEST_EV_TIME;
 
 static void ipmi_timeout(unsigned long data)
 {
+       ipmi_smi_t intf;
+       int nt = 0;
+
        if (atomic_read(&stop_operation))
                return;
 
-       ticks_to_req_ev--;
-       if (ticks_to_req_ev == 0) {
-               ipmi_request_event();
-               ticks_to_req_ev = IPMI_REQUEST_EV_TIME;
-       }
+       rcu_read_lock();
+       list_for_each_entry_rcu(intf, &ipmi_interfaces, link) {
+               int lnt = 0;
+
+               if (atomic_read(&intf->event_waiters)) {
+                       intf->ticks_to_req_ev--;
+                       if (intf->ticks_to_req_ev == 0) {
+                               ipmi_request_event(intf);
+                               intf->ticks_to_req_ev = IPMI_REQUEST_EV_TIME;
+                       }
+                       lnt++;
+               }
 
-       ipmi_timeout_handler(IPMI_TIMEOUT_TIME);
+               lnt += ipmi_timeout_handler(intf, IPMI_TIMEOUT_TIME);
 
-       mod_timer(&ipmi_timer, jiffies + IPMI_TIMEOUT_JIFFIES);
+               lnt = !!lnt;
+               if (lnt != intf->last_needs_timer &&
+                                       intf->handlers->set_need_watch)
+                       intf->handlers->set_need_watch(intf->send_info, lnt);
+               intf->last_needs_timer = lnt;
+
+               nt += lnt;
+       }
+       rcu_read_unlock();
+
+       if (nt)
+               mod_timer(&ipmi_timer, jiffies + IPMI_TIMEOUT_JIFFIES);
 }
 
+static void need_waiter(ipmi_smi_t intf)
+{
+       /* Racy, but worst case we start the timer twice. */
+       if (!timer_pending(&ipmi_timer))
+               mod_timer(&ipmi_timer, jiffies + IPMI_TIMEOUT_JIFFIES);
+}
 
 static atomic_t smi_msg_inuse_count = ATOMIC_INIT(0);
 static atomic_t recv_msg_inuse_count = ATOMIC_INIT(0);
index b7efd3c1a882525431da787f1679e33729243f82..1c4bb4f6ce932f95043385d1387ed14b789a9996 100644 (file)
@@ -217,7 +217,7 @@ struct smi_info {
        unsigned char       msg_flags;
 
        /* Does the BMC have an event buffer? */
-       char                has_event_buffer;
+       bool                has_event_buffer;
 
        /*
         * If set to true, this will request events the next time the
@@ -230,7 +230,7 @@ struct smi_info {
         * call.  Generally used after a panic to make sure stuff goes
         * out.
         */
-       int                 run_to_completion;
+       bool                run_to_completion;
 
        /* The I/O port of an SI interface. */
        int                 port;
@@ -248,19 +248,25 @@ struct smi_info {
        /* The timer for this si. */
        struct timer_list   si_timer;
 
+       /* This flag is set, if the timer is running (timer_pending() isn't enough) */
+       bool                timer_running;
+
        /* The time (in jiffies) the last timeout occurred at. */
        unsigned long       last_timeout_jiffies;
 
        /* Used to gracefully stop the timer without race conditions. */
        atomic_t            stop_operation;
 
+       /* Are we waiting for the events, pretimeouts, received msgs? */
+       atomic_t            need_watch;
+
        /*
         * The driver will disable interrupts when it gets into a
         * situation where it cannot handle messages due to lack of
         * memory.  Once that situation clears up, it will re-enable
         * interrupts.
         */
-       int interrupt_disabled;
+       bool interrupt_disabled;
 
        /* From the get device id response... */
        struct ipmi_device_id device_id;
@@ -273,7 +279,7 @@ struct smi_info {
         * True if we allocated the device, false if it came from
         * someplace else (like PCI).
         */
-       int dev_registered;
+       bool dev_registered;
 
        /* Slave address, could be reported from DMI. */
        unsigned char slave_addr;
@@ -297,19 +303,19 @@ struct smi_info {
 static int force_kipmid[SI_MAX_PARMS];
 static int num_force_kipmid;
 #ifdef CONFIG_PCI
-static int pci_registered;
+static bool pci_registered;
 #endif
 #ifdef CONFIG_ACPI
-static int pnp_registered;
+static bool pnp_registered;
 #endif
 #ifdef CONFIG_PARISC
-static int parisc_registered;
+static bool parisc_registered;
 #endif
 
 static unsigned int kipmid_max_busy_us[SI_MAX_PARMS];
 static int num_max_busy_us;
 
-static int unload_when_empty = 1;
+static bool unload_when_empty = true;
 
 static int add_smi(struct smi_info *smi);
 static int try_smi_init(struct smi_info *smi);
@@ -434,6 +440,13 @@ static void start_clear_flags(struct smi_info *smi_info)
        smi_info->si_state = SI_CLEARING_FLAGS;
 }
 
+static void smi_mod_timer(struct smi_info *smi_info, unsigned long new_val)
+{
+       smi_info->last_timeout_jiffies = jiffies;
+       mod_timer(&smi_info->si_timer, new_val);
+       smi_info->timer_running = true;
+}
+
 /*
  * When we have a situtaion where we run out of memory and cannot
  * allocate messages, we just leave them in the BMC and run the system
@@ -444,10 +457,9 @@ static inline void disable_si_irq(struct smi_info *smi_info)
 {
        if ((smi_info->irq) && (!smi_info->interrupt_disabled)) {
                start_disable_irq(smi_info);
-               smi_info->interrupt_disabled = 1;
+               smi_info->interrupt_disabled = true;
                if (!atomic_read(&smi_info->stop_operation))
-                       mod_timer(&smi_info->si_timer,
-                                 jiffies + SI_TIMEOUT_JIFFIES);
+                       smi_mod_timer(smi_info, jiffies + SI_TIMEOUT_JIFFIES);
        }
 }
 
@@ -455,7 +467,7 @@ static inline void enable_si_irq(struct smi_info *smi_info)
 {
        if ((smi_info->irq) && (smi_info->interrupt_disabled)) {
                start_enable_irq(smi_info);
-               smi_info->interrupt_disabled = 0;
+               smi_info->interrupt_disabled = false;
        }
 }
 
@@ -700,7 +712,7 @@ static void handle_transaction_done(struct smi_info *smi_info)
                        dev_warn(smi_info->dev,
                                 "Maybe ok, but ipmi might run very slowly.\n");
                } else
-                       smi_info->interrupt_disabled = 0;
+                       smi_info->interrupt_disabled = false;
                smi_info->si_state = SI_NORMAL;
                break;
        }
@@ -853,6 +865,19 @@ static enum si_sm_result smi_event_handler(struct smi_info *smi_info,
        return si_sm_result;
 }
 
+static void check_start_timer_thread(struct smi_info *smi_info)
+{
+       if (smi_info->si_state == SI_NORMAL && smi_info->curr_msg == NULL) {
+               smi_mod_timer(smi_info, jiffies + SI_TIMEOUT_JIFFIES);
+
+               if (smi_info->thread)
+                       wake_up_process(smi_info->thread);
+
+               start_next_msg(smi_info);
+               smi_event_handler(smi_info, 0);
+       }
+}
+
 static void sender(void                *send_info,
                   struct ipmi_smi_msg *msg,
                   int                 priority)
@@ -906,27 +931,11 @@ static void sender(void                *send_info,
        else
                list_add_tail(&msg->link, &smi_info->xmit_msgs);
 
-       if (smi_info->si_state == SI_NORMAL && smi_info->curr_msg == NULL) {
-               /*
-                * last_timeout_jiffies is updated here to avoid
-                * smi_timeout() handler passing very large time_diff
-                * value to smi_event_handler() that causes
-                * the send command to abort.
-                */
-               smi_info->last_timeout_jiffies = jiffies;
-
-               mod_timer(&smi_info->si_timer, jiffies + SI_TIMEOUT_JIFFIES);
-
-               if (smi_info->thread)
-                       wake_up_process(smi_info->thread);
-
-               start_next_msg(smi_info);
-               smi_event_handler(smi_info, 0);
-       }
+       check_start_timer_thread(smi_info);
        spin_unlock_irqrestore(&smi_info->si_lock, flags);
 }
 
-static void set_run_to_completion(void *send_info, int i_run_to_completion)
+static void set_run_to_completion(void *send_info, bool i_run_to_completion)
 {
        struct smi_info   *smi_info = send_info;
        enum si_sm_result result;
@@ -1004,6 +1013,17 @@ static int ipmi_thread(void *data)
 
                spin_lock_irqsave(&(smi_info->si_lock), flags);
                smi_result = smi_event_handler(smi_info, 0);
+
+               /*
+                * If the driver is doing something, there is a possible
+                * race with the timer.  If the timer handler see idle,
+                * and the thread here sees something else, the timer
+                * handler won't restart the timer even though it is
+                * required.  So start it here if necessary.
+                */
+               if (smi_result != SI_SM_IDLE && !smi_info->timer_running)
+                       smi_mod_timer(smi_info, jiffies + SI_TIMEOUT_JIFFIES);
+
                spin_unlock_irqrestore(&(smi_info->si_lock), flags);
                busy_wait = ipmi_thread_busy_wait(smi_result, smi_info,
                                                  &busy_until);
@@ -1011,9 +1031,15 @@ static int ipmi_thread(void *data)
                        ; /* do nothing */
                else if (smi_result == SI_SM_CALL_WITH_DELAY && busy_wait)
                        schedule();
-               else if (smi_result == SI_SM_IDLE)
-                       schedule_timeout_interruptible(100);
-               else
+               else if (smi_result == SI_SM_IDLE) {
+                       if (atomic_read(&smi_info->need_watch)) {
+                               schedule_timeout_interruptible(100);
+                       } else {
+                               /* Wait to be woken up when we are needed. */
+                               __set_current_state(TASK_INTERRUPTIBLE);
+                               schedule();
+                       }
+               } else
                        schedule_timeout_interruptible(1);
        }
        return 0;
@@ -1024,7 +1050,7 @@ static void poll(void *send_info)
 {
        struct smi_info *smi_info = send_info;
        unsigned long flags = 0;
-       int run_to_completion = smi_info->run_to_completion;
+       bool run_to_completion = smi_info->run_to_completion;
 
        /*
         * Make sure there is some delay in the poll loop so we can
@@ -1049,6 +1075,17 @@ static void request_events(void *send_info)
        atomic_set(&smi_info->req_events, 1);
 }
 
+static void set_need_watch(void *send_info, bool enable)
+{
+       struct smi_info *smi_info = send_info;
+       unsigned long flags;
+
+       atomic_set(&smi_info->need_watch, enable);
+       spin_lock_irqsave(&smi_info->si_lock, flags);
+       check_start_timer_thread(smi_info);
+       spin_unlock_irqrestore(&smi_info->si_lock, flags);
+}
+
 static int initialized;
 
 static void smi_timeout(unsigned long data)
@@ -1073,10 +1110,6 @@ static void smi_timeout(unsigned long data)
                     * SI_USEC_PER_JIFFY);
        smi_result = smi_event_handler(smi_info, time_diff);
 
-       spin_unlock_irqrestore(&(smi_info->si_lock), flags);
-
-       smi_info->last_timeout_jiffies = jiffies_now;
-
        if ((smi_info->irq) && (!smi_info->interrupt_disabled)) {
                /* Running with interrupts, only do long timeouts. */
                timeout = jiffies + SI_TIMEOUT_JIFFIES;
@@ -1098,7 +1131,10 @@ static void smi_timeout(unsigned long data)
 
  do_mod_timer:
        if (smi_result != SI_SM_IDLE)
-               mod_timer(&(smi_info->si_timer), timeout);
+               smi_mod_timer(smi_info, timeout);
+       else
+               smi_info->timer_running = false;
+       spin_unlock_irqrestore(&(smi_info->si_lock), flags);
 }
 
 static irqreturn_t si_irq_handler(int irq, void *data)
@@ -1146,8 +1182,7 @@ static int smi_start_processing(void       *send_info,
 
        /* Set up the timer that drives the interface. */
        setup_timer(&new_smi->si_timer, smi_timeout, (long)new_smi);
-       new_smi->last_timeout_jiffies = jiffies;
-       mod_timer(&new_smi->si_timer, jiffies + SI_TIMEOUT_JIFFIES);
+       smi_mod_timer(new_smi, jiffies + SI_TIMEOUT_JIFFIES);
 
        /*
         * Check if the user forcefully enabled the daemon.
@@ -1188,7 +1223,7 @@ static int get_smi_info(void *send_info, struct ipmi_smi_info *data)
        return 0;
 }
 
-static void set_maintenance_mode(void *send_info, int enable)
+static void set_maintenance_mode(void *send_info, bool enable)
 {
        struct smi_info   *smi_info = send_info;
 
@@ -1202,6 +1237,7 @@ static struct ipmi_smi_handlers handlers = {
        .get_smi_info           = get_smi_info,
        .sender                 = sender,
        .request_events         = request_events,
+       .set_need_watch         = set_need_watch,
        .set_maintenance_mode   = set_maintenance_mode,
        .set_run_to_completion  = set_run_to_completion,
        .poll                   = poll,
@@ -1229,7 +1265,7 @@ static bool          si_tryplatform = 1;
 #ifdef CONFIG_PCI
 static bool          si_trypci = 1;
 #endif
-static bool          si_trydefaults = 1;
+static bool          si_trydefaults = IS_ENABLED(CONFIG_IPMI_SI_PROBE_DEFAULTS);
 static char          *si_type[SI_MAX_PARMS];
 #define MAX_SI_TYPE_STR 30
 static char          si_type_str[MAX_SI_TYPE_STR];
@@ -1328,7 +1364,7 @@ module_param_array(force_kipmid, int, &num_force_kipmid, 0);
 MODULE_PARM_DESC(force_kipmid, "Force the kipmi daemon to be enabled (1) or"
                 " disabled(0).  Normally the IPMI driver auto-detects"
                 " this, but the value may be overridden by this parm.");
-module_param(unload_when_empty, int, 0);
+module_param(unload_when_empty, bool, 0);
 MODULE_PARM_DESC(unload_when_empty, "Unload the module if no interfaces are"
                 " specified or found, default is 1.  Setting to 0"
                 " is useful for hot add of devices using hotmod.");
@@ -3336,18 +3372,19 @@ static int try_smi_init(struct smi_info *new_smi)
        INIT_LIST_HEAD(&(new_smi->hp_xmit_msgs));
        new_smi->curr_msg = NULL;
        atomic_set(&new_smi->req_events, 0);
-       new_smi->run_to_completion = 0;
+       new_smi->run_to_completion = false;
        for (i = 0; i < SI_NUM_STATS; i++)
                atomic_set(&new_smi->stats[i], 0);
 
-       new_smi->interrupt_disabled = 1;
+       new_smi->interrupt_disabled = true;
        atomic_set(&new_smi->stop_operation, 0);
+       atomic_set(&new_smi->need_watch, 0);
        new_smi->intf_num = smi_num;
        smi_num++;
 
        rv = try_enable_event_buffer(new_smi);
        if (rv == 0)
-               new_smi->has_event_buffer = 1;
+               new_smi->has_event_buffer = true;
 
        /*
         * Start clearing the flags before we enable interrupts or the
@@ -3381,7 +3418,7 @@ static int try_smi_init(struct smi_info *new_smi)
                               rv);
                        goto out_err;
                }
-               new_smi->dev_registered = 1;
+               new_smi->dev_registered = true;
        }
 
        rv = ipmi_register_smi(&handlers,
@@ -3430,7 +3467,7 @@ static int try_smi_init(struct smi_info *new_smi)
        wait_for_timer_and_thread(new_smi);
 
  out_err:
-       new_smi->interrupt_disabled = 1;
+       new_smi->interrupt_disabled = true;
 
        if (new_smi->intf) {
                ipmi_unregister_smi(new_smi->intf);
@@ -3466,7 +3503,7 @@ static int try_smi_init(struct smi_info *new_smi)
 
        if (new_smi->dev_registered) {
                platform_device_unregister(new_smi->pdev);
-               new_smi->dev_registered = 0;
+               new_smi->dev_registered = false;
        }
 
        return rv;
@@ -3521,14 +3558,14 @@ static int init_ipmi_si(void)
                        printk(KERN_ERR PFX "Unable to register "
                               "PCI driver: %d\n", rv);
                else
-                       pci_registered = 1;
+                       pci_registered = true;
        }
 #endif
 
 #ifdef CONFIG_ACPI
        if (si_tryacpi) {
                pnp_register_driver(&ipmi_pnp_driver);
-               pnp_registered = 1;
+               pnp_registered = true;
        }
 #endif
 
@@ -3544,7 +3581,7 @@ static int init_ipmi_si(void)
 
 #ifdef CONFIG_PARISC
        register_parisc_driver(&ipmi_parisc_driver);
-       parisc_registered = 1;
+       parisc_registered = true;
        /* poking PC IO addresses will crash machine, don't do it */
        si_trydefaults = 0;
 #endif
index b27f5342fe76157b5ebcf39077b981a3da180eb3..8d3dfb0c8a2625e827c977aa4b11207b2d455046 100644 (file)
@@ -15,7 +15,7 @@ config SYNCLINK_CS
 
          This driver may be built as a module ( = code which can be
          inserted in and removed from the running kernel whenever you want).
-         The module will be called synclinkmp.  If you want to do that, say M
+         The module will be called synclink_cs.  If you want to do that, say M
          here.
 
 config CARDMAN_4000
index daea84c4174321e852e6160b7d4ac51739799fd3..a15ce4ef39cd97cbef47f5ca31579700ffb0e572 100644 (file)
@@ -17,7 +17,7 @@
 #include <linux/device.h>
 #include <linux/serial.h>
 #include <linux/tty.h>
-#include <linux/export.h>
+#include <linux/module.h>
 
 struct ttyprintk_port {
        struct tty_port port;
@@ -210,10 +210,19 @@ static int __init ttyprintk_init(void)
        return 0;
 
 error:
-       tty_unregister_driver(ttyprintk_driver);
        put_tty_driver(ttyprintk_driver);
        tty_port_destroy(&tpk_port.port);
-       ttyprintk_driver = NULL;
        return ret;
 }
+
+static void __exit ttyprintk_exit(void)
+{
+       tty_unregister_driver(ttyprintk_driver);
+       put_tty_driver(ttyprintk_driver);
+       tty_port_destroy(&tpk_port.port);
+}
+
 device_initcall(ttyprintk_init);
+module_exit(ttyprintk_exit);
+
+MODULE_LICENSE("GPL");
index 46c1d3d0d66b00b62b80ba6366c6c22938f4cf6d..4998aee59267de45e83b2b53efd5867586ebb5c5 100644 (file)
@@ -2,8 +2,8 @@
 # Makefile for at91 specific clk
 #
 
-obj-y += pmc.o
-obj-y += clk-main.o clk-pll.o clk-plldiv.o clk-master.o
+obj-y += pmc.o sckc.o
+obj-y += clk-slow.o clk-main.o clk-pll.o clk-plldiv.o clk-master.o
 obj-y += clk-system.o clk-peripheral.o clk-programmable.o
 
 obj-$(CONFIG_HAVE_AT91_UTMI)           += clk-utmi.o
index 8e9e8cc0412dfe3cb3d3a1adc3ed9287637defdf..733306131b99f5798e20aad930c952987247591f 100644 (file)
 #define MAINF_LOOP_MIN_WAIT    (USEC_PER_SEC / SLOW_CLOCK_FREQ)
 #define MAINF_LOOP_MAX_WAIT    MAINFRDY_TIMEOUT
 
-struct clk_main {
+#define MOR_KEY_MASK           (0xff << 16)
+
+struct clk_main_osc {
        struct clk_hw hw;
        struct at91_pmc *pmc;
-       unsigned long rate;
        unsigned int irq;
        wait_queue_head_t wait;
 };
 
-#define to_clk_main(hw) container_of(hw, struct clk_main, hw)
+#define to_clk_main_osc(hw) container_of(hw, struct clk_main_osc, hw)
+
+struct clk_main_rc_osc {
+       struct clk_hw hw;
+       struct at91_pmc *pmc;
+       unsigned int irq;
+       wait_queue_head_t wait;
+       unsigned long frequency;
+       unsigned long accuracy;
+};
+
+#define to_clk_main_rc_osc(hw) container_of(hw, struct clk_main_rc_osc, hw)
+
+struct clk_rm9200_main {
+       struct clk_hw hw;
+       struct at91_pmc *pmc;
+};
+
+#define to_clk_rm9200_main(hw) container_of(hw, struct clk_rm9200_main, hw)
 
-static irqreturn_t clk_main_irq_handler(int irq, void *dev_id)
+struct clk_sam9x5_main {
+       struct clk_hw hw;
+       struct at91_pmc *pmc;
+       unsigned int irq;
+       wait_queue_head_t wait;
+       u8 parent;
+};
+
+#define to_clk_sam9x5_main(hw) container_of(hw, struct clk_sam9x5_main, hw)
+
+static irqreturn_t clk_main_osc_irq_handler(int irq, void *dev_id)
 {
-       struct clk_main *clkmain = (struct clk_main *)dev_id;
+       struct clk_main_osc *osc = dev_id;
 
-       wake_up(&clkmain->wait);
-       disable_irq_nosync(clkmain->irq);
+       wake_up(&osc->wait);
+       disable_irq_nosync(osc->irq);
 
        return IRQ_HANDLED;
 }
 
-static int clk_main_prepare(struct clk_hw *hw)
+static int clk_main_osc_prepare(struct clk_hw *hw)
 {
-       struct clk_main *clkmain = to_clk_main(hw);
-       struct at91_pmc *pmc = clkmain->pmc;
-       unsigned long halt_time, timeout;
+       struct clk_main_osc *osc = to_clk_main_osc(hw);
+       struct at91_pmc *pmc = osc->pmc;
        u32 tmp;
 
+       tmp = pmc_read(pmc, AT91_CKGR_MOR) & ~MOR_KEY_MASK;
+       if (tmp & AT91_PMC_OSCBYPASS)
+               return 0;
+
+       if (!(tmp & AT91_PMC_MOSCEN)) {
+               tmp |= AT91_PMC_MOSCEN | AT91_PMC_KEY;
+               pmc_write(pmc, AT91_CKGR_MOR, tmp);
+       }
+
        while (!(pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCS)) {
-               enable_irq(clkmain->irq);
-               wait_event(clkmain->wait,
+               enable_irq(osc->irq);
+               wait_event(osc->wait,
                           pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCS);
        }
 
-       if (clkmain->rate)
-               return 0;
+       return 0;
+}
+
+static void clk_main_osc_unprepare(struct clk_hw *hw)
+{
+       struct clk_main_osc *osc = to_clk_main_osc(hw);
+       struct at91_pmc *pmc = osc->pmc;
+       u32 tmp = pmc_read(pmc, AT91_CKGR_MOR);
+
+       if (tmp & AT91_PMC_OSCBYPASS)
+               return;
+
+       if (!(tmp & AT91_PMC_MOSCEN))
+               return;
+
+       tmp &= ~(AT91_PMC_KEY | AT91_PMC_MOSCEN);
+       pmc_write(pmc, AT91_CKGR_MOR, tmp | AT91_PMC_KEY);
+}
+
+static int clk_main_osc_is_prepared(struct clk_hw *hw)
+{
+       struct clk_main_osc *osc = to_clk_main_osc(hw);
+       struct at91_pmc *pmc = osc->pmc;
+       u32 tmp = pmc_read(pmc, AT91_CKGR_MOR);
+
+       if (tmp & AT91_PMC_OSCBYPASS)
+               return 1;
+
+       return !!((pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCS) &&
+                 (pmc_read(pmc, AT91_CKGR_MOR) & AT91_PMC_MOSCEN));
+}
+
+static const struct clk_ops main_osc_ops = {
+       .prepare = clk_main_osc_prepare,
+       .unprepare = clk_main_osc_unprepare,
+       .is_prepared = clk_main_osc_is_prepared,
+};
+
+static struct clk * __init
+at91_clk_register_main_osc(struct at91_pmc *pmc,
+                          unsigned int irq,
+                          const char *name,
+                          const char *parent_name,
+                          bool bypass)
+{
+       int ret;
+       struct clk_main_osc *osc;
+       struct clk *clk = NULL;
+       struct clk_init_data init;
+
+       if (!pmc || !irq || !name || !parent_name)
+               return ERR_PTR(-EINVAL);
+
+       osc = kzalloc(sizeof(*osc), GFP_KERNEL);
+       if (!osc)
+               return ERR_PTR(-ENOMEM);
+
+       init.name = name;
+       init.ops = &main_osc_ops;
+       init.parent_names = &parent_name;
+       init.num_parents = 1;
+       init.flags = CLK_IGNORE_UNUSED;
+
+       osc->hw.init = &init;
+       osc->pmc = pmc;
+       osc->irq = irq;
+
+       init_waitqueue_head(&osc->wait);
+       irq_set_status_flags(osc->irq, IRQ_NOAUTOEN);
+       ret = request_irq(osc->irq, clk_main_osc_irq_handler,
+                         IRQF_TRIGGER_HIGH, name, osc);
+       if (ret)
+               return ERR_PTR(ret);
+
+       if (bypass)
+               pmc_write(pmc, AT91_CKGR_MOR,
+                         (pmc_read(pmc, AT91_CKGR_MOR) &
+                          ~(MOR_KEY_MASK | AT91_PMC_MOSCEN)) |
+                         AT91_PMC_OSCBYPASS | AT91_PMC_KEY);
+
+       clk = clk_register(NULL, &osc->hw);
+       if (IS_ERR(clk)) {
+               free_irq(irq, osc);
+               kfree(osc);
+       }
+
+       return clk;
+}
+
+void __init of_at91rm9200_clk_main_osc_setup(struct device_node *np,
+                                            struct at91_pmc *pmc)
+{
+       struct clk *clk;
+       unsigned int irq;
+       const char *name = np->name;
+       const char *parent_name;
+       bool bypass;
+
+       of_property_read_string(np, "clock-output-names", &name);
+       bypass = of_property_read_bool(np, "atmel,osc-bypass");
+       parent_name = of_clk_get_parent_name(np, 0);
+
+       irq = irq_of_parse_and_map(np, 0);
+       if (!irq)
+               return;
+
+       clk = at91_clk_register_main_osc(pmc, irq, name, parent_name, bypass);
+       if (IS_ERR(clk))
+               return;
+
+       of_clk_add_provider(np, of_clk_src_simple_get, clk);
+}
+
+static irqreturn_t clk_main_rc_osc_irq_handler(int irq, void *dev_id)
+{
+       struct clk_main_rc_osc *osc = dev_id;
+
+       wake_up(&osc->wait);
+       disable_irq_nosync(osc->irq);
+
+       return IRQ_HANDLED;
+}
+
+static int clk_main_rc_osc_prepare(struct clk_hw *hw)
+{
+       struct clk_main_rc_osc *osc = to_clk_main_rc_osc(hw);
+       struct at91_pmc *pmc = osc->pmc;
+       u32 tmp;
+
+       tmp = pmc_read(pmc, AT91_CKGR_MOR) & ~MOR_KEY_MASK;
+
+       if (!(tmp & AT91_PMC_MOSCRCEN)) {
+               tmp |= AT91_PMC_MOSCRCEN | AT91_PMC_KEY;
+               pmc_write(pmc, AT91_CKGR_MOR, tmp);
+       }
+
+       while (!(pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCRCS)) {
+               enable_irq(osc->irq);
+               wait_event(osc->wait,
+                          pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCRCS);
+       }
+
+       return 0;
+}
+
+static void clk_main_rc_osc_unprepare(struct clk_hw *hw)
+{
+       struct clk_main_rc_osc *osc = to_clk_main_rc_osc(hw);
+       struct at91_pmc *pmc = osc->pmc;
+       u32 tmp = pmc_read(pmc, AT91_CKGR_MOR);
+
+       if (!(tmp & AT91_PMC_MOSCRCEN))
+               return;
+
+       tmp &= ~(MOR_KEY_MASK | AT91_PMC_MOSCRCEN);
+       pmc_write(pmc, AT91_CKGR_MOR, tmp | AT91_PMC_KEY);
+}
+
+static int clk_main_rc_osc_is_prepared(struct clk_hw *hw)
+{
+       struct clk_main_rc_osc *osc = to_clk_main_rc_osc(hw);
+       struct at91_pmc *pmc = osc->pmc;
+
+       return !!((pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCRCS) &&
+                 (pmc_read(pmc, AT91_CKGR_MOR) & AT91_PMC_MOSCRCEN));
+}
+
+static unsigned long clk_main_rc_osc_recalc_rate(struct clk_hw *hw,
+                                                unsigned long parent_rate)
+{
+       struct clk_main_rc_osc *osc = to_clk_main_rc_osc(hw);
+
+       return osc->frequency;
+}
+
+static unsigned long clk_main_rc_osc_recalc_accuracy(struct clk_hw *hw,
+                                                    unsigned long parent_acc)
+{
+       struct clk_main_rc_osc *osc = to_clk_main_rc_osc(hw);
+
+       return osc->accuracy;
+}
+
+static const struct clk_ops main_rc_osc_ops = {
+       .prepare = clk_main_rc_osc_prepare,
+       .unprepare = clk_main_rc_osc_unprepare,
+       .is_prepared = clk_main_rc_osc_is_prepared,
+       .recalc_rate = clk_main_rc_osc_recalc_rate,
+       .recalc_accuracy = clk_main_rc_osc_recalc_accuracy,
+};
+
+static struct clk * __init
+at91_clk_register_main_rc_osc(struct at91_pmc *pmc,
+                             unsigned int irq,
+                             const char *name,
+                             u32 frequency, u32 accuracy)
+{
+       int ret;
+       struct clk_main_rc_osc *osc;
+       struct clk *clk = NULL;
+       struct clk_init_data init;
+
+       if (!pmc || !irq || !name || !frequency)
+               return ERR_PTR(-EINVAL);
+
+       osc = kzalloc(sizeof(*osc), GFP_KERNEL);
+       if (!osc)
+               return ERR_PTR(-ENOMEM);
+
+       init.name = name;
+       init.ops = &main_rc_osc_ops;
+       init.parent_names = NULL;
+       init.num_parents = 0;
+       init.flags = CLK_IS_ROOT | CLK_IGNORE_UNUSED;
+
+       osc->hw.init = &init;
+       osc->pmc = pmc;
+       osc->irq = irq;
+       osc->frequency = frequency;
+       osc->accuracy = accuracy;
+
+       init_waitqueue_head(&osc->wait);
+       irq_set_status_flags(osc->irq, IRQ_NOAUTOEN);
+       ret = request_irq(osc->irq, clk_main_rc_osc_irq_handler,
+                         IRQF_TRIGGER_HIGH, name, osc);
+       if (ret)
+               return ERR_PTR(ret);
+
+       clk = clk_register(NULL, &osc->hw);
+       if (IS_ERR(clk)) {
+               free_irq(irq, osc);
+               kfree(osc);
+       }
+
+       return clk;
+}
+
+void __init of_at91sam9x5_clk_main_rc_osc_setup(struct device_node *np,
+                                               struct at91_pmc *pmc)
+{
+       struct clk *clk;
+       unsigned int irq;
+       u32 frequency = 0;
+       u32 accuracy = 0;
+       const char *name = np->name;
+
+       of_property_read_string(np, "clock-output-names", &name);
+       of_property_read_u32(np, "clock-frequency", &frequency);
+       of_property_read_u32(np, "clock-accuracy", &accuracy);
+
+       irq = irq_of_parse_and_map(np, 0);
+       if (!irq)
+               return;
+
+       clk = at91_clk_register_main_rc_osc(pmc, irq, name, frequency,
+                                           accuracy);
+       if (IS_ERR(clk))
+               return;
+
+       of_clk_add_provider(np, of_clk_src_simple_get, clk);
+}
+
+
+static int clk_main_probe_frequency(struct at91_pmc *pmc)
+{
+       unsigned long prep_time, timeout;
+       u32 tmp;
 
        timeout = jiffies + usecs_to_jiffies(MAINFRDY_TIMEOUT);
        do {
-               halt_time = jiffies;
+               prep_time = jiffies;
                tmp = pmc_read(pmc, AT91_CKGR_MCFR);
                if (tmp & AT91_PMC_MAINRDY)
                        return 0;
                usleep_range(MAINF_LOOP_MIN_WAIT, MAINF_LOOP_MAX_WAIT);
-       } while (time_before(halt_time, timeout));
+       } while (time_before(prep_time, timeout));
 
-       return 0;
+       return -ETIMEDOUT;
 }
 
-static int clk_main_is_prepared(struct clk_hw *hw)
+static unsigned long clk_main_recalc_rate(struct at91_pmc *pmc,
+                                         unsigned long parent_rate)
 {
-       struct clk_main *clkmain = to_clk_main(hw);
+       u32 tmp;
+
+       if (parent_rate)
+               return parent_rate;
+
+       tmp = pmc_read(pmc, AT91_CKGR_MCFR);
+       if (!(tmp & AT91_PMC_MAINRDY))
+               return 0;
 
-       return !!(pmc_read(clkmain->pmc, AT91_PMC_SR) & AT91_PMC_MOSCS);
+       return ((tmp & AT91_PMC_MAINF) * SLOW_CLOCK_FREQ) / MAINF_DIV;
 }
 
-static unsigned long clk_main_recalc_rate(struct clk_hw *hw,
-                                         unsigned long parent_rate)
+static int clk_rm9200_main_prepare(struct clk_hw *hw)
 {
-       u32 tmp;
-       struct clk_main *clkmain = to_clk_main(hw);
+       struct clk_rm9200_main *clkmain = to_clk_rm9200_main(hw);
+
+       return clk_main_probe_frequency(clkmain->pmc);
+}
+
+static int clk_rm9200_main_is_prepared(struct clk_hw *hw)
+{
+       struct clk_rm9200_main *clkmain = to_clk_rm9200_main(hw);
+
+       return !!(pmc_read(clkmain->pmc, AT91_CKGR_MCFR) & AT91_PMC_MAINRDY);
+}
+
+static unsigned long clk_rm9200_main_recalc_rate(struct clk_hw *hw,
+                                                unsigned long parent_rate)
+{
+       struct clk_rm9200_main *clkmain = to_clk_rm9200_main(hw);
+
+       return clk_main_recalc_rate(clkmain->pmc, parent_rate);
+}
+
+static const struct clk_ops rm9200_main_ops = {
+       .prepare = clk_rm9200_main_prepare,
+       .is_prepared = clk_rm9200_main_is_prepared,
+       .recalc_rate = clk_rm9200_main_recalc_rate,
+};
+
+static struct clk * __init
+at91_clk_register_rm9200_main(struct at91_pmc *pmc,
+                             const char *name,
+                             const char *parent_name)
+{
+       struct clk_rm9200_main *clkmain;
+       struct clk *clk = NULL;
+       struct clk_init_data init;
+
+       if (!pmc || !name)
+               return ERR_PTR(-EINVAL);
+
+       if (!parent_name)
+               return ERR_PTR(-EINVAL);
+
+       clkmain = kzalloc(sizeof(*clkmain), GFP_KERNEL);
+       if (!clkmain)
+               return ERR_PTR(-ENOMEM);
+
+       init.name = name;
+       init.ops = &rm9200_main_ops;
+       init.parent_names = &parent_name;
+       init.num_parents = 1;
+       init.flags = 0;
+
+       clkmain->hw.init = &init;
+       clkmain->pmc = pmc;
+
+       clk = clk_register(NULL, &clkmain->hw);
+       if (IS_ERR(clk))
+               kfree(clkmain);
+
+       return clk;
+}
+
+void __init of_at91rm9200_clk_main_setup(struct device_node *np,
+                                        struct at91_pmc *pmc)
+{
+       struct clk *clk;
+       const char *parent_name;
+       const char *name = np->name;
+
+       parent_name = of_clk_get_parent_name(np, 0);
+       of_property_read_string(np, "clock-output-names", &name);
+
+       clk = at91_clk_register_rm9200_main(pmc, name, parent_name);
+       if (IS_ERR(clk))
+               return;
+
+       of_clk_add_provider(np, of_clk_src_simple_get, clk);
+}
+
+static irqreturn_t clk_sam9x5_main_irq_handler(int irq, void *dev_id)
+{
+       struct clk_sam9x5_main *clkmain = dev_id;
+
+       wake_up(&clkmain->wait);
+       disable_irq_nosync(clkmain->irq);
+
+       return IRQ_HANDLED;
+}
+
+static int clk_sam9x5_main_prepare(struct clk_hw *hw)
+{
+       struct clk_sam9x5_main *clkmain = to_clk_sam9x5_main(hw);
        struct at91_pmc *pmc = clkmain->pmc;
 
-       if (clkmain->rate)
-               return clkmain->rate;
+       while (!(pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCSELS)) {
+               enable_irq(clkmain->irq);
+               wait_event(clkmain->wait,
+                          pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCSELS);
+       }
+
+       return clk_main_probe_frequency(pmc);
+}
 
-       tmp = pmc_read(pmc, AT91_CKGR_MCFR) & AT91_PMC_MAINF;
-       clkmain->rate = (tmp * parent_rate) / MAINF_DIV;
+static int clk_sam9x5_main_is_prepared(struct clk_hw *hw)
+{
+       struct clk_sam9x5_main *clkmain = to_clk_sam9x5_main(hw);
 
-       return clkmain->rate;
+       return !!(pmc_read(clkmain->pmc, AT91_PMC_SR) & AT91_PMC_MOSCSELS);
 }
 
-static const struct clk_ops main_ops = {
-       .prepare = clk_main_prepare,
-       .is_prepared = clk_main_is_prepared,
-       .recalc_rate = clk_main_recalc_rate,
+static unsigned long clk_sam9x5_main_recalc_rate(struct clk_hw *hw,
+                                                unsigned long parent_rate)
+{
+       struct clk_sam9x5_main *clkmain = to_clk_sam9x5_main(hw);
+
+       return clk_main_recalc_rate(clkmain->pmc, parent_rate);
+}
+
+static int clk_sam9x5_main_set_parent(struct clk_hw *hw, u8 index)
+{
+       struct clk_sam9x5_main *clkmain = to_clk_sam9x5_main(hw);
+       struct at91_pmc *pmc = clkmain->pmc;
+       u32 tmp;
+
+       if (index > 1)
+               return -EINVAL;
+
+       tmp = pmc_read(pmc, AT91_CKGR_MOR) & ~MOR_KEY_MASK;
+
+       if (index && !(tmp & AT91_PMC_MOSCSEL))
+               pmc_write(pmc, AT91_CKGR_MOR, tmp | AT91_PMC_MOSCSEL);
+       else if (!index && (tmp & AT91_PMC_MOSCSEL))
+               pmc_write(pmc, AT91_CKGR_MOR, tmp & ~AT91_PMC_MOSCSEL);
+
+       while (!(pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCSELS)) {
+               enable_irq(clkmain->irq);
+               wait_event(clkmain->wait,
+                          pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCSELS);
+       }
+
+       return 0;
+}
+
+static u8 clk_sam9x5_main_get_parent(struct clk_hw *hw)
+{
+       struct clk_sam9x5_main *clkmain = to_clk_sam9x5_main(hw);
+
+       return !!(pmc_read(clkmain->pmc, AT91_CKGR_MOR) & AT91_PMC_MOSCEN);
+}
+
+static const struct clk_ops sam9x5_main_ops = {
+       .prepare = clk_sam9x5_main_prepare,
+       .is_prepared = clk_sam9x5_main_is_prepared,
+       .recalc_rate = clk_sam9x5_main_recalc_rate,
+       .set_parent = clk_sam9x5_main_set_parent,
+       .get_parent = clk_sam9x5_main_get_parent,
 };
 
 static struct clk * __init
-at91_clk_register_main(struct at91_pmc *pmc,
-                      unsigned int irq,
-                      const char *name,
-                      const char *parent_name,
-                      unsigned long rate)
+at91_clk_register_sam9x5_main(struct at91_pmc *pmc,
+                             unsigned int irq,
+                             const char *name,
+                             const char **parent_names,
+                             int num_parents)
 {
        int ret;
-       struct clk_main *clkmain;
+       struct clk_sam9x5_main *clkmain;
        struct clk *clk = NULL;
        struct clk_init_data init;
 
        if (!pmc || !irq || !name)
                return ERR_PTR(-EINVAL);
 
-       if (!rate && !parent_name)
+       if (!parent_names || !num_parents)
                return ERR_PTR(-EINVAL);
 
        clkmain = kzalloc(sizeof(*clkmain), GFP_KERNEL);
@@ -130,19 +577,20 @@ at91_clk_register_main(struct at91_pmc *pmc,
                return ERR_PTR(-ENOMEM);
 
        init.name = name;
-       init.ops = &main_ops;
-       init.parent_names = parent_name ? &parent_name : NULL;
-       init.num_parents = parent_name ? 1 : 0;
-       init.flags = parent_name ? 0 : CLK_IS_ROOT;
+       init.ops = &sam9x5_main_ops;
+       init.parent_names = parent_names;
+       init.num_parents = num_parents;
+       init.flags = CLK_SET_PARENT_GATE;
 
        clkmain->hw.init = &init;
-       clkmain->rate = rate;
        clkmain->pmc = pmc;
        clkmain->irq = irq;
+       clkmain->parent = !!(pmc_read(clkmain->pmc, AT91_CKGR_MOR) &
+                            AT91_PMC_MOSCEN);
        init_waitqueue_head(&clkmain->wait);
        irq_set_status_flags(clkmain->irq, IRQ_NOAUTOEN);
-       ret = request_irq(clkmain->irq, clk_main_irq_handler,
-                         IRQF_TRIGGER_HIGH, "clk-main", clkmain);
+       ret = request_irq(clkmain->irq, clk_sam9x5_main_irq_handler,
+                         IRQF_TRIGGER_HIGH, name, clkmain);
        if (ret)
                return ERR_PTR(ret);
 
@@ -155,33 +603,36 @@ at91_clk_register_main(struct at91_pmc *pmc,
        return clk;
 }
 
-
-
-static void __init
-of_at91_clk_main_setup(struct device_node *np, struct at91_pmc *pmc)
+void __init of_at91sam9x5_clk_main_setup(struct device_node *np,
+                                        struct at91_pmc *pmc)
 {
        struct clk *clk;
+       const char *parent_names[2];
+       int num_parents;
        unsigned int irq;
-       const char *parent_name;
        const char *name = np->name;
-       u32 rate = 0;
+       int i;
+
+       num_parents = of_count_phandle_with_args(np, "clocks", "#clock-cells");
+       if (num_parents <= 0 || num_parents > 2)
+               return;
+
+       for (i = 0; i < num_parents; ++i) {
+               parent_names[i] = of_clk_get_parent_name(np, i);
+               if (!parent_names[i])
+                       return;
+       }
 
-       parent_name = of_clk_get_parent_name(np, 0);
        of_property_read_string(np, "clock-output-names", &name);
-       of_property_read_u32(np, "clock-frequency", &rate);
+
        irq = irq_of_parse_and_map(np, 0);
        if (!irq)
                return;
 
-       clk = at91_clk_register_main(pmc, irq, name, parent_name, rate);
+       clk = at91_clk_register_sam9x5_main(pmc, irq, name, parent_names,
+                                           num_parents);
        if (IS_ERR(clk))
                return;
 
        of_clk_add_provider(np, of_clk_src_simple_get, clk);
 }
-
-void __init of_at91rm9200_clk_main_setup(struct device_node *np,
-                                        struct at91_pmc *pmc)
-{
-       of_at91_clk_main_setup(np, pmc);
-}
diff --git a/drivers/clk/at91/clk-slow.c b/drivers/clk/at91/clk-slow.c
new file mode 100644 (file)
index 0000000..0300c46
--- /dev/null
@@ -0,0 +1,467 @@
+/*
+ * drivers/clk/at91/clk-slow.c
+ *
+ *  Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+#include <linux/clk/at91_pmc.h>
+#include <linux/delay.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/io.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/sched.h>
+#include <linux/wait.h>
+
+#include "pmc.h"
+#include "sckc.h"
+
+#define SLOW_CLOCK_FREQ                32768
+#define SLOWCK_SW_CYCLES       5
+#define SLOWCK_SW_TIME_USEC    ((SLOWCK_SW_CYCLES * USEC_PER_SEC) / \
+                                SLOW_CLOCK_FREQ)
+
+#define        AT91_SCKC_CR                    0x00
+#define                AT91_SCKC_RCEN          (1 << 0)
+#define                AT91_SCKC_OSC32EN       (1 << 1)
+#define                AT91_SCKC_OSC32BYP      (1 << 2)
+#define                AT91_SCKC_OSCSEL        (1 << 3)
+
+struct clk_slow_osc {
+       struct clk_hw hw;
+       void __iomem *sckcr;
+       unsigned long startup_usec;
+};
+
+#define to_clk_slow_osc(hw) container_of(hw, struct clk_slow_osc, hw)
+
+struct clk_slow_rc_osc {
+       struct clk_hw hw;
+       void __iomem *sckcr;
+       unsigned long frequency;
+       unsigned long accuracy;
+       unsigned long startup_usec;
+};
+
+#define to_clk_slow_rc_osc(hw) container_of(hw, struct clk_slow_rc_osc, hw)
+
+struct clk_sam9260_slow {
+       struct clk_hw hw;
+       struct at91_pmc *pmc;
+};
+
+#define to_clk_sam9260_slow(hw) container_of(hw, struct clk_sam9260_slow, hw)
+
+struct clk_sam9x5_slow {
+       struct clk_hw hw;
+       void __iomem *sckcr;
+       u8 parent;
+};
+
+#define to_clk_sam9x5_slow(hw) container_of(hw, struct clk_sam9x5_slow, hw)
+
+
+static int clk_slow_osc_prepare(struct clk_hw *hw)
+{
+       struct clk_slow_osc *osc = to_clk_slow_osc(hw);
+       void __iomem *sckcr = osc->sckcr;
+       u32 tmp = readl(sckcr);
+
+       if (tmp & AT91_SCKC_OSC32BYP)
+               return 0;
+
+       writel(tmp | AT91_SCKC_OSC32EN, sckcr);
+
+       usleep_range(osc->startup_usec, osc->startup_usec + 1);
+
+       return 0;
+}
+
+static void clk_slow_osc_unprepare(struct clk_hw *hw)
+{
+       struct clk_slow_osc *osc = to_clk_slow_osc(hw);
+       void __iomem *sckcr = osc->sckcr;
+       u32 tmp = readl(sckcr);
+
+       if (tmp & AT91_SCKC_OSC32BYP)
+               return;
+
+       writel(tmp & ~AT91_SCKC_OSC32EN, sckcr);
+}
+
+static int clk_slow_osc_is_prepared(struct clk_hw *hw)
+{
+       struct clk_slow_osc *osc = to_clk_slow_osc(hw);
+       void __iomem *sckcr = osc->sckcr;
+       u32 tmp = readl(sckcr);
+
+       if (tmp & AT91_SCKC_OSC32BYP)
+               return 1;
+
+       return !!(tmp & AT91_SCKC_OSC32EN);
+}
+
+static const struct clk_ops slow_osc_ops = {
+       .prepare = clk_slow_osc_prepare,
+       .unprepare = clk_slow_osc_unprepare,
+       .is_prepared = clk_slow_osc_is_prepared,
+};
+
+static struct clk * __init
+at91_clk_register_slow_osc(void __iomem *sckcr,
+                          const char *name,
+                          const char *parent_name,
+                          unsigned long startup,
+                          bool bypass)
+{
+       struct clk_slow_osc *osc;
+       struct clk *clk = NULL;
+       struct clk_init_data init;
+
+       if (!sckcr || !name || !parent_name)
+               return ERR_PTR(-EINVAL);
+
+       osc = kzalloc(sizeof(*osc), GFP_KERNEL);
+       if (!osc)
+               return ERR_PTR(-ENOMEM);
+
+       init.name = name;
+       init.ops = &slow_osc_ops;
+       init.parent_names = &parent_name;
+       init.num_parents = 1;
+       init.flags = CLK_IGNORE_UNUSED;
+
+       osc->hw.init = &init;
+       osc->sckcr = sckcr;
+       osc->startup_usec = startup;
+
+       if (bypass)
+               writel((readl(sckcr) & ~AT91_SCKC_OSC32EN) | AT91_SCKC_OSC32BYP,
+                      sckcr);
+
+       clk = clk_register(NULL, &osc->hw);
+       if (IS_ERR(clk))
+               kfree(osc);
+
+       return clk;
+}
+
+void __init of_at91sam9x5_clk_slow_osc_setup(struct device_node *np,
+                                            void __iomem *sckcr)
+{
+       struct clk *clk;
+       const char *parent_name;
+       const char *name = np->name;
+       u32 startup;
+       bool bypass;
+
+       parent_name = of_clk_get_parent_name(np, 0);
+       of_property_read_string(np, "clock-output-names", &name);
+       of_property_read_u32(np, "atmel,startup-time-usec", &startup);
+       bypass = of_property_read_bool(np, "atmel,osc-bypass");
+
+       clk = at91_clk_register_slow_osc(sckcr, name, parent_name, startup,
+                                        bypass);
+       if (IS_ERR(clk))
+               return;
+
+       of_clk_add_provider(np, of_clk_src_simple_get, clk);
+}
+
+static unsigned long clk_slow_rc_osc_recalc_rate(struct clk_hw *hw,
+                                                unsigned long parent_rate)
+{
+       struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
+
+       return osc->frequency;
+}
+
+static unsigned long clk_slow_rc_osc_recalc_accuracy(struct clk_hw *hw,
+                                                    unsigned long parent_acc)
+{
+       struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
+
+       return osc->accuracy;
+}
+
+static int clk_slow_rc_osc_prepare(struct clk_hw *hw)
+{
+       struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
+       void __iomem *sckcr = osc->sckcr;
+
+       writel(readl(sckcr) | AT91_SCKC_RCEN, sckcr);
+
+       usleep_range(osc->startup_usec, osc->startup_usec + 1);
+
+       return 0;
+}
+
+static void clk_slow_rc_osc_unprepare(struct clk_hw *hw)
+{
+       struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
+       void __iomem *sckcr = osc->sckcr;
+
+       writel(readl(sckcr) & ~AT91_SCKC_RCEN, sckcr);
+}
+
+static int clk_slow_rc_osc_is_prepared(struct clk_hw *hw)
+{
+       struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
+
+       return !!(readl(osc->sckcr) & AT91_SCKC_RCEN);
+}
+
+static const struct clk_ops slow_rc_osc_ops = {
+       .prepare = clk_slow_rc_osc_prepare,
+       .unprepare = clk_slow_rc_osc_unprepare,
+       .is_prepared = clk_slow_rc_osc_is_prepared,
+       .recalc_rate = clk_slow_rc_osc_recalc_rate,
+       .recalc_accuracy = clk_slow_rc_osc_recalc_accuracy,
+};
+
+static struct clk * __init
+at91_clk_register_slow_rc_osc(void __iomem *sckcr,
+                             const char *name,
+                             unsigned long frequency,
+                             unsigned long accuracy,
+                             unsigned long startup)
+{
+       struct clk_slow_rc_osc *osc;
+       struct clk *clk = NULL;
+       struct clk_init_data init;
+
+       if (!sckcr || !name)
+               return ERR_PTR(-EINVAL);
+
+       osc = kzalloc(sizeof(*osc), GFP_KERNEL);
+       if (!osc)
+               return ERR_PTR(-ENOMEM);
+
+       init.name = name;
+       init.ops = &slow_rc_osc_ops;
+       init.parent_names = NULL;
+       init.num_parents = 0;
+       init.flags = CLK_IS_ROOT | CLK_IGNORE_UNUSED;
+
+       osc->hw.init = &init;
+       osc->sckcr = sckcr;
+       osc->frequency = frequency;
+       osc->accuracy = accuracy;
+       osc->startup_usec = startup;
+
+       clk = clk_register(NULL, &osc->hw);
+       if (IS_ERR(clk))
+               kfree(osc);
+
+       return clk;
+}
+
+void __init of_at91sam9x5_clk_slow_rc_osc_setup(struct device_node *np,
+                                               void __iomem *sckcr)
+{
+       struct clk *clk;
+       u32 frequency = 0;
+       u32 accuracy = 0;
+       u32 startup = 0;
+       const char *name = np->name;
+
+       of_property_read_string(np, "clock-output-names", &name);
+       of_property_read_u32(np, "clock-frequency", &frequency);
+       of_property_read_u32(np, "clock-accuracy", &accuracy);
+       of_property_read_u32(np, "atmel,startup-time-usec", &startup);
+
+       clk = at91_clk_register_slow_rc_osc(sckcr, name, frequency, accuracy,
+                                           startup);
+       if (IS_ERR(clk))
+               return;
+
+       of_clk_add_provider(np, of_clk_src_simple_get, clk);
+}
+
+static int clk_sam9x5_slow_set_parent(struct clk_hw *hw, u8 index)
+{
+       struct clk_sam9x5_slow *slowck = to_clk_sam9x5_slow(hw);
+       void __iomem *sckcr = slowck->sckcr;
+       u32 tmp;
+
+       if (index > 1)
+               return -EINVAL;
+
+       tmp = readl(sckcr);
+
+       if ((!index && !(tmp & AT91_SCKC_OSCSEL)) ||
+           (index && (tmp & AT91_SCKC_OSCSEL)))
+               return 0;
+
+       if (index)
+               tmp |= AT91_SCKC_OSCSEL;
+       else
+               tmp &= ~AT91_SCKC_OSCSEL;
+
+       writel(tmp, sckcr);
+
+       usleep_range(SLOWCK_SW_TIME_USEC, SLOWCK_SW_TIME_USEC + 1);
+
+       return 0;
+}
+
+static u8 clk_sam9x5_slow_get_parent(struct clk_hw *hw)
+{
+       struct clk_sam9x5_slow *slowck = to_clk_sam9x5_slow(hw);
+
+       return !!(readl(slowck->sckcr) & AT91_SCKC_OSCSEL);
+}
+
+static const struct clk_ops sam9x5_slow_ops = {
+       .set_parent = clk_sam9x5_slow_set_parent,
+       .get_parent = clk_sam9x5_slow_get_parent,
+};
+
+static struct clk * __init
+at91_clk_register_sam9x5_slow(void __iomem *sckcr,
+                             const char *name,
+                             const char **parent_names,
+                             int num_parents)
+{
+       struct clk_sam9x5_slow *slowck;
+       struct clk *clk = NULL;
+       struct clk_init_data init;
+
+       if (!sckcr || !name || !parent_names || !num_parents)
+               return ERR_PTR(-EINVAL);
+
+       slowck = kzalloc(sizeof(*slowck), GFP_KERNEL);
+       if (!slowck)
+               return ERR_PTR(-ENOMEM);
+
+       init.name = name;
+       init.ops = &sam9x5_slow_ops;
+       init.parent_names = parent_names;
+       init.num_parents = num_parents;
+       init.flags = 0;
+
+       slowck->hw.init = &init;
+       slowck->sckcr = sckcr;
+       slowck->parent = !!(readl(sckcr) & AT91_SCKC_OSCSEL);
+
+       clk = clk_register(NULL, &slowck->hw);
+       if (IS_ERR(clk))
+               kfree(slowck);
+
+       return clk;
+}
+
+void __init of_at91sam9x5_clk_slow_setup(struct device_node *np,
+                                        void __iomem *sckcr)
+{
+       struct clk *clk;
+       const char *parent_names[2];
+       int num_parents;
+       const char *name = np->name;
+       int i;
+
+       num_parents = of_count_phandle_with_args(np, "clocks", "#clock-cells");
+       if (num_parents <= 0 || num_parents > 2)
+               return;
+
+       for (i = 0; i < num_parents; ++i) {
+               parent_names[i] = of_clk_get_parent_name(np, i);
+               if (!parent_names[i])
+                       return;
+       }
+
+       of_property_read_string(np, "clock-output-names", &name);
+
+       clk = at91_clk_register_sam9x5_slow(sckcr, name, parent_names,
+                                           num_parents);
+       if (IS_ERR(clk))
+               return;
+
+       of_clk_add_provider(np, of_clk_src_simple_get, clk);
+}
+
+static u8 clk_sam9260_slow_get_parent(struct clk_hw *hw)
+{
+       struct clk_sam9260_slow *slowck = to_clk_sam9260_slow(hw);
+
+       return !!(pmc_read(slowck->pmc, AT91_PMC_SR) & AT91_PMC_OSCSEL);
+}
+
+static const struct clk_ops sam9260_slow_ops = {
+       .get_parent = clk_sam9260_slow_get_parent,
+};
+
+static struct clk * __init
+at91_clk_register_sam9260_slow(struct at91_pmc *pmc,
+                              const char *name,
+                              const char **parent_names,
+                              int num_parents)
+{
+       struct clk_sam9260_slow *slowck;
+       struct clk *clk = NULL;
+       struct clk_init_data init;
+
+       if (!pmc || !name)
+               return ERR_PTR(-EINVAL);
+
+       if (!parent_names || !num_parents)
+               return ERR_PTR(-EINVAL);
+
+       slowck = kzalloc(sizeof(*slowck), GFP_KERNEL);
+       if (!slowck)
+               return ERR_PTR(-ENOMEM);
+
+       init.name = name;
+       init.ops = &sam9260_slow_ops;
+       init.parent_names = parent_names;
+       init.num_parents = num_parents;
+       init.flags = 0;
+
+       slowck->hw.init = &init;
+       slowck->pmc = pmc;
+
+       clk = clk_register(NULL, &slowck->hw);
+       if (IS_ERR(clk))
+               kfree(slowck);
+
+       return clk;
+}
+
+void __init of_at91sam9260_clk_slow_setup(struct device_node *np,
+                                         struct at91_pmc *pmc)
+{
+       struct clk *clk;
+       const char *parent_names[2];
+       int num_parents;
+       const char *name = np->name;
+       int i;
+
+       num_parents = of_count_phandle_with_args(np, "clocks", "#clock-cells");
+       if (num_parents <= 0 || num_parents > 1)
+               return;
+
+       for (i = 0; i < num_parents; ++i) {
+               parent_names[i] = of_clk_get_parent_name(np, i);
+               if (!parent_names[i])
+                       return;
+       }
+
+       of_property_read_string(np, "clock-output-names", &name);
+
+       clk = at91_clk_register_sam9260_slow(pmc, name, parent_names,
+                                            num_parents);
+       if (IS_ERR(clk))
+               return;
+
+       of_clk_add_provider(np, of_clk_src_simple_get, clk);
+}
index 6a61477a57e05b2397d79c361f33c33277973af8..524196bb35a54d3565117e0e5a047300be7e30c3 100644 (file)
@@ -229,11 +229,28 @@ out_free_pmc:
 }
 
 static const struct of_device_id pmc_clk_ids[] __initconst = {
+       /* Slow oscillator */
+       {
+               .compatible = "atmel,at91sam9260-clk-slow",
+               .data = of_at91sam9260_clk_slow_setup,
+       },
        /* Main clock */
+       {
+               .compatible = "atmel,at91rm9200-clk-main-osc",
+               .data = of_at91rm9200_clk_main_osc_setup,
+       },
+       {
+               .compatible = "atmel,at91sam9x5-clk-main-rc-osc",
+               .data = of_at91sam9x5_clk_main_rc_osc_setup,
+       },
        {
                .compatible = "atmel,at91rm9200-clk-main",
                .data = of_at91rm9200_clk_main_setup,
        },
+       {
+               .compatible = "atmel,at91sam9x5-clk-main",
+               .data = of_at91sam9x5_clk_main_setup,
+       },
        /* PLL clocks */
        {
                .compatible = "atmel,at91rm9200-clk-pll",
index 441350983ccb03c0ec0297ee7da47cb0138a1ce8..6c7625976113390e33200ed2c62765c29347350b 100644 (file)
@@ -58,8 +58,17 @@ static inline void pmc_write(struct at91_pmc *pmc, int offset, u32 value)
 int of_at91_get_clk_range(struct device_node *np, const char *propname,
                          struct clk_range *range);
 
+extern void __init of_at91sam9260_clk_slow_setup(struct device_node *np,
+                                                struct at91_pmc *pmc);
+
+extern void __init of_at91rm9200_clk_main_osc_setup(struct device_node *np,
+                                                   struct at91_pmc *pmc);
+extern void __init of_at91sam9x5_clk_main_rc_osc_setup(struct device_node *np,
+                                                      struct at91_pmc *pmc);
 extern void __init of_at91rm9200_clk_main_setup(struct device_node *np,
                                                struct at91_pmc *pmc);
+extern void __init of_at91sam9x5_clk_main_setup(struct device_node *np,
+                                               struct at91_pmc *pmc);
 
 extern void __init of_at91rm9200_clk_pll_setup(struct device_node *np,
                                               struct at91_pmc *pmc);
diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c
new file mode 100644 (file)
index 0000000..1184d76
--- /dev/null
@@ -0,0 +1,57 @@
+/*
+ * drivers/clk/at91/sckc.c
+ *
+ *  Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/io.h>
+
+#include "sckc.h"
+
+static const struct of_device_id sckc_clk_ids[] __initconst = {
+       /* Slow clock */
+       {
+               .compatible = "atmel,at91sam9x5-clk-slow-osc",
+               .data = of_at91sam9x5_clk_slow_osc_setup,
+       },
+       {
+               .compatible = "atmel,at91sam9x5-clk-slow-rc-osc",
+               .data = of_at91sam9x5_clk_slow_rc_osc_setup,
+       },
+       {
+               .compatible = "atmel,at91sam9x5-clk-slow",
+               .data = of_at91sam9x5_clk_slow_setup,
+       },
+       { /*sentinel*/ }
+};
+
+static void __init of_at91sam9x5_sckc_setup(struct device_node *np)
+{
+       struct device_node *childnp;
+       void (*clk_setup)(struct device_node *, void __iomem *);
+       const struct of_device_id *clk_id;
+       void __iomem *regbase = of_iomap(np, 0);
+
+       if (!regbase)
+               return;
+
+       for_each_child_of_node(np, childnp) {
+               clk_id = of_match_node(sckc_clk_ids, childnp);
+               if (!clk_id)
+                       continue;
+               clk_setup = clk_id->data;
+               clk_setup(childnp, regbase);
+       }
+}
+CLK_OF_DECLARE(at91sam9x5_clk_sckc, "atmel,at91sam9x5-sckc",
+              of_at91sam9x5_sckc_setup);
diff --git a/drivers/clk/at91/sckc.h b/drivers/clk/at91/sckc.h
new file mode 100644 (file)
index 0000000..836fcf5
--- /dev/null
@@ -0,0 +1,22 @@
+/*
+ * drivers/clk/at91/sckc.h
+ *
+ *  Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __AT91_SCKC_H_
+#define __AT91_SCKC_H_
+
+extern void __init of_at91sam9x5_clk_slow_osc_setup(struct device_node *np,
+                                                   void __iomem *sckcr);
+extern void __init of_at91sam9x5_clk_slow_rc_osc_setup(struct device_node *np,
+                                                      void __iomem *sckcr);
+extern void __init of_at91sam9x5_clk_slow_setup(struct device_node *np,
+                                               void __iomem *sckcr);
+
+#endif /* __AT91_SCKC_H_ */
index 166e02f16c8a25f28f4441584dc6e8babc448f3b..cc37c342c4cb9a18dd355a66e06a993ff43de4e5 100644 (file)
@@ -764,7 +764,6 @@ static struct tegra_clk tegra124_clks[tegra_clk_max] __initdata = {
        [tegra_clk_sdmmc2_8] = { .dt_id = TEGRA124_CLK_SDMMC2, .present = true },
        [tegra_clk_i2s1] = { .dt_id = TEGRA124_CLK_I2S1, .present = true },
        [tegra_clk_i2c1] = { .dt_id = TEGRA124_CLK_I2C1, .present = true },
-       [tegra_clk_ndflash] = { .dt_id = TEGRA124_CLK_NDFLASH, .present = true },
        [tegra_clk_sdmmc1_8] = { .dt_id = TEGRA124_CLK_SDMMC1, .present = true },
        [tegra_clk_sdmmc4_8] = { .dt_id = TEGRA124_CLK_SDMMC4, .present = true },
        [tegra_clk_pwm] = { .dt_id = TEGRA124_CLK_PWM, .present = true },
@@ -809,7 +808,6 @@ static struct tegra_clk tegra124_clks[tegra_clk_max] __initdata = {
        [tegra_clk_trace] = { .dt_id = TEGRA124_CLK_TRACE, .present = true },
        [tegra_clk_soc_therm] = { .dt_id = TEGRA124_CLK_SOC_THERM, .present = true },
        [tegra_clk_dtv] = { .dt_id = TEGRA124_CLK_DTV, .present = true },
-       [tegra_clk_ndspeed] = { .dt_id = TEGRA124_CLK_NDSPEED, .present = true },
        [tegra_clk_i2cslow] = { .dt_id = TEGRA124_CLK_I2CSLOW, .present = true },
        [tegra_clk_dsib] = { .dt_id = TEGRA124_CLK_DSIB, .present = true },
        [tegra_clk_tsec] = { .dt_id = TEGRA124_CLK_TSEC, .present = true },
@@ -952,7 +950,6 @@ static struct tegra_clk tegra124_clks[tegra_clk_max] __initdata = {
        [tegra_clk_clk_out_3_mux] = { .dt_id = TEGRA124_CLK_CLK_OUT_3_MUX, .present = true },
        [tegra_clk_dsia_mux] = { .dt_id = TEGRA124_CLK_DSIA_MUX, .present = true },
        [tegra_clk_dsib_mux] = { .dt_id = TEGRA124_CLK_DSIB_MUX, .present = true },
-       [tegra_clk_uarte] = { .dt_id = TEGRA124_CLK_UARTE, .present = true },
 };
 
 static struct tegra_devclk devclks[] __initdata = {
index 2dc8b41a339dba3dc359e7ee34b10de98e8eb3fe..422391242b39ceac4a322ee532288ee46b6eba32 100644 (file)
@@ -100,9 +100,11 @@ void __init vexpress_osc_of_setup(struct device_node *node)
        struct clk *clk;
        u32 range[2];
 
+       vexpress_sysreg_of_early_init();
+
        osc = kzalloc(sizeof(*osc), GFP_KERNEL);
        if (!osc)
-               goto error;
+               return;
 
        osc->func = vexpress_config_func_get_by_node(node);
        if (!osc->func) {
index 57e823c44d2ad326eeaaa788fbb67d80ba620c7d..5163ec13429d1e37082b8d32c84684284217322f 100644 (file)
@@ -66,6 +66,7 @@ static int arch_timer_ppi[MAX_TIMER_PPI];
 static struct clock_event_device __percpu *arch_timer_evt;
 
 static bool arch_timer_use_virtual = true;
+static bool arch_timer_c3stop;
 static bool arch_timer_mem_use_virtual;
 
 /*
@@ -263,7 +264,8 @@ static void __arch_timer_setup(unsigned type,
        clk->features = CLOCK_EVT_FEAT_ONESHOT;
 
        if (type == ARCH_CP15_TIMER) {
-               clk->features |= CLOCK_EVT_FEAT_C3STOP;
+               if (arch_timer_c3stop)
+                       clk->features |= CLOCK_EVT_FEAT_C3STOP;
                clk->name = "arch_sys_timer";
                clk->rating = 450;
                clk->cpumask = cpumask_of(smp_processor_id());
@@ -665,6 +667,8 @@ static void __init arch_timer_init(struct device_node *np)
                }
        }
 
+       arch_timer_c3stop = !of_property_read_bool(np, "always-on");
+
        arch_timer_register();
        arch_timer_common_init();
 }
index a6ee6d7cd63f19a4cdad01a1a82956f990a76194..acf5a329d5387653b4359d27feb772afe389a92b 100644 (file)
@@ -416,8 +416,6 @@ static int exynos4_local_timer_setup(struct clock_event_device *evt)
        evt->set_mode = exynos4_tick_set_mode;
        evt->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
        evt->rating = 450;
-       clockevents_config_and_register(evt, clk_rate / (TICK_BASE_CNT + 1),
-                                       0xf, 0x7fffffff);
 
        exynos4_mct_write(TICK_BASE_CNT, mevt->base + MCT_L_TCNTB_OFFSET);
 
@@ -430,9 +428,12 @@ static int exynos4_local_timer_setup(struct clock_event_device *evt)
                                evt->irq);
                        return -EIO;
                }
+               irq_force_affinity(mct_irqs[MCT_L0_IRQ + cpu], cpumask_of(cpu));
        } else {
                enable_percpu_irq(mct_irqs[MCT_L0_IRQ], 0);
        }
+       clockevents_config_and_register(evt, clk_rate / (TICK_BASE_CNT + 1),
+                                       0xf, 0x7fffffff);
 
        return 0;
 }
@@ -450,7 +451,6 @@ static int exynos4_mct_cpu_notify(struct notifier_block *self,
                                           unsigned long action, void *hcpu)
 {
        struct mct_clock_event_device *mevt;
-       unsigned int cpu;
 
        /*
         * Grab cpu pointer in each case to avoid spurious
@@ -461,12 +461,6 @@ static int exynos4_mct_cpu_notify(struct notifier_block *self,
                mevt = this_cpu_ptr(&percpu_mct_tick);
                exynos4_local_timer_setup(&mevt->evt);
                break;
-       case CPU_ONLINE:
-               cpu = (unsigned long)hcpu;
-               if (mct_int_type == MCT_INT_SPI)
-                       irq_set_affinity(mct_irqs[MCT_L0_IRQ + cpu],
-                                               cpumask_of(cpu));
-               break;
        case CPU_DYING:
                mevt = this_cpu_ptr(&percpu_mct_tick);
                exynos4_local_timer_stop(&mevt->evt);
index ca81809d159d5ebf49ddcb6f9df0bc38208fefce..7ce442148c3f5dfb32449498bc9352066050688e 100644 (file)
@@ -212,4 +212,9 @@ error_free:
        return ret;
 }
 
-CLOCKSOURCE_OF_DECLARE(zevio_timer, "lsi,zevio-timer", zevio_timer_add);
+static void __init zevio_timer_init(struct device_node *node)
+{
+       BUG_ON(zevio_timer_add(node));
+}
+
+CLOCKSOURCE_OF_DECLARE(zevio_timer, "lsi,zevio-timer", zevio_timer_init);
index 0e9cce82844bf519f62b7bed24bf0783d89400e9..580503513f0f10687d46e666e19f253d7fbbfb51 100644 (file)
@@ -92,11 +92,7 @@ config ARM_EXYNOS_CPU_FREQ_BOOST_SW
 
 config ARM_HIGHBANK_CPUFREQ
        tristate "Calxeda Highbank-based"
-       depends on ARCH_HIGHBANK
-       select GENERIC_CPUFREQ_CPU0
-       select PM_OPP
-       select REGULATOR
-
+       depends on ARCH_HIGHBANK && GENERIC_CPUFREQ_CPU0 && REGULATOR
        default m
        help
          This adds the CPUFreq driver for Calxeda Highbank SoC
index d00e5d1abd258b469bf48862a5f14b08e04f97a7..5c4369b5d834d93f05095cf6052848ec2d2ddec4 100644 (file)
@@ -242,7 +242,7 @@ static void do_powersaver(int cx_address, unsigned int mults_index,
  * Sets a new clock ratio.
  */
 
-static void longhaul_setstate(struct cpufreq_policy *policy,
+static int longhaul_setstate(struct cpufreq_policy *policy,
                unsigned int table_index)
 {
        unsigned int mults_index;
@@ -258,10 +258,12 @@ static void longhaul_setstate(struct cpufreq_policy *policy,
        /* Safety precautions */
        mult = mults[mults_index & 0x1f];
        if (mult == -1)
-               return;
+               return -EINVAL;
+
        speed = calc_speed(mult);
        if ((speed > highest_speed) || (speed < lowest_speed))
-               return;
+               return -EINVAL;
+
        /* Voltage transition before frequency transition? */
        if (can_scale_voltage && longhaul_index < table_index)
                dir = 1;
@@ -269,8 +271,6 @@ static void longhaul_setstate(struct cpufreq_policy *policy,
        freqs.old = calc_speed(longhaul_get_cpu_mult());
        freqs.new = speed;
 
-       cpufreq_freq_transition_begin(policy, &freqs);
-
        pr_debug("Setting to FSB:%dMHz Mult:%d.%dx (%s)\n",
                        fsb, mult/10, mult%10, print_speed(speed/1000));
 retry_loop:
@@ -385,12 +385,14 @@ retry_loop:
                        goto retry_loop;
                }
        }
-       /* Report true CPU frequency */
-       cpufreq_freq_transition_end(policy, &freqs, 0);
 
-       if (!bm_timeout)
+       if (!bm_timeout) {
                printk(KERN_INFO PFX "Warning: Timeout while waiting for "
                                "idle PCI bus.\n");
+               return -EBUSY;
+       }
+
+       return 0;
 }
 
 /*
@@ -631,9 +633,10 @@ static int longhaul_target(struct cpufreq_policy *policy,
        unsigned int i;
        unsigned int dir = 0;
        u8 vid, current_vid;
+       int retval = 0;
 
        if (!can_scale_voltage)
-               longhaul_setstate(policy, table_index);
+               retval = longhaul_setstate(policy, table_index);
        else {
                /* On test system voltage transitions exceeding single
                 * step up or down were turning motherboard off. Both
@@ -648,7 +651,7 @@ static int longhaul_target(struct cpufreq_policy *policy,
                while (i != table_index) {
                        vid = (longhaul_table[i].driver_data >> 8) & 0x1f;
                        if (vid != current_vid) {
-                               longhaul_setstate(policy, i);
+                               retval = longhaul_setstate(policy, i);
                                current_vid = vid;
                                msleep(200);
                        }
@@ -657,10 +660,11 @@ static int longhaul_target(struct cpufreq_policy *policy,
                        else
                                i--;
                }
-               longhaul_setstate(policy, table_index);
+               retval = longhaul_setstate(policy, table_index);
        }
+
        longhaul_index = table_index;
-       return 0;
+       return retval;
 }
 
 
@@ -968,7 +972,15 @@ static void __exit longhaul_exit(void)
 
        for (i = 0; i < numscales; i++) {
                if (mults[i] == maxmult) {
+                       struct cpufreq_freqs freqs;
+
+                       freqs.old = policy->cur;
+                       freqs.new = longhaul_table[i].frequency;
+                       freqs.flags = 0;
+
+                       cpufreq_freq_transition_begin(policy, &freqs);
                        longhaul_setstate(policy, i);
+                       cpufreq_freq_transition_end(policy, &freqs, 0);
                        break;
                }
        }
index 49f120e1bc7be0ecb879f184424d1dc56ee63981..78904e6ca4a020d53a60f4139711441a069ad447 100644 (file)
@@ -138,22 +138,14 @@ static void powernow_k6_set_cpu_multiplier(unsigned int best_i)
 static int powernow_k6_target(struct cpufreq_policy *policy,
                unsigned int best_i)
 {
-       struct cpufreq_freqs freqs;
 
        if (clock_ratio[best_i].driver_data > max_multiplier) {
                printk(KERN_ERR PFX "invalid target frequency\n");
                return -EINVAL;
        }
 
-       freqs.old = busfreq * powernow_k6_get_cpu_multiplier();
-       freqs.new = busfreq * clock_ratio[best_i].driver_data;
-
-       cpufreq_freq_transition_begin(policy, &freqs);
-
        powernow_k6_set_cpu_multiplier(best_i);
 
-       cpufreq_freq_transition_end(policy, &freqs, 0);
-
        return 0;
 }
 
@@ -227,9 +219,20 @@ have_busfreq:
 static int powernow_k6_cpu_exit(struct cpufreq_policy *policy)
 {
        unsigned int i;
-       for (i = 0; i < 8; i++) {
-               if (i == max_multiplier)
+
+       for (i = 0; (clock_ratio[i].frequency != CPUFREQ_TABLE_END); i++) {
+               if (clock_ratio[i].driver_data == max_multiplier) {
+                       struct cpufreq_freqs freqs;
+
+                       freqs.old = policy->cur;
+                       freqs.new = clock_ratio[i].frequency;
+                       freqs.flags = 0;
+
+                       cpufreq_freq_transition_begin(policy, &freqs);
                        powernow_k6_target(policy, i);
+                       cpufreq_freq_transition_end(policy, &freqs, 0);
+                       break;
+               }
        }
        return 0;
 }
index f911645c3f6db59e18f32b68c06bfc890283c029..e61e224475ad457fd71b6934b2a5256a2d96fcc0 100644 (file)
@@ -269,8 +269,6 @@ static int powernow_target(struct cpufreq_policy *policy, unsigned int index)
 
        freqs.new = powernow_table[index].frequency;
 
-       cpufreq_freq_transition_begin(policy, &freqs);
-
        /* Now do the magic poking into the MSRs.  */
 
        if (have_a0 == 1)       /* A0 errata 5 */
@@ -290,8 +288,6 @@ static int powernow_target(struct cpufreq_policy *policy, unsigned int index)
        if (have_a0 == 1)
                local_irq_enable();
 
-       cpufreq_freq_transition_end(policy, &freqs, 0);
-
        return 0;
 }
 
index 9edccc63245df25d93c22adfb6d6d608b069dfb2..af4968813e76b433acbbda0d3e6f4f28d6476e43 100644 (file)
@@ -29,6 +29,7 @@
 
 #include <asm/cputhreads.h>
 #include <asm/reg.h>
+#include <asm/smp.h> /* Required for cpu_sibling_mask() in UP configs */
 
 #define POWERNV_MAX_PSTATES    256
 
index b7e677be1df034cdebdea6580b5726bc77c9aa39..0af618abebafa4b44b323d1811c1f885a52e0beb 100644 (file)
@@ -138,6 +138,7 @@ static int corenet_cpufreq_cpu_init(struct cpufreq_policy *policy)
        struct cpufreq_frequency_table *table;
        struct cpu_data *data;
        unsigned int cpu = policy->cpu;
+       u64 transition_latency_hz;
 
        np = of_get_cpu_node(cpu, NULL);
        if (!np)
@@ -205,8 +206,10 @@ static int corenet_cpufreq_cpu_init(struct cpufreq_policy *policy)
        for_each_cpu(i, per_cpu(cpu_mask, cpu))
                per_cpu(cpu_data, i) = data;
 
+       transition_latency_hz = 12ULL * NSEC_PER_SEC;
        policy->cpuinfo.transition_latency =
-                               (12 * NSEC_PER_SEC) / fsl_get_sys_freq();
+               do_div(transition_latency_hz, fsl_get_sys_freq());
+
        of_node_put(np);
 
        return 0;
index 8d045afa7fb406445b4996334e22a13e9f9572d8..6f9dfa80563a344249ef153aa4f92b17b35ce158 100644 (file)
@@ -60,9 +60,7 @@ static int __init ucv2_cpu_init(struct cpufreq_policy *policy)
        policy->max = policy->cpuinfo.max_freq = 1000000;
        policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
        policy->clk = clk_get(NULL, "MAIN_CLK");
-       if (IS_ERR(policy->clk))
-               return PTR_ERR(policy->clk);
-       return 0;
+       return PTR_ERR_OR_ZERO(policy->clk);
 }
 
 static struct cpufreq_driver ucv2_driver = {
index ba06d1d2f99e39c50e5ed82f08fffdbbe20b7720..5c5863842de92bdd653fb0f24fdea96228c9908a 100644 (file)
@@ -197,7 +197,7 @@ config AMCC_PPC440SPE_ADMA
 
 config TIMB_DMA
        tristate "Timberdale FPGA DMA support"
-       depends on MFD_TIMBERDALE || HAS_IOMEM
+       depends on MFD_TIMBERDALE
        select DMA_ENGINE
        help
          Enable support for the Timberdale FPGA DMA engine.
index cd04eb7b182e338994f03f8f1d1f84c28d49fc40..926360c2db6abcb3b448e815246e182fe1a7d3ae 100644 (file)
@@ -182,11 +182,13 @@ static void edma_execute(struct edma_chan *echan)
                                  echan->ecc->dummy_slot);
        }
 
-       edma_resume(echan->ch_num);
-
        if (edesc->processed <= MAX_NR_SG) {
                dev_dbg(dev, "first transfer starting %d\n", echan->ch_num);
                edma_start(echan->ch_num);
+       } else {
+               dev_dbg(dev, "chan: %d: completed %d elements, resuming\n",
+                       echan->ch_num, edesc->processed);
+               edma_resume(echan->ch_num);
        }
 
        /*
index 381e793184baefdbda1806544d855a02487cda6a..b396a7fb53abb5df611e4fbd551000758f876100 100644 (file)
@@ -968,7 +968,17 @@ static struct platform_driver fsl_edma_driver = {
        .remove         = fsl_edma_remove,
 };
 
-module_platform_driver(fsl_edma_driver);
+static int __init fsl_edma_init(void)
+{
+       return platform_driver_register(&fsl_edma_driver);
+}
+subsys_initcall(fsl_edma_init);
+
+static void __exit fsl_edma_exit(void)
+{
+       platform_driver_unregister(&fsl_edma_driver);
+}
+module_exit(fsl_edma_exit);
 
 MODULE_ALIAS("platform:fsl-edma");
 MODULE_DESCRIPTION("Freescale eDMA engine driver");
index a1bd8298d55f1973313b969bf560c76967212dc4..03f7820fa333b89a445dc3831386ba371b93a1e1 100644 (file)
@@ -666,7 +666,7 @@ static struct dma_chan *of_dma_sirfsoc_xlate(struct of_phandle_args *dma_spec,
        struct sirfsoc_dma *sdma = ofdma->of_dma_data;
        unsigned int request = dma_spec->args[0];
 
-       if (request > SIRFSOC_DMA_CHANNELS)
+       if (request >= SIRFSOC_DMA_CHANNELS)
                return NULL;
 
        return dma_get_slave_channel(&sdma->channels[request].chan);
index e9a0415834ea5240e16994420660ea5131744070..30bcc539425d10cd4a7dfcd29720f0e8f98017c7 100644 (file)
@@ -2,7 +2,7 @@
  * SPEAr platform SPI chipselect abstraction over gpiolib
  *
  * Copyright (C) 2012 ST Microelectronics
- * Shiraz Hashim <shiraz.hashim@st.com>
+ * Shiraz Hashim <shiraz.linux.kernel@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
@@ -205,6 +205,6 @@ static int __init spics_gpio_init(void)
 }
 subsys_initcall(spics_gpio_init);
 
-MODULE_AUTHOR("Shiraz Hashim <shiraz.hashim@st.com>");
+MODULE_AUTHOR("Shiraz Hashim <shiraz.linux.kernel@gmail.com>");
 MODULE_DESCRIPTION("ST Microlectronics SPEAr SPI Chip Select Abstraction");
 MODULE_LICENSE("GPL");
index bf0f8b476696eeade9ff5b7947dc64628181a7ca..401add28933f4f6f39c70b626e081ec39aef554b 100644 (file)
@@ -233,7 +233,7 @@ static void acpi_gpiochip_request_interrupts(struct acpi_gpio_chip *acpi_gpio)
 {
        struct gpio_chip *chip = acpi_gpio->chip;
 
-       if (!chip->dev || !chip->to_irq)
+       if (!chip->to_irq)
                return;
 
        INIT_LIST_HEAD(&acpi_gpio->events);
@@ -253,7 +253,7 @@ static void acpi_gpiochip_free_interrupts(struct acpi_gpio_chip *acpi_gpio)
        struct acpi_gpio_event *event, *ep;
        struct gpio_chip *chip = acpi_gpio->chip;
 
-       if (!chip->dev || !chip->to_irq)
+       if (!chip->to_irq)
                return;
 
        list_for_each_entry_safe_reverse(event, ep, &acpi_gpio->events, node) {
@@ -451,7 +451,7 @@ acpi_gpio_adr_space_handler(u32 function, acpi_physical_address address,
                if (function == ACPI_WRITE)
                        gpiod_set_raw_value(desc, !!((1 << i) & *value));
                else
-                       *value |= gpiod_get_raw_value(desc) << i;
+                       *value |= (u64)gpiod_get_raw_value(desc) << i;
        }
 
 out:
@@ -501,6 +501,9 @@ void acpi_gpiochip_add(struct gpio_chip *chip)
        acpi_handle handle;
        acpi_status status;
 
+       if (!chip || !chip->dev)
+               return;
+
        handle = ACPI_HANDLE(chip->dev);
        if (!handle)
                return;
@@ -531,6 +534,9 @@ void acpi_gpiochip_remove(struct gpio_chip *chip)
        acpi_handle handle;
        acpi_status status;
 
+       if (!chip || !chip->dev)
+               return;
+
        handle = ACPI_HANDLE(chip->dev);
        if (!handle)
                return;
index 761013f8b82f5a3d7c534f201a45f2c5902cd188..f48817d974802c3ec771814bef84bc97ab6039b5 100644 (file)
@@ -1387,8 +1387,8 @@ static int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,
 {
        struct gpio_chip *chip = d->host_data;
 
-       irq_set_chip_and_handler(irq, chip->irqchip, chip->irq_handler);
        irq_set_chip_data(irq, chip);
+       irq_set_chip_and_handler(irq, chip->irqchip, chip->irq_handler);
 #ifdef CONFIG_ARM
        set_irq_flags(irq, IRQF_VALID);
 #else
index 9d25dbbe6771e4ff9ff1f7cfdce782999f82f0bf..48e38ba2278361673c4d6b2f6aa3c6a6e1f869b4 100644 (file)
@@ -23,7 +23,7 @@ drm-$(CONFIG_DRM_PANEL) += drm_panel.o
 
 drm-usb-y   := drm_usb.o
 
-drm_kms_helper-y := drm_crtc_helper.o drm_dp_helper.o
+drm_kms_helper-y := drm_crtc_helper.o drm_dp_helper.o drm_probe_helper.o
 drm_kms_helper-$(CONFIG_DRM_LOAD_EDID_FIRMWARE) += drm_edid_load.o
 drm_kms_helper-$(CONFIG_DRM_KMS_FB_HELPER) += drm_fb_helper.o
 drm_kms_helper-$(CONFIG_DRM_KMS_CMA_HELPER) += drm_fb_cma_helper.o
index 977cfb35837a004b6078fb121125d239464df90a..635f6ffc27c2852593e20a56b4cb5c451c417a38 100644 (file)
@@ -572,7 +572,7 @@ static u32 cbr_scan2(struct ast_private *ast)
                for (loop = 0; loop < CBR_PASSNUM2; loop++) {
                        if ((data = cbr_test2(ast)) != 0) {
                                data2 &= data;
-                               if (!data)
+                               if (!data2)
                                        return 0;
                                break;
                        }
index 741965c001a687e42f20ca40160e4bd52d383e9b..7eb52dd44b0109340c7add338c5e0babb175dd79 100644 (file)
@@ -1,5 +1,6 @@
 #include <linux/io.h>
 #include <linux/fb.h>
+#include <linux/console.h>
 
 #include <drm/drmP.h>
 #include <drm/drm_crtc.h>
@@ -87,8 +88,6 @@ struct bochs_device {
                struct bochs_framebuffer gfb;
                struct drm_fb_helper helper;
                int size;
-               int x1, y1, x2, y2; /* dirty rect */
-               spinlock_t dirty_lock;
                bool initialized;
        } fb;
 };
index 395bba261c9a6d3da0a3d525dac25559e0d7f78f..9c13df29fd20ea2306f3d4b57369d9ce971566ec 100644 (file)
@@ -94,6 +94,49 @@ static struct drm_driver bochs_driver = {
        .dumb_destroy           = drm_gem_dumb_destroy,
 };
 
+/* ---------------------------------------------------------------------- */
+/* pm interface                                                           */
+
+static int bochs_pm_suspend(struct device *dev)
+{
+       struct pci_dev *pdev = to_pci_dev(dev);
+       struct drm_device *drm_dev = pci_get_drvdata(pdev);
+       struct bochs_device *bochs = drm_dev->dev_private;
+
+       drm_kms_helper_poll_disable(drm_dev);
+
+       if (bochs->fb.initialized) {
+               console_lock();
+               fb_set_suspend(bochs->fb.helper.fbdev, 1);
+               console_unlock();
+       }
+
+       return 0;
+}
+
+static int bochs_pm_resume(struct device *dev)
+{
+       struct pci_dev *pdev = to_pci_dev(dev);
+       struct drm_device *drm_dev = pci_get_drvdata(pdev);
+       struct bochs_device *bochs = drm_dev->dev_private;
+
+       drm_helper_resume_force_mode(drm_dev);
+
+       if (bochs->fb.initialized) {
+               console_lock();
+               fb_set_suspend(bochs->fb.helper.fbdev, 0);
+               console_unlock();
+       }
+
+       drm_kms_helper_poll_enable(drm_dev);
+       return 0;
+}
+
+static const struct dev_pm_ops bochs_pm_ops = {
+       SET_SYSTEM_SLEEP_PM_OPS(bochs_pm_suspend,
+                               bochs_pm_resume)
+};
+
 /* ---------------------------------------------------------------------- */
 /* pci interface                                                          */
 
@@ -155,6 +198,7 @@ static struct pci_driver bochs_pci_driver = {
        .id_table =     bochs_pci_tbl,
        .probe =        bochs_pci_probe,
        .remove =       bochs_pci_remove,
+       .driver.pm =    &bochs_pm_ops,
 };
 
 /* ---------------------------------------------------------------------- */
index 4da5206b7cc97562470e527545cc284b0808123d..561b84474122a05e112ffafde7341e8a85f284ad 100644 (file)
@@ -190,7 +190,6 @@ int bochs_fbdev_init(struct bochs_device *bochs)
        int ret;
 
        bochs->fb.helper.funcs = &bochs_fb_helper_funcs;
-       spin_lock_init(&bochs->fb.dirty_lock);
 
        ret = drm_fb_helper_init(bochs->dev, &bochs->fb.helper,
                                 1, 1);
index 953fc8aea69c141cf076dcccbc1c4ed2ec775321..08ce520f61a5aa4f43823a3cc8fa30ce47315067 100644 (file)
@@ -11,6 +11,7 @@
 #include <linux/module.h>
 #include <linux/console.h>
 #include <drm/drmP.h>
+#include <drm/drm_crtc_helper.h>
 
 #include "cirrus_drv.h"
 
@@ -75,6 +76,41 @@ static void cirrus_pci_remove(struct pci_dev *pdev)
        drm_put_dev(dev);
 }
 
+static int cirrus_pm_suspend(struct device *dev)
+{
+       struct pci_dev *pdev = to_pci_dev(dev);
+       struct drm_device *drm_dev = pci_get_drvdata(pdev);
+       struct cirrus_device *cdev = drm_dev->dev_private;
+
+       drm_kms_helper_poll_disable(drm_dev);
+
+       if (cdev->mode_info.gfbdev) {
+               console_lock();
+               fb_set_suspend(cdev->mode_info.gfbdev->helper.fbdev, 1);
+               console_unlock();
+       }
+
+       return 0;
+}
+
+static int cirrus_pm_resume(struct device *dev)
+{
+       struct pci_dev *pdev = to_pci_dev(dev);
+       struct drm_device *drm_dev = pci_get_drvdata(pdev);
+       struct cirrus_device *cdev = drm_dev->dev_private;
+
+       drm_helper_resume_force_mode(drm_dev);
+
+       if (cdev->mode_info.gfbdev) {
+               console_lock();
+               fb_set_suspend(cdev->mode_info.gfbdev->helper.fbdev, 0);
+               console_unlock();
+       }
+
+       drm_kms_helper_poll_enable(drm_dev);
+       return 0;
+}
+
 static const struct file_operations cirrus_driver_fops = {
        .owner = THIS_MODULE,
        .open = drm_open,
@@ -103,11 +139,17 @@ static struct drm_driver driver = {
        .dumb_destroy = drm_gem_dumb_destroy,
 };
 
+static const struct dev_pm_ops cirrus_pm_ops = {
+       SET_SYSTEM_SLEEP_PM_OPS(cirrus_pm_suspend,
+                               cirrus_pm_resume)
+};
+
 static struct pci_driver cirrus_pci_driver = {
        .name = DRIVER_NAME,
        .id_table = pciidlist,
        .probe = cirrus_pci_probe,
        .remove = cirrus_pci_remove,
+       .driver.pm = &cirrus_pm_ops,
 };
 
 static int __init cirrus_init(void)
index 2d64aea83df21a05a74c7470ab8054350063e8df..f59433b7610c560db846a9e330a3b3a1b87c1f0b 100644 (file)
@@ -308,6 +308,9 @@ static int cirrus_crtc_mode_set(struct drm_crtc *crtc,
 
        WREG_HDR(hdr);
        cirrus_crtc_do_set_base(crtc, old_fb, x, y, 0);
+
+       /* Unblank (needed on S3 resume, vgabios doesn't do it then) */
+       outb(0x20, 0x3c0);
        return 0;
 }
 
index c43825e8f5c12c0ba4fd5e9b27181cfac8dfc4d0..df281b54db0155fef51c700f62ad2dd20d22ab24 100644 (file)
@@ -72,147 +72,6 @@ void drm_helper_move_panel_connectors_to_head(struct drm_device *dev)
 }
 EXPORT_SYMBOL(drm_helper_move_panel_connectors_to_head);
 
-static bool drm_kms_helper_poll = true;
-module_param_named(poll, drm_kms_helper_poll, bool, 0600);
-
-static void drm_mode_validate_flag(struct drm_connector *connector,
-                                  int flags)
-{
-       struct drm_display_mode *mode;
-
-       if (flags == (DRM_MODE_FLAG_DBLSCAN | DRM_MODE_FLAG_INTERLACE |
-                     DRM_MODE_FLAG_3D_MASK))
-               return;
-
-       list_for_each_entry(mode, &connector->modes, head) {
-               if ((mode->flags & DRM_MODE_FLAG_INTERLACE) &&
-                               !(flags & DRM_MODE_FLAG_INTERLACE))
-                       mode->status = MODE_NO_INTERLACE;
-               if ((mode->flags & DRM_MODE_FLAG_DBLSCAN) &&
-                               !(flags & DRM_MODE_FLAG_DBLSCAN))
-                       mode->status = MODE_NO_DBLESCAN;
-               if ((mode->flags & DRM_MODE_FLAG_3D_MASK) &&
-                               !(flags & DRM_MODE_FLAG_3D_MASK))
-                       mode->status = MODE_NO_STEREO;
-       }
-
-       return;
-}
-
-/**
- * drm_helper_probe_single_connector_modes - get complete set of display modes
- * @connector: connector to probe
- * @maxX: max width for modes
- * @maxY: max height for modes
- *
- * Based on the helper callbacks implemented by @connector try to detect all
- * valid modes.  Modes will first be added to the connector's probed_modes list,
- * then culled (based on validity and the @maxX, @maxY parameters) and put into
- * the normal modes list.
- *
- * Intended to be use as a generic implementation of the ->fill_modes()
- * @connector vfunc for drivers that use the crtc helpers for output mode
- * filtering and detection.
- *
- * Returns:
- * The number of modes found on @connector.
- */
-int drm_helper_probe_single_connector_modes(struct drm_connector *connector,
-                                           uint32_t maxX, uint32_t maxY)
-{
-       struct drm_device *dev = connector->dev;
-       struct drm_display_mode *mode;
-       struct drm_connector_helper_funcs *connector_funcs =
-               connector->helper_private;
-       int count = 0;
-       int mode_flags = 0;
-       bool verbose_prune = true;
-
-       WARN_ON(!mutex_is_locked(&dev->mode_config.mutex));
-
-       DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", connector->base.id,
-                       drm_get_connector_name(connector));
-       /* set all modes to the unverified state */
-       list_for_each_entry(mode, &connector->modes, head)
-               mode->status = MODE_UNVERIFIED;
-
-       if (connector->force) {
-               if (connector->force == DRM_FORCE_ON)
-                       connector->status = connector_status_connected;
-               else
-                       connector->status = connector_status_disconnected;
-               if (connector->funcs->force)
-                       connector->funcs->force(connector);
-       } else {
-               connector->status = connector->funcs->detect(connector, true);
-       }
-
-       /* Re-enable polling in case the global poll config changed. */
-       if (drm_kms_helper_poll != dev->mode_config.poll_running)
-               drm_kms_helper_poll_enable(dev);
-
-       dev->mode_config.poll_running = drm_kms_helper_poll;
-
-       if (connector->status == connector_status_disconnected) {
-               DRM_DEBUG_KMS("[CONNECTOR:%d:%s] disconnected\n",
-                       connector->base.id, drm_get_connector_name(connector));
-               drm_mode_connector_update_edid_property(connector, NULL);
-               verbose_prune = false;
-               goto prune;
-       }
-
-#ifdef CONFIG_DRM_LOAD_EDID_FIRMWARE
-       count = drm_load_edid_firmware(connector);
-       if (count == 0)
-#endif
-               count = (*connector_funcs->get_modes)(connector);
-
-       if (count == 0 && connector->status == connector_status_connected)
-               count = drm_add_modes_noedid(connector, 1024, 768);
-       if (count == 0)
-               goto prune;
-
-       drm_mode_connector_list_update(connector);
-
-       if (maxX && maxY)
-               drm_mode_validate_size(dev, &connector->modes, maxX, maxY);
-
-       if (connector->interlace_allowed)
-               mode_flags |= DRM_MODE_FLAG_INTERLACE;
-       if (connector->doublescan_allowed)
-               mode_flags |= DRM_MODE_FLAG_DBLSCAN;
-       if (connector->stereo_allowed)
-               mode_flags |= DRM_MODE_FLAG_3D_MASK;
-       drm_mode_validate_flag(connector, mode_flags);
-
-       list_for_each_entry(mode, &connector->modes, head) {
-               if (mode->status == MODE_OK)
-                       mode->status = connector_funcs->mode_valid(connector,
-                                                                  mode);
-       }
-
-prune:
-       drm_mode_prune_invalid(dev, &connector->modes, verbose_prune);
-
-       if (list_empty(&connector->modes))
-               return 0;
-
-       list_for_each_entry(mode, &connector->modes, head)
-               mode->vrefresh = drm_mode_vrefresh(mode);
-
-       drm_mode_sort(&connector->modes);
-
-       DRM_DEBUG_KMS("[CONNECTOR:%d:%s] probed modes :\n", connector->base.id,
-                       drm_get_connector_name(connector));
-       list_for_each_entry(mode, &connector->modes, head) {
-               drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
-               drm_mode_debug_printmodeline(mode);
-       }
-
-       return count;
-}
-EXPORT_SYMBOL(drm_helper_probe_single_connector_modes);
-
 /**
  * drm_helper_encoder_in_use - check if a given encoder is in use
  * @encoder: encoder to check
@@ -1020,232 +879,3 @@ void drm_helper_resume_force_mode(struct drm_device *dev)
        drm_modeset_unlock_all(dev);
 }
 EXPORT_SYMBOL(drm_helper_resume_force_mode);
-
-/**
- * drm_kms_helper_hotplug_event - fire off KMS hotplug events
- * @dev: drm_device whose connector state changed
- *
- * This function fires off the uevent for userspace and also calls the
- * output_poll_changed function, which is most commonly used to inform the fbdev
- * emulation code and allow it to update the fbcon output configuration.
- *
- * Drivers should call this from their hotplug handling code when a change is
- * detected. Note that this function does not do any output detection of its
- * own, like drm_helper_hpd_irq_event() does - this is assumed to be done by the
- * driver already.
- *
- * This function must be called from process context with no mode
- * setting locks held.
- */
-void drm_kms_helper_hotplug_event(struct drm_device *dev)
-{
-       /* send a uevent + call fbdev */
-       drm_sysfs_hotplug_event(dev);
-       if (dev->mode_config.funcs->output_poll_changed)
-               dev->mode_config.funcs->output_poll_changed(dev);
-}
-EXPORT_SYMBOL(drm_kms_helper_hotplug_event);
-
-#define DRM_OUTPUT_POLL_PERIOD (10*HZ)
-static void output_poll_execute(struct work_struct *work)
-{
-       struct delayed_work *delayed_work = to_delayed_work(work);
-       struct drm_device *dev = container_of(delayed_work, struct drm_device, mode_config.output_poll_work);
-       struct drm_connector *connector;
-       enum drm_connector_status old_status;
-       bool repoll = false, changed = false;
-
-       if (!drm_kms_helper_poll)
-               return;
-
-       mutex_lock(&dev->mode_config.mutex);
-       list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
-
-               /* Ignore forced connectors. */
-               if (connector->force)
-                       continue;
-
-               /* Ignore HPD capable connectors and connectors where we don't
-                * want any hotplug detection at all for polling. */
-               if (!connector->polled || connector->polled == DRM_CONNECTOR_POLL_HPD)
-                       continue;
-
-               repoll = true;
-
-               old_status = connector->status;
-               /* if we are connected and don't want to poll for disconnect
-                  skip it */
-               if (old_status == connector_status_connected &&
-                   !(connector->polled & DRM_CONNECTOR_POLL_DISCONNECT))
-                       continue;
-
-               connector->status = connector->funcs->detect(connector, false);
-               if (old_status != connector->status) {
-                       const char *old, *new;
-
-                       old = drm_get_connector_status_name(old_status);
-                       new = drm_get_connector_status_name(connector->status);
-
-                       DRM_DEBUG_KMS("[CONNECTOR:%d:%s] "
-                                     "status updated from %s to %s\n",
-                                     connector->base.id,
-                                     drm_get_connector_name(connector),
-                                     old, new);
-
-                       changed = true;
-               }
-       }
-
-       mutex_unlock(&dev->mode_config.mutex);
-
-       if (changed)
-               drm_kms_helper_hotplug_event(dev);
-
-       if (repoll)
-               schedule_delayed_work(delayed_work, DRM_OUTPUT_POLL_PERIOD);
-}
-
-/**
- * drm_kms_helper_poll_disable - disable output polling
- * @dev: drm_device
- *
- * This function disables the output polling work.
- *
- * Drivers can call this helper from their device suspend implementation. It is
- * not an error to call this even when output polling isn't enabled or arlready
- * disabled.
- */
-void drm_kms_helper_poll_disable(struct drm_device *dev)
-{
-       if (!dev->mode_config.poll_enabled)
-               return;
-       cancel_delayed_work_sync(&dev->mode_config.output_poll_work);
-}
-EXPORT_SYMBOL(drm_kms_helper_poll_disable);
-
-/**
- * drm_kms_helper_poll_enable - re-enable output polling.
- * @dev: drm_device
- *
- * This function re-enables the output polling work.
- *
- * Drivers can call this helper from their device resume implementation. It is
- * an error to call this when the output polling support has not yet been set
- * up.
- */
-void drm_kms_helper_poll_enable(struct drm_device *dev)
-{
-       bool poll = false;
-       struct drm_connector *connector;
-
-       if (!dev->mode_config.poll_enabled || !drm_kms_helper_poll)
-               return;
-
-       list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
-               if (connector->polled & (DRM_CONNECTOR_POLL_CONNECT |
-                                        DRM_CONNECTOR_POLL_DISCONNECT))
-                       poll = true;
-       }
-
-       if (poll)
-               schedule_delayed_work(&dev->mode_config.output_poll_work, DRM_OUTPUT_POLL_PERIOD);
-}
-EXPORT_SYMBOL(drm_kms_helper_poll_enable);
-
-/**
- * drm_kms_helper_poll_init - initialize and enable output polling
- * @dev: drm_device
- *
- * This function intializes and then also enables output polling support for
- * @dev. Drivers which do not have reliable hotplug support in hardware can use
- * this helper infrastructure to regularly poll such connectors for changes in
- * their connection state.
- *
- * Drivers can control which connectors are polled by setting the
- * DRM_CONNECTOR_POLL_CONNECT and DRM_CONNECTOR_POLL_DISCONNECT flags. On
- * connectors where probing live outputs can result in visual distortion drivers
- * should not set the DRM_CONNECTOR_POLL_DISCONNECT flag to avoid this.
- * Connectors which have no flag or only DRM_CONNECTOR_POLL_HPD set are
- * completely ignored by the polling logic.
- *
- * Note that a connector can be both polled and probed from the hotplug handler,
- * in case the hotplug interrupt is known to be unreliable.
- */
-void drm_kms_helper_poll_init(struct drm_device *dev)
-{
-       INIT_DELAYED_WORK(&dev->mode_config.output_poll_work, output_poll_execute);
-       dev->mode_config.poll_enabled = true;
-
-       drm_kms_helper_poll_enable(dev);
-}
-EXPORT_SYMBOL(drm_kms_helper_poll_init);
-
-/**
- * drm_kms_helper_poll_fini - disable output polling and clean it up
- * @dev: drm_device
- */
-void drm_kms_helper_poll_fini(struct drm_device *dev)
-{
-       drm_kms_helper_poll_disable(dev);
-}
-EXPORT_SYMBOL(drm_kms_helper_poll_fini);
-
-/**
- * drm_helper_hpd_irq_event - hotplug processing
- * @dev: drm_device
- *
- * Drivers can use this helper function to run a detect cycle on all connectors
- * which have the DRM_CONNECTOR_POLL_HPD flag set in their &polled member. All
- * other connectors are ignored, which is useful to avoid reprobing fixed
- * panels.
- *
- * This helper function is useful for drivers which can't or don't track hotplug
- * interrupts for each connector.
- *
- * Drivers which support hotplug interrupts for each connector individually and
- * which have a more fine-grained detect logic should bypass this code and
- * directly call drm_kms_helper_hotplug_event() in case the connector state
- * changed.
- *
- * This function must be called from process context with no mode
- * setting locks held.
- *
- * Note that a connector can be both polled and probed from the hotplug handler,
- * in case the hotplug interrupt is known to be unreliable.
- */
-bool drm_helper_hpd_irq_event(struct drm_device *dev)
-{
-       struct drm_connector *connector;
-       enum drm_connector_status old_status;
-       bool changed = false;
-
-       if (!dev->mode_config.poll_enabled)
-               return false;
-
-       mutex_lock(&dev->mode_config.mutex);
-       list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
-
-               /* Only handle HPD capable connectors. */
-               if (!(connector->polled & DRM_CONNECTOR_POLL_HPD))
-                       continue;
-
-               old_status = connector->status;
-
-               connector->status = connector->funcs->detect(connector, false);
-               DRM_DEBUG_KMS("[CONNECTOR:%d:%s] status updated from %s to %s\n",
-                             connector->base.id,
-                             drm_get_connector_name(connector),
-                             drm_get_connector_status_name(old_status),
-                             drm_get_connector_status_name(connector->status));
-               if (old_status != connector->status)
-                       changed = true;
-       }
-
-       mutex_unlock(&dev->mode_config.mutex);
-
-       if (changed)
-               drm_kms_helper_hotplug_event(dev);
-
-       return changed;
-}
-EXPORT_SYMBOL(drm_helper_hpd_irq_event);
index 27671489477de6cb6c37eeb80959475d38b71bcc..4b6e6f3ba0a19cf10326110897ad665048da29f1 100644 (file)
@@ -577,7 +577,9 @@ static u32 drm_dp_i2c_functionality(struct i2c_adapter *adapter)
 
 /*
  * Transfer a single I2C-over-AUX message and handle various error conditions,
- * retrying the transaction as appropriate.
+ * retrying the transaction as appropriate.  It is assumed that the
+ * aux->transfer function does not modify anything in the msg other than the
+ * reply field.
  */
 static int drm_dp_i2c_do_msg(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
 {
@@ -665,11 +667,26 @@ static int drm_dp_i2c_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs,
 {
        struct drm_dp_aux *aux = adapter->algo_data;
        unsigned int i, j;
+       struct drm_dp_aux_msg msg;
+       int err = 0;
 
-       for (i = 0; i < num; i++) {
-               struct drm_dp_aux_msg msg;
-               int err;
+       memset(&msg, 0, sizeof(msg));
 
+       for (i = 0; i < num; i++) {
+               msg.address = msgs[i].addr;
+               msg.request = (msgs[i].flags & I2C_M_RD) ?
+                       DP_AUX_I2C_READ :
+                       DP_AUX_I2C_WRITE;
+               msg.request |= DP_AUX_I2C_MOT;
+               /* Send a bare address packet to start the transaction.
+                * Zero sized messages specify an address only (bare
+                * address) transaction.
+                */
+               msg.buffer = NULL;
+               msg.size = 0;
+               err = drm_dp_i2c_do_msg(aux, &msg);
+               if (err < 0)
+                       break;
                /*
                 * Many hardware implementations support FIFOs larger than a
                 * single byte, but it has been empirically determined that
@@ -678,30 +695,28 @@ static int drm_dp_i2c_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs,
                 * transferred byte-by-byte.
                 */
                for (j = 0; j < msgs[i].len; j++) {
-                       memset(&msg, 0, sizeof(msg));
-                       msg.address = msgs[i].addr;
-
-                       msg.request = (msgs[i].flags & I2C_M_RD) ?
-                                       DP_AUX_I2C_READ :
-                                       DP_AUX_I2C_WRITE;
-
-                       /*
-                        * All messages except the last one are middle-of-
-                        * transfer messages.
-                        */
-                       if ((i < num - 1) || (j < msgs[i].len - 1))
-                               msg.request |= DP_AUX_I2C_MOT;
-
                        msg.buffer = msgs[i].buf + j;
                        msg.size = 1;
 
                        err = drm_dp_i2c_do_msg(aux, &msg);
                        if (err < 0)
-                               return err;
+                               break;
                }
+               if (err < 0)
+                       break;
        }
+       if (err >= 0)
+               err = num;
+       /* Send a bare address packet to close out the transaction.
+        * Zero sized messages specify an address only (bare
+        * address) transaction.
+        */
+       msg.request &= ~DP_AUX_I2C_MOT;
+       msg.buffer = NULL;
+       msg.size = 0;
+       (void)drm_dp_i2c_do_msg(aux, &msg);
 
-       return num;
+       return err;
 }
 
 static const struct i2c_algorithm drm_dp_i2c_algo = {
index 71e2d3fcd6ee3c17b589cdfb7cc8baf142605bfd..04a209e2b66d7d61428398bb5b58b2222ec2a712 100644 (file)
@@ -207,8 +207,6 @@ int drm_mm_reserve_node(struct drm_mm *mm, struct drm_mm_node *node)
                return 0;
        }
 
-       WARN(1, "no hole found for node 0x%lx + 0x%lx\n",
-            node->start, node->size);
        return -ENOSPC;
 }
 EXPORT_SYMBOL(drm_mm_reserve_node);
index e768d35ff22ecf26b0d1428ba996464b99719f1b..d2b1c03b3d7113f03027199107732d76acdf58ea 100644 (file)
@@ -203,9 +203,9 @@ EXPORT_SYMBOL(drm_primary_helper_update);
  *
  * Provides a default plane disable handler for primary planes.  This is handler
  * is called in response to a userspace SetPlane operation on the plane with a
- * NULL framebuffer parameter.  We call the driver's modeset handler with a NULL
- * framebuffer to disable the CRTC if no other planes are currently enabled.
- * If other planes are still enabled on the same CRTC, we return -EBUSY.
+ * NULL framebuffer parameter.  It unconditionally fails the disable call with
+ * -EINVAL the only way to disable the primary plane without driver support is
+ * to disable the entier CRTC. Which does not match the plane ->disable hook.
  *
  * Note that some hardware may be able to disable the primary plane without
  * disabling the whole CRTC.  Drivers for such hardware should provide their
@@ -214,34 +214,11 @@ EXPORT_SYMBOL(drm_primary_helper_update);
  * disabled primary plane).
  *
  * RETURNS:
- * Zero on success, error code on failure
+ * Unconditionally returns -EINVAL.
  */
 int drm_primary_helper_disable(struct drm_plane *plane)
 {
-       struct drm_plane *p;
-       struct drm_mode_set set = {
-               .crtc = plane->crtc,
-               .fb = NULL,
-       };
-
-       if (plane->crtc == NULL || plane->fb == NULL)
-               /* Already disabled */
-               return 0;
-
-       list_for_each_entry(p, &plane->dev->mode_config.plane_list, head)
-               if (p != plane && p->fb) {
-                       DRM_DEBUG_KMS("Cannot disable primary plane while other planes are still active on CRTC.\n");
-                       return -EBUSY;
-               }
-
-       /*
-        * N.B.  We call set_config() directly here rather than
-        * drm_mode_set_config_internal() since drm_mode_setplane() already
-        * handles the basic refcounting and we don't need the special
-        * cross-CRTC refcounting (no chance of stealing connectors from
-        * other CRTC's with this update).
-        */
-       return plane->crtc->funcs->set_config(&set);
+       return -EINVAL;
 }
 EXPORT_SYMBOL(drm_primary_helper_disable);
 
diff --git a/drivers/gpu/drm/drm_probe_helper.c b/drivers/gpu/drm/drm_probe_helper.c
new file mode 100644 (file)
index 0000000..e70f54d
--- /dev/null
@@ -0,0 +1,426 @@
+/*
+ * Copyright (c) 2006-2008 Intel Corporation
+ * Copyright (c) 2007 Dave Airlie <airlied@linux.ie>
+ *
+ * DRM core CRTC related functions
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that copyright
+ * notice and this permission notice appear in supporting documentation, and
+ * that the name of the copyright holders not be used in advertising or
+ * publicity pertaining to distribution of the software without specific,
+ * written prior permission.  The copyright holders make no representations
+ * about the suitability of this software for any purpose.  It is provided "as
+ * is" without express or implied warranty.
+ *
+ * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
+ * OF THIS SOFTWARE.
+ *
+ * Authors:
+ *      Keith Packard
+ *     Eric Anholt <eric@anholt.net>
+ *      Dave Airlie <airlied@linux.ie>
+ *      Jesse Barnes <jesse.barnes@intel.com>
+ */
+
+#include <linux/export.h>
+#include <linux/moduleparam.h>
+
+#include <drm/drmP.h>
+#include <drm/drm_crtc.h>
+#include <drm/drm_fourcc.h>
+#include <drm/drm_crtc_helper.h>
+#include <drm/drm_fb_helper.h>
+#include <drm/drm_edid.h>
+
+/**
+ * DOC: output probing helper overview
+ *
+ * This library provides some helper code for output probing. It provides an
+ * implementation of the core connector->fill_modes interface with
+ * drm_helper_probe_single_connector_modes.
+ *
+ * It also provides support for polling connectors with a work item and for
+ * generic hotplug interrupt handling where the driver doesn't or cannot keep
+ * track of a per-connector hpd interrupt.
+ *
+ * This helper library can be used independently of the modeset helper library.
+ * Drivers can also overwrite different parts e.g. use their own hotplug
+ * handling code to avoid probing unrelated outputs.
+ */
+
+static bool drm_kms_helper_poll = true;
+module_param_named(poll, drm_kms_helper_poll, bool, 0600);
+
+static void drm_mode_validate_flag(struct drm_connector *connector,
+                                  int flags)
+{
+       struct drm_display_mode *mode;
+
+       if (flags == (DRM_MODE_FLAG_DBLSCAN | DRM_MODE_FLAG_INTERLACE |
+                     DRM_MODE_FLAG_3D_MASK))
+               return;
+
+       list_for_each_entry(mode, &connector->modes, head) {
+               if ((mode->flags & DRM_MODE_FLAG_INTERLACE) &&
+                               !(flags & DRM_MODE_FLAG_INTERLACE))
+                       mode->status = MODE_NO_INTERLACE;
+               if ((mode->flags & DRM_MODE_FLAG_DBLSCAN) &&
+                               !(flags & DRM_MODE_FLAG_DBLSCAN))
+                       mode->status = MODE_NO_DBLESCAN;
+               if ((mode->flags & DRM_MODE_FLAG_3D_MASK) &&
+                               !(flags & DRM_MODE_FLAG_3D_MASK))
+                       mode->status = MODE_NO_STEREO;
+       }
+
+       return;
+}
+
+/**
+ * drm_helper_probe_single_connector_modes - get complete set of display modes
+ * @connector: connector to probe
+ * @maxX: max width for modes
+ * @maxY: max height for modes
+ *
+ * Based on the helper callbacks implemented by @connector try to detect all
+ * valid modes.  Modes will first be added to the connector's probed_modes list,
+ * then culled (based on validity and the @maxX, @maxY parameters) and put into
+ * the normal modes list.
+ *
+ * Intended to be use as a generic implementation of the ->fill_modes()
+ * @connector vfunc for drivers that use the crtc helpers for output mode
+ * filtering and detection.
+ *
+ * Returns:
+ * The number of modes found on @connector.
+ */
+int drm_helper_probe_single_connector_modes(struct drm_connector *connector,
+                                           uint32_t maxX, uint32_t maxY)
+{
+       struct drm_device *dev = connector->dev;
+       struct drm_display_mode *mode;
+       struct drm_connector_helper_funcs *connector_funcs =
+               connector->helper_private;
+       int count = 0;
+       int mode_flags = 0;
+       bool verbose_prune = true;
+
+       WARN_ON(!mutex_is_locked(&dev->mode_config.mutex));
+
+       DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", connector->base.id,
+                       drm_get_connector_name(connector));
+       /* set all modes to the unverified state */
+       list_for_each_entry(mode, &connector->modes, head)
+               mode->status = MODE_UNVERIFIED;
+
+       if (connector->force) {
+               if (connector->force == DRM_FORCE_ON)
+                       connector->status = connector_status_connected;
+               else
+                       connector->status = connector_status_disconnected;
+               if (connector->funcs->force)
+                       connector->funcs->force(connector);
+       } else {
+               connector->status = connector->funcs->detect(connector, true);
+       }
+
+       /* Re-enable polling in case the global poll config changed. */
+       if (drm_kms_helper_poll != dev->mode_config.poll_running)
+               drm_kms_helper_poll_enable(dev);
+
+       dev->mode_config.poll_running = drm_kms_helper_poll;
+
+       if (connector->status == connector_status_disconnected) {
+               DRM_DEBUG_KMS("[CONNECTOR:%d:%s] disconnected\n",
+                       connector->base.id, drm_get_connector_name(connector));
+               drm_mode_connector_update_edid_property(connector, NULL);
+               verbose_prune = false;
+               goto prune;
+       }
+
+#ifdef CONFIG_DRM_LOAD_EDID_FIRMWARE
+       count = drm_load_edid_firmware(connector);
+       if (count == 0)
+#endif
+               count = (*connector_funcs->get_modes)(connector);
+
+       if (count == 0 && connector->status == connector_status_connected)
+               count = drm_add_modes_noedid(connector, 1024, 768);
+       if (count == 0)
+               goto prune;
+
+       drm_mode_connector_list_update(connector);
+
+       if (maxX && maxY)
+               drm_mode_validate_size(dev, &connector->modes, maxX, maxY);
+
+       if (connector->interlace_allowed)
+               mode_flags |= DRM_MODE_FLAG_INTERLACE;
+       if (connector->doublescan_allowed)
+               mode_flags |= DRM_MODE_FLAG_DBLSCAN;
+       if (connector->stereo_allowed)
+               mode_flags |= DRM_MODE_FLAG_3D_MASK;
+       drm_mode_validate_flag(connector, mode_flags);
+
+       list_for_each_entry(mode, &connector->modes, head) {
+               if (mode->status == MODE_OK)
+                       mode->status = connector_funcs->mode_valid(connector,
+                                                                  mode);
+       }
+
+prune:
+       drm_mode_prune_invalid(dev, &connector->modes, verbose_prune);
+
+       if (list_empty(&connector->modes))
+               return 0;
+
+       list_for_each_entry(mode, &connector->modes, head)
+               mode->vrefresh = drm_mode_vrefresh(mode);
+
+       drm_mode_sort(&connector->modes);
+
+       DRM_DEBUG_KMS("[CONNECTOR:%d:%s] probed modes :\n", connector->base.id,
+                       drm_get_connector_name(connector));
+       list_for_each_entry(mode, &connector->modes, head) {
+               drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
+               drm_mode_debug_printmodeline(mode);
+       }
+
+       return count;
+}
+EXPORT_SYMBOL(drm_helper_probe_single_connector_modes);
+
+/**
+ * drm_kms_helper_hotplug_event - fire off KMS hotplug events
+ * @dev: drm_device whose connector state changed
+ *
+ * This function fires off the uevent for userspace and also calls the
+ * output_poll_changed function, which is most commonly used to inform the fbdev
+ * emulation code and allow it to update the fbcon output configuration.
+ *
+ * Drivers should call this from their hotplug handling code when a change is
+ * detected. Note that this function does not do any output detection of its
+ * own, like drm_helper_hpd_irq_event() does - this is assumed to be done by the
+ * driver already.
+ *
+ * This function must be called from process context with no mode
+ * setting locks held.
+ */
+void drm_kms_helper_hotplug_event(struct drm_device *dev)
+{
+       /* send a uevent + call fbdev */
+       drm_sysfs_hotplug_event(dev);
+       if (dev->mode_config.funcs->output_poll_changed)
+               dev->mode_config.funcs->output_poll_changed(dev);
+}
+EXPORT_SYMBOL(drm_kms_helper_hotplug_event);
+
+#define DRM_OUTPUT_POLL_PERIOD (10*HZ)
+static void output_poll_execute(struct work_struct *work)
+{
+       struct delayed_work *delayed_work = to_delayed_work(work);
+       struct drm_device *dev = container_of(delayed_work, struct drm_device, mode_config.output_poll_work);
+       struct drm_connector *connector;
+       enum drm_connector_status old_status;
+       bool repoll = false, changed = false;
+
+       if (!drm_kms_helper_poll)
+               return;
+
+       mutex_lock(&dev->mode_config.mutex);
+       list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
+
+               /* Ignore forced connectors. */
+               if (connector->force)
+                       continue;
+
+               /* Ignore HPD capable connectors and connectors where we don't
+                * want any hotplug detection at all for polling. */
+               if (!connector->polled || connector->polled == DRM_CONNECTOR_POLL_HPD)
+                       continue;
+
+               repoll = true;
+
+               old_status = connector->status;
+               /* if we are connected and don't want to poll for disconnect
+                  skip it */
+               if (old_status == connector_status_connected &&
+                   !(connector->polled & DRM_CONNECTOR_POLL_DISCONNECT))
+                       continue;
+
+               connector->status = connector->funcs->detect(connector, false);
+               if (old_status != connector->status) {
+                       const char *old, *new;
+
+                       old = drm_get_connector_status_name(old_status);
+                       new = drm_get_connector_status_name(connector->status);
+
+                       DRM_DEBUG_KMS("[CONNECTOR:%d:%s] "
+                                     "status updated from %s to %s\n",
+                                     connector->base.id,
+                                     drm_get_connector_name(connector),
+                                     old, new);
+
+                       changed = true;
+               }
+       }
+
+       mutex_unlock(&dev->mode_config.mutex);
+
+       if (changed)
+               drm_kms_helper_hotplug_event(dev);
+
+       if (repoll)
+               schedule_delayed_work(delayed_work, DRM_OUTPUT_POLL_PERIOD);
+}
+
+/**
+ * drm_kms_helper_poll_disable - disable output polling
+ * @dev: drm_device
+ *
+ * This function disables the output polling work.
+ *
+ * Drivers can call this helper from their device suspend implementation. It is
+ * not an error to call this even when output polling isn't enabled or arlready
+ * disabled.
+ */
+void drm_kms_helper_poll_disable(struct drm_device *dev)
+{
+       if (!dev->mode_config.poll_enabled)
+               return;
+       cancel_delayed_work_sync(&dev->mode_config.output_poll_work);
+}
+EXPORT_SYMBOL(drm_kms_helper_poll_disable);
+
+/**
+ * drm_kms_helper_poll_enable - re-enable output polling.
+ * @dev: drm_device
+ *
+ * This function re-enables the output polling work.
+ *
+ * Drivers can call this helper from their device resume implementation. It is
+ * an error to call this when the output polling support has not yet been set
+ * up.
+ */
+void drm_kms_helper_poll_enable(struct drm_device *dev)
+{
+       bool poll = false;
+       struct drm_connector *connector;
+
+       if (!dev->mode_config.poll_enabled || !drm_kms_helper_poll)
+               return;
+
+       list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
+               if (connector->polled & (DRM_CONNECTOR_POLL_CONNECT |
+                                        DRM_CONNECTOR_POLL_DISCONNECT))
+                       poll = true;
+       }
+
+       if (poll)
+               schedule_delayed_work(&dev->mode_config.output_poll_work, DRM_OUTPUT_POLL_PERIOD);
+}
+EXPORT_SYMBOL(drm_kms_helper_poll_enable);
+
+/**
+ * drm_kms_helper_poll_init - initialize and enable output polling
+ * @dev: drm_device
+ *
+ * This function intializes and then also enables output polling support for
+ * @dev. Drivers which do not have reliable hotplug support in hardware can use
+ * this helper infrastructure to regularly poll such connectors for changes in
+ * their connection state.
+ *
+ * Drivers can control which connectors are polled by setting the
+ * DRM_CONNECTOR_POLL_CONNECT and DRM_CONNECTOR_POLL_DISCONNECT flags. On
+ * connectors where probing live outputs can result in visual distortion drivers
+ * should not set the DRM_CONNECTOR_POLL_DISCONNECT flag to avoid this.
+ * Connectors which have no flag or only DRM_CONNECTOR_POLL_HPD set are
+ * completely ignored by the polling logic.
+ *
+ * Note that a connector can be both polled and probed from the hotplug handler,
+ * in case the hotplug interrupt is known to be unreliable.
+ */
+void drm_kms_helper_poll_init(struct drm_device *dev)
+{
+       INIT_DELAYED_WORK(&dev->mode_config.output_poll_work, output_poll_execute);
+       dev->mode_config.poll_enabled = true;
+
+       drm_kms_helper_poll_enable(dev);
+}
+EXPORT_SYMBOL(drm_kms_helper_poll_init);
+
+/**
+ * drm_kms_helper_poll_fini - disable output polling and clean it up
+ * @dev: drm_device
+ */
+void drm_kms_helper_poll_fini(struct drm_device *dev)
+{
+       drm_kms_helper_poll_disable(dev);
+}
+EXPORT_SYMBOL(drm_kms_helper_poll_fini);
+
+/**
+ * drm_helper_hpd_irq_event - hotplug processing
+ * @dev: drm_device
+ *
+ * Drivers can use this helper function to run a detect cycle on all connectors
+ * which have the DRM_CONNECTOR_POLL_HPD flag set in their &polled member. All
+ * other connectors are ignored, which is useful to avoid reprobing fixed
+ * panels.
+ *
+ * This helper function is useful for drivers which can't or don't track hotplug
+ * interrupts for each connector.
+ *
+ * Drivers which support hotplug interrupts for each connector individually and
+ * which have a more fine-grained detect logic should bypass this code and
+ * directly call drm_kms_helper_hotplug_event() in case the connector state
+ * changed.
+ *
+ * This function must be called from process context with no mode
+ * setting locks held.
+ *
+ * Note that a connector can be both polled and probed from the hotplug handler,
+ * in case the hotplug interrupt is known to be unreliable.
+ */
+bool drm_helper_hpd_irq_event(struct drm_device *dev)
+{
+       struct drm_connector *connector;
+       enum drm_connector_status old_status;
+       bool changed = false;
+
+       if (!dev->mode_config.poll_enabled)
+               return false;
+
+       mutex_lock(&dev->mode_config.mutex);
+       list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
+
+               /* Only handle HPD capable connectors. */
+               if (!(connector->polled & DRM_CONNECTOR_POLL_HPD))
+                       continue;
+
+               old_status = connector->status;
+
+               connector->status = connector->funcs->detect(connector, false);
+               DRM_DEBUG_KMS("[CONNECTOR:%d:%s] status updated from %s to %s\n",
+                             connector->base.id,
+                             drm_get_connector_name(connector),
+                             drm_get_connector_status_name(old_status),
+                             drm_get_connector_status_name(connector->status));
+               if (old_status != connector->status)
+                       changed = true;
+       }
+
+       mutex_unlock(&dev->mode_config.mutex);
+
+       if (changed)
+               drm_kms_helper_hotplug_event(dev);
+
+       return changed;
+}
+EXPORT_SYMBOL(drm_helper_hpd_irq_event);
index e930d4fe29c71c2d82d2317bb6681ac8d3f39d6a..1ef5ab9c9d519d175b202dbf01cba243a870e1f7 100644 (file)
@@ -145,6 +145,7 @@ exynos_drm_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode,
 
        plane->crtc = crtc;
        plane->fb = crtc->primary->fb;
+       drm_framebuffer_reference(plane->fb);
 
        return 0;
 }
index c786cd4f457bb8893fc4f02e8e27338832b1bc58..2a3ad24276f8380415940d00b87708f9cbe0d9e2 100644 (file)
@@ -263,7 +263,7 @@ struct drm_gem_object *exynos_dmabuf_prime_import(struct drm_device *drm_dev,
        buffer->sgt = sgt;
        exynos_gem_obj->base.import_attach = attach;
 
-       DRM_DEBUG_PRIME("dma_addr = 0x%x, size = 0x%lx\n", buffer->dma_addr,
+       DRM_DEBUG_PRIME("dma_addr = %pad, size = 0x%lx\n", &buffer->dma_addr,
                                                                buffer->size);
 
        return &exynos_gem_obj->base;
index eb73e3bf2a0cbe6e56f9ae6b5d81b188038f05e3..4ac438187568ed4a6894436433e404c94b90a7a2 100644 (file)
@@ -1426,9 +1426,9 @@ static int exynos_dsi_probe(struct platform_device *pdev)
 
        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
        dsi->reg_base = devm_ioremap_resource(&pdev->dev, res);
-       if (!dsi->reg_base) {
+       if (IS_ERR(dsi->reg_base)) {
                dev_err(&pdev->dev, "failed to remap io region\n");
-               return -EADDRNOTAVAIL;
+               return PTR_ERR(dsi->reg_base);
        }
 
        dsi->phy = devm_phy_get(&pdev->dev, "dsim");
index 7afead9c3f30258b7869e69e0f2015d9c2921fca..852f2dadaebdbbe3a385b5fe28cd65a560f0c210 100644 (file)
@@ -220,7 +220,7 @@ static void vidi_win_commit(struct exynos_drm_manager *mgr, int zpos)
 
        win_data->enabled = true;
 
-       DRM_DEBUG_KMS("dma_addr = 0x%x\n", win_data->dma_addr);
+       DRM_DEBUG_KMS("dma_addr = %pad\n", &win_data->dma_addr);
 
        if (ctx->vblank_on)
                schedule_work(&ctx->work);
index 0905cd915589a8fe2e122cf73c50516b313b9148..ec82f6bff1225dc06e5b591838c59778f65cecb5 100644 (file)
@@ -1308,6 +1308,7 @@ struct intel_vbt_data {
 
        struct {
                u16 pwm_freq_hz;
+               bool present;
                bool active_low_pwm;
        } backlight;
 
@@ -2431,20 +2432,18 @@ int i915_gem_context_open(struct drm_device *dev, struct drm_file *file);
 int i915_gem_context_enable(struct drm_i915_private *dev_priv);
 void i915_gem_context_close(struct drm_device *dev, struct drm_file *file);
 int i915_switch_context(struct intel_ring_buffer *ring,
-                       struct drm_file *file, struct i915_hw_context *to);
+                       struct i915_hw_context *to);
 struct i915_hw_context *
 i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id);
 void i915_gem_context_free(struct kref *ctx_ref);
 static inline void i915_gem_context_reference(struct i915_hw_context *ctx)
 {
-       if (ctx->obj && HAS_HW_CONTEXTS(ctx->obj->base.dev))
-               kref_get(&ctx->ref);
+       kref_get(&ctx->ref);
 }
 
 static inline void i915_gem_context_unreference(struct i915_hw_context *ctx)
 {
-       if (ctx->obj && HAS_HW_CONTEXTS(ctx->obj->base.dev))
-               kref_put(&ctx->ref, i915_gem_context_free);
+       kref_put(&ctx->ref, i915_gem_context_free);
 }
 
 static inline bool i915_gem_context_is_default(const struct i915_hw_context *c)
index 6370a761d137d9d9055633c7f3aa6afa398fe360..2871ce75f438641b34bef7749545d4fedfde5744 100644 (file)
@@ -2790,7 +2790,7 @@ int i915_gpu_idle(struct drm_device *dev)
 
        /* Flush everything onto the inactive list. */
        for_each_ring(ring, dev_priv, i) {
-               ret = i915_switch_context(ring, NULL, ring->default_context);
+               ret = i915_switch_context(ring, ring->default_context);
                if (ret)
                        return ret;
 
index 6043062ffce73477231fc053113b9eb8bce12607..d72db15afa02fde49c56693bbf84ce227038298d 100644 (file)
@@ -96,9 +96,6 @@
 #define GEN6_CONTEXT_ALIGN (64<<10)
 #define GEN7_CONTEXT_ALIGN 4096
 
-static int do_switch(struct intel_ring_buffer *ring,
-                    struct i915_hw_context *to);
-
 static void do_ppgtt_cleanup(struct i915_hw_ppgtt *ppgtt)
 {
        struct drm_device *dev = ppgtt->base.dev;
@@ -185,13 +182,15 @@ void i915_gem_context_free(struct kref *ctx_ref)
                                                   typeof(*ctx), ref);
        struct i915_hw_ppgtt *ppgtt = NULL;
 
-       /* We refcount even the aliasing PPGTT to keep the code symmetric */
-       if (USES_PPGTT(ctx->obj->base.dev))
-               ppgtt = ctx_to_ppgtt(ctx);
+       if (ctx->obj) {
+               /* We refcount even the aliasing PPGTT to keep the code symmetric */
+               if (USES_PPGTT(ctx->obj->base.dev))
+                       ppgtt = ctx_to_ppgtt(ctx);
 
-       /* XXX: Free up the object before tearing down the address space, in
-        * case we're bound in the PPGTT */
-       drm_gem_object_unreference(&ctx->obj->base);
+               /* XXX: Free up the object before tearing down the address space, in
+                * case we're bound in the PPGTT */
+               drm_gem_object_unreference(&ctx->obj->base);
+       }
 
        if (ppgtt)
                kref_put(&ppgtt->ref, ppgtt_release);
@@ -232,32 +231,32 @@ __create_hw_context(struct drm_device *dev,
                return ERR_PTR(-ENOMEM);
 
        kref_init(&ctx->ref);
-       ctx->obj = i915_gem_alloc_object(dev, dev_priv->hw_context_size);
-       INIT_LIST_HEAD(&ctx->link);
-       if (ctx->obj == NULL) {
-               kfree(ctx);
-               DRM_DEBUG_DRIVER("Context object allocated failed\n");
-               return ERR_PTR(-ENOMEM);
-       }
+       list_add_tail(&ctx->link, &dev_priv->context_list);
 
-       if (INTEL_INFO(dev)->gen >= 7) {
-               ret = i915_gem_object_set_cache_level(ctx->obj,
-                                                     I915_CACHE_L3_LLC);
-               /* Failure shouldn't ever happen this early */
-               if (WARN_ON(ret))
+       if (dev_priv->hw_context_size) {
+               ctx->obj = i915_gem_alloc_object(dev, dev_priv->hw_context_size);
+               if (ctx->obj == NULL) {
+                       ret = -ENOMEM;
                        goto err_out;
-       }
+               }
 
-       list_add_tail(&ctx->link, &dev_priv->context_list);
+               if (INTEL_INFO(dev)->gen >= 7) {
+                       ret = i915_gem_object_set_cache_level(ctx->obj,
+                                                             I915_CACHE_L3_LLC);
+                       /* Failure shouldn't ever happen this early */
+                       if (WARN_ON(ret))
+                               goto err_out;
+               }
+       }
 
        /* Default context will never have a file_priv */
-       if (file_priv == NULL)
-               return ctx;
-
-       ret = idr_alloc(&file_priv->context_idr, ctx, DEFAULT_CONTEXT_ID, 0,
-                       GFP_KERNEL);
-       if (ret < 0)
-               goto err_out;
+       if (file_priv != NULL) {
+               ret = idr_alloc(&file_priv->context_idr, ctx,
+                               DEFAULT_CONTEXT_ID, 0, GFP_KERNEL);
+               if (ret < 0)
+                       goto err_out;
+       } else
+               ret = DEFAULT_CONTEXT_ID;
 
        ctx->file_priv = file_priv;
        ctx->id = ret;
@@ -294,7 +293,7 @@ i915_gem_create_context(struct drm_device *dev,
        if (IS_ERR(ctx))
                return ctx;
 
-       if (is_global_default_ctx) {
+       if (is_global_default_ctx && ctx->obj) {
                /* We may need to do things with the shrinker which
                 * require us to immediately switch back to the default
                 * context. This can cause a problem as pinning the
@@ -342,7 +341,7 @@ i915_gem_create_context(struct drm_device *dev,
        return ctx;
 
 err_unpin:
-       if (is_global_default_ctx)
+       if (is_global_default_ctx && ctx->obj)
                i915_gem_object_ggtt_unpin(ctx->obj);
 err_destroy:
        i915_gem_context_unreference(ctx);
@@ -352,32 +351,22 @@ err_destroy:
 void i915_gem_context_reset(struct drm_device *dev)
 {
        struct drm_i915_private *dev_priv = dev->dev_private;
-       struct intel_ring_buffer *ring;
        int i;
 
-       if (!HAS_HW_CONTEXTS(dev))
-               return;
-
        /* Prevent the hardware from restoring the last context (which hung) on
         * the next switch */
        for (i = 0; i < I915_NUM_RINGS; i++) {
-               struct i915_hw_context *dctx;
-               if (!(INTEL_INFO(dev)->ring_mask & (1<<i)))
-                       continue;
+               struct intel_ring_buffer *ring = &dev_priv->ring[i];
+               struct i915_hw_context *dctx = ring->default_context;
 
                /* Do a fake switch to the default context */
-               ring = &dev_priv->ring[i];
-               dctx = ring->default_context;
-               if (WARN_ON(!dctx))
+               if (ring->last_context == dctx)
                        continue;
 
                if (!ring->last_context)
                        continue;
 
-               if (ring->last_context == dctx)
-                       continue;
-
-               if (i == RCS) {
+               if (dctx->obj && i == RCS) {
                        WARN_ON(i915_gem_obj_ggtt_pin(dctx->obj,
                                                      get_context_alignment(dev), 0));
                        /* Fake a finish/inactive */
@@ -394,44 +383,35 @@ void i915_gem_context_reset(struct drm_device *dev)
 int i915_gem_context_init(struct drm_device *dev)
 {
        struct drm_i915_private *dev_priv = dev->dev_private;
-       struct intel_ring_buffer *ring;
+       struct i915_hw_context *ctx;
        int i;
 
-       if (!HAS_HW_CONTEXTS(dev))
-               return 0;
-
        /* Init should only be called once per module load. Eventually the
         * restriction on the context_disabled check can be loosened. */
        if (WARN_ON(dev_priv->ring[RCS].default_context))
                return 0;
 
-       dev_priv->hw_context_size = round_up(get_context_size(dev), 4096);
-
-       if (dev_priv->hw_context_size > (1<<20)) {
-               DRM_DEBUG_DRIVER("Disabling HW Contexts; invalid size\n");
-               return -E2BIG;
+       if (HAS_HW_CONTEXTS(dev)) {
+               dev_priv->hw_context_size = round_up(get_context_size(dev), 4096);
+               if (dev_priv->hw_context_size > (1<<20)) {
+                       DRM_DEBUG_DRIVER("Disabling HW Contexts; invalid size %d\n",
+                                        dev_priv->hw_context_size);
+                       dev_priv->hw_context_size = 0;
+               }
        }
 
-       dev_priv->ring[RCS].default_context =
-               i915_gem_create_context(dev, NULL, USES_PPGTT(dev));
-
-       if (IS_ERR_OR_NULL(dev_priv->ring[RCS].default_context)) {
-               DRM_DEBUG_DRIVER("Disabling HW Contexts; create failed %ld\n",
-                                PTR_ERR(dev_priv->ring[RCS].default_context));
-               return PTR_ERR(dev_priv->ring[RCS].default_context);
+       ctx = i915_gem_create_context(dev, NULL, USES_PPGTT(dev));
+       if (IS_ERR(ctx)) {
+               DRM_ERROR("Failed to create default global context (error %ld)\n",
+                         PTR_ERR(ctx));
+               return PTR_ERR(ctx);
        }
 
-       for (i = RCS + 1; i < I915_NUM_RINGS; i++) {
-               if (!(INTEL_INFO(dev)->ring_mask & (1<<i)))
-                       continue;
-
-               ring = &dev_priv->ring[i];
+       /* NB: RCS will hold a ref for all rings */
+       for (i = 0; i < I915_NUM_RINGS; i++)
+               dev_priv->ring[i].default_context = ctx;
 
-               /* NB: RCS will hold a ref for all rings */
-               ring->default_context = dev_priv->ring[RCS].default_context;
-       }
-
-       DRM_DEBUG_DRIVER("HW context support initialized\n");
+       DRM_DEBUG_DRIVER("%s context support initialized\n", dev_priv->hw_context_size ? "HW" : "fake");
        return 0;
 }
 
@@ -441,33 +421,30 @@ void i915_gem_context_fini(struct drm_device *dev)
        struct i915_hw_context *dctx = dev_priv->ring[RCS].default_context;
        int i;
 
-       if (!HAS_HW_CONTEXTS(dev))
-               return;
-
-       /* The only known way to stop the gpu from accessing the hw context is
-        * to reset it. Do this as the very last operation to avoid confusing
-        * other code, leading to spurious errors. */
-       intel_gpu_reset(dev);
-
-       /* When default context is created and switched to, base object refcount
-        * will be 2 (+1 from object creation and +1 from do_switch()).
-        * i915_gem_context_fini() will be called after gpu_idle() has switched
-        * to default context. So we need to unreference the base object once
-        * to offset the do_switch part, so that i915_gem_context_unreference()
-        * can then free the base object correctly. */
-       WARN_ON(!dev_priv->ring[RCS].last_context);
-       if (dev_priv->ring[RCS].last_context == dctx) {
-               /* Fake switch to NULL context */
-               WARN_ON(dctx->obj->active);
-               i915_gem_object_ggtt_unpin(dctx->obj);
-               i915_gem_context_unreference(dctx);
-               dev_priv->ring[RCS].last_context = NULL;
+       if (dctx->obj) {
+               /* The only known way to stop the gpu from accessing the hw context is
+                * to reset it. Do this as the very last operation to avoid confusing
+                * other code, leading to spurious errors. */
+               intel_gpu_reset(dev);
+
+               /* When default context is created and switched to, base object refcount
+                * will be 2 (+1 from object creation and +1 from do_switch()).
+                * i915_gem_context_fini() will be called after gpu_idle() has switched
+                * to default context. So we need to unreference the base object once
+                * to offset the do_switch part, so that i915_gem_context_unreference()
+                * can then free the base object correctly. */
+               WARN_ON(!dev_priv->ring[RCS].last_context);
+               if (dev_priv->ring[RCS].last_context == dctx) {
+                       /* Fake switch to NULL context */
+                       WARN_ON(dctx->obj->active);
+                       i915_gem_object_ggtt_unpin(dctx->obj);
+                       i915_gem_context_unreference(dctx);
+                       dev_priv->ring[RCS].last_context = NULL;
+               }
        }
 
        for (i = 0; i < I915_NUM_RINGS; i++) {
                struct intel_ring_buffer *ring = &dev_priv->ring[i];
-               if (!(INTEL_INFO(dev)->ring_mask & (1<<i)))
-                       continue;
 
                if (ring->last_context)
                        i915_gem_context_unreference(ring->last_context);
@@ -478,7 +455,6 @@ void i915_gem_context_fini(struct drm_device *dev)
 
        i915_gem_object_ggtt_unpin(dctx->obj);
        i915_gem_context_unreference(dctx);
-       dev_priv->mm.aliasing_ppgtt = NULL;
 }
 
 int i915_gem_context_enable(struct drm_i915_private *dev_priv)
@@ -486,9 +462,6 @@ int i915_gem_context_enable(struct drm_i915_private *dev_priv)
        struct intel_ring_buffer *ring;
        int ret, i;
 
-       if (!HAS_HW_CONTEXTS(dev_priv->dev))
-               return 0;
-
        /* This is the only place the aliasing PPGTT gets enabled, which means
         * it has to happen before we bail on reset */
        if (dev_priv->mm.aliasing_ppgtt) {
@@ -503,7 +476,7 @@ int i915_gem_context_enable(struct drm_i915_private *dev_priv)
        BUG_ON(!dev_priv->ring[RCS].default_context);
 
        for_each_ring(ring, dev_priv, i) {
-               ret = do_switch(ring, ring->default_context);
+               ret = i915_switch_context(ring, ring->default_context);
                if (ret)
                        return ret;
        }
@@ -526,19 +499,6 @@ static int context_idr_cleanup(int id, void *p, void *data)
 int i915_gem_context_open(struct drm_device *dev, struct drm_file *file)
 {
        struct drm_i915_file_private *file_priv = file->driver_priv;
-       struct drm_i915_private *dev_priv = dev->dev_private;
-
-       if (!HAS_HW_CONTEXTS(dev)) {
-               /* Cheat for hang stats */
-               file_priv->private_default_ctx =
-                       kzalloc(sizeof(struct i915_hw_context), GFP_KERNEL);
-
-               if (file_priv->private_default_ctx == NULL)
-                       return -ENOMEM;
-
-               file_priv->private_default_ctx->vm = &dev_priv->gtt.base;
-               return 0;
-       }
 
        idr_init(&file_priv->context_idr);
 
@@ -559,14 +519,10 @@ void i915_gem_context_close(struct drm_device *dev, struct drm_file *file)
 {
        struct drm_i915_file_private *file_priv = file->driver_priv;
 
-       if (!HAS_HW_CONTEXTS(dev)) {
-               kfree(file_priv->private_default_ctx);
-               return;
-       }
-
        idr_for_each(&file_priv->context_idr, context_idr_cleanup, NULL);
-       i915_gem_context_unreference(file_priv->private_default_ctx);
        idr_destroy(&file_priv->context_idr);
+
+       i915_gem_context_unreference(file_priv->private_default_ctx);
 }
 
 struct i915_hw_context *
@@ -574,9 +530,6 @@ i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id)
 {
        struct i915_hw_context *ctx;
 
-       if (!HAS_HW_CONTEXTS(file_priv->dev_priv->dev))
-               return file_priv->private_default_ctx;
-
        ctx = (struct i915_hw_context *)idr_find(&file_priv->context_idr, id);
        if (!ctx)
                return ERR_PTR(-ENOENT);
@@ -758,7 +711,6 @@ unpin_out:
 /**
  * i915_switch_context() - perform a GPU context switch.
  * @ring: ring for which we'll execute the context switch
- * @file_priv: file_priv associated with the context, may be NULL
  * @to: the context to switch to
  *
  * The context life cycle is simple. The context refcount is incremented and
@@ -767,24 +719,30 @@ unpin_out:
  * object while letting the normal object tracking destroy the backing BO.
  */
 int i915_switch_context(struct intel_ring_buffer *ring,
-                       struct drm_file *file,
                        struct i915_hw_context *to)
 {
        struct drm_i915_private *dev_priv = ring->dev->dev_private;
 
        WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
 
-       BUG_ON(file && to == NULL);
-
-       /* We have the fake context */
-       if (!HAS_HW_CONTEXTS(ring->dev)) {
-               ring->last_context = to;
+       if (to->obj == NULL) { /* We have the fake context */
+               if (to != ring->last_context) {
+                       i915_gem_context_reference(to);
+                       if (ring->last_context)
+                               i915_gem_context_unreference(ring->last_context);
+                       ring->last_context = to;
+               }
                return 0;
        }
 
        return do_switch(ring, to);
 }
 
+static bool hw_context_enabled(struct drm_device *dev)
+{
+       return to_i915(dev)->hw_context_size;
+}
+
 int i915_gem_context_create_ioctl(struct drm_device *dev, void *data,
                                  struct drm_file *file)
 {
@@ -793,7 +751,7 @@ int i915_gem_context_create_ioctl(struct drm_device *dev, void *data,
        struct i915_hw_context *ctx;
        int ret;
 
-       if (!HAS_HW_CONTEXTS(dev))
+       if (!hw_context_enabled(dev))
                return -ENODEV;
 
        ret = i915_mutex_lock_interruptible(dev);
index 7447160155a388705acf8f30223dbe3aec09e179..2c9d9cbaf653307aff52e037f596f4343219a3ee 100644 (file)
@@ -1221,7 +1221,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
        if (ret)
                goto err;
 
-       ret = i915_switch_context(ring, file, ctx);
+       ret = i915_switch_context(ring, ctx);
        if (ret)
                goto err;
 
index ab5e93c30aa2bde43b1ed892f0437b7b5d0c8289..62a5c3627b90eaea4e6620cb829af572781e3d94 100644 (file)
@@ -50,7 +50,7 @@ bool intel_enable_ppgtt(struct drm_device *dev, bool full)
 
        /* Full ppgtt disabled by default for now due to issues. */
        if (full)
-               return false; /* HAS_PPGTT(dev) */
+               return HAS_PPGTT(dev) && (i915.enable_ppgtt == 2);
        else
                return HAS_ALIASING_PPGTT(dev);
 }
index 7753249b3a959cce7f31b8c9cf1ba0b36c18dce8..f98ba4e6e70b940c150c504782fc943abee1544a 100644 (file)
@@ -1362,10 +1362,20 @@ static inline void intel_hpd_irq_handler(struct drm_device *dev,
        spin_lock(&dev_priv->irq_lock);
        for (i = 1; i < HPD_NUM_PINS; i++) {
 
-               WARN_ONCE(hpd[i] & hotplug_trigger &&
-                         dev_priv->hpd_stats[i].hpd_mark == HPD_DISABLED,
-                         "Received HPD interrupt (0x%08x) on pin %d (0x%08x) although disabled\n",
-                         hotplug_trigger, i, hpd[i]);
+               if (hpd[i] & hotplug_trigger &&
+                   dev_priv->hpd_stats[i].hpd_mark == HPD_DISABLED) {
+                       /*
+                        * On GMCH platforms the interrupt mask bits only
+                        * prevent irq generation, not the setting of the
+                        * hotplug bits itself. So only WARN about unexpected
+                        * interrupts on saner platforms.
+                        */
+                       WARN_ONCE(INTEL_INFO(dev)->gen >= 5 && !IS_VALLEYVIEW(dev),
+                                 "Received HPD interrupt (0x%08x) on pin %d (0x%08x) although disabled\n",
+                                 hotplug_trigger, i, hpd[i]);
+
+                       continue;
+               }
 
                if (!(hpd[i] & hotplug_trigger) ||
                    dev_priv->hpd_stats[i].hpd_mark != HPD_ENABLED)
index 9f5b18d9d8850e886eeb44ca68b0bd17af4c3f30..c77af69c2d8f5f8c97f5dc2045fd99a07960617b 100644 (file)
@@ -827,6 +827,7 @@ enum punit_power_well {
 # define MI_FLUSH_ENABLE                               (1 << 12)
 # define ASYNC_FLIP_PERF_DISABLE                       (1 << 14)
 # define MODE_IDLE                                     (1 << 9)
+# define STOP_RING                                     (1 << 8)
 
 #define GEN6_GT_MODE   0x20d0
 #define GEN7_GT_MODE   0x7008
index 4867f4cc0938cba2db4a33bfdb464712defa5e9c..fa486c5fbb0250650b558632c6f63aa0ebf5bd63 100644 (file)
@@ -287,6 +287,9 @@ parse_lfp_backlight(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
        const struct bdb_lfp_backlight_data *backlight_data;
        const struct bdb_lfp_backlight_data_entry *entry;
 
+       /* Err to enabling backlight if no backlight block. */
+       dev_priv->vbt.backlight.present = true;
+
        backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
        if (!backlight_data)
                return;
@@ -299,6 +302,13 @@ parse_lfp_backlight(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
 
        entry = &backlight_data->data[panel_type];
 
+       dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
+       if (!dev_priv->vbt.backlight.present) {
+               DRM_DEBUG_KMS("PWM backlight not present in VBT (type %u)\n",
+                             entry->type);
+               return;
+       }
+
        dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
        dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
        DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, "
index 83b7629e4367bdac9a992f1c63d684074c8ef10f..f27f7b282465aa76a77690ebe8239775c923f06e 100644 (file)
@@ -374,6 +374,9 @@ struct bdb_lvds_lfp_data {
        struct bdb_lvds_lfp_data_entry data[16];
 } __packed;
 
+#define BDB_BACKLIGHT_TYPE_NONE        0
+#define BDB_BACKLIGHT_TYPE_PWM 2
+
 struct bdb_lfp_backlight_data_entry {
        u8 type:2;
        u8 active_low_pwm:1;
index dae976f51d83357a51637fca61bd830bb9753010..69bcc42a0e44327679217d29a9415e553bd3564b 100644 (file)
@@ -9654,11 +9654,22 @@ intel_pipe_config_compare(struct drm_device *dev,
        PIPE_CONF_CHECK_I(pipe_src_w);
        PIPE_CONF_CHECK_I(pipe_src_h);
 
-       PIPE_CONF_CHECK_I(gmch_pfit.control);
-       /* pfit ratios are autocomputed by the hw on gen4+ */
-       if (INTEL_INFO(dev)->gen < 4)
-               PIPE_CONF_CHECK_I(gmch_pfit.pgm_ratios);
-       PIPE_CONF_CHECK_I(gmch_pfit.lvds_border_bits);
+       /*
+        * FIXME: BIOS likes to set up a cloned config with lvds+external
+        * screen. Since we don't yet re-compute the pipe config when moving
+        * just the lvds port away to another pipe the sw tracking won't match.
+        *
+        * Proper atomic modesets with recomputed global state will fix this.
+        * Until then just don't check gmch state for inherited modes.
+        */
+       if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_INHERITED_MODE)) {
+               PIPE_CONF_CHECK_I(gmch_pfit.control);
+               /* pfit ratios are autocomputed by the hw on gen4+ */
+               if (INTEL_INFO(dev)->gen < 4)
+                       PIPE_CONF_CHECK_I(gmch_pfit.pgm_ratios);
+               PIPE_CONF_CHECK_I(gmch_pfit.lvds_border_bits);
+       }
+
        PIPE_CONF_CHECK_I(pch_pfit.enabled);
        if (current_config->pch_pfit.enabled) {
                PIPE_CONF_CHECK_I(pch_pfit.pos);
@@ -11616,6 +11627,8 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
                            base.head) {
                memset(&crtc->config, 0, sizeof(crtc->config));
 
+               crtc->config.quirks |= PIPE_CONFIG_QUIRK_INHERITED_MODE;
+
                crtc->active = dev_priv->display.get_pipe_config(crtc,
                                                                 &crtc->config);
 
index a0dad1a2f819f3365cb6d96ec033f47575da59c6..dfa85289f28f301fe259b522b45ef1521489175e 100644 (file)
@@ -575,7 +575,8 @@ out:
        return ret;
 }
 
-#define HEADER_SIZE    4
+#define BARE_ADDRESS_SIZE      3
+#define HEADER_SIZE            (BARE_ADDRESS_SIZE + 1)
 static ssize_t
 intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
 {
@@ -592,7 +593,7 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
        switch (msg->request & ~DP_AUX_I2C_MOT) {
        case DP_AUX_NATIVE_WRITE:
        case DP_AUX_I2C_WRITE:
-               txsize = HEADER_SIZE + msg->size;
+               txsize = msg->size ? HEADER_SIZE + msg->size : BARE_ADDRESS_SIZE;
                rxsize = 1;
 
                if (WARN_ON(txsize > 20))
@@ -611,7 +612,7 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
 
        case DP_AUX_NATIVE_READ:
        case DP_AUX_I2C_READ:
-               txsize = HEADER_SIZE;
+               txsize = msg->size ? HEADER_SIZE : BARE_ADDRESS_SIZE;
                rxsize = msg->size + 1;
 
                if (WARN_ON(rxsize > 20))
@@ -3618,7 +3619,8 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp,
 {
        struct drm_connector *connector = &intel_connector->base;
        struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
-       struct drm_device *dev = intel_dig_port->base.base.dev;
+       struct intel_encoder *intel_encoder = &intel_dig_port->base;
+       struct drm_device *dev = intel_encoder->base.dev;
        struct drm_i915_private *dev_priv = dev->dev_private;
        struct drm_display_mode *fixed_mode = NULL;
        bool has_dpcd;
@@ -3628,6 +3630,14 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp,
        if (!is_edp(intel_dp))
                return true;
 
+       /* The VDD bit needs a power domain reference, so if the bit is already
+        * enabled when we boot, grab this reference. */
+       if (edp_have_panel_vdd(intel_dp)) {
+               enum intel_display_power_domain power_domain;
+               power_domain = intel_display_port_power_domain(intel_encoder);
+               intel_display_power_get(dev_priv, power_domain);
+       }
+
        /* Cache DPCD and EDID for edp. */
        intel_edp_panel_vdd_on(intel_dp);
        has_dpcd = intel_dp_get_dpcd(intel_dp);
index 0542de98226018a9427519d0eb6996714f3c0582..328b1a70264b4c12a07400de7284b2968813aa94 100644 (file)
@@ -236,7 +236,8 @@ struct intel_crtc_config {
         * tracked with quirk flags so that fastboot and state checker can act
         * accordingly.
         */
-#define PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS (1<<0) /* unreliable sync mode.flags */
+#define PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS      (1<<0) /* unreliable sync mode.flags */
+#define PIPE_CONFIG_QUIRK_INHERITED_MODE       (1<<1) /* mode inherited from firmware */
        unsigned long quirks;
 
        /* User requested mode, only valid as a starting point to
index b4d44e62f0c769746a538f70afdf9916c95f6bd8..fce4a0d93c0b19b7d51f4d2578331b13aef51399 100644 (file)
@@ -132,6 +132,16 @@ static int intelfb_create(struct drm_fb_helper *helper,
 
        mutex_lock(&dev->struct_mutex);
 
+       if (intel_fb &&
+           (sizes->fb_width > intel_fb->base.width ||
+            sizes->fb_height > intel_fb->base.height)) {
+               DRM_DEBUG_KMS("BIOS fb too small (%dx%d), we require (%dx%d),"
+                             " releasing it\n",
+                             intel_fb->base.width, intel_fb->base.height,
+                             sizes->fb_width, sizes->fb_height);
+               drm_framebuffer_unreference(&intel_fb->base);
+               intel_fb = ifbdev->fb = NULL;
+       }
        if (!intel_fb || WARN_ON(!intel_fb->obj)) {
                DRM_DEBUG_KMS("no BIOS fb, allocating a new one\n");
                ret = intelfb_alloc(helper, sizes);
index b0413e190625b26c0552e8a737479f52b3dd5c9d..157267aa356165b7b7fcd94c3318a79f04f2bb8c 100644 (file)
@@ -821,11 +821,11 @@ static void intel_disable_hdmi(struct intel_encoder *encoder)
        }
 }
 
-static int hdmi_portclock_limit(struct intel_hdmi *hdmi)
+static int hdmi_portclock_limit(struct intel_hdmi *hdmi, bool respect_dvi_limit)
 {
        struct drm_device *dev = intel_hdmi_to_dev(hdmi);
 
-       if (!hdmi->has_hdmi_sink || IS_G4X(dev))
+       if ((respect_dvi_limit && !hdmi->has_hdmi_sink) || IS_G4X(dev))
                return 165000;
        else if (IS_HASWELL(dev) || INTEL_INFO(dev)->gen >= 8)
                return 300000;
@@ -837,7 +837,8 @@ static enum drm_mode_status
 intel_hdmi_mode_valid(struct drm_connector *connector,
                      struct drm_display_mode *mode)
 {
-       if (mode->clock > hdmi_portclock_limit(intel_attached_hdmi(connector)))
+       if (mode->clock > hdmi_portclock_limit(intel_attached_hdmi(connector),
+                                              true))
                return MODE_CLOCK_HIGH;
        if (mode->clock < 20000)
                return MODE_CLOCK_LOW;
@@ -879,7 +880,7 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder,
        struct drm_device *dev = encoder->base.dev;
        struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
        int clock_12bpc = pipe_config->adjusted_mode.crtc_clock * 3 / 2;
-       int portclock_limit = hdmi_portclock_limit(intel_hdmi);
+       int portclock_limit = hdmi_portclock_limit(intel_hdmi, false);
        int desired_bpp;
 
        if (intel_hdmi->color_range_auto) {
index cb058408c70ea6f8aee53c332a32515edd37c9f7..0eead16aeda7404053de8c9885992b0904c1049c 100644 (file)
@@ -1065,6 +1065,11 @@ int intel_panel_setup_backlight(struct drm_connector *connector)
        unsigned long flags;
        int ret;
 
+       if (!dev_priv->vbt.backlight.present) {
+               DRM_DEBUG_KMS("native backlight control not available per VBT\n");
+               return 0;
+       }
+
        /* set level and max in panel struct */
        spin_lock_irqsave(&dev_priv->backlight_lock, flags);
        ret = dev_priv->display.setup_backlight(intel_connector);
index 5874716774a7eb17c5ebb2977687e29c3abe842c..19e94c3edc1957d96b928fb23d696b393216fc42 100644 (file)
@@ -1545,6 +1545,16 @@ static void i9xx_update_wm(struct drm_crtc *unused_crtc)
 
        DRM_DEBUG_KMS("FIFO watermarks - A: %d, B: %d\n", planea_wm, planeb_wm);
 
+       if (IS_I915GM(dev) && enabled) {
+               struct intel_framebuffer *fb;
+
+               fb = to_intel_framebuffer(enabled->primary->fb);
+
+               /* self-refresh seems busted with untiled */
+               if (fb->obj->tiling_mode == I915_TILING_NONE)
+                       enabled = NULL;
+       }
+
        /*
         * Overlay gets an aggressive default since video jitter is bad.
         */
index 6bc68bdcf433cf06a68d52d95b063f9a42795194..79fb4cc2137c19d2cf4ad5dc23e6c5883eb58e4d 100644 (file)
@@ -437,32 +437,41 @@ static void ring_setup_phys_status_page(struct intel_ring_buffer *ring)
        I915_WRITE(HWS_PGA, addr);
 }
 
-static int init_ring_common(struct intel_ring_buffer *ring)
+static bool stop_ring(struct intel_ring_buffer *ring)
 {
-       struct drm_device *dev = ring->dev;
-       struct drm_i915_private *dev_priv = dev->dev_private;
-       struct drm_i915_gem_object *obj = ring->obj;
-       int ret = 0;
-       u32 head;
+       struct drm_i915_private *dev_priv = to_i915(ring->dev);
 
-       gen6_gt_force_wake_get(dev_priv, FORCEWAKE_ALL);
+       if (!IS_GEN2(ring->dev)) {
+               I915_WRITE_MODE(ring, _MASKED_BIT_ENABLE(STOP_RING));
+               if (wait_for_atomic((I915_READ_MODE(ring) & MODE_IDLE) != 0, 1000)) {
+                       DRM_ERROR("%s :timed out trying to stop ring\n", ring->name);
+                       return false;
+               }
+       }
 
-       /* Stop the ring if it's running. */
        I915_WRITE_CTL(ring, 0);
        I915_WRITE_HEAD(ring, 0);
        ring->write_tail(ring, 0);
-       if (wait_for_atomic((I915_READ_MODE(ring) & MODE_IDLE) != 0, 1000))
-               DRM_ERROR("%s :timed out trying to stop ring\n", ring->name);
 
-       if (I915_NEED_GFX_HWS(dev))
-               intel_ring_setup_status_page(ring);
-       else
-               ring_setup_phys_status_page(ring);
+       if (!IS_GEN2(ring->dev)) {
+               (void)I915_READ_CTL(ring);
+               I915_WRITE_MODE(ring, _MASKED_BIT_DISABLE(STOP_RING));
+       }
 
-       head = I915_READ_HEAD(ring) & HEAD_ADDR;
+       return (I915_READ_HEAD(ring) & HEAD_ADDR) == 0;
+}
 
-       /* G45 ring initialization fails to reset head to zero */
-       if (head != 0) {
+static int init_ring_common(struct intel_ring_buffer *ring)
+{
+       struct drm_device *dev = ring->dev;
+       struct drm_i915_private *dev_priv = dev->dev_private;
+       struct drm_i915_gem_object *obj = ring->obj;
+       int ret = 0;
+
+       gen6_gt_force_wake_get(dev_priv, FORCEWAKE_ALL);
+
+       if (!stop_ring(ring)) {
+               /* G45 ring initialization often fails to reset head to zero */
                DRM_DEBUG_KMS("%s head not reset to zero "
                              "ctl %08x head %08x tail %08x start %08x\n",
                              ring->name,
@@ -471,9 +480,7 @@ static int init_ring_common(struct intel_ring_buffer *ring)
                              I915_READ_TAIL(ring),
                              I915_READ_START(ring));
 
-               I915_WRITE_HEAD(ring, 0);
-
-               if (I915_READ_HEAD(ring) & HEAD_ADDR) {
+               if (!stop_ring(ring)) {
                        DRM_ERROR("failed to set %s head to zero "
                                  "ctl %08x head %08x tail %08x start %08x\n",
                                  ring->name,
@@ -481,9 +488,16 @@ static int init_ring_common(struct intel_ring_buffer *ring)
                                  I915_READ_HEAD(ring),
                                  I915_READ_TAIL(ring),
                                  I915_READ_START(ring));
+                       ret = -EIO;
+                       goto out;
                }
        }
 
+       if (I915_NEED_GFX_HWS(dev))
+               intel_ring_setup_status_page(ring);
+       else
+               ring_setup_phys_status_page(ring);
+
        /* Initialize the ring. This must happen _after_ we've cleared the ring
         * registers with the above sequence (the readback of the HEAD registers
         * also enforces ordering), otherwise the hw might lose the new ring
index 270a6a9734387b6079e9348e17773214a293ad0a..2b91c4b4d34b2efd6029bb52f46ece14eb2e515f 100644 (file)
@@ -34,6 +34,7 @@ struct  intel_hw_status_page {
 #define I915_WRITE_IMR(ring, val) I915_WRITE(RING_IMR((ring)->mmio_base), val)
 
 #define I915_READ_MODE(ring) I915_READ(RING_MI_MODE((ring)->mmio_base))
+#define I915_WRITE_MODE(ring, val) I915_WRITE(RING_MI_MODE((ring)->mmio_base), val)
 
 enum intel_ring_hangcheck_action {
        HANGCHECK_IDLE = 0,
index 3e6c0f3ed592a6b746610b9b6dd1986e50e1ace7..ef9957dbac943bdda6a1e6fd9bca142ebb202cef 100644 (file)
@@ -510,9 +510,8 @@ static void update_cursor(struct drm_crtc *crtc)
                                        MDP4_DMA_CURSOR_BLEND_CONFIG_CURSOR_EN);
                } else {
                        /* disable cursor: */
-                       mdp4_write(mdp4_kms, REG_MDP4_DMA_CURSOR_BASE(dma), 0);
-                       mdp4_write(mdp4_kms, REG_MDP4_DMA_CURSOR_BLEND_CONFIG(dma),
-                                       MDP4_DMA_CURSOR_BLEND_CONFIG_FORMAT(CURSOR_ARGB));
+                       mdp4_write(mdp4_kms, REG_MDP4_DMA_CURSOR_BASE(dma),
+                                       mdp4_kms->blank_cursor_iova);
                }
 
                /* and drop the iova ref + obj rev when done scanning out: */
@@ -574,11 +573,9 @@ static int mdp4_crtc_cursor_set(struct drm_crtc *crtc,
 
        if (old_bo) {
                /* drop our previous reference: */
-               msm_gem_put_iova(old_bo, mdp4_kms->id);
-               drm_gem_object_unreference_unlocked(old_bo);
+               drm_flip_work_queue(&mdp4_crtc->unref_cursor_work, old_bo);
        }
 
-       crtc_flush(crtc);
        request_pending(crtc, PENDING_CURSOR);
 
        return 0;
index c740ccd1cc67fb4d1a08ef6a65efc671daec8595..8edd531cb62166ad1291be18ffc26ba033cbc71d 100644 (file)
@@ -70,12 +70,12 @@ irqreturn_t mdp4_irq(struct msm_kms *kms)
 
        VERB("status=%08x", status);
 
+       mdp_dispatch_irqs(mdp_kms, status);
+
        for (id = 0; id < priv->num_crtcs; id++)
                if (status & mdp4_crtc_vblank(priv->crtcs[id]))
                        drm_handle_vblank(dev, id);
 
-       mdp_dispatch_irqs(mdp_kms, status);
-
        return IRQ_HANDLED;
 }
 
index 272e707c948704e6ff36cc8df263723fdbbd2a71..0bb4faa17523e0862d7f32df0939976424e82d6a 100644 (file)
@@ -144,6 +144,10 @@ static void mdp4_preclose(struct msm_kms *kms, struct drm_file *file)
 static void mdp4_destroy(struct msm_kms *kms)
 {
        struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
+       if (mdp4_kms->blank_cursor_iova)
+               msm_gem_put_iova(mdp4_kms->blank_cursor_bo, mdp4_kms->id);
+       if (mdp4_kms->blank_cursor_bo)
+               drm_gem_object_unreference(mdp4_kms->blank_cursor_bo);
        kfree(mdp4_kms);
 }
 
@@ -372,6 +376,23 @@ struct msm_kms *mdp4_kms_init(struct drm_device *dev)
                goto fail;
        }
 
+       mutex_lock(&dev->struct_mutex);
+       mdp4_kms->blank_cursor_bo = msm_gem_new(dev, SZ_16K, MSM_BO_WC);
+       mutex_unlock(&dev->struct_mutex);
+       if (IS_ERR(mdp4_kms->blank_cursor_bo)) {
+               ret = PTR_ERR(mdp4_kms->blank_cursor_bo);
+               dev_err(dev->dev, "could not allocate blank-cursor bo: %d\n", ret);
+               mdp4_kms->blank_cursor_bo = NULL;
+               goto fail;
+       }
+
+       ret = msm_gem_get_iova(mdp4_kms->blank_cursor_bo, mdp4_kms->id,
+                       &mdp4_kms->blank_cursor_iova);
+       if (ret) {
+               dev_err(dev->dev, "could not pin blank-cursor bo: %d\n", ret);
+               goto fail;
+       }
+
        return kms;
 
 fail:
index 66a4d31aec80e010e5f5914705f05f7f346dc68c..715520c54cdec48f93750da0843213878aaabf86 100644 (file)
@@ -44,6 +44,10 @@ struct mdp4_kms {
        struct clk *lut_clk;
 
        struct mdp_irq error_handler;
+
+       /* empty/blank cursor bo to use when cursor is "disabled" */
+       struct drm_gem_object *blank_cursor_bo;
+       uint32_t blank_cursor_iova;
 };
 #define to_mdp4_kms(x) container_of(x, struct mdp4_kms, base)
 
index 353d494a497f22c96e0f51d2049cd765ad595f07..f2b985bc2adf41f8330dd4bfb8dcafdb30b43c53 100644 (file)
@@ -71,11 +71,11 @@ static void mdp5_irq_mdp(struct mdp_kms *mdp_kms)
 
        VERB("status=%08x", status);
 
+       mdp_dispatch_irqs(mdp_kms, status);
+
        for (id = 0; id < priv->num_crtcs; id++)
                if (status & mdp5_crtc_vblank(priv->crtcs[id]))
                        drm_handle_vblank(dev, id);
-
-       mdp_dispatch_irqs(mdp_kms, status);
 }
 
 irqreturn_t mdp5_irq(struct msm_kms *kms)
index 6c6d7d4c9b4e77848994222f9bd5bf2b26b6a043..a752ab83b8104124a232d3e6701846c661fabfa3 100644 (file)
@@ -62,11 +62,8 @@ static int msm_fbdev_create(struct drm_fb_helper *helper,
        dma_addr_t paddr;
        int ret, size;
 
-       /* only doing ARGB32 since this is what is needed to alpha-blend
-        * with video overlays:
-        */
        sizes->surface_bpp = 32;
-       sizes->surface_depth = 32;
+       sizes->surface_depth = 24;
 
        DBG("create fbdev: %dx%d@%d (%dx%d)", sizes->surface_width,
                        sizes->surface_height, sizes->surface_bpp,
index 3da8264d3039017bd358ccaca48197356f932f68..bb8026daebc9426759d2bb31f2a6360dfed606a3 100644 (file)
@@ -118,8 +118,10 @@ static void put_pages(struct drm_gem_object *obj)
 
                if (iommu_present(&platform_bus_type))
                        drm_gem_put_pages(obj, msm_obj->pages, true, false);
-               else
+               else {
                        drm_mm_remove_node(msm_obj->vram_node);
+                       drm_free_large(msm_obj->pages);
+               }
 
                msm_obj->pages = NULL;
        }
index e9df94f96d7827e446828106ef68d4667e361401..fb0b6b2d1427f436f14666c3611d4d6807bd2d36 100644 (file)
@@ -109,7 +109,7 @@ nouveau_bios_shadow_pramin(struct nouveau_bios *bios)
                        return;
                }
 
-               addr = (u64)(addr >> 8) << 8;
+               addr = (addr & 0xffffff00) << 8;
                if (!addr) {
                        addr  = (u64)nv_rd32(bios, 0x001700) << 16;
                        addr += 0xf0000;
index 355157e4f78dd36a40b7b56020f06e82a6ae76db..e3c47a8005ff149e07b5770f38cdaf1b9aba394f 100644 (file)
@@ -33,6 +33,7 @@ struct omap_crtc {
        int pipe;
        enum omap_channel channel;
        struct omap_overlay_manager_info info;
+       struct drm_encoder *current_encoder;
 
        /*
         * Temporary: eventually this will go away, but it is needed
@@ -120,13 +121,25 @@ static void omap_crtc_start_update(struct omap_overlay_manager *mgr)
 {
 }
 
+static void set_enabled(struct drm_crtc *crtc, bool enable);
+
 static int omap_crtc_enable(struct omap_overlay_manager *mgr)
 {
+       struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
+
+       dispc_mgr_setup(omap_crtc->channel, &omap_crtc->info);
+       dispc_mgr_set_timings(omap_crtc->channel,
+                       &omap_crtc->timings);
+       set_enabled(&omap_crtc->base, true);
+
        return 0;
 }
 
 static void omap_crtc_disable(struct omap_overlay_manager *mgr)
 {
+       struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
+
+       set_enabled(&omap_crtc->base, false);
 }
 
 static void omap_crtc_set_timings(struct omap_overlay_manager *mgr,
@@ -184,7 +197,6 @@ static void omap_crtc_destroy(struct drm_crtc *crtc)
        WARN_ON(omap_crtc->apply_irq.registered);
        omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
 
-       omap_crtc->plane->funcs->destroy(omap_crtc->plane);
        drm_crtc_cleanup(crtc);
 
        kfree(omap_crtc);
@@ -338,17 +350,23 @@ static int omap_crtc_page_flip_locked(struct drm_crtc *crtc,
        struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
        struct drm_plane *primary = crtc->primary;
        struct drm_gem_object *bo;
+       unsigned long flags;
 
        DBG("%d -> %d (event=%p)", primary->fb ? primary->fb->base.id : -1,
                        fb->base.id, event);
 
+       spin_lock_irqsave(&dev->event_lock, flags);
+
        if (omap_crtc->old_fb) {
+               spin_unlock_irqrestore(&dev->event_lock, flags);
                dev_err(dev->dev, "already a pending flip\n");
                return -EINVAL;
        }
 
        omap_crtc->event = event;
-       primary->fb = fb;
+       omap_crtc->old_fb = primary->fb = fb;
+
+       spin_unlock_irqrestore(&dev->event_lock, flags);
 
        /*
         * Hold a reference temporarily until the crtc is updated
@@ -528,38 +546,46 @@ static void set_enabled(struct drm_crtc *crtc, bool enable)
        struct drm_device *dev = crtc->dev;
        struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
        enum omap_channel channel = omap_crtc->channel;
-       struct omap_irq_wait *wait = NULL;
+       struct omap_irq_wait *wait;
+       u32 framedone_irq, vsync_irq;
+       int ret;
 
        if (dispc_mgr_is_enabled(channel) == enable)
                return;
 
-       /* ignore sync-lost irqs during enable/disable */
+       /*
+        * Digit output produces some sync lost interrupts during the first
+        * frame when enabling, so we need to ignore those.
+        */
        omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
 
-       if (dispc_mgr_get_framedone_irq(channel)) {
-               if (!enable) {
-                       wait = omap_irq_wait_init(dev,
-                                       dispc_mgr_get_framedone_irq(channel), 1);
-               }
+       framedone_irq = dispc_mgr_get_framedone_irq(channel);
+       vsync_irq = dispc_mgr_get_vsync_irq(channel);
+
+       if (enable) {
+               wait = omap_irq_wait_init(dev, vsync_irq, 1);
        } else {
                /*
-                * When we disable digit output, we need to wait until fields
-                * are done.  Otherwise the DSS is still working, and turning
-                * off the clocks prevents DSS from going to OFF mode. And when
-                * enabling, we need to wait for the extra sync losts
+                * When we disable the digit output, we need to wait for
+                * FRAMEDONE to know that DISPC has finished with the output.
+                *
+                * OMAP2/3 does not have FRAMEDONE irq for digit output, and in
+                * that case we need to use vsync interrupt, and wait for both
+                * even and odd frames.
                 */
-               wait = omap_irq_wait_init(dev,
-                               dispc_mgr_get_vsync_irq(channel), 2);
+
+               if (framedone_irq)
+                       wait = omap_irq_wait_init(dev, framedone_irq, 1);
+               else
+                       wait = omap_irq_wait_init(dev, vsync_irq, 2);
        }
 
        dispc_mgr_enable(channel, enable);
 
-       if (wait) {
-               int ret = omap_irq_wait(dev, wait, msecs_to_jiffies(100));
-               if (ret) {
-                       dev_err(dev->dev, "%s: timeout waiting for %s\n",
-                                       omap_crtc->name, enable ? "enable" : "disable");
-               }
+       ret = omap_irq_wait(dev, wait, msecs_to_jiffies(100));
+       if (ret) {
+               dev_err(dev->dev, "%s: timeout waiting for %s\n",
+                               omap_crtc->name, enable ? "enable" : "disable");
        }
 
        omap_irq_register(crtc->dev, &omap_crtc->error_irq);
@@ -586,8 +612,12 @@ static void omap_crtc_pre_apply(struct omap_drm_apply *apply)
                }
        }
 
+       if (omap_crtc->current_encoder && encoder != omap_crtc->current_encoder)
+               omap_encoder_set_enabled(omap_crtc->current_encoder, false);
+
+       omap_crtc->current_encoder = encoder;
+
        if (!omap_crtc->enabled) {
-               set_enabled(&omap_crtc->base, false);
                if (encoder)
                        omap_encoder_set_enabled(encoder, false);
        } else {
@@ -596,13 +626,7 @@ static void omap_crtc_pre_apply(struct omap_drm_apply *apply)
                        omap_encoder_update(encoder, omap_crtc->mgr,
                                        &omap_crtc->timings);
                        omap_encoder_set_enabled(encoder, true);
-                       omap_crtc->full_update = false;
                }
-
-               dispc_mgr_setup(omap_crtc->channel, &omap_crtc->info);
-               dispc_mgr_set_timings(omap_crtc->channel,
-                               &omap_crtc->timings);
-               set_enabled(&omap_crtc->base, true);
        }
 
        omap_crtc->full_update = false;
@@ -613,10 +637,30 @@ static void omap_crtc_post_apply(struct omap_drm_apply *apply)
        /* nothing needed for post-apply */
 }
 
+void omap_crtc_flush(struct drm_crtc *crtc)
+{
+       struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
+       int loops = 0;
+
+       while (!list_empty(&omap_crtc->pending_applies) ||
+               !list_empty(&omap_crtc->queued_applies) ||
+               omap_crtc->event || omap_crtc->old_fb) {
+
+               if (++loops > 10) {
+                       dev_err(crtc->dev->dev,
+                               "omap_crtc_flush() timeout\n");
+                       break;
+               }
+
+               schedule_timeout_uninterruptible(msecs_to_jiffies(20));
+       }
+}
+
 static const char *channel_names[] = {
                [OMAP_DSS_CHANNEL_LCD] = "lcd",
                [OMAP_DSS_CHANNEL_DIGIT] = "tv",
                [OMAP_DSS_CHANNEL_LCD2] = "lcd2",
+               [OMAP_DSS_CHANNEL_LCD3] = "lcd3",
 };
 
 void omap_crtc_pre_init(void)
index bf39fcc49e0f181ddcbf340632fa4f77c8b1bb10..c8270e4b26f3f7d15c4e0bfcb1230a5fb3e4cd05 100644 (file)
@@ -513,12 +513,18 @@ static int dev_load(struct drm_device *dev, unsigned long flags)
 static int dev_unload(struct drm_device *dev)
 {
        struct omap_drm_private *priv = dev->dev_private;
+       int i;
 
        DBG("unload: dev=%p", dev);
 
        drm_kms_helper_poll_fini(dev);
 
        omap_fbdev_free(dev);
+
+       /* flush crtcs so the fbs get released */
+       for (i = 0; i < priv->num_crtcs; i++)
+               omap_crtc_flush(priv->crtcs[i]);
+
        omap_modeset_free(dev);
        omap_gem_deinit(dev);
 
@@ -696,10 +702,11 @@ static int pdev_remove(struct platform_device *device)
 {
        DBG("");
 
+       drm_put_dev(platform_get_drvdata(device));
+
        omap_disconnect_dssdevs();
        omap_crtc_pre_uninit();
 
-       drm_put_dev(platform_get_drvdata(device));
        return 0;
 }
 
@@ -726,18 +733,33 @@ static struct platform_driver pdev = {
 
 static int __init omap_drm_init(void)
 {
+       int r;
+
        DBG("init");
-       if (platform_driver_register(&omap_dmm_driver)) {
-               /* we can continue on without DMM.. so not fatal */
-               dev_err(NULL, "DMM registration failed\n");
+
+       r = platform_driver_register(&omap_dmm_driver);
+       if (r) {
+               pr_err("DMM driver registration failed\n");
+               return r;
+       }
+
+       r = platform_driver_register(&pdev);
+       if (r) {
+               pr_err("omapdrm driver registration failed\n");
+               platform_driver_unregister(&omap_dmm_driver);
+               return r;
        }
-       return platform_driver_register(&pdev);
+
+       return 0;
 }
 
 static void __exit omap_drm_fini(void)
 {
        DBG("fini");
+
        platform_driver_unregister(&pdev);
+
+       platform_driver_unregister(&omap_dmm_driver);
 }
 
 /* need late_initcall() so we load after dss_driver's are loaded */
index 428b2981fd685f3e42b3ec4d0a63021a94fdaf15..284b80fc3c54fc4146294656c722fb7af2485b03 100644 (file)
@@ -163,6 +163,7 @@ void omap_crtc_pre_init(void);
 void omap_crtc_pre_uninit(void);
 struct drm_crtc *omap_crtc_init(struct drm_device *dev,
                struct drm_plane *plane, enum omap_channel channel, int id);
+void omap_crtc_flush(struct drm_crtc *crtc);
 
 struct drm_plane *omap_plane_init(struct drm_device *dev,
                int plane_id, bool private_plane);
index d2b8c49bfb4ae52d3599ad11a4b27fd66e0e5eb3..8b019602ffe61564dfa979a082e9c6b0afc0a1f2 100644 (file)
@@ -218,6 +218,20 @@ void omap_framebuffer_update_scanout(struct drm_framebuffer *fb,
                info->rotation_type = OMAP_DSS_ROT_TILER;
                info->screen_width  = omap_gem_tiled_stride(plane->bo, orient);
        } else {
+               switch (win->rotation & 0xf) {
+               case 0:
+               case BIT(DRM_ROTATE_0):
+                       /* OK */
+                       break;
+
+               default:
+                       dev_warn(fb->dev->dev,
+                               "rotation '%d' ignored for non-tiled fb\n",
+                               win->rotation);
+                       win->rotation = 0;
+                       break;
+               }
+
                info->paddr         = get_linear_addr(plane, format, 0, x, y);
                info->rotation_type = OMAP_DSS_ROT_DMA;
                info->screen_width  = plane->pitch;
index 002988d09021daeebb04a1e42421ccf80d88cc54..1388ca7f87e84fefa07256cde5ebc07076e5087a 100644 (file)
@@ -371,6 +371,9 @@ void omap_fbdev_free(struct drm_device *dev)
 
        fbdev = to_omap_fbdev(priv->fbdev);
 
+       /* release the ref taken in omap_fbdev_create() */
+       omap_gem_put_paddr(fbdev->bo);
+
        /* this will free the backing object */
        if (fbdev->fb) {
                drm_framebuffer_unregister_private(fbdev->fb);
index c8d972763889d9f99344b70f3166624d7b756665..95dbce286a41347f58b5a4880b9109dea9c831f2 100644 (file)
@@ -980,12 +980,9 @@ int omap_gem_resume(struct device *dev)
 #ifdef CONFIG_DEBUG_FS
 void omap_gem_describe(struct drm_gem_object *obj, struct seq_file *m)
 {
-       struct drm_device *dev = obj->dev;
        struct omap_gem_object *omap_obj = to_omap_bo(obj);
        uint64_t off;
 
-       WARN_ON(!mutex_is_locked(&dev->struct_mutex));
-
        off = drm_vma_node_start(&obj->vma_node);
 
        seq_printf(m, "%08x: %2d (%2d) %08llx %08Zx (%2d) %p %4d",
@@ -1050,10 +1047,10 @@ static inline bool is_waiting(struct omap_gem_sync_waiter *waiter)
 {
        struct omap_gem_object *omap_obj = waiter->omap_obj;
        if ((waiter->op & OMAP_GEM_READ) &&
-                       (omap_obj->sync->read_complete < waiter->read_target))
+                       (omap_obj->sync->write_complete < waiter->write_target))
                return true;
        if ((waiter->op & OMAP_GEM_WRITE) &&
-                       (omap_obj->sync->write_complete < waiter->write_target))
+                       (omap_obj->sync->read_complete < waiter->read_target))
                return true;
        return false;
 }
@@ -1229,6 +1226,8 @@ int omap_gem_op_async(struct drm_gem_object *obj, enum omap_gem_op op,
                }
 
                spin_unlock(&sync_lock);
+
+               kfree(waiter);
        }
 
        /* no waiting.. */
index 046d5e660c04c428192b15ab268de39c8fff35a1..3cf31ee59aac08de0573bb7c0464c0b0e7a7f0e5 100644 (file)
@@ -225,6 +225,11 @@ int omap_plane_mode_set(struct drm_plane *plane,
                omap_plane->apply_done_cb.arg = arg;
        }
 
+       if (plane->fb)
+               drm_framebuffer_unreference(plane->fb);
+
+       drm_framebuffer_reference(fb);
+
        plane->fb = fb;
        plane->crtc = crtc;
 
@@ -241,10 +246,13 @@ static int omap_plane_update(struct drm_plane *plane,
        struct omap_plane *omap_plane = to_omap_plane(plane);
        omap_plane->enabled = true;
 
-       if (plane->fb)
-               drm_framebuffer_unreference(plane->fb);
-
-       drm_framebuffer_reference(fb);
+       /* omap_plane_mode_set() takes adjusted src */
+       switch (omap_plane->win.rotation & 0xf) {
+       case BIT(DRM_ROTATE_90):
+       case BIT(DRM_ROTATE_270):
+               swap(src_w, src_h);
+               break;
+       }
 
        return omap_plane_mode_set(plane, crtc, fb,
                        crtc_x, crtc_y, crtc_w, crtc_h,
index 8b0ab170cef9036aaec2d1c11f9980e0e5284943..bc0119fb6c12a9373e1bd282886d38f8ed858135 100644 (file)
@@ -142,7 +142,8 @@ static int radeon_process_aux_ch(struct radeon_i2c_chan *chan,
        return recv_bytes;
 }
 
-#define HEADER_SIZE 4
+#define BARE_ADDRESS_SIZE 3
+#define HEADER_SIZE (BARE_ADDRESS_SIZE + 1)
 
 static ssize_t
 radeon_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
@@ -160,13 +161,19 @@ radeon_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
        tx_buf[0] = msg->address & 0xff;
        tx_buf[1] = msg->address >> 8;
        tx_buf[2] = msg->request << 4;
-       tx_buf[3] = msg->size - 1;
+       tx_buf[3] = msg->size ? (msg->size - 1) : 0;
 
        switch (msg->request & ~DP_AUX_I2C_MOT) {
        case DP_AUX_NATIVE_WRITE:
        case DP_AUX_I2C_WRITE:
+               /* tx_size needs to be 4 even for bare address packets since the atom
+                * table needs the info in tx_buf[3].
+                */
                tx_size = HEADER_SIZE + msg->size;
-               tx_buf[3] |= tx_size << 4;
+               if (msg->size == 0)
+                       tx_buf[3] |= BARE_ADDRESS_SIZE << 4;
+               else
+                       tx_buf[3] |= tx_size << 4;
                memcpy(tx_buf + HEADER_SIZE, msg->buffer, msg->size);
                ret = radeon_process_aux_ch(chan,
                                            tx_buf, tx_size, NULL, 0, delay, &ack);
@@ -176,8 +183,14 @@ radeon_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
                break;
        case DP_AUX_NATIVE_READ:
        case DP_AUX_I2C_READ:
+               /* tx_size needs to be 4 even for bare address packets since the atom
+                * table needs the info in tx_buf[3].
+                */
                tx_size = HEADER_SIZE;
-               tx_buf[3] |= tx_size << 4;
+               if (msg->size == 0)
+                       tx_buf[3] |= BARE_ADDRESS_SIZE << 4;
+               else
+                       tx_buf[3] |= tx_size << 4;
                ret = radeon_process_aux_ch(chan,
                                            tx_buf, tx_size, msg->buffer, msg->size, delay, &ack);
                break;
@@ -186,7 +199,7 @@ radeon_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
                break;
        }
 
-       if (ret > 0)
+       if (ret >= 0)
                msg->reply = ack >> 4;
 
        return ret;
@@ -194,98 +207,16 @@ radeon_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
 
 void radeon_dp_aux_init(struct radeon_connector *radeon_connector)
 {
-       struct radeon_connector_atom_dig *dig_connector = radeon_connector->con_priv;
-
-       dig_connector->dp_i2c_bus->aux.dev = radeon_connector->base.kdev;
-       dig_connector->dp_i2c_bus->aux.transfer = radeon_dp_aux_transfer;
-}
-
-int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
-                        u8 write_byte, u8 *read_byte)
-{
-       struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
-       struct radeon_i2c_chan *auxch = i2c_get_adapdata(adapter);
-       u16 address = algo_data->address;
-       u8 msg[5];
-       u8 reply[2];
-       unsigned retry;
-       int msg_bytes;
-       int reply_bytes = 1;
        int ret;
-       u8 ack;
-
-       /* Set up the address */
-       msg[0] = address;
-       msg[1] = address >> 8;
-
-       /* Set up the command byte */
-       if (mode & MODE_I2C_READ) {
-               msg[2] = DP_AUX_I2C_READ << 4;
-               msg_bytes = 4;
-               msg[3] = msg_bytes << 4;
-       } else {
-               msg[2] = DP_AUX_I2C_WRITE << 4;
-               msg_bytes = 5;
-               msg[3] = msg_bytes << 4;
-               msg[4] = write_byte;
-       }
-
-       /* special handling for start/stop */
-       if (mode & (MODE_I2C_START | MODE_I2C_STOP))
-               msg[3] = 3 << 4;
-
-       /* Set MOT bit for all but stop */
-       if ((mode & MODE_I2C_STOP) == 0)
-               msg[2] |= DP_AUX_I2C_MOT << 4;
-
-       for (retry = 0; retry < 7; retry++) {
-               ret = radeon_process_aux_ch(auxch,
-                                           msg, msg_bytes, reply, reply_bytes, 0, &ack);
-               if (ret == -EBUSY)
-                       continue;
-               else if (ret < 0) {
-                       DRM_DEBUG_KMS("aux_ch failed %d\n", ret);
-                       return ret;
-               }
-
-               switch ((ack >> 4) & DP_AUX_NATIVE_REPLY_MASK) {
-               case DP_AUX_NATIVE_REPLY_ACK:
-                       /* I2C-over-AUX Reply field is only valid
-                        * when paired with AUX ACK.
-                        */
-                       break;
-               case DP_AUX_NATIVE_REPLY_NACK:
-                       DRM_DEBUG_KMS("aux_ch native nack\n");
-                       return -EREMOTEIO;
-               case DP_AUX_NATIVE_REPLY_DEFER:
-                       DRM_DEBUG_KMS("aux_ch native defer\n");
-                       usleep_range(500, 600);
-                       continue;
-               default:
-                       DRM_ERROR("aux_ch invalid native reply 0x%02x\n", ack);
-                       return -EREMOTEIO;
-               }
 
-               switch ((ack >> 4) & DP_AUX_I2C_REPLY_MASK) {
-               case DP_AUX_I2C_REPLY_ACK:
-                       if (mode == MODE_I2C_READ)
-                               *read_byte = reply[0];
-                       return ret;
-               case DP_AUX_I2C_REPLY_NACK:
-                       DRM_DEBUG_KMS("aux_i2c nack\n");
-                       return -EREMOTEIO;
-               case DP_AUX_I2C_REPLY_DEFER:
-                       DRM_DEBUG_KMS("aux_i2c defer\n");
-                       usleep_range(400, 500);
-                       break;
-               default:
-                       DRM_ERROR("aux_i2c invalid reply 0x%02x\n", ack);
-                       return -EREMOTEIO;
-               }
-       }
+       radeon_connector->ddc_bus->rec.hpd = radeon_connector->hpd.hpd;
+       radeon_connector->ddc_bus->aux.dev = radeon_connector->base.kdev;
+       radeon_connector->ddc_bus->aux.transfer = radeon_dp_aux_transfer;
+       ret = drm_dp_aux_register_i2c_bus(&radeon_connector->ddc_bus->aux);
+       if (!ret)
+               radeon_connector->ddc_bus->has_aux = true;
 
-       DRM_DEBUG_KMS("aux i2c too many retries, giving up\n");
-       return -EREMOTEIO;
+       WARN(ret, "drm_dp_aux_register_i2c_bus() failed with error %d\n", ret);
 }
 
 /***** general DP utility functions *****/
@@ -420,12 +351,11 @@ static u8 radeon_dp_encoder_service(struct radeon_device *rdev,
 
 u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector)
 {
-       struct radeon_connector_atom_dig *dig_connector = radeon_connector->con_priv;
        struct drm_device *dev = radeon_connector->base.dev;
        struct radeon_device *rdev = dev->dev_private;
 
        return radeon_dp_encoder_service(rdev, ATOM_DP_ACTION_GET_SINK_TYPE, 0,
-                                        dig_connector->dp_i2c_bus->rec.i2c_id, 0);
+                                        radeon_connector->ddc_bus->rec.i2c_id, 0);
 }
 
 static void radeon_dp_probe_oui(struct radeon_connector *radeon_connector)
@@ -436,11 +366,11 @@ static void radeon_dp_probe_oui(struct radeon_connector *radeon_connector)
        if (!(dig_connector->dpcd[DP_DOWN_STREAM_PORT_COUNT] & DP_OUI_SUPPORT))
                return;
 
-       if (drm_dp_dpcd_read(&dig_connector->dp_i2c_bus->aux, DP_SINK_OUI, buf, 3))
+       if (drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_SINK_OUI, buf, 3))
                DRM_DEBUG_KMS("Sink OUI: %02hx%02hx%02hx\n",
                              buf[0], buf[1], buf[2]);
 
-       if (drm_dp_dpcd_read(&dig_connector->dp_i2c_bus->aux, DP_BRANCH_OUI, buf, 3))
+       if (drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_BRANCH_OUI, buf, 3))
                DRM_DEBUG_KMS("Branch OUI: %02hx%02hx%02hx\n",
                              buf[0], buf[1], buf[2]);
 }
@@ -451,7 +381,7 @@ bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector)
        u8 msg[DP_DPCD_SIZE];
        int ret, i;
 
-       ret = drm_dp_dpcd_read(&dig_connector->dp_i2c_bus->aux, DP_DPCD_REV, msg,
+       ret = drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_DPCD_REV, msg,
                               DP_DPCD_SIZE);
        if (ret > 0) {
                memcpy(dig_connector->dpcd, msg, DP_DPCD_SIZE);
@@ -489,7 +419,7 @@ int radeon_dp_get_panel_mode(struct drm_encoder *encoder,
 
        if (dp_bridge != ENCODER_OBJECT_ID_NONE) {
                /* DP bridge chips */
-               drm_dp_dpcd_readb(&dig_connector->dp_i2c_bus->aux,
+               drm_dp_dpcd_readb(&radeon_connector->ddc_bus->aux,
                                  DP_EDP_CONFIGURATION_CAP, &tmp);
                if (tmp & 1)
                        panel_mode = DP_PANEL_MODE_INTERNAL_DP2_MODE;
@@ -500,7 +430,7 @@ int radeon_dp_get_panel_mode(struct drm_encoder *encoder,
                        panel_mode = DP_PANEL_MODE_EXTERNAL_DP_MODE;
        } else if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
                /* eDP */
-               drm_dp_dpcd_readb(&dig_connector->dp_i2c_bus->aux,
+               drm_dp_dpcd_readb(&radeon_connector->ddc_bus->aux,
                                  DP_EDP_CONFIGURATION_CAP, &tmp);
                if (tmp & 1)
                        panel_mode = DP_PANEL_MODE_INTERNAL_DP2_MODE;
@@ -554,7 +484,8 @@ bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector)
        u8 link_status[DP_LINK_STATUS_SIZE];
        struct radeon_connector_atom_dig *dig = radeon_connector->con_priv;
 
-       if (drm_dp_dpcd_read_link_status(&dig->dp_i2c_bus->aux, link_status) <= 0)
+       if (drm_dp_dpcd_read_link_status(&radeon_connector->ddc_bus->aux, link_status)
+           <= 0)
                return false;
        if (drm_dp_channel_eq_ok(link_status, dig->dp_lane_count))
                return false;
@@ -574,7 +505,7 @@ void radeon_dp_set_rx_power_state(struct drm_connector *connector,
 
        /* power up/down the sink */
        if (dig_connector->dpcd[0] >= 0x11) {
-               drm_dp_dpcd_writeb(&dig_connector->dp_i2c_bus->aux,
+               drm_dp_dpcd_writeb(&radeon_connector->ddc_bus->aux,
                                   DP_SET_POWER, power_state);
                usleep_range(1000, 2000);
        }
@@ -878,7 +809,7 @@ void radeon_dp_link_train(struct drm_encoder *encoder,
        else
                dp_info.enc_id |= ATOM_DP_CONFIG_LINK_A;
 
-       drm_dp_dpcd_readb(&dig_connector->dp_i2c_bus->aux, DP_MAX_LANE_COUNT, &tmp);
+       drm_dp_dpcd_readb(&radeon_connector->ddc_bus->aux, DP_MAX_LANE_COUNT, &tmp);
        if (ASIC_IS_DCE5(rdev) && (tmp & DP_TPS3_SUPPORTED))
                dp_info.tp3_supported = true;
        else
@@ -890,7 +821,7 @@ void radeon_dp_link_train(struct drm_encoder *encoder,
        dp_info.connector = connector;
        dp_info.dp_lane_count = dig_connector->dp_lane_count;
        dp_info.dp_clock = dig_connector->dp_clock;
-       dp_info.aux = &dig_connector->dp_i2c_bus->aux;
+       dp_info.aux = &radeon_connector->ddc_bus->aux;
 
        if (radeon_dp_link_train_init(&dp_info))
                goto done;
index cad89a97752709a68dbf4ecc7be99c78696c971c..10dae4106c08e3ea60944ae8a1a77154a4df30c2 100644 (file)
  *
  */
 
+#include <linux/firmware.h>
 #include "drmP.h"
 #include "radeon.h"
+#include "radeon_ucode.h"
 #include "cikd.h"
 #include "r600_dpm.h"
 #include "ci_dpm.h"
@@ -202,24 +204,29 @@ static void ci_initialize_powertune_defaults(struct radeon_device *rdev)
        struct ci_power_info *pi = ci_get_pi(rdev);
 
        switch (rdev->pdev->device) {
+       case 0x6649:
        case 0x6650:
+       case 0x6651:
        case 0x6658:
        case 0x665C:
+       case 0x665D:
        default:
                pi->powertune_defaults = &defaults_bonaire_xt;
                break;
-       case 0x6651:
-       case 0x665D:
-               pi->powertune_defaults = &defaults_bonaire_pro;
-               break;
        case 0x6640:
-               pi->powertune_defaults = &defaults_saturn_xt;
-               break;
        case 0x6641:
-               pi->powertune_defaults = &defaults_saturn_pro;
+       case 0x6646:
+       case 0x6647:
+               pi->powertune_defaults = &defaults_saturn_xt;
                break;
        case 0x67B8:
        case 0x67B0:
+               pi->powertune_defaults = &defaults_hawaii_xt;
+               break;
+       case 0x67BA:
+       case 0x67B1:
+               pi->powertune_defaults = &defaults_hawaii_pro;
+               break;
        case 0x67A0:
        case 0x67A1:
        case 0x67A2:
@@ -228,11 +235,7 @@ static void ci_initialize_powertune_defaults(struct radeon_device *rdev)
        case 0x67AA:
        case 0x67B9:
        case 0x67BE:
-               pi->powertune_defaults = &defaults_hawaii_xt;
-               break;
-       case 0x67BA:
-       case 0x67B1:
-               pi->powertune_defaults = &defaults_hawaii_pro;
+               pi->powertune_defaults = &defaults_bonaire_xt;
                break;
        }
 
@@ -5146,6 +5149,12 @@ int ci_dpm_init(struct radeon_device *rdev)
        pi->mclk_dpm_key_disabled = 0;
        pi->pcie_dpm_key_disabled = 0;
 
+       /* mclk dpm is unstable on some R7 260X cards with the old mc ucode */
+       if ((rdev->pdev->device == 0x6658) &&
+           (rdev->mc_fw->size == (BONAIRE_MC_UCODE_SIZE * 4))) {
+               pi->mclk_dpm_key_disabled = 1;
+       }
+
        pi->caps_sclk_ds = true;
 
        pi->mclk_strobe_mode_threshold = 40000;
index 745143c2358fc73e920fdccd4c1cec50d54ee884..199eb194716f83b64aa7c3850d30606f4ba3f053 100644 (file)
@@ -38,6 +38,7 @@ MODULE_FIRMWARE("radeon/BONAIRE_me.bin");
 MODULE_FIRMWARE("radeon/BONAIRE_ce.bin");
 MODULE_FIRMWARE("radeon/BONAIRE_mec.bin");
 MODULE_FIRMWARE("radeon/BONAIRE_mc.bin");
+MODULE_FIRMWARE("radeon/BONAIRE_mc2.bin");
 MODULE_FIRMWARE("radeon/BONAIRE_rlc.bin");
 MODULE_FIRMWARE("radeon/BONAIRE_sdma.bin");
 MODULE_FIRMWARE("radeon/BONAIRE_smc.bin");
@@ -46,6 +47,7 @@ MODULE_FIRMWARE("radeon/HAWAII_me.bin");
 MODULE_FIRMWARE("radeon/HAWAII_ce.bin");
 MODULE_FIRMWARE("radeon/HAWAII_mec.bin");
 MODULE_FIRMWARE("radeon/HAWAII_mc.bin");
+MODULE_FIRMWARE("radeon/HAWAII_mc2.bin");
 MODULE_FIRMWARE("radeon/HAWAII_rlc.bin");
 MODULE_FIRMWARE("radeon/HAWAII_sdma.bin");
 MODULE_FIRMWARE("radeon/HAWAII_smc.bin");
@@ -1703,20 +1705,20 @@ int ci_mc_load_microcode(struct radeon_device *rdev)
        const __be32 *fw_data;
        u32 running, blackout = 0;
        u32 *io_mc_regs;
-       int i, ucode_size, regs_size;
+       int i, regs_size, ucode_size;
 
        if (!rdev->mc_fw)
                return -EINVAL;
 
+       ucode_size = rdev->mc_fw->size / 4;
+
        switch (rdev->family) {
        case CHIP_BONAIRE:
                io_mc_regs = (u32 *)&bonaire_io_mc_regs;
-               ucode_size = CIK_MC_UCODE_SIZE;
                regs_size = BONAIRE_IO_MC_REGS_SIZE;
                break;
        case CHIP_HAWAII:
                io_mc_regs = (u32 *)&hawaii_io_mc_regs;
-               ucode_size = HAWAII_MC_UCODE_SIZE;
                regs_size = HAWAII_IO_MC_REGS_SIZE;
                break;
        default:
@@ -1783,7 +1785,7 @@ static int cik_init_microcode(struct radeon_device *rdev)
        const char *chip_name;
        size_t pfp_req_size, me_req_size, ce_req_size,
                mec_req_size, rlc_req_size, mc_req_size = 0,
-               sdma_req_size, smc_req_size = 0;
+               sdma_req_size, smc_req_size = 0, mc2_req_size = 0;
        char fw_name[30];
        int err;
 
@@ -1797,7 +1799,8 @@ static int cik_init_microcode(struct radeon_device *rdev)
                ce_req_size = CIK_CE_UCODE_SIZE * 4;
                mec_req_size = CIK_MEC_UCODE_SIZE * 4;
                rlc_req_size = BONAIRE_RLC_UCODE_SIZE * 4;
-               mc_req_size = CIK_MC_UCODE_SIZE * 4;
+               mc_req_size = BONAIRE_MC_UCODE_SIZE * 4;
+               mc2_req_size = BONAIRE_MC2_UCODE_SIZE * 4;
                sdma_req_size = CIK_SDMA_UCODE_SIZE * 4;
                smc_req_size = ALIGN(BONAIRE_SMC_UCODE_SIZE, 4);
                break;
@@ -1809,6 +1812,7 @@ static int cik_init_microcode(struct radeon_device *rdev)
                mec_req_size = CIK_MEC_UCODE_SIZE * 4;
                rlc_req_size = BONAIRE_RLC_UCODE_SIZE * 4;
                mc_req_size = HAWAII_MC_UCODE_SIZE * 4;
+               mc2_req_size = HAWAII_MC2_UCODE_SIZE * 4;
                sdma_req_size = CIK_SDMA_UCODE_SIZE * 4;
                smc_req_size = ALIGN(HAWAII_SMC_UCODE_SIZE, 4);
                break;
@@ -1904,16 +1908,22 @@ static int cik_init_microcode(struct radeon_device *rdev)
 
        /* No SMC, MC ucode on APUs */
        if (!(rdev->flags & RADEON_IS_IGP)) {
-               snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc.bin", chip_name);
+               snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc2.bin", chip_name);
                err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev);
-               if (err)
-                       goto out;
-               if (rdev->mc_fw->size != mc_req_size) {
+               if (err) {
+                       snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc.bin", chip_name);
+                       err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev);
+                       if (err)
+                               goto out;
+               }
+               if ((rdev->mc_fw->size != mc_req_size) &&
+                   (rdev->mc_fw->size != mc2_req_size)){
                        printk(KERN_ERR
                               "cik_mc: Bogus length %zu in firmware \"%s\"\n",
                               rdev->mc_fw->size, fw_name);
                        err = -EINVAL;
                }
+               DRM_INFO("%s: %zu bytes\n", fw_name, rdev->mc_fw->size);
 
                snprintf(fw_name, sizeof(fw_name), "radeon/%s_smc.bin", chip_name);
                err = request_firmware(&rdev->smc_fw, fw_name, rdev->dev);
index 89b4afa5041c322a15afc67bfbba7f7cf2cef8d6..f7e46cf682afdcbe051cb4a6ecf6dfe66570a5c3 100644 (file)
@@ -597,7 +597,7 @@ int cik_sdma_ring_test(struct radeon_device *rdev,
        tmp = 0xCAFEDEAD;
        writel(tmp, ptr);
 
-       r = radeon_ring_lock(rdev, ring, 4);
+       r = radeon_ring_lock(rdev, ring, 5);
        if (r) {
                DRM_ERROR("radeon: dma failed to lock ring %d (%d).\n", ring->idx, r);
                return r;
index 94e85875199481ca46e3c84cef453aaec3970356..0a65dc7e93e7f8ed2fe06b4ccd07d9bfcf9e462c 100644 (file)
@@ -309,11 +309,17 @@ int dce6_audio_init(struct radeon_device *rdev)
 
        rdev->audio.enabled = true;
 
-       if (ASIC_IS_DCE8(rdev))
+       if (ASIC_IS_DCE81(rdev)) /* KV: 4 streams, 7 endpoints */
+               rdev->audio.num_pins = 7;
+       else if (ASIC_IS_DCE83(rdev)) /* KB: 2 streams, 3 endpoints */
+               rdev->audio.num_pins = 3;
+       else if (ASIC_IS_DCE8(rdev)) /* BN/HW: 6 streams, 7 endpoints */
+               rdev->audio.num_pins = 7;
+       else if (ASIC_IS_DCE61(rdev)) /* TN: 4 streams, 6 endpoints */
                rdev->audio.num_pins = 6;
-       else if (ASIC_IS_DCE61(rdev))
-               rdev->audio.num_pins = 4;
-       else
+       else if (ASIC_IS_DCE64(rdev)) /* OL: 2 streams, 2 endpoints */
+               rdev->audio.num_pins = 2;
+       else /* SI: 6 streams, 6 endpoints */
                rdev->audio.num_pins = 6;
 
        for (i = 0; i < rdev->audio.num_pins; i++) {
index cbf7e3269f84882d1352a44ea402fa5dc4cbba7c..9c61b74ef4415cbf1f7bce501b268662d80da8de 100644 (file)
@@ -158,16 +158,18 @@ u32 r600_dpm_get_vblank_time(struct radeon_device *rdev)
        u32 line_time_us, vblank_lines;
        u32 vblank_time_us = 0xffffffff; /* if the displays are off, vblank time is max */
 
-       list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
-               radeon_crtc = to_radeon_crtc(crtc);
-               if (crtc->enabled && radeon_crtc->enabled && radeon_crtc->hw_mode.clock) {
-                       line_time_us = (radeon_crtc->hw_mode.crtc_htotal * 1000) /
-                               radeon_crtc->hw_mode.clock;
-                       vblank_lines = radeon_crtc->hw_mode.crtc_vblank_end -
-                               radeon_crtc->hw_mode.crtc_vdisplay +
-                               (radeon_crtc->v_border * 2);
-                       vblank_time_us = vblank_lines * line_time_us;
-                       break;
+       if (rdev->num_crtc && rdev->mode_info.mode_config_initialized) {
+               list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
+                       radeon_crtc = to_radeon_crtc(crtc);
+                       if (crtc->enabled && radeon_crtc->enabled && radeon_crtc->hw_mode.clock) {
+                               line_time_us = (radeon_crtc->hw_mode.crtc_htotal * 1000) /
+                                       radeon_crtc->hw_mode.clock;
+                               vblank_lines = radeon_crtc->hw_mode.crtc_vblank_end -
+                                       radeon_crtc->hw_mode.crtc_vdisplay +
+                                       (radeon_crtc->v_border * 2);
+                               vblank_time_us = vblank_lines * line_time_us;
+                               break;
+                       }
                }
        }
 
@@ -181,14 +183,15 @@ u32 r600_dpm_get_vrefresh(struct radeon_device *rdev)
        struct radeon_crtc *radeon_crtc;
        u32 vrefresh = 0;
 
-       list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
-               radeon_crtc = to_radeon_crtc(crtc);
-               if (crtc->enabled && radeon_crtc->enabled && radeon_crtc->hw_mode.clock) {
-                       vrefresh = radeon_crtc->hw_mode.vrefresh;
-                       break;
+       if (rdev->num_crtc && rdev->mode_info.mode_config_initialized) {
+               list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
+                       radeon_crtc = to_radeon_crtc(crtc);
+                       if (crtc->enabled && radeon_crtc->enabled && radeon_crtc->hw_mode.clock) {
+                               vrefresh = radeon_crtc->hw_mode.vrefresh;
+                               break;
+                       }
                }
        }
-
        return vrefresh;
 }
 
index f21db7a0b34d7d231bc278b1865bb83d4a1e1d72..b58e1afdda7697e9a2e094c3f07bacc8a1621699 100644 (file)
@@ -739,7 +739,7 @@ union radeon_irq_stat_regs {
        struct cik_irq_stat_regs cik;
 };
 
-#define RADEON_MAX_HPD_PINS 6
+#define RADEON_MAX_HPD_PINS 7
 #define RADEON_MAX_CRTCS 6
 #define RADEON_MAX_AFMT_BLOCKS 7
 
@@ -2321,6 +2321,7 @@ struct radeon_device {
        bool have_disp_power_ref;
 };
 
+bool radeon_is_px(struct drm_device *dev);
 int radeon_device_init(struct radeon_device *rdev,
                       struct drm_device *ddev,
                       struct pci_dev *pdev,
@@ -2631,6 +2632,9 @@ void r100_pll_errata_after_index(struct radeon_device *rdev);
 #define ASIC_IS_DCE64(rdev) ((rdev->family == CHIP_OLAND))
 #define ASIC_IS_NODCE(rdev) ((rdev->family == CHIP_HAINAN))
 #define ASIC_IS_DCE8(rdev) ((rdev->family >= CHIP_BONAIRE))
+#define ASIC_IS_DCE81(rdev) ((rdev->family == CHIP_KAVERI))
+#define ASIC_IS_DCE82(rdev) ((rdev->family == CHIP_BONAIRE))
+#define ASIC_IS_DCE83(rdev) ((rdev->family == CHIP_KABINI))
 
 #define ASIC_IS_LOMBOK(rdev) ((rdev->ddev->pdev->device == 0x6849) || \
                              (rdev->ddev->pdev->device == 0x6850) || \
index fa9a9c02751ea865251f7854665c3757caa48e00..a9fb0d016d387683a1d4bb96f77c046b7cd804b7 100644 (file)
@@ -59,7 +59,7 @@ struct atpx_mux {
        u16 mux;
 } __packed;
 
-bool radeon_is_px(void) {
+bool radeon_has_atpx(void) {
        return radeon_atpx_priv.atpx_detected;
 }
 
@@ -528,6 +528,13 @@ static bool radeon_atpx_detect(void)
                has_atpx |= (radeon_atpx_pci_probe_handle(pdev) == true);
        }
 
+       /* some newer PX laptops mark the dGPU as a non-VGA display device */
+       while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_OTHER << 8, pdev)) != NULL) {
+               vga_count++;
+
+               has_atpx |= (radeon_atpx_pci_probe_handle(pdev) == true);
+       }
+
        if (has_atpx && vga_count == 2) {
                acpi_get_name(radeon_atpx_priv.atpx.handle, ACPI_FULL_PATHNAME, &buffer);
                printk(KERN_INFO "VGA switcheroo: detected switching method %s handle\n",
index c566b486ca08a79d72256dd3696b0992c07b481f..ea50e0ae7bf7f39261f03f7b301beadc5775da52 100644 (file)
@@ -1261,21 +1261,6 @@ static const struct drm_connector_funcs radeon_dvi_connector_funcs = {
        .force = radeon_dvi_force,
 };
 
-static void radeon_dp_connector_destroy(struct drm_connector *connector)
-{
-       struct radeon_connector *radeon_connector = to_radeon_connector(connector);
-       struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
-
-       if (radeon_connector->edid)
-               kfree(radeon_connector->edid);
-       if (radeon_dig_connector->dp_i2c_bus)
-               radeon_i2c_destroy(radeon_dig_connector->dp_i2c_bus);
-       kfree(radeon_connector->con_priv);
-       drm_sysfs_connector_remove(connector);
-       drm_connector_cleanup(connector);
-       kfree(connector);
-}
-
 static int radeon_dp_get_modes(struct drm_connector *connector)
 {
        struct radeon_connector *radeon_connector = to_radeon_connector(connector);
@@ -1553,7 +1538,7 @@ static const struct drm_connector_funcs radeon_dp_connector_funcs = {
        .detect = radeon_dp_detect,
        .fill_modes = drm_helper_probe_single_connector_modes,
        .set_property = radeon_connector_set_property,
-       .destroy = radeon_dp_connector_destroy,
+       .destroy = radeon_connector_destroy,
        .force = radeon_dvi_force,
 };
 
@@ -1562,7 +1547,7 @@ static const struct drm_connector_funcs radeon_edp_connector_funcs = {
        .detect = radeon_dp_detect,
        .fill_modes = drm_helper_probe_single_connector_modes,
        .set_property = radeon_lvds_set_property,
-       .destroy = radeon_dp_connector_destroy,
+       .destroy = radeon_connector_destroy,
        .force = radeon_dvi_force,
 };
 
@@ -1571,7 +1556,7 @@ static const struct drm_connector_funcs radeon_lvds_bridge_connector_funcs = {
        .detect = radeon_dp_detect,
        .fill_modes = drm_helper_probe_single_connector_modes,
        .set_property = radeon_lvds_set_property,
-       .destroy = radeon_dp_connector_destroy,
+       .destroy = radeon_connector_destroy,
        .force = radeon_dvi_force,
 };
 
@@ -1668,17 +1653,10 @@ radeon_add_atom_connector(struct drm_device *dev,
                radeon_dig_connector->igp_lane_info = igp_lane_info;
                radeon_connector->con_priv = radeon_dig_connector;
                if (i2c_bus->valid) {
-                       /* add DP i2c bus */
-                       if (connector_type == DRM_MODE_CONNECTOR_eDP)
-                               radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch");
-                       else
-                               radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch");
-                       if (radeon_dig_connector->dp_i2c_bus)
+                       radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
+                       if (radeon_connector->ddc_bus)
                                has_aux = true;
                        else
-                               DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n");
-                       radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
-                       if (!radeon_connector->ddc_bus)
                                DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
                }
                switch (connector_type) {
@@ -1893,10 +1871,6 @@ radeon_add_atom_connector(struct drm_device *dev,
                        drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type);
                        drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
                        if (i2c_bus->valid) {
-                               /* add DP i2c bus */
-                               radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch");
-                               if (!radeon_dig_connector->dp_i2c_bus)
-                                       DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n");
                                radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
                                if (radeon_connector->ddc_bus)
                                        has_aux = true;
@@ -1942,14 +1916,10 @@ radeon_add_atom_connector(struct drm_device *dev,
                        drm_connector_init(dev, &radeon_connector->base, &radeon_edp_connector_funcs, connector_type);
                        drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
                        if (i2c_bus->valid) {
-                               /* add DP i2c bus */
-                               radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch");
-                               if (radeon_dig_connector->dp_i2c_bus)
+                               radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
+                               if (radeon_connector->ddc_bus)
                                        has_aux = true;
                                else
-                                       DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n");
-                               radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
-                               if (!radeon_connector->ddc_bus)
                                        DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
                        }
                        drm_object_attach_property(&radeon_connector->base.base,
index 835516d2d2576a81d99346598874ff810116f35e..511fe26198e4a3e5a779af5e7f82bf62be570da6 100644 (file)
@@ -102,11 +102,14 @@ static const char radeon_family_name[][16] = {
        "LAST",
 };
 
-#if defined(CONFIG_VGA_SWITCHEROO)
-bool radeon_is_px(void);
-#else
-static inline bool radeon_is_px(void) { return false; }
-#endif
+bool radeon_is_px(struct drm_device *dev)
+{
+       struct radeon_device *rdev = dev->dev_private;
+
+       if (rdev->flags & RADEON_IS_PX)
+               return true;
+       return false;
+}
 
 /**
  * radeon_program_register_sequence - program an array of registers.
@@ -1082,7 +1085,7 @@ static void radeon_switcheroo_set_state(struct pci_dev *pdev, enum vga_switchero
 {
        struct drm_device *dev = pci_get_drvdata(pdev);
 
-       if (radeon_is_px() && state == VGA_SWITCHEROO_OFF)
+       if (radeon_is_px(dev) && state == VGA_SWITCHEROO_OFF)
                return;
 
        if (state == VGA_SWITCHEROO_ON) {
@@ -1301,9 +1304,7 @@ int radeon_device_init(struct radeon_device *rdev,
         * ignore it */
        vga_client_register(rdev->pdev, rdev, NULL, radeon_vga_set_decode);
 
-       if (radeon_runtime_pm == 1)
-               runtime = true;
-       if ((radeon_runtime_pm == -1) && radeon_is_px())
+       if (rdev->flags & RADEON_IS_PX)
                runtime = true;
        vga_switcheroo_register_client(rdev->pdev, &radeon_switcheroo_ops, runtime);
        if (runtime)
index 386cfa4c194dc40a75e13e23dde2adf040e029f2..8d99d5ee8014c4f23e031a31cbeab85bde33d81a 100644 (file)
@@ -759,19 +759,18 @@ int radeon_ddc_get_modes(struct radeon_connector *radeon_connector)
 
        if (radeon_connector_encoder_get_dp_bridge_encoder_id(&radeon_connector->base) !=
            ENCODER_OBJECT_ID_NONE) {
-               struct radeon_connector_atom_dig *dig = radeon_connector->con_priv;
-
-               if (dig->dp_i2c_bus)
+               if (radeon_connector->ddc_bus->has_aux)
                        radeon_connector->edid = drm_get_edid(&radeon_connector->base,
-                                                             &dig->dp_i2c_bus->adapter);
+                                                             &radeon_connector->ddc_bus->aux.ddc);
        } else if ((radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_DisplayPort) ||
                   (radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_eDP)) {
                struct radeon_connector_atom_dig *dig = radeon_connector->con_priv;
 
                if ((dig->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT ||
-                    dig->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) && dig->dp_i2c_bus)
+                    dig->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) &&
+                   radeon_connector->ddc_bus->has_aux)
                        radeon_connector->edid = drm_get_edid(&radeon_connector->base,
-                                                             &dig->dp_i2c_bus->adapter);
+                                                             &radeon_connector->ddc_bus->aux.ddc);
                else if (radeon_connector->ddc_bus && !radeon_connector->edid)
                        radeon_connector->edid = drm_get_edid(&radeon_connector->base,
                                                              &radeon_connector->ddc_bus->adapter);
@@ -840,6 +839,38 @@ static void avivo_reduce_ratio(unsigned *nom, unsigned *den,
        }
 }
 
+/**
+ * avivo_get_fb_ref_div - feedback and ref divider calculation
+ *
+ * @nom: nominator
+ * @den: denominator
+ * @post_div: post divider
+ * @fb_div_max: feedback divider maximum
+ * @ref_div_max: reference divider maximum
+ * @fb_div: resulting feedback divider
+ * @ref_div: resulting reference divider
+ *
+ * Calculate feedback and reference divider for a given post divider. Makes
+ * sure we stay within the limits.
+ */
+static void avivo_get_fb_ref_div(unsigned nom, unsigned den, unsigned post_div,
+                                unsigned fb_div_max, unsigned ref_div_max,
+                                unsigned *fb_div, unsigned *ref_div)
+{
+       /* limit reference * post divider to a maximum */
+       ref_div_max = min(210 / post_div, ref_div_max);
+
+       /* get matching reference and feedback divider */
+       *ref_div = min(max(DIV_ROUND_CLOSEST(den, post_div), 1u), ref_div_max);
+       *fb_div = DIV_ROUND_CLOSEST(nom * *ref_div * post_div, den);
+
+       /* limit fb divider to its maximum */
+        if (*fb_div > fb_div_max) {
+               *ref_div = DIV_ROUND_CLOSEST(*ref_div * fb_div_max, *fb_div);
+               *fb_div = fb_div_max;
+       }
+}
+
 /**
  * radeon_compute_pll_avivo - compute PLL paramaters
  *
@@ -861,11 +892,14 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll,
                              u32 *ref_div_p,
                              u32 *post_div_p)
 {
+       unsigned target_clock = pll->flags & RADEON_PLL_USE_FRAC_FB_DIV ?
+               freq : freq / 10;
+
        unsigned fb_div_min, fb_div_max, fb_div;
        unsigned post_div_min, post_div_max, post_div;
        unsigned ref_div_min, ref_div_max, ref_div;
        unsigned post_div_best, diff_best;
-       unsigned nom, den, tmp;
+       unsigned nom, den;
 
        /* determine allowed feedback divider range */
        fb_div_min = pll->min_feedback_div;
@@ -881,14 +915,18 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll,
                ref_div_min = pll->reference_div;
        else
                ref_div_min = pll->min_ref_div;
-       ref_div_max = pll->max_ref_div;
+
+       if (pll->flags & RADEON_PLL_USE_FRAC_FB_DIV &&
+           pll->flags & RADEON_PLL_USE_REF_DIV)
+               ref_div_max = pll->reference_div;
+       else
+               ref_div_max = pll->max_ref_div;
 
        /* determine allowed post divider range */
        if (pll->flags & RADEON_PLL_USE_POST_DIV) {
                post_div_min = pll->post_div;
                post_div_max = pll->post_div;
        } else {
-               unsigned target_clock = freq / 10;
                unsigned vco_min, vco_max;
 
                if (pll->flags & RADEON_PLL_IS_LCD) {
@@ -899,6 +937,11 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll,
                        vco_max = pll->pll_out_max;
                }
 
+               if (pll->flags & RADEON_PLL_USE_FRAC_FB_DIV) {
+                       vco_min *= 10;
+                       vco_max *= 10;
+               }
+
                post_div_min = vco_min / target_clock;
                if ((target_clock * post_div_min) < vco_min)
                        ++post_div_min;
@@ -913,7 +956,7 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll,
        }
 
        /* represent the searched ratio as fractional number */
-       nom = pll->flags & RADEON_PLL_USE_FRAC_FB_DIV ? freq : freq / 10;
+       nom = target_clock;
        den = pll->reference_freq;
 
        /* reduce the numbers to a simpler ratio */
@@ -927,7 +970,12 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll,
        diff_best = ~0;
 
        for (post_div = post_div_min; post_div <= post_div_max; ++post_div) {
-               unsigned diff = abs(den - den / post_div * post_div);
+               unsigned diff;
+               avivo_get_fb_ref_div(nom, den, post_div, fb_div_max,
+                                    ref_div_max, &fb_div, &ref_div);
+               diff = abs(target_clock - (pll->reference_freq * fb_div) /
+                       (ref_div * post_div));
+
                if (diff < diff_best || (diff == diff_best &&
                    !(pll->flags & RADEON_PLL_PREFER_MINM_OVER_MAXP))) {
 
@@ -937,24 +985,9 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll,
        }
        post_div = post_div_best;
 
-       /* get matching reference and feedback divider */
-       ref_div = max(den / post_div, 1u);
-       fb_div = nom;
-
-       /* we're almost done, but reference and feedback
-          divider might be to large now */
-
-       tmp = ref_div;
-
-        if (fb_div > fb_div_max) {
-               ref_div = ref_div * fb_div_max / fb_div;
-               fb_div = fb_div_max;
-       }
-
-       if (ref_div > ref_div_max) {
-               ref_div = ref_div_max;
-               fb_div = nom * ref_div_max / tmp;
-       }
+       /* get the feedback and reference divider for the optimal value */
+       avivo_get_fb_ref_div(nom, den, post_div, fb_div_max, ref_div_max,
+                            &fb_div, &ref_div);
 
        /* reduce the numbers to a simpler ratio once more */
        /* this also makes sure that the reference divider is large enough */
@@ -976,7 +1009,7 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll,
        *post_div_p = post_div;
 
        DRM_DEBUG_KMS("%d - %d, pll dividers - fb: %d.%d ref: %d, post %d\n",
-                     freq, *dot_clock_p, *fb_div_p, *frac_fb_div_p,
+                     freq, *dot_clock_p * 10, *fb_div_p, *frac_fb_div_p,
                      ref_div, post_div);
 }
 
index d0eba48dd74e1dc42e07b7e8335e421360fa4421..c00a2f58518502df5620e02af532f3dd725fa3cf 100644 (file)
@@ -115,6 +115,7 @@ extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
                                      unsigned int flags,
                                      int *vpos, int *hpos, ktime_t *stime,
                                      ktime_t *etime);
+extern bool radeon_is_px(struct drm_device *dev);
 extern const struct drm_ioctl_desc radeon_ioctls_kms[];
 extern int radeon_max_kms_ioctl;
 int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
@@ -144,11 +145,9 @@ void radeon_debugfs_cleanup(struct drm_minor *minor);
 #if defined(CONFIG_VGA_SWITCHEROO)
 void radeon_register_atpx_handler(void);
 void radeon_unregister_atpx_handler(void);
-bool radeon_is_px(void);
 #else
 static inline void radeon_register_atpx_handler(void) {}
 static inline void radeon_unregister_atpx_handler(void) {}
-static inline bool radeon_is_px(void) { return false; }
 #endif
 
 int radeon_no_wb;
@@ -186,7 +185,7 @@ module_param_named(dynclks, radeon_dynclks, int, 0444);
 MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
 module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
 
-MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
+MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");
 module_param_named(vramlimit, radeon_vram_limit, int, 0600);
 
 MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
@@ -405,12 +404,7 @@ static int radeon_pmops_runtime_suspend(struct device *dev)
        struct drm_device *drm_dev = pci_get_drvdata(pdev);
        int ret;
 
-       if (radeon_runtime_pm == 0) {
-               pm_runtime_forbid(dev);
-               return -EBUSY;
-       }
-
-       if (radeon_runtime_pm == -1 && !radeon_is_px()) {
+       if (!radeon_is_px(drm_dev)) {
                pm_runtime_forbid(dev);
                return -EBUSY;
        }
@@ -434,10 +428,7 @@ static int radeon_pmops_runtime_resume(struct device *dev)
        struct drm_device *drm_dev = pci_get_drvdata(pdev);
        int ret;
 
-       if (radeon_runtime_pm == 0)
-               return -EINVAL;
-
-       if (radeon_runtime_pm == -1 && !radeon_is_px())
+       if (!radeon_is_px(drm_dev))
                return -EINVAL;
 
        drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
@@ -462,14 +453,7 @@ static int radeon_pmops_runtime_idle(struct device *dev)
        struct drm_device *drm_dev = pci_get_drvdata(pdev);
        struct drm_crtc *crtc;
 
-       if (radeon_runtime_pm == 0) {
-               pm_runtime_forbid(dev);
-               return -EBUSY;
-       }
-
-       /* are we PX enabled? */
-       if (radeon_runtime_pm == -1 && !radeon_is_px()) {
-               DRM_DEBUG_DRIVER("failing to power off - not px\n");
+       if (!radeon_is_px(drm_dev)) {
                pm_runtime_forbid(dev);
                return -EBUSY;
        }
index 614ad549297f283ac159de5d73476d7da6107626..9da5da4ffd176907d2b3f9b077e883cd9ab89323 100644 (file)
@@ -115,6 +115,7 @@ enum radeon_chip_flags {
        RADEON_NEW_MEMMAP = 0x00400000UL,
        RADEON_IS_PCI = 0x00800000UL,
        RADEON_IS_IGPGART = 0x01000000UL,
+       RADEON_IS_PX = 0x02000000UL,
 };
 
 #endif
index e24ca6ab96decdf94c3e86a097d949f2705a1f7c..7b944142a9fdd4e74646377e78fcc1af8f039769 100644 (file)
@@ -64,8 +64,7 @@ bool radeon_ddc_probe(struct radeon_connector *radeon_connector, bool use_aux)
                radeon_router_select_ddc_port(radeon_connector);
 
        if (use_aux) {
-               struct radeon_connector_atom_dig *dig = radeon_connector->con_priv;
-               ret = i2c_transfer(&dig->dp_i2c_bus->adapter, msgs, 2);
+               ret = i2c_transfer(&radeon_connector->ddc_bus->aux.ddc, msgs, 2);
        } else {
                ret = i2c_transfer(&radeon_connector->ddc_bus->adapter, msgs, 2);
        }
@@ -950,16 +949,16 @@ struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
                /* set the radeon bit adapter */
                snprintf(i2c->adapter.name, sizeof(i2c->adapter.name),
                         "Radeon i2c bit bus %s", name);
-               i2c->adapter.algo_data = &i2c->algo.bit;
-               i2c->algo.bit.pre_xfer = pre_xfer;
-               i2c->algo.bit.post_xfer = post_xfer;
-               i2c->algo.bit.setsda = set_data;
-               i2c->algo.bit.setscl = set_clock;
-               i2c->algo.bit.getsda = get_data;
-               i2c->algo.bit.getscl = get_clock;
-               i2c->algo.bit.udelay = 10;
-               i2c->algo.bit.timeout = usecs_to_jiffies(2200); /* from VESA */
-               i2c->algo.bit.data = i2c;
+               i2c->adapter.algo_data = &i2c->bit;
+               i2c->bit.pre_xfer = pre_xfer;
+               i2c->bit.post_xfer = post_xfer;
+               i2c->bit.setsda = set_data;
+               i2c->bit.setscl = set_clock;
+               i2c->bit.getsda = get_data;
+               i2c->bit.getscl = get_clock;
+               i2c->bit.udelay = 10;
+               i2c->bit.timeout = usecs_to_jiffies(2200);      /* from VESA */
+               i2c->bit.data = i2c;
                ret = i2c_bit_add_bus(&i2c->adapter);
                if (ret) {
                        DRM_ERROR("Failed to register bit i2c %s\n", name);
@@ -974,46 +973,13 @@ out_free:
 
 }
 
-struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev,
-                                            struct radeon_i2c_bus_rec *rec,
-                                            const char *name)
-{
-       struct radeon_i2c_chan *i2c;
-       int ret;
-
-       i2c = kzalloc(sizeof(struct radeon_i2c_chan), GFP_KERNEL);
-       if (i2c == NULL)
-               return NULL;
-
-       i2c->rec = *rec;
-       i2c->adapter.owner = THIS_MODULE;
-       i2c->adapter.class = I2C_CLASS_DDC;
-       i2c->adapter.dev.parent = &dev->pdev->dev;
-       i2c->dev = dev;
-       snprintf(i2c->adapter.name, sizeof(i2c->adapter.name),
-                "Radeon aux bus %s", name);
-       i2c_set_adapdata(&i2c->adapter, i2c);
-       i2c->adapter.algo_data = &i2c->algo.dp;
-       i2c->algo.dp.aux_ch = radeon_dp_i2c_aux_ch;
-       i2c->algo.dp.address = 0;
-       ret = i2c_dp_aux_add_bus(&i2c->adapter);
-       if (ret) {
-               DRM_INFO("Failed to register i2c %s\n", name);
-               goto out_free;
-       }
-
-       return i2c;
-out_free:
-       kfree(i2c);
-       return NULL;
-
-}
-
 void radeon_i2c_destroy(struct radeon_i2c_chan *i2c)
 {
        if (!i2c)
                return;
        i2c_del_adapter(&i2c->adapter);
+       if (i2c->has_aux)
+               drm_dp_aux_unregister_i2c_bus(&i2c->aux);
        kfree(i2c);
 }
 
index 3e49342a20e602e50f22c3068c543b7e19e9dab7..0cc47f12d9957d916b41acf4d3874fa062313175 100644 (file)
@@ -35,9 +35,9 @@
 #include <linux/pm_runtime.h>
 
 #if defined(CONFIG_VGA_SWITCHEROO)
-bool radeon_is_px(void);
+bool radeon_has_atpx(void);
 #else
-static inline bool radeon_is_px(void) { return false; }
+static inline bool radeon_has_atpx(void) { return false; }
 #endif
 
 /**
@@ -107,6 +107,11 @@ int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags)
                flags |= RADEON_IS_PCI;
        }
 
+       if ((radeon_runtime_pm != 0) &&
+           radeon_has_atpx() &&
+           ((flags & RADEON_IS_IGP) == 0))
+               flags |= RADEON_IS_PX;
+
        /* radeon_device_init should report only fatal error
         * like memory allocation failure or iomapping failure,
         * or memory manager initialization failure, it must
@@ -137,8 +142,7 @@ int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags)
                                "Error during ACPI methods call\n");
        }
 
-       if ((radeon_runtime_pm == 1) ||
-           ((radeon_runtime_pm == -1) && radeon_is_px())) {
+       if (radeon_is_px(dev)) {
                pm_runtime_use_autosuspend(dev->dev);
                pm_runtime_set_autosuspend_delay(dev->dev, 5000);
                pm_runtime_set_active(dev->dev);
@@ -568,12 +572,17 @@ int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv)
                }
 
                r = radeon_vm_init(rdev, &fpriv->vm);
-               if (r)
+               if (r) {
+                       kfree(fpriv);
                        return r;
+               }
 
                r = radeon_bo_reserve(rdev->ring_tmp_bo.bo, false);
-               if (r)
+               if (r) {
+                       radeon_vm_fini(rdev, &fpriv->vm);
+                       kfree(fpriv);
                        return r;
+               }
 
                /* map the ib pool buffer read only into
                 * virtual address space */
index 832d9fa1a4c4ec9f665c9c99c545b0a3451c38c4..6ddf31a2d34e01f685411f5ef456c74b676fecc0 100644 (file)
@@ -187,12 +187,10 @@ struct radeon_pll {
 struct radeon_i2c_chan {
        struct i2c_adapter adapter;
        struct drm_device *dev;
-       union {
-               struct i2c_algo_bit_data bit;
-               struct i2c_algo_dp_aux_data dp;
-       } algo;
+       struct i2c_algo_bit_data bit;
        struct radeon_i2c_bus_rec rec;
        struct drm_dp_aux aux;
+       bool has_aux;
 };
 
 /* mostly for macs, but really any system without connector tables */
@@ -440,7 +438,6 @@ struct radeon_encoder {
 struct radeon_connector_atom_dig {
        uint32_t igp_lane_info;
        /* displayport */
-       struct radeon_i2c_chan *dp_i2c_bus;
        u8 dpcd[DP_RECEIVER_CAP_SIZE];
        u8 dp_sink_type;
        int dp_clock;
@@ -702,8 +699,6 @@ extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder,
                                           uint8_t lane_set);
 extern void radeon_atom_ext_encoder_setup_ddc(struct drm_encoder *encoder);
 extern struct drm_encoder *radeon_get_external_encoder(struct drm_encoder *encoder);
-extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
-                               u8 write_byte, u8 *read_byte);
 void radeon_atom_copy_swap(u8 *dst, u8 *src, u8 num_bytes, bool to_le);
 
 extern void radeon_i2c_init(struct radeon_device *rdev);
@@ -715,9 +710,6 @@ extern void radeon_i2c_add(struct radeon_device *rdev,
                           const char *name);
 extern struct radeon_i2c_chan *radeon_i2c_lookup(struct radeon_device *rdev,
                                                 struct radeon_i2c_bus_rec *i2c_bus);
-extern struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev,
-                                                   struct radeon_i2c_bus_rec *rec,
-                                                   const char *name);
 extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
                                                 struct radeon_i2c_bus_rec *rec,
                                                 const char *name);
index ee738a524639e41e75c7af5279c583e4b3c7ee10..6fac8efe8340e2e99f83965201bab056de2997de 100644 (file)
@@ -603,7 +603,6 @@ static const struct attribute_group *hwmon_groups[] = {
 static int radeon_hwmon_init(struct radeon_device *rdev)
 {
        int err = 0;
-       struct device *hwmon_dev;
 
        switch (rdev->pm.int_thermal_type) {
        case THERMAL_TYPE_RV6XX:
@@ -616,11 +615,11 @@ static int radeon_hwmon_init(struct radeon_device *rdev)
        case THERMAL_TYPE_KV:
                if (rdev->asic->pm.get_temperature == NULL)
                        return err;
-               hwmon_dev = hwmon_device_register_with_groups(rdev->dev,
-                                                             "radeon", rdev,
-                                                             hwmon_groups);
-               if (IS_ERR(hwmon_dev)) {
-                       err = PTR_ERR(hwmon_dev);
+               rdev->pm.int_hwmon_dev = hwmon_device_register_with_groups(rdev->dev,
+                                                                          "radeon", rdev,
+                                                                          hwmon_groups);
+               if (IS_ERR(rdev->pm.int_hwmon_dev)) {
+                       err = PTR_ERR(rdev->pm.int_hwmon_dev);
                        dev_err(rdev->dev,
                                "Unable to register hwmon device: %d\n", err);
                }
@@ -632,6 +631,12 @@ static int radeon_hwmon_init(struct radeon_device *rdev)
        return err;
 }
 
+static void radeon_hwmon_fini(struct radeon_device *rdev)
+{
+       if (rdev->pm.int_hwmon_dev)
+               hwmon_device_unregister(rdev->pm.int_hwmon_dev);
+}
+
 static void radeon_dpm_thermal_work_handler(struct work_struct *work)
 {
        struct radeon_device *rdev =
@@ -1257,6 +1262,7 @@ int radeon_pm_init(struct radeon_device *rdev)
        case CHIP_RV670:
        case CHIP_RS780:
        case CHIP_RS880:
+       case CHIP_RV770:
        case CHIP_BARTS:
        case CHIP_TURKS:
        case CHIP_CAICOS:
@@ -1273,7 +1279,6 @@ int radeon_pm_init(struct radeon_device *rdev)
                else
                        rdev->pm.pm_method = PM_METHOD_PROFILE;
                break;
-       case CHIP_RV770:
        case CHIP_RV730:
        case CHIP_RV710:
        case CHIP_RV740:
@@ -1353,6 +1358,8 @@ static void radeon_pm_fini_old(struct radeon_device *rdev)
                device_remove_file(rdev->dev, &dev_attr_power_method);
        }
 
+       radeon_hwmon_fini(rdev);
+
        if (rdev->pm.power_state)
                kfree(rdev->pm.power_state);
 }
@@ -1372,6 +1379,8 @@ static void radeon_pm_fini_dpm(struct radeon_device *rdev)
        }
        radeon_dpm_fini(rdev);
 
+       radeon_hwmon_fini(rdev);
+
        if (rdev->pm.power_state)
                kfree(rdev->pm.power_state);
 }
@@ -1397,12 +1406,14 @@ static void radeon_pm_compute_clocks_old(struct radeon_device *rdev)
 
        rdev->pm.active_crtcs = 0;
        rdev->pm.active_crtc_count = 0;
-       list_for_each_entry(crtc,
-               &ddev->mode_config.crtc_list, head) {
-               radeon_crtc = to_radeon_crtc(crtc);
-               if (radeon_crtc->enabled) {
-                       rdev->pm.active_crtcs |= (1 << radeon_crtc->crtc_id);
-                       rdev->pm.active_crtc_count++;
+       if (rdev->num_crtc && rdev->mode_info.mode_config_initialized) {
+               list_for_each_entry(crtc,
+                                   &ddev->mode_config.crtc_list, head) {
+                       radeon_crtc = to_radeon_crtc(crtc);
+                       if (radeon_crtc->enabled) {
+                               rdev->pm.active_crtcs |= (1 << radeon_crtc->crtc_id);
+                               rdev->pm.active_crtc_count++;
+                       }
                }
        }
 
@@ -1469,12 +1480,14 @@ static void radeon_pm_compute_clocks_dpm(struct radeon_device *rdev)
        /* update active crtc counts */
        rdev->pm.dpm.new_active_crtcs = 0;
        rdev->pm.dpm.new_active_crtc_count = 0;
-       list_for_each_entry(crtc,
-               &ddev->mode_config.crtc_list, head) {
-               radeon_crtc = to_radeon_crtc(crtc);
-               if (crtc->enabled) {
-                       rdev->pm.dpm.new_active_crtcs |= (1 << radeon_crtc->crtc_id);
-                       rdev->pm.dpm.new_active_crtc_count++;
+       if (rdev->num_crtc && rdev->mode_info.mode_config_initialized) {
+               list_for_each_entry(crtc,
+                                   &ddev->mode_config.crtc_list, head) {
+                       radeon_crtc = to_radeon_crtc(crtc);
+                       if (crtc->enabled) {
+                               rdev->pm.dpm.new_active_crtcs |= (1 << radeon_crtc->crtc_id);
+                               rdev->pm.dpm.new_active_crtc_count++;
+                       }
                }
        }
 
index a77cd274dfc3fbe003d66dcbed21f3bdcb12fbcf..58d12938c0b80bf022bc8c5490a8cb660041fa5d 100644 (file)
 #define BTC_MC_UCODE_SIZE            6024
 #define CAYMAN_MC_UCODE_SIZE         6037
 #define SI_MC_UCODE_SIZE             7769
+#define TAHITI_MC_UCODE_SIZE         7808
+#define PITCAIRN_MC_UCODE_SIZE       7775
+#define VERDE_MC_UCODE_SIZE          7875
 #define OLAND_MC_UCODE_SIZE          7863
-#define CIK_MC_UCODE_SIZE            7866
+#define BONAIRE_MC_UCODE_SIZE        7866
+#define BONAIRE_MC2_UCODE_SIZE       7948
 #define HAWAII_MC_UCODE_SIZE         7933
+#define HAWAII_MC2_UCODE_SIZE        8091
 
 /* SDMA */
 #define CIK_SDMA_UCODE_SIZE          1050
index 76e9904bc5377c23ea33c842137266ed18d560e8..ced53dd03e7c1f12449850c1eaa2d2568a552750 100644 (file)
@@ -613,7 +613,7 @@ void radeon_vce_fence_emit(struct radeon_device *rdev,
                           struct radeon_fence *fence)
 {
        struct radeon_ring *ring = &rdev->ring[fence->ring];
-       uint32_t addr = rdev->fence_drv[fence->ring].gpu_addr;
+       uint64_t addr = rdev->fence_drv[fence->ring].gpu_addr;
 
        radeon_ring_write(ring, VCE_CMD_FENCE);
        radeon_ring_write(ring, addr);
index d589475fe9e69bbc5cebbdde754f5bafdb5294aa..ac708e006180d3467cfe0478c2484eeb64a2df68 100644 (file)
@@ -39,30 +39,35 @@ MODULE_FIRMWARE("radeon/TAHITI_pfp.bin");
 MODULE_FIRMWARE("radeon/TAHITI_me.bin");
 MODULE_FIRMWARE("radeon/TAHITI_ce.bin");
 MODULE_FIRMWARE("radeon/TAHITI_mc.bin");
+MODULE_FIRMWARE("radeon/TAHITI_mc2.bin");
 MODULE_FIRMWARE("radeon/TAHITI_rlc.bin");
 MODULE_FIRMWARE("radeon/TAHITI_smc.bin");
 MODULE_FIRMWARE("radeon/PITCAIRN_pfp.bin");
 MODULE_FIRMWARE("radeon/PITCAIRN_me.bin");
 MODULE_FIRMWARE("radeon/PITCAIRN_ce.bin");
 MODULE_FIRMWARE("radeon/PITCAIRN_mc.bin");
+MODULE_FIRMWARE("radeon/PITCAIRN_mc2.bin");
 MODULE_FIRMWARE("radeon/PITCAIRN_rlc.bin");
 MODULE_FIRMWARE("radeon/PITCAIRN_smc.bin");
 MODULE_FIRMWARE("radeon/VERDE_pfp.bin");
 MODULE_FIRMWARE("radeon/VERDE_me.bin");
 MODULE_FIRMWARE("radeon/VERDE_ce.bin");
 MODULE_FIRMWARE("radeon/VERDE_mc.bin");
+MODULE_FIRMWARE("radeon/VERDE_mc2.bin");
 MODULE_FIRMWARE("radeon/VERDE_rlc.bin");
 MODULE_FIRMWARE("radeon/VERDE_smc.bin");
 MODULE_FIRMWARE("radeon/OLAND_pfp.bin");
 MODULE_FIRMWARE("radeon/OLAND_me.bin");
 MODULE_FIRMWARE("radeon/OLAND_ce.bin");
 MODULE_FIRMWARE("radeon/OLAND_mc.bin");
+MODULE_FIRMWARE("radeon/OLAND_mc2.bin");
 MODULE_FIRMWARE("radeon/OLAND_rlc.bin");
 MODULE_FIRMWARE("radeon/OLAND_smc.bin");
 MODULE_FIRMWARE("radeon/HAINAN_pfp.bin");
 MODULE_FIRMWARE("radeon/HAINAN_me.bin");
 MODULE_FIRMWARE("radeon/HAINAN_ce.bin");
 MODULE_FIRMWARE("radeon/HAINAN_mc.bin");
+MODULE_FIRMWARE("radeon/HAINAN_mc2.bin");
 MODULE_FIRMWARE("radeon/HAINAN_rlc.bin");
 MODULE_FIRMWARE("radeon/HAINAN_smc.bin");
 
@@ -1467,36 +1472,33 @@ int si_mc_load_microcode(struct radeon_device *rdev)
        const __be32 *fw_data;
        u32 running, blackout = 0;
        u32 *io_mc_regs;
-       int i, ucode_size, regs_size;
+       int i, regs_size, ucode_size;
 
        if (!rdev->mc_fw)
                return -EINVAL;
 
+       ucode_size = rdev->mc_fw->size / 4;
+
        switch (rdev->family) {
        case CHIP_TAHITI:
                io_mc_regs = (u32 *)&tahiti_io_mc_regs;
-               ucode_size = SI_MC_UCODE_SIZE;
                regs_size = TAHITI_IO_MC_REGS_SIZE;
                break;
        case CHIP_PITCAIRN:
                io_mc_regs = (u32 *)&pitcairn_io_mc_regs;
-               ucode_size = SI_MC_UCODE_SIZE;
                regs_size = TAHITI_IO_MC_REGS_SIZE;
                break;
        case CHIP_VERDE:
        default:
                io_mc_regs = (u32 *)&verde_io_mc_regs;
-               ucode_size = SI_MC_UCODE_SIZE;
                regs_size = TAHITI_IO_MC_REGS_SIZE;
                break;
        case CHIP_OLAND:
                io_mc_regs = (u32 *)&oland_io_mc_regs;
-               ucode_size = OLAND_MC_UCODE_SIZE;
                regs_size = TAHITI_IO_MC_REGS_SIZE;
                break;
        case CHIP_HAINAN:
                io_mc_regs = (u32 *)&hainan_io_mc_regs;
-               ucode_size = OLAND_MC_UCODE_SIZE;
                regs_size = TAHITI_IO_MC_REGS_SIZE;
                break;
        }
@@ -1552,7 +1554,7 @@ static int si_init_microcode(struct radeon_device *rdev)
        const char *chip_name;
        const char *rlc_chip_name;
        size_t pfp_req_size, me_req_size, ce_req_size, rlc_req_size, mc_req_size;
-       size_t smc_req_size;
+       size_t smc_req_size, mc2_req_size;
        char fw_name[30];
        int err;
 
@@ -1567,6 +1569,7 @@ static int si_init_microcode(struct radeon_device *rdev)
                ce_req_size = SI_CE_UCODE_SIZE * 4;
                rlc_req_size = SI_RLC_UCODE_SIZE * 4;
                mc_req_size = SI_MC_UCODE_SIZE * 4;
+               mc2_req_size = TAHITI_MC_UCODE_SIZE * 4;
                smc_req_size = ALIGN(TAHITI_SMC_UCODE_SIZE, 4);
                break;
        case CHIP_PITCAIRN:
@@ -1577,6 +1580,7 @@ static int si_init_microcode(struct radeon_device *rdev)
                ce_req_size = SI_CE_UCODE_SIZE * 4;
                rlc_req_size = SI_RLC_UCODE_SIZE * 4;
                mc_req_size = SI_MC_UCODE_SIZE * 4;
+               mc2_req_size = PITCAIRN_MC_UCODE_SIZE * 4;
                smc_req_size = ALIGN(PITCAIRN_SMC_UCODE_SIZE, 4);
                break;
        case CHIP_VERDE:
@@ -1587,6 +1591,7 @@ static int si_init_microcode(struct radeon_device *rdev)
                ce_req_size = SI_CE_UCODE_SIZE * 4;
                rlc_req_size = SI_RLC_UCODE_SIZE * 4;
                mc_req_size = SI_MC_UCODE_SIZE * 4;
+               mc2_req_size = VERDE_MC_UCODE_SIZE * 4;
                smc_req_size = ALIGN(VERDE_SMC_UCODE_SIZE, 4);
                break;
        case CHIP_OLAND:
@@ -1596,7 +1601,7 @@ static int si_init_microcode(struct radeon_device *rdev)
                me_req_size = SI_PM4_UCODE_SIZE * 4;
                ce_req_size = SI_CE_UCODE_SIZE * 4;
                rlc_req_size = SI_RLC_UCODE_SIZE * 4;
-               mc_req_size = OLAND_MC_UCODE_SIZE * 4;
+               mc_req_size = mc2_req_size = OLAND_MC_UCODE_SIZE * 4;
                smc_req_size = ALIGN(OLAND_SMC_UCODE_SIZE, 4);
                break;
        case CHIP_HAINAN:
@@ -1606,7 +1611,7 @@ static int si_init_microcode(struct radeon_device *rdev)
                me_req_size = SI_PM4_UCODE_SIZE * 4;
                ce_req_size = SI_CE_UCODE_SIZE * 4;
                rlc_req_size = SI_RLC_UCODE_SIZE * 4;
-               mc_req_size = OLAND_MC_UCODE_SIZE * 4;
+               mc_req_size = mc2_req_size = OLAND_MC_UCODE_SIZE * 4;
                smc_req_size = ALIGN(HAINAN_SMC_UCODE_SIZE, 4);
                break;
        default: BUG();
@@ -1659,16 +1664,22 @@ static int si_init_microcode(struct radeon_device *rdev)
                err = -EINVAL;
        }
 
-       snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc.bin", chip_name);
+       snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc2.bin", chip_name);
        err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev);
-       if (err)
-               goto out;
-       if (rdev->mc_fw->size != mc_req_size) {
+       if (err) {
+               snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc.bin", chip_name);
+               err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev);
+               if (err)
+                       goto out;
+       }
+       if ((rdev->mc_fw->size != mc_req_size) &&
+           (rdev->mc_fw->size != mc2_req_size)) {
                printk(KERN_ERR
                       "si_mc: Bogus length %zu in firmware \"%s\"\n",
                       rdev->mc_fw->size, fw_name);
                err = -EINVAL;
        }
+       DRM_INFO("%s: %zu bytes\n", fw_name, rdev->mc_fw->size);
 
        snprintf(fw_name, sizeof(fw_name), "radeon/%s_smc.bin", chip_name);
        err = request_firmware(&rdev->smc_fw, fw_name, rdev->dev);
index 36c717af6cf90830324a3538ac05dfd4306f3ccb..edb871d7d395cbb4af140120953b9e854d72aae7 100644 (file)
@@ -312,7 +312,7 @@ static void tegra_crtc_disable(struct drm_crtc *crtc)
        struct drm_device *drm = crtc->dev;
        struct drm_plane *plane;
 
-       list_for_each_entry(plane, &drm->mode_config.plane_list, head) {
+       drm_for_each_legacy_plane(plane, &drm->mode_config.plane_list) {
                if (plane->crtc == crtc) {
                        tegra_plane_disable(plane);
                        plane->crtc = NULL;
index d536ed381fbd9e305951d06529d61fbad83f2685..005c19bd92dfa0e5350303d84290b27b9aae144d 100644 (file)
@@ -99,55 +99,73 @@ static void tegra_dpaux_read_fifo(struct tegra_dpaux *dpaux, u8 *buffer,
 static ssize_t tegra_dpaux_transfer(struct drm_dp_aux *aux,
                                    struct drm_dp_aux_msg *msg)
 {
-       unsigned long value = DPAUX_DP_AUXCTL_TRANSACTREQ;
        unsigned long timeout = msecs_to_jiffies(250);
        struct tegra_dpaux *dpaux = to_dpaux(aux);
        unsigned long status;
        ssize_t ret = 0;
+       u32 value;
 
-       if (msg->size < 1 || msg->size > 16)
+       /* Tegra has 4x4 byte DP AUX transmit and receive FIFOs. */
+       if (msg->size > 16)
                return -EINVAL;
 
-       tegra_dpaux_writel(dpaux, msg->address, DPAUX_DP_AUXADDR);
+       /*
+        * Allow zero-sized messages only for I2C, in which case they specify
+        * address-only transactions.
+        */
+       if (msg->size < 1) {
+               switch (msg->request & ~DP_AUX_I2C_MOT) {
+               case DP_AUX_I2C_WRITE:
+               case DP_AUX_I2C_READ:
+                       value = DPAUX_DP_AUXCTL_CMD_ADDRESS_ONLY;
+                       break;
+
+               default:
+                       return -EINVAL;
+               }
+       } else {
+               /* For non-zero-sized messages, set the CMDLEN field. */
+               value = DPAUX_DP_AUXCTL_CMDLEN(msg->size - 1);
+       }
 
        switch (msg->request & ~DP_AUX_I2C_MOT) {
        case DP_AUX_I2C_WRITE:
                if (msg->request & DP_AUX_I2C_MOT)
-                       value = DPAUX_DP_AUXCTL_CMD_MOT_WR;
+                       value |= DPAUX_DP_AUXCTL_CMD_MOT_WR;
                else
-                       value = DPAUX_DP_AUXCTL_CMD_I2C_WR;
+                       value |= DPAUX_DP_AUXCTL_CMD_I2C_WR;
 
                break;
 
        case DP_AUX_I2C_READ:
                if (msg->request & DP_AUX_I2C_MOT)
-                       value = DPAUX_DP_AUXCTL_CMD_MOT_RD;
+                       value |= DPAUX_DP_AUXCTL_CMD_MOT_RD;
                else
-                       value = DPAUX_DP_AUXCTL_CMD_I2C_RD;
+                       value |= DPAUX_DP_AUXCTL_CMD_I2C_RD;
 
                break;
 
        case DP_AUX_I2C_STATUS:
                if (msg->request & DP_AUX_I2C_MOT)
-                       value = DPAUX_DP_AUXCTL_CMD_MOT_RQ;
+                       value |= DPAUX_DP_AUXCTL_CMD_MOT_RQ;
                else
-                       value = DPAUX_DP_AUXCTL_CMD_I2C_RQ;
+                       value |= DPAUX_DP_AUXCTL_CMD_I2C_RQ;
 
                break;
 
        case DP_AUX_NATIVE_WRITE:
-               value = DPAUX_DP_AUXCTL_CMD_AUX_WR;
+               value |= DPAUX_DP_AUXCTL_CMD_AUX_WR;
                break;
 
        case DP_AUX_NATIVE_READ:
-               value = DPAUX_DP_AUXCTL_CMD_AUX_RD;
+               value |= DPAUX_DP_AUXCTL_CMD_AUX_RD;
                break;
 
        default:
                return -EINVAL;
        }
 
-       value |= DPAUX_DP_AUXCTL_CMDLEN(msg->size - 1);
+       tegra_dpaux_writel(dpaux, msg->address, DPAUX_DP_AUXADDR);
        tegra_dpaux_writel(dpaux, value, DPAUX_DP_AUXCTL);
 
        if ((msg->request & DP_AUX_I2C_READ) == 0) {
@@ -198,7 +216,7 @@ static ssize_t tegra_dpaux_transfer(struct drm_dp_aux *aux,
                break;
        }
 
-       if (msg->reply == DP_AUX_NATIVE_REPLY_ACK) {
+       if ((msg->size > 0) && (msg->reply == DP_AUX_NATIVE_REPLY_ACK)) {
                if (msg->request & DP_AUX_I2C_READ) {
                        size_t count = value & DPAUX_DP_AUXSTAT_REPLY_MASK;
 
index 4f5bf10fdff91892b1241a4f5f3b3788cdd58554..806e245ca7874d3929e7f22227096d630d37cc13 100644 (file)
@@ -32,6 +32,7 @@
 #define DPAUX_DP_AUXCTL_CMD_I2C_RQ (2 << 12)
 #define DPAUX_DP_AUXCTL_CMD_I2C_RD (1 << 12)
 #define DPAUX_DP_AUXCTL_CMD_I2C_WR (0 << 12)
+#define DPAUX_DP_AUXCTL_CMD_ADDRESS_ONLY (1 << 8)
 #define DPAUX_DP_AUXCTL_CMDLEN(x) ((x) & 0xff)
 
 #define DPAUX_DP_AUXSTAT 0x31
index 931490b9cfed04b1365a87fb2d83c0526e114fdd..87df0b3674fda203c96baef3ff3030a87424a800 100644 (file)
@@ -1214,14 +1214,36 @@ static int vmw_cmd_dma(struct vmw_private *dev_priv,
                SVGA3dCmdSurfaceDMA dma;
        } *cmd;
        int ret;
+       SVGA3dCmdSurfaceDMASuffix *suffix;
+       uint32_t bo_size;
 
        cmd = container_of(header, struct vmw_dma_cmd, header);
+       suffix = (SVGA3dCmdSurfaceDMASuffix *)((unsigned long) &cmd->dma +
+                                              header->size - sizeof(*suffix));
+
+       /* Make sure device and verifier stays in sync. */
+       if (unlikely(suffix->suffixSize != sizeof(*suffix))) {
+               DRM_ERROR("Invalid DMA suffix size.\n");
+               return -EINVAL;
+       }
+
        ret = vmw_translate_guest_ptr(dev_priv, sw_context,
                                      &cmd->dma.guest.ptr,
                                      &vmw_bo);
        if (unlikely(ret != 0))
                return ret;
 
+       /* Make sure DMA doesn't cross BO boundaries. */
+       bo_size = vmw_bo->base.num_pages * PAGE_SIZE;
+       if (unlikely(cmd->dma.guest.ptr.offset > bo_size)) {
+               DRM_ERROR("Invalid DMA offset.\n");
+               return -EINVAL;
+       }
+
+       bo_size -= cmd->dma.guest.ptr.offset;
+       if (unlikely(suffix->maximumOffset > bo_size))
+               suffix->maximumOffset = bo_size;
+
        ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
                                user_surface_converter, &cmd->dma.host.sid,
                                NULL);
index db9017adfe2bb944f01558f49769f60715995c87..498b37e39058a6c212ff581e54c676465c826ec0 100644 (file)
@@ -47,7 +47,7 @@ static irqreturn_t syncpt_thresh_isr(int irq, void *dev_id)
        unsigned long reg;
        int i, id;
 
-       for (i = 0; i <= BIT_WORD(host->info->nb_pts); i++) {
+       for (i = 0; i < DIV_ROUND_UP(host->info->nb_pts, 32); i++) {
                reg = host1x_sync_readl(host,
                        HOST1X_SYNC_SYNCPT_THRESH_CPU0_INT_STATUS(i));
                for_each_set_bit(id, &reg, BITS_PER_LONG) {
@@ -64,7 +64,7 @@ static void _host1x_intr_disable_all_syncpt_intrs(struct host1x *host)
 {
        u32 i;
 
-       for (i = 0; i <= BIT_WORD(host->info->nb_pts); ++i) {
+       for (i = 0; i < DIV_ROUND_UP(host->info->nb_pts, 32); ++i) {
                host1x_sync_writel(host, 0xffffffffu,
                        HOST1X_SYNC_SYNCPT_THRESH_INT_DISABLE(i));
                host1x_sync_writel(host, 0xffffffffu,
index 9e8064205bc792630e6d1937ce97d9cf6a9bed3d..10a2c08664596a3c43d1687cab911ad3fc3ab970 100644 (file)
@@ -718,6 +718,9 @@ static int hid_scan_main(struct hid_parser *parser, struct hid_item *item)
        case HID_MAIN_ITEM_TAG_END_COLLECTION:
                break;
        case HID_MAIN_ITEM_TAG_INPUT:
+               /* ignore constant inputs, they will be ignored by hid-input */
+               if (data & HID_MAIN_ITEM_CONSTANT)
+                       break;
                for (i = 0; i < parser->local.usage_index; i++)
                        hid_scan_input_usage(parser, parser->local.usage[i]);
                break;
@@ -1821,8 +1824,6 @@ static const struct hid_device_id hid_have_special_driver[] = {
        { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_PRESENTER_8K_USB) },
        { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_DIGITAL_MEDIA_3K) },
        { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_WIRELESS_OPTICAL_DESKTOP_3_0) },
-       { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_2) },
-       { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TOUCH_COVER_2) },
        { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_OFFICE_KB) },
        { HID_USB_DEVICE(USB_VENDOR_ID_MONTEREY, USB_DEVICE_ID_GENIUS_KB29E) },
        { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN) },
index bd221263c739d61f8df1be33b0a0ea0181d76657..c8af7202c28da3027e73cfd0a9d8b95d6036dbe1 100644 (file)
 
 #define USB_VENDOR_ID_INTEL_0          0x8086
 #define USB_VENDOR_ID_INTEL_1          0x8087
-#define USB_DEVICE_ID_INTEL_HID_SENSOR 0x09fa
+#define USB_DEVICE_ID_INTEL_HID_SENSOR_0       0x09fa
+#define USB_DEVICE_ID_INTEL_HID_SENSOR_1       0x0a04
 
 #define USB_VENDOR_ID_STM_0             0x0483
 #define USB_DEVICE_ID_STM_HID_SENSOR    0x91d1
 #define USB_DEVICE_ID_MS_PRESENTER_8K_USB      0x0713
 #define USB_DEVICE_ID_MS_DIGITAL_MEDIA_3K      0x0730
 #define USB_DEVICE_ID_MS_COMFORT_MOUSE_4500    0x076c
-#define USB_DEVICE_ID_MS_TOUCH_COVER_2 0x07a7
-#define USB_DEVICE_ID_MS_TYPE_COVER_2  0x07a9
 
 #define USB_VENDOR_ID_MOJO             0x8282
 #define USB_DEVICE_ID_RETRO_ADAPTER    0x3201
index 6fd58175a291bb65fd15cf555a60d1773dd3ae58..8ba17a946f2a39daee5e37c66de90f896ce2db33 100644 (file)
@@ -274,10 +274,6 @@ static const struct hid_device_id ms_devices[] = {
                .driver_data = MS_NOGET },
        { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_COMFORT_MOUSE_4500),
                .driver_data = MS_DUPLICATE_USAGES },
-       { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_2),
-               .driver_data = 0 },
-       { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TOUCH_COVER_2),
-               .driver_data = 0 },
 
        { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_PRESENTER_8K_BT),
                .driver_data = MS_PRESENTER },
index 5182031f7b520052f6a8f51588faf3bc839353e0..af8244b1c1f428dab026544802ca951089a02fd1 100644 (file)
@@ -697,10 +697,13 @@ static void sensor_hub_remove(struct hid_device *hdev)
 
 static const struct hid_device_id sensor_hub_devices[] = {
        { HID_DEVICE(HID_BUS_ANY, HID_GROUP_SENSOR_HUB, USB_VENDOR_ID_INTEL_0,
-                       USB_DEVICE_ID_INTEL_HID_SENSOR),
+                       USB_DEVICE_ID_INTEL_HID_SENSOR_0),
                        .driver_data = HID_SENSOR_HUB_ENUM_QUIRK},
        { HID_DEVICE(HID_BUS_ANY, HID_GROUP_SENSOR_HUB, USB_VENDOR_ID_INTEL_1,
-                       USB_DEVICE_ID_INTEL_HID_SENSOR),
+                       USB_DEVICE_ID_INTEL_HID_SENSOR_0),
+                       .driver_data = HID_SENSOR_HUB_ENUM_QUIRK},
+       { HID_DEVICE(HID_BUS_ANY, HID_GROUP_SENSOR_HUB, USB_VENDOR_ID_INTEL_1,
+                       USB_DEVICE_ID_INTEL_HID_SENSOR_1),
                        .driver_data = HID_SENSOR_HUB_ENUM_QUIRK},
        { HID_DEVICE(HID_BUS_ANY, HID_GROUP_SENSOR_HUB, USB_VENDOR_ID_STM_0,
                        USB_DEVICE_ID_STM_HID_SENSOR),
index 69204afea7a48384d7bda840808b5c66b0988b60..908de278921944dfae837284f582e117617c479d 100644 (file)
@@ -1721,8 +1721,6 @@ static void sony_remove(struct hid_device *hdev)
        if (sc->quirks & SONY_LED_SUPPORT)
                sony_leds_remove(hdev);
 
-       if (sc->worker_initialized)
-               cancel_work_sync(&sc->state_worker);
        if (sc->quirks & SONY_BATTERY_SUPPORT) {
                hid_hw_close(hdev);
                sony_battery_remove(sc);
index f2d7bf90c9fe5b319d85bf1372a1c0cec36aa91c..2e7801af466e586fe34bd7c1400723540e0d2440 100644 (file)
@@ -55,6 +55,9 @@ static __u32 vmbus_get_next_version(__u32 current_version)
        case (VERSION_WIN8):
                return VERSION_WIN7;
 
+       case (VERSION_WIN8_1):
+               return VERSION_WIN8;
+
        case (VERSION_WS2008):
        default:
                return VERSION_INVAL;
@@ -77,7 +80,7 @@ static int vmbus_negotiate_version(struct vmbus_channel_msginfo *msginfo,
        msg->interrupt_page = virt_to_phys(vmbus_connection.int_page);
        msg->monitor_page1 = virt_to_phys(vmbus_connection.monitor_pages[0]);
        msg->monitor_page2 = virt_to_phys(vmbus_connection.monitor_pages[1]);
-       if (version == VERSION_WIN8)
+       if (version == VERSION_WIN8_1)
                msg->target_vcpu = hv_context.vp_index[smp_processor_id()];
 
        /*
index 6d02e3b063756f6225078df7e00f981478ef5f45..d76f0b70c6e09a0dd4bf52d77df7aa85651377c9 100644 (file)
@@ -365,12 +365,12 @@ static int get_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
                if (cpu_has_tjmax(c))
                        dev_warn(dev, "Unable to read TjMax from CPU %u\n", id);
        } else {
-               val = (eax >> 16) & 0x7f;
+               val = (eax >> 16) & 0xff;
                /*
                 * If the TjMax is not plausible, an assumption
                 * will be used
                 */
-               if (val >= 85) {
+               if (val) {
                        dev_dbg(dev, "TjMax is %d degrees C\n", val);
                        return val * 1000;
                }
index c104cc32989df7af8ce972b6a5803dfdf5dbaf61..c9cddf5f056bbd6fe014dbd6dfc8dc25eac949d6 100644 (file)
@@ -1,4 +1,4 @@
-/*
+    /*
  * Driver for Linear Technology LTC2945 I2C Power Monitor
  *
  * Copyright (c) 2014 Guenter Roeck
@@ -314,8 +314,8 @@ static ssize_t ltc2945_reset_history(struct device *dev,
                reg = LTC2945_MAX_ADIN_H;
                break;
        default:
-               BUG();
-               break;
+               WARN_ONCE(1, "Bad register: 0x%x\n", reg);
+               return -EINVAL;
        }
        /* Reset maximum */
        ret = regmap_bulk_write(regmap, reg, buf_max, num_regs);
index d867e6bb2be1f7e1b1ebb41788c27f568bd7c579..8242b75d96c87e9b69a079f00e871e70f1867c7f 100644 (file)
 struct vexpress_hwmon_data {
        struct device *hwmon_dev;
        struct vexpress_config_func *func;
+       const char *name;
 };
 
 static ssize_t vexpress_hwmon_name_show(struct device *dev,
                struct device_attribute *dev_attr, char *buffer)
 {
-       const char *compatible = of_get_property(dev->of_node, "compatible",
-                       NULL);
+       struct vexpress_hwmon_data *data = dev_get_drvdata(dev);
 
-       return sprintf(buffer, "%s\n", compatible);
+       return sprintf(buffer, "%s\n", data->name);
 }
 
 static ssize_t vexpress_hwmon_label_show(struct device *dev,
@@ -43,9 +43,6 @@ static ssize_t vexpress_hwmon_label_show(struct device *dev,
 {
        const char *label = of_get_property(dev->of_node, "label", NULL);
 
-       if (!label)
-               return -ENOENT;
-
        return snprintf(buffer, PAGE_SIZE, "%s\n", label);
 }
 
@@ -84,6 +81,20 @@ static ssize_t vexpress_hwmon_u64_show(struct device *dev,
                        to_sensor_dev_attr(dev_attr)->index));
 }
 
+static umode_t vexpress_hwmon_attr_is_visible(struct kobject *kobj,
+               struct attribute *attr, int index)
+{
+       struct device *dev = kobj_to_dev(kobj);
+       struct device_attribute *dev_attr = container_of(attr,
+                               struct device_attribute, attr);
+
+       if (dev_attr->show == vexpress_hwmon_label_show &&
+                       !of_get_property(dev->of_node, "label", NULL))
+               return 0;
+
+       return attr->mode;
+}
+
 static DEVICE_ATTR(name, S_IRUGO, vexpress_hwmon_name_show, NULL);
 
 #define VEXPRESS_HWMON_ATTRS(_name, _label_attr, _input_attr)  \
@@ -94,14 +105,27 @@ struct attribute *vexpress_hwmon_attrs_##_name[] = {               \
        NULL                                                    \
 }
 
+struct vexpress_hwmon_type {
+       const char *name;
+       const struct attribute_group **attr_groups;
+};
+
 #if !defined(CONFIG_REGULATOR_VEXPRESS)
 static DEVICE_ATTR(in1_label, S_IRUGO, vexpress_hwmon_label_show, NULL);
 static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, vexpress_hwmon_u32_show,
                NULL, 1000);
 static VEXPRESS_HWMON_ATTRS(volt, in1_label, in1_input);
 static struct attribute_group vexpress_hwmon_group_volt = {
+       .is_visible = vexpress_hwmon_attr_is_visible,
        .attrs = vexpress_hwmon_attrs_volt,
 };
+static struct vexpress_hwmon_type vexpress_hwmon_volt = {
+       .name = "vexpress_volt",
+       .attr_groups = (const struct attribute_group *[]) {
+               &vexpress_hwmon_group_volt,
+               NULL,
+       },
+};
 #endif
 
 static DEVICE_ATTR(curr1_label, S_IRUGO, vexpress_hwmon_label_show, NULL);
@@ -109,52 +133,84 @@ static SENSOR_DEVICE_ATTR(curr1_input, S_IRUGO, vexpress_hwmon_u32_show,
                NULL, 1000);
 static VEXPRESS_HWMON_ATTRS(amp, curr1_label, curr1_input);
 static struct attribute_group vexpress_hwmon_group_amp = {
+       .is_visible = vexpress_hwmon_attr_is_visible,
        .attrs = vexpress_hwmon_attrs_amp,
 };
+static struct vexpress_hwmon_type vexpress_hwmon_amp = {
+       .name = "vexpress_amp",
+       .attr_groups = (const struct attribute_group *[]) {
+               &vexpress_hwmon_group_amp,
+               NULL
+       },
+};
 
 static DEVICE_ATTR(temp1_label, S_IRUGO, vexpress_hwmon_label_show, NULL);
 static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, vexpress_hwmon_u32_show,
                NULL, 1000);
 static VEXPRESS_HWMON_ATTRS(temp, temp1_label, temp1_input);
 static struct attribute_group vexpress_hwmon_group_temp = {
+       .is_visible = vexpress_hwmon_attr_is_visible,
        .attrs = vexpress_hwmon_attrs_temp,
 };
+static struct vexpress_hwmon_type vexpress_hwmon_temp = {
+       .name = "vexpress_temp",
+       .attr_groups = (const struct attribute_group *[]) {
+               &vexpress_hwmon_group_temp,
+               NULL
+       },
+};
 
 static DEVICE_ATTR(power1_label, S_IRUGO, vexpress_hwmon_label_show, NULL);
 static SENSOR_DEVICE_ATTR(power1_input, S_IRUGO, vexpress_hwmon_u32_show,
                NULL, 1);
 static VEXPRESS_HWMON_ATTRS(power, power1_label, power1_input);
 static struct attribute_group vexpress_hwmon_group_power = {
+       .is_visible = vexpress_hwmon_attr_is_visible,
        .attrs = vexpress_hwmon_attrs_power,
 };
+static struct vexpress_hwmon_type vexpress_hwmon_power = {
+       .name = "vexpress_power",
+       .attr_groups = (const struct attribute_group *[]) {
+               &vexpress_hwmon_group_power,
+               NULL
+       },
+};
 
 static DEVICE_ATTR(energy1_label, S_IRUGO, vexpress_hwmon_label_show, NULL);
 static SENSOR_DEVICE_ATTR(energy1_input, S_IRUGO, vexpress_hwmon_u64_show,
                NULL, 1);
 static VEXPRESS_HWMON_ATTRS(energy, energy1_label, energy1_input);
 static struct attribute_group vexpress_hwmon_group_energy = {
+       .is_visible = vexpress_hwmon_attr_is_visible,
        .attrs = vexpress_hwmon_attrs_energy,
 };
+static struct vexpress_hwmon_type vexpress_hwmon_energy = {
+       .name = "vexpress_energy",
+       .attr_groups = (const struct attribute_group *[]) {
+               &vexpress_hwmon_group_energy,
+               NULL
+       },
+};
 
 static struct of_device_id vexpress_hwmon_of_match[] = {
 #if !defined(CONFIG_REGULATOR_VEXPRESS)
        {
                .compatible = "arm,vexpress-volt",
-               .data = &vexpress_hwmon_group_volt,
+               .data = &vexpress_hwmon_volt,
        },
 #endif
        {
                .compatible = "arm,vexpress-amp",
-               .data = &vexpress_hwmon_group_amp,
+               .data = &vexpress_hwmon_amp,
        }, {
                .compatible = "arm,vexpress-temp",
-               .data = &vexpress_hwmon_group_temp,
+               .data = &vexpress_hwmon_temp,
        }, {
                .compatible = "arm,vexpress-power",
-               .data = &vexpress_hwmon_group_power,
+               .data = &vexpress_hwmon_power,
        }, {
                .compatible = "arm,vexpress-energy",
-               .data = &vexpress_hwmon_group_energy,
+               .data = &vexpress_hwmon_energy,
        },
        {}
 };
@@ -165,6 +221,7 @@ static int vexpress_hwmon_probe(struct platform_device *pdev)
        int err;
        const struct of_device_id *match;
        struct vexpress_hwmon_data *data;
+       const struct vexpress_hwmon_type *type;
 
        data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
        if (!data)
@@ -174,12 +231,14 @@ static int vexpress_hwmon_probe(struct platform_device *pdev)
        match = of_match_device(vexpress_hwmon_of_match, &pdev->dev);
        if (!match)
                return -ENODEV;
+       type = match->data;
+       data->name = type->name;
 
        data->func = vexpress_config_func_get_by_dev(&pdev->dev);
        if (!data->func)
                return -ENODEV;
 
-       err = sysfs_create_group(&pdev->dev.kobj, match->data);
+       err = sysfs_create_groups(&pdev->dev.kobj, type->attr_groups);
        if (err)
                goto error;
 
index a43220c2e3d943a3437e29df1352aca30593e4cf..4d140bbbe1006c172cecd2fd5313778e8eb5db17 100644 (file)
@@ -750,9 +750,10 @@ void intel_idle_state_table_update(void)
                        if (package_num + 1 > num_sockets) {
                                num_sockets = package_num + 1;
 
-                               if (num_sockets > 4)
+                               if (num_sockets > 4) {
                                        cpuidle_state_table = ivt_cstates_8s;
                                        return;
+                               }
                        }
                }
 
index 5b1aa027c034b09c1569047231716ea66f75f919..3b5bacd4d8da5dbe41be266ef8e432543ecdfb39 100644 (file)
 #include <linux/iio/trigger_consumer.h>
 #include <linux/iio/triggered_buffer.h>
 
-#include <mach/at91_adc.h>
+/* Registers */
+#define AT91_ADC_CR            0x00            /* Control Register */
+#define                AT91_ADC_SWRST          (1 << 0)        /* Software Reset */
+#define                AT91_ADC_START          (1 << 1)        /* Start Conversion */
+
+#define AT91_ADC_MR            0x04            /* Mode Register */
+#define                AT91_ADC_TSAMOD         (3 << 0)        /* ADC mode */
+#define                AT91_ADC_TSAMOD_ADC_ONLY_MODE           (0 << 0)        /* ADC Mode */
+#define                AT91_ADC_TSAMOD_TS_ONLY_MODE            (1 << 0)        /* Touch Screen Only Mode */
+#define                AT91_ADC_TRGEN          (1 << 0)        /* Trigger Enable */
+#define                AT91_ADC_TRGSEL         (7 << 1)        /* Trigger Selection */
+#define                        AT91_ADC_TRGSEL_TC0             (0 << 1)
+#define                        AT91_ADC_TRGSEL_TC1             (1 << 1)
+#define                        AT91_ADC_TRGSEL_TC2             (2 << 1)
+#define                        AT91_ADC_TRGSEL_EXTERNAL        (6 << 1)
+#define                AT91_ADC_LOWRES         (1 << 4)        /* Low Resolution */
+#define                AT91_ADC_SLEEP          (1 << 5)        /* Sleep Mode */
+#define                AT91_ADC_PENDET         (1 << 6)        /* Pen contact detection enable */
+#define                AT91_ADC_PRESCAL_9260   (0x3f << 8)     /* Prescalar Rate Selection */
+#define                AT91_ADC_PRESCAL_9G45   (0xff << 8)
+#define                        AT91_ADC_PRESCAL_(x)    ((x) << 8)
+#define                AT91_ADC_STARTUP_9260   (0x1f << 16)    /* Startup Up Time */
+#define                AT91_ADC_STARTUP_9G45   (0x7f << 16)
+#define                AT91_ADC_STARTUP_9X5    (0xf << 16)
+#define                        AT91_ADC_STARTUP_(x)    ((x) << 16)
+#define                AT91_ADC_SHTIM          (0xf  << 24)    /* Sample & Hold Time */
+#define                        AT91_ADC_SHTIM_(x)      ((x) << 24)
+#define                AT91_ADC_PENDBC         (0x0f << 28)    /* Pen Debounce time */
+#define                        AT91_ADC_PENDBC_(x)     ((x) << 28)
+
+#define AT91_ADC_TSR           0x0C
+#define                AT91_ADC_TSR_SHTIM      (0xf  << 24)    /* Sample & Hold Time */
+#define                        AT91_ADC_TSR_SHTIM_(x)  ((x) << 24)
+
+#define AT91_ADC_CHER          0x10            /* Channel Enable Register */
+#define AT91_ADC_CHDR          0x14            /* Channel Disable Register */
+#define AT91_ADC_CHSR          0x18            /* Channel Status Register */
+#define                AT91_ADC_CH(n)          (1 << (n))      /* Channel Number */
+
+#define AT91_ADC_SR            0x1C            /* Status Register */
+#define                AT91_ADC_EOC(n)         (1 << (n))      /* End of Conversion on Channel N */
+#define                AT91_ADC_OVRE(n)        (1 << ((n) + 8))/* Overrun Error on Channel N */
+#define                AT91_ADC_DRDY           (1 << 16)       /* Data Ready */
+#define                AT91_ADC_GOVRE          (1 << 17)       /* General Overrun Error */
+#define                AT91_ADC_ENDRX          (1 << 18)       /* End of RX Buffer */
+#define                AT91_ADC_RXFUFF         (1 << 19)       /* RX Buffer Full */
+
+#define AT91_ADC_SR_9X5                0x30            /* Status Register for 9x5 */
+#define                AT91_ADC_SR_DRDY_9X5    (1 << 24)       /* Data Ready */
+
+#define AT91_ADC_LCDR          0x20            /* Last Converted Data Register */
+#define                AT91_ADC_LDATA          (0x3ff)
+
+#define AT91_ADC_IER           0x24            /* Interrupt Enable Register */
+#define AT91_ADC_IDR           0x28            /* Interrupt Disable Register */
+#define AT91_ADC_IMR           0x2C            /* Interrupt Mask Register */
+#define                AT91RL_ADC_IER_PEN      (1 << 20)
+#define                AT91RL_ADC_IER_NOPEN    (1 << 21)
+#define                AT91_ADC_IER_PEN        (1 << 29)
+#define                AT91_ADC_IER_NOPEN      (1 << 30)
+#define                AT91_ADC_IER_XRDY       (1 << 20)
+#define                AT91_ADC_IER_YRDY       (1 << 21)
+#define                AT91_ADC_IER_PRDY       (1 << 22)
+#define                AT91_ADC_ISR_PENS       (1 << 31)
+
+#define AT91_ADC_CHR(n)                (0x30 + ((n) * 4))      /* Channel Data Register N */
+#define                AT91_ADC_DATA           (0x3ff)
+
+#define AT91_ADC_CDR0_9X5      (0x50)                  /* Channel Data Register 0 for 9X5 */
+
+#define AT91_ADC_ACR           0x94    /* Analog Control Register */
+#define                AT91_ADC_ACR_PENDETSENS (0x3 << 0)      /* pull-up resistor */
+
+#define AT91_ADC_TSMR          0xB0
+#define                AT91_ADC_TSMR_TSMODE    (3 << 0)        /* Touch Screen Mode */
+#define                        AT91_ADC_TSMR_TSMODE_NONE               (0 << 0)
+#define                        AT91_ADC_TSMR_TSMODE_4WIRE_NO_PRESS     (1 << 0)
+#define                        AT91_ADC_TSMR_TSMODE_4WIRE_PRESS        (2 << 0)
+#define                        AT91_ADC_TSMR_TSMODE_5WIRE              (3 << 0)
+#define                AT91_ADC_TSMR_TSAV      (3 << 4)        /* Averages samples */
+#define                        AT91_ADC_TSMR_TSAV_(x)          ((x) << 4)
+#define                AT91_ADC_TSMR_SCTIM     (0x0f << 16)    /* Switch closure time */
+#define                AT91_ADC_TSMR_PENDBC    (0x0f << 28)    /* Pen Debounce time */
+#define                        AT91_ADC_TSMR_PENDBC_(x)        ((x) << 28)
+#define                AT91_ADC_TSMR_NOTSDMA   (1 << 22)       /* No Touchscreen DMA */
+#define                AT91_ADC_TSMR_PENDET_DIS        (0 << 24)       /* Pen contact detection disable */
+#define                AT91_ADC_TSMR_PENDET_ENA        (1 << 24)       /* Pen contact detection enable */
+
+#define AT91_ADC_TSXPOSR       0xB4
+#define AT91_ADC_TSYPOSR       0xB8
+#define AT91_ADC_TSPRESSR      0xBC
+
+#define AT91_ADC_TRGR_9260     AT91_ADC_MR
+#define AT91_ADC_TRGR_9G45     0x08
+#define AT91_ADC_TRGR_9X5      0xC0
+
+/* Trigger Register bit field */
+#define                AT91_ADC_TRGR_TRGPER    (0xffff << 16)
+#define                        AT91_ADC_TRGR_TRGPER_(x)        ((x) << 16)
+#define                AT91_ADC_TRGR_TRGMOD    (0x7 << 0)
+#define                        AT91_ADC_TRGR_NONE              (0 << 0)
+#define                        AT91_ADC_TRGR_MOD_PERIOD_TRIG   (5 << 0)
 
 #define AT91_ADC_CHAN(st, ch) \
        (st->registers->channel_base + (ch * 4))
 #define TOUCH_SAMPLE_PERIOD_US         2000    /* 2ms */
 #define TOUCH_PEN_DETECT_DEBOUNCE_US   200
 
+#define MAX_RLPOS_BITS         10
+#define TOUCH_SAMPLE_PERIOD_US_RL      10000   /* 10ms, the SoC can't keep up with 2ms */
+#define TOUCH_SHTIM                    0xa
+
+/**
+ * struct at91_adc_reg_desc - Various informations relative to registers
+ * @channel_base:      Base offset for the channel data registers
+ * @drdy_mask:         Mask of the DRDY field in the relevant registers
+                       (Interruptions registers mostly)
+ * @status_register:   Offset of the Interrupt Status Register
+ * @trigger_register:  Offset of the Trigger setup register
+ * @mr_prescal_mask:   Mask of the PRESCAL field in the adc MR register
+ * @mr_startup_mask:   Mask of the STARTUP field in the adc MR register
+ */
+struct at91_adc_reg_desc {
+       u8      channel_base;
+       u32     drdy_mask;
+       u8      status_register;
+       u8      trigger_register;
+       u32     mr_prescal_mask;
+       u32     mr_startup_mask;
+};
+
 struct at91_adc_caps {
        bool    has_ts;         /* Support touch screen */
        bool    has_tsmr;       /* only at91sam9x5, sama5d3 have TSMR reg */
@@ -64,12 +188,6 @@ struct at91_adc_caps {
        struct at91_adc_reg_desc registers;
 };
 
-enum atmel_adc_ts_type {
-       ATMEL_ADC_TOUCHSCREEN_NONE = 0,
-       ATMEL_ADC_TOUCHSCREEN_4WIRE = 4,
-       ATMEL_ADC_TOUCHSCREEN_5WIRE = 5,
-};
-
 struct at91_adc_state {
        struct clk              *adc_clk;
        u16                     *buffer;
@@ -114,6 +232,11 @@ struct at91_adc_state {
 
        u16                     ts_sample_period_val;
        u32                     ts_pressure_threshold;
+       u16                     ts_pendbc;
+
+       bool                    ts_bufferedmeasure;
+       u32                     ts_prev_absx;
+       u32                     ts_prev_absy;
 };
 
 static irqreturn_t at91_adc_trigger_handler(int irq, void *p)
@@ -220,7 +343,72 @@ static int at91_ts_sample(struct at91_adc_state *st)
        return 0;
 }
 
-static irqreturn_t at91_adc_interrupt(int irq, void *private)
+static irqreturn_t at91_adc_rl_interrupt(int irq, void *private)
+{
+       struct iio_dev *idev = private;
+       struct at91_adc_state *st = iio_priv(idev);
+       u32 status = at91_adc_readl(st, st->registers->status_register);
+       unsigned int reg;
+
+       status &= at91_adc_readl(st, AT91_ADC_IMR);
+       if (status & st->registers->drdy_mask)
+               handle_adc_eoc_trigger(irq, idev);
+
+       if (status & AT91RL_ADC_IER_PEN) {
+               /* Disabling pen debounce is required to get a NOPEN irq */
+               reg = at91_adc_readl(st, AT91_ADC_MR);
+               reg &= ~AT91_ADC_PENDBC;
+               at91_adc_writel(st, AT91_ADC_MR, reg);
+
+               at91_adc_writel(st, AT91_ADC_IDR, AT91RL_ADC_IER_PEN);
+               at91_adc_writel(st, AT91_ADC_IER, AT91RL_ADC_IER_NOPEN
+                               | AT91_ADC_EOC(3));
+               /* Set up period trigger for sampling */
+               at91_adc_writel(st, st->registers->trigger_register,
+                       AT91_ADC_TRGR_MOD_PERIOD_TRIG |
+                       AT91_ADC_TRGR_TRGPER_(st->ts_sample_period_val));
+       } else if (status & AT91RL_ADC_IER_NOPEN) {
+               reg = at91_adc_readl(st, AT91_ADC_MR);
+               reg |= AT91_ADC_PENDBC_(st->ts_pendbc) & AT91_ADC_PENDBC;
+               at91_adc_writel(st, AT91_ADC_MR, reg);
+               at91_adc_writel(st, st->registers->trigger_register,
+                       AT91_ADC_TRGR_NONE);
+
+               at91_adc_writel(st, AT91_ADC_IDR, AT91RL_ADC_IER_NOPEN
+                               | AT91_ADC_EOC(3));
+               at91_adc_writel(st, AT91_ADC_IER, AT91RL_ADC_IER_PEN);
+               st->ts_bufferedmeasure = false;
+               input_report_key(st->ts_input, BTN_TOUCH, 0);
+               input_sync(st->ts_input);
+       } else if (status & AT91_ADC_EOC(3)) {
+               /* Conversion finished */
+               if (st->ts_bufferedmeasure) {
+                       /*
+                        * Last measurement is always discarded, since it can
+                        * be erroneous.
+                        * Always report previous measurement
+                        */
+                       input_report_abs(st->ts_input, ABS_X, st->ts_prev_absx);
+                       input_report_abs(st->ts_input, ABS_Y, st->ts_prev_absy);
+                       input_report_key(st->ts_input, BTN_TOUCH, 1);
+                       input_sync(st->ts_input);
+               } else
+                       st->ts_bufferedmeasure = true;
+
+               /* Now make new measurement */
+               st->ts_prev_absx = at91_adc_readl(st, AT91_ADC_CHAN(st, 3))
+                                  << MAX_RLPOS_BITS;
+               st->ts_prev_absx /= at91_adc_readl(st, AT91_ADC_CHAN(st, 2));
+
+               st->ts_prev_absy = at91_adc_readl(st, AT91_ADC_CHAN(st, 1))
+                                  << MAX_RLPOS_BITS;
+               st->ts_prev_absy /= at91_adc_readl(st, AT91_ADC_CHAN(st, 0));
+       }
+
+       return IRQ_HANDLED;
+}
+
+static irqreturn_t at91_adc_9x5_interrupt(int irq, void *private)
 {
        struct iio_dev *idev = private;
        struct at91_adc_state *st = iio_priv(idev);
@@ -653,6 +841,8 @@ static int at91_adc_probe_dt_ts(struct device_node *node,
                return -EINVAL;
        }
 
+       if (!st->caps->has_tsmr)
+               return 0;
        prop = 0;
        of_property_read_u32(node, "atmel,adc-ts-pressure-threshold", &prop);
        st->ts_pressure_threshold = prop;
@@ -765,14 +955,18 @@ static int at91_adc_probe_pdata(struct at91_adc_state *st,
        if (!pdata)
                return -EINVAL;
 
+       st->caps = (struct at91_adc_caps *)
+                       platform_get_device_id(pdev)->driver_data;
+
        st->use_external = pdata->use_external_triggers;
        st->vref_mv = pdata->vref;
        st->channels_mask = pdata->channels_used;
-       st->num_channels = pdata->num_channels;
+       st->num_channels = st->caps->num_channels;
        st->startup_time = pdata->startup_time;
        st->trigger_number = pdata->trigger_number;
        st->trigger_list = pdata->trigger_list;
-       st->registers = pdata->registers;
+       st->registers = &st->caps->registers;
+       st->touchscreen_type = pdata->touchscreen_type;
 
        return 0;
 }
@@ -787,7 +981,10 @@ static int atmel_ts_open(struct input_dev *dev)
 {
        struct at91_adc_state *st = input_get_drvdata(dev);
 
-       at91_adc_writel(st, AT91_ADC_IER, AT91_ADC_IER_PEN);
+       if (st->caps->has_tsmr)
+               at91_adc_writel(st, AT91_ADC_IER, AT91_ADC_IER_PEN);
+       else
+               at91_adc_writel(st, AT91_ADC_IER, AT91RL_ADC_IER_PEN);
        return 0;
 }
 
@@ -795,45 +992,61 @@ static void atmel_ts_close(struct input_dev *dev)
 {
        struct at91_adc_state *st = input_get_drvdata(dev);
 
-       at91_adc_writel(st, AT91_ADC_IDR, AT91_ADC_IER_PEN);
+       if (st->caps->has_tsmr)
+               at91_adc_writel(st, AT91_ADC_IDR, AT91_ADC_IER_PEN);
+       else
+               at91_adc_writel(st, AT91_ADC_IDR, AT91RL_ADC_IER_PEN);
 }
 
 static int at91_ts_hw_init(struct at91_adc_state *st, u32 adc_clk_khz)
 {
-       u32 reg = 0, pendbc;
+       u32 reg = 0;
        int i = 0;
 
-       if (st->touchscreen_type == ATMEL_ADC_TOUCHSCREEN_4WIRE)
-               reg = AT91_ADC_TSMR_TSMODE_4WIRE_PRESS;
-       else
-               reg = AT91_ADC_TSMR_TSMODE_5WIRE;
-
        /* a Pen Detect Debounce Time is necessary for the ADC Touch to avoid
         * pen detect noise.
         * The formula is : Pen Detect Debounce Time = (2 ^ pendbc) / ADCClock
         */
-       pendbc = round_up(TOUCH_PEN_DETECT_DEBOUNCE_US * adc_clk_khz / 1000, 1);
+       st->ts_pendbc = round_up(TOUCH_PEN_DETECT_DEBOUNCE_US * adc_clk_khz /
+                                1000, 1);
 
-       while (pendbc >> ++i)
+       while (st->ts_pendbc >> ++i)
                ;       /* Empty! Find the shift offset */
-       if (abs(pendbc - (1 << i)) < abs(pendbc - (1 << (i - 1))))
-               pendbc = i;
+       if (abs(st->ts_pendbc - (1 << i)) < abs(st->ts_pendbc - (1 << (i - 1))))
+               st->ts_pendbc = i;
        else
-               pendbc = i - 1;
+               st->ts_pendbc = i - 1;
 
-       if (st->caps->has_tsmr) {
-               reg |= AT91_ADC_TSMR_TSAV_(st->caps->ts_filter_average)
-                               & AT91_ADC_TSMR_TSAV;
-               reg |= AT91_ADC_TSMR_PENDBC_(pendbc) & AT91_ADC_TSMR_PENDBC;
-               reg |= AT91_ADC_TSMR_NOTSDMA;
-               reg |= AT91_ADC_TSMR_PENDET_ENA;
-               reg |= 0x03 << 8;       /* TSFREQ, need bigger than TSAV */
-
-               at91_adc_writel(st, AT91_ADC_TSMR, reg);
-       } else {
-               /* TODO: for 9g45 which has no TSMR */
+       if (!st->caps->has_tsmr) {
+               reg = at91_adc_readl(st, AT91_ADC_MR);
+               reg |= AT91_ADC_TSAMOD_TS_ONLY_MODE | AT91_ADC_PENDET;
+
+               reg |= AT91_ADC_PENDBC_(st->ts_pendbc) & AT91_ADC_PENDBC;
+               at91_adc_writel(st, AT91_ADC_MR, reg);
+
+               reg = AT91_ADC_TSR_SHTIM_(TOUCH_SHTIM) & AT91_ADC_TSR_SHTIM;
+               at91_adc_writel(st, AT91_ADC_TSR, reg);
+
+               st->ts_sample_period_val = round_up((TOUCH_SAMPLE_PERIOD_US_RL *
+                                                   adc_clk_khz / 1000) - 1, 1);
+
+               return 0;
        }
 
+       if (st->touchscreen_type == ATMEL_ADC_TOUCHSCREEN_4WIRE)
+               reg = AT91_ADC_TSMR_TSMODE_4WIRE_PRESS;
+       else
+               reg = AT91_ADC_TSMR_TSMODE_5WIRE;
+
+       reg |= AT91_ADC_TSMR_TSAV_(st->caps->ts_filter_average)
+              & AT91_ADC_TSMR_TSAV;
+       reg |= AT91_ADC_TSMR_PENDBC_(st->ts_pendbc) & AT91_ADC_TSMR_PENDBC;
+       reg |= AT91_ADC_TSMR_NOTSDMA;
+       reg |= AT91_ADC_TSMR_PENDET_ENA;
+       reg |= 0x03 << 8;       /* TSFREQ, needs to be bigger than TSAV */
+
+       at91_adc_writel(st, AT91_ADC_TSMR, reg);
+
        /* Change adc internal resistor value for better pen detection,
         * default value is 100 kOhm.
         * 0 = 200 kOhm, 1 = 150 kOhm, 2 = 100 kOhm, 3 = 50 kOhm
@@ -842,7 +1055,7 @@ static int at91_ts_hw_init(struct at91_adc_state *st, u32 adc_clk_khz)
        at91_adc_writel(st, AT91_ADC_ACR, st->caps->ts_pen_detect_sensitivity
                        & AT91_ADC_ACR_PENDETSENS);
 
-       /* Sample Peroid Time = (TRGPER + 1) / ADCClock */
+       /* Sample Period Time = (TRGPER + 1) / ADCClock */
        st->ts_sample_period_val = round_up((TOUCH_SAMPLE_PERIOD_US *
                        adc_clk_khz / 1000) - 1, 1);
 
@@ -871,17 +1084,37 @@ static int at91_ts_register(struct at91_adc_state *st,
        __set_bit(EV_ABS, input->evbit);
        __set_bit(EV_KEY, input->evbit);
        __set_bit(BTN_TOUCH, input->keybit);
-       input_set_abs_params(input, ABS_X, 0, (1 << MAX_POS_BITS) - 1, 0, 0);
-       input_set_abs_params(input, ABS_Y, 0, (1 << MAX_POS_BITS) - 1, 0, 0);
-       input_set_abs_params(input, ABS_PRESSURE, 0, 0xffffff, 0, 0);
+       if (st->caps->has_tsmr) {
+               input_set_abs_params(input, ABS_X, 0, (1 << MAX_POS_BITS) - 1,
+                                    0, 0);
+               input_set_abs_params(input, ABS_Y, 0, (1 << MAX_POS_BITS) - 1,
+                                    0, 0);
+               input_set_abs_params(input, ABS_PRESSURE, 0, 0xffffff, 0, 0);
+       } else {
+               if (st->touchscreen_type != ATMEL_ADC_TOUCHSCREEN_4WIRE) {
+                       dev_err(&pdev->dev,
+                               "This touchscreen controller only support 4 wires\n");
+                       ret = -EINVAL;
+                       goto err;
+               }
+
+               input_set_abs_params(input, ABS_X, 0, (1 << MAX_RLPOS_BITS) - 1,
+                                    0, 0);
+               input_set_abs_params(input, ABS_Y, 0, (1 << MAX_RLPOS_BITS) - 1,
+                                    0, 0);
+       }
 
        st->ts_input = input;
        input_set_drvdata(input, st);
 
        ret = input_register_device(input);
        if (ret)
-               input_free_device(st->ts_input);
+               goto err;
+
+       return ret;
 
+err:
+       input_free_device(st->ts_input);
        return ret;
 }
 
@@ -940,11 +1173,13 @@ static int at91_adc_probe(struct platform_device *pdev)
         */
        at91_adc_writel(st, AT91_ADC_CR, AT91_ADC_SWRST);
        at91_adc_writel(st, AT91_ADC_IDR, 0xFFFFFFFF);
-       ret = request_irq(st->irq,
-                         at91_adc_interrupt,
-                         0,
-                         pdev->dev.driver->name,
-                         idev);
+
+       if (st->caps->has_tsmr)
+               ret = request_irq(st->irq, at91_adc_9x5_interrupt, 0,
+                                 pdev->dev.driver->name, idev);
+       else
+               ret = request_irq(st->irq, at91_adc_rl_interrupt, 0,
+                                 pdev->dev.driver->name, idev);
        if (ret) {
                dev_err(&pdev->dev, "Failed to allocate IRQ.\n");
                return ret;
@@ -1004,8 +1239,11 @@ static int at91_adc_probe(struct platform_device *pdev)
         * the best converted final value between two channels selection
         * The formula thus is : Sample and Hold Time = (shtim + 1) / ADCClock
         */
-       shtim = round_up((st->sample_hold_time * adc_clk_khz /
-                         1000) - 1, 1);
+       if (st->sample_hold_time > 0)
+               shtim = round_up((st->sample_hold_time * adc_clk_khz / 1000)
+                                - 1, 1);
+       else
+               shtim = 0;
 
        reg = AT91_ADC_PRESCAL_(prsc) & st->registers->mr_prescal_mask;
        reg |= AT91_ADC_STARTUP_(ticks) & st->registers->mr_startup_mask;
@@ -1045,12 +1283,6 @@ static int at91_adc_probe(struct platform_device *pdev)
                        goto error_disable_adc_clk;
                }
        } else {
-               if (!st->caps->has_tsmr) {
-                       dev_err(&pdev->dev, "We don't support non-TSMR adc\n");
-                       ret = -ENODEV;
-                       goto error_disable_adc_clk;
-               }
-
                ret = at91_ts_register(st, pdev);
                if (ret)
                        goto error_disable_adc_clk;
@@ -1101,7 +1333,6 @@ static int at91_adc_remove(struct platform_device *pdev)
        return 0;
 }
 
-#ifdef CONFIG_OF
 static struct at91_adc_caps at91sam9260_caps = {
        .calc_startup_ticks = calc_startup_ticks_9260,
        .num_channels = 4,
@@ -1115,6 +1346,20 @@ static struct at91_adc_caps at91sam9260_caps = {
        },
 };
 
+static struct at91_adc_caps at91sam9rl_caps = {
+       .has_ts = true,
+       .calc_startup_ticks = calc_startup_ticks_9260,  /* same as 9260 */
+       .num_channels = 6,
+       .registers = {
+               .channel_base = AT91_ADC_CHR(0),
+               .drdy_mask = AT91_ADC_DRDY,
+               .status_register = AT91_ADC_SR,
+               .trigger_register = AT91_ADC_TRGR_9G45,
+               .mr_prescal_mask = AT91_ADC_PRESCAL_9260,
+               .mr_startup_mask = AT91_ADC_STARTUP_9G45,
+       },
+};
+
 static struct at91_adc_caps at91sam9g45_caps = {
        .has_ts = true,
        .calc_startup_ticks = calc_startup_ticks_9260,  /* same as 9260 */
@@ -1149,16 +1394,36 @@ static struct at91_adc_caps at91sam9x5_caps = {
 
 static const struct of_device_id at91_adc_dt_ids[] = {
        { .compatible = "atmel,at91sam9260-adc", .data = &at91sam9260_caps },
+       { .compatible = "atmel,at91sam9rl-adc", .data = &at91sam9rl_caps },
        { .compatible = "atmel,at91sam9g45-adc", .data = &at91sam9g45_caps },
        { .compatible = "atmel,at91sam9x5-adc", .data = &at91sam9x5_caps },
        {},
 };
 MODULE_DEVICE_TABLE(of, at91_adc_dt_ids);
-#endif
+
+static const struct platform_device_id at91_adc_ids[] = {
+       {
+               .name = "at91sam9260-adc",
+               .driver_data = (unsigned long)&at91sam9260_caps,
+       }, {
+               .name = "at91sam9rl-adc",
+               .driver_data = (unsigned long)&at91sam9rl_caps,
+       }, {
+               .name = "at91sam9g45-adc",
+               .driver_data = (unsigned long)&at91sam9g45_caps,
+       }, {
+               .name = "at91sam9x5-adc",
+               .driver_data = (unsigned long)&at91sam9x5_caps,
+       }, {
+               /* terminator */
+       }
+};
+MODULE_DEVICE_TABLE(platform, at91_adc_ids);
 
 static struct platform_driver at91_adc_driver = {
        .probe = at91_adc_probe,
        .remove = at91_adc_remove,
+       .id_table = at91_adc_ids,
        .driver = {
                   .name = DRIVER_NAME,
                   .of_match_table = of_match_ptr(at91_adc_dt_ids),
index e108f2a9d827fca1e37932f18b5232ca4e9b65ea..e472cff6eeae38168331bf8b13a6583e9756842e 100644 (file)
@@ -165,7 +165,8 @@ static ssize_t iio_scan_el_show(struct device *dev,
        int ret;
        struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 
-       ret = test_bit(to_iio_dev_attr(attr)->address,
+       /* Ensure ret is 0 or 1. */
+       ret = !!test_bit(to_iio_dev_attr(attr)->address,
                       indio_dev->buffer->scan_mask);
 
        return sprintf(buf, "%d\n", ret);
@@ -862,7 +863,8 @@ int iio_scan_mask_query(struct iio_dev *indio_dev,
        if (!buffer->scan_mask)
                return 0;
 
-       return test_bit(bit, buffer->scan_mask);
+       /* Ensure return value is 0 or 1. */
+       return !!test_bit(bit, buffer->scan_mask);
 };
 EXPORT_SYMBOL_GPL(iio_scan_mask_query);
 
index 47a6dbac2d0ca8b23dcea31158b43d3c3df3d2f0..d976e6ce60dbb22a57ee293b7baed954f648d2d3 100644 (file)
@@ -221,6 +221,7 @@ static int cm32181_read_raw(struct iio_dev *indio_dev,
                *val = cm32181->calibscale;
                return IIO_VAL_INT;
        case IIO_CHAN_INFO_INT_TIME:
+               *val = 0;
                ret = cm32181_read_als_it(cm32181, val2);
                return ret;
        }
index a45e07492db318a22171546291d2b590e0d0668f..39fc67e82138470a1f8523d7de2902f072603a6f 100644 (file)
@@ -652,7 +652,19 @@ static int cm36651_probe(struct i2c_client *client,
        cm36651->client = client;
        cm36651->ps_client = i2c_new_dummy(client->adapter,
                                                     CM36651_I2C_ADDR_PS);
+       if (!cm36651->ps_client) {
+               dev_err(&client->dev, "%s: new i2c device failed\n", __func__);
+               ret = -ENODEV;
+               goto error_disable_reg;
+       }
+
        cm36651->ara_client = i2c_new_dummy(client->adapter, CM36651_ARA);
+       if (!cm36651->ara_client) {
+               dev_err(&client->dev, "%s: new i2c device failed\n", __func__);
+               ret = -ENODEV;
+               goto error_i2c_unregister_ps;
+       }
+
        mutex_init(&cm36651->lock);
        indio_dev->dev.parent = &client->dev;
        indio_dev->channels = cm36651_channels;
@@ -664,7 +676,7 @@ static int cm36651_probe(struct i2c_client *client,
        ret = cm36651_setup_reg(cm36651);
        if (ret) {
                dev_err(&client->dev, "%s: register setup failed\n", __func__);
-               goto error_disable_reg;
+               goto error_i2c_unregister_ara;
        }
 
        ret = request_threaded_irq(client->irq, NULL, cm36651_irq_handler,
@@ -672,7 +684,7 @@ static int cm36651_probe(struct i2c_client *client,
                                                        "cm36651", indio_dev);
        if (ret) {
                dev_err(&client->dev, "%s: request irq failed\n", __func__);
-               goto error_disable_reg;
+               goto error_i2c_unregister_ara;
        }
 
        ret = iio_device_register(indio_dev);
@@ -685,6 +697,10 @@ static int cm36651_probe(struct i2c_client *client,
 
 error_free_irq:
        free_irq(client->irq, indio_dev);
+error_i2c_unregister_ara:
+       i2c_unregister_device(cm36651->ara_client);
+error_i2c_unregister_ps:
+       i2c_unregister_device(cm36651->ps_client);
 error_disable_reg:
        regulator_disable(cm36651->vled_reg);
        return ret;
@@ -698,6 +714,8 @@ static int cm36651_remove(struct i2c_client *client)
        iio_device_unregister(indio_dev);
        regulator_disable(cm36651->vled_reg);
        free_irq(client->irq, indio_dev);
+       i2c_unregister_device(cm36651->ps_client);
+       i2c_unregister_device(cm36651->ara_client);
 
        return 0;
 }
index d4e8983fba537d71b8da25b5b0768f088678722d..23f38cf2c5cd030c2ba9e3aebd0d199c4925e930 100644 (file)
@@ -1,10 +1,10 @@
 config INFINIBAND_CXGB4
-       tristate "Chelsio T4 RDMA Driver"
+       tristate "Chelsio T4/T5 RDMA Driver"
        depends on CHELSIO_T4 && INET && (IPV6 || IPV6=n)
        select GENERIC_ALLOCATOR
        ---help---
-         This is an iWARP/RDMA driver for the Chelsio T4 1GbE and
-         10GbE adapters.
+         This is an iWARP/RDMA driver for the Chelsio T4 and T5
+         1GbE, 10GbE adapters and T5 40GbE adapter.
 
          For general information about Chelsio and our products, visit
          our website at <http://www.chelsio.com>.
index 02436d5d0dab2aefab4ba29b5e837fae4e30a388..1f863a96a480fd1ab087989acea029a781c7c23e 100644 (file)
@@ -173,12 +173,15 @@ static void start_ep_timer(struct c4iw_ep *ep)
        add_timer(&ep->timer);
 }
 
-static void stop_ep_timer(struct c4iw_ep *ep)
+static int stop_ep_timer(struct c4iw_ep *ep)
 {
        PDBG("%s ep %p stopping\n", __func__, ep);
        del_timer_sync(&ep->timer);
-       if (!test_and_set_bit(TIMEOUT, &ep->com.flags))
+       if (!test_and_set_bit(TIMEOUT, &ep->com.flags)) {
                c4iw_put_ep(&ep->com);
+               return 0;
+       }
+       return 1;
 }
 
 static int c4iw_l2t_send(struct c4iw_rdev *rdev, struct sk_buff *skb,
@@ -584,6 +587,10 @@ static int send_connect(struct c4iw_ep *ep)
                opt2 |= SACK_EN(1);
        if (wscale && enable_tcp_window_scaling)
                opt2 |= WND_SCALE_EN(1);
+       if (is_t5(ep->com.dev->rdev.lldi.adapter_type)) {
+               opt2 |= T5_OPT_2_VALID;
+               opt2 |= V_CONG_CNTRL(CONG_ALG_TAHOE);
+       }
        t4_set_arp_err_handler(skb, NULL, act_open_req_arp_failure);
 
        if (is_t4(ep->com.dev->rdev.lldi.adapter_type)) {
@@ -993,7 +1000,7 @@ static void close_complete_upcall(struct c4iw_ep *ep, int status)
 static int abort_connection(struct c4iw_ep *ep, struct sk_buff *skb, gfp_t gfp)
 {
        PDBG("%s ep %p tid %u\n", __func__, ep, ep->hwtid);
-       state_set(&ep->com, ABORTING);
+       __state_set(&ep->com, ABORTING);
        set_bit(ABORT_CONN, &ep->com.history);
        return send_abort(ep, skb, gfp);
 }
@@ -1151,7 +1158,7 @@ static int update_rx_credits(struct c4iw_ep *ep, u32 credits)
        return credits;
 }
 
-static void process_mpa_reply(struct c4iw_ep *ep, struct sk_buff *skb)
+static int process_mpa_reply(struct c4iw_ep *ep, struct sk_buff *skb)
 {
        struct mpa_message *mpa;
        struct mpa_v2_conn_params *mpa_v2_params;
@@ -1161,17 +1168,17 @@ static void process_mpa_reply(struct c4iw_ep *ep, struct sk_buff *skb)
        struct c4iw_qp_attributes attrs;
        enum c4iw_qp_attr_mask mask;
        int err;
+       int disconnect = 0;
 
        PDBG("%s ep %p tid %u\n", __func__, ep, ep->hwtid);
 
        /*
-        * Stop mpa timer.  If it expired, then the state has
-        * changed and we bail since ep_timeout already aborted
-        * the connection.
+        * Stop mpa timer.  If it expired, then
+        * we ignore the MPA reply.  process_timeout()
+        * will abort the connection.
         */
-       stop_ep_timer(ep);
-       if (ep->com.state != MPA_REQ_SENT)
-               return;
+       if (stop_ep_timer(ep))
+               return 0;
 
        /*
         * If we get more than the supported amount of private data
@@ -1193,7 +1200,7 @@ static void process_mpa_reply(struct c4iw_ep *ep, struct sk_buff *skb)
         * if we don't even have the mpa message, then bail.
         */
        if (ep->mpa_pkt_len < sizeof(*mpa))
-               return;
+               return 0;
        mpa = (struct mpa_message *) ep->mpa_pkt;
 
        /* Validate MPA header. */
@@ -1233,7 +1240,7 @@ static void process_mpa_reply(struct c4iw_ep *ep, struct sk_buff *skb)
         * We'll continue process when more data arrives.
         */
        if (ep->mpa_pkt_len < (sizeof(*mpa) + plen))
-               return;
+               return 0;
 
        if (mpa->flags & MPA_REJECT) {
                err = -ECONNREFUSED;
@@ -1335,9 +1342,11 @@ static void process_mpa_reply(struct c4iw_ep *ep, struct sk_buff *skb)
                attrs.layer_etype = LAYER_MPA | DDP_LLP;
                attrs.ecode = MPA_NOMATCH_RTR;
                attrs.next_state = C4IW_QP_STATE_TERMINATE;
+               attrs.send_term = 1;
                err = c4iw_modify_qp(ep->com.qp->rhp, ep->com.qp,
-                               C4IW_QP_ATTR_NEXT_STATE, &attrs, 0);
+                               C4IW_QP_ATTR_NEXT_STATE, &attrs, 1);
                err = -ENOMEM;
+               disconnect = 1;
                goto out;
        }
 
@@ -1353,9 +1362,11 @@ static void process_mpa_reply(struct c4iw_ep *ep, struct sk_buff *skb)
                attrs.layer_etype = LAYER_MPA | DDP_LLP;
                attrs.ecode = MPA_INSUFF_IRD;
                attrs.next_state = C4IW_QP_STATE_TERMINATE;
+               attrs.send_term = 1;
                err = c4iw_modify_qp(ep->com.qp->rhp, ep->com.qp,
-                               C4IW_QP_ATTR_NEXT_STATE, &attrs, 0);
+                               C4IW_QP_ATTR_NEXT_STATE, &attrs, 1);
                err = -ENOMEM;
+               disconnect = 1;
                goto out;
        }
        goto out;
@@ -1364,7 +1375,7 @@ err:
        send_abort(ep, skb, GFP_KERNEL);
 out:
        connect_reply_upcall(ep, err);
-       return;
+       return disconnect;
 }
 
 static void process_mpa_request(struct c4iw_ep *ep, struct sk_buff *skb)
@@ -1375,15 +1386,12 @@ static void process_mpa_request(struct c4iw_ep *ep, struct sk_buff *skb)
 
        PDBG("%s ep %p tid %u\n", __func__, ep, ep->hwtid);
 
-       if (ep->com.state != MPA_REQ_WAIT)
-               return;
-
        /*
         * If we get more than the supported amount of private data
         * then we must fail this connection.
         */
        if (ep->mpa_pkt_len + skb->len > sizeof(ep->mpa_pkt)) {
-               stop_ep_timer(ep);
+               (void)stop_ep_timer(ep);
                abort_connection(ep, skb, GFP_KERNEL);
                return;
        }
@@ -1413,13 +1421,13 @@ static void process_mpa_request(struct c4iw_ep *ep, struct sk_buff *skb)
        if (mpa->revision > mpa_rev) {
                printk(KERN_ERR MOD "%s MPA version mismatch. Local = %d,"
                       " Received = %d\n", __func__, mpa_rev, mpa->revision);
-               stop_ep_timer(ep);
+               (void)stop_ep_timer(ep);
                abort_connection(ep, skb, GFP_KERNEL);
                return;
        }
 
        if (memcmp(mpa->key, MPA_KEY_REQ, sizeof(mpa->key))) {
-               stop_ep_timer(ep);
+               (void)stop_ep_timer(ep);
                abort_connection(ep, skb, GFP_KERNEL);
                return;
        }
@@ -1430,7 +1438,7 @@ static void process_mpa_request(struct c4iw_ep *ep, struct sk_buff *skb)
         * Fail if there's too much private data.
         */
        if (plen > MPA_MAX_PRIVATE_DATA) {
-               stop_ep_timer(ep);
+               (void)stop_ep_timer(ep);
                abort_connection(ep, skb, GFP_KERNEL);
                return;
        }
@@ -1439,7 +1447,7 @@ static void process_mpa_request(struct c4iw_ep *ep, struct sk_buff *skb)
         * If plen does not account for pkt size
         */
        if (ep->mpa_pkt_len > (sizeof(*mpa) + plen)) {
-               stop_ep_timer(ep);
+               (void)stop_ep_timer(ep);
                abort_connection(ep, skb, GFP_KERNEL);
                return;
        }
@@ -1496,18 +1504,24 @@ static void process_mpa_request(struct c4iw_ep *ep, struct sk_buff *skb)
             ep->mpa_attr.xmit_marker_enabled, ep->mpa_attr.version,
             ep->mpa_attr.p2p_type);
 
-       __state_set(&ep->com, MPA_REQ_RCVD);
-       stop_ep_timer(ep);
-
-       /* drive upcall */
-       mutex_lock(&ep->parent_ep->com.mutex);
-       if (ep->parent_ep->com.state != DEAD) {
-               if (connect_request_upcall(ep))
+       /*
+        * If the endpoint timer already expired, then we ignore
+        * the start request.  process_timeout() will abort
+        * the connection.
+        */
+       if (!stop_ep_timer(ep)) {
+               __state_set(&ep->com, MPA_REQ_RCVD);
+
+               /* drive upcall */
+               mutex_lock(&ep->parent_ep->com.mutex);
+               if (ep->parent_ep->com.state != DEAD) {
+                       if (connect_request_upcall(ep))
+                               abort_connection(ep, skb, GFP_KERNEL);
+               } else {
                        abort_connection(ep, skb, GFP_KERNEL);
-       } else {
-               abort_connection(ep, skb, GFP_KERNEL);
+               }
+               mutex_unlock(&ep->parent_ep->com.mutex);
        }
-       mutex_unlock(&ep->parent_ep->com.mutex);
        return;
 }
 
@@ -1519,6 +1533,7 @@ static int rx_data(struct c4iw_dev *dev, struct sk_buff *skb)
        unsigned int tid = GET_TID(hdr);
        struct tid_info *t = dev->rdev.lldi.tids;
        __u8 status = hdr->status;
+       int disconnect = 0;
 
        ep = lookup_tid(t, tid);
        if (!ep)
@@ -1534,7 +1549,7 @@ static int rx_data(struct c4iw_dev *dev, struct sk_buff *skb)
        switch (ep->com.state) {
        case MPA_REQ_SENT:
                ep->rcv_seq += dlen;
-               process_mpa_reply(ep, skb);
+               disconnect = process_mpa_reply(ep, skb);
                break;
        case MPA_REQ_WAIT:
                ep->rcv_seq += dlen;
@@ -1550,13 +1565,16 @@ static int rx_data(struct c4iw_dev *dev, struct sk_buff *skb)
                               ep->com.state, ep->hwtid, status);
                attrs.next_state = C4IW_QP_STATE_TERMINATE;
                c4iw_modify_qp(ep->com.qp->rhp, ep->com.qp,
-                              C4IW_QP_ATTR_NEXT_STATE, &attrs, 0);
+                              C4IW_QP_ATTR_NEXT_STATE, &attrs, 1);
+               disconnect = 1;
                break;
        }
        default:
                break;
        }
        mutex_unlock(&ep->com.mutex);
+       if (disconnect)
+               c4iw_ep_disconnect(ep, 0, GFP_KERNEL);
        return 0;
 }
 
@@ -2004,6 +2022,10 @@ static void accept_cr(struct c4iw_ep *ep, struct sk_buff *skb,
                if (tcph->ece && tcph->cwr)
                        opt2 |= CCTRL_ECN(1);
        }
+       if (is_t5(ep->com.dev->rdev.lldi.adapter_type)) {
+               opt2 |= T5_OPT_2_VALID;
+               opt2 |= V_CONG_CNTRL(CONG_ALG_TAHOE);
+       }
 
        rpl = cplhdr(skb);
        INIT_TP_WR(rpl, ep->hwtid);
@@ -2265,7 +2287,7 @@ static int peer_close(struct c4iw_dev *dev, struct sk_buff *skb)
                disconnect = 0;
                break;
        case MORIBUND:
-               stop_ep_timer(ep);
+               (void)stop_ep_timer(ep);
                if (ep->com.cm_id && ep->com.qp) {
                        attrs.next_state = C4IW_QP_STATE_IDLE;
                        c4iw_modify_qp(ep->com.qp->rhp, ep->com.qp,
@@ -2325,10 +2347,10 @@ static int peer_abort(struct c4iw_dev *dev, struct sk_buff *skb)
        case CONNECTING:
                break;
        case MPA_REQ_WAIT:
-               stop_ep_timer(ep);
+               (void)stop_ep_timer(ep);
                break;
        case MPA_REQ_SENT:
-               stop_ep_timer(ep);
+               (void)stop_ep_timer(ep);
                if (mpa_rev == 1 || (mpa_rev == 2 && ep->tried_with_mpa_v1))
                        connect_reply_upcall(ep, -ECONNRESET);
                else {
@@ -2433,7 +2455,7 @@ static int close_con_rpl(struct c4iw_dev *dev, struct sk_buff *skb)
                __state_set(&ep->com, MORIBUND);
                break;
        case MORIBUND:
-               stop_ep_timer(ep);
+               (void)stop_ep_timer(ep);
                if ((ep->com.cm_id) && (ep->com.qp)) {
                        attrs.next_state = C4IW_QP_STATE_IDLE;
                        c4iw_modify_qp(ep->com.qp->rhp,
@@ -3028,7 +3050,7 @@ int c4iw_ep_disconnect(struct c4iw_ep *ep, int abrupt, gfp_t gfp)
                if (!test_and_set_bit(CLOSE_SENT, &ep->com.flags)) {
                        close = 1;
                        if (abrupt) {
-                               stop_ep_timer(ep);
+                               (void)stop_ep_timer(ep);
                                ep->com.state = ABORTING;
                        } else
                                ep->com.state = MORIBUND;
@@ -3462,14 +3484,24 @@ static void process_timeout(struct c4iw_ep *ep)
                __state_set(&ep->com, ABORTING);
                close_complete_upcall(ep, -ETIMEDOUT);
                break;
+       case ABORTING:
+       case DEAD:
+
+               /*
+                * These states are expected if the ep timed out at the same
+                * time as another thread was calling stop_ep_timer().
+                * So we silently do nothing for these states.
+                */
+               abort = 0;
+               break;
        default:
                WARN(1, "%s unexpected state ep %p tid %u state %u\n",
                        __func__, ep, ep->hwtid, ep->com.state);
                abort = 0;
        }
-       mutex_unlock(&ep->com.mutex);
        if (abort)
                abort_connection(ep, NULL, GFP_KERNEL);
+       mutex_unlock(&ep->com.mutex);
        c4iw_put_ep(&ep->com);
 }
 
@@ -3483,6 +3515,8 @@ static void process_timedout_eps(void)
 
                tmp = timeout_list.next;
                list_del(tmp);
+               tmp->next = NULL;
+               tmp->prev = NULL;
                spin_unlock_irq(&timeout_lock);
                ep = list_entry(tmp, struct c4iw_ep, entry);
                process_timeout(ep);
@@ -3499,6 +3533,7 @@ static void process_work(struct work_struct *work)
        unsigned int opcode;
        int ret;
 
+       process_timedout_eps();
        while ((skb = skb_dequeue(&rxq))) {
                rpl = cplhdr(skb);
                dev = *((struct c4iw_dev **) (skb->cb + sizeof(void *)));
@@ -3508,8 +3543,8 @@ static void process_work(struct work_struct *work)
                ret = work_handlers[opcode](dev, skb);
                if (!ret)
                        kfree_skb(skb);
+               process_timedout_eps();
        }
-       process_timedout_eps();
 }
 
 static DECLARE_WORK(skb_work, process_work);
@@ -3521,8 +3556,13 @@ static void ep_timeout(unsigned long arg)
 
        spin_lock(&timeout_lock);
        if (!test_and_set_bit(TIMEOUT, &ep->com.flags)) {
-               list_add_tail(&ep->entry, &timeout_list);
-               kickit = 1;
+               /*
+                * Only insert if it is not already on the list.
+                */
+               if (!ep->entry.next) {
+                       list_add_tail(&ep->entry, &timeout_list);
+                       kickit = 1;
+               }
        }
        spin_unlock(&timeout_lock);
        if (kickit)
index ce468e54242881096ce1c2ce8691b44e43b0bab9..cfaa56ada18927e1580b4695511a146f995be395 100644 (file)
@@ -235,27 +235,21 @@ int c4iw_flush_sq(struct c4iw_qp *qhp)
        struct t4_cq *cq = &chp->cq;
        int idx;
        struct t4_swsqe *swsqe;
-       int error = (qhp->attr.state != C4IW_QP_STATE_CLOSING &&
-                       qhp->attr.state != C4IW_QP_STATE_IDLE);
 
        if (wq->sq.flush_cidx == -1)
                wq->sq.flush_cidx = wq->sq.cidx;
        idx = wq->sq.flush_cidx;
        BUG_ON(idx >= wq->sq.size);
        while (idx != wq->sq.pidx) {
-               if (error) {
-                       swsqe = &wq->sq.sw_sq[idx];
-                       BUG_ON(swsqe->flushed);
-                       swsqe->flushed = 1;
-                       insert_sq_cqe(wq, cq, swsqe);
-                       if (wq->sq.oldest_read == swsqe) {
-                               BUG_ON(swsqe->opcode != FW_RI_READ_REQ);
-                               advance_oldest_read(wq);
-                       }
-                       flushed++;
-               } else {
-                       t4_sq_consume(wq);
+               swsqe = &wq->sq.sw_sq[idx];
+               BUG_ON(swsqe->flushed);
+               swsqe->flushed = 1;
+               insert_sq_cqe(wq, cq, swsqe);
+               if (wq->sq.oldest_read == swsqe) {
+                       BUG_ON(swsqe->opcode != FW_RI_READ_REQ);
+                       advance_oldest_read(wq);
                }
+               flushed++;
                if (++idx == wq->sq.size)
                        idx = 0;
        }
@@ -678,7 +672,7 @@ skip_cqe:
 static int c4iw_poll_cq_one(struct c4iw_cq *chp, struct ib_wc *wc)
 {
        struct c4iw_qp *qhp = NULL;
-       struct t4_cqe cqe = {0, 0}, *rd_cqe;
+       struct t4_cqe uninitialized_var(cqe), *rd_cqe;
        struct t4_wq *wq;
        u32 credit = 0;
        u8 cqe_flushed;
index 9489a388376ceed97d42fc88064cebbd2403e536..f4fa50a609e21f5ef1fe0ee3660bc921fdded72e 100644 (file)
@@ -682,7 +682,10 @@ static void c4iw_dealloc(struct uld_ctx *ctx)
        idr_destroy(&ctx->dev->hwtid_idr);
        idr_destroy(&ctx->dev->stid_idr);
        idr_destroy(&ctx->dev->atid_idr);
-       iounmap(ctx->dev->rdev.oc_mw_kva);
+       if (ctx->dev->rdev.bar2_kva)
+               iounmap(ctx->dev->rdev.bar2_kva);
+       if (ctx->dev->rdev.oc_mw_kva)
+               iounmap(ctx->dev->rdev.oc_mw_kva);
        ib_dealloc_device(&ctx->dev->ibdev);
        ctx->dev = NULL;
 }
@@ -722,11 +725,31 @@ static struct c4iw_dev *c4iw_alloc(const struct cxgb4_lld_info *infop)
        }
        devp->rdev.lldi = *infop;
 
-       devp->rdev.oc_mw_pa = pci_resource_start(devp->rdev.lldi.pdev, 2) +
-               (pci_resource_len(devp->rdev.lldi.pdev, 2) -
-                roundup_pow_of_two(devp->rdev.lldi.vr->ocq.size));
-       devp->rdev.oc_mw_kva = ioremap_wc(devp->rdev.oc_mw_pa,
-                                              devp->rdev.lldi.vr->ocq.size);
+       /*
+        * For T5 devices, we map all of BAR2 with WC.
+        * For T4 devices with onchip qp mem, we map only that part
+        * of BAR2 with WC.
+        */
+       devp->rdev.bar2_pa = pci_resource_start(devp->rdev.lldi.pdev, 2);
+       if (is_t5(devp->rdev.lldi.adapter_type)) {
+               devp->rdev.bar2_kva = ioremap_wc(devp->rdev.bar2_pa,
+                       pci_resource_len(devp->rdev.lldi.pdev, 2));
+               if (!devp->rdev.bar2_kva) {
+                       pr_err(MOD "Unable to ioremap BAR2\n");
+                       return ERR_PTR(-EINVAL);
+               }
+       } else if (ocqp_supported(infop)) {
+               devp->rdev.oc_mw_pa =
+                       pci_resource_start(devp->rdev.lldi.pdev, 2) +
+                       pci_resource_len(devp->rdev.lldi.pdev, 2) -
+                       roundup_pow_of_two(devp->rdev.lldi.vr->ocq.size);
+               devp->rdev.oc_mw_kva = ioremap_wc(devp->rdev.oc_mw_pa,
+                       devp->rdev.lldi.vr->ocq.size);
+               if (!devp->rdev.oc_mw_kva) {
+                       pr_err(MOD "Unable to ioremap onchip mem\n");
+                       return ERR_PTR(-EINVAL);
+               }
+       }
 
        PDBG(KERN_INFO MOD "ocq memory: "
               "hw_start 0x%x size %u mw_pa 0x%lx mw_kva %p\n",
@@ -1003,9 +1026,11 @@ static int enable_qp_db(int id, void *p, void *data)
 static void resume_rc_qp(struct c4iw_qp *qp)
 {
        spin_lock(&qp->lock);
-       t4_ring_sq_db(&qp->wq, qp->wq.sq.wq_pidx_inc);
+       t4_ring_sq_db(&qp->wq, qp->wq.sq.wq_pidx_inc,
+                     is_t5(qp->rhp->rdev.lldi.adapter_type), NULL);
        qp->wq.sq.wq_pidx_inc = 0;
-       t4_ring_rq_db(&qp->wq, qp->wq.rq.wq_pidx_inc);
+       t4_ring_rq_db(&qp->wq, qp->wq.rq.wq_pidx_inc,
+                     is_t5(qp->rhp->rdev.lldi.adapter_type), NULL);
        qp->wq.rq.wq_pidx_inc = 0;
        spin_unlock(&qp->lock);
 }
index e872203c5424926b4e04f13171a20aac5702e7d1..7474b490760a413f9f13d9e04ead79319a6fd55e 100644 (file)
@@ -149,6 +149,8 @@ struct c4iw_rdev {
        struct gen_pool *ocqp_pool;
        u32 flags;
        struct cxgb4_lld_info lldi;
+       unsigned long bar2_pa;
+       void __iomem *bar2_kva;
        unsigned long oc_mw_pa;
        void __iomem *oc_mw_kva;
        struct c4iw_stats stats;
@@ -433,6 +435,7 @@ struct c4iw_qp_attributes {
        u8 ecode;
        u16 sq_db_inc;
        u16 rq_db_inc;
+       u8 send_term;
 };
 
 struct c4iw_qp {
index f9ca072a99ed2dbbf2f401dc7b798fd9aa0900d1..ec7a2988a70344e1b784b6e68a2638f78cd439bc 100644 (file)
@@ -259,8 +259,12 @@ static int write_tpt_entry(struct c4iw_rdev *rdev, u32 reset_tpt_entry,
 
        if ((!reset_tpt_entry) && (*stag == T4_STAG_UNSET)) {
                stag_idx = c4iw_get_resource(&rdev->resource.tpt_table);
-               if (!stag_idx)
+               if (!stag_idx) {
+                       mutex_lock(&rdev->stats.lock);
+                       rdev->stats.stag.fail++;
+                       mutex_unlock(&rdev->stats.lock);
                        return -ENOMEM;
+               }
                mutex_lock(&rdev->stats.lock);
                rdev->stats.stag.cur += 32;
                if (rdev->stats.stag.cur > rdev->stats.stag.max)
index 79429256023a7e2e7be7f83e7f1b305233f5348a..a94a3e12c349b273d472a42b6b2bba88dcc0779a 100644 (file)
@@ -328,7 +328,7 @@ static int c4iw_query_device(struct ib_device *ibdev,
        props->max_mr = c4iw_num_stags(&dev->rdev);
        props->max_pd = T4_MAX_NUM_PD;
        props->local_ca_ack_delay = 0;
-       props->max_fast_reg_page_list_len = T4_MAX_FR_DEPTH;
+       props->max_fast_reg_page_list_len = t4_max_fr_depth(use_dsgl);
 
        return 0;
 }
index cb76eb5eee1fd6d09fa94015eff08dbeb0a2cb8b..086f62f5dc9e2ba5978e81f02e8e392c8e201774 100644 (file)
@@ -212,13 +212,23 @@ static int create_qp(struct c4iw_rdev *rdev, struct t4_wq *wq,
 
        wq->db = rdev->lldi.db_reg;
        wq->gts = rdev->lldi.gts_reg;
-       if (user) {
-               wq->sq.udb = (u64)pci_resource_start(rdev->lldi.pdev, 2) +
-                                       (wq->sq.qid << rdev->qpshift);
-               wq->sq.udb &= PAGE_MASK;
-               wq->rq.udb = (u64)pci_resource_start(rdev->lldi.pdev, 2) +
-                                       (wq->rq.qid << rdev->qpshift);
-               wq->rq.udb &= PAGE_MASK;
+       if (user || is_t5(rdev->lldi.adapter_type)) {
+               u32 off;
+
+               off = (wq->sq.qid << rdev->qpshift) & PAGE_MASK;
+               if (user) {
+                       wq->sq.udb = (u64 __iomem *)(rdev->bar2_pa + off);
+               } else {
+                       off += 128 * (wq->sq.qid & rdev->qpmask) + 8;
+                       wq->sq.udb = (u64 __iomem *)(rdev->bar2_kva + off);
+               }
+               off = (wq->rq.qid << rdev->qpshift) & PAGE_MASK;
+               if (user) {
+                       wq->rq.udb = (u64 __iomem *)(rdev->bar2_pa + off);
+               } else {
+                       off += 128 * (wq->rq.qid & rdev->qpmask) + 8;
+                       wq->rq.udb = (u64 __iomem *)(rdev->bar2_kva + off);
+               }
        }
        wq->rdev = rdev;
        wq->rq.msn = 1;
@@ -299,9 +309,10 @@ static int create_qp(struct c4iw_rdev *rdev, struct t4_wq *wq,
        if (ret)
                goto free_dma;
 
-       PDBG("%s sqid 0x%x rqid 0x%x kdb 0x%p squdb 0x%llx rqudb 0x%llx\n",
+       PDBG("%s sqid 0x%x rqid 0x%x kdb 0x%p squdb 0x%lx rqudb 0x%lx\n",
             __func__, wq->sq.qid, wq->rq.qid, wq->db,
-            (unsigned long long)wq->sq.udb, (unsigned long long)wq->rq.udb);
+            (__force unsigned long) wq->sq.udb,
+            (__force unsigned long) wq->rq.udb);
 
        return 0;
 free_dma:
@@ -425,6 +436,8 @@ static int build_rdma_send(struct t4_sq *sq, union t4_wr *wqe,
        default:
                return -EINVAL;
        }
+       wqe->send.r3 = 0;
+       wqe->send.r4 = 0;
 
        plen = 0;
        if (wr->num_sge) {
@@ -555,7 +568,8 @@ static int build_fastreg(struct t4_sq *sq, union t4_wr *wqe,
        int pbllen = roundup(wr->wr.fast_reg.page_list_len * sizeof(u64), 32);
        int rem;
 
-       if (wr->wr.fast_reg.page_list_len > T4_MAX_FR_DEPTH)
+       if (wr->wr.fast_reg.page_list_len >
+           t4_max_fr_depth(use_dsgl))
                return -EINVAL;
 
        wqe->fr.qpbinde_to_dcacpu = 0;
@@ -650,9 +664,10 @@ static int ring_kernel_sq_db(struct c4iw_qp *qhp, u16 inc)
 
        spin_lock_irqsave(&qhp->rhp->lock, flags);
        spin_lock(&qhp->lock);
-       if (qhp->rhp->db_state == NORMAL) {
-               t4_ring_sq_db(&qhp->wq, inc);
-       } else {
+       if (qhp->rhp->db_state == NORMAL)
+               t4_ring_sq_db(&qhp->wq, inc,
+                             is_t5(qhp->rhp->rdev.lldi.adapter_type), NULL);
+       else {
                add_to_fc_list(&qhp->rhp->db_fc_list, &qhp->db_fc_entry);
                qhp->wq.sq.wq_pidx_inc += inc;
        }
@@ -667,9 +682,10 @@ static int ring_kernel_rq_db(struct c4iw_qp *qhp, u16 inc)
 
        spin_lock_irqsave(&qhp->rhp->lock, flags);
        spin_lock(&qhp->lock);
-       if (qhp->rhp->db_state == NORMAL) {
-               t4_ring_rq_db(&qhp->wq, inc);
-       } else {
+       if (qhp->rhp->db_state == NORMAL)
+               t4_ring_rq_db(&qhp->wq, inc,
+                             is_t5(qhp->rhp->rdev.lldi.adapter_type), NULL);
+       else {
                add_to_fc_list(&qhp->rhp->db_fc_list, &qhp->db_fc_entry);
                qhp->wq.rq.wq_pidx_inc += inc;
        }
@@ -686,7 +702,7 @@ int c4iw_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
        enum fw_wr_opcodes fw_opcode = 0;
        enum fw_ri_wr_flags fw_flags;
        struct c4iw_qp *qhp;
-       union t4_wr *wqe;
+       union t4_wr *wqe = NULL;
        u32 num_wrs;
        struct t4_swsqe *swsqe;
        unsigned long flag;
@@ -792,7 +808,8 @@ int c4iw_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
                idx += DIV_ROUND_UP(len16*16, T4_EQ_ENTRY_SIZE);
        }
        if (!qhp->rhp->rdev.status_page->db_off) {
-               t4_ring_sq_db(&qhp->wq, idx);
+               t4_ring_sq_db(&qhp->wq, idx,
+                             is_t5(qhp->rhp->rdev.lldi.adapter_type), wqe);
                spin_unlock_irqrestore(&qhp->lock, flag);
        } else {
                spin_unlock_irqrestore(&qhp->lock, flag);
@@ -806,7 +823,7 @@ int c4iw_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
 {
        int err = 0;
        struct c4iw_qp *qhp;
-       union t4_recv_wr *wqe;
+       union t4_recv_wr *wqe = NULL;
        u32 num_wrs;
        u8 len16 = 0;
        unsigned long flag;
@@ -858,7 +875,8 @@ int c4iw_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
                num_wrs--;
        }
        if (!qhp->rhp->rdev.status_page->db_off) {
-               t4_ring_rq_db(&qhp->wq, idx);
+               t4_ring_rq_db(&qhp->wq, idx,
+                             is_t5(qhp->rhp->rdev.lldi.adapter_type), wqe);
                spin_unlock_irqrestore(&qhp->lock, flag);
        } else {
                spin_unlock_irqrestore(&qhp->lock, flag);
@@ -1352,6 +1370,7 @@ int c4iw_modify_qp(struct c4iw_dev *rhp, struct c4iw_qp *qhp,
                switch (attrs->next_state) {
                case C4IW_QP_STATE_CLOSING:
                        BUG_ON(atomic_read(&qhp->ep->com.kref.refcount) < 2);
+                       t4_set_wq_in_error(&qhp->wq);
                        set_state(qhp, C4IW_QP_STATE_CLOSING);
                        ep = qhp->ep;
                        if (!internal) {
@@ -1359,30 +1378,30 @@ int c4iw_modify_qp(struct c4iw_dev *rhp, struct c4iw_qp *qhp,
                                disconnect = 1;
                                c4iw_get_ep(&qhp->ep->com);
                        }
-                       t4_set_wq_in_error(&qhp->wq);
                        ret = rdma_fini(rhp, qhp, ep);
                        if (ret)
                                goto err;
                        break;
                case C4IW_QP_STATE_TERMINATE:
+                       t4_set_wq_in_error(&qhp->wq);
                        set_state(qhp, C4IW_QP_STATE_TERMINATE);
                        qhp->attr.layer_etype = attrs->layer_etype;
                        qhp->attr.ecode = attrs->ecode;
-                       t4_set_wq_in_error(&qhp->wq);
                        ep = qhp->ep;
-                       disconnect = 1;
-                       if (!internal)
+                       if (!internal) {
+                               c4iw_get_ep(&qhp->ep->com);
                                terminate = 1;
-                       else {
+                               disconnect = 1;
+                       } else {
+                               terminate = qhp->attr.send_term;
                                ret = rdma_fini(rhp, qhp, ep);
                                if (ret)
                                        goto err;
                        }
-                       c4iw_get_ep(&qhp->ep->com);
                        break;
                case C4IW_QP_STATE_ERROR:
-                       set_state(qhp, C4IW_QP_STATE_ERROR);
                        t4_set_wq_in_error(&qhp->wq);
+                       set_state(qhp, C4IW_QP_STATE_ERROR);
                        if (!internal) {
                                abort = 1;
                                disconnect = 1;
@@ -1677,11 +1696,11 @@ struct ib_qp *c4iw_create_qp(struct ib_pd *pd, struct ib_qp_init_attr *attrs,
                mm2->len = PAGE_ALIGN(qhp->wq.rq.memsize);
                insert_mmap(ucontext, mm2);
                mm3->key = uresp.sq_db_gts_key;
-               mm3->addr = qhp->wq.sq.udb;
+               mm3->addr = (__force unsigned long) qhp->wq.sq.udb;
                mm3->len = PAGE_SIZE;
                insert_mmap(ucontext, mm3);
                mm4->key = uresp.rq_db_gts_key;
-               mm4->addr = qhp->wq.rq.udb;
+               mm4->addr = (__force unsigned long) qhp->wq.rq.udb;
                mm4->len = PAGE_SIZE;
                insert_mmap(ucontext, mm4);
                if (mm5) {
@@ -1758,11 +1777,15 @@ int c4iw_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
        /*
         * Use SQ_PSN and RQ_PSN to pass in IDX_INC values for
         * ringing the queue db when we're in DB_FULL mode.
+        * Only allow this on T4 devices.
         */
        attrs.sq_db_inc = attr->sq_psn;
        attrs.rq_db_inc = attr->rq_psn;
        mask |= (attr_mask & IB_QP_SQ_PSN) ? C4IW_QP_ATTR_SQ_DB : 0;
        mask |= (attr_mask & IB_QP_RQ_PSN) ? C4IW_QP_ATTR_RQ_DB : 0;
+       if (is_t5(to_c4iw_qp(ibqp)->rhp->rdev.lldi.adapter_type) &&
+           (mask & (C4IW_QP_ATTR_SQ_DB|C4IW_QP_ATTR_RQ_DB)))
+               return -EINVAL;
 
        return c4iw_modify_qp(rhp, qhp, mask, &attrs, 0);
 }
index cdef4d7fb6d823405a5ed6e0f67a8481a5db870c..67df71a7012ea39cb894d9492994164c9bf03efd 100644 (file)
@@ -179,8 +179,12 @@ u32 c4iw_get_qpid(struct c4iw_rdev *rdev, struct c4iw_dev_ucontext *uctx)
                kfree(entry);
        } else {
                qid = c4iw_get_resource(&rdev->resource.qid_table);
-               if (!qid)
+               if (!qid) {
+                       mutex_lock(&rdev->stats.lock);
+                       rdev->stats.qid.fail++;
+                       mutex_unlock(&rdev->stats.lock);
                        goto out;
+               }
                mutex_lock(&rdev->stats.lock);
                rdev->stats.qid.cur += rdev->qpmask + 1;
                mutex_unlock(&rdev->stats.lock);
@@ -322,8 +326,8 @@ u32 c4iw_rqtpool_alloc(struct c4iw_rdev *rdev, int size)
        unsigned long addr = gen_pool_alloc(rdev->rqt_pool, size << 6);
        PDBG("%s addr 0x%x size %d\n", __func__, (u32)addr, size << 6);
        if (!addr)
-               printk_ratelimited(KERN_WARNING MOD "%s: Out of RQT memory\n",
-                      pci_name(rdev->lldi.pdev));
+               pr_warn_ratelimited(MOD "%s: Out of RQT memory\n",
+                                   pci_name(rdev->lldi.pdev));
        mutex_lock(&rdev->stats.lock);
        if (addr) {
                rdev->stats.rqt.cur += roundup(size << 6, 1 << MIN_RQT_SHIFT);
index eeca8b1e63764cbbd7e8f1a0760028730bd9e944..2178f31984104542c3cb0cb0439e0865e0262774 100644 (file)
@@ -84,7 +84,14 @@ struct t4_status_page {
                        sizeof(struct fw_ri_isgl)) / sizeof(struct fw_ri_sge))
 #define T4_MAX_FR_IMMD ((T4_SQ_NUM_BYTES - sizeof(struct fw_ri_fr_nsmr_wr) - \
                        sizeof(struct fw_ri_immd)) & ~31UL)
-#define T4_MAX_FR_DEPTH (1024 / sizeof(u64))
+#define T4_MAX_FR_IMMD_DEPTH (T4_MAX_FR_IMMD / sizeof(u64))
+#define T4_MAX_FR_DSGL 1024
+#define T4_MAX_FR_DSGL_DEPTH (T4_MAX_FR_DSGL / sizeof(u64))
+
+static inline int t4_max_fr_depth(int use_dsgl)
+{
+       return use_dsgl ? T4_MAX_FR_DSGL_DEPTH : T4_MAX_FR_IMMD_DEPTH;
+}
 
 #define T4_RQ_NUM_SLOTS 2
 #define T4_RQ_NUM_BYTES (T4_EQ_ENTRY_SIZE * T4_RQ_NUM_SLOTS)
@@ -292,7 +299,7 @@ struct t4_sq {
        unsigned long phys_addr;
        struct t4_swsqe *sw_sq;
        struct t4_swsqe *oldest_read;
-       u64 udb;
+       u64 __iomem *udb;
        size_t memsize;
        u32 qid;
        u16 in_use;
@@ -314,7 +321,7 @@ struct t4_rq {
        dma_addr_t dma_addr;
        DEFINE_DMA_UNMAP_ADDR(mapping);
        struct t4_swrqe *sw_rq;
-       u64 udb;
+       u64 __iomem *udb;
        size_t memsize;
        u32 qid;
        u32 msn;
@@ -435,15 +442,67 @@ static inline u16 t4_sq_wq_size(struct t4_wq *wq)
                return wq->sq.size * T4_SQ_NUM_SLOTS;
 }
 
-static inline void t4_ring_sq_db(struct t4_wq *wq, u16 inc)
+/* This function copies 64 byte coalesced work request to memory
+ * mapped BAR2 space. For coalesced WRs, the SGE fetches data
+ * from the FIFO instead of from Host.
+ */
+static inline void pio_copy(u64 __iomem *dst, u64 *src)
+{
+       int count = 8;
+
+       while (count) {
+               writeq(*src, dst);
+               src++;
+               dst++;
+               count--;
+       }
+}
+
+static inline void t4_ring_sq_db(struct t4_wq *wq, u16 inc, u8 t5,
+                                union t4_wr *wqe)
 {
+
+       /* Flush host queue memory writes. */
        wmb();
+       if (t5) {
+               if (inc == 1 && wqe) {
+                       PDBG("%s: WC wq->sq.pidx = %d\n",
+                            __func__, wq->sq.pidx);
+                       pio_copy(wq->sq.udb + 7, (void *)wqe);
+               } else {
+                       PDBG("%s: DB wq->sq.pidx = %d\n",
+                            __func__, wq->sq.pidx);
+                       writel(PIDX_T5(inc), wq->sq.udb);
+               }
+
+               /* Flush user doorbell area writes. */
+               wmb();
+               return;
+       }
        writel(QID(wq->sq.qid) | PIDX(inc), wq->db);
 }
 
-static inline void t4_ring_rq_db(struct t4_wq *wq, u16 inc)
+static inline void t4_ring_rq_db(struct t4_wq *wq, u16 inc, u8 t5,
+                                union t4_recv_wr *wqe)
 {
+
+       /* Flush host queue memory writes. */
        wmb();
+       if (t5) {
+               if (inc == 1 && wqe) {
+                       PDBG("%s: WC wq->rq.pidx = %d\n",
+                            __func__, wq->rq.pidx);
+                       pio_copy(wq->rq.udb + 7, (void *)wqe);
+               } else {
+                       PDBG("%s: DB wq->rq.pidx = %d\n",
+                            __func__, wq->rq.pidx);
+                       writel(PIDX_T5(inc), wq->rq.udb);
+               }
+
+               /* Flush user doorbell area writes. */
+               wmb();
+               return;
+       }
        writel(QID(wq->rq.qid) | PIDX(inc), wq->db);
 }
 
@@ -568,6 +627,9 @@ static inline int t4_next_hw_cqe(struct t4_cq *cq, struct t4_cqe **cqe)
                printk(KERN_ERR MOD "cq overflow cqid %u\n", cq->cqid);
                BUG_ON(1);
        } else if (t4_valid_cqe(cq, &cq->queue[cq->cidx])) {
+
+               /* Ensure CQE is flushed to memory */
+               rmb();
                *cqe = &cq->queue[cq->cidx];
                ret = 0;
        } else
index dc193c292671ca49e889bc6bedb10d7c1a5fe8ce..6121ca08fe588bff67aab81fe7df06119287292b 100644 (file)
@@ -836,4 +836,18 @@ struct ulptx_idata {
 #define V_RX_DACK_CHANGE(x) ((x) << S_RX_DACK_CHANGE)
 #define F_RX_DACK_CHANGE    V_RX_DACK_CHANGE(1U)
 
+enum {                     /* TCP congestion control algorithms */
+       CONG_ALG_RENO,
+       CONG_ALG_TAHOE,
+       CONG_ALG_NEWRENO,
+       CONG_ALG_HIGHSPEED
+};
+
+#define S_CONG_CNTRL    14
+#define M_CONG_CNTRL    0x3
+#define V_CONG_CNTRL(x) ((x) << S_CONG_CNTRL)
+#define G_CONG_CNTRL(x) (((x) >> S_CONG_CNTRL) & M_CONG_CNTRL)
+
+#define T5_OPT_2_VALID       (1 << 31)
+
 #endif /* _T4FW_RI_API_H_ */
index fa6dc870adae54cafd2e3925aaf9359b396942b4..364d4b6937f519af3c9d347fec12ae397d0b4fba 100644 (file)
@@ -282,6 +282,8 @@ static int mlx5_ib_query_device(struct ib_device *ibdev,
                props->sig_guard_cap = IB_GUARD_T10DIF_CRC |
                                       IB_GUARD_T10DIF_CSUM;
        }
+       if (flags & MLX5_DEV_CAP_FLAG_BLOCK_MCAST)
+               props->device_cap_flags |= IB_DEVICE_BLOCK_MULTICAST_LOOPBACK;
 
        props->vendor_id           = be32_to_cpup((__be32 *)(out_mad->data + 36)) &
                0xffffff;
index ae788d27b93f51de73e869b728f7ce0ba16d586f..dc930ed21eca66c17114ce27a79f2a6b7d7e0170 100644 (file)
@@ -807,6 +807,15 @@ static int create_qp_common(struct mlx5_ib_dev *dev, struct ib_pd *pd,
        spin_lock_init(&qp->sq.lock);
        spin_lock_init(&qp->rq.lock);
 
+       if (init_attr->create_flags & IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK) {
+               if (!(dev->mdev.caps.flags & MLX5_DEV_CAP_FLAG_BLOCK_MCAST)) {
+                       mlx5_ib_dbg(dev, "block multicast loopback isn't supported\n");
+                       return -EINVAL;
+               } else {
+                       qp->flags |= MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK;
+               }
+       }
+
        if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR)
                qp->sq_signal_bits = MLX5_WQE_CTRL_CQ_UPDATE;
 
@@ -878,6 +887,9 @@ static int create_qp_common(struct mlx5_ib_dev *dev, struct ib_pd *pd,
        if (qp->wq_sig)
                in->ctx.flags_pd |= cpu_to_be32(MLX5_QP_ENABLE_SIG);
 
+       if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK)
+               in->ctx.flags_pd |= cpu_to_be32(MLX5_QP_BLOCK_MCAST);
+
        if (qp->scat_cqe && is_connected(init_attr->qp_type)) {
                int rcqe_sz;
                int scqe_sz;
index 87897b95666d2216cb49f9387f8942d5e4142eb9..ded76c101dde3d74a36c85fb9a71f90050969b55 100644 (file)
@@ -858,13 +858,9 @@ static int mthca_enable_msi_x(struct mthca_dev *mdev)
        entries[1].entry = 1;
        entries[2].entry = 2;
 
-       err = pci_enable_msix(mdev->pdev, entries, ARRAY_SIZE(entries));
-       if (err) {
-               if (err > 0)
-                       mthca_info(mdev, "Only %d MSI-X vectors available, "
-                                  "not using MSI-X\n", err);
+       err = pci_enable_msix_exact(mdev->pdev, entries, ARRAY_SIZE(entries));
+       if (err)
                return err;
-       }
 
        mdev->eq_table.eq[MTHCA_EQ_COMP ].msi_x_vector = entries[0].vector;
        mdev->eq_table.eq[MTHCA_EQ_ASYNC].msi_x_vector = entries[1].vector;
index c8d9c4ab142bf4f43f89745bdb3a442f7444e8b5..61a0046efb76ff9310b9a15f79dfe9dd11354c05 100644 (file)
@@ -197,46 +197,47 @@ static void qib_msix_setup(struct qib_devdata *dd, int pos, u32 *msixcnt,
                           struct qib_msix_entry *qib_msix_entry)
 {
        int ret;
-       u32 tabsize = 0;
-       u16 msix_flags;
+       int nvec = *msixcnt;
        struct msix_entry *msix_entry;
        int i;
 
+       ret = pci_msix_vec_count(dd->pcidev);
+       if (ret < 0)
+               goto do_intx;
+
+       nvec = min(nvec, ret);
+
        /* We can't pass qib_msix_entry array to qib_msix_setup
         * so use a dummy msix_entry array and copy the allocated
         * irq back to the qib_msix_entry array. */
-       msix_entry = kmalloc(*msixcnt * sizeof(*msix_entry), GFP_KERNEL);
-       if (!msix_entry) {
-               ret = -ENOMEM;
+       msix_entry = kmalloc(nvec * sizeof(*msix_entry), GFP_KERNEL);
+       if (!msix_entry)
                goto do_intx;
-       }
-       for (i = 0; i < *msixcnt; i++)
+
+       for (i = 0; i < nvec; i++)
                msix_entry[i] = qib_msix_entry[i].msix;
 
-       pci_read_config_word(dd->pcidev, pos + PCI_MSIX_FLAGS, &msix_flags);
-       tabsize = 1 + (msix_flags & PCI_MSIX_FLAGS_QSIZE);
-       if (tabsize > *msixcnt)
-               tabsize = *msixcnt;
-       ret = pci_enable_msix(dd->pcidev, msix_entry, tabsize);
-       if (ret > 0) {
-               tabsize = ret;
-               ret = pci_enable_msix(dd->pcidev, msix_entry, tabsize);
-       }
-do_intx:
-       if (ret) {
-               qib_dev_err(dd,
-                       "pci_enable_msix %d vectors failed: %d, falling back to INTx\n",
-                       tabsize, ret);
-               tabsize = 0;
-       }
-       for (i = 0; i < tabsize; i++)
+       ret = pci_enable_msix_range(dd->pcidev, msix_entry, 1, nvec);
+       if (ret < 0)
+               goto free_msix_entry;
+       else
+               nvec = ret;
+
+       for (i = 0; i < nvec; i++)
                qib_msix_entry[i].msix = msix_entry[i];
+
        kfree(msix_entry);
-       *msixcnt = tabsize;
+       *msixcnt = nvec;
+       return;
 
-       if (ret)
-               qib_enable_intx(dd->pcidev);
+free_msix_entry:
+       kfree(msix_entry);
 
+do_intx:
+       qib_dev_err(dd, "pci_enable_msix_range %d vectors failed: %d, "
+                       "falling back to INTx\n", nvec, ret);
+       *msixcnt = 0;
+       qib_enable_intx(dd->pcidev);
 }
 
 /**
index 4b11ede34950e57587daa09f8c0af0ed63602ea4..4765799fef746b0e7900b4f8aaf327f8af717576 100644 (file)
@@ -109,7 +109,6 @@ static int da9055_onkey_probe(struct platform_device *pdev)
 
        INIT_DELAYED_WORK(&onkey->work, da9055_onkey_work);
 
-       irq = regmap_irq_get_virq(da9055->irq_data, irq);
        err = request_threaded_irq(irq, NULL, da9055_onkey_irq,
                                   IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
                                   "ONKEY", onkey);
index 08ead2aaede5d8ba8a324ff8157beb74d7984b2d..20c80f543d5e56fbe59f15403f2d64d9cb791cff 100644 (file)
@@ -169,6 +169,7 @@ static int soc_button_pnp_probe(struct pnp_dev *pdev,
                                soc_button_remove(pdev);
                                return error;
                        }
+                       continue;
                }
 
                priv->children[i] = pd;
index ef1cf52f8bb99212a96e9fe415ebf81bbb1e21bf..088d3541c7d3d4485380dd859e9777c6e39c94d2 100644 (file)
@@ -1353,6 +1353,7 @@ static int elantech_set_properties(struct elantech_data *etd)
                case 6:
                case 7:
                case 8:
+               case 9:
                        etd->hw_version = 4;
                        break;
                default:
index d8d49d10f9bb60d477124bba603fb9f61be1efdb..ef9f4913450d12a06262dd906b8ebe93b0401dbe 100644 (file)
@@ -117,6 +117,44 @@ void synaptics_reset(struct psmouse *psmouse)
 }
 
 #ifdef CONFIG_MOUSE_PS2_SYNAPTICS
+/* This list has been kindly provided by Synaptics. */
+static const char * const topbuttonpad_pnp_ids[] = {
+       "LEN0017",
+       "LEN0018",
+       "LEN0019",
+       "LEN0023",
+       "LEN002A",
+       "LEN002B",
+       "LEN002C",
+       "LEN002D",
+       "LEN002E",
+       "LEN0033", /* Helix */
+       "LEN0034", /* T431s, T540, X1 Carbon 2nd */
+       "LEN0035", /* X240 */
+       "LEN0036", /* T440 */
+       "LEN0037",
+       "LEN0038",
+       "LEN0041",
+       "LEN0042", /* Yoga */
+       "LEN0045",
+       "LEN0046",
+       "LEN0047",
+       "LEN0048",
+       "LEN0049",
+       "LEN2000",
+       "LEN2001",
+       "LEN2002",
+       "LEN2003",
+       "LEN2004", /* L440 */
+       "LEN2005",
+       "LEN2006",
+       "LEN2007",
+       "LEN2008",
+       "LEN2009",
+       "LEN200A",
+       "LEN200B",
+       NULL
+};
 
 /*****************************************************************************
  *     Synaptics communications functions
@@ -1255,8 +1293,10 @@ static void set_abs_position_params(struct input_dev *dev,
        input_abs_set_res(dev, y_code, priv->y_res);
 }
 
-static void set_input_params(struct input_dev *dev, struct synaptics_data *priv)
+static void set_input_params(struct psmouse *psmouse,
+                            struct synaptics_data *priv)
 {
+       struct input_dev *dev = psmouse->dev;
        int i;
 
        /* Things that apply to both modes */
@@ -1325,6 +1365,17 @@ static void set_input_params(struct input_dev *dev, struct synaptics_data *priv)
 
        if (SYN_CAP_CLICKPAD(priv->ext_cap_0c)) {
                __set_bit(INPUT_PROP_BUTTONPAD, dev->propbit);
+               /* See if this buttonpad has a top button area */
+               if (!strncmp(psmouse->ps2dev.serio->firmware_id, "PNP:", 4)) {
+                       for (i = 0; topbuttonpad_pnp_ids[i]; i++) {
+                               if (strstr(psmouse->ps2dev.serio->firmware_id,
+                                          topbuttonpad_pnp_ids[i])) {
+                                       __set_bit(INPUT_PROP_TOPBUTTONPAD,
+                                                 dev->propbit);
+                                       break;
+                               }
+                       }
+               }
                /* Clickpads report only left button */
                __clear_bit(BTN_RIGHT, dev->keybit);
                __clear_bit(BTN_MIDDLE, dev->keybit);
@@ -1514,6 +1565,14 @@ static const struct dmi_system_id min_max_dmi_table[] __initconst = {
                },
                .driver_data = (int []){1232, 5710, 1156, 4696},
        },
+       {
+               /* Lenovo ThinkPad T431s */
+               .matches = {
+                       DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
+                       DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad T431"),
+               },
+               .driver_data = (int []){1024, 5112, 2024, 4832},
+       },
        {
                /* Lenovo ThinkPad T440s */
                .matches = {
@@ -1522,6 +1581,14 @@ static const struct dmi_system_id min_max_dmi_table[] __initconst = {
                },
                .driver_data = (int []){1024, 5112, 2024, 4832},
        },
+       {
+               /* Lenovo ThinkPad L440 */
+               .matches = {
+                       DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
+                       DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad L440"),
+               },
+               .driver_data = (int []){1024, 5112, 2024, 4832},
+       },
        {
                /* Lenovo ThinkPad T540p */
                .matches = {
@@ -1530,6 +1597,32 @@ static const struct dmi_system_id min_max_dmi_table[] __initconst = {
                },
                .driver_data = (int []){1024, 5056, 2058, 4832},
        },
+       {
+               /* Lenovo ThinkPad L540 */
+               .matches = {
+                       DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
+                       DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad L540"),
+               },
+               .driver_data = (int []){1024, 5112, 2024, 4832},
+       },
+       {
+               /* Lenovo Yoga S1 */
+               .matches = {
+                       DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
+                       DMI_EXACT_MATCH(DMI_PRODUCT_VERSION,
+                                       "ThinkPad S1 Yoga"),
+               },
+               .driver_data = (int []){1232, 5710, 1156, 4696},
+       },
+       {
+               /* Lenovo ThinkPad X1 Carbon Haswell (3rd generation) */
+               .matches = {
+                       DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
+                       DMI_MATCH(DMI_PRODUCT_VERSION,
+                                       "ThinkPad X1 Carbon 2nd"),
+               },
+               .driver_data = (int []){1024, 5112, 2024, 4832},
+       },
 #endif
        { }
 };
@@ -1593,7 +1686,7 @@ static int __synaptics_init(struct psmouse *psmouse, bool absolute_mode)
                     priv->capabilities, priv->ext_cap, priv->ext_cap_0c,
                     priv->board_id, priv->firmware_id);
 
-       set_input_params(psmouse->dev, priv);
+       set_input_params(psmouse, priv);
 
        /*
         * Encode touchpad model so that it can be used to set
index 0ec9abbe31fec3af5248808fce517fc863ff75b2..381b20d4c5618d8fc7f5c3e616479d4663d9ae03 100644 (file)
@@ -702,6 +702,17 @@ static int i8042_pnp_aux_irq;
 static char i8042_pnp_kbd_name[32];
 static char i8042_pnp_aux_name[32];
 
+static void i8042_pnp_id_to_string(struct pnp_id *id, char *dst, int dst_size)
+{
+       strlcpy(dst, "PNP:", dst_size);
+
+       while (id) {
+               strlcat(dst, " ", dst_size);
+               strlcat(dst, id->id, dst_size);
+               id = id->next;
+       }
+}
+
 static int i8042_pnp_kbd_probe(struct pnp_dev *dev, const struct pnp_device_id *did)
 {
        if (pnp_port_valid(dev, 0) && pnp_port_len(dev, 0) == 1)
@@ -718,6 +729,8 @@ static int i8042_pnp_kbd_probe(struct pnp_dev *dev, const struct pnp_device_id *
                strlcat(i8042_pnp_kbd_name, ":", sizeof(i8042_pnp_kbd_name));
                strlcat(i8042_pnp_kbd_name, pnp_dev_name(dev), sizeof(i8042_pnp_kbd_name));
        }
+       i8042_pnp_id_to_string(dev->id, i8042_kbd_firmware_id,
+                              sizeof(i8042_kbd_firmware_id));
 
        /* Keyboard ports are always supposed to be wakeup-enabled */
        device_set_wakeup_enable(&dev->dev, true);
@@ -742,6 +755,8 @@ static int i8042_pnp_aux_probe(struct pnp_dev *dev, const struct pnp_device_id *
                strlcat(i8042_pnp_aux_name, ":", sizeof(i8042_pnp_aux_name));
                strlcat(i8042_pnp_aux_name, pnp_dev_name(dev), sizeof(i8042_pnp_aux_name));
        }
+       i8042_pnp_id_to_string(dev->id, i8042_aux_firmware_id,
+                              sizeof(i8042_aux_firmware_id));
 
        i8042_pnp_aux_devices++;
        return 0;
index 020053fa5aaa38fce82b5fc2d6ced8546661c9df..3807c3e971cca79e6ff42b745409ac418487bb0c 100644 (file)
@@ -87,6 +87,8 @@ MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off");
 #endif
 
 static bool i8042_bypass_aux_irq_test;
+static char i8042_kbd_firmware_id[128];
+static char i8042_aux_firmware_id[128];
 
 #include "i8042.h"
 
@@ -1218,6 +1220,8 @@ static int __init i8042_create_kbd_port(void)
        serio->dev.parent       = &i8042_platform_device->dev;
        strlcpy(serio->name, "i8042 KBD port", sizeof(serio->name));
        strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys));
+       strlcpy(serio->firmware_id, i8042_kbd_firmware_id,
+               sizeof(serio->firmware_id));
 
        port->serio = serio;
        port->irq = I8042_KBD_IRQ;
@@ -1244,6 +1248,8 @@ static int __init i8042_create_aux_port(int idx)
        if (idx < 0) {
                strlcpy(serio->name, "i8042 AUX port", sizeof(serio->name));
                strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys));
+               strlcpy(serio->firmware_id, i8042_aux_firmware_id,
+                       sizeof(serio->firmware_id));
                serio->close = i8042_port_close;
        } else {
                snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx);
index 8f4c4ab04bc2d8c61d5fda2a65696806e61ad6f2..b29134de983b85ff2df85ba171d8e4a7f8cdac5b 100644 (file)
@@ -451,6 +451,13 @@ static ssize_t serio_set_bind_mode(struct device *dev, struct device_attribute *
        return retval;
 }
 
+static ssize_t firmware_id_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+       struct serio *serio = to_serio_port(dev);
+
+       return sprintf(buf, "%s\n", serio->firmware_id);
+}
+
 static DEVICE_ATTR_RO(type);
 static DEVICE_ATTR_RO(proto);
 static DEVICE_ATTR_RO(id);
@@ -473,12 +480,14 @@ static DEVICE_ATTR_RO(modalias);
 static DEVICE_ATTR_WO(drvctl);
 static DEVICE_ATTR(description, S_IRUGO, serio_show_description, NULL);
 static DEVICE_ATTR(bind_mode, S_IWUSR | S_IRUGO, serio_show_bind_mode, serio_set_bind_mode);
+static DEVICE_ATTR_RO(firmware_id);
 
 static struct attribute *serio_device_attrs[] = {
        &dev_attr_modalias.attr,
        &dev_attr_description.attr,
        &dev_attr_drvctl.attr,
        &dev_attr_bind_mode.attr,
+       &dev_attr_firmware_id.attr,
        NULL
 };
 
@@ -921,9 +930,14 @@ static int serio_uevent(struct device *dev, struct kobj_uevent_env *env)
        SERIO_ADD_UEVENT_VAR("SERIO_PROTO=%02x", serio->id.proto);
        SERIO_ADD_UEVENT_VAR("SERIO_ID=%02x", serio->id.id);
        SERIO_ADD_UEVENT_VAR("SERIO_EXTRA=%02x", serio->id.extra);
+
        SERIO_ADD_UEVENT_VAR("MODALIAS=serio:ty%02Xpr%02Xid%02Xex%02X",
                                serio->id.type, serio->id.proto, serio->id.id, serio->id.extra);
 
+       if (serio->firmware_id[0])
+               SERIO_ADD_UEVENT_VAR("SERIO_FIRMWARE_ID=%s",
+                                    serio->firmware_id);
+
        return 0;
 }
 #undef SERIO_ADD_UEVENT_VAR
index b16ebef5b9111c7a999845300e1c33070f2a31b4..611fc3905d00d9fafa7cf1088b28f6c22fccca28 100644 (file)
 #define HID_USAGE_PAGE_DIGITIZER       0x0d
 #define HID_USAGE_PAGE_DESKTOP         0x01
 #define HID_USAGE                      0x09
-#define HID_USAGE_X                    0x30
-#define HID_USAGE_Y                    0x31
-#define HID_USAGE_X_TILT               0x3d
-#define HID_USAGE_Y_TILT               0x3e
-#define HID_USAGE_FINGER               0x22
-#define HID_USAGE_STYLUS               0x20
-#define HID_USAGE_CONTACTMAX           0x55
+#define HID_USAGE_X                    ((HID_USAGE_PAGE_DESKTOP << 16) | 0x30)
+#define HID_USAGE_Y                    ((HID_USAGE_PAGE_DESKTOP << 16) | 0x31)
+#define HID_USAGE_PRESSURE             ((HID_USAGE_PAGE_DIGITIZER << 16) | 0x30)
+#define HID_USAGE_X_TILT               ((HID_USAGE_PAGE_DIGITIZER << 16) | 0x3d)
+#define HID_USAGE_Y_TILT               ((HID_USAGE_PAGE_DIGITIZER << 16) | 0x3e)
+#define HID_USAGE_FINGER               ((HID_USAGE_PAGE_DIGITIZER << 16) | 0x22)
+#define HID_USAGE_STYLUS               ((HID_USAGE_PAGE_DIGITIZER << 16) | 0x20)
+#define HID_USAGE_CONTACTMAX           ((HID_USAGE_PAGE_DIGITIZER << 16) | 0x55)
 #define HID_COLLECTION                 0xa1
 #define HID_COLLECTION_LOGICAL         0x02
 #define HID_COLLECTION_END             0xc0
 
-enum {
-       WCM_UNDEFINED = 0,
-       WCM_DESKTOP,
-       WCM_DIGITIZER,
-};
-
 struct hid_descriptor {
        struct usb_descriptor_header header;
        __le16   bcdHID;
@@ -305,7 +300,7 @@ static int wacom_parse_hid(struct usb_interface *intf,
        char limit = 0;
        /* result has to be defined as int for some devices */
        int result = 0, touch_max = 0;
-       int i = 0, usage = WCM_UNDEFINED, finger = 0, pen = 0;
+       int i = 0, page = 0, finger = 0, pen = 0;
        unsigned char *report;
 
        report = kzalloc(hid_desc->wDescriptorLength, GFP_KERNEL);
@@ -332,134 +327,121 @@ static int wacom_parse_hid(struct usb_interface *intf,
 
                switch (report[i]) {
                case HID_USAGE_PAGE:
-                       switch (report[i + 1]) {
-                       case HID_USAGE_PAGE_DIGITIZER:
-                               usage = WCM_DIGITIZER;
-                               i++;
-                               break;
-
-                       case HID_USAGE_PAGE_DESKTOP:
-                               usage = WCM_DESKTOP;
-                               i++;
-                               break;
-                       }
+                       page = report[i + 1];
+                       i++;
                        break;
 
                case HID_USAGE:
-                       switch (report[i + 1]) {
+                       switch (page << 16 | report[i + 1]) {
                        case HID_USAGE_X:
-                               if (usage == WCM_DESKTOP) {
-                                       if (finger) {
-                                               features->device_type = BTN_TOOL_FINGER;
-                                               /* touch device at least supports one touch point */
-                                               touch_max = 1;
-                                               switch (features->type) {
-                                               case TABLETPC2FG:
-                                                       features->pktlen = WACOM_PKGLEN_TPC2FG;
-                                                       break;
-
-                                               case MTSCREEN:
-                                               case WACOM_24HDT:
-                                                       features->pktlen = WACOM_PKGLEN_MTOUCH;
-                                                       break;
-
-                                               case MTTPC:
-                                                       features->pktlen = WACOM_PKGLEN_MTTPC;
-                                                       break;
-
-                                               case BAMBOO_PT:
-                                                       features->pktlen = WACOM_PKGLEN_BBTOUCH;
-                                                       break;
-
-                                               default:
-                                                       features->pktlen = WACOM_PKGLEN_GRAPHIRE;
-                                                       break;
-                                               }
-
-                                               switch (features->type) {
-                                               case BAMBOO_PT:
-                                                       features->x_phy =
-                                                               get_unaligned_le16(&report[i + 5]);
-                                                       features->x_max =
-                                                               get_unaligned_le16(&report[i + 8]);
-                                                       i += 15;
-                                                       break;
-
-                                               case WACOM_24HDT:
-                                                       features->x_max =
-                                                               get_unaligned_le16(&report[i + 3]);
-                                                       features->x_phy =
-                                                               get_unaligned_le16(&report[i + 8]);
-                                                       features->unit = report[i - 1];
-                                                       features->unitExpo = report[i - 3];
-                                                       i += 12;
-                                                       break;
-
-                                               default:
-                                                       features->x_max =
-                                                               get_unaligned_le16(&report[i + 3]);
-                                                       features->x_phy =
-                                                               get_unaligned_le16(&report[i + 6]);
-                                                       features->unit = report[i + 9];
-                                                       features->unitExpo = report[i + 11];
-                                                       i += 12;
-                                                       break;
-                                               }
-                                       } else if (pen) {
-                                               /* penabled only accepts exact bytes of data */
-                                               if (features->type >= TABLETPC)
-                                                       features->pktlen = WACOM_PKGLEN_GRAPHIRE;
-                                               features->device_type = BTN_TOOL_PEN;
+                               if (finger) {
+                                       features->device_type = BTN_TOOL_FINGER;
+                                       /* touch device at least supports one touch point */
+                                       touch_max = 1;
+                                       switch (features->type) {
+                                       case TABLETPC2FG:
+                                               features->pktlen = WACOM_PKGLEN_TPC2FG;
+                                               break;
+
+                                       case MTSCREEN:
+                                       case WACOM_24HDT:
+                                               features->pktlen = WACOM_PKGLEN_MTOUCH;
+                                               break;
+
+                                       case MTTPC:
+                                               features->pktlen = WACOM_PKGLEN_MTTPC;
+                                               break;
+
+                                       case BAMBOO_PT:
+                                               features->pktlen = WACOM_PKGLEN_BBTOUCH;
+                                               break;
+
+                                       default:
+                                               features->pktlen = WACOM_PKGLEN_GRAPHIRE;
+                                               break;
+                                       }
+
+                                       switch (features->type) {
+                                       case BAMBOO_PT:
+                                               features->x_phy =
+                                                       get_unaligned_le16(&report[i + 5]);
+                                               features->x_max =
+                                                       get_unaligned_le16(&report[i + 8]);
+                                               i += 15;
+                                               break;
+
+                                       case WACOM_24HDT:
                                                features->x_max =
                                                        get_unaligned_le16(&report[i + 3]);
-                                               i += 4;
+                                               features->x_phy =
+                                                       get_unaligned_le16(&report[i + 8]);
+                                               features->unit = report[i - 1];
+                                               features->unitExpo = report[i - 3];
+                                               i += 12;
+                                               break;
+
+                                       default:
+                                               features->x_max =
+                                                       get_unaligned_le16(&report[i + 3]);
+                                               features->x_phy =
+                                                       get_unaligned_le16(&report[i + 6]);
+                                               features->unit = report[i + 9];
+                                               features->unitExpo = report[i + 11];
+                                               i += 12;
+                                               break;
                                        }
+                               } else if (pen) {
+                                       /* penabled only accepts exact bytes of data */
+                                       if (features->type >= TABLETPC)
+                                               features->pktlen = WACOM_PKGLEN_GRAPHIRE;
+                                       features->device_type = BTN_TOOL_PEN;
+                                       features->x_max =
+                                               get_unaligned_le16(&report[i + 3]);
+                                       i += 4;
                                }
                                break;
 
                        case HID_USAGE_Y:
-                               if (usage == WCM_DESKTOP) {
-                                       if (finger) {
-                                               switch (features->type) {
-                                               case TABLETPC2FG:
-                                               case MTSCREEN:
-                                               case MTTPC:
-                                                       features->y_max =
-                                                               get_unaligned_le16(&report[i + 3]);
-                                                       features->y_phy =
-                                                               get_unaligned_le16(&report[i + 6]);
-                                                       i += 7;
-                                                       break;
-
-                                               case WACOM_24HDT:
-                                                       features->y_max =
-                                                               get_unaligned_le16(&report[i + 3]);
-                                                       features->y_phy =
-                                                               get_unaligned_le16(&report[i - 2]);
-                                                       i += 7;
-                                                       break;
-
-                                               case BAMBOO_PT:
-                                                       features->y_phy =
-                                                               get_unaligned_le16(&report[i + 3]);
-                                                       features->y_max =
-                                                               get_unaligned_le16(&report[i + 6]);
-                                                       i += 12;
-                                                       break;
-
-                                               default:
-                                                       features->y_max =
-                                                               features->x_max;
-                                                       features->y_phy =
-                                                               get_unaligned_le16(&report[i + 3]);
-                                                       i += 4;
-                                                       break;
-                                               }
-                                       } else if (pen) {
+                               if (finger) {
+                                       switch (features->type) {
+                                       case TABLETPC2FG:
+                                       case MTSCREEN:
+                                       case MTTPC:
+                                               features->y_max =
+                                                       get_unaligned_le16(&report[i + 3]);
+                                               features->y_phy =
+                                                       get_unaligned_le16(&report[i + 6]);
+                                               i += 7;
+                                               break;
+
+                                       case WACOM_24HDT:
+                                               features->y_max =
+                                                       get_unaligned_le16(&report[i + 3]);
+                                               features->y_phy =
+                                                       get_unaligned_le16(&report[i - 2]);
+                                               i += 7;
+                                               break;
+
+                                       case BAMBOO_PT:
+                                               features->y_phy =
+                                                       get_unaligned_le16(&report[i + 3]);
+                                               features->y_max =
+                                                       get_unaligned_le16(&report[i + 6]);
+                                               i += 12;
+                                               break;
+
+                                       default:
                                                features->y_max =
+                                                       features->x_max;
+                                               features->y_phy =
                                                        get_unaligned_le16(&report[i + 3]);
                                                i += 4;
+                                               break;
                                        }
+                               } else if (pen) {
+                                       features->y_max =
+                                               get_unaligned_le16(&report[i + 3]);
+                                       i += 4;
                                }
                                break;
 
@@ -484,12 +466,20 @@ static int wacom_parse_hid(struct usb_interface *intf,
                                        wacom_retrieve_report_data(intf, features);
                                i++;
                                break;
+
+                       case HID_USAGE_PRESSURE:
+                               if (pen) {
+                                       features->pressure_max =
+                                               get_unaligned_le16(&report[i + 3]);
+                                       i += 4;
+                               }
+                               break;
                        }
                        break;
 
                case HID_COLLECTION_END:
                        /* reset UsagePage and Finger */
-                       finger = usage = 0;
+                       finger = page = 0;
                        break;
 
                case HID_COLLECTION:
index 05f371df6c400a882621c13509f6a13a40eed077..4822c57a3756f4e3175fac3e1def90611028eb6d 100644 (file)
@@ -178,10 +178,9 @@ static int wacom_ptu_irq(struct wacom_wac *wacom)
 
 static int wacom_dtu_irq(struct wacom_wac *wacom)
 {
-       struct wacom_features *features = &wacom->features;
-       char *data = wacom->data;
+       unsigned char *data = wacom->data;
        struct input_dev *input = wacom->input;
-       int prox = data[1] & 0x20, pressure;
+       int prox = data[1] & 0x20;
 
        dev_dbg(input->dev.parent,
                "%s: received report #%d", __func__, data[0]);
@@ -198,10 +197,7 @@ static int wacom_dtu_irq(struct wacom_wac *wacom)
        input_report_key(input, BTN_STYLUS2, data[1] & 0x10);
        input_report_abs(input, ABS_X, le16_to_cpup((__le16 *)&data[2]));
        input_report_abs(input, ABS_Y, le16_to_cpup((__le16 *)&data[4]));
-       pressure = ((data[7] & 0x01) << 8) | data[6];
-       if (pressure < 0)
-               pressure = features->pressure_max + pressure + 1;
-       input_report_abs(input, ABS_PRESSURE, pressure);
+       input_report_abs(input, ABS_PRESSURE, ((data[7] & 0x01) << 8) | data[6]);
        input_report_key(input, BTN_TOUCH, data[1] & 0x05);
        if (!prox) /* out-prox */
                wacom->id[0] = 0;
@@ -906,7 +902,7 @@ static int int_dist(int x1, int y1, int x2, int y2)
 static int wacom_24hdt_irq(struct wacom_wac *wacom)
 {
        struct input_dev *input = wacom->input;
-       char *data = wacom->data;
+       unsigned char *data = wacom->data;
        int i;
        int current_num_contacts = data[61];
        int contacts_to_send = 0;
@@ -959,7 +955,7 @@ static int wacom_24hdt_irq(struct wacom_wac *wacom)
 static int wacom_mt_touch(struct wacom_wac *wacom)
 {
        struct input_dev *input = wacom->input;
-       char *data = wacom->data;
+       unsigned char *data = wacom->data;
        int i;
        int current_num_contacts = data[2];
        int contacts_to_send = 0;
@@ -1038,7 +1034,7 @@ static int wacom_tpc_mt_touch(struct wacom_wac *wacom)
 
 static int wacom_tpc_single_touch(struct wacom_wac *wacom, size_t len)
 {
-       char *data = wacom->data;
+       unsigned char *data = wacom->data;
        struct input_dev *input = wacom->input;
        bool prox;
        int x = 0, y = 0;
@@ -1074,10 +1070,8 @@ static int wacom_tpc_single_touch(struct wacom_wac *wacom, size_t len)
 
 static int wacom_tpc_pen(struct wacom_wac *wacom)
 {
-       struct wacom_features *features = &wacom->features;
-       char *data = wacom->data;
+       unsigned char *data = wacom->data;
        struct input_dev *input = wacom->input;
-       int pressure;
        bool prox = data[1] & 0x20;
 
        if (!wacom->shared->stylus_in_proximity) /* first in prox */
@@ -1093,10 +1087,7 @@ static int wacom_tpc_pen(struct wacom_wac *wacom)
                input_report_key(input, BTN_STYLUS2, data[1] & 0x10);
                input_report_abs(input, ABS_X, le16_to_cpup((__le16 *)&data[2]));
                input_report_abs(input, ABS_Y, le16_to_cpup((__le16 *)&data[4]));
-               pressure = ((data[7] & 0x01) << 8) | data[6];
-               if (pressure < 0)
-                       pressure = features->pressure_max + pressure + 1;
-               input_report_abs(input, ABS_PRESSURE, pressure);
+               input_report_abs(input, ABS_PRESSURE, ((data[7] & 0x03) << 8) | data[6]);
                input_report_key(input, BTN_TOUCH, data[1] & 0x05);
                input_report_key(input, wacom->tool[0], prox);
                return 1;
@@ -1107,7 +1098,7 @@ static int wacom_tpc_pen(struct wacom_wac *wacom)
 
 static int wacom_tpc_irq(struct wacom_wac *wacom, size_t len)
 {
-       char *data = wacom->data;
+       unsigned char *data = wacom->data;
 
        dev_dbg(wacom->input->dev.parent,
                "%s: received report #%d\n", __func__, data[0]);
@@ -1838,7 +1829,7 @@ int wacom_setup_input_capabilities(struct input_dev *input_dev,
        case DTU:
                if (features->type == DTUS) {
                        input_set_capability(input_dev, EV_MSC, MSC_SERIAL);
-                       for (i = 0; i < 3; i++)
+                       for (i = 0; i < 4; i++)
                                __set_bit(BTN_0 + i, input_dev->keybit);
                }
                __set_bit(BTN_TOOL_PEN, input_dev->keybit);
index 68edc9db2c6446c7534a0a5708d1b01e2c5ced98..0b5965ba51bc591c2c67e7416ec1b2a06a6ad47b 100644 (file)
@@ -550,18 +550,6 @@ config TOUCHSCREEN_TI_AM335X_TSC
          To compile this driver as a module, choose M here: the
          module will be called ti_am335x_tsc.
 
-config TOUCHSCREEN_ATMEL_TSADCC
-       tristate "Atmel Touchscreen Interface"
-       depends on ARCH_AT91
-       help
-         Say Y here if you have a 4-wire touchscreen connected to the
-          ADC Controller on your Atmel SoC.
-
-         If unsure, say N.
-
-         To compile this driver as a module, choose M here: the
-         module will be called atmel_tsadcc.
-
 config TOUCHSCREEN_UCB1400
        tristate "Philips UCB1400 touchscreen"
        depends on AC97_BUS
index 4bc954b7c7c305393b9be4f0b07d5ca35ff64380..03f12a1f221819494139af161352f58689a4702a 100644 (file)
@@ -13,7 +13,6 @@ obj-$(CONFIG_TOUCHSCREEN_AD7879_I2C)  += ad7879-i2c.o
 obj-$(CONFIG_TOUCHSCREEN_AD7879_SPI)   += ad7879-spi.o
 obj-$(CONFIG_TOUCHSCREEN_ADS7846)      += ads7846.o
 obj-$(CONFIG_TOUCHSCREEN_ATMEL_MXT)    += atmel_mxt_ts.o
-obj-$(CONFIG_TOUCHSCREEN_ATMEL_TSADCC) += atmel_tsadcc.o
 obj-$(CONFIG_TOUCHSCREEN_AUO_PIXCIR)   += auo-pixcir-ts.o
 obj-$(CONFIG_TOUCHSCREEN_BU21013)      += bu21013_ts.o
 obj-$(CONFIG_TOUCHSCREEN_CY8CTMG110)   += cy8ctmg110_ts.o
index 45a06e495ed25702831441da6be558fa88491671..7f8aa981500d88c10d8b23cc19f489befe7bedd6 100644 (file)
@@ -425,7 +425,7 @@ static int ads7845_read12_ser(struct device *dev, unsigned command)
 name ## _show(struct device *dev, struct device_attribute *attr, char *buf) \
 { \
        struct ads7846 *ts = dev_get_drvdata(dev); \
-       ssize_t v = ads7846_read12_ser(dev, \
+       ssize_t v = ads7846_read12_ser(&ts->spi->dev, \
                        READ_12BIT_SER(var)); \
        if (v < 0) \
                return v; \
diff --git a/drivers/input/touchscreen/atmel_tsadcc.c b/drivers/input/touchscreen/atmel_tsadcc.c
deleted file mode 100644 (file)
index a7c9d69..0000000
+++ /dev/null
@@ -1,358 +0,0 @@
-/*
- *  Atmel Touch Screen Driver
- *
- *  Copyright (c) 2008 ATMEL
- *  Copyright (c) 2008 Dan Liang
- *  Copyright (c) 2008 TimeSys Corporation
- *  Copyright (c) 2008 Justin Waters
- *
- *  Based on touchscreen code from Atmel Corporation.
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License version 2 as
- *  published by the Free Software Foundation.
- */
-#include <linux/err.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/input.h>
-#include <linux/slab.h>
-#include <linux/interrupt.h>
-#include <linux/clk.h>
-#include <linux/platform_device.h>
-#include <linux/io.h>
-#include <linux/platform_data/atmel.h>
-#include <mach/cpu.h>
-
-/* Register definitions based on AT91SAM9RL64 preliminary draft datasheet */
-
-#define ATMEL_TSADCC_CR                0x00    /* Control register */
-#define   ATMEL_TSADCC_SWRST   (1 << 0)        /* Software Reset*/
-#define          ATMEL_TSADCC_START    (1 << 1)        /* Start conversion */
-
-#define ATMEL_TSADCC_MR                0x04    /* Mode register */
-#define          ATMEL_TSADCC_TSAMOD   (3    <<  0)    /* ADC mode */
-#define            ATMEL_TSADCC_TSAMOD_ADC_ONLY_MODE   (0x0)   /* ADC Mode */
-#define            ATMEL_TSADCC_TSAMOD_TS_ONLY_MODE    (0x1)   /* Touch Screen Only Mode */
-#define          ATMEL_TSADCC_LOWRES   (1    <<  4)    /* Resolution selection */
-#define          ATMEL_TSADCC_SLEEP    (1    <<  5)    /* Sleep mode */
-#define          ATMEL_TSADCC_PENDET   (1    <<  6)    /* Pen Detect selection */
-#define          ATMEL_TSADCC_PRES     (1    <<  7)    /* Pressure Measurement Selection */
-#define          ATMEL_TSADCC_PRESCAL  (0x3f <<  8)    /* Prescalar Rate Selection */
-#define          ATMEL_TSADCC_EPRESCAL (0xff <<  8)    /* Prescalar Rate Selection (Extended) */
-#define          ATMEL_TSADCC_STARTUP  (0x7f << 16)    /* Start Up time */
-#define          ATMEL_TSADCC_SHTIM    (0xf  << 24)    /* Sample & Hold time */
-#define          ATMEL_TSADCC_PENDBC   (0xf  << 28)    /* Pen Detect debouncing time */
-
-#define ATMEL_TSADCC_TRGR      0x08    /* Trigger register */
-#define          ATMEL_TSADCC_TRGMOD   (7      <<  0)  /* Trigger mode */
-#define            ATMEL_TSADCC_TRGMOD_NONE            (0 << 0)
-#define     ATMEL_TSADCC_TRGMOD_EXT_RISING     (1 << 0)
-#define     ATMEL_TSADCC_TRGMOD_EXT_FALLING    (2 << 0)
-#define     ATMEL_TSADCC_TRGMOD_EXT_ANY                (3 << 0)
-#define     ATMEL_TSADCC_TRGMOD_PENDET         (4 << 0)
-#define     ATMEL_TSADCC_TRGMOD_PERIOD         (5 << 0)
-#define     ATMEL_TSADCC_TRGMOD_CONTINUOUS     (6 << 0)
-#define   ATMEL_TSADCC_TRGPER  (0xffff << 16)  /* Trigger period */
-
-#define ATMEL_TSADCC_TSR       0x0C    /* Touch Screen register */
-#define          ATMEL_TSADCC_TSFREQ   (0xf <<  0)     /* TS Frequency in Interleaved mode */
-#define          ATMEL_TSADCC_TSSHTIM  (0xf << 24)     /* Sample & Hold time */
-
-#define ATMEL_TSADCC_CHER      0x10    /* Channel Enable register */
-#define ATMEL_TSADCC_CHDR      0x14    /* Channel Disable register */
-#define ATMEL_TSADCC_CHSR      0x18    /* Channel Status register */
-#define          ATMEL_TSADCC_CH(n)    (1 << (n))      /* Channel number */
-
-#define ATMEL_TSADCC_SR                0x1C    /* Status register */
-#define          ATMEL_TSADCC_EOC(n)   (1 << ((n)+0))  /* End of conversion for channel N */
-#define          ATMEL_TSADCC_OVRE(n)  (1 << ((n)+8))  /* Overrun error for channel N */
-#define          ATMEL_TSADCC_DRDY     (1 << 16)       /* Data Ready */
-#define          ATMEL_TSADCC_GOVRE    (1 << 17)       /* General Overrun Error */
-#define          ATMEL_TSADCC_ENDRX    (1 << 18)       /* End of RX Buffer */
-#define          ATMEL_TSADCC_RXBUFF   (1 << 19)       /* TX Buffer full */
-#define          ATMEL_TSADCC_PENCNT   (1 << 20)       /* Pen contact */
-#define          ATMEL_TSADCC_NOCNT    (1 << 21)       /* No contact */
-
-#define ATMEL_TSADCC_LCDR      0x20    /* Last Converted Data register */
-#define          ATMEL_TSADCC_DATA     (0x3ff << 0)    /* Channel data */
-
-#define ATMEL_TSADCC_IER       0x24    /* Interrupt Enable register */
-#define ATMEL_TSADCC_IDR       0x28    /* Interrupt Disable register */
-#define ATMEL_TSADCC_IMR       0x2C    /* Interrupt Mask register */
-#define ATMEL_TSADCC_CDR0      0x30    /* Channel Data 0 */
-#define ATMEL_TSADCC_CDR1      0x34    /* Channel Data 1 */
-#define ATMEL_TSADCC_CDR2      0x38    /* Channel Data 2 */
-#define ATMEL_TSADCC_CDR3      0x3C    /* Channel Data 3 */
-#define ATMEL_TSADCC_CDR4      0x40    /* Channel Data 4 */
-#define ATMEL_TSADCC_CDR5      0x44    /* Channel Data 5 */
-
-#define ATMEL_TSADCC_XPOS      0x50
-#define ATMEL_TSADCC_Z1DAT     0x54
-#define ATMEL_TSADCC_Z2DAT     0x58
-
-#define PRESCALER_VAL(x)       ((x) >> 8)
-
-#define ADC_DEFAULT_CLOCK      100000
-
-struct atmel_tsadcc {
-       struct input_dev        *input;
-       char                    phys[32];
-       struct clk              *clk;
-       int                     irq;
-       unsigned int            prev_absx;
-       unsigned int            prev_absy;
-       unsigned char           bufferedmeasure;
-};
-
-static void __iomem            *tsc_base;
-
-#define atmel_tsadcc_read(reg)         __raw_readl(tsc_base + (reg))
-#define atmel_tsadcc_write(reg, val)   __raw_writel((val), tsc_base + (reg))
-
-static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev)
-{
-       struct atmel_tsadcc     *ts_dev = (struct atmel_tsadcc *)dev;
-       struct input_dev        *input_dev = ts_dev->input;
-
-       unsigned int status;
-       unsigned int reg;
-
-       status = atmel_tsadcc_read(ATMEL_TSADCC_SR);
-       status &= atmel_tsadcc_read(ATMEL_TSADCC_IMR);
-
-       if (status & ATMEL_TSADCC_NOCNT) {
-               /* Contact lost */
-               reg = atmel_tsadcc_read(ATMEL_TSADCC_MR) | ATMEL_TSADCC_PENDBC;
-
-               atmel_tsadcc_write(ATMEL_TSADCC_MR, reg);
-               atmel_tsadcc_write(ATMEL_TSADCC_TRGR, ATMEL_TSADCC_TRGMOD_NONE);
-               atmel_tsadcc_write(ATMEL_TSADCC_IDR,
-                                  ATMEL_TSADCC_EOC(3) | ATMEL_TSADCC_NOCNT);
-               atmel_tsadcc_write(ATMEL_TSADCC_IER, ATMEL_TSADCC_PENCNT);
-
-               input_report_key(input_dev, BTN_TOUCH, 0);
-               ts_dev->bufferedmeasure = 0;
-               input_sync(input_dev);
-
-       } else if (status & ATMEL_TSADCC_PENCNT) {
-               /* Pen detected */
-               reg = atmel_tsadcc_read(ATMEL_TSADCC_MR);
-               reg &= ~ATMEL_TSADCC_PENDBC;
-
-               atmel_tsadcc_write(ATMEL_TSADCC_IDR, ATMEL_TSADCC_PENCNT);
-               atmel_tsadcc_write(ATMEL_TSADCC_MR, reg);
-               atmel_tsadcc_write(ATMEL_TSADCC_IER,
-                                  ATMEL_TSADCC_EOC(3) | ATMEL_TSADCC_NOCNT);
-               atmel_tsadcc_write(ATMEL_TSADCC_TRGR,
-                                  ATMEL_TSADCC_TRGMOD_PERIOD | (0x0FFF << 16));
-
-       } else if (status & ATMEL_TSADCC_EOC(3)) {
-               /* Conversion finished */
-
-               if (ts_dev->bufferedmeasure) {
-                       /* Last measurement is always discarded, since it can
-                        * be erroneous.
-                        * Always report previous measurement */
-                       input_report_abs(input_dev, ABS_X, ts_dev->prev_absx);
-                       input_report_abs(input_dev, ABS_Y, ts_dev->prev_absy);
-                       input_report_key(input_dev, BTN_TOUCH, 1);
-                       input_sync(input_dev);
-               } else
-                       ts_dev->bufferedmeasure = 1;
-
-               /* Now make new measurement */
-               ts_dev->prev_absx = atmel_tsadcc_read(ATMEL_TSADCC_CDR3) << 10;
-               ts_dev->prev_absx /= atmel_tsadcc_read(ATMEL_TSADCC_CDR2);
-
-               ts_dev->prev_absy = atmel_tsadcc_read(ATMEL_TSADCC_CDR1) << 10;
-               ts_dev->prev_absy /= atmel_tsadcc_read(ATMEL_TSADCC_CDR0);
-       }
-
-       return IRQ_HANDLED;
-}
-
-/*
- * The functions for inserting/removing us as a module.
- */
-
-static int atmel_tsadcc_probe(struct platform_device *pdev)
-{
-       struct atmel_tsadcc     *ts_dev;
-       struct input_dev        *input_dev;
-       struct resource         *res;
-       struct at91_tsadcc_data *pdata = dev_get_platdata(&pdev->dev);
-       int             err;
-       unsigned int    prsc;
-       unsigned int    reg;
-
-       if (!pdata)
-               return -EINVAL;
-
-       res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-       if (!res) {
-               dev_err(&pdev->dev, "no mmio resource defined.\n");
-               return -ENXIO;
-       }
-
-       /* Allocate memory for device */
-       ts_dev = kzalloc(sizeof(struct atmel_tsadcc), GFP_KERNEL);
-       if (!ts_dev) {
-               dev_err(&pdev->dev, "failed to allocate memory.\n");
-               return -ENOMEM;
-       }
-       platform_set_drvdata(pdev, ts_dev);
-
-       input_dev = input_allocate_device();
-       if (!input_dev) {
-               dev_err(&pdev->dev, "failed to allocate input device.\n");
-               err = -EBUSY;
-               goto err_free_mem;
-       }
-
-       ts_dev->irq = platform_get_irq(pdev, 0);
-       if (ts_dev->irq < 0) {
-               dev_err(&pdev->dev, "no irq ID is designated.\n");
-               err = -ENODEV;
-               goto err_free_dev;
-       }
-
-       if (!request_mem_region(res->start, resource_size(res),
-                               "atmel tsadcc regs")) {
-               dev_err(&pdev->dev, "resources is unavailable.\n");
-               err = -EBUSY;
-               goto err_free_dev;
-       }
-
-       tsc_base = ioremap(res->start, resource_size(res));
-       if (!tsc_base) {
-               dev_err(&pdev->dev, "failed to map registers.\n");
-               err = -ENOMEM;
-               goto err_release_mem;
-       }
-
-       err = request_irq(ts_dev->irq, atmel_tsadcc_interrupt, 0,
-                       pdev->dev.driver->name, ts_dev);
-       if (err) {
-               dev_err(&pdev->dev, "failed to allocate irq.\n");
-               goto err_unmap_regs;
-       }
-
-       ts_dev->clk = clk_get(&pdev->dev, "tsc_clk");
-       if (IS_ERR(ts_dev->clk)) {
-               dev_err(&pdev->dev, "failed to get ts_clk\n");
-               err = PTR_ERR(ts_dev->clk);
-               goto err_free_irq;
-       }
-
-       ts_dev->input = input_dev;
-       ts_dev->bufferedmeasure = 0;
-
-       snprintf(ts_dev->phys, sizeof(ts_dev->phys),
-                "%s/input0", dev_name(&pdev->dev));
-
-       input_dev->name = "atmel touch screen controller";
-       input_dev->phys = ts_dev->phys;
-       input_dev->dev.parent = &pdev->dev;
-
-       __set_bit(EV_ABS, input_dev->evbit);
-       input_set_abs_params(input_dev, ABS_X, 0, 0x3FF, 0, 0);
-       input_set_abs_params(input_dev, ABS_Y, 0, 0x3FF, 0, 0);
-
-       input_set_capability(input_dev, EV_KEY, BTN_TOUCH);
-
-       /* clk_enable() always returns 0, no need to check it */
-       clk_enable(ts_dev->clk);
-
-       prsc = clk_get_rate(ts_dev->clk);
-       dev_info(&pdev->dev, "Master clock is set at: %d Hz\n", prsc);
-
-       if (!pdata->adc_clock)
-               pdata->adc_clock = ADC_DEFAULT_CLOCK;
-
-       prsc = (prsc / (2 * pdata->adc_clock)) - 1;
-
-       /* saturate if this value is too high */
-       if (cpu_is_at91sam9rl()) {
-               if (prsc > PRESCALER_VAL(ATMEL_TSADCC_PRESCAL))
-                       prsc = PRESCALER_VAL(ATMEL_TSADCC_PRESCAL);
-       } else {
-               if (prsc > PRESCALER_VAL(ATMEL_TSADCC_EPRESCAL))
-                       prsc = PRESCALER_VAL(ATMEL_TSADCC_EPRESCAL);
-       }
-
-       dev_info(&pdev->dev, "Prescaler is set at: %d\n", prsc);
-
-       reg = ATMEL_TSADCC_TSAMOD_TS_ONLY_MODE          |
-               ((0x00 << 5) & ATMEL_TSADCC_SLEEP)      |       /* Normal Mode */
-               ((0x01 << 6) & ATMEL_TSADCC_PENDET)     |       /* Enable Pen Detect */
-               (prsc << 8)                             |
-               ((0x26 << 16) & ATMEL_TSADCC_STARTUP)   |
-               ((pdata->pendet_debounce << 28) & ATMEL_TSADCC_PENDBC);
-
-       atmel_tsadcc_write(ATMEL_TSADCC_CR, ATMEL_TSADCC_SWRST);
-       atmel_tsadcc_write(ATMEL_TSADCC_MR, reg);
-       atmel_tsadcc_write(ATMEL_TSADCC_TRGR, ATMEL_TSADCC_TRGMOD_NONE);
-       atmel_tsadcc_write(ATMEL_TSADCC_TSR,
-               (pdata->ts_sample_hold_time << 24) & ATMEL_TSADCC_TSSHTIM);
-
-       atmel_tsadcc_read(ATMEL_TSADCC_SR);
-       atmel_tsadcc_write(ATMEL_TSADCC_IER, ATMEL_TSADCC_PENCNT);
-
-       /* All went ok, so register to the input system */
-       err = input_register_device(input_dev);
-       if (err)
-               goto err_fail;
-
-       return 0;
-
-err_fail:
-       clk_disable(ts_dev->clk);
-       clk_put(ts_dev->clk);
-err_free_irq:
-       free_irq(ts_dev->irq, ts_dev);
-err_unmap_regs:
-       iounmap(tsc_base);
-err_release_mem:
-       release_mem_region(res->start, resource_size(res));
-err_free_dev:
-       input_free_device(input_dev);
-err_free_mem:
-       kfree(ts_dev);
-       return err;
-}
-
-static int atmel_tsadcc_remove(struct platform_device *pdev)
-{
-       struct atmel_tsadcc *ts_dev = platform_get_drvdata(pdev);
-       struct resource *res;
-
-       free_irq(ts_dev->irq, ts_dev);
-
-       input_unregister_device(ts_dev->input);
-
-       res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-       iounmap(tsc_base);
-       release_mem_region(res->start, resource_size(res));
-
-       clk_disable(ts_dev->clk);
-       clk_put(ts_dev->clk);
-
-       kfree(ts_dev);
-
-       return 0;
-}
-
-static struct platform_driver atmel_tsadcc_driver = {
-       .probe          = atmel_tsadcc_probe,
-       .remove         = atmel_tsadcc_remove,
-       .driver         = {
-               .name   = "atmel_tsadcc",
-       },
-};
-module_platform_driver(atmel_tsadcc_driver);
-
-MODULE_LICENSE("GPL");
-MODULE_DESCRIPTION("Atmel TouchScreen Driver");
-MODULE_AUTHOR("Dan Liang <dan.liang@atmel.com>");
-
index 8b89e33a89fe99057d99e322ce2c287b41c0eb2f..647c3c7fd7428f31dd2b313a1fc8b29ac33b482c 100644 (file)
@@ -1381,7 +1381,7 @@ static int arm_smmu_alloc_init_pmd(struct arm_smmu_device *smmu, pud_t *pud,
 
        do {
                next = pmd_addr_end(addr, end);
-               ret = arm_smmu_alloc_init_pte(smmu, pmd, addr, end, pfn,
+               ret = arm_smmu_alloc_init_pte(smmu, pmd, addr, next, pfn,
                                              prot, stage);
                phys += next - addr;
        } while (pmd++, addr = next, addr < end);
@@ -1499,7 +1499,7 @@ static size_t arm_smmu_unmap(struct iommu_domain *domain, unsigned long iova,
 
        ret = arm_smmu_handle_mapping(smmu_domain, iova, 0, size, 0);
        arm_smmu_tlb_inv_context(&smmu_domain->root_cfg);
-       return ret ? ret : size;
+       return ret ? 0 : size;
 }
 
 static phys_addr_t arm_smmu_iova_to_phys(struct iommu_domain *domain,
index f445c10df8dfd2beb53b8fb4628d7094d0e17b5a..39f8b717fe8482f6e757bc7f9064187923b90cca 100644 (file)
@@ -152,7 +152,8 @@ dmar_alloc_pci_notify_info(struct pci_dev *dev, unsigned long event)
        info->seg = pci_domain_nr(dev->bus);
        info->level = level;
        if (event == BUS_NOTIFY_ADD_DEVICE) {
-               for (tmp = dev, level--; tmp; tmp = tmp->bus->self) {
+               for (tmp = dev; tmp; tmp = tmp->bus->self) {
+                       level--;
                        info->path[level].device = PCI_SLOT(tmp->devfn);
                        info->path[level].function = PCI_FUNC(tmp->devfn);
                        if (pci_is_root_bus(tmp->bus))
index 69fa7da5e48beba40a9595f67117505efc4e069b..f256ffc02e29df18ce8c43266fafe68b1971beb0 100644 (file)
@@ -1009,11 +1009,13 @@ static struct page *dma_pte_list_pagetables(struct dmar_domain *domain,
        if (level == 1)
                return freelist;
 
-       for (pte = page_address(pg); !first_pte_in_page(pte); pte++) {
+       pte = page_address(pg);
+       do {
                if (dma_pte_present(pte) && !dma_pte_superpage(pte))
                        freelist = dma_pte_list_pagetables(domain, level - 1,
                                                           pte, freelist);
-       }
+               pte++;
+       } while (!first_pte_in_page(pte));
 
        return freelist;
 }
@@ -2235,7 +2237,9 @@ static struct dmar_domain *get_domain_for_dev(struct device *dev, int gaw)
                                bridge_devfn = dev_tmp->devfn;
                        }
                        spin_lock_irqsave(&device_domain_lock, flags);
-                       info = dmar_search_domain_by_dev_info(segment, bus, devfn);
+                       info = dmar_search_domain_by_dev_info(segment,
+                                                             bridge_bus,
+                                                             bridge_devfn);
                        if (info) {
                                iommu = info->iommu;
                                domain = info->domain;
index 41be897df8d5521250d79dee5362c08fe0f80067..3899ba7821c5e78d4496c29ad3fba2b8b4ffcad9 100644 (file)
@@ -41,6 +41,7 @@
 #define ARMADA_370_XP_INT_SET_ENABLE_OFFS      (0x30)
 #define ARMADA_370_XP_INT_CLEAR_ENABLE_OFFS    (0x34)
 #define ARMADA_370_XP_INT_SOURCE_CTL(irq)      (0x100 + irq*4)
+#define ARMADA_370_XP_INT_SOURCE_CPU_MASK      0xF
 
 #define ARMADA_370_XP_CPU_INTACK_OFFS          (0x44)
 #define ARMADA_375_PPI_CAUSE                   (0x10)
@@ -132,8 +133,7 @@ static int armada_370_xp_setup_msi_irq(struct msi_chip *chip,
                                       struct msi_desc *desc)
 {
        struct msi_msg msg;
-       irq_hw_number_t hwirq;
-       int virq;
+       int virq, hwirq;
 
        hwirq = armada_370_xp_alloc_msi();
        if (hwirq < 0)
@@ -159,8 +159,19 @@ static void armada_370_xp_teardown_msi_irq(struct msi_chip *chip,
                                           unsigned int irq)
 {
        struct irq_data *d = irq_get_irq_data(irq);
+       unsigned long hwirq = d->hwirq;
+
        irq_dispose_mapping(irq);
-       armada_370_xp_free_msi(d->hwirq);
+       armada_370_xp_free_msi(hwirq);
+}
+
+static int armada_370_xp_check_msi_device(struct msi_chip *chip, struct pci_dev *dev,
+                                         int nvec, int type)
+{
+       /* We support MSI, but not MSI-X */
+       if (type == PCI_CAP_ID_MSI)
+               return 0;
+       return -EINVAL;
 }
 
 static struct irq_chip armada_370_xp_msi_irq_chip = {
@@ -201,6 +212,7 @@ static int armada_370_xp_msi_init(struct device_node *node,
 
        msi_chip->setup_irq = armada_370_xp_setup_msi_irq;
        msi_chip->teardown_irq = armada_370_xp_teardown_msi_irq;
+       msi_chip->check_device = armada_370_xp_check_msi_device;
        msi_chip->of_node = node;
 
        armada_370_xp_msi_domain =
@@ -244,35 +256,18 @@ static DEFINE_RAW_SPINLOCK(irq_controller_lock);
 static int armada_xp_set_affinity(struct irq_data *d,
                                  const struct cpumask *mask_val, bool force)
 {
-       unsigned long reg;
-       unsigned long new_mask = 0;
-       unsigned long online_mask = 0;
-       unsigned long count = 0;
        irq_hw_number_t hwirq = irqd_to_hwirq(d);
+       unsigned long reg, mask;
        int cpu;
 
-       for_each_cpu(cpu, mask_val) {
-               new_mask |= 1 << cpu_logical_map(cpu);
-               count++;
-       }
-
-       /*
-        * Forbid mutlicore interrupt affinity
-        * This is required since the MPIC HW doesn't limit
-        * several CPUs from acknowledging the same interrupt.
-        */
-       if (count > 1)
-               return -EINVAL;
-
-       for_each_cpu(cpu, cpu_online_mask)
-               online_mask |= 1 << cpu_logical_map(cpu);
+       /* Select a single core from the affinity mask which is online */
+       cpu = cpumask_any_and(mask_val, cpu_online_mask);
+       mask = 1UL << cpu_logical_map(cpu);
 
        raw_spin_lock(&irq_controller_lock);
-
        reg = readl(main_int_base + ARMADA_370_XP_INT_SOURCE_CTL(hwirq));
-       reg = (reg & (~online_mask)) | new_mask;
+       reg = (reg & (~ARMADA_370_XP_INT_SOURCE_CPU_MASK)) | mask;
        writel(reg, main_int_base + ARMADA_370_XP_INT_SOURCE_CTL(hwirq));
-
        raw_spin_unlock(&irq_controller_lock);
 
        return 0;
@@ -494,15 +489,6 @@ static int __init armada_370_xp_mpic_of_init(struct device_node *node,
 
 #ifdef CONFIG_SMP
        armada_xp_mpic_smp_cpu_init();
-
-       /*
-        * Set the default affinity from all CPUs to the boot cpu.
-        * This is required since the MPIC doesn't limit several CPUs
-        * from acknowledging the same interrupt.
-        */
-       cpumask_clear(irq_default_affinity);
-       cpumask_set_cpu(smp_processor_id(), irq_default_affinity);
-
 #endif
 
        armada_370_xp_msi_init(node, main_int_res.start);
index fc817d28d1fe50341bc4c9fe0d4de188f599d947..3d15d16a7088d2d886ef769f96534d896ded1b73 100644 (file)
@@ -107,7 +107,7 @@ static int __init crossbar_of_init(struct device_node *node)
        int i, size, max, reserved = 0, entry;
        const __be32 *irqsr;
 
-       cb = kzalloc(sizeof(struct cb_device *), GFP_KERNEL);
+       cb = kzalloc(sizeof(*cb), GFP_KERNEL);
 
        if (!cb)
                return -ENOMEM;
index 4300b6606f5e3276c11656ff29506b665e9a2a87..57d165e026f43ac4ba3f0ba0a0f422025ad2b117 100644 (file)
@@ -246,10 +246,14 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val,
                            bool force)
 {
        void __iomem *reg = gic_dist_base(d) + GIC_DIST_TARGET + (gic_irq(d) & ~3);
-       unsigned int shift = (gic_irq(d) % 4) * 8;
-       unsigned int cpu = cpumask_any_and(mask_val, cpu_online_mask);
+       unsigned int cpu, shift = (gic_irq(d) % 4) * 8;
        u32 val, mask, bit;
 
+       if (!force)
+               cpu = cpumask_any_and(mask_val, cpu_online_mask);
+       else
+               cpu = cpumask_first(mask_val);
+
        if (cpu >= NR_GIC_CPU_IF || cpu >= nr_cpu_ids)
                return -EINVAL;
 
index 37dab0b472cd8cc19f9fdba801ef69b41a36ddaa..7d35287f9e90dcc1b73ac1948fed167e5407606b 100644 (file)
@@ -24,6 +24,7 @@
 #include <linux/list.h>
 #include <linux/io.h>
 #include <linux/irq.h>
+#include <linux/irqchip/chained_irq.h>
 #include <linux/irqdomain.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
@@ -228,12 +229,17 @@ static int handle_one_vic(struct vic_device *vic, struct pt_regs *regs)
 static void vic_handle_irq_cascaded(unsigned int irq, struct irq_desc *desc)
 {
        u32 stat, hwirq;
+       struct irq_chip *host_chip = irq_desc_get_chip(desc);
        struct vic_device *vic = irq_desc_get_handler_data(desc);
 
+       chained_irq_enter(host_chip, desc);
+
        while ((stat = readl_relaxed(vic->base + VIC_IRQ_STATUS))) {
                hwirq = ffs(stat) - 1;
                generic_handle_irq(irq_find_mapping(vic->domain, hwirq));
        }
+
+       chained_irq_exit(host_chip, desc);
 }
 
 /*
index 8527743b5cef14ad608307f6ffe6e0341ffb9b28..3fdda3a4026936f92c36a3d2a5c8541bbf0b5c81 100644 (file)
@@ -5,7 +5,7 @@
  * Viresh Kumar <viresh.linux@gmail.com>
  *
  * Copyright (C) 2012 ST Microelectronics
- * Shiraz Hashim <shiraz.hashim@st.com>
+ * Shiraz Hashim <shiraz.linux.kernel@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
index 53d487f0c79ddf9b4dc605a8c8beebb8dcdd92f3..6a7447c304acc39e6edc422bf8f6533acfde93b5 100644 (file)
@@ -1155,7 +1155,7 @@ icn_command(isdn_ctrl *c, icn_card *card)
        ulong a;
        ulong flags;
        int i;
-       char cbuf[60];
+       char cbuf[80];
        isdn_ctrl cmd;
        icn_cdef cdef;
        char __user *arg;
@@ -1309,7 +1309,6 @@ icn_command(isdn_ctrl *c, icn_card *card)
                        break;
                if ((c->arg & 255) < ICN_BCH) {
                        char *p;
-                       char dial[50];
                        char dcode[4];
 
                        a = c->arg;
@@ -1321,10 +1320,10 @@ icn_command(isdn_ctrl *c, icn_card *card)
                        } else
                                /* Normal Dial */
                                strcpy(dcode, "CAL");
-                       strcpy(dial, p);
-                       sprintf(cbuf, "%02d;D%s_R%s,%02d,%02d,%s\n", (int) (a + 1),
-                               dcode, dial, c->parm.setup.si1,
-                               c->parm.setup.si2, c->parm.setup.eazmsn);
+                       snprintf(cbuf, sizeof(cbuf),
+                                "%02d;D%s_R%s,%02d,%02d,%s\n", (int) (a + 1),
+                                dcode, p, c->parm.setup.si1,
+                                c->parm.setup.si2, c->parm.setup.eazmsn);
                        i = icn_writecmd(cbuf, strlen(cbuf), 0, card);
                }
                break;
index d1278b5f3028dbc765f0da3fef90f0e99894170c..00492695526354f104b115c61546142d77d47c46 100644 (file)
@@ -141,6 +141,7 @@ int chameleon_parse_cells(struct mcb_bus *bus, phys_addr_t mapbase,
                default:
                        pr_err("Invalid chameleon descriptor type 0x%x\n",
                                dtype);
+                       kfree(header);
                        return -EINVAL;
                }
                num_cells++;
index 1bf4a71919ec73957a00550dec49b3a3b3a1292c..9380be7b18954b9308ed42abe5fafa2f87c0f76a 100644 (file)
@@ -2488,6 +2488,7 @@ static int cache_map(struct dm_target *ti, struct bio *bio)
 
                } else {
                        inc_hit_counter(cache, bio);
+                       pb->all_io_entry = dm_deferred_entry_inc(cache->all_io_ds);
 
                        if (bio_data_dir(bio) == WRITE && writethrough_mode(&cache->features) &&
                            !is_dirty(cache, lookup_result.cblock))
index 53728be84dee35ac8dfabbf48087919841049f1a..13abade76ad9bbd65c83c67d35f075506b17b63f 100644 (file)
@@ -232,6 +232,13 @@ struct thin_c {
        struct bio_list deferred_bio_list;
        struct bio_list retry_on_resume_list;
        struct rb_root sort_bio_list; /* sorted list of deferred bios */
+
+       /*
+        * Ensures the thin is not destroyed until the worker has finished
+        * iterating the active_thins list.
+        */
+       atomic_t refcount;
+       struct completion can_destroy;
 };
 
 /*----------------------------------------------------------------*/
@@ -1486,6 +1493,45 @@ static void process_thin_deferred_bios(struct thin_c *tc)
        blk_finish_plug(&plug);
 }
 
+static void thin_get(struct thin_c *tc);
+static void thin_put(struct thin_c *tc);
+
+/*
+ * We can't hold rcu_read_lock() around code that can block.  So we
+ * find a thin with the rcu lock held; bump a refcount; then drop
+ * the lock.
+ */
+static struct thin_c *get_first_thin(struct pool *pool)
+{
+       struct thin_c *tc = NULL;
+
+       rcu_read_lock();
+       if (!list_empty(&pool->active_thins)) {
+               tc = list_entry_rcu(pool->active_thins.next, struct thin_c, list);
+               thin_get(tc);
+       }
+       rcu_read_unlock();
+
+       return tc;
+}
+
+static struct thin_c *get_next_thin(struct pool *pool, struct thin_c *tc)
+{
+       struct thin_c *old_tc = tc;
+
+       rcu_read_lock();
+       list_for_each_entry_continue_rcu(tc, &pool->active_thins, list) {
+               thin_get(tc);
+               thin_put(old_tc);
+               rcu_read_unlock();
+               return tc;
+       }
+       thin_put(old_tc);
+       rcu_read_unlock();
+
+       return NULL;
+}
+
 static void process_deferred_bios(struct pool *pool)
 {
        unsigned long flags;
@@ -1493,10 +1539,11 @@ static void process_deferred_bios(struct pool *pool)
        struct bio_list bios;
        struct thin_c *tc;
 
-       rcu_read_lock();
-       list_for_each_entry_rcu(tc, &pool->active_thins, list)
+       tc = get_first_thin(pool);
+       while (tc) {
                process_thin_deferred_bios(tc);
-       rcu_read_unlock();
+               tc = get_next_thin(pool, tc);
+       }
 
        /*
         * If there are any deferred flush bios, we must commit
@@ -1578,7 +1625,7 @@ static void noflush_work(struct thin_c *tc, void (*fn)(struct work_struct *))
 {
        struct noflush_work w;
 
-       INIT_WORK(&w.worker, fn);
+       INIT_WORK_ONSTACK(&w.worker, fn);
        w.tc = tc;
        atomic_set(&w.complete, 0);
        init_waitqueue_head(&w.wait);
@@ -3061,11 +3108,25 @@ static struct target_type pool_target = {
 /*----------------------------------------------------------------
  * Thin target methods
  *--------------------------------------------------------------*/
+static void thin_get(struct thin_c *tc)
+{
+       atomic_inc(&tc->refcount);
+}
+
+static void thin_put(struct thin_c *tc)
+{
+       if (atomic_dec_and_test(&tc->refcount))
+               complete(&tc->can_destroy);
+}
+
 static void thin_dtr(struct dm_target *ti)
 {
        struct thin_c *tc = ti->private;
        unsigned long flags;
 
+       thin_put(tc);
+       wait_for_completion(&tc->can_destroy);
+
        spin_lock_irqsave(&tc->pool->lock, flags);
        list_del_rcu(&tc->list);
        spin_unlock_irqrestore(&tc->pool->lock, flags);
@@ -3101,6 +3162,7 @@ static int thin_ctr(struct dm_target *ti, unsigned argc, char **argv)
        struct thin_c *tc;
        struct dm_dev *pool_dev, *origin_dev;
        struct mapped_device *pool_md;
+       unsigned long flags;
 
        mutex_lock(&dm_thin_pool_table.mutex);
 
@@ -3191,9 +3253,12 @@ static int thin_ctr(struct dm_target *ti, unsigned argc, char **argv)
 
        mutex_unlock(&dm_thin_pool_table.mutex);
 
-       spin_lock(&tc->pool->lock);
+       atomic_set(&tc->refcount, 1);
+       init_completion(&tc->can_destroy);
+
+       spin_lock_irqsave(&tc->pool->lock, flags);
        list_add_tail_rcu(&tc->list, &tc->pool->active_thins);
-       spin_unlock(&tc->pool->lock);
+       spin_unlock_irqrestore(&tc->pool->lock, flags);
        /*
         * This synchronize_rcu() call is needed here otherwise we risk a
         * wake_worker() call finding no bios to process (because the newly
index 796007a5e0e1a4b6e83b0871c1fca1ef8c0c461f..7a7bab8947ae3485d31c132cb3398251c7d507cf 100644 (file)
@@ -330,15 +330,17 @@ test_block_hash:
                                return r;
                        }
                }
-
                todo = 1 << v->data_dev_block_bits;
-               while (io->iter.bi_size) {
+               do {
                        u8 *page;
+                       unsigned len;
                        struct bio_vec bv = bio_iter_iovec(bio, io->iter);
 
                        page = kmap_atomic(bv.bv_page);
-                       r = crypto_shash_update(desc, page + bv.bv_offset,
-                                               bv.bv_len);
+                       len = bv.bv_len;
+                       if (likely(len >= todo))
+                               len = todo;
+                       r = crypto_shash_update(desc, page + bv.bv_offset, len);
                        kunmap_atomic(page);
 
                        if (r < 0) {
@@ -346,8 +348,9 @@ test_block_hash:
                                return r;
                        }
 
-                       bio_advance_iter(bio, &io->iter, bv.bv_len);
-               }
+                       bio_advance_iter(bio, &io->iter, len);
+                       todo -= len;
+               } while (todo);
 
                if (!v->version) {
                        r = crypto_shash_update(desc, v->salt, v->salt_size);
index 25247a8529124f7cc93eda0db7033655d52f2ef7..ad1b9bea446ebdbaea0083cb976ed4207c618cc1 100644 (file)
@@ -4370,8 +4370,7 @@ static struct stripe_head *__get_priority_stripe(struct r5conf *conf, int group)
                sh->group = NULL;
        }
        list_del_init(&sh->lru);
-       atomic_inc(&sh->count);
-       BUG_ON(atomic_read(&sh->count) != 1);
+       BUG_ON(atomic_inc_return(&sh->count) != 1);
        return sh;
 }
 
index c137abfa0c543dd33f15e3888ab4590900733bba..20f1655e6d7595c328b5499476f4dde7773cccd0 100644 (file)
@@ -56,7 +56,7 @@ config VIDEO_VIU
 
 config VIDEO_TIMBERDALE
        tristate "Support for timberdale Video In/LogiWIN"
-       depends on VIDEO_V4L2 && I2C && DMADEVICES
+       depends on MFD_TIMBERDALE && VIDEO_V4L2 && I2C && DMADEVICES
        select DMA_ENGINE
        select TIMB_DMA
        select VIDEO_ADV7180
index 1cb74085e4109469e58ca59469968c31117da772..8baff0effc7dfa93cde0df9dad76556a6609adab 100644 (file)
@@ -300,8 +300,8 @@ config SGI_GRU_DEBUG
        depends on SGI_GRU
        default n
        ---help---
-       This option enables addition debugging code for the SGI GRU driver. If
-       you are unsure, say N.
+       This option enables additional debugging code for the SGI GRU driver.
+       If you are unsure, say N.
 
 config APDS9802ALS
        tristate "Medfield Avago APDS9802 ALS Sensor module"
index 5e4dbd21f89ad1fb8206a33b9c4e7c8b204c40ae..0e608a288603033ae7a5f77764aa049eb4dab671 100644 (file)
@@ -336,6 +336,44 @@ enum genwqe_requ_state {
        GENWQE_REQU_STATE_MAX,
 };
 
+/**
+ * struct genwqe_sgl - Scatter gather list describing user-space memory
+ * @sgl:            scatter gather list needs to be 128 byte aligned
+ * @sgl_dma_addr:   dma address of sgl
+ * @sgl_size:       size of area used for sgl
+ * @user_addr:      user-space address of memory area
+ * @user_size:      size of user-space memory area
+ * @page:           buffer for partial pages if needed
+ * @page_dma_addr:  dma address partial pages
+ */
+struct genwqe_sgl {
+       dma_addr_t sgl_dma_addr;
+       struct sg_entry *sgl;
+       size_t sgl_size;        /* size of sgl */
+
+       void __user *user_addr; /* user-space base-address */
+       size_t user_size;       /* size of memory area */
+
+       unsigned long nr_pages;
+       unsigned long fpage_offs;
+       size_t fpage_size;
+       size_t lpage_size;
+
+       void *fpage;
+       dma_addr_t fpage_dma_addr;
+
+       void *lpage;
+       dma_addr_t lpage_dma_addr;
+};
+
+int genwqe_alloc_sync_sgl(struct genwqe_dev *cd, struct genwqe_sgl *sgl,
+                         void __user *user_addr, size_t user_size);
+
+int genwqe_setup_sgl(struct genwqe_dev *cd, struct genwqe_sgl *sgl,
+                    dma_addr_t *dma_list);
+
+int genwqe_free_sync_sgl(struct genwqe_dev *cd, struct genwqe_sgl *sgl);
+
 /**
  * struct ddcb_requ - Kernel internal representation of the DDCB request
  * @cmd:          User space representation of the DDCB execution request
@@ -347,9 +385,7 @@ struct ddcb_requ {
        struct ddcb_queue *queue;         /* associated queue */
 
        struct dma_mapping  dma_mappings[DDCB_FIXUPS];
-       struct sg_entry     *sgl[DDCB_FIXUPS];
-       dma_addr_t          sgl_dma_addr[DDCB_FIXUPS];
-       size_t              sgl_size[DDCB_FIXUPS];
+       struct genwqe_sgl sgls[DDCB_FIXUPS];
 
        /* kernel/user shared content */
        struct genwqe_ddcb_cmd cmd;     /* ddcb_no for this request */
@@ -453,22 +489,6 @@ int  genwqe_user_vmap(struct genwqe_dev *cd, struct dma_mapping *m,
 int  genwqe_user_vunmap(struct genwqe_dev *cd, struct dma_mapping *m,
                        struct ddcb_requ *req);
 
-struct sg_entry *genwqe_alloc_sgl(struct genwqe_dev *cd, int num_pages,
-                                dma_addr_t *dma_addr, size_t *sgl_size);
-
-void genwqe_free_sgl(struct genwqe_dev *cd, struct sg_entry *sg_list,
-                   dma_addr_t dma_addr, size_t size);
-
-int genwqe_setup_sgl(struct genwqe_dev *cd,
-                   unsigned long offs,
-                   unsigned long size,
-                   struct sg_entry *sgl, /* genwqe sgl */
-                   dma_addr_t dma_addr, size_t sgl_size,
-                   dma_addr_t *dma_list, int page_offs, int num_pages);
-
-int genwqe_check_sgl(struct genwqe_dev *cd, struct sg_entry *sg_list,
-                    int size);
-
 static inline bool dma_mapping_used(struct dma_mapping *m)
 {
        if (!m)
index 6f1acc0ccf887f37ef2d095e62fe41b9f7164b44..c8046db2d5a230114b7e3fb9a6145de87f0ec2cb 100644 (file)
@@ -305,6 +305,8 @@ static int enqueue_ddcb(struct genwqe_dev *cd, struct ddcb_queue *queue,
                        break;
 
                new = (old | DDCB_NEXT_BE32);
+
+               wmb();
                icrc_hsi_shi = cmpxchg(&prev_ddcb->icrc_hsi_shi_32, old, new);
 
                if (icrc_hsi_shi == old)
@@ -314,6 +316,8 @@ static int enqueue_ddcb(struct genwqe_dev *cd, struct ddcb_queue *queue,
        /* Queue must be re-started by updating QUEUE_OFFSET */
        ddcb_mark_tapped(pddcb);
        num = (u64)ddcb_no << 8;
+
+       wmb();
        __genwqe_writeq(cd, queue->IO_QUEUE_OFFSET, num); /* start queue */
 
        return RET_DDCB_TAPPED;
@@ -1306,7 +1310,7 @@ static int queue_wake_up_all(struct genwqe_dev *cd)
  */
 int genwqe_finish_queue(struct genwqe_dev *cd)
 {
-       int i, rc, in_flight;
+       int i, rc = 0, in_flight;
        int waitmax = genwqe_ddcb_software_timeout;
        struct pci_dev *pci_dev = cd->pci_dev;
        struct ddcb_queue *queue = &cd->queue;
index 2c2c9cc75231d7c9182a47fa43d22c5d99d58627..1d2f163a1906c2ca9740dbcc93e88970ea8ecbd0 100644 (file)
@@ -531,7 +531,9 @@ static int do_flash_update(struct genwqe_file *cfile,
        case '1':
                cmdopts = 0x1C;
                break;          /* download/erase_first/part_1 */
-       case 'v':               /* cmdopts = 0x0c (VPD) */
+       case 'v':
+               cmdopts = 0x0C;
+               break;          /* download/erase_first/vpd */
        default:
                return -EINVAL;
        }
@@ -665,6 +667,8 @@ static int do_flash_read(struct genwqe_file *cfile,
                cmdopts = 0x1A;
                break;          /* upload/part_1 */
        case 'v':
+               cmdopts = 0x0A;
+               break;          /* upload/vpd */
        default:
                return -EINVAL;
        }
@@ -836,15 +840,8 @@ static int ddcb_cmd_cleanup(struct genwqe_file *cfile, struct ddcb_requ *req)
                        __genwqe_del_mapping(cfile, dma_map);
                        genwqe_user_vunmap(cd, dma_map, req);
                }
-               if (req->sgl[i] != NULL) {
-                       genwqe_free_sgl(cd, req->sgl[i],
-                                      req->sgl_dma_addr[i],
-                                      req->sgl_size[i]);
-                       req->sgl[i] = NULL;
-                       req->sgl_dma_addr[i] = 0x0;
-                       req->sgl_size[i] = 0;
-               }
-
+               if (req->sgls[i].sgl != NULL)
+                       genwqe_free_sync_sgl(cd, &req->sgls[i]);
        }
        return 0;
 }
@@ -913,7 +910,7 @@ static int ddcb_cmd_fixups(struct genwqe_file *cfile, struct ddcb_requ *req)
 
                case ATS_TYPE_SGL_RDWR:
                case ATS_TYPE_SGL_RD: {
-                       int page_offs, nr_pages, offs;
+                       int page_offs;
 
                        u_addr = be64_to_cpu(*((__be64 *)
                                               &cmd->asiv[asiv_offs]));
@@ -951,27 +948,18 @@ static int ddcb_cmd_fixups(struct genwqe_file *cfile, struct ddcb_requ *req)
                                page_offs = 0;
                        }
 
-                       offs = offset_in_page(u_addr);
-                       nr_pages = DIV_ROUND_UP(offs + u_size, PAGE_SIZE);
-
                        /* create genwqe style scatter gather list */
-                       req->sgl[i] = genwqe_alloc_sgl(cd, m->nr_pages,
-                                                     &req->sgl_dma_addr[i],
-                                                     &req->sgl_size[i]);
-                       if (req->sgl[i] == NULL) {
-                               rc = -ENOMEM;
+                       rc = genwqe_alloc_sync_sgl(cd, &req->sgls[i],
+                                                  (void __user *)u_addr,
+                                                  u_size);
+                       if (rc != 0)
                                goto err_out;
-                       }
-                       genwqe_setup_sgl(cd, offs, u_size,
-                                       req->sgl[i],
-                                       req->sgl_dma_addr[i],
-                                       req->sgl_size[i],
-                                       m->dma_list,
-                                       page_offs,
-                                       nr_pages);
+
+                       genwqe_setup_sgl(cd, &req->sgls[i],
+                                        &m->dma_list[page_offs]);
 
                        *((__be64 *)&cmd->asiv[asiv_offs]) =
-                               cpu_to_be64(req->sgl_dma_addr[i]);
+                               cpu_to_be64(req->sgls[i].sgl_dma_addr);
 
                        break;
                }
index 6b1a6ef9f1a8c3b1348218be489a59ac519d30c5..d049d271699cac36fd1333e4b0de0c9d02f4827c 100644 (file)
@@ -275,67 +275,107 @@ static int genwqe_sgl_size(int num_pages)
        return roundup(len, PAGE_SIZE);
 }
 
-struct sg_entry *genwqe_alloc_sgl(struct genwqe_dev *cd, int num_pages,
-                                 dma_addr_t *dma_addr, size_t *sgl_size)
+/**
+ * genwqe_alloc_sync_sgl() - Allocate memory for sgl and overlapping pages
+ *
+ * Allocates memory for sgl and overlapping pages. Pages which might
+ * overlap other user-space memory blocks are being cached for DMAs,
+ * such that we do not run into syncronization issues. Data is copied
+ * from user-space into the cached pages.
+ */
+int genwqe_alloc_sync_sgl(struct genwqe_dev *cd, struct genwqe_sgl *sgl,
+                         void __user *user_addr, size_t user_size)
 {
+       int rc;
        struct pci_dev *pci_dev = cd->pci_dev;
-       struct sg_entry *sgl;
 
-       *sgl_size = genwqe_sgl_size(num_pages);
-       if (get_order(*sgl_size) > MAX_ORDER) {
+       sgl->fpage_offs = offset_in_page((unsigned long)user_addr);
+       sgl->fpage_size = min_t(size_t, PAGE_SIZE-sgl->fpage_offs, user_size);
+       sgl->nr_pages = DIV_ROUND_UP(sgl->fpage_offs + user_size, PAGE_SIZE);
+       sgl->lpage_size = (user_size - sgl->fpage_size) % PAGE_SIZE;
+
+       dev_dbg(&pci_dev->dev, "[%s] uaddr=%p usize=%8ld nr_pages=%ld "
+               "fpage_offs=%lx fpage_size=%ld lpage_size=%ld\n",
+               __func__, user_addr, user_size, sgl->nr_pages,
+               sgl->fpage_offs, sgl->fpage_size, sgl->lpage_size);
+
+       sgl->user_addr = user_addr;
+       sgl->user_size = user_size;
+       sgl->sgl_size = genwqe_sgl_size(sgl->nr_pages);
+
+       if (get_order(sgl->sgl_size) > MAX_ORDER) {
                dev_err(&pci_dev->dev,
                        "[%s] err: too much memory requested!\n", __func__);
-               return NULL;
+               return -ENOMEM;
        }
 
-       sgl = __genwqe_alloc_consistent(cd, *sgl_size, dma_addr);
-       if (sgl == NULL) {
+       sgl->sgl = __genwqe_alloc_consistent(cd, sgl->sgl_size,
+                                            &sgl->sgl_dma_addr);
+       if (sgl->sgl == NULL) {
                dev_err(&pci_dev->dev,
                        "[%s] err: no memory available!\n", __func__);
-               return NULL;
+               return -ENOMEM;
        }
 
-       return sgl;
+       /* Only use buffering on incomplete pages */
+       if ((sgl->fpage_size != 0) && (sgl->fpage_size != PAGE_SIZE)) {
+               sgl->fpage = __genwqe_alloc_consistent(cd, PAGE_SIZE,
+                                                      &sgl->fpage_dma_addr);
+               if (sgl->fpage == NULL)
+                       goto err_out;
+
+               /* Sync with user memory */
+               if (copy_from_user(sgl->fpage + sgl->fpage_offs,
+                                  user_addr, sgl->fpage_size)) {
+                       rc = -EFAULT;
+                       goto err_out;
+               }
+       }
+       if (sgl->lpage_size != 0) {
+               sgl->lpage = __genwqe_alloc_consistent(cd, PAGE_SIZE,
+                                                      &sgl->lpage_dma_addr);
+               if (sgl->lpage == NULL)
+                       goto err_out1;
+
+               /* Sync with user memory */
+               if (copy_from_user(sgl->lpage, user_addr + user_size -
+                                  sgl->lpage_size, sgl->lpage_size)) {
+                       rc = -EFAULT;
+                       goto err_out1;
+               }
+       }
+       return 0;
+
+ err_out1:
+       __genwqe_free_consistent(cd, PAGE_SIZE, sgl->fpage,
+                                sgl->fpage_dma_addr);
+ err_out:
+       __genwqe_free_consistent(cd, sgl->sgl_size, sgl->sgl,
+                                sgl->sgl_dma_addr);
+       return -ENOMEM;
 }
 
-int genwqe_setup_sgl(struct genwqe_dev *cd,
-                    unsigned long offs,
-                    unsigned long size,
-                    struct sg_entry *sgl,
-                    dma_addr_t dma_addr, size_t sgl_size,
-                    dma_addr_t *dma_list, int page_offs, int num_pages)
+int genwqe_setup_sgl(struct genwqe_dev *cd, struct genwqe_sgl *sgl,
+                    dma_addr_t *dma_list)
 {
        int i = 0, j = 0, p;
        unsigned long dma_offs, map_offs;
-       struct pci_dev *pci_dev = cd->pci_dev;
        dma_addr_t prev_daddr = 0;
        struct sg_entry *s, *last_s = NULL;
-
-       /* sanity checks */
-       if (offs > PAGE_SIZE) {
-               dev_err(&pci_dev->dev,
-                       "[%s] too large start offs %08lx\n", __func__, offs);
-               return -EFAULT;
-       }
-       if (sgl_size < genwqe_sgl_size(num_pages)) {
-               dev_err(&pci_dev->dev,
-                       "[%s] sgl_size too small %08lx for %d pages\n",
-                       __func__, sgl_size, num_pages);
-               return -EFAULT;
-       }
+       size_t size = sgl->user_size;
 
        dma_offs = 128;         /* next block if needed/dma_offset */
-       map_offs = offs;        /* offset in first page */
+       map_offs = sgl->fpage_offs; /* offset in first page */
 
-       s = &sgl[0];            /* first set of 8 entries */
+       s = &sgl->sgl[0];       /* first set of 8 entries */
        p = 0;                  /* page */
-       while (p < num_pages) {
+       while (p < sgl->nr_pages) {
                dma_addr_t daddr;
                unsigned int size_to_map;
 
                /* always write the chaining entry, cleanup is done later */
                j = 0;
-               s[j].target_addr = cpu_to_be64(dma_addr + dma_offs);
+               s[j].target_addr = cpu_to_be64(sgl->sgl_dma_addr + dma_offs);
                s[j].len         = cpu_to_be32(128);
                s[j].flags       = cpu_to_be32(SG_CHAINED);
                j++;
@@ -343,7 +383,17 @@ int genwqe_setup_sgl(struct genwqe_dev *cd,
                while (j < 8) {
                        /* DMA mapping for requested page, offs, size */
                        size_to_map = min(size, PAGE_SIZE - map_offs);
-                       daddr = dma_list[page_offs + p] + map_offs;
+
+                       if ((p == 0) && (sgl->fpage != NULL)) {
+                               daddr = sgl->fpage_dma_addr + map_offs;
+
+                       } else if ((p == sgl->nr_pages - 1) &&
+                                  (sgl->lpage != NULL)) {
+                               daddr = sgl->lpage_dma_addr;
+                       } else {
+                               daddr = dma_list[p] + map_offs;
+                       }
+
                        size -= size_to_map;
                        map_offs = 0;
 
@@ -358,7 +408,7 @@ int genwqe_setup_sgl(struct genwqe_dev *cd,
                                                          size_to_map);
 
                                p++; /* process next page */
-                               if (p == num_pages)
+                               if (p == sgl->nr_pages)
                                        goto fixup;  /* nothing to do */
 
                                prev_daddr = daddr + size_to_map;
@@ -374,7 +424,7 @@ int genwqe_setup_sgl(struct genwqe_dev *cd,
                        j++;
 
                        p++;    /* process next page */
-                       if (p == num_pages)
+                       if (p == sgl->nr_pages)
                                goto fixup;  /* nothing to do */
                }
                dma_offs += 128;
@@ -395,10 +445,50 @@ int genwqe_setup_sgl(struct genwqe_dev *cd,
        return 0;
 }
 
-void genwqe_free_sgl(struct genwqe_dev *cd, struct sg_entry *sg_list,
-                   dma_addr_t dma_addr, size_t size)
+/**
+ * genwqe_free_sync_sgl() - Free memory for sgl and overlapping pages
+ *
+ * After the DMA transfer has been completed we free the memory for
+ * the sgl and the cached pages. Data is being transfered from cached
+ * pages into user-space buffers.
+ */
+int genwqe_free_sync_sgl(struct genwqe_dev *cd, struct genwqe_sgl *sgl)
 {
-       __genwqe_free_consistent(cd, size, sg_list, dma_addr);
+       int rc;
+       struct pci_dev *pci_dev = cd->pci_dev;
+
+       if (sgl->fpage) {
+               if (copy_to_user(sgl->user_addr, sgl->fpage + sgl->fpage_offs,
+                                sgl->fpage_size)) {
+                       dev_err(&pci_dev->dev, "[%s] err: copying fpage!\n",
+                               __func__);
+                       rc = -EFAULT;
+               }
+               __genwqe_free_consistent(cd, PAGE_SIZE, sgl->fpage,
+                                        sgl->fpage_dma_addr);
+               sgl->fpage = NULL;
+               sgl->fpage_dma_addr = 0;
+       }
+       if (sgl->lpage) {
+               if (copy_to_user(sgl->user_addr + sgl->user_size -
+                                sgl->lpage_size, sgl->lpage,
+                                sgl->lpage_size)) {
+                       dev_err(&pci_dev->dev, "[%s] err: copying lpage!\n",
+                               __func__);
+                       rc = -EFAULT;
+               }
+               __genwqe_free_consistent(cd, PAGE_SIZE, sgl->lpage,
+                                        sgl->lpage_dma_addr);
+               sgl->lpage = NULL;
+               sgl->lpage_dma_addr = 0;
+       }
+       __genwqe_free_consistent(cd, sgl->sgl_size, sgl->sgl,
+                                sgl->sgl_dma_addr);
+
+       sgl->sgl = NULL;
+       sgl->sgl_dma_addr = 0x0;
+       sgl->sgl_size = 0;
+       return rc;
 }
 
 /**
index 46e916b36c708989a24a72cf40fe11c2adb6da11..cd5263163a6e5c780045ad4d8225c72d79efc1c5 100644 (file)
@@ -36,7 +36,7 @@
 #include <asm/byteorder.h>
 #include <linux/genwqe/genwqe_card.h>
 
-#define DRV_VERS_STRING                "2.0.0"
+#define DRV_VERS_STRING                "2.0.15"
 
 /*
  * Static minor number assignement, until we decide/implement
index 66f411a6e8ea502251ede2b92bca60c59e8843fe..cabc04383685d4b8ac03f5f1723367d02041105d 100644 (file)
 #define MEI_DEV_ID_LPT_HR     0x8CBA  /* Lynx Point H Refresh */
 
 #define MEI_DEV_ID_WPT_LP     0x9CBA  /* Wildcat Point LP */
+
+/* Host Firmware Status Registers in PCI Config Space */
+#define PCI_CFG_HFS_1         0x40
+#define PCI_CFG_HFS_2         0x48
+
 /*
  * MEI HW Section
  */
index 29b5af8efb71f33ad000578f08493128fef69806..4e3cba6da3f5cccd32d4ee623f91fe5c03655816 100644 (file)
@@ -455,8 +455,7 @@ int mei_irq_write_handler(struct mei_device *dev, struct mei_cl_cb *cmpl_list)
 
                cl->status = 0;
                list_del(&cb->list);
-               if (MEI_WRITING == cl->writing_state &&
-                   cb->fop_type == MEI_FOP_WRITE &&
+               if (cb->fop_type == MEI_FOP_WRITE &&
                    cl != &dev->iamthif_cl) {
                        cl_dbg(dev, cl, "MEI WRITE COMPLETE\n");
                        cl->writing_state = MEI_WRITE_COMPLETE;
index b35594dbf52f49bf034e94254b85d70d0a019756..147413145c97d8a4af71e6a5b555a99cbc23c959 100644 (file)
@@ -644,8 +644,7 @@ static unsigned int mei_poll(struct file *file, poll_table *wait)
                goto out;
        }
 
-       if (MEI_WRITE_COMPLETE == cl->writing_state)
-               mask |= (POLLIN | POLLRDNORM);
+       mask |= (POLLIN | POLLRDNORM);
 
 out:
        mutex_unlock(&dev->device_lock);
index 1c8fd3a3e135d2611d5fb9741ed4b78381f8e4a3..95889e2e31ffd173603b48954ed0bec193fd1ac4 100644 (file)
@@ -97,15 +97,31 @@ static bool mei_me_quirk_probe(struct pci_dev *pdev,
                                const struct pci_device_id *ent)
 {
        u32 reg;
-       if (ent->device == MEI_DEV_ID_PBG_1) {
-               pci_read_config_dword(pdev, 0x48, &reg);
-               /* make sure that bit 9 is up and bit 10 is down */
-               if ((reg & 0x600) == 0x200) {
-                       dev_info(&pdev->dev, "Device doesn't have valid ME Interface\n");
-                       return false;
-               }
+       /* Cougar Point || Patsburg */
+       if (ent->device == MEI_DEV_ID_CPT_1 ||
+           ent->device == MEI_DEV_ID_PBG_1) {
+               pci_read_config_dword(pdev, PCI_CFG_HFS_2, &reg);
+               /* make sure that bit 9 (NM) is up and bit 10 (DM) is down */
+               if ((reg & 0x600) == 0x200)
+                       goto no_mei;
        }
+
+       /* Lynx Point */
+       if (ent->device == MEI_DEV_ID_LPT_H  ||
+           ent->device == MEI_DEV_ID_LPT_W  ||
+           ent->device == MEI_DEV_ID_LPT_HR) {
+               /* Read ME FW Status check for SPS Firmware */
+               pci_read_config_dword(pdev, PCI_CFG_HFS_1, &reg);
+               /* if bits [19:16] = 15, running SPS Firmware */
+               if ((reg & 0xf0000) == 0xf0000)
+                       goto no_mei;
+       }
+
        return true;
+
+no_mei:
+       dev_info(&pdev->dev, "Device doesn't have valid ME Interface\n");
+       return false;
 }
 /**
  * mei_probe - Device Initialization Routine
index 363da96e6891cea8eecdec0205160d960eff0cd7..c4176b0f382d20702ff4e592593704b80e0f128c 100644 (file)
@@ -6,7 +6,7 @@
  *
  * Copyright © 2010 STMicroelectronics.
  * Ashish Priyadarshi
- * Shiraz Hashim <shiraz.hashim@st.com>
+ * Shiraz Hashim <shiraz.linux.kernel@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
@@ -1089,5 +1089,5 @@ static struct platform_driver spear_smi_driver = {
 module_platform_driver(spear_smi_driver);
 
 MODULE_LICENSE("GPL");
-MODULE_AUTHOR("Ashish Priyadarshi, Shiraz Hashim <shiraz.hashim@st.com>");
+MODULE_AUTHOR("Ashish Priyadarshi, Shiraz Hashim <shiraz.linux.kernel@gmail.com>");
 MODULE_DESCRIPTION("MTD SMI driver for serial nor flash chips");
index a8efb18e42fa66a01fd1950977db55b96ab15022..0ab83708b6a11a66f1b3d98873d59071d578fcdb 100644 (file)
@@ -8627,6 +8627,7 @@ bnx2_remove_one(struct pci_dev *pdev)
        pci_disable_device(pdev);
 }
 
+#ifdef CONFIG_PM_SLEEP
 static int
 bnx2_suspend(struct device *device)
 {
@@ -8665,7 +8666,6 @@ bnx2_resume(struct device *device)
        return 0;
 }
 
-#ifdef CONFIG_PM_SLEEP
 static SIMPLE_DEV_PM_OPS(bnx2_pm_ops, bnx2_suspend, bnx2_resume);
 #define BNX2_PM_OPS (&bnx2_pm_ops)
 
index b9f7022f4e81e13a38c31a4f53653f2c77a0f4db..e5d95c5ce1ad8df29075dcc243650a0e15aa896d 100644 (file)
@@ -12286,7 +12286,9 @@ static int tg3_set_ringparam(struct net_device *dev, struct ethtool_ringparam *e
        if (tg3_flag(tp, MAX_RXPEND_64) &&
            tp->rx_pending > 63)
                tp->rx_pending = 63;
-       tp->rx_jumbo_pending = ering->rx_jumbo_pending;
+
+       if (tg3_flag(tp, JUMBO_RING_ENABLE))
+               tp->rx_jumbo_pending = ering->rx_jumbo_pending;
 
        for (i = 0; i < tp->irq_max; i++)
                tp->napi[i].tx_pending = ering->tx_pending;
index 751d5c7b312dc39c32aba0636a0cc668ff946a44..7e49c43b7af3501f953cac4796e4769da542c29d 100644 (file)
@@ -4,7 +4,7 @@
 
 config NET_CADENCE
        bool "Cadence devices"
-       depends on HAS_IOMEM
+       depends on HAS_IOMEM && (ARM || AVR32 || COMPILE_TEST)
        default y
        ---help---
          If you have a network (Ethernet) card belonging to this class, say Y.
@@ -22,7 +22,7 @@ if NET_CADENCE
 
 config ARM_AT91_ETHER
        tristate "AT91RM9200 Ethernet support"
-       depends on HAS_DMA
+       depends on HAS_DMA && (ARCH_AT91RM9200 || COMPILE_TEST)
        select MACB
        ---help---
          If you wish to compile a kernel for the AT91RM9200 and enable
@@ -30,7 +30,7 @@ config ARM_AT91_ETHER
 
 config MACB
        tristate "Cadence MACB/GEM support"
-       depends on HAS_DMA
+       depends on HAS_DMA && (PLATFORM_AT32AP || ARCH_AT91 || ARCH_PICOXCELL || ARCH_ZYNQ || COMPILE_TEST)
        select PHYLIB
        ---help---
          The Cadence MACB ethernet interface is found on many Atmel AT32 and
index 81e8402a74b41c910114b4d10b3b796161ed0ea2..8a96572fdde0abd54a1e32b7914b9c90da65a3b5 100644 (file)
@@ -154,7 +154,7 @@ static int write_l2e(struct adapter *adap, struct l2t_entry *e, int sync)
        req->params = htons(L2T_W_PORT(e->lport) | L2T_W_NOREPLY(!sync));
        req->l2t_idx = htons(e->idx);
        req->vlan = htons(e->vlan);
-       if (e->neigh)
+       if (e->neigh && !(e->neigh->dev->flags & IFF_LOOPBACK))
                memcpy(e->dmac, e->neigh->ha, sizeof(e->dmac));
        memcpy(req->dst_mac, e->dmac, sizeof(req->dst_mac));
 
@@ -394,6 +394,8 @@ struct l2t_entry *cxgb4_l2t_get(struct l2t_data *d, struct neighbour *neigh,
        if (e) {
                spin_lock(&e->lock);          /* avoid race with t4_l2t_free */
                e->state = L2T_STATE_RESOLVING;
+               if (neigh->dev->flags & IFF_LOOPBACK)
+                       memcpy(e->dmac, physdev->dev_addr, sizeof(e->dmac));
                memcpy(e->addr, addr, addr_len);
                e->ifindex = ifidx;
                e->hash = hash;
index fb2fe65903c2b7675701e1911a53b6e484566a73..bba67681aeaaae90fa8cc8f41ac3b5d70341e227 100644 (file)
@@ -682,7 +682,7 @@ enum {
        SF_RD_ID        = 0x9f,       /* read ID */
        SF_ERASE_SECTOR = 0xd8,       /* erase sector */
 
-       FW_MAX_SIZE = 512 * 1024,
+       FW_MAX_SIZE = 16 * SF_SEC_SIZE,
 };
 
 /**
index 8ccaa2520dc3e9f154ae10b5e866e99173531274..97db5a7179df1c6c733bed5e25e5be3d44d39fa1 100644 (file)
@@ -374,6 +374,7 @@ enum vf_state {
 #define BE_FLAGS_NAPI_ENABLED                  (1 << 9)
 #define BE_FLAGS_QNQ_ASYNC_EVT_RCVD            (1 << 11)
 #define BE_FLAGS_VXLAN_OFFLOADS                        (1 << 12)
+#define BE_FLAGS_SETUP_DONE                    (1 << 13)
 
 #define BE_UC_PMAC_COUNT                       30
 #define BE_VF_UC_PMAC_COUNT                    2
index 3e6df47b69735b3c357d1499df8be3dd122aa917..a18645407d2152b43353a50b76ccf6317ef90151 100644 (file)
@@ -2033,11 +2033,13 @@ static void be_tx_compl_clean(struct be_adapter *adapter)
        bool dummy_wrb;
        int i, pending_txqs;
 
-       /* Wait for a max of 200ms for all the tx-completions to arrive. */
+       /* Stop polling for compls when HW has been silent for 10ms */
        do {
                pending_txqs = adapter->num_tx_qs;
 
                for_all_tx_queues(adapter, txo, i) {
+                       cmpl = 0;
+                       num_wrbs = 0;
                        txq = &txo->q;
                        while ((txcp = be_tx_compl_get(&txo->cq))) {
                                end_idx =
@@ -2050,14 +2052,13 @@ static void be_tx_compl_clean(struct be_adapter *adapter)
                        if (cmpl) {
                                be_cq_notify(adapter, txo->cq.id, false, cmpl);
                                atomic_sub(num_wrbs, &txq->used);
-                               cmpl = 0;
-                               num_wrbs = 0;
+                               timeo = 0;
                        }
                        if (atomic_read(&txq->used) == 0)
                                pending_txqs--;
                }
 
-               if (pending_txqs == 0 || ++timeo > 200)
+               if (pending_txqs == 0 || ++timeo > 10 || be_hw_error(adapter))
                        break;
 
                mdelay(1);
@@ -2725,6 +2726,12 @@ static int be_close(struct net_device *netdev)
        struct be_eq_obj *eqo;
        int i;
 
+       /* This protection is needed as be_close() may be called even when the
+        * adapter is in cleared state (after eeh perm failure)
+        */
+       if (!(adapter->flags & BE_FLAGS_SETUP_DONE))
+               return 0;
+
        be_roce_dev_close(adapter);
 
        if (adapter->flags & BE_FLAGS_NAPI_ENABLED) {
@@ -3055,6 +3062,7 @@ static int be_clear(struct be_adapter *adapter)
        be_clear_queues(adapter);
 
        be_msix_disable(adapter);
+       adapter->flags &= ~BE_FLAGS_SETUP_DONE;
        return 0;
 }
 
@@ -3559,6 +3567,7 @@ static int be_setup(struct be_adapter *adapter)
                adapter->phy.fc_autoneg = 1;
 
        be_schedule_worker(adapter);
+       adapter->flags |= BE_FLAGS_SETUP_DONE;
        return 0;
 err:
        be_clear(adapter);
index d04b1c3c9b85ba8ce23e52cf3fb85b2a9b1a897d..14786c8bf99efcddbbbdff7bc0f9ee9e20933864 100644 (file)
@@ -91,7 +91,7 @@
 #define MVNETA_RX_MIN_FRAME_SIZE                 0x247c
 #define MVNETA_SERDES_CFG                       0x24A0
 #define      MVNETA_SGMII_SERDES_PROTO          0x0cc7
-#define      MVNETA_RGMII_SERDES_PROTO          0x0667
+#define      MVNETA_QSGMII_SERDES_PROTO                 0x0667
 #define MVNETA_TYPE_PRIO                         0x24bc
 #define      MVNETA_FORCE_UNI                    BIT(21)
 #define MVNETA_TXQ_CMD_1                         0x24e4
@@ -2721,29 +2721,44 @@ static void mvneta_conf_mbus_windows(struct mvneta_port *pp,
 }
 
 /* Power up the port */
-static void mvneta_port_power_up(struct mvneta_port *pp, int phy_mode)
+static int mvneta_port_power_up(struct mvneta_port *pp, int phy_mode)
 {
-       u32 val;
+       u32 ctrl;
 
        /* MAC Cause register should be cleared */
        mvreg_write(pp, MVNETA_UNIT_INTR_CAUSE, 0);
 
-       if (phy_mode == PHY_INTERFACE_MODE_SGMII)
-               mvreg_write(pp, MVNETA_SERDES_CFG, MVNETA_SGMII_SERDES_PROTO);
-       else
-               mvreg_write(pp, MVNETA_SERDES_CFG, MVNETA_RGMII_SERDES_PROTO);
+       ctrl = mvreg_read(pp, MVNETA_GMAC_CTRL_2);
 
-       val = mvreg_read(pp, MVNETA_GMAC_CTRL_2);
-
-       val |= MVNETA_GMAC2_PCS_ENABLE | MVNETA_GMAC2_PORT_RGMII;
+       /* Even though it might look weird, when we're configured in
+        * SGMII or QSGMII mode, the RGMII bit needs to be set.
+        */
+       switch(phy_mode) {
+       case PHY_INTERFACE_MODE_QSGMII:
+               mvreg_write(pp, MVNETA_SERDES_CFG, MVNETA_QSGMII_SERDES_PROTO);
+               ctrl |= MVNETA_GMAC2_PCS_ENABLE | MVNETA_GMAC2_PORT_RGMII;
+               break;
+       case PHY_INTERFACE_MODE_SGMII:
+               mvreg_write(pp, MVNETA_SERDES_CFG, MVNETA_SGMII_SERDES_PROTO);
+               ctrl |= MVNETA_GMAC2_PCS_ENABLE | MVNETA_GMAC2_PORT_RGMII;
+               break;
+       case PHY_INTERFACE_MODE_RGMII:
+       case PHY_INTERFACE_MODE_RGMII_ID:
+               ctrl |= MVNETA_GMAC2_PORT_RGMII;
+               break;
+       default:
+               return -EINVAL;
+       }
 
        /* Cancel Port Reset */
-       val &= ~MVNETA_GMAC2_PORT_RESET;
-       mvreg_write(pp, MVNETA_GMAC_CTRL_2, val);
+       ctrl &= ~MVNETA_GMAC2_PORT_RESET;
+       mvreg_write(pp, MVNETA_GMAC_CTRL_2, ctrl);
 
        while ((mvreg_read(pp, MVNETA_GMAC_CTRL_2) &
                MVNETA_GMAC2_PORT_RESET) != 0)
                continue;
+
+       return 0;
 }
 
 /* Device initialization routine */
@@ -2854,7 +2869,12 @@ static int mvneta_probe(struct platform_device *pdev)
                dev_err(&pdev->dev, "can't init eth hal\n");
                goto err_free_stats;
        }
-       mvneta_port_power_up(pp, phy_mode);
+
+       err = mvneta_port_power_up(pp, phy_mode);
+       if (err < 0) {
+               dev_err(&pdev->dev, "can't power up port\n");
+               goto err_deinit;
+       }
 
        dram_target_info = mv_mbus_dram_info();
        if (dram_target_info)
index 70e95324a97d350777ea8ccd93d0b041ab467e0e..c2cd8d31bcad5612395783e4d29e5141ac37ab6c 100644 (file)
@@ -66,7 +66,6 @@ int mlx4_en_create_cq(struct mlx4_en_priv *priv,
 
        cq->ring = ring;
        cq->is_tx = mode;
-       spin_lock_init(&cq->lock);
 
        /* Allocate HW buffers on provided NUMA node.
         * dev->numa_node is used in mtt range allocation flow.
index f085c2df5e6924689c7d46c94998c6bf5f7c4625..7e4b1720c3d1bec183957beeba7d395ce38c6e34 100644 (file)
@@ -1304,15 +1304,11 @@ static void mlx4_en_netpoll(struct net_device *dev)
 {
        struct mlx4_en_priv *priv = netdev_priv(dev);
        struct mlx4_en_cq *cq;
-       unsigned long flags;
        int i;
 
        for (i = 0; i < priv->rx_ring_num; i++) {
                cq = priv->rx_cq[i];
-               spin_lock_irqsave(&cq->lock, flags);
-               napi_synchronize(&cq->napi);
-               mlx4_en_process_rx_cq(dev, cq, 0);
-               spin_unlock_irqrestore(&cq->lock, flags);
+               napi_schedule(&cq->napi);
        }
 }
 #endif
index f0ae95f66cebe27bd306d64001cc516ff41b4554..cef267e24f9c9c680613ec4ed2817c040b21c964 100644 (file)
@@ -2301,13 +2301,8 @@ static int __mlx4_init_one(struct pci_dev *pdev, int pci_dev_data)
        /* Allow large DMA segments, up to the firmware limit of 1 GB */
        dma_set_max_seg_size(&pdev->dev, 1024 * 1024 * 1024);
 
-       priv = kzalloc(sizeof(*priv), GFP_KERNEL);
-       if (!priv) {
-               err = -ENOMEM;
-               goto err_release_regions;
-       }
-
-       dev       = &priv->dev;
+       dev       = pci_get_drvdata(pdev);
+       priv      = mlx4_priv(dev);
        dev->pdev = pdev;
        INIT_LIST_HEAD(&priv->ctx_list);
        spin_lock_init(&priv->ctx_lock);
@@ -2374,10 +2369,10 @@ static int __mlx4_init_one(struct pci_dev *pdev, int pci_dev_data)
                        } else {
                                atomic_inc(&pf_loading);
                                err = pci_enable_sriov(pdev, total_vfs);
-                               atomic_dec(&pf_loading);
                                if (err) {
                                        mlx4_err(dev, "Failed to enable SR-IOV, continuing without SR-IOV (err = %d).\n",
                                                 err);
+                                       atomic_dec(&pf_loading);
                                        err = 0;
                                } else {
                                        mlx4_warn(dev, "Running in master mode\n");
@@ -2535,8 +2530,10 @@ slave_start:
        mlx4_sense_init(dev);
        mlx4_start_sense(dev);
 
-       priv->pci_dev_data = pci_dev_data;
-       pci_set_drvdata(pdev, dev);
+       priv->removed = 0;
+
+       if (mlx4_is_master(dev) && dev->num_vfs)
+               atomic_dec(&pf_loading);
 
        return 0;
 
@@ -2588,6 +2585,9 @@ err_rel_own:
        if (!mlx4_is_slave(dev))
                mlx4_free_ownership(dev);
 
+       if (mlx4_is_master(dev) && dev->num_vfs)
+               atomic_dec(&pf_loading);
+
        kfree(priv->dev.dev_vfs);
 
 err_free_dev:
@@ -2604,85 +2604,110 @@ err_disable_pdev:
 
 static int mlx4_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
 {
+       struct mlx4_priv *priv;
+       struct mlx4_dev *dev;
+
        printk_once(KERN_INFO "%s", mlx4_version);
 
+       priv = kzalloc(sizeof(*priv), GFP_KERNEL);
+       if (!priv)
+               return -ENOMEM;
+
+       dev       = &priv->dev;
+       pci_set_drvdata(pdev, dev);
+       priv->pci_dev_data = id->driver_data;
+
        return __mlx4_init_one(pdev, id->driver_data);
 }
 
-static void mlx4_remove_one(struct pci_dev *pdev)
+static void __mlx4_remove_one(struct pci_dev *pdev)
 {
        struct mlx4_dev  *dev  = pci_get_drvdata(pdev);
        struct mlx4_priv *priv = mlx4_priv(dev);
+       int               pci_dev_data;
        int p;
 
-       if (dev) {
-               /* in SRIOV it is not allowed to unload the pf's
-                * driver while there are alive vf's */
-               if (mlx4_is_master(dev)) {
-                       if (mlx4_how_many_lives_vf(dev))
-                               printk(KERN_ERR "Removing PF when there are assigned VF's !!!\n");
-               }
-               mlx4_stop_sense(dev);
-               mlx4_unregister_device(dev);
+       if (priv->removed)
+               return;
 
-               for (p = 1; p <= dev->caps.num_ports; p++) {
-                       mlx4_cleanup_port_info(&priv->port[p]);
-                       mlx4_CLOSE_PORT(dev, p);
-               }
+       pci_dev_data = priv->pci_dev_data;
 
-               if (mlx4_is_master(dev))
-                       mlx4_free_resource_tracker(dev,
-                                                  RES_TR_FREE_SLAVES_ONLY);
-
-               mlx4_cleanup_counters_table(dev);
-               mlx4_cleanup_qp_table(dev);
-               mlx4_cleanup_srq_table(dev);
-               mlx4_cleanup_cq_table(dev);
-               mlx4_cmd_use_polling(dev);
-               mlx4_cleanup_eq_table(dev);
-               mlx4_cleanup_mcg_table(dev);
-               mlx4_cleanup_mr_table(dev);
-               mlx4_cleanup_xrcd_table(dev);
-               mlx4_cleanup_pd_table(dev);
+       /* in SRIOV it is not allowed to unload the pf's
+        * driver while there are alive vf's */
+       if (mlx4_is_master(dev) && mlx4_how_many_lives_vf(dev))
+               printk(KERN_ERR "Removing PF when there are assigned VF's !!!\n");
+       mlx4_stop_sense(dev);
+       mlx4_unregister_device(dev);
 
-               if (mlx4_is_master(dev))
-                       mlx4_free_resource_tracker(dev,
-                                                  RES_TR_FREE_STRUCTS_ONLY);
-
-               iounmap(priv->kar);
-               mlx4_uar_free(dev, &priv->driver_uar);
-               mlx4_cleanup_uar_table(dev);
-               if (!mlx4_is_slave(dev))
-                       mlx4_clear_steering(dev);
-               mlx4_free_eq_table(dev);
-               if (mlx4_is_master(dev))
-                       mlx4_multi_func_cleanup(dev);
-               mlx4_close_hca(dev);
-               if (mlx4_is_slave(dev))
-                       mlx4_multi_func_cleanup(dev);
-               mlx4_cmd_cleanup(dev);
-
-               if (dev->flags & MLX4_FLAG_MSI_X)
-                       pci_disable_msix(pdev);
-               if (dev->flags & MLX4_FLAG_SRIOV) {
-                       mlx4_warn(dev, "Disabling SR-IOV\n");
-                       pci_disable_sriov(pdev);
-               }
+       for (p = 1; p <= dev->caps.num_ports; p++) {
+               mlx4_cleanup_port_info(&priv->port[p]);
+               mlx4_CLOSE_PORT(dev, p);
+       }
 
-               if (!mlx4_is_slave(dev))
-                       mlx4_free_ownership(dev);
+       if (mlx4_is_master(dev))
+               mlx4_free_resource_tracker(dev,
+                                          RES_TR_FREE_SLAVES_ONLY);
 
-               kfree(dev->caps.qp0_tunnel);
-               kfree(dev->caps.qp0_proxy);
-               kfree(dev->caps.qp1_tunnel);
-               kfree(dev->caps.qp1_proxy);
-               kfree(dev->dev_vfs);
+       mlx4_cleanup_counters_table(dev);
+       mlx4_cleanup_qp_table(dev);
+       mlx4_cleanup_srq_table(dev);
+       mlx4_cleanup_cq_table(dev);
+       mlx4_cmd_use_polling(dev);
+       mlx4_cleanup_eq_table(dev);
+       mlx4_cleanup_mcg_table(dev);
+       mlx4_cleanup_mr_table(dev);
+       mlx4_cleanup_xrcd_table(dev);
+       mlx4_cleanup_pd_table(dev);
 
-               kfree(priv);
-               pci_release_regions(pdev);
-               pci_disable_device(pdev);
-               pci_set_drvdata(pdev, NULL);
+       if (mlx4_is_master(dev))
+               mlx4_free_resource_tracker(dev,
+                                          RES_TR_FREE_STRUCTS_ONLY);
+
+       iounmap(priv->kar);
+       mlx4_uar_free(dev, &priv->driver_uar);
+       mlx4_cleanup_uar_table(dev);
+       if (!mlx4_is_slave(dev))
+               mlx4_clear_steering(dev);
+       mlx4_free_eq_table(dev);
+       if (mlx4_is_master(dev))
+               mlx4_multi_func_cleanup(dev);
+       mlx4_close_hca(dev);
+       if (mlx4_is_slave(dev))
+               mlx4_multi_func_cleanup(dev);
+       mlx4_cmd_cleanup(dev);
+
+       if (dev->flags & MLX4_FLAG_MSI_X)
+               pci_disable_msix(pdev);
+       if (dev->flags & MLX4_FLAG_SRIOV) {
+               mlx4_warn(dev, "Disabling SR-IOV\n");
+               pci_disable_sriov(pdev);
+               dev->num_vfs = 0;
        }
+
+       if (!mlx4_is_slave(dev))
+               mlx4_free_ownership(dev);
+
+       kfree(dev->caps.qp0_tunnel);
+       kfree(dev->caps.qp0_proxy);
+       kfree(dev->caps.qp1_tunnel);
+       kfree(dev->caps.qp1_proxy);
+       kfree(dev->dev_vfs);
+
+       pci_release_regions(pdev);
+       pci_disable_device(pdev);
+       memset(priv, 0, sizeof(*priv));
+       priv->pci_dev_data = pci_dev_data;
+       priv->removed = 1;
+}
+
+static void mlx4_remove_one(struct pci_dev *pdev)
+{
+       struct mlx4_dev  *dev  = pci_get_drvdata(pdev);
+       struct mlx4_priv *priv = mlx4_priv(dev);
+
+       __mlx4_remove_one(pdev);
+       kfree(priv);
+       pci_set_drvdata(pdev, NULL);
 }
 
 int mlx4_restart_one(struct pci_dev *pdev)
@@ -2692,7 +2717,7 @@ int mlx4_restart_one(struct pci_dev *pdev)
        int               pci_dev_data;
 
        pci_dev_data = priv->pci_dev_data;
-       mlx4_remove_one(pdev);
+       __mlx4_remove_one(pdev);
        return __mlx4_init_one(pdev, pci_dev_data);
 }
 
@@ -2747,7 +2772,7 @@ MODULE_DEVICE_TABLE(pci, mlx4_pci_table);
 static pci_ers_result_t mlx4_pci_err_detected(struct pci_dev *pdev,
                                              pci_channel_state_t state)
 {
-       mlx4_remove_one(pdev);
+       __mlx4_remove_one(pdev);
 
        return state == pci_channel_io_perm_failure ?
                PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_NEED_RESET;
@@ -2755,11 +2780,11 @@ static pci_ers_result_t mlx4_pci_err_detected(struct pci_dev *pdev,
 
 static pci_ers_result_t mlx4_pci_slot_reset(struct pci_dev *pdev)
 {
-       const struct pci_device_id *id;
-       int ret;
+       struct mlx4_dev  *dev  = pci_get_drvdata(pdev);
+       struct mlx4_priv *priv = mlx4_priv(dev);
+       int               ret;
 
-       id = pci_match_id(mlx4_pci_table, pdev);
-       ret = __mlx4_init_one(pdev, id->driver_data);
+       ret = __mlx4_init_one(pdev, priv->pci_dev_data);
 
        return ret ? PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_RECOVERED;
 }
index cf8be41abb36f9e0b5324abce28d24e81f4963e8..f9c46510196341a6089b0a23d7b53455dad69ae5 100644 (file)
@@ -800,6 +800,7 @@ struct mlx4_priv {
        spinlock_t              ctx_lock;
 
        int                     pci_dev_data;
+       int                     removed;
 
        struct list_head        pgdir_list;
        struct mutex            pgdir_mutex;
index 7a733c287744227a4c594571846ad55fd679f44b..04d9b6fe3e8000fdb14714b09770b11aa46079e8 100644 (file)
@@ -319,7 +319,6 @@ struct mlx4_en_cq {
        struct mlx4_cq          mcq;
        struct mlx4_hwq_resources wqres;
        int                     ring;
-       spinlock_t              lock;
        struct net_device      *dev;
        struct napi_struct      napi;
        int size;
index b48737dcd3c59bbf68e17469d76edfe5e906a53b..ba20c721ee97f59d05f18a126471cb4a4a277f0b 100644 (file)
@@ -2139,8 +2139,6 @@ static int qlcnic_83xx_get_nic_configuration(struct qlcnic_adapter *adapter)
        ahw->max_mac_filters = nic_info.max_mac_filters;
        ahw->max_mtu = nic_info.max_mtu;
 
-       adapter->max_tx_rings = ahw->max_tx_ques;
-       adapter->max_sds_rings = ahw->max_rx_ques;
        /* eSwitch capability indicates vNIC mode.
         * vNIC and SRIOV are mutually exclusive operational modes.
         * If SR-IOV capability is detected, SR-IOV physical function
@@ -2161,6 +2159,7 @@ static int qlcnic_83xx_get_nic_configuration(struct qlcnic_adapter *adapter)
 int qlcnic_83xx_configure_opmode(struct qlcnic_adapter *adapter)
 {
        struct qlcnic_hardware_context *ahw = adapter->ahw;
+       u16 max_sds_rings, max_tx_rings;
        int ret;
 
        ret = qlcnic_83xx_get_nic_configuration(adapter);
@@ -2173,18 +2172,21 @@ int qlcnic_83xx_configure_opmode(struct qlcnic_adapter *adapter)
                if (qlcnic_83xx_config_vnic_opmode(adapter))
                        return -EIO;
 
-               adapter->max_sds_rings = QLCNIC_MAX_VNIC_SDS_RINGS;
-               adapter->max_tx_rings = QLCNIC_MAX_VNIC_TX_RINGS;
+               max_sds_rings = QLCNIC_MAX_VNIC_SDS_RINGS;
+               max_tx_rings = QLCNIC_MAX_VNIC_TX_RINGS;
        } else if (ret == QLC_83XX_DEFAULT_OPMODE) {
                ahw->nic_mode = QLCNIC_DEFAULT_MODE;
                adapter->nic_ops->init_driver = qlcnic_83xx_init_default_driver;
                ahw->idc.state_entry = qlcnic_83xx_idc_ready_state_entry;
-               adapter->max_sds_rings = QLCNIC_MAX_SDS_RINGS;
-               adapter->max_tx_rings = QLCNIC_MAX_TX_RINGS;
+               max_sds_rings = QLCNIC_MAX_SDS_RINGS;
+               max_tx_rings = QLCNIC_MAX_TX_RINGS;
        } else {
                return -EIO;
        }
 
+       adapter->max_sds_rings = min(ahw->max_rx_ques, max_sds_rings);
+       adapter->max_tx_rings = min(ahw->max_tx_ques, max_tx_rings);
+
        return 0;
 }
 
@@ -2348,15 +2350,16 @@ int qlcnic_83xx_init(struct qlcnic_adapter *adapter, int pci_using_dac)
                goto disable_intr;
        }
 
+       INIT_DELAYED_WORK(&adapter->idc_aen_work, qlcnic_83xx_idc_aen_work);
+
        err = qlcnic_83xx_setup_mbx_intr(adapter);
        if (err)
                goto disable_mbx_intr;
 
        qlcnic_83xx_clear_function_resources(adapter);
-
-       INIT_DELAYED_WORK(&adapter->idc_aen_work, qlcnic_83xx_idc_aen_work);
-
+       qlcnic_dcb_enable(adapter->dcb);
        qlcnic_83xx_initialize_nic(adapter, 1);
+       qlcnic_dcb_get_info(adapter->dcb);
 
        /* Configure default, SR-IOV or Virtual NIC mode of operation */
        err = qlcnic_83xx_configure_opmode(adapter);
index 64dcbf33d8f06551cc2b6b14268f8bdb8b9cf7c6..c1e11f5715b056c0e90ba096de8f397eb50fce97 100644 (file)
@@ -883,8 +883,6 @@ int qlcnic_82xx_get_nic_info(struct qlcnic_adapter *adapter,
                npar_info->max_rx_ques = le16_to_cpu(nic_info->max_rx_ques);
                npar_info->capabilities = le32_to_cpu(nic_info->capabilities);
                npar_info->max_mtu = le16_to_cpu(nic_info->max_mtu);
-               adapter->max_tx_rings = npar_info->max_tx_ques;
-               adapter->max_sds_rings = npar_info->max_rx_ques;
        }
 
        qlcnic_free_mbx_args(&cmd);
@@ -1356,6 +1354,7 @@ int qlcnic_config_switch_port(struct qlcnic_adapter *adapter,
                        arg2 &= ~BIT_3;
                break;
        case QLCNIC_ADD_VLAN:
+                       arg1 &= ~(0x0ffff << 16);
                        arg1 |= (BIT_2 | BIT_5);
                        arg1 |= (esw_cfg->vlan_id << 16);
                        break;
index 7d4f54912bad526077b145109dc003e532b88d70..a51fe18f09a80e0d753f8ef7e8cd79142d69d0c3 100644 (file)
@@ -330,8 +330,6 @@ static int __qlcnic_dcb_attach(struct qlcnic_dcb *dcb)
                goto out_free_cfg;
        }
 
-       qlcnic_dcb_get_info(dcb);
-
        return 0;
 out_free_cfg:
        kfree(dcb->cfg);
index 309d056408834fb1f8e1cfc853c3258dadc73742..dbf75393f758a153ccecfe2a8e49edb13dc8ff9a 100644 (file)
@@ -670,7 +670,7 @@ int qlcnic_setup_tss_rss_intr(struct qlcnic_adapter *adapter)
        else
                num_msix += adapter->drv_tx_rings;
 
-       if (adapter->drv_rss_rings  > 0)
+       if (adapter->drv_rss_rings > 0)
                num_msix += adapter->drv_rss_rings;
        else
                num_msix += adapter->drv_sds_rings;
@@ -686,19 +686,15 @@ int qlcnic_setup_tss_rss_intr(struct qlcnic_adapter *adapter)
                        return -ENOMEM;
        }
 
-restore:
        for (vector = 0; vector < num_msix; vector++)
                adapter->msix_entries[vector].entry = vector;
 
+restore:
        err = pci_enable_msix(pdev, adapter->msix_entries, num_msix);
-       if (err == 0) {
-               adapter->ahw->num_msix = num_msix;
-               if (adapter->drv_tss_rings > 0)
-                       adapter->drv_tx_rings = adapter->drv_tss_rings;
+       if (err > 0) {
+               if (!adapter->drv_tss_rings && !adapter->drv_rss_rings)
+                       return -ENOSPC;
 
-               if (adapter->drv_rss_rings > 0)
-                       adapter->drv_sds_rings = adapter->drv_rss_rings;
-       } else {
                netdev_info(adapter->netdev,
                            "Unable to allocate %d MSI-X vectors, Available vectors %d\n",
                            num_msix, err);
@@ -716,12 +712,20 @@ restore:
                            "Restoring %d Tx, %d SDS rings for total %d vectors.\n",
                            adapter->drv_tx_rings, adapter->drv_sds_rings,
                            num_msix);
-               goto restore;
 
-               err = -EIO;
+               goto restore;
+       } else if (err < 0) {
+               return err;
        }
 
-       return err;
+       adapter->ahw->num_msix = num_msix;
+       if (adapter->drv_tss_rings > 0)
+               adapter->drv_tx_rings = adapter->drv_tss_rings;
+
+       if (adapter->drv_rss_rings > 0)
+               adapter->drv_sds_rings = adapter->drv_rss_rings;
+
+       return 0;
 }
 
 int qlcnic_enable_msix(struct qlcnic_adapter *adapter, u32 num_msix)
@@ -2528,8 +2532,6 @@ qlcnic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
                goto err_out_free_hw;
        }
 
-       qlcnic_dcb_enable(adapter->dcb);
-
        if (qlcnic_read_mac_addr(adapter))
                dev_warn(&pdev->dev, "failed to read mac addr\n");
 
@@ -2549,7 +2551,10 @@ qlcnic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
                         "Device does not support MSI interrupts\n");
 
        if (qlcnic_82xx_check(adapter)) {
+               qlcnic_dcb_enable(adapter->dcb);
+               qlcnic_dcb_get_info(adapter->dcb);
                err = qlcnic_setup_intr(adapter);
+
                if (err) {
                        dev_err(&pdev->dev, "Failed to setup interrupt\n");
                        goto err_out_disable_msi;
index 14f748cbf0deeb8cd4c6ccfa3039d08764ee1142..2801379915447dc54683719c40058d9d89f8387f 100644 (file)
@@ -461,6 +461,16 @@ static int qlcnic_pci_sriov_disable(struct qlcnic_adapter *adapter)
 {
        struct net_device *netdev = adapter->netdev;
 
+       if (pci_vfs_assigned(adapter->pdev)) {
+               netdev_err(adapter->netdev,
+                          "SR-IOV VFs belonging to port %d are assigned to VMs. SR-IOV can not be disabled on this port\n",
+                          adapter->portnum);
+               netdev_info(adapter->netdev,
+                           "Please detach SR-IOV VFs belonging to port %d from VMs, and then try to disable SR-IOV on this port\n",
+                           adapter->portnum);
+               return -EPERM;
+       }
+
        rtnl_lock();
        if (netif_running(netdev))
                __qlcnic_down(adapter, netdev);
index 448d156c3d0804da56c2633113d3a7ef04b8e683..cd346e27f2e1270078a7580c5e563bc178d5ef37 100644 (file)
@@ -354,7 +354,7 @@ int qlcnic_is_valid_nic_func(struct qlcnic_adapter *adapter, u8 pci_func)
 {
        int i;
 
-       for (i = 0; i < adapter->ahw->max_vnic_func; i++) {
+       for (i = 0; i < adapter->ahw->total_nic_func; i++) {
                if (adapter->npars[i].pci_func == pci_func)
                        return i;
        }
@@ -720,6 +720,7 @@ static ssize_t qlcnic_sysfs_read_npar_config(struct file *file,
        struct qlcnic_adapter *adapter = dev_get_drvdata(dev);
        struct qlcnic_npar_func_cfg *np_cfg;
        struct qlcnic_info nic_info;
+       u8 pci_func;
        int i, ret;
        u32 count;
 
@@ -729,26 +730,28 @@ static ssize_t qlcnic_sysfs_read_npar_config(struct file *file,
 
        count = size / sizeof(struct qlcnic_npar_func_cfg);
        for (i = 0; i < adapter->ahw->total_nic_func; i++) {
-               if (qlcnic_is_valid_nic_func(adapter, i) < 0)
-                       continue;
                if (adapter->npars[i].pci_func >= count) {
                        dev_dbg(dev, "%s: Total nic functions[%d], App sent function count[%d]\n",
                                __func__, adapter->ahw->total_nic_func, count);
                        continue;
                }
-               ret = qlcnic_get_nic_info(adapter, &nic_info, i);
-               if (ret)
-                       return ret;
                if (!adapter->npars[i].eswitch_status)
                        continue;
-               np_cfg[i].pci_func = i;
-               np_cfg[i].op_mode = (u8)nic_info.op_mode;
-               np_cfg[i].port_num = nic_info.phys_port;
-               np_cfg[i].fw_capab = nic_info.capabilities;
-               np_cfg[i].min_bw = nic_info.min_tx_bw;
-               np_cfg[i].max_bw = nic_info.max_tx_bw;
-               np_cfg[i].max_tx_queues = nic_info.max_tx_ques;
-               np_cfg[i].max_rx_queues = nic_info.max_rx_ques;
+               pci_func = adapter->npars[i].pci_func;
+               if (qlcnic_is_valid_nic_func(adapter, pci_func) < 0)
+                       continue;
+               ret = qlcnic_get_nic_info(adapter, &nic_info, pci_func);
+               if (ret)
+                       return ret;
+
+               np_cfg[pci_func].pci_func = pci_func;
+               np_cfg[pci_func].op_mode = (u8)nic_info.op_mode;
+               np_cfg[pci_func].port_num = nic_info.phys_port;
+               np_cfg[pci_func].fw_capab = nic_info.capabilities;
+               np_cfg[pci_func].min_bw = nic_info.min_tx_bw;
+               np_cfg[pci_func].max_bw = nic_info.max_tx_bw;
+               np_cfg[pci_func].max_tx_queues = nic_info.max_tx_ques;
+               np_cfg[pci_func].max_rx_queues = nic_info.max_rx_ques;
        }
        return size;
 }
index 21c20ea0dad066fac03b1e5cf181f1f327731ad0..b5ed30a3914486c10ebe9e004a3f7aa3d052db04 100644 (file)
@@ -738,8 +738,11 @@ static int efx_ef10_reset(struct efx_nic *efx, enum reset_type reset_type)
        /* If it was a port reset, trigger reallocation of MC resources.
         * Note that on an MC reset nothing needs to be done now because we'll
         * detect the MC reset later and handle it then.
+        * For an FLR, we never get an MC reset event, but the MC has reset all
+        * resources assigned to us, so we have to trigger reallocation now.
         */
-       if (reset_type == RESET_TYPE_ALL && !rc)
+       if ((reset_type == RESET_TYPE_ALL ||
+            reset_type == RESET_TYPE_MCDI_TIMEOUT) && !rc)
                efx_ef10_reset_mc_allocations(efx);
        return rc;
 }
@@ -2141,6 +2144,11 @@ static int efx_ef10_fini_dmaq(struct efx_nic *efx)
        return 0;
 }
 
+static void efx_ef10_prepare_flr(struct efx_nic *efx)
+{
+       atomic_set(&efx->active_queues, 0);
+}
+
 static bool efx_ef10_filter_equal(const struct efx_filter_spec *left,
                                  const struct efx_filter_spec *right)
 {
@@ -3603,6 +3611,8 @@ const struct efx_nic_type efx_hunt_a0_nic_type = {
        .probe_port = efx_mcdi_port_probe,
        .remove_port = efx_mcdi_port_remove,
        .fini_dmaq = efx_ef10_fini_dmaq,
+       .prepare_flr = efx_ef10_prepare_flr,
+       .finish_flr = efx_port_dummy_op_void,
        .describe_stats = efx_ef10_describe_stats,
        .update_stats = efx_ef10_update_stats,
        .start_stats = efx_mcdi_mac_start_stats,
index 57b971e5e6b2429bce3b8cb319df97e3e44912dd..63d595fd3cc5f5a9df298dfdd2583abcec9a3a03 100644 (file)
@@ -76,6 +76,7 @@ const char *const efx_reset_type_names[] = {
        [RESET_TYPE_RECOVER_OR_ALL]     = "RECOVER_OR_ALL",
        [RESET_TYPE_WORLD]              = "WORLD",
        [RESET_TYPE_RECOVER_OR_DISABLE] = "RECOVER_OR_DISABLE",
+       [RESET_TYPE_MC_BIST]            = "MC_BIST",
        [RESET_TYPE_DISABLE]            = "DISABLE",
        [RESET_TYPE_TX_WATCHDOG]        = "TX_WATCHDOG",
        [RESET_TYPE_INT_ERROR]          = "INT_ERROR",
@@ -83,7 +84,7 @@ const char *const efx_reset_type_names[] = {
        [RESET_TYPE_DMA_ERROR]          = "DMA_ERROR",
        [RESET_TYPE_TX_SKIP]            = "TX_SKIP",
        [RESET_TYPE_MC_FAILURE]         = "MC_FAILURE",
-       [RESET_TYPE_MC_BIST]            = "MC_BIST",
+       [RESET_TYPE_MCDI_TIMEOUT]       = "MCDI_TIMEOUT (FLR)",
 };
 
 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
@@ -1739,7 +1740,8 @@ static void efx_start_all(struct efx_nic *efx)
 
        /* Check that it is appropriate to restart the interface. All
         * of these flags are safe to read under just the rtnl lock */
-       if (efx->port_enabled || !netif_running(efx->net_dev))
+       if (efx->port_enabled || !netif_running(efx->net_dev) ||
+           efx->reset_pending)
                return;
 
        efx_start_port(efx);
@@ -2334,6 +2336,9 @@ void efx_reset_down(struct efx_nic *efx, enum reset_type method)
 {
        EFX_ASSERT_RESET_SERIALISED(efx);
 
+       if (method == RESET_TYPE_MCDI_TIMEOUT)
+               efx->type->prepare_flr(efx);
+
        efx_stop_all(efx);
        efx_disable_interrupts(efx);
 
@@ -2354,6 +2359,10 @@ int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
 
        EFX_ASSERT_RESET_SERIALISED(efx);
 
+       if (method == RESET_TYPE_MCDI_TIMEOUT)
+               efx->type->finish_flr(efx);
+
+       /* Ensure that SRAM is initialised even if we're disabling the device */
        rc = efx->type->init(efx);
        if (rc) {
                netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
@@ -2417,7 +2426,10 @@ int efx_reset(struct efx_nic *efx, enum reset_type method)
        /* Clear flags for the scopes we covered.  We assume the NIC and
         * driver are now quiescent so that there is no race here.
         */
-       efx->reset_pending &= -(1 << (method + 1));
+       if (method < RESET_TYPE_MAX_METHOD)
+               efx->reset_pending &= -(1 << (method + 1));
+       else /* it doesn't fit into the well-ordered scope hierarchy */
+               __clear_bit(method, &efx->reset_pending);
 
        /* Reinitialise bus-mastering, which may have been turned off before
         * the reset was scheduled. This is still appropriate, even in the
@@ -2546,6 +2558,7 @@ void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
        case RESET_TYPE_DISABLE:
        case RESET_TYPE_RECOVER_OR_DISABLE:
        case RESET_TYPE_MC_BIST:
+       case RESET_TYPE_MCDI_TIMEOUT:
                method = type;
                netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
                          RESET_TYPE(method));
index 75ef7ef6450b095f3febd3ae013510412c03b74e..d1dbb5fb31bb515b6926d981bf8eab0aafa6deae 100644 (file)
@@ -143,6 +143,7 @@ enum efx_loopback_mode {
  * @RESET_TYPE_WORLD: Reset as much as possible
  * @RESET_TYPE_RECOVER_OR_DISABLE: Try to recover. Apply RESET_TYPE_DISABLE if
  * unsuccessful.
+ * @RESET_TYPE_MC_BIST: MC entering BIST mode.
  * @RESET_TYPE_DISABLE: Reset datapath, MAC and PHY; leave NIC disabled
  * @RESET_TYPE_TX_WATCHDOG: reset due to TX watchdog
  * @RESET_TYPE_INT_ERROR: reset due to internal error
@@ -150,14 +151,16 @@ enum efx_loopback_mode {
  * @RESET_TYPE_DMA_ERROR: DMA error
  * @RESET_TYPE_TX_SKIP: hardware completed empty tx descriptors
  * @RESET_TYPE_MC_FAILURE: MC reboot/assertion
+ * @RESET_TYPE_MCDI_TIMEOUT: MCDI timeout.
  */
 enum reset_type {
-       RESET_TYPE_INVISIBLE = 0,
-       RESET_TYPE_RECOVER_OR_ALL = 1,
-       RESET_TYPE_ALL = 2,
-       RESET_TYPE_WORLD = 3,
-       RESET_TYPE_RECOVER_OR_DISABLE = 4,
-       RESET_TYPE_DISABLE = 5,
+       RESET_TYPE_INVISIBLE,
+       RESET_TYPE_RECOVER_OR_ALL,
+       RESET_TYPE_ALL,
+       RESET_TYPE_WORLD,
+       RESET_TYPE_RECOVER_OR_DISABLE,
+       RESET_TYPE_MC_BIST,
+       RESET_TYPE_DISABLE,
        RESET_TYPE_MAX_METHOD,
        RESET_TYPE_TX_WATCHDOG,
        RESET_TYPE_INT_ERROR,
@@ -165,7 +168,13 @@ enum reset_type {
        RESET_TYPE_DMA_ERROR,
        RESET_TYPE_TX_SKIP,
        RESET_TYPE_MC_FAILURE,
-       RESET_TYPE_MC_BIST,
+       /* RESET_TYPE_MCDI_TIMEOUT is actually a method, not just a reason, but
+        * it doesn't fit the scope hierarchy (not well-ordered by inclusion).
+        * We encode this by having its enum value be greater than
+        * RESET_TYPE_MAX_METHOD. This also prevents issuing it with
+        * efx_ioctl_reset.
+        */
+       RESET_TYPE_MCDI_TIMEOUT,
        RESET_TYPE_MAX,
 };
 
index 8ec20b713cc610422781facd45c3c1a03c664164..fae25a41864797c68a7e7cedcf1607a6f49eb741 100644 (file)
@@ -2696,6 +2696,8 @@ const struct efx_nic_type falcon_a1_nic_type = {
        .fini_dmaq = efx_farch_fini_dmaq,
        .prepare_flush = falcon_prepare_flush,
        .finish_flush = efx_port_dummy_op_void,
+       .prepare_flr = efx_port_dummy_op_void,
+       .finish_flr = efx_farch_finish_flr,
        .describe_stats = falcon_describe_nic_stats,
        .update_stats = falcon_update_nic_stats,
        .start_stats = falcon_start_nic_stats,
@@ -2790,6 +2792,8 @@ const struct efx_nic_type falcon_b0_nic_type = {
        .fini_dmaq = efx_farch_fini_dmaq,
        .prepare_flush = falcon_prepare_flush,
        .finish_flush = efx_port_dummy_op_void,
+       .prepare_flr = efx_port_dummy_op_void,
+       .finish_flr = efx_farch_finish_flr,
        .describe_stats = falcon_describe_nic_stats,
        .update_stats = falcon_update_nic_stats,
        .start_stats = falcon_start_nic_stats,
index a08761360cdf526caf33051142149c2962a17f6c..0537381cd2f6a443a6b0188f4e3218c90242c03b 100644 (file)
@@ -741,6 +741,28 @@ int efx_farch_fini_dmaq(struct efx_nic *efx)
        return rc;
 }
 
+/* Reset queue and flush accounting after FLR
+ *
+ * One possible cause of FLR recovery is that DMA may be failing (eg. if bus
+ * mastering was disabled), in which case we don't receive (RXQ) flush
+ * completion events.  This means that efx->rxq_flush_outstanding remained at 4
+ * after the FLR; also, efx->active_queues was non-zero (as no flush completion
+ * events were received, and we didn't go through efx_check_tx_flush_complete())
+ * If we don't fix this up, on the next call to efx_realloc_channels() we won't
+ * flush any RX queues because efx->rxq_flush_outstanding is at the limit of 4
+ * for batched flush requests; and the efx->active_queues gets messed up because
+ * we keep incrementing for the newly initialised queues, but it never went to
+ * zero previously.  Then we get a timeout every time we try to restart the
+ * queues, as it doesn't go back to zero when we should be flushing the queues.
+ */
+void efx_farch_finish_flr(struct efx_nic *efx)
+{
+       atomic_set(&efx->rxq_flush_pending, 0);
+       atomic_set(&efx->rxq_flush_outstanding, 0);
+       atomic_set(&efx->active_queues, 0);
+}
+
+
 /**************************************************************************
  *
  * Event queue processing
index 7bd4b14bf3b32f627457eb1c48f6231922838670..5239cf9bdc567f4f6779c10478a623ed9a36f505 100644 (file)
@@ -52,12 +52,7 @@ static void efx_mcdi_timeout_async(unsigned long context);
 static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
                               bool *was_attached_out);
 static bool efx_mcdi_poll_once(struct efx_nic *efx);
-
-static inline struct efx_mcdi_iface *efx_mcdi(struct efx_nic *efx)
-{
-       EFX_BUG_ON_PARANOID(!efx->mcdi);
-       return &efx->mcdi->iface;
-}
+static void efx_mcdi_abandon(struct efx_nic *efx);
 
 int efx_mcdi_init(struct efx_nic *efx)
 {
@@ -558,6 +553,8 @@ static int _efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen,
                        rc = 0;
                }
 
+               efx_mcdi_abandon(efx);
+
                /* Close the race with efx_mcdi_ev_cpl() executing just too late
                 * and completing a request we've just cancelled, by ensuring
                 * that the seqno check therein fails.
@@ -672,6 +669,9 @@ int efx_mcdi_rpc_start(struct efx_nic *efx, unsigned cmd,
        if (efx->mc_bist_for_other_fn)
                return -ENETDOWN;
 
+       if (mcdi->mode == MCDI_MODE_FAIL)
+               return -ENETDOWN;
+
        efx_mcdi_acquire_sync(mcdi);
        efx_mcdi_send_request(efx, cmd, inbuf, inlen);
        return 0;
@@ -812,7 +812,11 @@ void efx_mcdi_mode_poll(struct efx_nic *efx)
                return;
 
        mcdi = efx_mcdi(efx);
-       if (mcdi->mode == MCDI_MODE_POLL)
+       /* If already in polling mode, nothing to do.
+        * If in fail-fast state, don't switch to polled completion.
+        * FLR recovery will do that later.
+        */
+       if (mcdi->mode == MCDI_MODE_POLL || mcdi->mode == MCDI_MODE_FAIL)
                return;
 
        /* We can switch from event completion to polled completion, because
@@ -841,8 +845,8 @@ void efx_mcdi_flush_async(struct efx_nic *efx)
 
        mcdi = efx_mcdi(efx);
 
-       /* We must be in polling mode so no more requests can be queued */
-       BUG_ON(mcdi->mode != MCDI_MODE_POLL);
+       /* We must be in poll or fail mode so no more requests can be queued */
+       BUG_ON(mcdi->mode == MCDI_MODE_EVENTS);
 
        del_timer_sync(&mcdi->async_timer);
 
@@ -875,8 +879,11 @@ void efx_mcdi_mode_event(struct efx_nic *efx)
                return;
 
        mcdi = efx_mcdi(efx);
-
-       if (mcdi->mode == MCDI_MODE_EVENTS)
+       /* If already in event completion mode, nothing to do.
+        * If in fail-fast state, don't switch to event completion.  FLR
+        * recovery will do that later.
+        */
+       if (mcdi->mode == MCDI_MODE_EVENTS || mcdi->mode == MCDI_MODE_FAIL)
                return;
 
        /* We can't switch from polled to event completion in the middle of a
@@ -966,6 +973,19 @@ static void efx_mcdi_ev_bist(struct efx_nic *efx)
        spin_unlock(&mcdi->iface_lock);
 }
 
+/* MCDI timeouts seen, so make all MCDI calls fail-fast and issue an FLR to try
+ * to recover.
+ */
+static void efx_mcdi_abandon(struct efx_nic *efx)
+{
+       struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
+
+       if (xchg(&mcdi->mode, MCDI_MODE_FAIL) == MCDI_MODE_FAIL)
+               return; /* it had already been done */
+       netif_dbg(efx, hw, efx->net_dev, "MCDI is timing out; trying to recover\n");
+       efx_schedule_reset(efx, RESET_TYPE_MCDI_TIMEOUT);
+}
+
 /* Called from  falcon_process_eventq for MCDI events */
 void efx_mcdi_process_event(struct efx_channel *channel,
                            efx_qword_t *event)
@@ -1512,6 +1532,19 @@ int efx_mcdi_reset(struct efx_nic *efx, enum reset_type method)
 {
        int rc;
 
+       /* If MCDI is down, we can't handle_assertion */
+       if (method == RESET_TYPE_MCDI_TIMEOUT) {
+               rc = pci_reset_function(efx->pci_dev);
+               if (rc)
+                       return rc;
+               /* Re-enable polled MCDI completion */
+               if (efx->mcdi) {
+                       struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
+                       mcdi->mode = MCDI_MODE_POLL;
+               }
+               return 0;
+       }
+
        /* Recover from a failed assertion pre-reset */
        rc = efx_mcdi_handle_assertion(efx);
        if (rc)
index 52931aebf3c304e582ffa33443a878cade9ca1ab..56465f7465a22b09c9a5fdd1c1dd8b1fa90da399 100644 (file)
@@ -28,9 +28,16 @@ enum efx_mcdi_state {
        MCDI_STATE_COMPLETED,
 };
 
+/**
+ * enum efx_mcdi_mode - MCDI transaction mode
+ * @MCDI_MODE_POLL: poll for MCDI completion, until timeout
+ * @MCDI_MODE_EVENTS: wait for an mcdi_event.  On timeout, poll once
+ * @MCDI_MODE_FAIL: we think MCDI is dead, so fail-fast all calls
+ */
 enum efx_mcdi_mode {
        MCDI_MODE_POLL,
        MCDI_MODE_EVENTS,
+       MCDI_MODE_FAIL,
 };
 
 /**
@@ -104,6 +111,12 @@ struct efx_mcdi_data {
        u32 fn_flags;
 };
 
+static inline struct efx_mcdi_iface *efx_mcdi(struct efx_nic *efx)
+{
+       EFX_BUG_ON_PARANOID(!efx->mcdi);
+       return &efx->mcdi->iface;
+}
+
 #ifdef CONFIG_SFC_MCDI_MON
 static inline struct efx_mcdi_mon *efx_mcdi_mon(struct efx_nic *efx)
 {
index 8a400a0595eb8c30ec051aa1e06b3f13e6478eea..5bdae8ed7c5734fde156d8c7d6317d4d839bfc5d 100644 (file)
@@ -972,6 +972,8 @@ struct efx_mtd_partition {
  *     (for Falcon architecture)
  * @finish_flush: Clean up after flushing the DMA queues (for Falcon
  *     architecture)
+ * @prepare_flr: Prepare for an FLR
+ * @finish_flr: Clean up after an FLR
  * @describe_stats: Describe statistics for ethtool
  * @update_stats: Update statistics not provided by event handling.
  *     Either argument may be %NULL.
@@ -1100,6 +1102,8 @@ struct efx_nic_type {
        int (*fini_dmaq)(struct efx_nic *efx);
        void (*prepare_flush)(struct efx_nic *efx);
        void (*finish_flush)(struct efx_nic *efx);
+       void (*prepare_flr)(struct efx_nic *efx);
+       void (*finish_flr)(struct efx_nic *efx);
        size_t (*describe_stats)(struct efx_nic *efx, u8 *names);
        size_t (*update_stats)(struct efx_nic *efx, u64 *full_stats,
                               struct rtnl_link_stats64 *core_stats);
index a001fae1a8d78640d9ed25faf1919941dfd6e975..d3ad8ed8d901a93eb4e0908208949b9d7e7a0ba8 100644 (file)
@@ -757,6 +757,7 @@ static inline int efx_nic_irq_test_irq_cpu(struct efx_nic *efx)
 int efx_nic_flush_queues(struct efx_nic *efx);
 void siena_prepare_flush(struct efx_nic *efx);
 int efx_farch_fini_dmaq(struct efx_nic *efx);
+void efx_farch_finish_flr(struct efx_nic *efx);
 void siena_finish_flush(struct efx_nic *efx);
 void falcon_start_nic_stats(struct efx_nic *efx);
 void falcon_stop_nic_stats(struct efx_nic *efx);
index 23f3a6f7737a19ee27d1362776e38314aa4632e3..50ffefed492c1129f3fdf4d2011f0036b2ee4078 100644 (file)
@@ -921,6 +921,8 @@ const struct efx_nic_type siena_a0_nic_type = {
        .fini_dmaq = efx_farch_fini_dmaq,
        .prepare_flush = siena_prepare_flush,
        .finish_flush = siena_finish_flush,
+       .prepare_flr = efx_port_dummy_op_void,
+       .finish_flr = efx_farch_finish_flr,
        .describe_stats = siena_describe_nic_stats,
        .update_stats = siena_update_nic_stats,
        .start_stats = efx_mcdi_mac_start_stats,
index 430bb0db9bc4c7e376ab042d8544d0dc3573cc28..e36f194673a45a2035a15830571e4e2c02039839 100644 (file)
@@ -365,7 +365,7 @@ __at86rf230_read_subreg(struct at86rf230_local *lp,
        dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
 
        if (status == 0)
-               *data = buf[1];
+               *data = (buf[1] & mask) >> shift;
 
        return status;
 }
@@ -1025,14 +1025,6 @@ static int at86rf230_hw_init(struct at86rf230_local *lp)
                return -EINVAL;
        }
 
-       rc = at86rf230_read_subreg(lp, SR_AVDD_OK, &status);
-       if (rc)
-               return rc;
-       if (!status) {
-               dev_err(&lp->spi->dev, "AVDD error\n");
-               return -EINVAL;
-       }
-
        return 0;
 }
 
index e701433bf52f60a4fb42f0ca631cbd1fdbb68a2c..9c4defdec67b09299f38f1b06bf8eacbccd007d1 100644 (file)
 
 struct mdio_gpio_info {
        struct mdiobb_ctrl ctrl;
-       int mdc, mdio;
+       int mdc, mdio, mdo;
+       int mdc_active_low, mdio_active_low, mdo_active_low;
 };
 
 static void *mdio_gpio_of_get_data(struct platform_device *pdev)
 {
        struct device_node *np = pdev->dev.of_node;
        struct mdio_gpio_platform_data *pdata;
+       enum of_gpio_flags flags;
        int ret;
 
        pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
        if (!pdata)
                return NULL;
 
-       ret = of_get_gpio(np, 0);
+       ret = of_get_gpio_flags(np, 0, &flags);
        if (ret < 0)
                return NULL;
 
        pdata->mdc = ret;
+       pdata->mdc_active_low = flags & OF_GPIO_ACTIVE_LOW;
 
-       ret = of_get_gpio(np, 1);
+       ret = of_get_gpio_flags(np, 1, &flags);
        if (ret < 0)
                return NULL;
        pdata->mdio = ret;
+       pdata->mdio_active_low = flags & OF_GPIO_ACTIVE_LOW;
+
+       ret = of_get_gpio_flags(np, 2, &flags);
+       if (ret > 0) {
+               pdata->mdo = ret;
+               pdata->mdo_active_low = flags & OF_GPIO_ACTIVE_LOW;
+       }
 
        return pdata;
 }
@@ -64,8 +74,19 @@ static void mdio_dir(struct mdiobb_ctrl *ctrl, int dir)
        struct mdio_gpio_info *bitbang =
                container_of(ctrl, struct mdio_gpio_info, ctrl);
 
+       if (bitbang->mdo) {
+               /* Separate output pin. Always set its value to high
+                * when changing direction. If direction is input,
+                * assume the pin serves as pull-up. If direction is
+                * output, the default value is high.
+                */
+               gpio_set_value(bitbang->mdo, 1 ^ bitbang->mdo_active_low);
+               return;
+       }
+
        if (dir)
-               gpio_direction_output(bitbang->mdio, 1);
+               gpio_direction_output(bitbang->mdio,
+                                     1 ^ bitbang->mdio_active_low);
        else
                gpio_direction_input(bitbang->mdio);
 }
@@ -75,7 +96,7 @@ static int mdio_get(struct mdiobb_ctrl *ctrl)
        struct mdio_gpio_info *bitbang =
                container_of(ctrl, struct mdio_gpio_info, ctrl);
 
-       return gpio_get_value(bitbang->mdio);
+       return gpio_get_value(bitbang->mdio) ^ bitbang->mdio_active_low;
 }
 
 static void mdio_set(struct mdiobb_ctrl *ctrl, int what)
@@ -83,7 +104,10 @@ static void mdio_set(struct mdiobb_ctrl *ctrl, int what)
        struct mdio_gpio_info *bitbang =
                container_of(ctrl, struct mdio_gpio_info, ctrl);
 
-       gpio_set_value(bitbang->mdio, what);
+       if (bitbang->mdo)
+               gpio_set_value(bitbang->mdo, what ^ bitbang->mdo_active_low);
+       else
+               gpio_set_value(bitbang->mdio, what ^ bitbang->mdio_active_low);
 }
 
 static void mdc_set(struct mdiobb_ctrl *ctrl, int what)
@@ -91,7 +115,7 @@ static void mdc_set(struct mdiobb_ctrl *ctrl, int what)
        struct mdio_gpio_info *bitbang =
                container_of(ctrl, struct mdio_gpio_info, ctrl);
 
-       gpio_set_value(bitbang->mdc, what);
+       gpio_set_value(bitbang->mdc, what ^ bitbang->mdc_active_low);
 }
 
 static struct mdiobb_ops mdio_gpio_ops = {
@@ -110,18 +134,22 @@ static struct mii_bus *mdio_gpio_bus_init(struct device *dev,
        struct mdio_gpio_info *bitbang;
        int i;
 
-       bitbang = kzalloc(sizeof(*bitbang), GFP_KERNEL);
+       bitbang = devm_kzalloc(dev, sizeof(*bitbang), GFP_KERNEL);
        if (!bitbang)
                goto out;
 
        bitbang->ctrl.ops = &mdio_gpio_ops;
        bitbang->ctrl.reset = pdata->reset;
        bitbang->mdc = pdata->mdc;
+       bitbang->mdc_active_low = pdata->mdc_active_low;
        bitbang->mdio = pdata->mdio;
+       bitbang->mdio_active_low = pdata->mdio_active_low;
+       bitbang->mdo = pdata->mdo;
+       bitbang->mdo_active_low = pdata->mdo_active_low;
 
        new_bus = alloc_mdio_bitbang(&bitbang->ctrl);
        if (!new_bus)
-               goto out_free_bitbang;
+               goto out;
 
        new_bus->name = "GPIO Bitbanged MDIO",
 
@@ -138,11 +166,18 @@ static struct mii_bus *mdio_gpio_bus_init(struct device *dev,
 
        snprintf(new_bus->id, MII_BUS_ID_SIZE, "gpio-%x", bus_id);
 
-       if (gpio_request(bitbang->mdc, "mdc"))
+       if (devm_gpio_request(dev, bitbang->mdc, "mdc"))
+               goto out_free_bus;
+
+       if (devm_gpio_request(dev, bitbang->mdio, "mdio"))
                goto out_free_bus;
 
-       if (gpio_request(bitbang->mdio, "mdio"))
-               goto out_free_mdc;
+       if (bitbang->mdo) {
+               if (devm_gpio_request(dev, bitbang->mdo, "mdo"))
+                       goto out_free_bus;
+               gpio_direction_output(bitbang->mdo, 1);
+               gpio_direction_input(bitbang->mdio);
+       }
 
        gpio_direction_output(bitbang->mdc, 0);
 
@@ -150,12 +185,8 @@ static struct mii_bus *mdio_gpio_bus_init(struct device *dev,
 
        return new_bus;
 
-out_free_mdc:
-       gpio_free(bitbang->mdc);
 out_free_bus:
        free_mdio_bitbang(new_bus);
-out_free_bitbang:
-       kfree(bitbang);
 out:
        return NULL;
 }
@@ -163,13 +194,8 @@ out:
 static void mdio_gpio_bus_deinit(struct device *dev)
 {
        struct mii_bus *bus = dev_get_drvdata(dev);
-       struct mdio_gpio_info *bitbang = bus->priv;
 
-       dev_set_drvdata(dev, NULL);
-       gpio_free(bitbang->mdio);
-       gpio_free(bitbang->mdc);
        free_mdio_bitbang(bus);
-       kfree(bitbang);
 }
 
 static void mdio_gpio_bus_destroy(struct device *dev)
index c55e316373a12671446973b1418e1e7c153df350..82355d5d155a86921be733cc40deefcbaa6b7116 100644 (file)
@@ -1755,8 +1755,8 @@ int vxlan_xmit_skb(struct vxlan_sock *vs,
        if (err)
                return err;
 
-       return iptunnel_xmit(rt, skb, src, dst, IPPROTO_UDP, tos, ttl, df,
-                            false);
+       return iptunnel_xmit(vs->sock->sk, rt, skb, src, dst, IPPROTO_UDP,
+                            tos, ttl, df, false);
 }
 EXPORT_SYMBOL_GPL(vxlan_xmit_skb);
 
index 84734a8050925054b69c981fc9be2ebb0341335c..83c39e2858bf70a1673cf2c6d9813a92f25ce4d3 100644 (file)
@@ -1521,11 +1521,7 @@ static int cosa_reset_and_read_id(struct cosa_data *cosa, char *idstring)
        cosa_putstatus(cosa, 0);
        cosa_getdata8(cosa);
        cosa_putstatus(cosa, SR_RST);
-#ifdef MODULE
        msleep(500);
-#else
-       udelay(5*100000);
-#endif
        /* Disable all IRQs from the card */
        cosa_putstatus(cosa, 0);
 
index e323b4d54338e490b5424c89cccd7a0ec19fc832..34f97c31eecf7486493e7e730ea16e17474761e5 100644 (file)
@@ -41,6 +41,8 @@ static const char * const cw1200_debug_link_id[] = {
        "REQ",
        "SOFT",
        "HARD",
+       "RESET",
+       "RESET_REMAP",
 };
 
 static const char *cw1200_debug_mode(int mode)
index 003a546571d4772ba568d388acec485c1443f67f..4c2d4ef28b220c719ac49f9f9726b931c2d35442 100644 (file)
@@ -67,8 +67,8 @@
 #include "iwl-agn-hw.h"
 
 /* Highest firmware API version supported */
-#define IWL7260_UCODE_API_MAX  8
-#define IWL3160_UCODE_API_MAX  8
+#define IWL7260_UCODE_API_MAX  9
+#define IWL3160_UCODE_API_MAX  9
 
 /* Oldest version we won't warn about */
 #define IWL7260_UCODE_API_OK   8
@@ -244,3 +244,4 @@ const struct iwl_cfg iwl7265_n_cfg = {
 
 MODULE_FIRMWARE(IWL7260_MODULE_FIRMWARE(IWL7260_UCODE_API_OK));
 MODULE_FIRMWARE(IWL3160_MODULE_FIRMWARE(IWL3160_UCODE_API_OK));
+MODULE_FIRMWARE(IWL7265_MODULE_FIRMWARE(IWL7260_UCODE_API_OK));
index 685f7e8e6943b91f0f381dde4ad3718df25e281b..fa858d548d13c0bd794b98dc4da2053893b460dc 100644 (file)
@@ -190,7 +190,7 @@ static const __le32 iwl_combined_lookup[BT_COEX_MAX_LUT][BT_COEX_LUT_SIZE] = {
                cpu_to_le32(0xcc00aaaa),
                cpu_to_le32(0x0000aaaa),
                cpu_to_le32(0xc0004000),
-               cpu_to_le32(0x00000000),
+               cpu_to_le32(0x00004000),
                cpu_to_le32(0xf0005000),
                cpu_to_le32(0xf0005000),
        },
@@ -213,16 +213,16 @@ static const __le32 iwl_combined_lookup[BT_COEX_MAX_LUT][BT_COEX_LUT_SIZE] = {
                /* Tx Tx disabled */
                cpu_to_le32(0xaaaaaaaa),
                cpu_to_le32(0xaaaaaaaa),
-               cpu_to_le32(0xaaaaaaaa),
+               cpu_to_le32(0xeeaaaaaa),
                cpu_to_le32(0xaaaaaaaa),
                cpu_to_le32(0xcc00ff28),
                cpu_to_le32(0x0000aaaa),
                cpu_to_le32(0xcc00aaaa),
                cpu_to_le32(0x0000aaaa),
-               cpu_to_le32(0xC0004000),
-               cpu_to_le32(0xC0004000),
-               cpu_to_le32(0xF0005000),
-               cpu_to_le32(0xF0005000),
+               cpu_to_le32(0xc0004000),
+               cpu_to_le32(0xc0004000),
+               cpu_to_le32(0xf0005000),
+               cpu_to_le32(0xf0005000),
        },
 };
 
@@ -1262,6 +1262,7 @@ int iwl_mvm_rx_ant_coupling_notif(struct iwl_mvm *mvm,
        struct iwl_rx_packet *pkt = rxb_addr(rxb);
        u32 ant_isolation = le32_to_cpup((void *)pkt->data);
        u8 __maybe_unused lower_bound, upper_bound;
+       int ret;
        u8 lut;
 
        struct iwl_bt_coex_cmd *bt_cmd;
@@ -1318,5 +1319,8 @@ int iwl_mvm_rx_ant_coupling_notif(struct iwl_mvm *mvm,
        memcpy(bt_cmd->bt4_corun_lut40, antenna_coupling_ranges[lut].lut20,
               sizeof(bt_cmd->bt4_corun_lut40));
 
-       return 0;
+       ret = iwl_mvm_send_cmd(mvm, &cmd);
+
+       kfree(bt_cmd);
+       return ret;
 }
index 4dd9ff43b8b68e6f9b509ed0650d8c5d5a31dd8d..f0cebf12c7b8415a3c787d0cc77a9b2b1c2a15ef 100644 (file)
@@ -1332,6 +1332,7 @@ static void iwl_mvm_bss_info_changed_station(struct iwl_mvm *mvm,
                 */
                iwl_mvm_remove_time_event(mvm, mvmvif,
                                          &mvmvif->time_event_data);
+               iwl_mvm_sf_update(mvm, vif, false);
                WARN_ON(iwl_mvm_enable_beacon_filter(mvm, vif, CMD_SYNC));
        } else if (changes & (BSS_CHANGED_PS | BSS_CHANGED_P2P_PS |
                              BSS_CHANGED_QOS)) {
index 568abd61b14fb5ebdd83d0e6f3ade7fb2bd054d3..9f52c5b3f0ec0e9b2da5949f2af88bbcd13d89ce 100644 (file)
@@ -59,7 +59,7 @@
 /* max allowed rate miss before sync LQ cmd */
 #define IWL_MISSED_RATE_MAX            15
 #define RS_STAY_IN_COLUMN_TIMEOUT       (5*HZ)
-
+#define RS_IDLE_TIMEOUT                 (5*HZ)
 
 static u8 rs_ht_to_legacy[] = {
        [IWL_RATE_MCS_0_INDEX] = IWL_RATE_6M_INDEX,
@@ -142,7 +142,7 @@ enum rs_column_mode {
        RS_MIMO2,
 };
 
-#define MAX_NEXT_COLUMNS 5
+#define MAX_NEXT_COLUMNS 7
 #define MAX_COLUMN_CHECKS 3
 
 typedef bool (*allow_column_func_t) (struct iwl_mvm *mvm,
@@ -212,8 +212,10 @@ static const struct rs_tx_column rs_tx_columns[] = {
                        RS_COLUMN_LEGACY_ANT_B,
                        RS_COLUMN_SISO_ANT_A,
                        RS_COLUMN_SISO_ANT_B,
-                       RS_COLUMN_MIMO2,
-                       RS_COLUMN_MIMO2_SGI,
+                       RS_COLUMN_INVALID,
+                       RS_COLUMN_INVALID,
+                       RS_COLUMN_INVALID,
+                       RS_COLUMN_INVALID,
                },
        },
        [RS_COLUMN_LEGACY_ANT_B] = {
@@ -223,8 +225,10 @@ static const struct rs_tx_column rs_tx_columns[] = {
                        RS_COLUMN_LEGACY_ANT_A,
                        RS_COLUMN_SISO_ANT_A,
                        RS_COLUMN_SISO_ANT_B,
-                       RS_COLUMN_MIMO2,
-                       RS_COLUMN_MIMO2_SGI,
+                       RS_COLUMN_INVALID,
+                       RS_COLUMN_INVALID,
+                       RS_COLUMN_INVALID,
+                       RS_COLUMN_INVALID,
                },
        },
        [RS_COLUMN_SISO_ANT_A] = {
@@ -235,7 +239,9 @@ static const struct rs_tx_column rs_tx_columns[] = {
                        RS_COLUMN_MIMO2,
                        RS_COLUMN_SISO_ANT_A_SGI,
                        RS_COLUMN_SISO_ANT_B_SGI,
-                       RS_COLUMN_MIMO2_SGI,
+                       RS_COLUMN_LEGACY_ANT_A,
+                       RS_COLUMN_LEGACY_ANT_B,
+                       RS_COLUMN_INVALID,
                },
                .checks = {
                        rs_siso_allow,
@@ -249,7 +255,9 @@ static const struct rs_tx_column rs_tx_columns[] = {
                        RS_COLUMN_MIMO2,
                        RS_COLUMN_SISO_ANT_B_SGI,
                        RS_COLUMN_SISO_ANT_A_SGI,
-                       RS_COLUMN_MIMO2_SGI,
+                       RS_COLUMN_LEGACY_ANT_A,
+                       RS_COLUMN_LEGACY_ANT_B,
+                       RS_COLUMN_INVALID,
                },
                .checks = {
                        rs_siso_allow,
@@ -265,6 +273,8 @@ static const struct rs_tx_column rs_tx_columns[] = {
                        RS_COLUMN_SISO_ANT_A,
                        RS_COLUMN_SISO_ANT_B,
                        RS_COLUMN_MIMO2,
+                       RS_COLUMN_LEGACY_ANT_A,
+                       RS_COLUMN_LEGACY_ANT_B,
                },
                .checks = {
                        rs_siso_allow,
@@ -281,6 +291,8 @@ static const struct rs_tx_column rs_tx_columns[] = {
                        RS_COLUMN_SISO_ANT_B,
                        RS_COLUMN_SISO_ANT_A,
                        RS_COLUMN_MIMO2,
+                       RS_COLUMN_LEGACY_ANT_A,
+                       RS_COLUMN_LEGACY_ANT_B,
                },
                .checks = {
                        rs_siso_allow,
@@ -296,6 +308,8 @@ static const struct rs_tx_column rs_tx_columns[] = {
                        RS_COLUMN_SISO_ANT_A_SGI,
                        RS_COLUMN_SISO_ANT_B_SGI,
                        RS_COLUMN_MIMO2_SGI,
+                       RS_COLUMN_LEGACY_ANT_A,
+                       RS_COLUMN_LEGACY_ANT_B,
                },
                .checks = {
                        rs_mimo_allow,
@@ -311,6 +325,8 @@ static const struct rs_tx_column rs_tx_columns[] = {
                        RS_COLUMN_SISO_ANT_A,
                        RS_COLUMN_SISO_ANT_B,
                        RS_COLUMN_MIMO2,
+                       RS_COLUMN_LEGACY_ANT_A,
+                       RS_COLUMN_LEGACY_ANT_B,
                },
                .checks = {
                        rs_mimo_allow,
@@ -503,10 +519,12 @@ static void rs_rate_scale_clear_window(struct iwl_rate_scale_data *window)
        window->average_tpt = IWL_INVALID_VALUE;
 }
 
-static void rs_rate_scale_clear_tbl_windows(struct iwl_scale_tbl_info *tbl)
+static void rs_rate_scale_clear_tbl_windows(struct iwl_mvm *mvm,
+                                           struct iwl_scale_tbl_info *tbl)
 {
        int i;
 
+       IWL_DEBUG_RATE(mvm, "Clearing up window stats\n");
        for (i = 0; i < IWL_RATE_COUNT; i++)
                rs_rate_scale_clear_window(&tbl->win[i]);
 }
@@ -992,6 +1010,13 @@ static void rs_tx_status(void *mvm_r, struct ieee80211_supported_band *sband,
                return;
        }
 
+#ifdef CPTCFG_MAC80211_DEBUGFS
+       /* Disable last tx check if we are debugging with fixed rate */
+       if (lq_sta->dbg_fixed_rate) {
+               IWL_DEBUG_RATE(mvm, "Fixed rate. avoid rate scaling\n");
+               return;
+       }
+#endif
        if (!ieee80211_is_data(hdr->frame_control) ||
            info->flags & IEEE80211_TX_CTL_NO_ACK)
                return;
@@ -1034,6 +1059,18 @@ static void rs_tx_status(void *mvm_r, struct ieee80211_supported_band *sband,
                        mac_index++;
        }
 
+       if (time_after(jiffies,
+                      (unsigned long)(lq_sta->last_tx + RS_IDLE_TIMEOUT))) {
+               int tid;
+               IWL_DEBUG_RATE(mvm, "Tx idle for too long. reinit rs\n");
+               for (tid = 0; tid < IWL_MAX_TID_COUNT; tid++)
+                       ieee80211_stop_tx_ba_session(sta, tid);
+
+               iwl_mvm_rs_rate_init(mvm, sta, sband->band, false);
+               return;
+       }
+       lq_sta->last_tx = jiffies;
+
        /* Here we actually compare this rate to the latest LQ command */
        if ((mac_index < 0) ||
            (rate.sgi != !!(mac_flags & IEEE80211_TX_RC_SHORT_GI)) ||
@@ -1186,9 +1223,26 @@ static void rs_set_stay_in_table(struct iwl_mvm *mvm, u8 is_legacy,
        lq_sta->visited_columns = 0;
 }
 
+static int rs_get_max_allowed_rate(struct iwl_lq_sta *lq_sta,
+                                  const struct rs_tx_column *column)
+{
+       switch (column->mode) {
+       case RS_LEGACY:
+               return lq_sta->max_legacy_rate_idx;
+       case RS_SISO:
+               return lq_sta->max_siso_rate_idx;
+       case RS_MIMO2:
+               return lq_sta->max_mimo2_rate_idx;
+       default:
+               WARN_ON_ONCE(1);
+       }
+
+       return lq_sta->max_legacy_rate_idx;
+}
+
 static const u16 *rs_get_expected_tpt_table(struct iwl_lq_sta *lq_sta,
-                                     const struct rs_tx_column *column,
-                                     u32 bw)
+                                           const struct rs_tx_column *column,
+                                           u32 bw)
 {
        /* Used to choose among HT tables */
        const u16 (*ht_tbl_pointer)[IWL_RATE_COUNT];
@@ -1438,7 +1492,7 @@ static void rs_stay_in_table(struct iwl_lq_sta *lq_sta, bool force_search)
 
                                IWL_DEBUG_RATE(mvm,
                                               "LQ: stay in table clear win\n");
-                               rs_rate_scale_clear_tbl_windows(tbl);
+                               rs_rate_scale_clear_tbl_windows(mvm, tbl);
                        }
                }
 
@@ -1446,8 +1500,7 @@ static void rs_stay_in_table(struct iwl_lq_sta *lq_sta, bool force_search)
                 * bitmaps and stats in active table (this will become the new
                 * "search" table). */
                if (lq_sta->rs_state == RS_STATE_SEARCH_CYCLE_STARTED) {
-                       IWL_DEBUG_RATE(mvm, "Clearing up window stats\n");
-                       rs_rate_scale_clear_tbl_windows(tbl);
+                       rs_rate_scale_clear_tbl_windows(mvm, tbl);
                }
        }
 }
@@ -1485,14 +1538,14 @@ static enum rs_column rs_get_next_column(struct iwl_mvm *mvm,
                                         struct ieee80211_sta *sta,
                                         struct iwl_scale_tbl_info *tbl)
 {
-       int i, j, n;
+       int i, j, max_rate;
        enum rs_column next_col_id;
        const struct rs_tx_column *curr_col = &rs_tx_columns[tbl->column];
        const struct rs_tx_column *next_col;
        allow_column_func_t allow_func;
        u8 valid_ants = mvm->fw->valid_tx_ant;
        const u16 *expected_tpt_tbl;
-       s32 tpt, max_expected_tpt;
+       u16 tpt, max_expected_tpt;
 
        for (i = 0; i < MAX_NEXT_COLUMNS; i++) {
                next_col_id = curr_col->next_columns[i];
@@ -1535,11 +1588,11 @@ static enum rs_column rs_get_next_column(struct iwl_mvm *mvm,
                if (WARN_ON_ONCE(!expected_tpt_tbl))
                        continue;
 
-               max_expected_tpt = 0;
-               for (n = 0; n < IWL_RATE_COUNT; n++)
-                       if (expected_tpt_tbl[n] > max_expected_tpt)
-                               max_expected_tpt = expected_tpt_tbl[n];
+               max_rate = rs_get_max_allowed_rate(lq_sta, next_col);
+               if (WARN_ON_ONCE(max_rate == IWL_RATE_INVALID))
+                       continue;
 
+               max_expected_tpt = expected_tpt_tbl[max_rate];
                if (tpt >= max_expected_tpt) {
                        IWL_DEBUG_RATE(mvm,
                                       "Skip column %d: can't beat current TPT. Max expected %d current %d\n",
@@ -1547,14 +1600,15 @@ static enum rs_column rs_get_next_column(struct iwl_mvm *mvm,
                        continue;
                }
 
+               IWL_DEBUG_RATE(mvm,
+                              "Found potential column %d. Max expected %d current %d\n",
+                              next_col_id, max_expected_tpt, tpt);
                break;
        }
 
        if (i == MAX_NEXT_COLUMNS)
                return RS_COLUMN_INVALID;
 
-       IWL_DEBUG_RATE(mvm, "Found potential column %d\n", next_col_id);
-
        return next_col_id;
 }
 
@@ -1640,85 +1694,76 @@ static enum rs_action rs_get_rate_action(struct iwl_mvm *mvm,
 {
        enum rs_action action = RS_ACTION_STAY;
 
-       /* Too many failures, decrease rate */
        if ((sr <= RS_SR_FORCE_DECREASE) || (current_tpt == 0)) {
                IWL_DEBUG_RATE(mvm,
-                              "decrease rate because of low SR\n");
-               action = RS_ACTION_DOWNSCALE;
-       /* No throughput measured yet for adjacent rates; try increase. */
-       } else if ((low_tpt == IWL_INVALID_VALUE) &&
-                  (high_tpt == IWL_INVALID_VALUE)) {
-               if (high != IWL_RATE_INVALID && sr >= IWL_RATE_INCREASE_TH) {
-                       IWL_DEBUG_RATE(mvm,
-                                      "Good SR and no high rate measurement. "
-                                      "Increase rate\n");
-                       action = RS_ACTION_UPSCALE;
-               } else if (low != IWL_RATE_INVALID) {
-                       IWL_DEBUG_RATE(mvm,
-                                      "Remain in current rate\n");
-                       action = RS_ACTION_STAY;
-               }
+                              "Decrease rate because of low SR\n");
+               return RS_ACTION_DOWNSCALE;
        }
 
-       /* Both adjacent throughputs are measured, but neither one has better
-        * throughput; we're using the best rate, don't change it!
-        */
-       else if ((low_tpt != IWL_INVALID_VALUE) &&
-                (high_tpt != IWL_INVALID_VALUE) &&
-                (low_tpt < current_tpt) &&
-                (high_tpt < current_tpt)) {
+       if ((low_tpt == IWL_INVALID_VALUE) &&
+           (high_tpt == IWL_INVALID_VALUE) &&
+           (high != IWL_RATE_INVALID)) {
                IWL_DEBUG_RATE(mvm,
-                              "Both high and low are worse. "
-                              "Maintain rate\n");
-               action = RS_ACTION_STAY;
+                              "No data about high/low rates. Increase rate\n");
+               return RS_ACTION_UPSCALE;
        }
 
-       /* At least one adjacent rate's throughput is measured,
-        * and may have better performance.
-        */
-       else {
-               /* Higher adjacent rate's throughput is measured */
-               if (high_tpt != IWL_INVALID_VALUE) {
-                       /* Higher rate has better throughput */
-                       if (high_tpt > current_tpt &&
-                           sr >= IWL_RATE_INCREASE_TH) {
-                               IWL_DEBUG_RATE(mvm,
-                                              "Higher rate is better and good "
-                                              "SR. Increate rate\n");
-                               action = RS_ACTION_UPSCALE;
-                       } else {
-                               IWL_DEBUG_RATE(mvm,
-                                              "Higher rate isn't better OR "
-                                              "no good SR. Maintain rate\n");
-                               action = RS_ACTION_STAY;
-                       }
+       if ((high_tpt == IWL_INVALID_VALUE) &&
+           (high != IWL_RATE_INVALID) &&
+           (low_tpt != IWL_INVALID_VALUE) &&
+           (low_tpt < current_tpt)) {
+               IWL_DEBUG_RATE(mvm,
+                              "No data about high rate and low rate is worse. Increase rate\n");
+               return RS_ACTION_UPSCALE;
+       }
 
-               /* Lower adjacent rate's throughput is measured */
-               } else if (low_tpt != IWL_INVALID_VALUE) {
-                       /* Lower rate has better throughput */
-                       if (low_tpt > current_tpt) {
-                               IWL_DEBUG_RATE(mvm,
-                                              "Lower rate is better. "
-                                              "Decrease rate\n");
-                               action = RS_ACTION_DOWNSCALE;
-                       } else if (sr >= IWL_RATE_INCREASE_TH) {
-                               IWL_DEBUG_RATE(mvm,
-                                              "Lower rate isn't better and "
-                                              "good SR. Increase rate\n");
-                               action = RS_ACTION_UPSCALE;
-                       }
-               }
+       if ((high_tpt != IWL_INVALID_VALUE) &&
+           (high_tpt > current_tpt)) {
+               IWL_DEBUG_RATE(mvm,
+                              "Higher rate is better. Increate rate\n");
+               return RS_ACTION_UPSCALE;
        }
 
-       /* Sanity check; asked for decrease, but success rate or throughput
-        * has been good at old rate.  Don't change it.
-        */
-       if ((action == RS_ACTION_DOWNSCALE) && (low != IWL_RATE_INVALID) &&
-           ((sr > IWL_RATE_HIGH_TH) ||
-            (current_tpt > (100 * tbl->expected_tpt[low])))) {
+       if ((low_tpt != IWL_INVALID_VALUE) &&
+           (high_tpt != IWL_INVALID_VALUE) &&
+           (low_tpt < current_tpt) &&
+           (high_tpt < current_tpt)) {
+               IWL_DEBUG_RATE(mvm,
+                              "Both high and low are worse. Maintain rate\n");
+               return RS_ACTION_STAY;
+       }
+
+       if ((low_tpt != IWL_INVALID_VALUE) &&
+           (low_tpt > current_tpt)) {
+               IWL_DEBUG_RATE(mvm,
+                              "Lower rate is better\n");
+               action = RS_ACTION_DOWNSCALE;
+               goto out;
+       }
+
+       if ((low_tpt == IWL_INVALID_VALUE) &&
+           (low != IWL_RATE_INVALID)) {
                IWL_DEBUG_RATE(mvm,
-                              "Sanity check failed. Maintain rate\n");
-               action = RS_ACTION_STAY;
+                              "No data about lower rate\n");
+               action = RS_ACTION_DOWNSCALE;
+               goto out;
+       }
+
+       IWL_DEBUG_RATE(mvm, "Maintain rate\n");
+
+out:
+       if ((action == RS_ACTION_DOWNSCALE) && (low != IWL_RATE_INVALID)) {
+               if (sr >= RS_SR_NO_DECREASE) {
+                       IWL_DEBUG_RATE(mvm,
+                                      "SR is above NO DECREASE. Avoid downscale\n");
+                       action = RS_ACTION_STAY;
+               } else if (current_tpt > (100 * tbl->expected_tpt[low])) {
+                       IWL_DEBUG_RATE(mvm,
+                                      "Current TPT is higher than max expected in low rate. Avoid downscale\n");
+                       action = RS_ACTION_STAY;
+               } else {
+                       IWL_DEBUG_RATE(mvm, "Decrease rate\n");
+               }
        }
 
        return action;
@@ -1792,6 +1837,7 @@ static void rs_rate_scale_perform(struct iwl_mvm *mvm,
                               "Aggregation changed: prev %d current %d. Update expected TPT table\n",
                               prev_agg, lq_sta->is_agg);
                rs_set_expected_tpt_table(lq_sta, tbl);
+               rs_rate_scale_clear_tbl_windows(mvm, tbl);
        }
 
        /* current tx rate */
@@ -2021,7 +2067,7 @@ lq_update:
                if (lq_sta->search_better_tbl) {
                        /* Access the "search" table, clear its history. */
                        tbl = &(lq_sta->lq_info[(1 - lq_sta->active_tbl)]);
-                       rs_rate_scale_clear_tbl_windows(tbl);
+                       rs_rate_scale_clear_tbl_windows(mvm, tbl);
 
                        /* Use new "search" start rate */
                        index = tbl->rate.index;
@@ -2042,8 +2088,18 @@ lq_update:
                 * stay with best antenna legacy modulation for a while
                 * before next round of mode comparisons. */
                tbl1 = &(lq_sta->lq_info[lq_sta->active_tbl]);
-               if (is_legacy(&tbl1->rate) && !sta->ht_cap.ht_supported) {
+               if (is_legacy(&tbl1->rate)) {
                        IWL_DEBUG_RATE(mvm, "LQ: STAY in legacy table\n");
+
+                       if (tid != IWL_MAX_TID_COUNT) {
+                               tid_data = &sta_priv->tid_data[tid];
+                               if (tid_data->state != IWL_AGG_OFF) {
+                                       IWL_DEBUG_RATE(mvm,
+                                                      "Stop aggregation on tid %d\n",
+                                                      tid);
+                                       ieee80211_stop_tx_ba_session(sta, tid);
+                               }
+                       }
                        rs_set_stay_in_table(mvm, 1, lq_sta);
                } else {
                /* If we're in an HT mode, and all 3 mode switch actions
@@ -2342,9 +2398,10 @@ void iwl_mvm_rs_rate_init(struct iwl_mvm *mvm, struct ieee80211_sta *sta,
        lq_sta->lq.sta_id = sta_priv->sta_id;
 
        for (j = 0; j < LQ_SIZE; j++)
-               rs_rate_scale_clear_tbl_windows(&lq_sta->lq_info[j]);
+               rs_rate_scale_clear_tbl_windows(mvm, &lq_sta->lq_info[j]);
 
        lq_sta->flush_timer = 0;
+       lq_sta->last_tx = jiffies;
 
        IWL_DEBUG_RATE(mvm,
                       "LQ: *** rate scale station global init for station %d ***\n",
@@ -2388,11 +2445,22 @@ void iwl_mvm_rs_rate_init(struct iwl_mvm *mvm, struct ieee80211_sta *sta,
                lq_sta->is_vht = true;
        }
 
-       IWL_DEBUG_RATE(mvm,
-                      "SISO-RATE=%X MIMO2-RATE=%X VHT=%d\n",
+       lq_sta->max_legacy_rate_idx = find_last_bit(&lq_sta->active_legacy_rate,
+                                                   BITS_PER_LONG);
+       lq_sta->max_siso_rate_idx = find_last_bit(&lq_sta->active_siso_rate,
+                                                 BITS_PER_LONG);
+       lq_sta->max_mimo2_rate_idx = find_last_bit(&lq_sta->active_mimo2_rate,
+                                                  BITS_PER_LONG);
+
+       IWL_DEBUG_RATE(mvm, "RATE MASK: LEGACY=%lX SISO=%lX MIMO2=%lX VHT=%d\n",
+                      lq_sta->active_legacy_rate,
                       lq_sta->active_siso_rate,
                       lq_sta->active_mimo2_rate,
                       lq_sta->is_vht);
+       IWL_DEBUG_RATE(mvm, "MAX RATE: LEGACY=%d SISO=%d MIMO2=%d\n",
+                      lq_sta->max_legacy_rate_idx,
+                      lq_sta->max_siso_rate_idx,
+                      lq_sta->max_mimo2_rate_idx);
 
        /* These values will be overridden later */
        lq_sta->lq.single_stream_ant_msk =
@@ -2547,6 +2615,7 @@ static void rs_build_rates_table(struct iwl_mvm *mvm,
        if (is_siso(&rate)) {
                num_rates = RS_SECONDARY_SISO_NUM_RATES;
                num_retries = RS_SECONDARY_SISO_RETRIES;
+               lq_cmd->mimo_delim = index;
        } else if (is_legacy(&rate)) {
                num_rates = RS_SECONDARY_LEGACY_NUM_RATES;
                num_retries = RS_LEGACY_RETRIES_PER_RATE;
@@ -2749,7 +2818,7 @@ static ssize_t rs_sta_dbgfs_scale_table_read(struct file *file,
                return -ENOMEM;
 
        desc += sprintf(buff+desc, "sta_id %d\n", lq_sta->lq.sta_id);
-       desc += sprintf(buff+desc, "failed=%d success=%d rate=0%X\n",
+       desc += sprintf(buff+desc, "failed=%d success=%d rate=0%lX\n",
                        lq_sta->total_failed, lq_sta->total_success,
                        lq_sta->active_legacy_rate);
        desc += sprintf(buff+desc, "fixed rate 0x%X\n",
index 3332b396011e3ce6866b9544068266506cb5a811..0acfac96a56c6dca2d2799812231404921abd15b 100644 (file)
@@ -156,6 +156,7 @@ enum {
 #define IWL_RATE_HIGH_TH               10880   /*  85% */
 #define IWL_RATE_INCREASE_TH           6400    /*  50% */
 #define RS_SR_FORCE_DECREASE           1920    /*  15% */
+#define RS_SR_NO_DECREASE              10880   /*  85% */
 
 #define LINK_QUAL_AGG_TIME_LIMIT_DEF   (4000) /* 4 milliseconds */
 #define LINK_QUAL_AGG_TIME_LIMIT_MAX   (8000)
@@ -310,13 +311,20 @@ struct iwl_lq_sta {
        u32 visited_columns;    /* Bitmask marking which Tx columns were
                                 * explored during a search cycle
                                 */
+       u64 last_tx;
        bool is_vht;
        enum ieee80211_band band;
 
        /* The following are bitmaps of rates; IWL_RATE_6M_MASK, etc. */
-       u16 active_legacy_rate;
-       u16 active_siso_rate;
-       u16 active_mimo2_rate;
+       unsigned long active_legacy_rate;
+       unsigned long active_siso_rate;
+       unsigned long active_mimo2_rate;
+
+       /* Highest rate per Tx mode */
+       u8 max_legacy_rate_idx;
+       u8 max_siso_rate_idx;
+       u8 max_mimo2_rate_idx;
+
        s8 max_rate_idx;     /* Max rate set by user */
        u8 missed_rate_counter;
 
index 8401627c003098f04d020fc2fb242c48447ac1b0..88809b2d165445fcf9188c8f91bcf755a9e6704f 100644 (file)
@@ -274,7 +274,8 @@ int iwl_mvm_sf_update(struct iwl_mvm *mvm, struct ieee80211_vif *changed_vif,
                                return -EINVAL;
                        if (changed_vif->type != NL80211_IFTYPE_STATION) {
                                new_state = SF_UNINIT;
-                       } else if (changed_vif->bss_conf.assoc) {
+                       } else if (changed_vif->bss_conf.assoc &&
+                                  changed_vif->bss_conf.dtim_period) {
                                mvmvif = iwl_mvm_vif_from_mac80211(changed_vif);
                                sta_id = mvmvif->ap_sta_id;
                                new_state = SF_FULL_ON;
index edb015c99049315a9a5ab5d6b203b95fe1c68dd2..3d1d57f9f5bc539d7350f518f5c13566917b6860 100644 (file)
@@ -373,12 +373,14 @@ static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
        {IWL_PCI_DEVICE(0x095A, 0x500A, iwl7265_2n_cfg)},
        {IWL_PCI_DEVICE(0x095B, 0x5200, iwl7265_2n_cfg)},
        {IWL_PCI_DEVICE(0x095A, 0x5002, iwl7265_n_cfg)},
+       {IWL_PCI_DEVICE(0x095A, 0x5102, iwl7265_n_cfg)},
        {IWL_PCI_DEVICE(0x095B, 0x5202, iwl7265_n_cfg)},
        {IWL_PCI_DEVICE(0x095A, 0x9010, iwl7265_2ac_cfg)},
        {IWL_PCI_DEVICE(0x095A, 0x9012, iwl7265_2ac_cfg)},
        {IWL_PCI_DEVICE(0x095A, 0x9110, iwl7265_2ac_cfg)},
        {IWL_PCI_DEVICE(0x095A, 0x9112, iwl7265_2ac_cfg)},
        {IWL_PCI_DEVICE(0x095A, 0x9210, iwl7265_2ac_cfg)},
+       {IWL_PCI_DEVICE(0x095A, 0x9200, iwl7265_2ac_cfg)},
        {IWL_PCI_DEVICE(0x095A, 0x9510, iwl7265_2ac_cfg)},
        {IWL_PCI_DEVICE(0x095A, 0x9310, iwl7265_2ac_cfg)},
        {IWL_PCI_DEVICE(0x095A, 0x9410, iwl7265_2ac_cfg)},
index 77db0886c6e2e9fa764f2a0add8876b477972915..9c771b3e99186ffe838f771b217216ebc5a43454 100644 (file)
@@ -292,6 +292,12 @@ process_start:
                        while ((skb = skb_dequeue(&adapter->usb_rx_data_q)))
                                mwifiex_handle_rx_packet(adapter, skb);
 
+               /* Check for event */
+               if (adapter->event_received) {
+                       adapter->event_received = false;
+                       mwifiex_process_event(adapter);
+               }
+
                /* Check for Cmd Resp */
                if (adapter->cmd_resp_received) {
                        adapter->cmd_resp_received = false;
@@ -304,12 +310,6 @@ process_start:
                        }
                }
 
-               /* Check for event */
-               if (adapter->event_received) {
-                       adapter->event_received = false;
-                       mwifiex_process_event(adapter);
-               }
-
                /* Check if we need to confirm Sleep Request
                   received previously */
                if (adapter->ps_state == PS_STATE_PRE_SLEEP) {
index 894270611f2cb6e074669f424fe66978e80e1992..536c14aa71f39cb0e4f73417429fca55258af5ed 100644 (file)
@@ -60,9 +60,10 @@ int mwifiex_wait_queue_complete(struct mwifiex_adapter *adapter,
        int status;
 
        /* Wait for completion */
-       status = wait_event_interruptible(adapter->cmd_wait_q.wait,
-                                         *(cmd_queued->condition));
-       if (status) {
+       status = wait_event_interruptible_timeout(adapter->cmd_wait_q.wait,
+                                                 *(cmd_queued->condition),
+                                                 (12 * HZ));
+       if (status <= 0) {
                dev_err(adapter->dev, "cmd_wait_q terminated: %d\n", status);
                mwifiex_cancel_all_pending_cmd(adapter);
                return status;
index 1a8d32138593637318aeb3022b6e86a48905507a..cf61d6e3eaa7cd746a7bec20853277b5f1c69001 100644 (file)
@@ -88,7 +88,7 @@ static u8 rsi_core_determine_hal_queue(struct rsi_common *common)
        bool recontend_queue = false;
        u32 q_len = 0;
        u8 q_num = INVALID_QUEUE;
-       u8 ii, min = 0;
+       u8 ii = 0, min = 0;
 
        if (skb_queue_len(&common->tx_queue[MGMT_SOFT_Q])) {
                if (!common->mgmt_q_block)
index 73694295648f19988365b3866846af7929d63201..1b28cda6ca88124deff6c112a060f5af6692cefa 100644 (file)
@@ -841,16 +841,6 @@ int rsi_set_channel(struct rsi_common *common, u16 channel)
        rsi_dbg(MGMT_TX_ZONE,
                "%s: Sending scan req frame\n", __func__);
 
-       skb = dev_alloc_skb(FRAME_DESC_SZ);
-       if (!skb) {
-               rsi_dbg(ERR_ZONE, "%s: Failed in allocation of skb\n",
-                       __func__);
-               return -ENOMEM;
-       }
-
-       memset(skb->data, 0, FRAME_DESC_SZ);
-       mgmt_frame = (struct rsi_mac_frame *)skb->data;
-
        if (common->band == IEEE80211_BAND_5GHZ) {
                if ((channel >= 36) && (channel <= 64))
                        channel = ((channel - 32) / 4);
@@ -868,6 +858,16 @@ int rsi_set_channel(struct rsi_common *common, u16 channel)
                }
        }
 
+       skb = dev_alloc_skb(FRAME_DESC_SZ);
+       if (!skb) {
+               rsi_dbg(ERR_ZONE, "%s: Failed in allocation of skb\n",
+                       __func__);
+               return -ENOMEM;
+       }
+
+       memset(skb->data, 0, FRAME_DESC_SZ);
+       mgmt_frame = (struct rsi_mac_frame *)skb->data;
+
        mgmt_frame->desc_word[0] = cpu_to_le16(RSI_WIFI_MGMT_Q << 12);
        mgmt_frame->desc_word[1] = cpu_to_le16(SCAN_REQUEST);
        mgmt_frame->desc_word[4] = cpu_to_le16(channel);
@@ -966,6 +966,7 @@ static int rsi_send_auto_rate_request(struct rsi_common *common)
        if (!selected_rates) {
                rsi_dbg(ERR_ZONE, "%s: Failed in allocation of mem\n",
                        __func__);
+               dev_kfree_skb(skb);
                return -ENOMEM;
        }
 
index 398f3d2c0a6cc7b5486c2fe31d1c8824163bda31..a76e98eb8372a9c2f7ff205e87e8a5667a48de38 100644 (file)
@@ -68,6 +68,26 @@ struct wl18xx_event_mailbox {
 
        /* bitmap of inactive stations (by HLID) */
        __le32 inactive_sta_bitmap;
+
+       /* rx BA win size indicated by RX_BA_WIN_SIZE_CHANGE_EVENT_ID */
+       u8 rx_ba_role_id;
+       u8 rx_ba_link_id;
+       u8 rx_ba_win_size;
+       u8 padding;
+
+       /* smart config */
+       u8 sc_ssid_len;
+       u8 sc_pwd_len;
+       u8 sc_token_len;
+       u8 padding1;
+       u8 sc_ssid[32];
+       u8 sc_pwd[32];
+       u8 sc_token[32];
+
+       /* smart config sync channel */
+       u8 sc_sync_channel;
+       u8 sc_sync_band;
+       u8 padding2[2];
 } __packed;
 
 int wl18xx_wait_for_event(struct wl1271 *wl, enum wlcore_wait_event event,
index 1f9a36031b06d42785352fa3e7666bda3c9f17ce..16d10281798d764ad8fb69f73cab6de0c2ff10d0 100644 (file)
@@ -158,6 +158,11 @@ EXPORT_SYMBOL_GPL(wlcore_event_channel_switch);
 
 void wlcore_event_dummy_packet(struct wl1271 *wl)
 {
+       if (wl->plt) {
+               wl1271_info("Got DUMMY_PACKET event in PLT mode.  FW bug, ignoring.");
+               return;
+       }
+
        wl1271_debug(DEBUG_EVENT, "DUMMY_PACKET_ID_EVENT_ID");
        wl1271_tx_dummy_packet(wl);
 }
index f72d19b7e5d29901471784f01e6b27909c772395..6d4ee22708c93791d53860c0243d6a9258678283 100644 (file)
@@ -1828,17 +1828,13 @@ int of_update_property(struct device_node *np, struct property *newprop)
                next = &(*next)->next;
        }
        raw_spin_unlock_irqrestore(&devtree_lock, flags);
-       if (rc)
-               return rc;
+       if (!found)
+               return -ENODEV;
 
        /* Update the sysfs attribute */
-       if (oldprop)
-               sysfs_remove_bin_file(&np->kobj, &oldprop->attr);
+       sysfs_remove_bin_file(&np->kobj, &oldprop->attr);
        __of_add_property_sysfs(np, newprop);
 
-       if (!found)
-               return -ENODEV;
-
        return 0;
 }
 
index fa16a912a927bbcded3c7b513cba8a57a2e86b49..7a2ef7bb8022b47b056be0cd2eae473459d0ff82 100644 (file)
@@ -491,7 +491,7 @@ static int __init __reserved_mem_reserve_reg(unsigned long node,
  * in /reserved-memory matches the values supported by the current implementation,
  * also check if ranges property has been provided
  */
-static int __reserved_mem_check_root(unsigned long node)
+static int __init __reserved_mem_check_root(unsigned long node)
 {
        __be32 *prop;
 
index 9bcf2cf19357837dcb6dd8e5cce637150a7a32d0..5aeb89411350a4c98a2d769302e16a8d650d075f 100644 (file)
@@ -364,7 +364,7 @@ int of_irq_to_resource(struct device_node *dev, int index, struct resource *r)
 
                memset(r, 0, sizeof(*r));
                /*
-                * Get optional "interrupts-names" property to add a name
+                * Get optional "interrupt-names" property to add a name
                 * to the resource.
                 */
                of_property_read_string_index(dev, "interrupt-names", index,
@@ -379,6 +379,32 @@ int of_irq_to_resource(struct device_node *dev, int index, struct resource *r)
 }
 EXPORT_SYMBOL_GPL(of_irq_to_resource);
 
+/**
+ * of_irq_get - Decode a node's IRQ and return it as a Linux irq number
+ * @dev: pointer to device tree node
+ * @index: zero-based index of the irq
+ *
+ * Returns Linux irq number on success, or -EPROBE_DEFER if the irq domain
+ * is not yet created.
+ *
+ */
+int of_irq_get(struct device_node *dev, int index)
+{
+       int rc;
+       struct of_phandle_args oirq;
+       struct irq_domain *domain;
+
+       rc = of_irq_parse_one(dev, index, &oirq);
+       if (rc)
+               return rc;
+
+       domain = irq_find_host(oirq.np);
+       if (!domain)
+               return -EPROBE_DEFER;
+
+       return irq_create_of_mapping(&oirq);
+}
+
 /**
  * of_irq_count - Count the number of IRQs a node uses
  * @dev: pointer to device tree node
index 404d1daebefa7d7a5d02cbfb611e9585077c00b0..bd47fbc53dc96258fba942d073ee320f25e5627f 100644 (file)
@@ -168,7 +168,9 @@ struct platform_device *of_device_alloc(struct device_node *np,
                        rc = of_address_to_resource(np, i, res);
                        WARN_ON(rc);
                }
-               WARN_ON(of_irq_to_resource_table(np, res, num_irq) != num_irq);
+               if (of_irq_to_resource_table(np, res, num_irq) != num_irq)
+                       pr_debug("not all legacy IRQ resources mapped for %s\n",
+                                np->name);
        }
 
        dev->dev.of_node = of_node_get(np);
index ae4450070503f1067579f02576ce5ec14b2a7192..fe70b86bcffb9d086edd51c758a17a60ca45cf7b 100644 (file)
@@ -10,6 +10,7 @@
 #include <linux/module.h>
 #include <linux/of.h>
 #include <linux/of_irq.h>
+#include <linux/of_platform.h>
 #include <linux/list.h>
 #include <linux/mutex.h>
 #include <linux/slab.h>
@@ -427,6 +428,36 @@ static void __init of_selftest_match_node(void)
        }
 }
 
+static void __init of_selftest_platform_populate(void)
+{
+       int irq;
+       struct device_node *np;
+       struct platform_device *pdev;
+
+       np = of_find_node_by_path("/testcase-data");
+       of_platform_populate(np, of_default_bus_match_table, NULL, NULL);
+
+       /* Test that a missing irq domain returns -EPROBE_DEFER */
+       np = of_find_node_by_path("/testcase-data/testcase-device1");
+       pdev = of_find_device_by_node(np);
+       if (!pdev)
+               selftest(0, "device 1 creation failed\n");
+       irq = platform_get_irq(pdev, 0);
+       if (irq != -EPROBE_DEFER)
+               selftest(0, "device deferred probe failed - %d\n", irq);
+
+       /* Test that a parsing failure does not return -EPROBE_DEFER */
+       np = of_find_node_by_path("/testcase-data/testcase-device2");
+       pdev = of_find_device_by_node(np);
+       if (!pdev)
+               selftest(0, "device 2 creation failed\n");
+       irq = platform_get_irq(pdev, 0);
+       if (irq >= 0 || irq == -EPROBE_DEFER)
+               selftest(0, "device parsing error failed - %d\n", irq);
+
+       selftest(1, "passed");
+}
+
 static int __init of_selftest(void)
 {
        struct device_node *np;
@@ -445,6 +476,7 @@ static int __init of_selftest(void)
        of_selftest_parse_interrupts();
        of_selftest_parse_interrupts_extended();
        of_selftest_match_node();
+       of_selftest_platform_populate();
        pr_info("end of selftest - %i passed, %i failed\n",
                selftest_results.passed, selftest_results.failed);
        return 0;
index c843720bd3e53d7e7f632f4c75152edbefbc7d5f..da4695f60351ad4c7c24aecf791a5a6c2b71edfc 100644 (file)
                                                      <&test_intmap1 1 2>;
                        };
                };
+
+               testcase-device1 {
+                       compatible = "testcase-device";
+                       interrupt-parent = <&test_intc0>;
+                       interrupts = <1>;
+               };
+
+               testcase-device2 {
+                       compatible = "testcase-device";
+                       interrupt-parent = <&test_intc2>;
+                       interrupts = <1>; /* invalid specifier - too short */
+               };
        };
+
 };
index fd3e3ab56509125db9e6d25b1b2288eaccda60fd..4fe349dcaf5954c22baed114553fba0ee6a2e566 100644 (file)
@@ -15,6 +15,7 @@
 #include <linux/io.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
+#include <linux/of_pci.h>
 #include <linux/pci.h>
 #include <linux/platform_device.h>
 #include <linux/pm_runtime.h>
@@ -180,8 +181,13 @@ static int rcar_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        struct pci_sys_data *sys = dev->bus->sysdata;
        struct rcar_pci_priv *priv = sys->private_data;
+       int irq;
+
+       irq = of_irq_parse_and_map_pci(dev, slot, pin);
+       if (!irq)
+               irq = priv->irq;
 
-       return priv->irq;
+       return irq;
 }
 
 #ifdef CONFIG_PCI_DEBUG
index 330f7e3a32dd9f3694a09844106b551751235296..083cf37ca04752be2cdb5658255ac55df450fa78 100644 (file)
@@ -639,10 +639,15 @@ static int tegra_pcie_setup(int nr, struct pci_sys_data *sys)
 static int tegra_pcie_map_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
 {
        struct tegra_pcie *pcie = sys_to_pcie(pdev->bus->sysdata);
+       int irq;
 
        tegra_cpuidle_pcie_irqs_in_use();
 
-       return pcie->irq;
+       irq = of_irq_parse_and_map_pci(pdev, slot, pin);
+       if (!irq)
+               irq = pcie->irq;
+
+       return irq;
 }
 
 static void tegra_pcie_add_bus(struct pci_bus *bus)
index 509a29d84509364b366ef1e130ed5ea37b40a091..c4e373294476a701278c93b4619610a9ed181f70 100644 (file)
@@ -17,6 +17,7 @@
 #include <linux/module.h>
 #include <linux/msi.h>
 #include <linux/of_address.h>
+#include <linux/of_pci.h>
 #include <linux/pci.h>
 #include <linux/pci_regs.h>
 #include <linux/types.h>
@@ -490,7 +491,7 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
        dw_pci.nr_controllers = 1;
        dw_pci.private_data = (void **)&pp;
 
-       pci_common_init(&dw_pci);
+       pci_common_init_dev(pp->dev, &dw_pci);
        pci_assign_unassigned_resources();
 #ifdef CONFIG_PCI_DOMAINS
        dw_pci.domain++;
@@ -520,13 +521,13 @@ static void dw_pcie_prog_viewport_cfg1(struct pcie_port *pp, u32 busdev)
        dw_pcie_writel_rc(pp, PCIE_ATU_REGION_OUTBOUND | PCIE_ATU_REGION_INDEX1,
                          PCIE_ATU_VIEWPORT);
        dw_pcie_writel_rc(pp, PCIE_ATU_TYPE_CFG1, PCIE_ATU_CR1);
-       dw_pcie_writel_rc(pp, PCIE_ATU_ENABLE, PCIE_ATU_CR2);
        dw_pcie_writel_rc(pp, pp->cfg1_base, PCIE_ATU_LOWER_BASE);
        dw_pcie_writel_rc(pp, (pp->cfg1_base >> 32), PCIE_ATU_UPPER_BASE);
        dw_pcie_writel_rc(pp, pp->cfg1_base + pp->config.cfg1_size - 1,
                          PCIE_ATU_LIMIT);
        dw_pcie_writel_rc(pp, busdev, PCIE_ATU_LOWER_TARGET);
        dw_pcie_writel_rc(pp, 0, PCIE_ATU_UPPER_TARGET);
+       dw_pcie_writel_rc(pp, PCIE_ATU_ENABLE, PCIE_ATU_CR2);
 }
 
 static void dw_pcie_prog_viewport_mem_outbound(struct pcie_port *pp)
@@ -535,7 +536,6 @@ static void dw_pcie_prog_viewport_mem_outbound(struct pcie_port *pp)
        dw_pcie_writel_rc(pp, PCIE_ATU_REGION_OUTBOUND | PCIE_ATU_REGION_INDEX0,
                          PCIE_ATU_VIEWPORT);
        dw_pcie_writel_rc(pp, PCIE_ATU_TYPE_MEM, PCIE_ATU_CR1);
-       dw_pcie_writel_rc(pp, PCIE_ATU_ENABLE, PCIE_ATU_CR2);
        dw_pcie_writel_rc(pp, pp->mem_base, PCIE_ATU_LOWER_BASE);
        dw_pcie_writel_rc(pp, (pp->mem_base >> 32), PCIE_ATU_UPPER_BASE);
        dw_pcie_writel_rc(pp, pp->mem_base + pp->config.mem_size - 1,
@@ -543,6 +543,7 @@ static void dw_pcie_prog_viewport_mem_outbound(struct pcie_port *pp)
        dw_pcie_writel_rc(pp, pp->config.mem_bus_addr, PCIE_ATU_LOWER_TARGET);
        dw_pcie_writel_rc(pp, upper_32_bits(pp->config.mem_bus_addr),
                          PCIE_ATU_UPPER_TARGET);
+       dw_pcie_writel_rc(pp, PCIE_ATU_ENABLE, PCIE_ATU_CR2);
 }
 
 static void dw_pcie_prog_viewport_io_outbound(struct pcie_port *pp)
@@ -551,7 +552,6 @@ static void dw_pcie_prog_viewport_io_outbound(struct pcie_port *pp)
        dw_pcie_writel_rc(pp, PCIE_ATU_REGION_OUTBOUND | PCIE_ATU_REGION_INDEX1,
                          PCIE_ATU_VIEWPORT);
        dw_pcie_writel_rc(pp, PCIE_ATU_TYPE_IO, PCIE_ATU_CR1);
-       dw_pcie_writel_rc(pp, PCIE_ATU_ENABLE, PCIE_ATU_CR2);
        dw_pcie_writel_rc(pp, pp->io_base, PCIE_ATU_LOWER_BASE);
        dw_pcie_writel_rc(pp, (pp->io_base >> 32), PCIE_ATU_UPPER_BASE);
        dw_pcie_writel_rc(pp, pp->io_base + pp->config.io_size - 1,
@@ -559,6 +559,7 @@ static void dw_pcie_prog_viewport_io_outbound(struct pcie_port *pp)
        dw_pcie_writel_rc(pp, pp->config.io_bus_addr, PCIE_ATU_LOWER_TARGET);
        dw_pcie_writel_rc(pp, upper_32_bits(pp->config.io_bus_addr),
                          PCIE_ATU_UPPER_TARGET);
+       dw_pcie_writel_rc(pp, PCIE_ATU_ENABLE, PCIE_ATU_CR2);
 }
 
 static int dw_pcie_rd_other_conf(struct pcie_port *pp, struct pci_bus *bus,
@@ -723,7 +724,7 @@ static struct pci_bus *dw_pcie_scan_bus(int nr, struct pci_sys_data *sys)
 
        if (pp) {
                pp->root_bus_nr = sys->busnr;
-               bus = pci_scan_root_bus(NULL, sys->busnr, &dw_pcie_ops,
+               bus = pci_scan_root_bus(pp->dev, sys->busnr, &dw_pcie_ops,
                                        sys, &sys->resources);
        } else {
                bus = NULL;
@@ -736,8 +737,13 @@ static struct pci_bus *dw_pcie_scan_bus(int nr, struct pci_sys_data *sys)
 static int dw_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        struct pcie_port *pp = sys_to_pcie(dev->bus->sysdata);
+       int irq;
+
+       irq = of_irq_parse_and_map_pci(dev, slot, pin);
+       if (!irq)
+               irq = pp->irq;
 
-       return pp->irq;
+       return irq;
 }
 
 static void dw_pcie_add_bus(struct pci_bus *bus)
@@ -764,7 +770,7 @@ void dw_pcie_setup_rc(struct pcie_port *pp)
        u32 membase;
        u32 memlimit;
 
-       /* set the number of lines as 4 */
+       /* set the number of lanes */
        dw_pcie_readl_rc(pp, PCIE_PORT_LINK_CONTROL, &val);
        val &= ~PORT_LINK_MODE_MASK;
        switch (pp->lanes) {
index 3bb05f17b9b4edcd05cc15e582aa049e64d01df5..4906c27fa3bd9f5a8fb4da35981fabd170ccbc60 100644 (file)
@@ -33,6 +33,7 @@ config PHY_MVEBU_SATA
 
 config OMAP_CONTROL_PHY
        tristate "OMAP CONTROL PHY Driver"
+       depends on ARCH_OMAP2PLUS || COMPILE_TEST
        help
          Enable this to add support for the PHY part present in the control
          module. This driver has API to power on the USB2 PHY and to write to
index 2faf78edc8649f2c5ef79c3093aaa14de04b0eea..7728518572a4ea4c0fdb9e50ccde640c654d47b1 100644 (file)
@@ -13,8 +13,9 @@ obj-$(CONFIG_TI_PIPE3)                        += phy-ti-pipe3.o
 obj-$(CONFIG_TWL4030_USB)              += phy-twl4030-usb.o
 obj-$(CONFIG_PHY_EXYNOS5250_SATA)      += phy-exynos5250-sata.o
 obj-$(CONFIG_PHY_SUN4I_USB)            += phy-sun4i-usb.o
-obj-$(CONFIG_PHY_SAMSUNG_USB2)         += phy-samsung-usb2.o
-obj-$(CONFIG_PHY_EXYNOS4210_USB2)      += phy-exynos4210-usb2.o
-obj-$(CONFIG_PHY_EXYNOS4X12_USB2)      += phy-exynos4x12-usb2.o
-obj-$(CONFIG_PHY_EXYNOS5250_USB2)      += phy-exynos5250-usb2.o
+obj-$(CONFIG_PHY_SAMSUNG_USB2)         += phy-exynos-usb2.o
+phy-exynos-usb2-y                      += phy-samsung-usb2.o
+phy-exynos-usb2-$(CONFIG_PHY_EXYNOS4210_USB2)  += phy-exynos4210-usb2.o
+phy-exynos-usb2-$(CONFIG_PHY_EXYNOS4X12_USB2)  += phy-exynos4x12-usb2.o
+phy-exynos-usb2-$(CONFIG_PHY_EXYNOS5250_USB2)  += phy-exynos5250-usb2.o
 obj-$(CONFIG_PHY_XGENE)                        += phy-xgene.o
index 623b71c54b3e5f0a865d8563c8557919e9603900..c64a2f3b2d624fb9d8c266b979416d6b53ed5b9f 100644 (file)
@@ -64,6 +64,9 @@ static struct phy *phy_lookup(struct device *device, const char *port)
        class_dev_iter_init(&iter, phy_class, NULL, NULL);
        while ((dev = class_dev_iter_next(&iter))) {
                phy = to_phy(dev);
+
+               if (!phy->init_data)
+                       continue;
                count = phy->init_data->num_consumers;
                consumers = phy->init_data->consumers;
                while (count--) {
index e49324032611f2a0f7eff1e2e6845f6f9d0e48ae..e00c02d0a094294a438e903585f61f71af095df2 100644 (file)
@@ -104,16 +104,16 @@ config PINCTRL_BCM2835
        select PINMUX
        select PINCONF
 
-config PINCTRL_CAPRI
-       bool "Broadcom Capri pinctrl driver"
+config PINCTRL_BCM281XX
+       bool "Broadcom BCM281xx pinctrl driver"
        depends on OF
        select PINMUX
        select PINCONF
        select GENERIC_PINCONF
        select REGMAP_MMIO
        help
-         Say Y here to support Broadcom Capri pinctrl driver, which is used for
-         the BCM281xx SoC family, including BCM11130, BCM11140, BCM11351,
+         Say Y here to support Broadcom BCM281xx pinctrl driver, which is used
+         for the BCM281xx SoC family, including BCM11130, BCM11140, BCM11351,
          BCM28145, and BCM28155 SoCs.  This driver requires the pinctrl
          framework.  GPIO is provided by a separate GPIO driver.
 
index 4b835880cf80382476b656e19eaebf6f91f648fb..6d3fd62b9ae836a04353e05985d403706f5a7dfa 100644 (file)
@@ -21,7 +21,7 @@ obj-$(CONFIG_PINCTRL_BF60x)   += pinctrl-adi2-bf60x.o
 obj-$(CONFIG_PINCTRL_AT91)     += pinctrl-at91.o
 obj-$(CONFIG_PINCTRL_BCM2835)  += pinctrl-bcm2835.o
 obj-$(CONFIG_PINCTRL_BAYTRAIL) += pinctrl-baytrail.o
-obj-$(CONFIG_PINCTRL_CAPRI)    += pinctrl-capri.o
+obj-$(CONFIG_PINCTRL_BCM281XX) += pinctrl-bcm281xx.o
 obj-$(CONFIG_PINCTRL_IMX)      += pinctrl-imx.o
 obj-$(CONFIG_PINCTRL_IMX1_CORE)        += pinctrl-imx1-core.o
 obj-$(CONFIG_PINCTRL_IMX27)    += pinctrl-imx27.o
index 92ed4b2e3c0716cf3f21580b49434fc6e9952fc6..c862f9c0e9ce4cb356222b496c40ca1ac26b0699 100644 (file)
@@ -64,7 +64,6 @@ struct as3722_pin_function {
 };
 
 struct as3722_gpio_pin_control {
-       bool enable_gpio_invert;
        unsigned mode_prop;
        int io_function;
 };
@@ -320,10 +319,8 @@ static int as3722_pinctrl_gpio_set_direction(struct pinctrl_dev *pctldev,
                return mode;
        }
 
-       if (as_pci->gpio_control[offset].enable_gpio_invert)
-               mode |= AS3722_GPIO_INV;
-
-       return as3722_write(as3722, AS3722_GPIOn_CONTROL_REG(offset), mode);
+       return as3722_update_bits(as3722, AS3722_GPIOn_CONTROL_REG(offset),
+                               AS3722_GPIO_MODE_MASK, mode);
 }
 
 static const struct pinmux_ops as3722_pinmux_ops = {
@@ -496,10 +493,18 @@ static void as3722_gpio_set(struct gpio_chip *chip, unsigned offset,
 {
        struct as3722_pctrl_info *as_pci = to_as_pci(chip);
        struct as3722 *as3722 = as_pci->as3722;
-       int en_invert = as_pci->gpio_control[offset].enable_gpio_invert;
+       int en_invert;
        u32 val;
        int ret;
 
+       ret = as3722_read(as3722, AS3722_GPIOn_CONTROL_REG(offset), &val);
+       if (ret < 0) {
+               dev_err(as_pci->dev,
+                       "GPIO_CONTROL%d_REG read failed: %d\n", offset, ret);
+               return;
+       }
+       en_invert = !!(val & AS3722_GPIO_INV);
+
        if (value)
                val = (en_invert) ? 0 : AS3722_GPIOn_SIGNAL(offset);
        else
diff --git a/drivers/pinctrl/pinctrl-bcm281xx.c b/drivers/pinctrl/pinctrl-bcm281xx.c
new file mode 100644 (file)
index 0000000..3bed792
--- /dev/null
@@ -0,0 +1,1461 @@
+/*
+ * Copyright (C) 2013 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/pinctrl/pinctrl.h>
+#include <linux/pinctrl/pinmux.h>
+#include <linux/pinctrl/pinconf.h>
+#include <linux/pinctrl/pinconf-generic.h>
+#include <linux/regmap.h>
+#include <linux/slab.h>
+#include "core.h"
+#include "pinctrl-utils.h"
+
+/* BCM281XX Pin Control Registers Definitions */
+
+/* Function Select bits are the same for all pin control registers */
+#define BCM281XX_PIN_REG_F_SEL_MASK            0x0700
+#define BCM281XX_PIN_REG_F_SEL_SHIFT           8
+
+/* Standard pin register */
+#define BCM281XX_STD_PIN_REG_DRV_STR_MASK      0x0007
+#define BCM281XX_STD_PIN_REG_DRV_STR_SHIFT     0
+#define BCM281XX_STD_PIN_REG_INPUT_DIS_MASK    0x0008
+#define BCM281XX_STD_PIN_REG_INPUT_DIS_SHIFT   3
+#define BCM281XX_STD_PIN_REG_SLEW_MASK         0x0010
+#define BCM281XX_STD_PIN_REG_SLEW_SHIFT                4
+#define BCM281XX_STD_PIN_REG_PULL_UP_MASK      0x0020
+#define BCM281XX_STD_PIN_REG_PULL_UP_SHIFT     5
+#define BCM281XX_STD_PIN_REG_PULL_DN_MASK      0x0040
+#define BCM281XX_STD_PIN_REG_PULL_DN_SHIFT     6
+#define BCM281XX_STD_PIN_REG_HYST_MASK         0x0080
+#define BCM281XX_STD_PIN_REG_HYST_SHIFT                7
+
+/* I2C pin register */
+#define BCM281XX_I2C_PIN_REG_INPUT_DIS_MASK    0x0004
+#define BCM281XX_I2C_PIN_REG_INPUT_DIS_SHIFT   2
+#define BCM281XX_I2C_PIN_REG_SLEW_MASK         0x0008
+#define BCM281XX_I2C_PIN_REG_SLEW_SHIFT                3
+#define BCM281XX_I2C_PIN_REG_PULL_UP_STR_MASK  0x0070
+#define BCM281XX_I2C_PIN_REG_PULL_UP_STR_SHIFT 4
+
+/* HDMI pin register */
+#define BCM281XX_HDMI_PIN_REG_INPUT_DIS_MASK   0x0008
+#define BCM281XX_HDMI_PIN_REG_INPUT_DIS_SHIFT  3
+#define BCM281XX_HDMI_PIN_REG_MODE_MASK                0x0010
+#define BCM281XX_HDMI_PIN_REG_MODE_SHIFT       4
+
+/**
+ * bcm281xx_pin_type - types of pin register
+ */
+enum bcm281xx_pin_type {
+       BCM281XX_PIN_TYPE_UNKNOWN = 0,
+       BCM281XX_PIN_TYPE_STD,
+       BCM281XX_PIN_TYPE_I2C,
+       BCM281XX_PIN_TYPE_HDMI,
+};
+
+static enum bcm281xx_pin_type std_pin = BCM281XX_PIN_TYPE_STD;
+static enum bcm281xx_pin_type i2c_pin = BCM281XX_PIN_TYPE_I2C;
+static enum bcm281xx_pin_type hdmi_pin = BCM281XX_PIN_TYPE_HDMI;
+
+/**
+ * bcm281xx_pin_function- define pin function
+ */
+struct bcm281xx_pin_function {
+       const char *name;
+       const char * const *groups;
+       const unsigned ngroups;
+};
+
+/**
+ * bcm281xx_pinctrl_data - Broadcom-specific pinctrl data
+ * @reg_base - base of pinctrl registers
+ */
+struct bcm281xx_pinctrl_data {
+       void __iomem *reg_base;
+
+       /* List of all pins */
+       const struct pinctrl_pin_desc *pins;
+       const unsigned npins;
+
+       const struct bcm281xx_pin_function *functions;
+       const unsigned nfunctions;
+
+       struct regmap *regmap;
+};
+
+/*
+ * Pin number definition.  The order here must be the same as defined in the
+ * PADCTRLREG block in the RDB.
+ */
+#define BCM281XX_PIN_ADCSYNC           0
+#define BCM281XX_PIN_BAT_RM            1
+#define BCM281XX_PIN_BSC1_SCL          2
+#define BCM281XX_PIN_BSC1_SDA          3
+#define BCM281XX_PIN_BSC2_SCL          4
+#define BCM281XX_PIN_BSC2_SDA          5
+#define BCM281XX_PIN_CLASSGPWR         6
+#define BCM281XX_PIN_CLK_CX8           7
+#define BCM281XX_PIN_CLKOUT_0          8
+#define BCM281XX_PIN_CLKOUT_1          9
+#define BCM281XX_PIN_CLKOUT_2          10
+#define BCM281XX_PIN_CLKOUT_3          11
+#define BCM281XX_PIN_CLKREQ_IN_0       12
+#define BCM281XX_PIN_CLKREQ_IN_1       13
+#define BCM281XX_PIN_CWS_SYS_REQ1      14
+#define BCM281XX_PIN_CWS_SYS_REQ2      15
+#define BCM281XX_PIN_CWS_SYS_REQ3      16
+#define BCM281XX_PIN_DIGMIC1_CLK       17
+#define BCM281XX_PIN_DIGMIC1_DQ                18
+#define BCM281XX_PIN_DIGMIC2_CLK       19
+#define BCM281XX_PIN_DIGMIC2_DQ                20
+#define BCM281XX_PIN_GPEN13            21
+#define BCM281XX_PIN_GPEN14            22
+#define BCM281XX_PIN_GPEN15            23
+#define BCM281XX_PIN_GPIO00            24
+#define BCM281XX_PIN_GPIO01            25
+#define BCM281XX_PIN_GPIO02            26
+#define BCM281XX_PIN_GPIO03            27
+#define BCM281XX_PIN_GPIO04            28
+#define BCM281XX_PIN_GPIO05            29
+#define BCM281XX_PIN_GPIO06            30
+#define BCM281XX_PIN_GPIO07            31
+#define BCM281XX_PIN_GPIO08            32
+#define BCM281XX_PIN_GPIO09            33
+#define BCM281XX_PIN_GPIO10            34
+#define BCM281XX_PIN_GPIO11            35
+#define BCM281XX_PIN_GPIO12            36
+#define BCM281XX_PIN_GPIO13            37
+#define BCM281XX_PIN_GPIO14            38
+#define BCM281XX_PIN_GPS_PABLANK       39
+#define BCM281XX_PIN_GPS_TMARK         40
+#define BCM281XX_PIN_HDMI_SCL          41
+#define BCM281XX_PIN_HDMI_SDA          42
+#define BCM281XX_PIN_IC_DM             43
+#define BCM281XX_PIN_IC_DP             44
+#define BCM281XX_PIN_KP_COL_IP_0       45
+#define BCM281XX_PIN_KP_COL_IP_1       46
+#define BCM281XX_PIN_KP_COL_IP_2       47
+#define BCM281XX_PIN_KP_COL_IP_3       48
+#define BCM281XX_PIN_KP_ROW_OP_0       49
+#define BCM281XX_PIN_KP_ROW_OP_1       50
+#define BCM281XX_PIN_KP_ROW_OP_2       51
+#define BCM281XX_PIN_KP_ROW_OP_3       52
+#define BCM281XX_PIN_LCD_B_0           53
+#define BCM281XX_PIN_LCD_B_1           54
+#define BCM281XX_PIN_LCD_B_2           55
+#define BCM281XX_PIN_LCD_B_3           56
+#define BCM281XX_PIN_LCD_B_4           57
+#define BCM281XX_PIN_LCD_B_5           58
+#define BCM281XX_PIN_LCD_B_6           59
+#define BCM281XX_PIN_LCD_B_7           60
+#define BCM281XX_PIN_LCD_G_0           61
+#define BCM281XX_PIN_LCD_G_1           62
+#define BCM281XX_PIN_LCD_G_2           63
+#define BCM281XX_PIN_LCD_G_3           64
+#define BCM281XX_PIN_LCD_G_4           65
+#define BCM281XX_PIN_LCD_G_5           66
+#define BCM281XX_PIN_LCD_G_6           67
+#define BCM281XX_PIN_LCD_G_7           68
+#define BCM281XX_PIN_LCD_HSYNC         69
+#define BCM281XX_PIN_LCD_OE            70
+#define BCM281XX_PIN_LCD_PCLK          71
+#define BCM281XX_PIN_LCD_R_0           72
+#define BCM281XX_PIN_LCD_R_1           73
+#define BCM281XX_PIN_LCD_R_2           74
+#define BCM281XX_PIN_LCD_R_3           75
+#define BCM281XX_PIN_LCD_R_4           76
+#define BCM281XX_PIN_LCD_R_5           77
+#define BCM281XX_PIN_LCD_R_6           78
+#define BCM281XX_PIN_LCD_R_7           79
+#define BCM281XX_PIN_LCD_VSYNC         80
+#define BCM281XX_PIN_MDMGPIO0          81
+#define BCM281XX_PIN_MDMGPIO1          82
+#define BCM281XX_PIN_MDMGPIO2          83
+#define BCM281XX_PIN_MDMGPIO3          84
+#define BCM281XX_PIN_MDMGPIO4          85
+#define BCM281XX_PIN_MDMGPIO5          86
+#define BCM281XX_PIN_MDMGPIO6          87
+#define BCM281XX_PIN_MDMGPIO7          88
+#define BCM281XX_PIN_MDMGPIO8          89
+#define BCM281XX_PIN_MPHI_DATA_0       90
+#define BCM281XX_PIN_MPHI_DATA_1       91
+#define BCM281XX_PIN_MPHI_DATA_2       92
+#define BCM281XX_PIN_MPHI_DATA_3       93
+#define BCM281XX_PIN_MPHI_DATA_4       94
+#define BCM281XX_PIN_MPHI_DATA_5       95
+#define BCM281XX_PIN_MPHI_DATA_6       96
+#define BCM281XX_PIN_MPHI_DATA_7       97
+#define BCM281XX_PIN_MPHI_DATA_8       98
+#define BCM281XX_PIN_MPHI_DATA_9       99
+#define BCM281XX_PIN_MPHI_DATA_10      100
+#define BCM281XX_PIN_MPHI_DATA_11      101
+#define BCM281XX_PIN_MPHI_DATA_12      102
+#define BCM281XX_PIN_MPHI_DATA_13      103
+#define BCM281XX_PIN_MPHI_DATA_14      104
+#define BCM281XX_PIN_MPHI_DATA_15      105
+#define BCM281XX_PIN_MPHI_HA0          106
+#define BCM281XX_PIN_MPHI_HAT0         107
+#define BCM281XX_PIN_MPHI_HAT1         108
+#define BCM281XX_PIN_MPHI_HCE0_N       109
+#define BCM281XX_PIN_MPHI_HCE1_N       110
+#define BCM281XX_PIN_MPHI_HRD_N                111
+#define BCM281XX_PIN_MPHI_HWR_N                112
+#define BCM281XX_PIN_MPHI_RUN0         113
+#define BCM281XX_PIN_MPHI_RUN1         114
+#define BCM281XX_PIN_MTX_SCAN_CLK      115
+#define BCM281XX_PIN_MTX_SCAN_DATA     116
+#define BCM281XX_PIN_NAND_AD_0         117
+#define BCM281XX_PIN_NAND_AD_1         118
+#define BCM281XX_PIN_NAND_AD_2         119
+#define BCM281XX_PIN_NAND_AD_3         120
+#define BCM281XX_PIN_NAND_AD_4         121
+#define BCM281XX_PIN_NAND_AD_5         122
+#define BCM281XX_PIN_NAND_AD_6         123
+#define BCM281XX_PIN_NAND_AD_7         124
+#define BCM281XX_PIN_NAND_ALE          125
+#define BCM281XX_PIN_NAND_CEN_0                126
+#define BCM281XX_PIN_NAND_CEN_1                127
+#define BCM281XX_PIN_NAND_CLE          128
+#define BCM281XX_PIN_NAND_OEN          129
+#define BCM281XX_PIN_NAND_RDY_0                130
+#define BCM281XX_PIN_NAND_RDY_1                131
+#define BCM281XX_PIN_NAND_WEN          132
+#define BCM281XX_PIN_NAND_WP           133
+#define BCM281XX_PIN_PC1               134
+#define BCM281XX_PIN_PC2               135
+#define BCM281XX_PIN_PMU_INT           136
+#define BCM281XX_PIN_PMU_SCL           137
+#define BCM281XX_PIN_PMU_SDA           138
+#define BCM281XX_PIN_RFST2G_MTSLOTEN3G 139
+#define BCM281XX_PIN_RGMII_0_RX_CTL    140
+#define BCM281XX_PIN_RGMII_0_RXC       141
+#define BCM281XX_PIN_RGMII_0_RXD_0     142
+#define BCM281XX_PIN_RGMII_0_RXD_1     143
+#define BCM281XX_PIN_RGMII_0_RXD_2     144
+#define BCM281XX_PIN_RGMII_0_RXD_3     145
+#define BCM281XX_PIN_RGMII_0_TX_CTL    146
+#define BCM281XX_PIN_RGMII_0_TXC       147
+#define BCM281XX_PIN_RGMII_0_TXD_0     148
+#define BCM281XX_PIN_RGMII_0_TXD_1     149
+#define BCM281XX_PIN_RGMII_0_TXD_2     150
+#define BCM281XX_PIN_RGMII_0_TXD_3     151
+#define BCM281XX_PIN_RGMII_1_RX_CTL    152
+#define BCM281XX_PIN_RGMII_1_RXC       153
+#define BCM281XX_PIN_RGMII_1_RXD_0     154
+#define BCM281XX_PIN_RGMII_1_RXD_1     155
+#define BCM281XX_PIN_RGMII_1_RXD_2     156
+#define BCM281XX_PIN_RGMII_1_RXD_3     157
+#define BCM281XX_PIN_RGMII_1_TX_CTL    158
+#define BCM281XX_PIN_RGMII_1_TXC       159
+#define BCM281XX_PIN_RGMII_1_TXD_0     160
+#define BCM281XX_PIN_RGMII_1_TXD_1     161
+#define BCM281XX_PIN_RGMII_1_TXD_2     162
+#define BCM281XX_PIN_RGMII_1_TXD_3     163
+#define BCM281XX_PIN_RGMII_GPIO_0      164
+#define BCM281XX_PIN_RGMII_GPIO_1      165
+#define BCM281XX_PIN_RGMII_GPIO_2      166
+#define BCM281XX_PIN_RGMII_GPIO_3      167
+#define BCM281XX_PIN_RTXDATA2G_TXDATA3G1       168
+#define BCM281XX_PIN_RTXEN2G_TXDATA3G2 169
+#define BCM281XX_PIN_RXDATA3G0         170
+#define BCM281XX_PIN_RXDATA3G1         171
+#define BCM281XX_PIN_RXDATA3G2         172
+#define BCM281XX_PIN_SDIO1_CLK         173
+#define BCM281XX_PIN_SDIO1_CMD         174
+#define BCM281XX_PIN_SDIO1_DATA_0      175
+#define BCM281XX_PIN_SDIO1_DATA_1      176
+#define BCM281XX_PIN_SDIO1_DATA_2      177
+#define BCM281XX_PIN_SDIO1_DATA_3      178
+#define BCM281XX_PIN_SDIO4_CLK         179
+#define BCM281XX_PIN_SDIO4_CMD         180
+#define BCM281XX_PIN_SDIO4_DATA_0      181
+#define BCM281XX_PIN_SDIO4_DATA_1      182
+#define BCM281XX_PIN_SDIO4_DATA_2      183
+#define BCM281XX_PIN_SDIO4_DATA_3      184
+#define BCM281XX_PIN_SIM_CLK           185
+#define BCM281XX_PIN_SIM_DATA          186
+#define BCM281XX_PIN_SIM_DET           187
+#define BCM281XX_PIN_SIM_RESETN                188
+#define BCM281XX_PIN_SIM2_CLK          189
+#define BCM281XX_PIN_SIM2_DATA         190
+#define BCM281XX_PIN_SIM2_DET          191
+#define BCM281XX_PIN_SIM2_RESETN       192
+#define BCM281XX_PIN_SRI_C             193
+#define BCM281XX_PIN_SRI_D             194
+#define BCM281XX_PIN_SRI_E             195
+#define BCM281XX_PIN_SSP_EXTCLK                196
+#define BCM281XX_PIN_SSP0_CLK          197
+#define BCM281XX_PIN_SSP0_FS           198
+#define BCM281XX_PIN_SSP0_RXD          199
+#define BCM281XX_PIN_SSP0_TXD          200
+#define BCM281XX_PIN_SSP2_CLK          201
+#define BCM281XX_PIN_SSP2_FS_0         202
+#define BCM281XX_PIN_SSP2_FS_1         203
+#define BCM281XX_PIN_SSP2_FS_2         204
+#define BCM281XX_PIN_SSP2_FS_3         205
+#define BCM281XX_PIN_SSP2_RXD_0                206
+#define BCM281XX_PIN_SSP2_RXD_1                207
+#define BCM281XX_PIN_SSP2_TXD_0                208
+#define BCM281XX_PIN_SSP2_TXD_1                209
+#define BCM281XX_PIN_SSP3_CLK          210
+#define BCM281XX_PIN_SSP3_FS           211
+#define BCM281XX_PIN_SSP3_RXD          212
+#define BCM281XX_PIN_SSP3_TXD          213
+#define BCM281XX_PIN_SSP4_CLK          214
+#define BCM281XX_PIN_SSP4_FS           215
+#define BCM281XX_PIN_SSP4_RXD          216
+#define BCM281XX_PIN_SSP4_TXD          217
+#define BCM281XX_PIN_SSP5_CLK          218
+#define BCM281XX_PIN_SSP5_FS           219
+#define BCM281XX_PIN_SSP5_RXD          220
+#define BCM281XX_PIN_SSP5_TXD          221
+#define BCM281XX_PIN_SSP6_CLK          222
+#define BCM281XX_PIN_SSP6_FS           223
+#define BCM281XX_PIN_SSP6_RXD          224
+#define BCM281XX_PIN_SSP6_TXD          225
+#define BCM281XX_PIN_STAT_1            226
+#define BCM281XX_PIN_STAT_2            227
+#define BCM281XX_PIN_SYSCLKEN          228
+#define BCM281XX_PIN_TRACECLK          229
+#define BCM281XX_PIN_TRACEDT00         230
+#define BCM281XX_PIN_TRACEDT01         231
+#define BCM281XX_PIN_TRACEDT02         232
+#define BCM281XX_PIN_TRACEDT03         233
+#define BCM281XX_PIN_TRACEDT04         234
+#define BCM281XX_PIN_TRACEDT05         235
+#define BCM281XX_PIN_TRACEDT06         236
+#define BCM281XX_PIN_TRACEDT07         237
+#define BCM281XX_PIN_TRACEDT08         238
+#define BCM281XX_PIN_TRACEDT09         239
+#define BCM281XX_PIN_TRACEDT10         240
+#define BCM281XX_PIN_TRACEDT11         241
+#define BCM281XX_PIN_TRACEDT12         242
+#define BCM281XX_PIN_TRACEDT13         243
+#define BCM281XX_PIN_TRACEDT14         244
+#define BCM281XX_PIN_TRACEDT15         245
+#define BCM281XX_PIN_TXDATA3G0         246
+#define BCM281XX_PIN_TXPWRIND          247
+#define BCM281XX_PIN_UARTB1_UCTS       248
+#define BCM281XX_PIN_UARTB1_URTS       249
+#define BCM281XX_PIN_UARTB1_URXD       250
+#define BCM281XX_PIN_UARTB1_UTXD       251
+#define BCM281XX_PIN_UARTB2_URXD       252
+#define BCM281XX_PIN_UARTB2_UTXD       253
+#define BCM281XX_PIN_UARTB3_UCTS       254
+#define BCM281XX_PIN_UARTB3_URTS       255
+#define BCM281XX_PIN_UARTB3_URXD       256
+#define BCM281XX_PIN_UARTB3_UTXD       257
+#define BCM281XX_PIN_UARTB4_UCTS       258
+#define BCM281XX_PIN_UARTB4_URTS       259
+#define BCM281XX_PIN_UARTB4_URXD       260
+#define BCM281XX_PIN_UARTB4_UTXD       261
+#define BCM281XX_PIN_VC_CAM1_SCL       262
+#define BCM281XX_PIN_VC_CAM1_SDA       263
+#define BCM281XX_PIN_VC_CAM2_SCL       264
+#define BCM281XX_PIN_VC_CAM2_SDA       265
+#define BCM281XX_PIN_VC_CAM3_SCL       266
+#define BCM281XX_PIN_VC_CAM3_SDA       267
+
+#define BCM281XX_PIN_DESC(a, b, c) \
+       { .number = a, .name = b, .drv_data = &c##_pin }
+
+/*
+ * Pin description definition.  The order here must be the same as defined in
+ * the PADCTRLREG block in the RDB, since the pin number is used as an index
+ * into this array.
+ */
+static const struct pinctrl_pin_desc bcm281xx_pinctrl_pins[] = {
+       BCM281XX_PIN_DESC(BCM281XX_PIN_ADCSYNC, "adcsync", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_BAT_RM, "bat_rm", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_BSC1_SCL, "bsc1_scl", i2c),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_BSC1_SDA, "bsc1_sda", i2c),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_BSC2_SCL, "bsc2_scl", i2c),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_BSC2_SDA, "bsc2_sda", i2c),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_CLASSGPWR, "classgpwr", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_CLK_CX8, "clk_cx8", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_CLKOUT_0, "clkout_0", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_CLKOUT_1, "clkout_1", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_CLKOUT_2, "clkout_2", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_CLKOUT_3, "clkout_3", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_CLKREQ_IN_0, "clkreq_in_0", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_CLKREQ_IN_1, "clkreq_in_1", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_CWS_SYS_REQ1, "cws_sys_req1", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_CWS_SYS_REQ2, "cws_sys_req2", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_CWS_SYS_REQ3, "cws_sys_req3", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_DIGMIC1_CLK, "digmic1_clk", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_DIGMIC1_DQ, "digmic1_dq", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_DIGMIC2_CLK, "digmic2_clk", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_DIGMIC2_DQ, "digmic2_dq", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_GPEN13, "gpen13", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_GPEN14, "gpen14", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_GPEN15, "gpen15", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO00, "gpio00", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO01, "gpio01", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO02, "gpio02", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO03, "gpio03", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO04, "gpio04", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO05, "gpio05", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO06, "gpio06", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO07, "gpio07", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO08, "gpio08", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO09, "gpio09", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO10, "gpio10", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO11, "gpio11", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO12, "gpio12", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO13, "gpio13", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_GPIO14, "gpio14", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_GPS_PABLANK, "gps_pablank", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_GPS_TMARK, "gps_tmark", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_HDMI_SCL, "hdmi_scl", hdmi),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_HDMI_SDA, "hdmi_sda", hdmi),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_IC_DM, "ic_dm", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_IC_DP, "ic_dp", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_KP_COL_IP_0, "kp_col_ip_0", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_KP_COL_IP_1, "kp_col_ip_1", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_KP_COL_IP_2, "kp_col_ip_2", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_KP_COL_IP_3, "kp_col_ip_3", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_KP_ROW_OP_0, "kp_row_op_0", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_KP_ROW_OP_1, "kp_row_op_1", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_KP_ROW_OP_2, "kp_row_op_2", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_KP_ROW_OP_3, "kp_row_op_3", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_B_0, "lcd_b_0", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_B_1, "lcd_b_1", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_B_2, "lcd_b_2", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_B_3, "lcd_b_3", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_B_4, "lcd_b_4", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_B_5, "lcd_b_5", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_B_6, "lcd_b_6", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_B_7, "lcd_b_7", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_G_0, "lcd_g_0", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_G_1, "lcd_g_1", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_G_2, "lcd_g_2", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_G_3, "lcd_g_3", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_G_4, "lcd_g_4", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_G_5, "lcd_g_5", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_G_6, "lcd_g_6", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_G_7, "lcd_g_7", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_HSYNC, "lcd_hsync", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_OE, "lcd_oe", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_PCLK, "lcd_pclk", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_R_0, "lcd_r_0", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_R_1, "lcd_r_1", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_R_2, "lcd_r_2", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_R_3, "lcd_r_3", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_R_4, "lcd_r_4", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_R_5, "lcd_r_5", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_R_6, "lcd_r_6", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_R_7, "lcd_r_7", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_LCD_VSYNC, "lcd_vsync", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_MDMGPIO0, "mdmgpio0", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_MDMGPIO1, "mdmgpio1", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_MDMGPIO2, "mdmgpio2", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_MDMGPIO3, "mdmgpio3", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_MDMGPIO4, "mdmgpio4", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_MDMGPIO5, "mdmgpio5", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_MDMGPIO6, "mdmgpio6", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_MDMGPIO7, "mdmgpio7", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_MDMGPIO8, "mdmgpio8", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_0, "mphi_data_0", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_1, "mphi_data_1", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_2, "mphi_data_2", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_3, "mphi_data_3", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_4, "mphi_data_4", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_5, "mphi_data_5", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_6, "mphi_data_6", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_7, "mphi_data_7", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_8, "mphi_data_8", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_9, "mphi_data_9", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_10, "mphi_data_10", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_11, "mphi_data_11", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_12, "mphi_data_12", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_13, "mphi_data_13", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_14, "mphi_data_14", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_DATA_15, "mphi_data_15", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_HA0, "mphi_ha0", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_HAT0, "mphi_hat0", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_HAT1, "mphi_hat1", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_HCE0_N, "mphi_hce0_n", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_HCE1_N, "mphi_hce1_n", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_HRD_N, "mphi_hrd_n", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_HWR_N, "mphi_hwr_n", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_RUN0, "mphi_run0", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_MPHI_RUN1, "mphi_run1", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_MTX_SCAN_CLK, "mtx_scan_clk", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_MTX_SCAN_DATA, "mtx_scan_data", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_AD_0, "nand_ad_0", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_AD_1, "nand_ad_1", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_AD_2, "nand_ad_2", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_AD_3, "nand_ad_3", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_AD_4, "nand_ad_4", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_AD_5, "nand_ad_5", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_AD_6, "nand_ad_6", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_AD_7, "nand_ad_7", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_ALE, "nand_ale", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_CEN_0, "nand_cen_0", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_CEN_1, "nand_cen_1", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_CLE, "nand_cle", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_OEN, "nand_oen", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_RDY_0, "nand_rdy_0", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_RDY_1, "nand_rdy_1", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_WEN, "nand_wen", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_NAND_WP, "nand_wp", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_PC1, "pc1", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_PC2, "pc2", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_PMU_INT, "pmu_int", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_PMU_SCL, "pmu_scl", i2c),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_PMU_SDA, "pmu_sda", i2c),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_RFST2G_MTSLOTEN3G, "rfst2g_mtsloten3g",
+               std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_RX_CTL, "rgmii_0_rx_ctl", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_RXC, "rgmii_0_rxc", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_RXD_0, "rgmii_0_rxd_0", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_RXD_1, "rgmii_0_rxd_1", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_RXD_2, "rgmii_0_rxd_2", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_RXD_3, "rgmii_0_rxd_3", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_TX_CTL, "rgmii_0_tx_ctl", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_TXC, "rgmii_0_txc", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_TXD_0, "rgmii_0_txd_0", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_TXD_1, "rgmii_0_txd_1", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_TXD_2, "rgmii_0_txd_2", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_0_TXD_3, "rgmii_0_txd_3", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_RX_CTL, "rgmii_1_rx_ctl", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_RXC, "rgmii_1_rxc", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_RXD_0, "rgmii_1_rxd_0", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_RXD_1, "rgmii_1_rxd_1", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_RXD_2, "rgmii_1_rxd_2", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_RXD_3, "rgmii_1_rxd_3", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_TX_CTL, "rgmii_1_tx_ctl", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_TXC, "rgmii_1_txc", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_TXD_0, "rgmii_1_txd_0", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_TXD_1, "rgmii_1_txd_1", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_TXD_2, "rgmii_1_txd_2", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_1_TXD_3, "rgmii_1_txd_3", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_GPIO_0, "rgmii_gpio_0", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_GPIO_1, "rgmii_gpio_1", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_GPIO_2, "rgmii_gpio_2", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_RGMII_GPIO_3, "rgmii_gpio_3", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_RTXDATA2G_TXDATA3G1,
+               "rtxdata2g_txdata3g1", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_RTXEN2G_TXDATA3G2, "rtxen2g_txdata3g2",
+               std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_RXDATA3G0, "rxdata3g0", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_RXDATA3G1, "rxdata3g1", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_RXDATA3G2, "rxdata3g2", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO1_CLK, "sdio1_clk", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO1_CMD, "sdio1_cmd", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO1_DATA_0, "sdio1_data_0", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO1_DATA_1, "sdio1_data_1", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO1_DATA_2, "sdio1_data_2", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO1_DATA_3, "sdio1_data_3", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO4_CLK, "sdio4_clk", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO4_CMD, "sdio4_cmd", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO4_DATA_0, "sdio4_data_0", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO4_DATA_1, "sdio4_data_1", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO4_DATA_2, "sdio4_data_2", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SDIO4_DATA_3, "sdio4_data_3", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SIM_CLK, "sim_clk", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SIM_DATA, "sim_data", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SIM_DET, "sim_det", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SIM_RESETN, "sim_resetn", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SIM2_CLK, "sim2_clk", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SIM2_DATA, "sim2_data", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SIM2_DET, "sim2_det", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SIM2_RESETN, "sim2_resetn", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SRI_C, "sri_c", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SRI_D, "sri_d", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SRI_E, "sri_e", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SSP_EXTCLK, "ssp_extclk", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SSP0_CLK, "ssp0_clk", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SSP0_FS, "ssp0_fs", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SSP0_RXD, "ssp0_rxd", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SSP0_TXD, "ssp0_txd", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SSP2_CLK, "ssp2_clk", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SSP2_FS_0, "ssp2_fs_0", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SSP2_FS_1, "ssp2_fs_1", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SSP2_FS_2, "ssp2_fs_2", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SSP2_FS_3, "ssp2_fs_3", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SSP2_RXD_0, "ssp2_rxd_0", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SSP2_RXD_1, "ssp2_rxd_1", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SSP2_TXD_0, "ssp2_txd_0", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SSP2_TXD_1, "ssp2_txd_1", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SSP3_CLK, "ssp3_clk", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SSP3_FS, "ssp3_fs", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SSP3_RXD, "ssp3_rxd", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SSP3_TXD, "ssp3_txd", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SSP4_CLK, "ssp4_clk", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SSP4_FS, "ssp4_fs", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SSP4_RXD, "ssp4_rxd", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SSP4_TXD, "ssp4_txd", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SSP5_CLK, "ssp5_clk", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SSP5_FS, "ssp5_fs", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SSP5_RXD, "ssp5_rxd", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SSP5_TXD, "ssp5_txd", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SSP6_CLK, "ssp6_clk", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SSP6_FS, "ssp6_fs", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SSP6_RXD, "ssp6_rxd", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SSP6_TXD, "ssp6_txd", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_STAT_1, "stat_1", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_STAT_2, "stat_2", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_SYSCLKEN, "sysclken", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_TRACECLK, "traceclk", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT00, "tracedt00", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT01, "tracedt01", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT02, "tracedt02", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT03, "tracedt03", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT04, "tracedt04", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT05, "tracedt05", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT06, "tracedt06", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT07, "tracedt07", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT08, "tracedt08", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT09, "tracedt09", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT10, "tracedt10", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT11, "tracedt11", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT12, "tracedt12", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT13, "tracedt13", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT14, "tracedt14", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_TRACEDT15, "tracedt15", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_TXDATA3G0, "txdata3g0", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_TXPWRIND, "txpwrind", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB1_UCTS, "uartb1_ucts", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB1_URTS, "uartb1_urts", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB1_URXD, "uartb1_urxd", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB1_UTXD, "uartb1_utxd", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB2_URXD, "uartb2_urxd", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB2_UTXD, "uartb2_utxd", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB3_UCTS, "uartb3_ucts", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB3_URTS, "uartb3_urts", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB3_URXD, "uartb3_urxd", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB3_UTXD, "uartb3_utxd", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB4_UCTS, "uartb4_ucts", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB4_URTS, "uartb4_urts", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB4_URXD, "uartb4_urxd", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_UARTB4_UTXD, "uartb4_utxd", std),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_VC_CAM1_SCL, "vc_cam1_scl", i2c),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_VC_CAM1_SDA, "vc_cam1_sda", i2c),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_VC_CAM2_SCL, "vc_cam2_scl", i2c),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_VC_CAM2_SDA, "vc_cam2_sda", i2c),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_VC_CAM3_SCL, "vc_cam3_scl", i2c),
+       BCM281XX_PIN_DESC(BCM281XX_PIN_VC_CAM3_SDA, "vc_cam3_sda", i2c),
+};
+
+static const char * const bcm281xx_alt_groups[] = {
+       "adcsync",
+       "bat_rm",
+       "bsc1_scl",
+       "bsc1_sda",
+       "bsc2_scl",
+       "bsc2_sda",
+       "classgpwr",
+       "clk_cx8",
+       "clkout_0",
+       "clkout_1",
+       "clkout_2",
+       "clkout_3",
+       "clkreq_in_0",
+       "clkreq_in_1",
+       "cws_sys_req1",
+       "cws_sys_req2",
+       "cws_sys_req3",
+       "digmic1_clk",
+       "digmic1_dq",
+       "digmic2_clk",
+       "digmic2_dq",
+       "gpen13",
+       "gpen14",
+       "gpen15",
+       "gpio00",
+       "gpio01",
+       "gpio02",
+       "gpio03",
+       "gpio04",
+       "gpio05",
+       "gpio06",
+       "gpio07",
+       "gpio08",
+       "gpio09",
+       "gpio10",
+       "gpio11",
+       "gpio12",
+       "gpio13",
+       "gpio14",
+       "gps_pablank",
+       "gps_tmark",
+       "hdmi_scl",
+       "hdmi_sda",
+       "ic_dm",
+       "ic_dp",
+       "kp_col_ip_0",
+       "kp_col_ip_1",
+       "kp_col_ip_2",
+       "kp_col_ip_3",
+       "kp_row_op_0",
+       "kp_row_op_1",
+       "kp_row_op_2",
+       "kp_row_op_3",
+       "lcd_b_0",
+       "lcd_b_1",
+       "lcd_b_2",
+       "lcd_b_3",
+       "lcd_b_4",
+       "lcd_b_5",
+       "lcd_b_6",
+       "lcd_b_7",
+       "lcd_g_0",
+       "lcd_g_1",
+       "lcd_g_2",
+       "lcd_g_3",
+       "lcd_g_4",
+       "lcd_g_5",
+       "lcd_g_6",
+       "lcd_g_7",
+       "lcd_hsync",
+       "lcd_oe",
+       "lcd_pclk",
+       "lcd_r_0",
+       "lcd_r_1",
+       "lcd_r_2",
+       "lcd_r_3",
+       "lcd_r_4",
+       "lcd_r_5",
+       "lcd_r_6",
+       "lcd_r_7",
+       "lcd_vsync",
+       "mdmgpio0",
+       "mdmgpio1",
+       "mdmgpio2",
+       "mdmgpio3",
+       "mdmgpio4",
+       "mdmgpio5",
+       "mdmgpio6",
+       "mdmgpio7",
+       "mdmgpio8",
+       "mphi_data_0",
+       "mphi_data_1",
+       "mphi_data_2",
+       "mphi_data_3",
+       "mphi_data_4",
+       "mphi_data_5",
+       "mphi_data_6",
+       "mphi_data_7",
+       "mphi_data_8",
+       "mphi_data_9",
+       "mphi_data_10",
+       "mphi_data_11",
+       "mphi_data_12",
+       "mphi_data_13",
+       "mphi_data_14",
+       "mphi_data_15",
+       "mphi_ha0",
+       "mphi_hat0",
+       "mphi_hat1",
+       "mphi_hce0_n",
+       "mphi_hce1_n",
+       "mphi_hrd_n",
+       "mphi_hwr_n",
+       "mphi_run0",
+       "mphi_run1",
+       "mtx_scan_clk",
+       "mtx_scan_data",
+       "nand_ad_0",
+       "nand_ad_1",
+       "nand_ad_2",
+       "nand_ad_3",
+       "nand_ad_4",
+       "nand_ad_5",
+       "nand_ad_6",
+       "nand_ad_7",
+       "nand_ale",
+       "nand_cen_0",
+       "nand_cen_1",
+       "nand_cle",
+       "nand_oen",
+       "nand_rdy_0",
+       "nand_rdy_1",
+       "nand_wen",
+       "nand_wp",
+       "pc1",
+       "pc2",
+       "pmu_int",
+       "pmu_scl",
+       "pmu_sda",
+       "rfst2g_mtsloten3g",
+       "rgmii_0_rx_ctl",
+       "rgmii_0_rxc",
+       "rgmii_0_rxd_0",
+       "rgmii_0_rxd_1",
+       "rgmii_0_rxd_2",
+       "rgmii_0_rxd_3",
+       "rgmii_0_tx_ctl",
+       "rgmii_0_txc",
+       "rgmii_0_txd_0",
+       "rgmii_0_txd_1",
+       "rgmii_0_txd_2",
+       "rgmii_0_txd_3",
+       "rgmii_1_rx_ctl",
+       "rgmii_1_rxc",
+       "rgmii_1_rxd_0",
+       "rgmii_1_rxd_1",
+       "rgmii_1_rxd_2",
+       "rgmii_1_rxd_3",
+       "rgmii_1_tx_ctl",
+       "rgmii_1_txc",
+       "rgmii_1_txd_0",
+       "rgmii_1_txd_1",
+       "rgmii_1_txd_2",
+       "rgmii_1_txd_3",
+       "rgmii_gpio_0",
+       "rgmii_gpio_1",
+       "rgmii_gpio_2",
+       "rgmii_gpio_3",
+       "rtxdata2g_txdata3g1",
+       "rtxen2g_txdata3g2",
+       "rxdata3g0",
+       "rxdata3g1",
+       "rxdata3g2",
+       "sdio1_clk",
+       "sdio1_cmd",
+       "sdio1_data_0",
+       "sdio1_data_1",
+       "sdio1_data_2",
+       "sdio1_data_3",
+       "sdio4_clk",
+       "sdio4_cmd",
+       "sdio4_data_0",
+       "sdio4_data_1",
+       "sdio4_data_2",
+       "sdio4_data_3",
+       "sim_clk",
+       "sim_data",
+       "sim_det",
+       "sim_resetn",
+       "sim2_clk",
+       "sim2_data",
+       "sim2_det",
+       "sim2_resetn",
+       "sri_c",
+       "sri_d",
+       "sri_e",
+       "ssp_extclk",
+       "ssp0_clk",
+       "ssp0_fs",
+       "ssp0_rxd",
+       "ssp0_txd",
+       "ssp2_clk",
+       "ssp2_fs_0",
+       "ssp2_fs_1",
+       "ssp2_fs_2",
+       "ssp2_fs_3",
+       "ssp2_rxd_0",
+       "ssp2_rxd_1",
+       "ssp2_txd_0",
+       "ssp2_txd_1",
+       "ssp3_clk",
+       "ssp3_fs",
+       "ssp3_rxd",
+       "ssp3_txd",
+       "ssp4_clk",
+       "ssp4_fs",
+       "ssp4_rxd",
+       "ssp4_txd",
+       "ssp5_clk",
+       "ssp5_fs",
+       "ssp5_rxd",
+       "ssp5_txd",
+       "ssp6_clk",
+       "ssp6_fs",
+       "ssp6_rxd",
+       "ssp6_txd",
+       "stat_1",
+       "stat_2",
+       "sysclken",
+       "traceclk",
+       "tracedt00",
+       "tracedt01",
+       "tracedt02",
+       "tracedt03",
+       "tracedt04",
+       "tracedt05",
+       "tracedt06",
+       "tracedt07",
+       "tracedt08",
+       "tracedt09",
+       "tracedt10",
+       "tracedt11",
+       "tracedt12",
+       "tracedt13",
+       "tracedt14",
+       "tracedt15",
+       "txdata3g0",
+       "txpwrind",
+       "uartb1_ucts",
+       "uartb1_urts",
+       "uartb1_urxd",
+       "uartb1_utxd",
+       "uartb2_urxd",
+       "uartb2_utxd",
+       "uartb3_ucts",
+       "uartb3_urts",
+       "uartb3_urxd",
+       "uartb3_utxd",
+       "uartb4_ucts",
+       "uartb4_urts",
+       "uartb4_urxd",
+       "uartb4_utxd",
+       "vc_cam1_scl",
+       "vc_cam1_sda",
+       "vc_cam2_scl",
+       "vc_cam2_sda",
+       "vc_cam3_scl",
+       "vc_cam3_sda",
+};
+
+/* Every pin can implement all ALT1-ALT4 functions */
+#define BCM281XX_PIN_FUNCTION(fcn_name)                        \
+{                                                      \
+       .name = #fcn_name,                              \
+       .groups = bcm281xx_alt_groups,                  \
+       .ngroups = ARRAY_SIZE(bcm281xx_alt_groups),     \
+}
+
+static const struct bcm281xx_pin_function bcm281xx_functions[] = {
+       BCM281XX_PIN_FUNCTION(alt1),
+       BCM281XX_PIN_FUNCTION(alt2),
+       BCM281XX_PIN_FUNCTION(alt3),
+       BCM281XX_PIN_FUNCTION(alt4),
+};
+
+static struct bcm281xx_pinctrl_data bcm281xx_pinctrl = {
+       .pins = bcm281xx_pinctrl_pins,
+       .npins = ARRAY_SIZE(bcm281xx_pinctrl_pins),
+       .functions = bcm281xx_functions,
+       .nfunctions = ARRAY_SIZE(bcm281xx_functions),
+};
+
+static inline enum bcm281xx_pin_type pin_type_get(struct pinctrl_dev *pctldev,
+                                                 unsigned pin)
+{
+       struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
+
+       if (pin >= pdata->npins)
+               return BCM281XX_PIN_TYPE_UNKNOWN;
+
+       return *(enum bcm281xx_pin_type *)(pdata->pins[pin].drv_data);
+}
+
+#define BCM281XX_PIN_SHIFT(type, param) \
+       (BCM281XX_ ## type ## _PIN_REG_ ## param ## _SHIFT)
+
+#define BCM281XX_PIN_MASK(type, param) \
+       (BCM281XX_ ## type ## _PIN_REG_ ## param ## _MASK)
+
+/*
+ * This helper function is used to build up the value and mask used to write to
+ * a pin register, but does not actually write to the register.
+ */
+static inline void bcm281xx_pin_update(u32 *reg_val, u32 *reg_mask,
+                                      u32 param_val, u32 param_shift,
+                                      u32 param_mask)
+{
+       *reg_val &= ~param_mask;
+       *reg_val |= (param_val << param_shift) & param_mask;
+       *reg_mask |= param_mask;
+}
+
+static struct regmap_config bcm281xx_pinctrl_regmap_config = {
+       .reg_bits = 32,
+       .reg_stride = 4,
+       .val_bits = 32,
+       .max_register = BCM281XX_PIN_VC_CAM3_SDA,
+};
+
+static int bcm281xx_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
+{
+       struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
+
+       return pdata->npins;
+}
+
+static const char *bcm281xx_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
+                                                  unsigned group)
+{
+       struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
+
+       return pdata->pins[group].name;
+}
+
+static int bcm281xx_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
+                                          unsigned group,
+                                          const unsigned **pins,
+                                          unsigned *num_pins)
+{
+       struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
+
+       *pins = &pdata->pins[group].number;
+       *num_pins = 1;
+
+       return 0;
+}
+
+static void bcm281xx_pinctrl_pin_dbg_show(struct pinctrl_dev *pctldev,
+                                         struct seq_file *s,
+                                         unsigned offset)
+{
+       seq_printf(s, " %s", dev_name(pctldev->dev));
+}
+
+static struct pinctrl_ops bcm281xx_pinctrl_ops = {
+       .get_groups_count = bcm281xx_pinctrl_get_groups_count,
+       .get_group_name = bcm281xx_pinctrl_get_group_name,
+       .get_group_pins = bcm281xx_pinctrl_get_group_pins,
+       .pin_dbg_show = bcm281xx_pinctrl_pin_dbg_show,
+       .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
+       .dt_free_map = pinctrl_utils_dt_free_map,
+};
+
+static int bcm281xx_pinctrl_get_fcns_count(struct pinctrl_dev *pctldev)
+{
+       struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
+
+       return pdata->nfunctions;
+}
+
+static const char *bcm281xx_pinctrl_get_fcn_name(struct pinctrl_dev *pctldev,
+                                                unsigned function)
+{
+       struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
+
+       return pdata->functions[function].name;
+}
+
+static int bcm281xx_pinctrl_get_fcn_groups(struct pinctrl_dev *pctldev,
+                                          unsigned function,
+                                          const char * const **groups,
+                                          unsigned * const num_groups)
+{
+       struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
+
+       *groups = pdata->functions[function].groups;
+       *num_groups = pdata->functions[function].ngroups;
+
+       return 0;
+}
+
+static int bcm281xx_pinmux_enable(struct pinctrl_dev *pctldev,
+                                 unsigned function,
+                                 unsigned group)
+{
+       struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
+       const struct bcm281xx_pin_function *f = &pdata->functions[function];
+       u32 offset = 4 * pdata->pins[group].number;
+       int rc = 0;
+
+       dev_dbg(pctldev->dev,
+               "%s(): Enable function %s (%d) of pin %s (%d) @offset 0x%x.\n",
+               __func__, f->name, function, pdata->pins[group].name,
+               pdata->pins[group].number, offset);
+
+       rc = regmap_update_bits(pdata->regmap, offset,
+               BCM281XX_PIN_REG_F_SEL_MASK,
+               function << BCM281XX_PIN_REG_F_SEL_SHIFT);
+       if (rc)
+               dev_err(pctldev->dev,
+                       "Error updating register for pin %s (%d).\n",
+                       pdata->pins[group].name, pdata->pins[group].number);
+
+       return rc;
+}
+
+static struct pinmux_ops bcm281xx_pinctrl_pinmux_ops = {
+       .get_functions_count = bcm281xx_pinctrl_get_fcns_count,
+       .get_function_name = bcm281xx_pinctrl_get_fcn_name,
+       .get_function_groups = bcm281xx_pinctrl_get_fcn_groups,
+       .enable = bcm281xx_pinmux_enable,
+};
+
+static int bcm281xx_pinctrl_pin_config_get(struct pinctrl_dev *pctldev,
+                                          unsigned pin,
+                                          unsigned long *config)
+{
+       return -ENOTSUPP;
+}
+
+
+/* Goes through the configs and update register val/mask */
+static int bcm281xx_std_pin_update(struct pinctrl_dev *pctldev,
+                                  unsigned pin,
+                                  unsigned long *configs,
+                                  unsigned num_configs,
+                                  u32 *val,
+                                  u32 *mask)
+{
+       struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
+       int i;
+       enum pin_config_param param;
+       u16 arg;
+
+       for (i = 0; i < num_configs; i++) {
+               param = pinconf_to_config_param(configs[i]);
+               arg = pinconf_to_config_argument(configs[i]);
+
+               switch (param) {
+               case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
+                       arg = (arg >= 1 ? 1 : 0);
+                       bcm281xx_pin_update(val, mask, arg,
+                               BCM281XX_PIN_SHIFT(STD, HYST),
+                               BCM281XX_PIN_MASK(STD, HYST));
+                       break;
+               /*
+                * The pin bias can only be one of pull-up, pull-down, or
+                * disable.  The user does not need to specify a value for the
+                * property, and the default value from pinconf-generic is
+                * ignored.
+                */
+               case PIN_CONFIG_BIAS_DISABLE:
+                       bcm281xx_pin_update(val, mask, 0,
+                               BCM281XX_PIN_SHIFT(STD, PULL_UP),
+                               BCM281XX_PIN_MASK(STD, PULL_UP));
+                       bcm281xx_pin_update(val, mask, 0,
+                               BCM281XX_PIN_SHIFT(STD, PULL_DN),
+                               BCM281XX_PIN_MASK(STD, PULL_DN));
+                       break;
+
+               case PIN_CONFIG_BIAS_PULL_UP:
+                       bcm281xx_pin_update(val, mask, 1,
+                               BCM281XX_PIN_SHIFT(STD, PULL_UP),
+                               BCM281XX_PIN_MASK(STD, PULL_UP));
+                       bcm281xx_pin_update(val, mask, 0,
+                               BCM281XX_PIN_SHIFT(STD, PULL_DN),
+                               BCM281XX_PIN_MASK(STD, PULL_DN));
+                       break;
+
+               case PIN_CONFIG_BIAS_PULL_DOWN:
+                       bcm281xx_pin_update(val, mask, 0,
+                               BCM281XX_PIN_SHIFT(STD, PULL_UP),
+                               BCM281XX_PIN_MASK(STD, PULL_UP));
+                       bcm281xx_pin_update(val, mask, 1,
+                               BCM281XX_PIN_SHIFT(STD, PULL_DN),
+                               BCM281XX_PIN_MASK(STD, PULL_DN));
+                       break;
+
+               case PIN_CONFIG_SLEW_RATE:
+                       arg = (arg >= 1 ? 1 : 0);
+                       bcm281xx_pin_update(val, mask, arg,
+                               BCM281XX_PIN_SHIFT(STD, SLEW),
+                               BCM281XX_PIN_MASK(STD, SLEW));
+                       break;
+
+               case PIN_CONFIG_INPUT_ENABLE:
+                       /* inversed since register is for input _disable_ */
+                       arg = (arg >= 1 ? 0 : 1);
+                       bcm281xx_pin_update(val, mask, arg,
+                               BCM281XX_PIN_SHIFT(STD, INPUT_DIS),
+                               BCM281XX_PIN_MASK(STD, INPUT_DIS));
+                       break;
+
+               case PIN_CONFIG_DRIVE_STRENGTH:
+                       /* Valid range is 2-16 mA, even numbers only */
+                       if ((arg < 2) || (arg > 16) || (arg % 2)) {
+                               dev_err(pctldev->dev,
+                                       "Invalid Drive Strength value (%d) for "
+                                       "pin %s (%d). Valid values are "
+                                       "(2..16) mA, even numbers only.\n",
+                                       arg, pdata->pins[pin].name, pin);
+                               return -EINVAL;
+                       }
+                       bcm281xx_pin_update(val, mask, (arg/2)-1,
+                               BCM281XX_PIN_SHIFT(STD, DRV_STR),
+                               BCM281XX_PIN_MASK(STD, DRV_STR));
+                       break;
+
+               default:
+                       dev_err(pctldev->dev,
+                               "Unrecognized pin config %d for pin %s (%d).\n",
+                               param, pdata->pins[pin].name, pin);
+                       return -EINVAL;
+
+               } /* switch config */
+       } /* for each config */
+
+       return 0;
+}
+
+/*
+ * The pull-up strength for an I2C pin is represented by bits 4-6 in the
+ * register with the following mapping:
+ *   0b000: No pull-up
+ *   0b001: 1200 Ohm
+ *   0b010: 1800 Ohm
+ *   0b011: 720 Ohm
+ *   0b100: 2700 Ohm
+ *   0b101: 831 Ohm
+ *   0b110: 1080 Ohm
+ *   0b111: 568 Ohm
+ * This array maps pull-up strength in Ohms to register values (1+index).
+ */
+static const u16 bcm281xx_pullup_map[] = {
+       1200, 1800, 720, 2700, 831, 1080, 568
+};
+
+/* Goes through the configs and update register val/mask */
+static int bcm281xx_i2c_pin_update(struct pinctrl_dev *pctldev,
+                                  unsigned pin,
+                                  unsigned long *configs,
+                                  unsigned num_configs,
+                                  u32 *val,
+                                  u32 *mask)
+{
+       struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
+       int i, j;
+       enum pin_config_param param;
+       u16 arg;
+
+       for (i = 0; i < num_configs; i++) {
+               param = pinconf_to_config_param(configs[i]);
+               arg = pinconf_to_config_argument(configs[i]);
+
+               switch (param) {
+               case PIN_CONFIG_BIAS_PULL_UP:
+                       for (j = 0; j < ARRAY_SIZE(bcm281xx_pullup_map); j++)
+                               if (bcm281xx_pullup_map[j] == arg)
+                                       break;
+
+                       if (j == ARRAY_SIZE(bcm281xx_pullup_map)) {
+                               dev_err(pctldev->dev,
+                                       "Invalid pull-up value (%d) for pin %s "
+                                       "(%d). Valid values are 568, 720, 831, "
+                                       "1080, 1200, 1800, 2700 Ohms.\n",
+                                       arg, pdata->pins[pin].name, pin);
+                               return -EINVAL;
+                       }
+
+                       bcm281xx_pin_update(val, mask, j+1,
+                               BCM281XX_PIN_SHIFT(I2C, PULL_UP_STR),
+                               BCM281XX_PIN_MASK(I2C, PULL_UP_STR));
+                       break;
+
+               case PIN_CONFIG_BIAS_DISABLE:
+                       bcm281xx_pin_update(val, mask, 0,
+                               BCM281XX_PIN_SHIFT(I2C, PULL_UP_STR),
+                               BCM281XX_PIN_MASK(I2C, PULL_UP_STR));
+                       break;
+
+               case PIN_CONFIG_SLEW_RATE:
+                       arg = (arg >= 1 ? 1 : 0);
+                       bcm281xx_pin_update(val, mask, arg,
+                               BCM281XX_PIN_SHIFT(I2C, SLEW),
+                               BCM281XX_PIN_MASK(I2C, SLEW));
+                       break;
+
+               case PIN_CONFIG_INPUT_ENABLE:
+                       /* inversed since register is for input _disable_ */
+                       arg = (arg >= 1 ? 0 : 1);
+                       bcm281xx_pin_update(val, mask, arg,
+                               BCM281XX_PIN_SHIFT(I2C, INPUT_DIS),
+                               BCM281XX_PIN_MASK(I2C, INPUT_DIS));
+                       break;
+
+               default:
+                       dev_err(pctldev->dev,
+                               "Unrecognized pin config %d for pin %s (%d).\n",
+                               param, pdata->pins[pin].name, pin);
+                       return -EINVAL;
+
+               } /* switch config */
+       } /* for each config */
+
+       return 0;
+}
+
+/* Goes through the configs and update register val/mask */
+static int bcm281xx_hdmi_pin_update(struct pinctrl_dev *pctldev,
+                                   unsigned pin,
+                                   unsigned long *configs,
+                                   unsigned num_configs,
+                                   u32 *val,
+                                   u32 *mask)
+{
+       struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
+       int i;
+       enum pin_config_param param;
+       u16 arg;
+
+       for (i = 0; i < num_configs; i++) {
+               param = pinconf_to_config_param(configs[i]);
+               arg = pinconf_to_config_argument(configs[i]);
+
+               switch (param) {
+               case PIN_CONFIG_SLEW_RATE:
+                       arg = (arg >= 1 ? 1 : 0);
+                       bcm281xx_pin_update(val, mask, arg,
+                               BCM281XX_PIN_SHIFT(HDMI, MODE),
+                               BCM281XX_PIN_MASK(HDMI, MODE));
+                       break;
+
+               case PIN_CONFIG_INPUT_ENABLE:
+                       /* inversed since register is for input _disable_ */
+                       arg = (arg >= 1 ? 0 : 1);
+                       bcm281xx_pin_update(val, mask, arg,
+                               BCM281XX_PIN_SHIFT(HDMI, INPUT_DIS),
+                               BCM281XX_PIN_MASK(HDMI, INPUT_DIS));
+                       break;
+
+               default:
+                       dev_err(pctldev->dev,
+                               "Unrecognized pin config %d for pin %s (%d).\n",
+                               param, pdata->pins[pin].name, pin);
+                       return -EINVAL;
+
+               } /* switch config */
+       } /* for each config */
+
+       return 0;
+}
+
+static int bcm281xx_pinctrl_pin_config_set(struct pinctrl_dev *pctldev,
+                                          unsigned pin,
+                                          unsigned long *configs,
+                                          unsigned num_configs)
+{
+       struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
+       enum bcm281xx_pin_type pin_type;
+       u32 offset = 4 * pin;
+       u32 cfg_val, cfg_mask;
+       int rc;
+
+       cfg_val = 0;
+       cfg_mask = 0;
+       pin_type = pin_type_get(pctldev, pin);
+
+       /* Different pins have different configuration options */
+       switch (pin_type) {
+       case BCM281XX_PIN_TYPE_STD:
+               rc = bcm281xx_std_pin_update(pctldev, pin, configs,
+                       num_configs, &cfg_val, &cfg_mask);
+               break;
+
+       case BCM281XX_PIN_TYPE_I2C:
+               rc = bcm281xx_i2c_pin_update(pctldev, pin, configs,
+                       num_configs, &cfg_val, &cfg_mask);
+               break;
+
+       case BCM281XX_PIN_TYPE_HDMI:
+               rc = bcm281xx_hdmi_pin_update(pctldev, pin, configs,
+                       num_configs, &cfg_val, &cfg_mask);
+               break;
+
+       default:
+               dev_err(pctldev->dev, "Unknown pin type for pin %s (%d).\n",
+                       pdata->pins[pin].name, pin);
+               return -EINVAL;
+
+       } /* switch pin type */
+
+       if (rc)
+               return rc;
+
+       dev_dbg(pctldev->dev,
+               "%s(): Set pin %s (%d) with config 0x%x, mask 0x%x\n",
+               __func__, pdata->pins[pin].name, pin, cfg_val, cfg_mask);
+
+       rc = regmap_update_bits(pdata->regmap, offset, cfg_mask, cfg_val);
+       if (rc) {
+               dev_err(pctldev->dev,
+                       "Error updating register for pin %s (%d).\n",
+                       pdata->pins[pin].name, pin);
+               return rc;
+       }
+
+       return 0;
+}
+
+static struct pinconf_ops bcm281xx_pinctrl_pinconf_ops = {
+       .pin_config_get = bcm281xx_pinctrl_pin_config_get,
+       .pin_config_set = bcm281xx_pinctrl_pin_config_set,
+};
+
+static struct pinctrl_desc bcm281xx_pinctrl_desc = {
+       /* name, pins, npins members initialized in probe function */
+       .pctlops = &bcm281xx_pinctrl_ops,
+       .pmxops = &bcm281xx_pinctrl_pinmux_ops,
+       .confops = &bcm281xx_pinctrl_pinconf_ops,
+       .owner = THIS_MODULE,
+};
+
+int __init bcm281xx_pinctrl_probe(struct platform_device *pdev)
+{
+       struct bcm281xx_pinctrl_data *pdata = &bcm281xx_pinctrl;
+       struct resource *res;
+       struct pinctrl_dev *pctl;
+
+       /* So far We can assume there is only 1 bank of registers */
+       res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+       if (!res) {
+               dev_err(&pdev->dev, "Missing MEM resource\n");
+               return -ENODEV;
+       }
+
+       pdata->reg_base = devm_ioremap_resource(&pdev->dev, res);
+       if (IS_ERR(pdata->reg_base)) {
+               dev_err(&pdev->dev, "Failed to ioremap MEM resource\n");
+               return -ENODEV;
+       }
+
+       /* Initialize the dynamic part of pinctrl_desc */
+       pdata->regmap = devm_regmap_init_mmio(&pdev->dev, pdata->reg_base,
+               &bcm281xx_pinctrl_regmap_config);
+       if (IS_ERR(pdata->regmap)) {
+               dev_err(&pdev->dev, "Regmap MMIO init failed.\n");
+               return -ENODEV;
+       }
+
+       bcm281xx_pinctrl_desc.name = dev_name(&pdev->dev);
+       bcm281xx_pinctrl_desc.pins = bcm281xx_pinctrl.pins;
+       bcm281xx_pinctrl_desc.npins = bcm281xx_pinctrl.npins;
+
+       pctl = pinctrl_register(&bcm281xx_pinctrl_desc,
+                               &pdev->dev,
+                               pdata);
+       if (!pctl) {
+               dev_err(&pdev->dev, "Failed to register pinctrl\n");
+               return -ENODEV;
+       }
+
+       platform_set_drvdata(pdev, pdata);
+
+       return 0;
+}
+
+static struct of_device_id bcm281xx_pinctrl_of_match[] = {
+       { .compatible = "brcm,bcm11351-pinctrl", },
+       { },
+};
+
+static struct platform_driver bcm281xx_pinctrl_driver = {
+       .driver = {
+               .name = "bcm281xx-pinctrl",
+               .owner = THIS_MODULE,
+               .of_match_table = bcm281xx_pinctrl_of_match,
+       },
+};
+
+module_platform_driver_probe(bcm281xx_pinctrl_driver, bcm281xx_pinctrl_probe);
+
+MODULE_AUTHOR("Broadcom Corporation <bcm-kernel-feedback-list@broadcom.com>");
+MODULE_AUTHOR("Sherman Yin <syin@broadcom.com>");
+MODULE_DESCRIPTION("Broadcom BCM281xx pinctrl driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/pinctrl/pinctrl-capri.c b/drivers/pinctrl/pinctrl-capri.c
deleted file mode 100644 (file)
index eb25002..0000000
+++ /dev/null
@@ -1,1454 +0,0 @@
-/*
- * Copyright (C) 2013 Broadcom Corporation
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation version 2.
- *
- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
- * kind, whether express or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-#include <linux/err.h>
-#include <linux/io.h>
-#include <linux/module.h>
-#include <linux/of.h>
-#include <linux/platform_device.h>
-#include <linux/pinctrl/pinctrl.h>
-#include <linux/pinctrl/pinmux.h>
-#include <linux/pinctrl/pinconf.h>
-#include <linux/pinctrl/pinconf-generic.h>
-#include <linux/regmap.h>
-#include <linux/slab.h>
-#include "core.h"
-#include "pinctrl-utils.h"
-
-/* Capri Pin Control Registers Definitions */
-
-/* Function Select bits are the same for all pin control registers */
-#define CAPRI_PIN_REG_F_SEL_MASK               0x0700
-#define CAPRI_PIN_REG_F_SEL_SHIFT              8
-
-/* Standard pin register */
-#define CAPRI_STD_PIN_REG_DRV_STR_MASK         0x0007
-#define CAPRI_STD_PIN_REG_DRV_STR_SHIFT                0
-#define CAPRI_STD_PIN_REG_INPUT_DIS_MASK       0x0008
-#define CAPRI_STD_PIN_REG_INPUT_DIS_SHIFT      3
-#define CAPRI_STD_PIN_REG_SLEW_MASK            0x0010
-#define CAPRI_STD_PIN_REG_SLEW_SHIFT           4
-#define CAPRI_STD_PIN_REG_PULL_UP_MASK         0x0020
-#define CAPRI_STD_PIN_REG_PULL_UP_SHIFT                5
-#define CAPRI_STD_PIN_REG_PULL_DN_MASK         0x0040
-#define CAPRI_STD_PIN_REG_PULL_DN_SHIFT                6
-#define CAPRI_STD_PIN_REG_HYST_MASK            0x0080
-#define CAPRI_STD_PIN_REG_HYST_SHIFT           7
-
-/* I2C pin register */
-#define CAPRI_I2C_PIN_REG_INPUT_DIS_MASK       0x0004
-#define CAPRI_I2C_PIN_REG_INPUT_DIS_SHIFT      2
-#define CAPRI_I2C_PIN_REG_SLEW_MASK            0x0008
-#define CAPRI_I2C_PIN_REG_SLEW_SHIFT           3
-#define CAPRI_I2C_PIN_REG_PULL_UP_STR_MASK     0x0070
-#define CAPRI_I2C_PIN_REG_PULL_UP_STR_SHIFT    4
-
-/* HDMI pin register */
-#define CAPRI_HDMI_PIN_REG_INPUT_DIS_MASK      0x0008
-#define CAPRI_HDMI_PIN_REG_INPUT_DIS_SHIFT     3
-#define CAPRI_HDMI_PIN_REG_MODE_MASK           0x0010
-#define CAPRI_HDMI_PIN_REG_MODE_SHIFT          4
-
-/**
- * capri_pin_type - types of pin register
- */
-enum capri_pin_type {
-       CAPRI_PIN_TYPE_UNKNOWN = 0,
-       CAPRI_PIN_TYPE_STD,
-       CAPRI_PIN_TYPE_I2C,
-       CAPRI_PIN_TYPE_HDMI,
-};
-
-static enum capri_pin_type std_pin = CAPRI_PIN_TYPE_STD;
-static enum capri_pin_type i2c_pin = CAPRI_PIN_TYPE_I2C;
-static enum capri_pin_type hdmi_pin = CAPRI_PIN_TYPE_HDMI;
-
-/**
- * capri_pin_function- define pin function
- */
-struct capri_pin_function {
-       const char *name;
-       const char * const *groups;
-       const unsigned ngroups;
-};
-
-/**
- * capri_pinctrl_data - Broadcom-specific pinctrl data
- * @reg_base - base of pinctrl registers
- */
-struct capri_pinctrl_data {
-       void __iomem *reg_base;
-
-       /* List of all pins */
-       const struct pinctrl_pin_desc *pins;
-       const unsigned npins;
-
-       const struct capri_pin_function *functions;
-       const unsigned nfunctions;
-
-       struct regmap *regmap;
-};
-
-/*
- * Pin number definition.  The order here must be the same as defined in the
- * PADCTRLREG block in the RDB.
- */
-#define CAPRI_PIN_ADCSYNC              0
-#define CAPRI_PIN_BAT_RM               1
-#define CAPRI_PIN_BSC1_SCL             2
-#define CAPRI_PIN_BSC1_SDA             3
-#define CAPRI_PIN_BSC2_SCL             4
-#define CAPRI_PIN_BSC2_SDA             5
-#define CAPRI_PIN_CLASSGPWR            6
-#define CAPRI_PIN_CLK_CX8              7
-#define CAPRI_PIN_CLKOUT_0             8
-#define CAPRI_PIN_CLKOUT_1             9
-#define CAPRI_PIN_CLKOUT_2             10
-#define CAPRI_PIN_CLKOUT_3             11
-#define CAPRI_PIN_CLKREQ_IN_0          12
-#define CAPRI_PIN_CLKREQ_IN_1          13
-#define CAPRI_PIN_CWS_SYS_REQ1         14
-#define CAPRI_PIN_CWS_SYS_REQ2         15
-#define CAPRI_PIN_CWS_SYS_REQ3         16
-#define CAPRI_PIN_DIGMIC1_CLK          17
-#define CAPRI_PIN_DIGMIC1_DQ           18
-#define CAPRI_PIN_DIGMIC2_CLK          19
-#define CAPRI_PIN_DIGMIC2_DQ           20
-#define CAPRI_PIN_GPEN13               21
-#define CAPRI_PIN_GPEN14               22
-#define CAPRI_PIN_GPEN15               23
-#define CAPRI_PIN_GPIO00               24
-#define CAPRI_PIN_GPIO01               25
-#define CAPRI_PIN_GPIO02               26
-#define CAPRI_PIN_GPIO03               27
-#define CAPRI_PIN_GPIO04               28
-#define CAPRI_PIN_GPIO05               29
-#define CAPRI_PIN_GPIO06               30
-#define CAPRI_PIN_GPIO07               31
-#define CAPRI_PIN_GPIO08               32
-#define CAPRI_PIN_GPIO09               33
-#define CAPRI_PIN_GPIO10               34
-#define CAPRI_PIN_GPIO11               35
-#define CAPRI_PIN_GPIO12               36
-#define CAPRI_PIN_GPIO13               37
-#define CAPRI_PIN_GPIO14               38
-#define CAPRI_PIN_GPS_PABLANK          39
-#define CAPRI_PIN_GPS_TMARK            40
-#define CAPRI_PIN_HDMI_SCL             41
-#define CAPRI_PIN_HDMI_SDA             42
-#define CAPRI_PIN_IC_DM                        43
-#define CAPRI_PIN_IC_DP                        44
-#define CAPRI_PIN_KP_COL_IP_0          45
-#define CAPRI_PIN_KP_COL_IP_1          46
-#define CAPRI_PIN_KP_COL_IP_2          47
-#define CAPRI_PIN_KP_COL_IP_3          48
-#define CAPRI_PIN_KP_ROW_OP_0          49
-#define CAPRI_PIN_KP_ROW_OP_1          50
-#define CAPRI_PIN_KP_ROW_OP_2          51
-#define CAPRI_PIN_KP_ROW_OP_3          52
-#define CAPRI_PIN_LCD_B_0              53
-#define CAPRI_PIN_LCD_B_1              54
-#define CAPRI_PIN_LCD_B_2              55
-#define CAPRI_PIN_LCD_B_3              56
-#define CAPRI_PIN_LCD_B_4              57
-#define CAPRI_PIN_LCD_B_5              58
-#define CAPRI_PIN_LCD_B_6              59
-#define CAPRI_PIN_LCD_B_7              60
-#define CAPRI_PIN_LCD_G_0              61
-#define CAPRI_PIN_LCD_G_1              62
-#define CAPRI_PIN_LCD_G_2              63
-#define CAPRI_PIN_LCD_G_3              64
-#define CAPRI_PIN_LCD_G_4              65
-#define CAPRI_PIN_LCD_G_5              66
-#define CAPRI_PIN_LCD_G_6              67
-#define CAPRI_PIN_LCD_G_7              68
-#define CAPRI_PIN_LCD_HSYNC            69
-#define CAPRI_PIN_LCD_OE               70
-#define CAPRI_PIN_LCD_PCLK             71
-#define CAPRI_PIN_LCD_R_0              72
-#define CAPRI_PIN_LCD_R_1              73
-#define CAPRI_PIN_LCD_R_2              74
-#define CAPRI_PIN_LCD_R_3              75
-#define CAPRI_PIN_LCD_R_4              76
-#define CAPRI_PIN_LCD_R_5              77
-#define CAPRI_PIN_LCD_R_6              78
-#define CAPRI_PIN_LCD_R_7              79
-#define CAPRI_PIN_LCD_VSYNC            80
-#define CAPRI_PIN_MDMGPIO0             81
-#define CAPRI_PIN_MDMGPIO1             82
-#define CAPRI_PIN_MDMGPIO2             83
-#define CAPRI_PIN_MDMGPIO3             84
-#define CAPRI_PIN_MDMGPIO4             85
-#define CAPRI_PIN_MDMGPIO5             86
-#define CAPRI_PIN_MDMGPIO6             87
-#define CAPRI_PIN_MDMGPIO7             88
-#define CAPRI_PIN_MDMGPIO8             89
-#define CAPRI_PIN_MPHI_DATA_0          90
-#define CAPRI_PIN_MPHI_DATA_1          91
-#define CAPRI_PIN_MPHI_DATA_2          92
-#define CAPRI_PIN_MPHI_DATA_3          93
-#define CAPRI_PIN_MPHI_DATA_4          94
-#define CAPRI_PIN_MPHI_DATA_5          95
-#define CAPRI_PIN_MPHI_DATA_6          96
-#define CAPRI_PIN_MPHI_DATA_7          97
-#define CAPRI_PIN_MPHI_DATA_8          98
-#define CAPRI_PIN_MPHI_DATA_9          99
-#define CAPRI_PIN_MPHI_DATA_10         100
-#define CAPRI_PIN_MPHI_DATA_11         101
-#define CAPRI_PIN_MPHI_DATA_12         102
-#define CAPRI_PIN_MPHI_DATA_13         103
-#define CAPRI_PIN_MPHI_DATA_14         104
-#define CAPRI_PIN_MPHI_DATA_15         105
-#define CAPRI_PIN_MPHI_HA0             106
-#define CAPRI_PIN_MPHI_HAT0            107
-#define CAPRI_PIN_MPHI_HAT1            108
-#define CAPRI_PIN_MPHI_HCE0_N          109
-#define CAPRI_PIN_MPHI_HCE1_N          110
-#define CAPRI_PIN_MPHI_HRD_N           111
-#define CAPRI_PIN_MPHI_HWR_N           112
-#define CAPRI_PIN_MPHI_RUN0            113
-#define CAPRI_PIN_MPHI_RUN1            114
-#define CAPRI_PIN_MTX_SCAN_CLK         115
-#define CAPRI_PIN_MTX_SCAN_DATA                116
-#define CAPRI_PIN_NAND_AD_0            117
-#define CAPRI_PIN_NAND_AD_1            118
-#define CAPRI_PIN_NAND_AD_2            119
-#define CAPRI_PIN_NAND_AD_3            120
-#define CAPRI_PIN_NAND_AD_4            121
-#define CAPRI_PIN_NAND_AD_5            122
-#define CAPRI_PIN_NAND_AD_6            123
-#define CAPRI_PIN_NAND_AD_7            124
-#define CAPRI_PIN_NAND_ALE             125
-#define CAPRI_PIN_NAND_CEN_0           126
-#define CAPRI_PIN_NAND_CEN_1           127
-#define CAPRI_PIN_NAND_CLE             128
-#define CAPRI_PIN_NAND_OEN             129
-#define CAPRI_PIN_NAND_RDY_0           130
-#define CAPRI_PIN_NAND_RDY_1           131
-#define CAPRI_PIN_NAND_WEN             132
-#define CAPRI_PIN_NAND_WP              133
-#define CAPRI_PIN_PC1                  134
-#define CAPRI_PIN_PC2                  135
-#define CAPRI_PIN_PMU_INT              136
-#define CAPRI_PIN_PMU_SCL              137
-#define CAPRI_PIN_PMU_SDA              138
-#define CAPRI_PIN_RFST2G_MTSLOTEN3G    139
-#define CAPRI_PIN_RGMII_0_RX_CTL       140
-#define CAPRI_PIN_RGMII_0_RXC          141
-#define CAPRI_PIN_RGMII_0_RXD_0                142
-#define CAPRI_PIN_RGMII_0_RXD_1                143
-#define CAPRI_PIN_RGMII_0_RXD_2                144
-#define CAPRI_PIN_RGMII_0_RXD_3                145
-#define CAPRI_PIN_RGMII_0_TX_CTL       146
-#define CAPRI_PIN_RGMII_0_TXC          147
-#define CAPRI_PIN_RGMII_0_TXD_0                148
-#define CAPRI_PIN_RGMII_0_TXD_1                149
-#define CAPRI_PIN_RGMII_0_TXD_2                150
-#define CAPRI_PIN_RGMII_0_TXD_3                151
-#define CAPRI_PIN_RGMII_1_RX_CTL       152
-#define CAPRI_PIN_RGMII_1_RXC          153
-#define CAPRI_PIN_RGMII_1_RXD_0                154
-#define CAPRI_PIN_RGMII_1_RXD_1                155
-#define CAPRI_PIN_RGMII_1_RXD_2                156
-#define CAPRI_PIN_RGMII_1_RXD_3                157
-#define CAPRI_PIN_RGMII_1_TX_CTL       158
-#define CAPRI_PIN_RGMII_1_TXC          159
-#define CAPRI_PIN_RGMII_1_TXD_0                160
-#define CAPRI_PIN_RGMII_1_TXD_1                161
-#define CAPRI_PIN_RGMII_1_TXD_2                162
-#define CAPRI_PIN_RGMII_1_TXD_3                163
-#define CAPRI_PIN_RGMII_GPIO_0         164
-#define CAPRI_PIN_RGMII_GPIO_1         165
-#define CAPRI_PIN_RGMII_GPIO_2         166
-#define CAPRI_PIN_RGMII_GPIO_3         167
-#define CAPRI_PIN_RTXDATA2G_TXDATA3G1  168
-#define CAPRI_PIN_RTXEN2G_TXDATA3G2    169
-#define CAPRI_PIN_RXDATA3G0            170
-#define CAPRI_PIN_RXDATA3G1            171
-#define CAPRI_PIN_RXDATA3G2            172
-#define CAPRI_PIN_SDIO1_CLK            173
-#define CAPRI_PIN_SDIO1_CMD            174
-#define CAPRI_PIN_SDIO1_DATA_0         175
-#define CAPRI_PIN_SDIO1_DATA_1         176
-#define CAPRI_PIN_SDIO1_DATA_2         177
-#define CAPRI_PIN_SDIO1_DATA_3         178
-#define CAPRI_PIN_SDIO4_CLK            179
-#define CAPRI_PIN_SDIO4_CMD            180
-#define CAPRI_PIN_SDIO4_DATA_0         181
-#define CAPRI_PIN_SDIO4_DATA_1         182
-#define CAPRI_PIN_SDIO4_DATA_2         183
-#define CAPRI_PIN_SDIO4_DATA_3         184
-#define CAPRI_PIN_SIM_CLK              185
-#define CAPRI_PIN_SIM_DATA             186
-#define CAPRI_PIN_SIM_DET              187
-#define CAPRI_PIN_SIM_RESETN           188
-#define CAPRI_PIN_SIM2_CLK             189
-#define CAPRI_PIN_SIM2_DATA            190
-#define CAPRI_PIN_SIM2_DET             191
-#define CAPRI_PIN_SIM2_RESETN          192
-#define CAPRI_PIN_SRI_C                        193
-#define CAPRI_PIN_SRI_D                        194
-#define CAPRI_PIN_SRI_E                        195
-#define CAPRI_PIN_SSP_EXTCLK           196
-#define CAPRI_PIN_SSP0_CLK             197
-#define CAPRI_PIN_SSP0_FS              198
-#define CAPRI_PIN_SSP0_RXD             199
-#define CAPRI_PIN_SSP0_TXD             200
-#define CAPRI_PIN_SSP2_CLK             201
-#define CAPRI_PIN_SSP2_FS_0            202
-#define CAPRI_PIN_SSP2_FS_1            203
-#define CAPRI_PIN_SSP2_FS_2            204
-#define CAPRI_PIN_SSP2_FS_3            205
-#define CAPRI_PIN_SSP2_RXD_0           206
-#define CAPRI_PIN_SSP2_RXD_1           207
-#define CAPRI_PIN_SSP2_TXD_0           208
-#define CAPRI_PIN_SSP2_TXD_1           209
-#define CAPRI_PIN_SSP3_CLK             210
-#define CAPRI_PIN_SSP3_FS              211
-#define CAPRI_PIN_SSP3_RXD             212
-#define CAPRI_PIN_SSP3_TXD             213
-#define CAPRI_PIN_SSP4_CLK             214
-#define CAPRI_PIN_SSP4_FS              215
-#define CAPRI_PIN_SSP4_RXD             216
-#define CAPRI_PIN_SSP4_TXD             217
-#define CAPRI_PIN_SSP5_CLK             218
-#define CAPRI_PIN_SSP5_FS              219
-#define CAPRI_PIN_SSP5_RXD             220
-#define CAPRI_PIN_SSP5_TXD             221
-#define CAPRI_PIN_SSP6_CLK             222
-#define CAPRI_PIN_SSP6_FS              223
-#define CAPRI_PIN_SSP6_RXD             224
-#define CAPRI_PIN_SSP6_TXD             225
-#define CAPRI_PIN_STAT_1               226
-#define CAPRI_PIN_STAT_2               227
-#define CAPRI_PIN_SYSCLKEN             228
-#define CAPRI_PIN_TRACECLK             229
-#define CAPRI_PIN_TRACEDT00            230
-#define CAPRI_PIN_TRACEDT01            231
-#define CAPRI_PIN_TRACEDT02            232
-#define CAPRI_PIN_TRACEDT03            233
-#define CAPRI_PIN_TRACEDT04            234
-#define CAPRI_PIN_TRACEDT05            235
-#define CAPRI_PIN_TRACEDT06            236
-#define CAPRI_PIN_TRACEDT07            237
-#define CAPRI_PIN_TRACEDT08            238
-#define CAPRI_PIN_TRACEDT09            239
-#define CAPRI_PIN_TRACEDT10            240
-#define CAPRI_PIN_TRACEDT11            241
-#define CAPRI_PIN_TRACEDT12            242
-#define CAPRI_PIN_TRACEDT13            243
-#define CAPRI_PIN_TRACEDT14            244
-#define CAPRI_PIN_TRACEDT15            245
-#define CAPRI_PIN_TXDATA3G0            246
-#define CAPRI_PIN_TXPWRIND             247
-#define CAPRI_PIN_UARTB1_UCTS          248
-#define CAPRI_PIN_UARTB1_URTS          249
-#define CAPRI_PIN_UARTB1_URXD          250
-#define CAPRI_PIN_UARTB1_UTXD          251
-#define CAPRI_PIN_UARTB2_URXD          252
-#define CAPRI_PIN_UARTB2_UTXD          253
-#define CAPRI_PIN_UARTB3_UCTS          254
-#define CAPRI_PIN_UARTB3_URTS          255
-#define CAPRI_PIN_UARTB3_URXD          256
-#define CAPRI_PIN_UARTB3_UTXD          257
-#define CAPRI_PIN_UARTB4_UCTS          258
-#define CAPRI_PIN_UARTB4_URTS          259
-#define CAPRI_PIN_UARTB4_URXD          260
-#define CAPRI_PIN_UARTB4_UTXD          261
-#define CAPRI_PIN_VC_CAM1_SCL          262
-#define CAPRI_PIN_VC_CAM1_SDA          263
-#define CAPRI_PIN_VC_CAM2_SCL          264
-#define CAPRI_PIN_VC_CAM2_SDA          265
-#define CAPRI_PIN_VC_CAM3_SCL          266
-#define CAPRI_PIN_VC_CAM3_SDA          267
-
-#define CAPRI_PIN_DESC(a, b, c) \
-       { .number = a, .name = b, .drv_data = &c##_pin }
-
-/*
- * Pin description definition.  The order here must be the same as defined in
- * the PADCTRLREG block in the RDB, since the pin number is used as an index
- * into this array.
- */
-static const struct pinctrl_pin_desc capri_pinctrl_pins[] = {
-       CAPRI_PIN_DESC(CAPRI_PIN_ADCSYNC, "adcsync", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_BAT_RM, "bat_rm", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_BSC1_SCL, "bsc1_scl", i2c),
-       CAPRI_PIN_DESC(CAPRI_PIN_BSC1_SDA, "bsc1_sda", i2c),
-       CAPRI_PIN_DESC(CAPRI_PIN_BSC2_SCL, "bsc2_scl", i2c),
-       CAPRI_PIN_DESC(CAPRI_PIN_BSC2_SDA, "bsc2_sda", i2c),
-       CAPRI_PIN_DESC(CAPRI_PIN_CLASSGPWR, "classgpwr", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_CLK_CX8, "clk_cx8", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_CLKOUT_0, "clkout_0", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_CLKOUT_1, "clkout_1", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_CLKOUT_2, "clkout_2", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_CLKOUT_3, "clkout_3", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_CLKREQ_IN_0, "clkreq_in_0", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_CLKREQ_IN_1, "clkreq_in_1", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_CWS_SYS_REQ1, "cws_sys_req1", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_CWS_SYS_REQ2, "cws_sys_req2", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_CWS_SYS_REQ3, "cws_sys_req3", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_DIGMIC1_CLK, "digmic1_clk", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_DIGMIC1_DQ, "digmic1_dq", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_DIGMIC2_CLK, "digmic2_clk", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_DIGMIC2_DQ, "digmic2_dq", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_GPEN13, "gpen13", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_GPEN14, "gpen14", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_GPEN15, "gpen15", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_GPIO00, "gpio00", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_GPIO01, "gpio01", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_GPIO02, "gpio02", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_GPIO03, "gpio03", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_GPIO04, "gpio04", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_GPIO05, "gpio05", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_GPIO06, "gpio06", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_GPIO07, "gpio07", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_GPIO08, "gpio08", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_GPIO09, "gpio09", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_GPIO10, "gpio10", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_GPIO11, "gpio11", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_GPIO12, "gpio12", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_GPIO13, "gpio13", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_GPIO14, "gpio14", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_GPS_PABLANK, "gps_pablank", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_GPS_TMARK, "gps_tmark", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_HDMI_SCL, "hdmi_scl", hdmi),
-       CAPRI_PIN_DESC(CAPRI_PIN_HDMI_SDA, "hdmi_sda", hdmi),
-       CAPRI_PIN_DESC(CAPRI_PIN_IC_DM, "ic_dm", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_IC_DP, "ic_dp", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_KP_COL_IP_0, "kp_col_ip_0", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_KP_COL_IP_1, "kp_col_ip_1", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_KP_COL_IP_2, "kp_col_ip_2", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_KP_COL_IP_3, "kp_col_ip_3", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_KP_ROW_OP_0, "kp_row_op_0", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_KP_ROW_OP_1, "kp_row_op_1", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_KP_ROW_OP_2, "kp_row_op_2", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_KP_ROW_OP_3, "kp_row_op_3", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_LCD_B_0, "lcd_b_0", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_LCD_B_1, "lcd_b_1", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_LCD_B_2, "lcd_b_2", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_LCD_B_3, "lcd_b_3", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_LCD_B_4, "lcd_b_4", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_LCD_B_5, "lcd_b_5", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_LCD_B_6, "lcd_b_6", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_LCD_B_7, "lcd_b_7", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_LCD_G_0, "lcd_g_0", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_LCD_G_1, "lcd_g_1", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_LCD_G_2, "lcd_g_2", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_LCD_G_3, "lcd_g_3", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_LCD_G_4, "lcd_g_4", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_LCD_G_5, "lcd_g_5", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_LCD_G_6, "lcd_g_6", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_LCD_G_7, "lcd_g_7", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_LCD_HSYNC, "lcd_hsync", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_LCD_OE, "lcd_oe", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_LCD_PCLK, "lcd_pclk", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_LCD_R_0, "lcd_r_0", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_LCD_R_1, "lcd_r_1", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_LCD_R_2, "lcd_r_2", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_LCD_R_3, "lcd_r_3", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_LCD_R_4, "lcd_r_4", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_LCD_R_5, "lcd_r_5", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_LCD_R_6, "lcd_r_6", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_LCD_R_7, "lcd_r_7", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_LCD_VSYNC, "lcd_vsync", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_MDMGPIO0, "mdmgpio0", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_MDMGPIO1, "mdmgpio1", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_MDMGPIO2, "mdmgpio2", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_MDMGPIO3, "mdmgpio3", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_MDMGPIO4, "mdmgpio4", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_MDMGPIO5, "mdmgpio5", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_MDMGPIO6, "mdmgpio6", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_MDMGPIO7, "mdmgpio7", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_MDMGPIO8, "mdmgpio8", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_MPHI_DATA_0, "mphi_data_0", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_MPHI_DATA_1, "mphi_data_1", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_MPHI_DATA_2, "mphi_data_2", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_MPHI_DATA_3, "mphi_data_3", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_MPHI_DATA_4, "mphi_data_4", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_MPHI_DATA_5, "mphi_data_5", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_MPHI_DATA_6, "mphi_data_6", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_MPHI_DATA_7, "mphi_data_7", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_MPHI_DATA_8, "mphi_data_8", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_MPHI_DATA_9, "mphi_data_9", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_MPHI_DATA_10, "mphi_data_10", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_MPHI_DATA_11, "mphi_data_11", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_MPHI_DATA_12, "mphi_data_12", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_MPHI_DATA_13, "mphi_data_13", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_MPHI_DATA_14, "mphi_data_14", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_MPHI_DATA_15, "mphi_data_15", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_MPHI_HA0, "mphi_ha0", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_MPHI_HAT0, "mphi_hat0", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_MPHI_HAT1, "mphi_hat1", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_MPHI_HCE0_N, "mphi_hce0_n", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_MPHI_HCE1_N, "mphi_hce1_n", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_MPHI_HRD_N, "mphi_hrd_n", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_MPHI_HWR_N, "mphi_hwr_n", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_MPHI_RUN0, "mphi_run0", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_MPHI_RUN1, "mphi_run1", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_MTX_SCAN_CLK, "mtx_scan_clk", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_MTX_SCAN_DATA, "mtx_scan_data", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_NAND_AD_0, "nand_ad_0", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_NAND_AD_1, "nand_ad_1", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_NAND_AD_2, "nand_ad_2", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_NAND_AD_3, "nand_ad_3", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_NAND_AD_4, "nand_ad_4", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_NAND_AD_5, "nand_ad_5", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_NAND_AD_6, "nand_ad_6", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_NAND_AD_7, "nand_ad_7", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_NAND_ALE, "nand_ale", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_NAND_CEN_0, "nand_cen_0", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_NAND_CEN_1, "nand_cen_1", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_NAND_CLE, "nand_cle", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_NAND_OEN, "nand_oen", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_NAND_RDY_0, "nand_rdy_0", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_NAND_RDY_1, "nand_rdy_1", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_NAND_WEN, "nand_wen", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_NAND_WP, "nand_wp", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_PC1, "pc1", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_PC2, "pc2", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_PMU_INT, "pmu_int", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_PMU_SCL, "pmu_scl", i2c),
-       CAPRI_PIN_DESC(CAPRI_PIN_PMU_SDA, "pmu_sda", i2c),
-       CAPRI_PIN_DESC(CAPRI_PIN_RFST2G_MTSLOTEN3G, "rfst2g_mtsloten3g", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_RGMII_0_RX_CTL, "rgmii_0_rx_ctl", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_RGMII_0_RXC, "rgmii_0_rxc", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_RGMII_0_RXD_0, "rgmii_0_rxd_0", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_RGMII_0_RXD_1, "rgmii_0_rxd_1", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_RGMII_0_RXD_2, "rgmii_0_rxd_2", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_RGMII_0_RXD_3, "rgmii_0_rxd_3", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_RGMII_0_TX_CTL, "rgmii_0_tx_ctl", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_RGMII_0_TXC, "rgmii_0_txc", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_RGMII_0_TXD_0, "rgmii_0_txd_0", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_RGMII_0_TXD_1, "rgmii_0_txd_1", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_RGMII_0_TXD_2, "rgmii_0_txd_2", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_RGMII_0_TXD_3, "rgmii_0_txd_3", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_RGMII_1_RX_CTL, "rgmii_1_rx_ctl", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_RGMII_1_RXC, "rgmii_1_rxc", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_RGMII_1_RXD_0, "rgmii_1_rxd_0", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_RGMII_1_RXD_1, "rgmii_1_rxd_1", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_RGMII_1_RXD_2, "rgmii_1_rxd_2", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_RGMII_1_RXD_3, "rgmii_1_rxd_3", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_RGMII_1_TX_CTL, "rgmii_1_tx_ctl", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_RGMII_1_TXC, "rgmii_1_txc", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_RGMII_1_TXD_0, "rgmii_1_txd_0", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_RGMII_1_TXD_1, "rgmii_1_txd_1", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_RGMII_1_TXD_2, "rgmii_1_txd_2", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_RGMII_1_TXD_3, "rgmii_1_txd_3", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_RGMII_GPIO_0, "rgmii_gpio_0", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_RGMII_GPIO_1, "rgmii_gpio_1", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_RGMII_GPIO_2, "rgmii_gpio_2", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_RGMII_GPIO_3, "rgmii_gpio_3", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_RTXDATA2G_TXDATA3G1, "rtxdata2g_txdata3g1",
-               std),
-       CAPRI_PIN_DESC(CAPRI_PIN_RTXEN2G_TXDATA3G2, "rtxen2g_txdata3g2", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_RXDATA3G0, "rxdata3g0", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_RXDATA3G1, "rxdata3g1", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_RXDATA3G2, "rxdata3g2", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SDIO1_CLK, "sdio1_clk", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SDIO1_CMD, "sdio1_cmd", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SDIO1_DATA_0, "sdio1_data_0", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SDIO1_DATA_1, "sdio1_data_1", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SDIO1_DATA_2, "sdio1_data_2", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SDIO1_DATA_3, "sdio1_data_3", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SDIO4_CLK, "sdio4_clk", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SDIO4_CMD, "sdio4_cmd", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SDIO4_DATA_0, "sdio4_data_0", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SDIO4_DATA_1, "sdio4_data_1", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SDIO4_DATA_2, "sdio4_data_2", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SDIO4_DATA_3, "sdio4_data_3", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SIM_CLK, "sim_clk", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SIM_DATA, "sim_data", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SIM_DET, "sim_det", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SIM_RESETN, "sim_resetn", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SIM2_CLK, "sim2_clk", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SIM2_DATA, "sim2_data", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SIM2_DET, "sim2_det", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SIM2_RESETN, "sim2_resetn", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SRI_C, "sri_c", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SRI_D, "sri_d", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SRI_E, "sri_e", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SSP_EXTCLK, "ssp_extclk", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SSP0_CLK, "ssp0_clk", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SSP0_FS, "ssp0_fs", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SSP0_RXD, "ssp0_rxd", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SSP0_TXD, "ssp0_txd", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SSP2_CLK, "ssp2_clk", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SSP2_FS_0, "ssp2_fs_0", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SSP2_FS_1, "ssp2_fs_1", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SSP2_FS_2, "ssp2_fs_2", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SSP2_FS_3, "ssp2_fs_3", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SSP2_RXD_0, "ssp2_rxd_0", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SSP2_RXD_1, "ssp2_rxd_1", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SSP2_TXD_0, "ssp2_txd_0", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SSP2_TXD_1, "ssp2_txd_1", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SSP3_CLK, "ssp3_clk", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SSP3_FS, "ssp3_fs", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SSP3_RXD, "ssp3_rxd", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SSP3_TXD, "ssp3_txd", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SSP4_CLK, "ssp4_clk", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SSP4_FS, "ssp4_fs", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SSP4_RXD, "ssp4_rxd", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SSP4_TXD, "ssp4_txd", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SSP5_CLK, "ssp5_clk", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SSP5_FS, "ssp5_fs", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SSP5_RXD, "ssp5_rxd", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SSP5_TXD, "ssp5_txd", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SSP6_CLK, "ssp6_clk", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SSP6_FS, "ssp6_fs", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SSP6_RXD, "ssp6_rxd", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SSP6_TXD, "ssp6_txd", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_STAT_1, "stat_1", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_STAT_2, "stat_2", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_SYSCLKEN, "sysclken", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_TRACECLK, "traceclk", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_TRACEDT00, "tracedt00", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_TRACEDT01, "tracedt01", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_TRACEDT02, "tracedt02", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_TRACEDT03, "tracedt03", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_TRACEDT04, "tracedt04", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_TRACEDT05, "tracedt05", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_TRACEDT06, "tracedt06", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_TRACEDT07, "tracedt07", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_TRACEDT08, "tracedt08", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_TRACEDT09, "tracedt09", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_TRACEDT10, "tracedt10", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_TRACEDT11, "tracedt11", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_TRACEDT12, "tracedt12", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_TRACEDT13, "tracedt13", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_TRACEDT14, "tracedt14", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_TRACEDT15, "tracedt15", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_TXDATA3G0, "txdata3g0", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_TXPWRIND, "txpwrind", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_UARTB1_UCTS, "uartb1_ucts", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_UARTB1_URTS, "uartb1_urts", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_UARTB1_URXD, "uartb1_urxd", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_UARTB1_UTXD, "uartb1_utxd", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_UARTB2_URXD, "uartb2_urxd", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_UARTB2_UTXD, "uartb2_utxd", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_UARTB3_UCTS, "uartb3_ucts", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_UARTB3_URTS, "uartb3_urts", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_UARTB3_URXD, "uartb3_urxd", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_UARTB3_UTXD, "uartb3_utxd", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_UARTB4_UCTS, "uartb4_ucts", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_UARTB4_URTS, "uartb4_urts", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_UARTB4_URXD, "uartb4_urxd", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_UARTB4_UTXD, "uartb4_utxd", std),
-       CAPRI_PIN_DESC(CAPRI_PIN_VC_CAM1_SCL, "vc_cam1_scl", i2c),
-       CAPRI_PIN_DESC(CAPRI_PIN_VC_CAM1_SDA, "vc_cam1_sda", i2c),
-       CAPRI_PIN_DESC(CAPRI_PIN_VC_CAM2_SCL, "vc_cam2_scl", i2c),
-       CAPRI_PIN_DESC(CAPRI_PIN_VC_CAM2_SDA, "vc_cam2_sda", i2c),
-       CAPRI_PIN_DESC(CAPRI_PIN_VC_CAM3_SCL, "vc_cam3_scl", i2c),
-       CAPRI_PIN_DESC(CAPRI_PIN_VC_CAM3_SDA, "vc_cam3_sda", i2c),
-};
-
-static const char * const capri_alt_groups[] = {
-       "adcsync",
-       "bat_rm",
-       "bsc1_scl",
-       "bsc1_sda",
-       "bsc2_scl",
-       "bsc2_sda",
-       "classgpwr",
-       "clk_cx8",
-       "clkout_0",
-       "clkout_1",
-       "clkout_2",
-       "clkout_3",
-       "clkreq_in_0",
-       "clkreq_in_1",
-       "cws_sys_req1",
-       "cws_sys_req2",
-       "cws_sys_req3",
-       "digmic1_clk",
-       "digmic1_dq",
-       "digmic2_clk",
-       "digmic2_dq",
-       "gpen13",
-       "gpen14",
-       "gpen15",
-       "gpio00",
-       "gpio01",
-       "gpio02",
-       "gpio03",
-       "gpio04",
-       "gpio05",
-       "gpio06",
-       "gpio07",
-       "gpio08",
-       "gpio09",
-       "gpio10",
-       "gpio11",
-       "gpio12",
-       "gpio13",
-       "gpio14",
-       "gps_pablank",
-       "gps_tmark",
-       "hdmi_scl",
-       "hdmi_sda",
-       "ic_dm",
-       "ic_dp",
-       "kp_col_ip_0",
-       "kp_col_ip_1",
-       "kp_col_ip_2",
-       "kp_col_ip_3",
-       "kp_row_op_0",
-       "kp_row_op_1",
-       "kp_row_op_2",
-       "kp_row_op_3",
-       "lcd_b_0",
-       "lcd_b_1",
-       "lcd_b_2",
-       "lcd_b_3",
-       "lcd_b_4",
-       "lcd_b_5",
-       "lcd_b_6",
-       "lcd_b_7",
-       "lcd_g_0",
-       "lcd_g_1",
-       "lcd_g_2",
-       "lcd_g_3",
-       "lcd_g_4",
-       "lcd_g_5",
-       "lcd_g_6",
-       "lcd_g_7",
-       "lcd_hsync",
-       "lcd_oe",
-       "lcd_pclk",
-       "lcd_r_0",
-       "lcd_r_1",
-       "lcd_r_2",
-       "lcd_r_3",
-       "lcd_r_4",
-       "lcd_r_5",
-       "lcd_r_6",
-       "lcd_r_7",
-       "lcd_vsync",
-       "mdmgpio0",
-       "mdmgpio1",
-       "mdmgpio2",
-       "mdmgpio3",
-       "mdmgpio4",
-       "mdmgpio5",
-       "mdmgpio6",
-       "mdmgpio7",
-       "mdmgpio8",
-       "mphi_data_0",
-       "mphi_data_1",
-       "mphi_data_2",
-       "mphi_data_3",
-       "mphi_data_4",
-       "mphi_data_5",
-       "mphi_data_6",
-       "mphi_data_7",
-       "mphi_data_8",
-       "mphi_data_9",
-       "mphi_data_10",
-       "mphi_data_11",
-       "mphi_data_12",
-       "mphi_data_13",
-       "mphi_data_14",
-       "mphi_data_15",
-       "mphi_ha0",
-       "mphi_hat0",
-       "mphi_hat1",
-       "mphi_hce0_n",
-       "mphi_hce1_n",
-       "mphi_hrd_n",
-       "mphi_hwr_n",
-       "mphi_run0",
-       "mphi_run1",
-       "mtx_scan_clk",
-       "mtx_scan_data",
-       "nand_ad_0",
-       "nand_ad_1",
-       "nand_ad_2",
-       "nand_ad_3",
-       "nand_ad_4",
-       "nand_ad_5",
-       "nand_ad_6",
-       "nand_ad_7",
-       "nand_ale",
-       "nand_cen_0",
-       "nand_cen_1",
-       "nand_cle",
-       "nand_oen",
-       "nand_rdy_0",
-       "nand_rdy_1",
-       "nand_wen",
-       "nand_wp",
-       "pc1",
-       "pc2",
-       "pmu_int",
-       "pmu_scl",
-       "pmu_sda",
-       "rfst2g_mtsloten3g",
-       "rgmii_0_rx_ctl",
-       "rgmii_0_rxc",
-       "rgmii_0_rxd_0",
-       "rgmii_0_rxd_1",
-       "rgmii_0_rxd_2",
-       "rgmii_0_rxd_3",
-       "rgmii_0_tx_ctl",
-       "rgmii_0_txc",
-       "rgmii_0_txd_0",
-       "rgmii_0_txd_1",
-       "rgmii_0_txd_2",
-       "rgmii_0_txd_3",
-       "rgmii_1_rx_ctl",
-       "rgmii_1_rxc",
-       "rgmii_1_rxd_0",
-       "rgmii_1_rxd_1",
-       "rgmii_1_rxd_2",
-       "rgmii_1_rxd_3",
-       "rgmii_1_tx_ctl",
-       "rgmii_1_txc",
-       "rgmii_1_txd_0",
-       "rgmii_1_txd_1",
-       "rgmii_1_txd_2",
-       "rgmii_1_txd_3",
-       "rgmii_gpio_0",
-       "rgmii_gpio_1",
-       "rgmii_gpio_2",
-       "rgmii_gpio_3",
-       "rtxdata2g_txdata3g1",
-       "rtxen2g_txdata3g2",
-       "rxdata3g0",
-       "rxdata3g1",
-       "rxdata3g2",
-       "sdio1_clk",
-       "sdio1_cmd",
-       "sdio1_data_0",
-       "sdio1_data_1",
-       "sdio1_data_2",
-       "sdio1_data_3",
-       "sdio4_clk",
-       "sdio4_cmd",
-       "sdio4_data_0",
-       "sdio4_data_1",
-       "sdio4_data_2",
-       "sdio4_data_3",
-       "sim_clk",
-       "sim_data",
-       "sim_det",
-       "sim_resetn",
-       "sim2_clk",
-       "sim2_data",
-       "sim2_det",
-       "sim2_resetn",
-       "sri_c",
-       "sri_d",
-       "sri_e",
-       "ssp_extclk",
-       "ssp0_clk",
-       "ssp0_fs",
-       "ssp0_rxd",
-       "ssp0_txd",
-       "ssp2_clk",
-       "ssp2_fs_0",
-       "ssp2_fs_1",
-       "ssp2_fs_2",
-       "ssp2_fs_3",
-       "ssp2_rxd_0",
-       "ssp2_rxd_1",
-       "ssp2_txd_0",
-       "ssp2_txd_1",
-       "ssp3_clk",
-       "ssp3_fs",
-       "ssp3_rxd",
-       "ssp3_txd",
-       "ssp4_clk",
-       "ssp4_fs",
-       "ssp4_rxd",
-       "ssp4_txd",
-       "ssp5_clk",
-       "ssp5_fs",
-       "ssp5_rxd",
-       "ssp5_txd",
-       "ssp6_clk",
-       "ssp6_fs",
-       "ssp6_rxd",
-       "ssp6_txd",
-       "stat_1",
-       "stat_2",
-       "sysclken",
-       "traceclk",
-       "tracedt00",
-       "tracedt01",
-       "tracedt02",
-       "tracedt03",
-       "tracedt04",
-       "tracedt05",
-       "tracedt06",
-       "tracedt07",
-       "tracedt08",
-       "tracedt09",
-       "tracedt10",
-       "tracedt11",
-       "tracedt12",
-       "tracedt13",
-       "tracedt14",
-       "tracedt15",
-       "txdata3g0",
-       "txpwrind",
-       "uartb1_ucts",
-       "uartb1_urts",
-       "uartb1_urxd",
-       "uartb1_utxd",
-       "uartb2_urxd",
-       "uartb2_utxd",
-       "uartb3_ucts",
-       "uartb3_urts",
-       "uartb3_urxd",
-       "uartb3_utxd",
-       "uartb4_ucts",
-       "uartb4_urts",
-       "uartb4_urxd",
-       "uartb4_utxd",
-       "vc_cam1_scl",
-       "vc_cam1_sda",
-       "vc_cam2_scl",
-       "vc_cam2_sda",
-       "vc_cam3_scl",
-       "vc_cam3_sda",
-};
-
-/* Every pin can implement all ALT1-ALT4 functions */
-#define CAPRI_PIN_FUNCTION(fcn_name)                   \
-{                                                      \
-       .name = #fcn_name,                              \
-       .groups = capri_alt_groups,                     \
-       .ngroups = ARRAY_SIZE(capri_alt_groups),        \
-}
-
-static const struct capri_pin_function capri_functions[] = {
-       CAPRI_PIN_FUNCTION(alt1),
-       CAPRI_PIN_FUNCTION(alt2),
-       CAPRI_PIN_FUNCTION(alt3),
-       CAPRI_PIN_FUNCTION(alt4),
-};
-
-static struct capri_pinctrl_data capri_pinctrl = {
-       .pins = capri_pinctrl_pins,
-       .npins = ARRAY_SIZE(capri_pinctrl_pins),
-       .functions = capri_functions,
-       .nfunctions = ARRAY_SIZE(capri_functions),
-};
-
-static inline enum capri_pin_type pin_type_get(struct pinctrl_dev *pctldev,
-                                              unsigned pin)
-{
-       struct capri_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
-
-       if (pin >= pdata->npins)
-               return CAPRI_PIN_TYPE_UNKNOWN;
-
-       return *(enum capri_pin_type *)(pdata->pins[pin].drv_data);
-}
-
-#define CAPRI_PIN_SHIFT(type, param) \
-       (CAPRI_ ## type ## _PIN_REG_ ## param ## _SHIFT)
-
-#define CAPRI_PIN_MASK(type, param) \
-       (CAPRI_ ## type ## _PIN_REG_ ## param ## _MASK)
-
-/*
- * This helper function is used to build up the value and mask used to write to
- * a pin register, but does not actually write to the register.
- */
-static inline void capri_pin_update(u32 *reg_val, u32 *reg_mask, u32 param_val,
-                                   u32 param_shift, u32 param_mask)
-{
-       *reg_val &= ~param_mask;
-       *reg_val |= (param_val << param_shift) & param_mask;
-       *reg_mask |= param_mask;
-}
-
-static struct regmap_config capri_pinctrl_regmap_config = {
-       .reg_bits = 32,
-       .reg_stride = 4,
-       .val_bits = 32,
-       .max_register = CAPRI_PIN_VC_CAM3_SDA,
-};
-
-static int capri_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
-{
-       struct capri_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
-
-       return pdata->npins;
-}
-
-static const char *capri_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
-                                               unsigned group)
-{
-       struct capri_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
-
-       return pdata->pins[group].name;
-}
-
-static int capri_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
-                                       unsigned group,
-                                       const unsigned **pins,
-                                       unsigned *num_pins)
-{
-       struct capri_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
-
-       *pins = &pdata->pins[group].number;
-       *num_pins = 1;
-
-       return 0;
-}
-
-static void capri_pinctrl_pin_dbg_show(struct pinctrl_dev *pctldev,
-                                      struct seq_file *s,
-                                      unsigned offset)
-{
-       seq_printf(s, " %s", dev_name(pctldev->dev));
-}
-
-static struct pinctrl_ops capri_pinctrl_ops = {
-       .get_groups_count = capri_pinctrl_get_groups_count,
-       .get_group_name = capri_pinctrl_get_group_name,
-       .get_group_pins = capri_pinctrl_get_group_pins,
-       .pin_dbg_show = capri_pinctrl_pin_dbg_show,
-       .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
-       .dt_free_map = pinctrl_utils_dt_free_map,
-};
-
-static int capri_pinctrl_get_fcns_count(struct pinctrl_dev *pctldev)
-{
-       struct capri_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
-
-       return pdata->nfunctions;
-}
-
-static const char *capri_pinctrl_get_fcn_name(struct pinctrl_dev *pctldev,
-                                             unsigned function)
-{
-       struct capri_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
-
-       return pdata->functions[function].name;
-}
-
-static int capri_pinctrl_get_fcn_groups(struct pinctrl_dev *pctldev,
-                                       unsigned function,
-                                       const char * const **groups,
-                                       unsigned * const num_groups)
-{
-       struct capri_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
-
-       *groups = pdata->functions[function].groups;
-       *num_groups = pdata->functions[function].ngroups;
-
-       return 0;
-}
-
-static int capri_pinmux_enable(struct pinctrl_dev *pctldev,
-                              unsigned function,
-                              unsigned group)
-{
-       struct capri_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
-       const struct capri_pin_function *f = &pdata->functions[function];
-       u32 offset = 4 * pdata->pins[group].number;
-       int rc = 0;
-
-       dev_dbg(pctldev->dev,
-               "%s(): Enable function %s (%d) of pin %s (%d) @offset 0x%x.\n",
-               __func__, f->name, function, pdata->pins[group].name,
-               pdata->pins[group].number, offset);
-
-       rc = regmap_update_bits(pdata->regmap, offset, CAPRI_PIN_REG_F_SEL_MASK,
-                       function << CAPRI_PIN_REG_F_SEL_SHIFT);
-       if (rc)
-               dev_err(pctldev->dev,
-                       "Error updating register for pin %s (%d).\n",
-                       pdata->pins[group].name, pdata->pins[group].number);
-
-       return rc;
-}
-
-static struct pinmux_ops capri_pinctrl_pinmux_ops = {
-       .get_functions_count = capri_pinctrl_get_fcns_count,
-       .get_function_name = capri_pinctrl_get_fcn_name,
-       .get_function_groups = capri_pinctrl_get_fcn_groups,
-       .enable = capri_pinmux_enable,
-};
-
-static int capri_pinctrl_pin_config_get(struct pinctrl_dev *pctldev,
-                                       unsigned pin,
-                                       unsigned long *config)
-{
-       return -ENOTSUPP;
-}
-
-
-/* Goes through the configs and update register val/mask */
-static int capri_std_pin_update(struct pinctrl_dev *pctldev,
-                               unsigned pin,
-                               unsigned long *configs,
-                               unsigned num_configs,
-                               u32 *val,
-                               u32 *mask)
-{
-       struct capri_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
-       int i;
-       enum pin_config_param param;
-       u16 arg;
-
-       for (i = 0; i < num_configs; i++) {
-               param = pinconf_to_config_param(configs[i]);
-               arg = pinconf_to_config_argument(configs[i]);
-
-               switch (param) {
-               case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
-                       arg = (arg >= 1 ? 1 : 0);
-                       capri_pin_update(val, mask, arg,
-                                       CAPRI_PIN_SHIFT(STD, HYST),
-                                       CAPRI_PIN_MASK(STD, HYST));
-                       break;
-               /*
-                * The pin bias can only be one of pull-up, pull-down, or
-                * disable.  The user does not need to specify a value for the
-                * property, and the default value from pinconf-generic is
-                * ignored.
-                */
-               case PIN_CONFIG_BIAS_DISABLE:
-                       capri_pin_update(val, mask, 0,
-                                       CAPRI_PIN_SHIFT(STD, PULL_UP),
-                                       CAPRI_PIN_MASK(STD, PULL_UP));
-                       capri_pin_update(val, mask, 0,
-                                       CAPRI_PIN_SHIFT(STD, PULL_DN),
-                                       CAPRI_PIN_MASK(STD, PULL_DN));
-                       break;
-
-               case PIN_CONFIG_BIAS_PULL_UP:
-                       capri_pin_update(val, mask, 1,
-                                       CAPRI_PIN_SHIFT(STD, PULL_UP),
-                                       CAPRI_PIN_MASK(STD, PULL_UP));
-                       capri_pin_update(val, mask, 0,
-                                       CAPRI_PIN_SHIFT(STD, PULL_DN),
-                                       CAPRI_PIN_MASK(STD, PULL_DN));
-                       break;
-
-               case PIN_CONFIG_BIAS_PULL_DOWN:
-                       capri_pin_update(val, mask, 0,
-                                       CAPRI_PIN_SHIFT(STD, PULL_UP),
-                                       CAPRI_PIN_MASK(STD, PULL_UP));
-                       capri_pin_update(val, mask, 1,
-                                       CAPRI_PIN_SHIFT(STD, PULL_DN),
-                                       CAPRI_PIN_MASK(STD, PULL_DN));
-                       break;
-
-               case PIN_CONFIG_SLEW_RATE:
-                       arg = (arg >= 1 ? 1 : 0);
-                       capri_pin_update(val, mask, arg,
-                                       CAPRI_PIN_SHIFT(STD, SLEW),
-                                       CAPRI_PIN_MASK(STD, SLEW));
-                       break;
-
-               case PIN_CONFIG_INPUT_ENABLE:
-                       /* inversed since register is for input _disable_ */
-                       arg = (arg >= 1 ? 0 : 1);
-                       capri_pin_update(val, mask, arg,
-                                       CAPRI_PIN_SHIFT(STD, INPUT_DIS),
-                                       CAPRI_PIN_MASK(STD, INPUT_DIS));
-                       break;
-
-               case PIN_CONFIG_DRIVE_STRENGTH:
-                       /* Valid range is 2-16 mA, even numbers only */
-                       if ((arg < 2) || (arg > 16) || (arg % 2)) {
-                               dev_err(pctldev->dev,
-                                       "Invalid Drive Strength value (%d) for "
-                                       "pin %s (%d). Valid values are "
-                                       "(2..16) mA, even numbers only.\n",
-                                       arg, pdata->pins[pin].name, pin);
-                               return -EINVAL;
-                       }
-                       capri_pin_update(val, mask, (arg/2)-1,
-                                       CAPRI_PIN_SHIFT(STD, DRV_STR),
-                                       CAPRI_PIN_MASK(STD, DRV_STR));
-                       break;
-
-               default:
-                       dev_err(pctldev->dev,
-                               "Unrecognized pin config %d for pin %s (%d).\n",
-                               param, pdata->pins[pin].name, pin);
-                       return -EINVAL;
-
-               } /* switch config */
-       } /* for each config */
-
-       return 0;
-}
-
-/*
- * The pull-up strength for an I2C pin is represented by bits 4-6 in the
- * register with the following mapping:
- *   0b000: No pull-up
- *   0b001: 1200 Ohm
- *   0b010: 1800 Ohm
- *   0b011: 720 Ohm
- *   0b100: 2700 Ohm
- *   0b101: 831 Ohm
- *   0b110: 1080 Ohm
- *   0b111: 568 Ohm
- * This array maps pull-up strength in Ohms to register values (1+index).
- */
-static const u16 capri_pullup_map[] = {1200, 1800, 720, 2700, 831, 1080, 568};
-
-/* Goes through the configs and update register val/mask */
-static int capri_i2c_pin_update(struct pinctrl_dev *pctldev,
-                               unsigned pin,
-                               unsigned long *configs,
-                               unsigned num_configs,
-                               u32 *val,
-                               u32 *mask)
-{
-       struct capri_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
-       int i, j;
-       enum pin_config_param param;
-       u16 arg;
-
-       for (i = 0; i < num_configs; i++) {
-               param = pinconf_to_config_param(configs[i]);
-               arg = pinconf_to_config_argument(configs[i]);
-
-               switch (param) {
-               case PIN_CONFIG_BIAS_PULL_UP:
-                       for (j = 0; j < ARRAY_SIZE(capri_pullup_map); j++)
-                               if (capri_pullup_map[j] == arg)
-                                       break;
-
-                       if (j == ARRAY_SIZE(capri_pullup_map)) {
-                               dev_err(pctldev->dev,
-                                       "Invalid pull-up value (%d) for pin %s "
-                                       "(%d). Valid values are 568, 720, 831, "
-                                       "1080, 1200, 1800, 2700 Ohms.\n",
-                                       arg, pdata->pins[pin].name, pin);
-                               return -EINVAL;
-                       }
-
-                       capri_pin_update(val, mask, j+1,
-                                       CAPRI_PIN_SHIFT(I2C, PULL_UP_STR),
-                                       CAPRI_PIN_MASK(I2C, PULL_UP_STR));
-                       break;
-
-               case PIN_CONFIG_BIAS_DISABLE:
-                       capri_pin_update(val, mask, 0,
-                                       CAPRI_PIN_SHIFT(I2C, PULL_UP_STR),
-                                       CAPRI_PIN_MASK(I2C, PULL_UP_STR));
-                       break;
-
-               case PIN_CONFIG_SLEW_RATE:
-                       arg = (arg >= 1 ? 1 : 0);
-                       capri_pin_update(val, mask, arg,
-                                       CAPRI_PIN_SHIFT(I2C, SLEW),
-                                       CAPRI_PIN_MASK(I2C, SLEW));
-                       break;
-
-               case PIN_CONFIG_INPUT_ENABLE:
-                       /* inversed since register is for input _disable_ */
-                       arg = (arg >= 1 ? 0 : 1);
-                       capri_pin_update(val, mask, arg,
-                                       CAPRI_PIN_SHIFT(I2C, INPUT_DIS),
-                                       CAPRI_PIN_MASK(I2C, INPUT_DIS));
-                       break;
-
-               default:
-                       dev_err(pctldev->dev,
-                               "Unrecognized pin config %d for pin %s (%d).\n",
-                               param, pdata->pins[pin].name, pin);
-                       return -EINVAL;
-
-               } /* switch config */
-       } /* for each config */
-
-       return 0;
-}
-
-/* Goes through the configs and update register val/mask */
-static int capri_hdmi_pin_update(struct pinctrl_dev *pctldev,
-                                unsigned pin,
-                                unsigned long *configs,
-                                unsigned num_configs,
-                                u32 *val,
-                                u32 *mask)
-{
-       struct capri_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
-       int i;
-       enum pin_config_param param;
-       u16 arg;
-
-       for (i = 0; i < num_configs; i++) {
-               param = pinconf_to_config_param(configs[i]);
-               arg = pinconf_to_config_argument(configs[i]);
-
-               switch (param) {
-               case PIN_CONFIG_SLEW_RATE:
-                       arg = (arg >= 1 ? 1 : 0);
-                       capri_pin_update(val, mask, arg,
-                                       CAPRI_PIN_SHIFT(HDMI, MODE),
-                                       CAPRI_PIN_MASK(HDMI, MODE));
-                       break;
-
-               case PIN_CONFIG_INPUT_ENABLE:
-                       /* inversed since register is for input _disable_ */
-                       arg = (arg >= 1 ? 0 : 1);
-                       capri_pin_update(val, mask, arg,
-                                       CAPRI_PIN_SHIFT(HDMI, INPUT_DIS),
-                                       CAPRI_PIN_MASK(HDMI, INPUT_DIS));
-                       break;
-
-               default:
-                       dev_err(pctldev->dev,
-                               "Unrecognized pin config %d for pin %s (%d).\n",
-                               param, pdata->pins[pin].name, pin);
-                       return -EINVAL;
-
-               } /* switch config */
-       } /* for each config */
-
-       return 0;
-}
-
-static int capri_pinctrl_pin_config_set(struct pinctrl_dev *pctldev,
-                                       unsigned pin,
-                                       unsigned long *configs,
-                                       unsigned num_configs)
-{
-       struct capri_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
-       enum capri_pin_type pin_type;
-       u32 offset = 4 * pin;
-       u32 cfg_val, cfg_mask;
-       int rc;
-
-       cfg_val = 0;
-       cfg_mask = 0;
-       pin_type = pin_type_get(pctldev, pin);
-
-       /* Different pins have different configuration options */
-       switch (pin_type) {
-       case CAPRI_PIN_TYPE_STD:
-               rc = capri_std_pin_update(pctldev, pin, configs, num_configs,
-                       &cfg_val, &cfg_mask);
-               break;
-
-       case CAPRI_PIN_TYPE_I2C:
-               rc = capri_i2c_pin_update(pctldev, pin, configs, num_configs,
-                       &cfg_val, &cfg_mask);
-               break;
-
-       case CAPRI_PIN_TYPE_HDMI:
-               rc = capri_hdmi_pin_update(pctldev, pin, configs, num_configs,
-                       &cfg_val, &cfg_mask);
-               break;
-
-       default:
-               dev_err(pctldev->dev, "Unknown pin type for pin %s (%d).\n",
-                       pdata->pins[pin].name, pin);
-               return -EINVAL;
-
-       } /* switch pin type */
-
-       if (rc)
-               return rc;
-
-       dev_dbg(pctldev->dev,
-               "%s(): Set pin %s (%d) with config 0x%x, mask 0x%x\n",
-               __func__, pdata->pins[pin].name, pin, cfg_val, cfg_mask);
-
-       rc = regmap_update_bits(pdata->regmap, offset, cfg_mask, cfg_val);
-       if (rc) {
-               dev_err(pctldev->dev,
-                       "Error updating register for pin %s (%d).\n",
-                       pdata->pins[pin].name, pin);
-               return rc;
-       }
-
-       return 0;
-}
-
-static struct pinconf_ops capri_pinctrl_pinconf_ops = {
-       .pin_config_get = capri_pinctrl_pin_config_get,
-       .pin_config_set = capri_pinctrl_pin_config_set,
-};
-
-static struct pinctrl_desc capri_pinctrl_desc = {
-       /* name, pins, npins members initialized in probe function */
-       .pctlops = &capri_pinctrl_ops,
-       .pmxops = &capri_pinctrl_pinmux_ops,
-       .confops = &capri_pinctrl_pinconf_ops,
-       .owner = THIS_MODULE,
-};
-
-int __init capri_pinctrl_probe(struct platform_device *pdev)
-{
-       struct capri_pinctrl_data *pdata = &capri_pinctrl;
-       struct resource *res;
-       struct pinctrl_dev *pctl;
-
-       /* So far We can assume there is only 1 bank of registers */
-       res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-       if (!res) {
-               dev_err(&pdev->dev, "Missing MEM resource\n");
-               return -ENODEV;
-       }
-
-       pdata->reg_base = devm_ioremap_resource(&pdev->dev, res);
-       if (IS_ERR(pdata->reg_base)) {
-               dev_err(&pdev->dev, "Failed to ioremap MEM resource\n");
-               return -ENODEV;
-       }
-
-       /* Initialize the dynamic part of pinctrl_desc */
-       pdata->regmap = devm_regmap_init_mmio(&pdev->dev, pdata->reg_base,
-               &capri_pinctrl_regmap_config);
-       if (IS_ERR(pdata->regmap)) {
-               dev_err(&pdev->dev, "Regmap MMIO init failed.\n");
-               return -ENODEV;
-       }
-
-       capri_pinctrl_desc.name = dev_name(&pdev->dev);
-       capri_pinctrl_desc.pins = capri_pinctrl.pins;
-       capri_pinctrl_desc.npins = capri_pinctrl.npins;
-
-       pctl = pinctrl_register(&capri_pinctrl_desc,
-                               &pdev->dev,
-                               pdata);
-       if (!pctl) {
-               dev_err(&pdev->dev, "Failed to register pinctrl\n");
-               return -ENODEV;
-       }
-
-       platform_set_drvdata(pdev, pdata);
-
-       return 0;
-}
-
-static struct of_device_id capri_pinctrl_of_match[] = {
-       { .compatible = "brcm,bcm11351-pinctrl", },
-       { },
-};
-
-static struct platform_driver capri_pinctrl_driver = {
-       .driver = {
-               .name = "bcm-capri-pinctrl",
-               .owner = THIS_MODULE,
-               .of_match_table = capri_pinctrl_of_match,
-       },
-};
-
-module_platform_driver_probe(capri_pinctrl_driver, capri_pinctrl_probe);
-
-MODULE_AUTHOR("Sherman Yin <syin@broadcom.com>");
-MODULE_DESCRIPTION("Broadcom Capri pinctrl driver");
-MODULE_LICENSE("GPL v2");
index 38d579b47f312763fc8986a4be4e911abc95178e..e43fbce56598a65bd10dcbcafc56709ea7f746a1 100644 (file)
@@ -665,7 +665,10 @@ static void msm_gpio_irq_ack(struct irq_data *d)
        spin_lock_irqsave(&pctrl->lock, flags);
 
        val = readl(pctrl->regs + g->intr_status_reg);
-       val &= ~BIT(g->intr_status_bit);
+       if (g->intr_ack_high)
+               val |= BIT(g->intr_status_bit);
+       else
+               val &= ~BIT(g->intr_status_bit);
        writel(val, pctrl->regs + g->intr_status_reg);
 
        if (test_bit(d->hwirq, pctrl->dual_edge_irqs))
@@ -744,6 +747,7 @@ static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int type)
                        break;
                case IRQ_TYPE_EDGE_BOTH:
                        val |= BIT(g->intr_detection_bit);
+                       val |= BIT(g->intr_polarity_bit);
                        break;
                case IRQ_TYPE_LEVEL_LOW:
                        break;
index 8fbe9fb19f36e993e34d712c02a47a530a3b915b..6e26f1b676d75f9de3d90bcb3c1f48b1bda7d095 100644 (file)
@@ -84,6 +84,7 @@ struct msm_pingroup {
 
        unsigned intr_enable_bit:5;
        unsigned intr_status_bit:5;
+       unsigned intr_ack_high:1;
 
        unsigned intr_target_bit:5;
        unsigned intr_raw_status_bit:5;
index 208341fd57d27f9f7dc3ed3df63783bac5a09fd1..8f6f16ef73f3e0da427283aaafe835180b91f9c8 100644 (file)
@@ -877,7 +877,6 @@ static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
        struct nmk_gpio_chip *nmk_chip = container_of(chip, struct nmk_gpio_chip, chip);
        u32 status;
 
-       pr_err("PLONK IRQ %d\n", irq);
        clk_enable(nmk_chip->clk);
        status = readl(nmk_chip->addr + NMK_GPIO_IS);
        clk_disable(nmk_chip->clk);
index 46dddc159286387dbbbe979d729d4d00cf159d43..96c60d230c13e1e749687f23266e0e4944852d69 100644 (file)
@@ -342,7 +342,7 @@ static const struct pinctrl_ops rockchip_pctrl_ops = {
  * @pin: pin to change
  * @mux: new mux function to set
  */
-static void rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
+static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
 {
        struct rockchip_pinctrl *info = bank->drvdata;
        void __iomem *reg = info->reg_base + info->ctrl->mux_offset;
@@ -350,6 +350,20 @@ static void rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
        u8 bit;
        u32 data;
 
+       /*
+        * The first 16 pins of rk3188_bank0 are always gpios and do not have
+        * a mux register at all.
+        */
+       if (bank->bank_type == RK3188_BANK0 && pin < 16) {
+               if (mux != RK_FUNC_GPIO) {
+                       dev_err(info->dev,
+                               "pin %d only supports a gpio mux\n", pin);
+                       return -ENOTSUPP;
+               } else {
+                       return 0;
+               }
+       }
+
        dev_dbg(info->dev, "setting mux of GPIO%d-%d to %d\n",
                                                bank->bank_num, pin, mux);
 
@@ -365,6 +379,8 @@ static void rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
        writel(data, reg);
 
        spin_unlock_irqrestore(&bank->slock, flags);
+
+       return 0;
 }
 
 #define RK2928_PULL_OFFSET             0x118
@@ -560,7 +576,7 @@ static int rockchip_pmx_enable(struct pinctrl_dev *pctldev, unsigned selector,
        const unsigned int *pins = info->groups[group].pins;
        const struct rockchip_pin_config *data = info->groups[group].data;
        struct rockchip_pin_bank *bank;
-       int cnt;
+       int cnt, ret = 0;
 
        dev_dbg(info->dev, "enable function %s group %s\n",
                info->functions[selector].name, info->groups[group].name);
@@ -571,8 +587,18 @@ static int rockchip_pmx_enable(struct pinctrl_dev *pctldev, unsigned selector,
         */
        for (cnt = 0; cnt < info->groups[group].npins; cnt++) {
                bank = pin_to_bank(info, pins[cnt]);
-               rockchip_set_mux(bank, pins[cnt] - bank->pin_base,
-                                data[cnt].func);
+               ret = rockchip_set_mux(bank, pins[cnt] - bank->pin_base,
+                                      data[cnt].func);
+               if (ret)
+                       break;
+       }
+
+       if (ret) {
+               /* revert the already done pin settings */
+               for (cnt--; cnt >= 0; cnt--)
+                       rockchip_set_mux(bank, pins[cnt] - bank->pin_base, 0);
+
+               return ret;
        }
 
        return 0;
@@ -607,7 +633,7 @@ static int rockchip_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
        struct rockchip_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
        struct rockchip_pin_bank *bank;
        struct gpio_chip *chip;
-       int pin;
+       int pin, ret;
        u32 data;
 
        chip = range->gc;
@@ -617,7 +643,9 @@ static int rockchip_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
        dev_dbg(info->dev, "gpio_direction for pin %u as %s-%d to %s\n",
                 offset, range->name, pin, input ? "input" : "output");
 
-       rockchip_set_mux(bank, pin, RK_FUNC_GPIO);
+       ret = rockchip_set_mux(bank, pin, RK_FUNC_GPIO);
+       if (ret < 0)
+               return ret;
 
        data = readl_relaxed(bank->reg_base + GPIO_SWPORT_DDR);
        /* set bit to 1 for output, 0 for input */
@@ -1144,9 +1172,13 @@ static int rockchip_irq_set_type(struct irq_data *d, unsigned int type)
        u32 polarity;
        u32 level;
        u32 data;
+       int ret;
 
        /* make sure the pin is configured as gpio input */
-       rockchip_set_mux(bank, d->hwirq, RK_FUNC_GPIO);
+       ret = rockchip_set_mux(bank, d->hwirq, RK_FUNC_GPIO);
+       if (ret < 0)
+               return ret;
+
        data = readl_relaxed(bank->reg_base + GPIO_SWPORT_DDR);
        data &= ~mask;
        writel_relaxed(data, bank->reg_base + GPIO_SWPORT_DDR);
@@ -1534,7 +1566,7 @@ static struct rockchip_pin_ctrl rk3188_pin_ctrl = {
                .nr_banks               = ARRAY_SIZE(rk3188_pin_banks),
                .label                  = "RK3188-GPIO",
                .type                   = RK3188,
-               .mux_offset             = 0x68,
+               .mux_offset             = 0x60,
                .pull_calc_reg          = rk3188_calc_pull_reg_and_bit,
 };
 
index 81075f2a1d3f87d9ac9d2cf4d62edf94e21bf75f..2960557bfed95c6d79f316c020ec98c426f38f83 100644 (file)
@@ -810,6 +810,7 @@ static const struct pinconf_ops pcs_pinconf_ops = {
 static int pcs_add_pin(struct pcs_device *pcs, unsigned offset,
                unsigned pin_pos)
 {
+       struct pcs_soc_data *pcs_soc = &pcs->socdata;
        struct pinctrl_pin_desc *pin;
        struct pcs_name *pn;
        int i;
@@ -821,6 +822,18 @@ static int pcs_add_pin(struct pcs_device *pcs, unsigned offset,
                return -ENOMEM;
        }
 
+       if (pcs_soc->irq_enable_mask) {
+               unsigned val;
+
+               val = pcs->read(pcs->base + offset);
+               if (val & pcs_soc->irq_enable_mask) {
+                       dev_dbg(pcs->dev, "irq enabled at boot for pin at %lx (%x), clearing\n",
+                               (unsigned long)pcs->res->start + offset, val);
+                       val &= ~pcs_soc->irq_enable_mask;
+                       pcs->write(val, pcs->base + offset);
+               }
+       }
+
        pin = &pcs->pins.pa[i];
        pn = &pcs->names[i];
        sprintf(pn->name, "%lx.%d",
index c5e0f6973a3b06c3e197eccbe7ba917a27d1c3ec..26ca6855f478d3018f79ab8aab87550e1eb52610 100644 (file)
@@ -629,9 +629,8 @@ static int tb10x_gpio_request_enable(struct pinctrl_dev *pctl,
         */
        for (i = 0; i < state->pinfuncgrpcnt; i++) {
                const struct tb10x_pinfuncgrp *pfg = &state->pingroups[i];
-               unsigned int port = pfg->port;
                unsigned int mode = pfg->mode;
-               int j;
+               int j, port = pfg->port;
 
                /*
                 * Skip pin groups which are always mapped and don't need
index 48093719167abd91e27f93eb869eab3f1edd5c51..f5cd3f9618083bacca6414489db5e83b3dc128d9 100644 (file)
@@ -4794,8 +4794,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
                FN_MSIOF0_SCK_B, 0,
                /* IP5_23_21 [3] */
                FN_WE1_N, FN_IERX, FN_CAN1_RX, FN_VI1_G4,
-               FN_VI1_G4_B, FN_VI2_R6, FN_SCIFA0_CTS_N_B,
-               FN_IERX_C, 0,
+               FN_VI1_G4_B, FN_VI2_R6, FN_SCIFA0_CTS_N_B, FN_IERX_C,
                /* IP5_20_18 [3] */
                FN_WE0_N, FN_IECLK, FN_CAN_CLK,
                FN_VI2_VSYNC_N, FN_SCIFA0_TXD_B, FN_VI2_VSYNC_N_B, 0, 0,
index 5186d70c49d43326bc0a3e1f0405332d512cb989..7868bf3a0f911dccfbe7b516c469ac63f6422e4c 100644 (file)
@@ -5288,7 +5288,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
                /* SEL_SCIF3 [2] */
                FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, FN_SEL_SCIF3_2, FN_SEL_SCIF3_3,
                /* SEL_IEB [2] */
-               FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2,
+               FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2, 0,
                /* SEL_MMC [1] */
                FN_SEL_MMC_0, FN_SEL_MMC_1,
                /* SEL_SCIF5 [1] */
index 9f611cbbc294ea8c5ae84023e132e02152e36f85..c31aa07b3ba55541ff434adf45aed76adb0adee3 100644 (file)
@@ -83,8 +83,7 @@ static int pnpacpi_set_resources(struct pnp_dev *dev)
 {
        struct acpi_device *acpi_dev;
        acpi_handle handle;
-       struct acpi_buffer buffer;
-       int ret;
+       int ret = 0;
 
        pnp_dbg(&dev->dev, "set resources\n");
 
@@ -97,19 +96,26 @@ static int pnpacpi_set_resources(struct pnp_dev *dev)
        if (WARN_ON_ONCE(acpi_dev != dev->data))
                dev->data = acpi_dev;
 
-       ret = pnpacpi_build_resource_template(dev, &buffer);
-       if (ret)
-               return ret;
-       ret = pnpacpi_encode_resources(dev, &buffer);
-       if (ret) {
+       if (acpi_has_method(handle, METHOD_NAME__SRS)) {
+               struct acpi_buffer buffer;
+
+               ret = pnpacpi_build_resource_template(dev, &buffer);
+               if (ret)
+                       return ret;
+
+               ret = pnpacpi_encode_resources(dev, &buffer);
+               if (!ret) {
+                       acpi_status status;
+
+                       status = acpi_set_current_resources(handle, &buffer);
+                       if (ACPI_FAILURE(status))
+                               ret = -EIO;
+               }
                kfree(buffer.pointer);
-               return ret;
        }
-       if (ACPI_FAILURE(acpi_set_current_resources(handle, &buffer)))
-               ret = -EINVAL;
-       else if (acpi_bus_power_manageable(handle))
+       if (!ret && acpi_bus_power_manageable(handle))
                ret = acpi_bus_set_power(handle, ACPI_STATE_D0);
-       kfree(buffer.pointer);
+
        return ret;
 }
 
@@ -117,7 +123,7 @@ static int pnpacpi_disable_resources(struct pnp_dev *dev)
 {
        struct acpi_device *acpi_dev;
        acpi_handle handle;
-       int ret;
+       acpi_status status;
 
        dev_dbg(&dev->dev, "disable resources\n");
 
@@ -128,13 +134,15 @@ static int pnpacpi_disable_resources(struct pnp_dev *dev)
        }
 
        /* acpi_unregister_gsi(pnp_irq(dev, 0)); */
-       ret = 0;
        if (acpi_bus_power_manageable(handle))
                acpi_bus_set_power(handle, ACPI_STATE_D3_COLD);
-               /* continue even if acpi_bus_set_power() fails */
-       if (ACPI_FAILURE(acpi_evaluate_object(handle, "_DIS", NULL, NULL)))
-               ret = -ENODEV;
-       return ret;
+
+       /* continue even if acpi_bus_set_power() fails */
+       status = acpi_evaluate_object(handle, "_DIS", NULL, NULL);
+       if (ACPI_FAILURE(status) && status != AE_NOT_FOUND)
+               return -ENODEV;
+
+       return 0;
 }
 
 #ifdef CONFIG_ACPI_SLEEP
index 258fef272ea7d6b61faa565260c8fc7b7a4f995d..ebf0d6710b5a0d4150627313a3edca99e50a8745 100644 (file)
@@ -15,6 +15,7 @@
 
 #include <linux/types.h>
 #include <linux/kernel.h>
+#include <linux/pci.h>
 #include <linux/string.h>
 #include <linux/slab.h>
 #include <linux/pnp.h>
@@ -334,6 +335,81 @@ static void quirk_amd_mmconfig_area(struct pnp_dev *dev)
 }
 #endif
 
+#ifdef CONFIG_PCI
+/* Device IDs of parts that have 32KB MCH space */
+static const unsigned int mch_quirk_devices[] = {
+       0x0154, /* Ivy Bridge */
+       0x0c00, /* Haswell */
+};
+
+static struct pci_dev *get_intel_host(void)
+{
+       int i;
+       struct pci_dev *host;
+
+       for (i = 0; i < ARRAY_SIZE(mch_quirk_devices); i++) {
+               host = pci_get_device(PCI_VENDOR_ID_INTEL, mch_quirk_devices[i],
+                                     NULL);
+               if (host)
+                       return host;
+       }
+       return NULL;
+}
+
+static void quirk_intel_mch(struct pnp_dev *dev)
+{
+       struct pci_dev *host;
+       u32 addr_lo, addr_hi;
+       struct pci_bus_region region;
+       struct resource mch;
+       struct pnp_resource *pnp_res;
+       struct resource *res;
+
+       host = get_intel_host();
+       if (!host)
+               return;
+
+       /*
+        * MCHBAR is not an architected PCI BAR, so MCH space is usually
+        * reported as a PNP0C02 resource.  The MCH space was originally
+        * 16KB, but is 32KB in newer parts.  Some BIOSes still report a
+        * PNP0C02 resource that is only 16KB, which means the rest of the
+        * MCH space is consumed but unreported.
+        */
+
+       /*
+        * Read MCHBAR for Host Member Mapped Register Range Base
+        * https://www-ssl.intel.com/content/www/us/en/processors/core/4th-gen-core-family-desktop-vol-2-datasheet
+        * Sec 3.1.12.
+        */
+       pci_read_config_dword(host, 0x48, &addr_lo);
+       region.start = addr_lo & ~0x7fff;
+       pci_read_config_dword(host, 0x4c, &addr_hi);
+       region.start |= (u64) addr_hi << 32;
+       region.end = region.start + 32*1024 - 1;
+
+       memset(&mch, 0, sizeof(mch));
+       mch.flags = IORESOURCE_MEM;
+       pcibios_bus_to_resource(host->bus, &mch, &region);
+
+       list_for_each_entry(pnp_res, &dev->resources, list) {
+               res = &pnp_res->res;
+               if (res->end < mch.start || res->start > mch.end)
+                       continue;       /* no overlap */
+               if (res->start == mch.start && res->end == mch.end)
+                       continue;       /* exact match */
+
+               dev_info(&dev->dev, FW_BUG "PNP resource %pR covers only part of %s Intel MCH; extending to %pR\n",
+                        res, pci_name(host), &mch);
+               res->start = mch.start;
+               res->end = mch.end;
+               break;
+       }
+
+       pci_dev_put(host);
+}
+#endif
+
 /*
  *  PnP Quirks
  *  Cards or devices that need some tweaking due to incomplete resource info
@@ -363,6 +439,9 @@ static struct pnp_fixup pnp_fixups[] = {
        {"PNP0c02", quirk_system_pci_resources},
 #ifdef CONFIG_AMD_NB
        {"PNP0c01", quirk_amd_mmconfig_area},
+#endif
+#ifdef CONFIG_PCI
+       {"PNP0c02", quirk_intel_mch},
 #endif
        {""}
 };
index 476aa495c110d5814fdf2e3c4ba331cb026baf4f..b95cf71ed69554e8b7c53d77271ba92e39b1e039 100644 (file)
@@ -11,7 +11,7 @@
  * Copyright (C) 2012 ARM Limited
  */
 
-#include <linux/jiffies.h>
+#include <linux/delay.h>
 #include <linux/of.h>
 #include <linux/of_device.h>
 #include <linux/platform_device.h>
 static void vexpress_reset_do(struct device *dev, const char *what)
 {
        int err = -ENOENT;
-       struct vexpress_config_func *func =
-                       vexpress_config_func_get_by_dev(dev);
+       struct vexpress_config_func *func = dev_get_drvdata(dev);
 
        if (func) {
-               unsigned long timeout;
-
                err = vexpress_config_write(func, 0, 0);
-
-               timeout = jiffies + HZ;
-               while (time_before(jiffies, timeout))
-                       cpu_relax();
+               if (!err)
+                       mdelay(1000);
        }
 
        dev_emerg(dev, "Unable to %s (%d)\n", what, err);
@@ -96,12 +91,18 @@ static int vexpress_reset_probe(struct platform_device *pdev)
        enum vexpress_reset_func func;
        const struct of_device_id *match =
                        of_match_device(vexpress_reset_of_match, &pdev->dev);
+       struct vexpress_config_func *config_func;
 
        if (match)
                func = (enum vexpress_reset_func)match->data;
        else
                func = pdev->id_entry->driver_data;
 
+       config_func = vexpress_config_func_get_by_dev(&pdev->dev);
+       if (!config_func)
+               return -EINVAL;
+       dev_set_drvdata(&pdev->dev, config_func);
+
        switch (func) {
        case FUNC_SHUTDOWN:
                vexpress_power_off_device = &pdev->dev;
index 8ad26b8bf4189deff46af5844b1f5c65ad21d0ff..cb2d4f0f97114b30cfa04cf29daf13dccf8cc3a7 100644 (file)
@@ -2,7 +2,7 @@
  * ST Microelectronics SPEAr Pulse Width Modulator driver
  *
  * Copyright (C) 2012 ST Microelectronics
- * Shiraz Hashim <shiraz.hashim@st.com>
+ * Shiraz Hashim <shiraz.linux.kernel@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
@@ -264,6 +264,6 @@ static struct platform_driver spear_pwm_driver = {
 module_platform_driver(spear_pwm_driver);
 
 MODULE_LICENSE("GPL");
-MODULE_AUTHOR("Shiraz Hashim <shiraz.hashim@st.com>");
+MODULE_AUTHOR("Shiraz Hashim <shiraz.linux.kernel@gmail.com>");
 MODULE_AUTHOR("Viresh Kumar <viresh.kumar@linaro.com>");
 MODULE_ALIAS("platform:spear-pwm");
index ded3b35742091dac92192c45f1c0e7f24565f924..6d38be3d970ca72b48d0a44c950da341071edb53 100644 (file)
@@ -38,66 +38,24 @@ struct pbias_reg_info {
 struct pbias_regulator_data {
        struct regulator_desc desc;
        void __iomem *pbias_addr;
-       unsigned int pbias_reg;
        struct regulator_dev *dev;
        struct regmap *syscon;
        const struct pbias_reg_info *info;
        int voltage;
 };
 
-static int pbias_regulator_set_voltage(struct regulator_dev *dev,
-                       int min_uV, int max_uV, unsigned *selector)
-{
-       struct pbias_regulator_data *data = rdev_get_drvdata(dev);
-       const struct pbias_reg_info *info = data->info;
-       int ret, vmode;
-
-       if (min_uV <= 1800000)
-               vmode = 0;
-       else if (min_uV > 1800000)
-               vmode = info->vmode;
-
-       ret = regmap_update_bits(data->syscon, data->pbias_reg,
-                                               info->vmode, vmode);
-
-       return ret;
-}
-
-static int pbias_regulator_get_voltage(struct regulator_dev *rdev)
-{
-       struct pbias_regulator_data *data = rdev_get_drvdata(rdev);
-       const struct pbias_reg_info *info = data->info;
-       int value, voltage;
-
-       regmap_read(data->syscon, data->pbias_reg, &value);
-       value &= info->vmode;
-
-       voltage = value ? 3000000 : 1800000;
-
-       return voltage;
-}
+static const unsigned int pbias_volt_table[] = {
+       1800000,
+       3000000
+};
 
 static int pbias_regulator_enable(struct regulator_dev *rdev)
 {
        struct pbias_regulator_data *data = rdev_get_drvdata(rdev);
        const struct pbias_reg_info *info = data->info;
-       int ret;
-
-       ret = regmap_update_bits(data->syscon, data->pbias_reg,
-                                       info->enable_mask, info->enable);
-
-       return ret;
-}
-
-static int pbias_regulator_disable(struct regulator_dev *rdev)
-{
-       struct pbias_regulator_data *data = rdev_get_drvdata(rdev);
-       const struct pbias_reg_info *info = data->info;
-       int ret;
 
-       ret = regmap_update_bits(data->syscon, data->pbias_reg,
-                                               info->enable_mask, 0);
-       return ret;
+       return regmap_update_bits(data->syscon, rdev->desc->enable_reg,
+                                 info->enable_mask, info->enable);
 }
 
 static int pbias_regulator_is_enable(struct regulator_dev *rdev)
@@ -106,17 +64,18 @@ static int pbias_regulator_is_enable(struct regulator_dev *rdev)
        const struct pbias_reg_info *info = data->info;
        int value;
 
-       regmap_read(data->syscon, data->pbias_reg, &value);
+       regmap_read(data->syscon, rdev->desc->enable_reg, &value);
 
-       return (value & info->enable_mask) == info->enable_mask;
+       return (value & info->enable_mask) == info->enable;
 }
 
 static struct regulator_ops pbias_regulator_voltage_ops = {
-       .set_voltage    = pbias_regulator_set_voltage,
-       .get_voltage    = pbias_regulator_get_voltage,
-       .enable         = pbias_regulator_enable,
-       .disable        = pbias_regulator_disable,
-       .is_enabled     = pbias_regulator_is_enable,
+       .list_voltage = regulator_list_voltage_table,
+       .get_voltage_sel = regulator_get_voltage_sel_regmap,
+       .set_voltage_sel = regulator_set_voltage_sel_regmap,
+       .enable = pbias_regulator_enable,
+       .disable = regulator_disable_regmap,
+       .is_enabled = pbias_regulator_is_enable,
 };
 
 static const struct pbias_reg_info pbias_mmc_omap2430 = {
@@ -192,6 +151,7 @@ static int pbias_regulator_probe(struct platform_device *pdev)
        if (IS_ERR(syscon))
                return PTR_ERR(syscon);
 
+       cfg.regmap = syscon;
        cfg.dev = &pdev->dev;
 
        for (idx = 0; idx < PBIAS_NUM_REGS && data_idx < count; idx++) {
@@ -207,15 +167,19 @@ static int pbias_regulator_probe(struct platform_device *pdev)
                if (!res)
                        return -EINVAL;
 
-               drvdata[data_idx].pbias_reg = res->start;
                drvdata[data_idx].syscon = syscon;
                drvdata[data_idx].info = info;
                drvdata[data_idx].desc.name = info->name;
                drvdata[data_idx].desc.owner = THIS_MODULE;
                drvdata[data_idx].desc.type = REGULATOR_VOLTAGE;
                drvdata[data_idx].desc.ops = &pbias_regulator_voltage_ops;
+               drvdata[data_idx].desc.volt_table = pbias_volt_table;
                drvdata[data_idx].desc.n_voltages = 2;
                drvdata[data_idx].desc.enable_time = info->enable_time;
+               drvdata[data_idx].desc.vsel_reg = res->start;
+               drvdata[data_idx].desc.vsel_mask = info->vmode;
+               drvdata[data_idx].desc.enable_reg = res->start;
+               drvdata[data_idx].desc.enable_mask = info->enable_mask;
 
                cfg.init_data = pbias_matches[idx].init_data;
                cfg.driver_data = &drvdata[data_idx];
index e6f6c41abe12d2cee4720d72313fc03c5dde4582..c93fd260447e552ef22b5c6f12e42df1c3ff5a92 100644 (file)
@@ -73,6 +73,7 @@ static const struct syscfg_reset_channel_data stih415_softresets[] = {
        [STIH415_USB0_SOFTRESET] = STIH415_SRST_REAR(SYSCFG_376, 9),
        [STIH415_USB1_SOFTRESET] = STIH415_SRST_REAR(SYSCFG_376, 10),
        [STIH415_USB2_SOFTRESET] = STIH415_SRST_REAR(SYSCFG_376, 11),
+       [STIH415_KEYSCAN_SOFTRESET] = STIH415_SRST_LPM(LPM_SYSCFG_1, 8),
 };
 
 static struct syscfg_reset_controller_data stih415_powerdown_controller = {
index fe3bf02bdc8c70674899b00248aeee785694f630..5fc987076a90a55c5b69f964d9fbaad7dd45a94d 100644 (file)
@@ -104,6 +104,7 @@ static const struct syscfg_reset_channel_data stih416_softresets[] = {
        [STIH416_COMPO_A_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7564, 4),
        [STIH416_VP8_DEC_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7564, 10),
        [STIH416_VTG_MAIN_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7564, 16),
+       [STIH416_KEYSCAN_SOFTRESET] = STIH416_SRST_LPM(LPM_SYSCFG_1, 8),
 };
 
 static struct syscfg_reset_controller_data stih416_powerdown_controller = {
index 1990285296c6c4d669d7e79074f84e94e8a6c346..c316051d9bdaa4e8bd24f63e2601f9aa2925c597 100644 (file)
@@ -1252,7 +1252,7 @@ static __init int sclp_initcall(void)
                return rc;
 
        sclp_pdev = platform_device_register_simple("sclp", -1, NULL, 0);
-       rc = PTR_RET(sclp_pdev);
+       rc = PTR_ERR_OR_ZERO(sclp_pdev);
        if (rc)
                goto fail_platform_driver_unregister;
 
index 6e8f90f84e49dbe47dc9f6161def01c376d1ac67..6e14999f9e8faeaa3b3764a1db846d72a29d7ceb 100644 (file)
@@ -515,7 +515,7 @@ static int __init sclp_detect_standby_memory(void)
        if (rc)
                goto out;
        sclp_pdev = platform_device_register_simple("sclp_mem", -1, NULL, 0);
-       rc = PTR_RET(sclp_pdev);
+       rc = PTR_ERR_OR_ZERO(sclp_pdev);
        if (rc)
                goto out_driver;
        sclp_add_standby_memory();
index 4eed38cd0af629b87108289174a81a9c5dedb44c..cd9c919095966b271fb0dee6a6dfdd49d176e022 100644 (file)
@@ -97,13 +97,16 @@ static void sclp_vt220_pm_event_fn(struct sclp_register *reg,
 static int __sclp_vt220_emit(struct sclp_vt220_request *request);
 static void sclp_vt220_emit_current(void);
 
-/* Registration structure for our interest in SCLP event buffers */
+/* Registration structure for SCLP output event buffers */
 static struct sclp_register sclp_vt220_register = {
        .send_mask              = EVTYP_VT220MSG_MASK,
+       .pm_event_fn            = sclp_vt220_pm_event_fn,
+};
+
+/* Registration structure for SCLP input event buffers */
+static struct sclp_register sclp_vt220_register_input = {
        .receive_mask           = EVTYP_VT220MSG_MASK,
-       .state_change_fn        = NULL,
        .receiver_fn            = sclp_vt220_receiver_fn,
-       .pm_event_fn            = sclp_vt220_pm_event_fn,
 };
 
 
@@ -715,9 +718,14 @@ static int __init sclp_vt220_tty_init(void)
        rc = tty_register_driver(driver);
        if (rc)
                goto out_init;
+       rc = sclp_register(&sclp_vt220_register_input);
+       if (rc)
+               goto out_reg;
        sclp_vt220_driver = driver;
        return 0;
 
+out_reg:
+       tty_unregister_driver(driver);
 out_init:
        __sclp_vt220_cleanup();
 out_driver:
index 9f0ea6cb6922619dfe04803c284002431110e11f..e3bf885f4a6c29fd77f29b51c219a47c6a04ca7e 100644 (file)
@@ -541,18 +541,27 @@ static void chsc_process_sei_nt0(struct chsc_sei_nt0_area *sei_area)
 
 static void chsc_process_event_information(struct chsc_sei *sei, u64 ntsm)
 {
-       do {
+       static int ntsm_unsupported;
+
+       while (true) {
                memset(sei, 0, sizeof(*sei));
                sei->request.length = 0x0010;
                sei->request.code = 0x000e;
-               sei->ntsm = ntsm;
+               if (!ntsm_unsupported)
+                       sei->ntsm = ntsm;
 
                if (chsc(sei))
                        break;
 
                if (sei->response.code != 0x0001) {
-                       CIO_CRW_EVENT(2, "chsc: sei failed (rc=%04x)\n",
-                                     sei->response.code);
+                       CIO_CRW_EVENT(2, "chsc: sei failed (rc=%04x, ntsm=%llx)\n",
+                                     sei->response.code, sei->ntsm);
+
+                       if (sei->response.code == 3 && sei->ntsm) {
+                               /* Fallback for old firmware. */
+                               ntsm_unsupported = 1;
+                               continue;
+                       }
                        break;
                }
 
@@ -568,7 +577,10 @@ static void chsc_process_event_information(struct chsc_sei *sei, u64 ntsm)
                        CIO_CRW_EVENT(2, "chsc: unhandled nt: %d\n", sei->nt);
                        break;
                }
-       } while (sei->u.nt0_area.flags & 0x80);
+
+               if (!(sei->u.nt0_area.flags & 0x80))
+                       break;
+       }
 }
 
 /*
index 8cf4a0c69baf4cebfc5ecb4fb28c029c4455d886..9a6e4a2cd072421df1980edfa4c8f914398b3991 100644 (file)
@@ -7463,6 +7463,10 @@ static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
        if (hpsa_simple_mode)
                return;
 
+       trans_support = readl(&(h->cfgtable->TransportSupport));
+       if (!(trans_support & PERFORMANT_MODE))
+               return;
+
        /* Check for I/O accelerator mode support */
        if (trans_support & CFGTBL_Trans_io_accel1) {
                transMethod |= CFGTBL_Trans_io_accel1 |
@@ -7479,10 +7483,6 @@ static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
        }
 
        /* TODO, check that this next line h->nreply_queues is correct */
-       trans_support = readl(&(h->cfgtable->TransportSupport));
-       if (!(trans_support & PERFORMANT_MODE))
-               return;
-
        h->nreply_queues = h->msix_vector > 0 ? h->msix_vector : 1;
        hpsa_get_max_perf_mode_cmds(h);
        /* Performant mode ring buffer and supporting data structures */
index 7f0af4fcc0019127ab4d60fc0550ed6daa86ffb6..6fd7d40b2c4dea102e15a2e9c76fef3500c09435 100644 (file)
@@ -8293,7 +8293,6 @@ _scsih_suspend(struct pci_dev *pdev, pm_message_t state)
 
        mpt2sas_base_free_resources(ioc);
        pci_save_state(pdev);
-       pci_disable_device(pdev);
        pci_set_power_state(pdev, device_state);
        return 0;
 }
index 771c16bfdbac4be2fac180459ff5711407c98a01..f17aa7aa78796e7f6d358b8cd5f68fd43cfee4d4 100644 (file)
@@ -189,6 +189,7 @@ scsi_abort_command(struct scsi_cmnd *scmd)
                /*
                 * Retry after abort failed, escalate to next level.
                 */
+               scmd->eh_eflags &= ~SCSI_EH_ABORT_SCHEDULED;
                SCSI_LOG_ERROR_RECOVERY(3,
                        scmd_printk(KERN_INFO, scmd,
                                    "scmd %p previous abort failed\n", scmd));
@@ -920,10 +921,12 @@ void scsi_eh_prep_cmnd(struct scsi_cmnd *scmd, struct scsi_eh_save *ses,
        ses->prot_op = scmd->prot_op;
 
        scmd->prot_op = SCSI_PROT_NORMAL;
+       scmd->eh_eflags = 0;
        scmd->cmnd = ses->eh_cmnd;
        memset(scmd->cmnd, 0, BLK_MAX_CDB);
        memset(&scmd->sdb, 0, sizeof(scmd->sdb));
        scmd->request->next_rq = NULL;
+       scmd->result = 0;
 
        if (sense_bytes) {
                scmd->sdb.length = min_t(unsigned, SCSI_SENSE_BUFFERSIZE,
@@ -1157,6 +1160,15 @@ int scsi_eh_get_sense(struct list_head *work_q,
                                             __func__));
                        break;
                }
+               if (status_byte(scmd->result) != CHECK_CONDITION)
+                       /*
+                        * don't request sense if there's no check condition
+                        * status because the error we're processing isn't one
+                        * that has a sense code (and some devices get
+                        * confused by sense requests out of the blue)
+                        */
+                       continue;
+
                SCSI_LOG_ERROR_RECOVERY(2, scmd_printk(KERN_INFO, scmd,
                                                  "%s: requesting sense\n",
                                                  current->comm));
index 65a123d9c67649822e2ab0333bf534f820b8b212..9db097a28a74588c793c0521c7f80f8540820f61 100644 (file)
@@ -137,6 +137,7 @@ static void __scsi_queue_insert(struct scsi_cmnd *cmd, int reason, int unbusy)
         * lock such that the kblockd_schedule_work() call happens
         * before blk_cleanup_queue() finishes.
         */
+       cmd->result = 0;
        spin_lock_irqsave(q->queue_lock, flags);
        blk_requeue_request(q, cmd->request);
        kblockd_schedule_work(q, &device->requeue_work);
@@ -1044,6 +1045,7 @@ static int scsi_init_sgtable(struct request *req, struct scsi_data_buffer *sdb,
  */
 int scsi_init_io(struct scsi_cmnd *cmd, gfp_t gfp_mask)
 {
+       struct scsi_device *sdev = cmd->device;
        struct request *rq = cmd->request;
 
        int error = scsi_init_sgtable(rq, &cmd->sdb, gfp_mask);
@@ -1091,7 +1093,7 @@ err_exit:
        scsi_release_buffers(cmd);
        cmd->request->special = NULL;
        scsi_put_command(cmd);
-       put_device(&cmd->device->sdev_gendev);
+       put_device(&sdev->sdev_gendev);
        return error;
 }
 EXPORT_SYMBOL(scsi_init_io);
@@ -1273,7 +1275,7 @@ int scsi_prep_return(struct request_queue *q, struct request *req, int ret)
                        struct scsi_cmnd *cmd = req->special;
                        scsi_release_buffers(cmd);
                        scsi_put_command(cmd);
-                       put_device(&cmd->device->sdev_gendev);
+                       put_device(&sdev->sdev_gendev);
                        req->special = NULL;
                }
                break;
index 16bfd50cd3fe65644c5443698d3aa3e96dfd5925..db3b494e5926a423866e0ad3a18b15b6378d3cca 100644 (file)
@@ -750,8 +750,12 @@ static void __virtscsi_set_affinity(struct virtio_scsi *vscsi, bool affinity)
 
                vscsi->affinity_hint_set = true;
        } else {
-               for (i = 0; i < vscsi->num_queues; i++)
+               for (i = 0; i < vscsi->num_queues; i++) {
+                       if (!vscsi->req_vqs[i].vq)
+                               continue;
+
                        virtqueue_set_affinity(vscsi->req_vqs[i].vq, -1);
+               }
 
                vscsi->affinity_hint_set = false;
        }
index 8005f986948173e55d5bc5a5387da80c8a5b9185..079e6b1b0cdb6fbc2e05532f3d8548653f4d4694 100644 (file)
@@ -1115,8 +1115,11 @@ static int atmel_spi_one_transfer(struct spi_master *master,
                        atmel_spi_next_xfer_pio(master, xfer);
                }
 
+               /* interrupts are disabled, so free the lock for schedule */
+               atmel_spi_unlock(as);
                ret = wait_for_completion_timeout(&as->xfer_completion,
                                                        SPI_DMA_TIMEOUT);
+               atmel_spi_lock(as);
                if (WARN_ON(ret == 0)) {
                        dev_err(&spi->dev,
                                "spi trasfer timeout, err %d\n", ret);
index 55e57c3eb9bd051bc7fcca7d5090a2d999bf688b..ebf720b88a2a5ca5c47c389379c50ab18e4cbd2b 100644 (file)
@@ -12,6 +12,7 @@
 #include <linux/module.h>
 #include <linux/delay.h>
 #include <linux/device.h>
+#include <linux/gpio.h>
 #include <linux/slab.h>
 #include <linux/io.h>
 #include <linux/ioport.h>
index 9009456bdf4d29c6febf56b162113fa5e4bf78ef..c8e795ef2e132fcb10dd4ac196decbd887861f5d 100644 (file)
@@ -244,9 +244,9 @@ static int hspi_probe(struct platform_device *pdev)
                return -ENOMEM;
        }
 
-       clk = clk_get(NULL, "shyway_clk");
+       clk = clk_get(&pdev->dev, NULL);
        if (IS_ERR(clk)) {
-               dev_err(&pdev->dev, "shyway_clk is required\n");
+               dev_err(&pdev->dev, "couldn't get clock\n");
                ret = -EINVAL;
                goto error0;
        }
index 1a77ad52812fd79d3a2524264e7a2a8678ca1464..67d8909dcf3946a4d516d607fd83cef417aaabc1 100644 (file)
@@ -287,8 +287,8 @@ static irqreturn_t spi_sirfsoc_irq(int irq, void *dev_id)
                                sspi->left_rx_word)
                        sspi->rx_word(sspi);
 
-       if (spi_stat & (SIRFSOC_SPI_FIFO_EMPTY
-                       SIRFSOC_SPI_TXFIFO_THD_REACH))
+       if (spi_stat & (SIRFSOC_SPI_TXFIFO_EMPTY |
+                       SIRFSOC_SPI_TXFIFO_THD_REACH))
                while (!((readl(sspi->base + SIRFSOC_SPI_TXFIFO_STATUS)
                                & SIRFSOC_SPI_FIFO_FULL)) &&
                                sspi->left_tx_word)
@@ -470,7 +470,16 @@ static void spi_sirfsoc_chipselect(struct spi_device *spi, int value)
                writel(regval, sspi->base + SIRFSOC_SPI_CTRL);
        } else {
                int gpio = sspi->chipselect[spi->chip_select];
-               gpio_direction_output(gpio, spi->mode & SPI_CS_HIGH ? 0 : 1);
+               switch (value) {
+               case BITBANG_CS_ACTIVE:
+                       gpio_direction_output(gpio,
+                                       spi->mode & SPI_CS_HIGH ? 1 : 0);
+                       break;
+               case BITBANG_CS_INACTIVE:
+                       gpio_direction_output(gpio,
+                                       spi->mode & SPI_CS_HIGH ? 0 : 1);
+                       break;
+               }
        }
 }
 
@@ -559,6 +568,11 @@ spi_sirfsoc_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
                regval &= ~SIRFSOC_SPI_CMD_MODE;
                sspi->tx_by_cmd = false;
        }
+       /*
+        * set spi controller in RISC chipselect mode, we are controlling CS by
+        * software BITBANG_CS_ACTIVE and BITBANG_CS_INACTIVE.
+        */
+       regval |= SIRFSOC_SPI_CS_IO_MODE;
        writel(regval, sspi->base + SIRFSOC_SPI_CTRL);
 
        if (IS_DMA_VALID(t)) {
index ea5efb426f75f013708ab35f94627eb5204e9ebe..22365f140bec3d2d009b60d345369bd38aedf41a 100644 (file)
@@ -40,8 +40,6 @@ source "drivers/staging/olpc_dcon/Kconfig"
 
 source "drivers/staging/panel/Kconfig"
 
-source "drivers/staging/rtl8187se/Kconfig"
-
 source "drivers/staging/rtl8192u/Kconfig"
 
 source "drivers/staging/rtl8192e/Kconfig"
index 86e020c2ad0deae1e615ec30ec77fdb592eae0d8..fbe84ed2d048e4b953af51e2b9724945c7021db9 100644 (file)
@@ -12,7 +12,6 @@ obj-$(CONFIG_PRISM2_USB)      += wlan-ng/
 obj-$(CONFIG_COMEDI)           += comedi/
 obj-$(CONFIG_FB_OLPC_DCON)     += olpc_dcon/
 obj-$(CONFIG_PANEL)            += panel/
-obj-$(CONFIG_R8187SE)          += rtl8187se/
 obj-$(CONFIG_RTL8192U)         += rtl8192u/
 obj-$(CONFIG_RTL8192E)         += rtl8192e/
 obj-$(CONFIG_R8712U)           += rtl8712/
index 924fce977985b27434c577d176cfd21c7bb49f89..257595016161ccb90552ca8a7d67d4c1e9e99559 100644 (file)
@@ -61,6 +61,8 @@ static void __comedi_buf_free(struct comedi_device *dev,
                              struct comedi_subdevice *s)
 {
        struct comedi_async *async = s->async;
+       struct comedi_buf_map *bm;
+       unsigned long flags;
 
        if (async->prealloc_buf) {
                vunmap(async->prealloc_buf);
@@ -68,8 +70,11 @@ static void __comedi_buf_free(struct comedi_device *dev,
                async->prealloc_bufsz = 0;
        }
 
-       comedi_buf_map_put(async->buf_map);
+       spin_lock_irqsave(&s->spin_lock, flags);
+       bm = async->buf_map;
        async->buf_map = NULL;
+       spin_unlock_irqrestore(&s->spin_lock, flags);
+       comedi_buf_map_put(bm);
 }
 
 static void __comedi_buf_alloc(struct comedi_device *dev,
@@ -80,6 +85,7 @@ static void __comedi_buf_alloc(struct comedi_device *dev,
        struct page **pages = NULL;
        struct comedi_buf_map *bm;
        struct comedi_buf_page *buf;
+       unsigned long flags;
        unsigned i;
 
        if (!IS_ENABLED(CONFIG_HAS_DMA) && s->async_dma_dir != DMA_NONE) {
@@ -92,8 +98,10 @@ static void __comedi_buf_alloc(struct comedi_device *dev,
        if (!bm)
                return;
 
-       async->buf_map = bm;
        kref_init(&bm->refcount);
+       spin_lock_irqsave(&s->spin_lock, flags);
+       async->buf_map = bm;
+       spin_unlock_irqrestore(&s->spin_lock, flags);
        bm->dma_dir = s->async_dma_dir;
        if (bm->dma_dir != DMA_NONE)
                /* Need ref to hardware device to free buffer later. */
@@ -127,7 +135,9 @@ static void __comedi_buf_alloc(struct comedi_device *dev,
 
                pages[i] = virt_to_page(buf->virt_addr);
        }
+       spin_lock_irqsave(&s->spin_lock, flags);
        bm->n_pages = i;
+       spin_unlock_irqrestore(&s->spin_lock, flags);
 
        /* vmap the prealloc_buf if all the pages were allocated */
        if (i == n_pages)
@@ -150,6 +160,29 @@ int comedi_buf_map_put(struct comedi_buf_map *bm)
        return 1;
 }
 
+/* returns s->async->buf_map and increments its kref refcount */
+struct comedi_buf_map *
+comedi_buf_map_from_subdev_get(struct comedi_subdevice *s)
+{
+       struct comedi_async *async = s->async;
+       struct comedi_buf_map *bm = NULL;
+       unsigned long flags;
+
+       if (!async)
+               return NULL;
+
+       spin_lock_irqsave(&s->spin_lock, flags);
+       bm = async->buf_map;
+       /* only want it if buffer pages allocated */
+       if (bm && bm->n_pages)
+               comedi_buf_map_get(bm);
+       else
+               bm = NULL;
+       spin_unlock_irqrestore(&s->spin_lock, flags);
+
+       return bm;
+}
+
 bool comedi_buf_is_mmapped(struct comedi_async *async)
 {
        struct comedi_buf_map *bm = async->buf_map;
index ea6dc36d753b0d5b7344011576a6eeae93735737..acc80197e35ed86f0c89eee412f6bba9d0d640b5 100644 (file)
@@ -1926,14 +1926,21 @@ static int comedi_mmap(struct file *file, struct vm_area_struct *vma)
        struct comedi_device *dev = file->private_data;
        struct comedi_subdevice *s;
        struct comedi_async *async;
-       struct comedi_buf_map *bm;
+       struct comedi_buf_map *bm = NULL;
        unsigned long start = vma->vm_start;
        unsigned long size;
        int n_pages;
        int i;
        int retval;
 
-       mutex_lock(&dev->mutex);
+       /*
+        * 'trylock' avoids circular dependency with current->mm->mmap_sem
+        * and down-reading &dev->attach_lock should normally succeed without
+        * contention unless the device is in the process of being attached
+        * or detached.
+        */
+       if (!down_read_trylock(&dev->attach_lock))
+               return -EAGAIN;
 
        if (!dev->attached) {
                dev_dbg(dev->class_dev, "no driver attached\n");
@@ -1973,7 +1980,9 @@ static int comedi_mmap(struct file *file, struct vm_area_struct *vma)
        }
 
        n_pages = size >> PAGE_SHIFT;
-       bm = async->buf_map;
+
+       /* get reference to current buf map (if any) */
+       bm = comedi_buf_map_from_subdev_get(s);
        if (!bm || n_pages > bm->n_pages) {
                retval = -EINVAL;
                goto done;
@@ -1997,7 +2006,8 @@ static int comedi_mmap(struct file *file, struct vm_area_struct *vma)
 
        retval = 0;
 done:
-       mutex_unlock(&dev->mutex);
+       up_read(&dev->attach_lock);
+       comedi_buf_map_put(bm); /* put reference to buf map - okay if NULL */
        return retval;
 }
 
index 9a746570f1619a90ae3dadefb121edc59d0f3495..a492f2d2436e7b3b01fa1384237017d9de8024eb 100644 (file)
@@ -19,6 +19,8 @@ void comedi_buf_reset(struct comedi_async *async);
 bool comedi_buf_is_mmapped(struct comedi_async *async);
 void comedi_buf_map_get(struct comedi_buf_map *bm);
 int comedi_buf_map_put(struct comedi_buf_map *bm);
+struct comedi_buf_map *comedi_buf_map_from_subdev_get(
+               struct comedi_subdevice *s);
 unsigned int comedi_buf_write_n_allocated(struct comedi_async *async);
 void comedi_device_cancel_all(struct comedi_device *dev);
 
index 71db683098d67399b3c6918256e977af92ab6e85..b59af030358190a9539b16c7fd8d8b20fb16c30a 100644 (file)
@@ -493,7 +493,7 @@ static void usbduxsub_ao_isoc_irq(struct urb *urb)
                        /* pointer to the DA */
                        *datap++ = val & 0xff;
                        *datap++ = (val >> 8) & 0xff;
-                       *datap++ = chan;
+                       *datap++ = chan << 6;
                        devpriv->ao_readback[chan] = val;
 
                        s->async->events |= COMEDI_CB_BLOCK;
@@ -1040,11 +1040,8 @@ static int usbdux_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
        /* set current channel of the running acquisition to zero */
        s->async->cur_chan = 0;
 
-       for (i = 0; i < cmd->chanlist_len; ++i) {
-               unsigned int chan = CR_CHAN(cmd->chanlist[i]);
-
-               devpriv->ao_chanlist[i] = chan << 6;
-       }
+       for (i = 0; i < cmd->chanlist_len; ++i)
+               devpriv->ao_chanlist[i] = CR_CHAN(cmd->chanlist[i]);
 
        /* we count in steps of 1ms (125us) */
        /* 125us mode not used yet */
index f96dcec740aedf433d5266132f6072ff9b5b9461..7ac2602242f1f4e6527025b0b2566b52e01687f3 100644 (file)
@@ -334,6 +334,7 @@ static int goldfish_audio_probe(struct platform_device *pdev)
        return 0;
 
 err_misc_register_failed:
+       free_irq(data->irq, data);
 err_request_irq_failed:
        dma_free_coherent(&pdev->dev, COMBINED_BUFFER_SIZE,
                                        data->buffer_virt, data->buffer_phys);
index 34cb606e0e3db82107290c60aa6b279f2a318c8d..d2f0211ba540b30fa4d54a82cf7b49b0f68dda96 100644 (file)
@@ -1,4 +1,2 @@
 gs_fpga-y      += gs_fpgaboot.o io.o
 obj-$(CONFIG_GS_FPGABOOT)      += gs_fpga.o
-
-ccflags-$(CONFIG_GS_FPGA_DEBUG)        := -DDEBUG
index 89bc84d833e66e1f715ccf903863e0f1e54ea134..7506900c9b8dece47f70f8eba4ea9fea33306dd4 100644 (file)
@@ -373,7 +373,6 @@ static int __init gs_fpgaboot_init(void)
        r = -1;
 
        pr_info("FPGA DOWNLOAD --->\n");
-       pr_info("built at %s UTC\n", __TIMESTAMP__);
 
        pr_info("FPGA image file name: %s\n", file);
 
index 11fb95201545233921f67d912051b27119a1648a..dae8d1a9038e661885e2c3bf51869ba76121d122 100644 (file)
@@ -1526,7 +1526,7 @@ static int mxs_lradc_probe(struct platform_device *pdev)
        struct resource *iores;
        int ret = 0, touch_ret;
        int i, s;
-       unsigned int scale_uv;
+       uint64_t scale_uv;
 
        /* Allocate the IIO device. */
        iio = devm_iio_device_alloc(dev, sizeof(*lradc));
index 36eedd8a0ea9815c168889d3ed614597a93847a6..e2b482045158dedb9101f6939b1c4d5dbe071f7d 100644 (file)
@@ -70,6 +70,7 @@ static int ad2s1200_read_raw(struct iio_dev *indio_dev,
                vel = (((s16)(st->rx[0])) << 4) | ((st->rx[1] & 0xF0) >> 4);
                vel = (vel << 4) >> 4;
                *val = vel;
+               break;
        default:
                mutex_unlock(&st->lock);
                return -EINVAL;
diff --git a/drivers/staging/rtl8187se/Kconfig b/drivers/staging/rtl8187se/Kconfig
deleted file mode 100644 (file)
index ff8d41e..0000000
+++ /dev/null
@@ -1,10 +0,0 @@
-config R8187SE
-       tristate "RealTek RTL8187SE Wireless LAN NIC driver"
-       depends on PCI && WLAN
-       depends on m
-       select WIRELESS_EXT
-       select WEXT_PRIV
-       select EEPROM_93CX6
-       select CRYPTO
-       ---help---
-         If built as a module, it will be called r8187se.ko.
diff --git a/drivers/staging/rtl8187se/Makefile b/drivers/staging/rtl8187se/Makefile
deleted file mode 100644 (file)
index 91d1aa2..0000000
+++ /dev/null
@@ -1,38 +0,0 @@
-
-#ccflags-y += -DCONFIG_IEEE80211_NOWEP=y
-#ccflags-y += -std=gnu89
-#ccflags-y += -O2
-#CC            = gcc
-
-ccflags-y := -DSW_ANTE
-ccflags-y += -DTX_TRACK
-ccflags-y += -DHIGH_POWER
-ccflags-y += -DSW_DIG
-ccflags-y += -DRATE_ADAPT
-
-#enable it for legacy power save, disable it for leisure power save
-ccflags-y += -DENABLE_LPS
-
-
-#ccflags-y := -mhard-float -DCONFIG_FORCE_HARD_FLOAT=y
-
-r8187se-y :=                   \
-               r8180_core.o            \
-               r8180_wx.o              \
-               r8180_rtl8225z2.o       \
-               r8185b_init.o           \
-               r8180_dm.o              \
-               ieee80211/dot11d.o                      \
-               ieee80211/ieee80211_softmac.o           \
-               ieee80211/ieee80211_rx.o                \
-               ieee80211/ieee80211_tx.o                \
-               ieee80211/ieee80211_wx.o                \
-               ieee80211/ieee80211_module.o            \
-               ieee80211/ieee80211_softmac_wx.o        \
-               ieee80211/ieee80211_crypt.o             \
-               ieee80211/ieee80211_crypt_tkip.o        \
-               ieee80211/ieee80211_crypt_ccmp.o        \
-               ieee80211/ieee80211_crypt_wep.o
-
-obj-$(CONFIG_R8187SE)  += r8187se.o
-
diff --git a/drivers/staging/rtl8187se/Module.symvers b/drivers/staging/rtl8187se/Module.symvers
deleted file mode 100644 (file)
index e69de29..0000000
diff --git a/drivers/staging/rtl8187se/TODO b/drivers/staging/rtl8187se/TODO
deleted file mode 100644 (file)
index 704949a..0000000
+++ /dev/null
@@ -1,13 +0,0 @@
-TODO:
-- prepare private ieee80211 stack for merge with rtl8192su's version:
-  - add hwsec_active flag to struct ieee80211_device
-  - add bHwSec flag to cb_desc structure
-- switch to use shared "librtl" instead of private ieee80211 stack
-- switch to use LIB80211
-- switch to use MAC80211
-- use kernel coding style
-- checkpatch.pl fixes
-- sparse fixes
-- integrate with drivers/net/wireless/rtl818x
-
-Please send any patches to Greg Kroah-Hartman <greg@kroah.com>.
diff --git a/drivers/staging/rtl8187se/ieee80211/dot11d.c b/drivers/staging/rtl8187se/ieee80211/dot11d.c
deleted file mode 100644 (file)
index 4483c2c..0000000
+++ /dev/null
@@ -1,189 +0,0 @@
-#include "dot11d.h"
-
-void Dot11d_Init(struct ieee80211_device *ieee)
-{
-       PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(ieee);
-
-       pDot11dInfo->bEnabled = 0;
-
-       pDot11dInfo->State = DOT11D_STATE_NONE;
-       pDot11dInfo->CountryIeLen = 0;
-       memset(pDot11dInfo->channel_map, 0, MAX_CHANNEL_NUMBER+1);
-       memset(pDot11dInfo->MaxTxPwrDbmList, 0xFF, MAX_CHANNEL_NUMBER+1);
-       RESET_CIE_WATCHDOG(ieee);
-
-       netdev_info(ieee->dev, "Dot11d_Init()\n");
-}
-
-/* Reset to the state as we are just entering a regulatory domain. */
-void Dot11d_Reset(struct ieee80211_device *ieee)
-{
-       u32 i;
-       PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(ieee);
-
-       /* Clear old channel map */
-       memset(pDot11dInfo->channel_map, 0, MAX_CHANNEL_NUMBER+1);
-       memset(pDot11dInfo->MaxTxPwrDbmList, 0xFF, MAX_CHANNEL_NUMBER+1);
-       /* Set new channel map */
-       for (i = 1; i <= 11; i++)
-               (pDot11dInfo->channel_map)[i] = 1;
-
-       for (i = 12; i <= 14; i++)
-               (pDot11dInfo->channel_map)[i] = 2;
-
-       pDot11dInfo->State = DOT11D_STATE_NONE;
-       pDot11dInfo->CountryIeLen = 0;
-       RESET_CIE_WATCHDOG(ieee);
-}
-
-/*
- * Description:
- *     Update country IE from Beacon or Probe Response and configure PHY for
- *     operation in the regulatory domain.
- *
- * TODO:
- *     Configure Tx power.
- *
- * Assumption:
- *     1. IS_DOT11D_ENABLE() is TRUE.
- *     2. Input IE is an valid one.
- */
-void Dot11d_UpdateCountryIe(struct ieee80211_device *dev, u8 *pTaddr,
-                           u16 CoutryIeLen, u8 *pCoutryIe)
-{
-       PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(dev);
-       u8 i, j, NumTriples, MaxChnlNum;
-       u8 index, MaxTxPowerInDbm;
-       PCHNL_TXPOWER_TRIPLE pTriple;
-
-       if ((CoutryIeLen - 3)%3 != 0) {
-               netdev_info(dev->dev, "Dot11d_UpdateCountryIe(): Invalid country IE, skip it........1\n");
-               Dot11d_Reset(dev);
-               return;
-       }
-
-       memset(pDot11dInfo->channel_map, 0, MAX_CHANNEL_NUMBER+1);
-       memset(pDot11dInfo->MaxTxPwrDbmList, 0xFF, MAX_CHANNEL_NUMBER+1);
-       MaxChnlNum = 0;
-       NumTriples = (CoutryIeLen - 3) / 3; /* skip 3-byte country string. */
-       pTriple = (PCHNL_TXPOWER_TRIPLE)(pCoutryIe + 3);
-       for (i = 0; i < NumTriples; i++) {
-               if (MaxChnlNum >= pTriple->FirstChnl) {
-                       /*
-                        * It is not in a monotonically increasing order,
-                        * so stop processing.
-                        */
-                       netdev_info(dev->dev,
-                                   "Dot11d_UpdateCountryIe(): Invalid country IE, skip it........1\n");
-                       Dot11d_Reset(dev);
-                       return;
-               }
-               if (MAX_CHANNEL_NUMBER <
-                   (pTriple->FirstChnl + pTriple->NumChnls)) {
-                       /*
-                        * It is not a valid set of channel id,
-                        * so stop processing
-                        */
-                       netdev_info(dev->dev,
-                                   "Dot11d_UpdateCountryIe(): Invalid country IE, skip it........2\n");
-                       Dot11d_Reset(dev);
-                       return;
-               }
-
-               for (j = 0; j < pTriple->NumChnls; j++) {
-                       index = pTriple->FirstChnl + j;
-                       pDot11dInfo->channel_map[index] = 1;
-                       MaxTxPowerInDbm = pTriple->MaxTxPowerInDbm;
-                       pDot11dInfo->MaxTxPwrDbmList[index] = MaxTxPowerInDbm;
-                       MaxChnlNum = pTriple->FirstChnl + j;
-               }
-
-               pTriple = (PCHNL_TXPOWER_TRIPLE)((u8 *)pTriple + 3);
-       }
-#if 1
-       netdev_info(dev->dev, "Channel List:");
-       for (i = 1; i <= MAX_CHANNEL_NUMBER; i++)
-               if (pDot11dInfo->channel_map[i] > 0)
-                       netdev_info(dev->dev, " %d", i);
-       netdev_info(dev->dev, "\n");
-#endif
-
-       UPDATE_CIE_SRC(dev, pTaddr);
-
-       pDot11dInfo->CountryIeLen = CoutryIeLen;
-       memcpy(pDot11dInfo->CountryIeBuf, pCoutryIe, CoutryIeLen);
-       pDot11dInfo->State = DOT11D_STATE_LEARNED;
-}
-
-u8 DOT11D_GetMaxTxPwrInDbm(struct ieee80211_device *dev, u8 Channel)
-{
-       PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(dev);
-       u8 MaxTxPwrInDbm = 255;
-
-       if (MAX_CHANNEL_NUMBER < Channel) {
-               netdev_info(dev->dev, "DOT11D_GetMaxTxPwrInDbm(): Invalid Channel\n");
-               return MaxTxPwrInDbm;
-       }
-       if (pDot11dInfo->channel_map[Channel])
-               MaxTxPwrInDbm = pDot11dInfo->MaxTxPwrDbmList[Channel];
-
-       return MaxTxPwrInDbm;
-}
-
-
-void DOT11D_ScanComplete(struct ieee80211_device *dev)
-{
-       PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(dev);
-
-       switch (pDot11dInfo->State) {
-       case DOT11D_STATE_LEARNED:
-               pDot11dInfo->State = DOT11D_STATE_DONE;
-               break;
-
-       case DOT11D_STATE_DONE:
-               if (GET_CIE_WATCHDOG(dev) == 0) {
-                       /* Reset country IE if previous one is gone. */
-                       Dot11d_Reset(dev);
-               }
-               break;
-       case DOT11D_STATE_NONE:
-               break;
-       }
-}
-
-int IsLegalChannel(struct ieee80211_device *dev, u8 channel)
-{
-       PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(dev);
-
-       if (MAX_CHANNEL_NUMBER < channel) {
-               netdev_info(dev->dev, "IsLegalChannel(): Invalid Channel\n");
-               return 0;
-       }
-       if (pDot11dInfo->channel_map[channel] > 0)
-               return 1;
-       return 0;
-}
-
-int ToLegalChannel(struct ieee80211_device *dev, u8 channel)
-{
-       PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(dev);
-       u8 default_chn = 0;
-       u32 i = 0;
-
-       for (i = 1; i <= MAX_CHANNEL_NUMBER; i++) {
-               if (pDot11dInfo->channel_map[i] > 0) {
-                       default_chn = i;
-                       break;
-               }
-       }
-
-       if (MAX_CHANNEL_NUMBER < channel) {
-               netdev_info(dev->dev, "IsLegalChannel(): Invalid Channel\n");
-               return default_chn;
-       }
-
-       if (pDot11dInfo->channel_map[channel] > 0)
-               return channel;
-
-       return default_chn;
-}
diff --git a/drivers/staging/rtl8187se/ieee80211/dot11d.h b/drivers/staging/rtl8187se/ieee80211/dot11d.h
deleted file mode 100644 (file)
index f996691..0000000
+++ /dev/null
@@ -1,71 +0,0 @@
-#ifndef __INC_DOT11D_H
-#define __INC_DOT11D_H
-
-#include "ieee80211.h"
-
-/* #define ENABLE_DOT11D */
-
-/* #define DOT11D_MAX_CHNL_NUM 83 */
-
-typedef struct _CHNL_TXPOWER_TRIPLE {
-       u8 FirstChnl;
-       u8  NumChnls;
-       u8  MaxTxPowerInDbm;
-} CHNL_TXPOWER_TRIPLE, *PCHNL_TXPOWER_TRIPLE;
-
-typedef enum _DOT11D_STATE {
-       DOT11D_STATE_NONE = 0,
-       DOT11D_STATE_LEARNED,
-       DOT11D_STATE_DONE,
-} DOT11D_STATE;
-
-typedef struct _RT_DOT11D_INFO {
-       /* DECLARE_RT_OBJECT(RT_DOT12D_INFO); */
-
-       bool bEnabled; /* dot11MultiDomainCapabilityEnabled */
-
-       u16 CountryIeLen; /* > 0 if CountryIeBuf[] contains valid country information element. */
-       u8  CountryIeBuf[MAX_IE_LEN];
-       u8  CountryIeSrcAddr[6]; /* Source AP of the country IE. */
-       u8  CountryIeWatchdog;
-
-       u8  channel_map[MAX_CHANNEL_NUMBER+1];  /* !!!Value 0: Invalid, 1: Valid (active scan), 2: Valid (passive scan) */
-       /* u8  ChnlListLen; // #Bytes valid in ChnlList[]. */
-       /* u8  ChnlList[DOT11D_MAX_CHNL_NUM]; */
-       u8  MaxTxPwrDbmList[MAX_CHANNEL_NUMBER+1];
-
-       DOT11D_STATE State;
-} RT_DOT11D_INFO, *PRT_DOT11D_INFO;
-
-#define eqMacAddr(a, b) (((a)[0] == (b)[0] && (a)[1] == (b)[1] && (a)[2] == (b)[2] && (a)[3] == (b)[3] && (a)[4] == (b)[4] && (a)[5] == (b)[5]) ? 1:0)
-#define cpMacAddr(des, src) ((des)[0] = (src)[0], (des)[1] = (src)[1], (des)[2] = (src)[2], (des)[3] = (src)[3], (des)[4] = (src)[4], (des)[5] = (src)[5])
-#define GET_DOT11D_INFO(__pIeeeDev) ((PRT_DOT11D_INFO)((__pIeeeDev)->pDot11dInfo))
-
-#define IS_DOT11D_ENABLE(__pIeeeDev) GET_DOT11D_INFO(__pIeeeDev)->bEnabled
-#define IS_COUNTRY_IE_VALID(__pIeeeDev) (GET_DOT11D_INFO(__pIeeeDev)->CountryIeLen > 0)
-
-#define IS_EQUAL_CIE_SRC(__pIeeeDev, __pTa) eqMacAddr(GET_DOT11D_INFO(__pIeeeDev)->CountryIeSrcAddr, __pTa)
-#define UPDATE_CIE_SRC(__pIeeeDev, __pTa) cpMacAddr(GET_DOT11D_INFO(__pIeeeDev)->CountryIeSrcAddr, __pTa)
-
-#define IS_COUNTRY_IE_CHANGED(__pIeeeDev, __Ie) \
-       (((__Ie).Length == 0 || (__Ie).Length != GET_DOT11D_INFO(__pIeeeDev)->CountryIeLen) ? \
-       FALSE : \
-       (!memcmp(GET_DOT11D_INFO(__pIeeeDev)->CountryIeBuf, (__Ie).Octet, (__Ie).Length)))
-
-#define CIE_WATCHDOG_TH 1
-#define GET_CIE_WATCHDOG(__pIeeeDev) GET_DOT11D_INFO(__pIeeeDev)->CountryIeWatchdog
-#define RESET_CIE_WATCHDOG(__pIeeeDev) GET_CIE_WATCHDOG(__pIeeeDev) = 0
-#define UPDATE_CIE_WATCHDOG(__pIeeeDev) ++GET_CIE_WATCHDOG(__pIeeeDev)
-
-#define IS_DOT11D_STATE_DONE(__pIeeeDev) (GET_DOT11D_INFO(__pIeeeDev)->State == DOT11D_STATE_DONE)
-
-void Dot11d_Init(struct ieee80211_device *dev);
-void Dot11d_Reset(struct ieee80211_device *dev);
-void Dot11d_UpdateCountryIe(struct ieee80211_device *dev, u8 *pTaddr,
-                           u16 CoutryIeLen, u8 *pCoutryIe);
-u8 DOT11D_GetMaxTxPwrInDbm(struct ieee80211_device *dev, u8 Channel);
-void DOT11D_ScanComplete(struct ieee80211_device *dev);
-int IsLegalChannel(struct ieee80211_device *dev, u8 channel);
-int ToLegalChannel(struct ieee80211_device *dev, u8 channel);
-
-#endif /*  #ifndef __INC_DOT11D_H */
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211.h b/drivers/staging/rtl8187se/ieee80211/ieee80211.h
deleted file mode 100644 (file)
index d1763b7..0000000
+++ /dev/null
@@ -1,1496 +0,0 @@
-/*
- * Merged with mainline ieee80211.h in Aug 2004.  Original ieee802_11
- * remains copyright by the original authors
- *
- * Portions of the merged code are based on Host AP (software wireless
- * LAN access point) driver for Intersil Prism2/2.5/3.
- *
- * Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
- * <jkmaline@cc.hut.fi>
- * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
- *
- * Adaption to a generic IEEE 802.11 stack by James Ketrenos
- * <jketreno@linux.intel.com>
- * Copyright (c) 2004, Intel Corporation
- *
- * Modified for Realtek's wi-fi cards by Andrea Merello
- * <andrea.merello@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation. See README and COPYING for
- * more details.
- */
-#ifndef IEEE80211_H
-#define IEEE80211_H
-#include <linux/if_ether.h> /* ETH_ALEN */
-#include <linux/kernel.h>   /* ARRAY_SIZE */
-#include <linux/jiffies.h>
-#include <linux/timer.h>
-#include <linux/sched.h>
-#include <linux/semaphore.h>
-#include <linux/wireless.h>
-#include <linux/ieee80211.h>
-#include <linux/interrupt.h>
-
-#define KEY_TYPE_NA            0x0
-#define KEY_TYPE_WEP40                 0x1
-#define KEY_TYPE_TKIP          0x2
-#define KEY_TYPE_CCMP          0x4
-#define KEY_TYPE_WEP104                0x5
-
-#define aSifsTime                                      10
-
-#define MGMT_QUEUE_NUM 5
-
-
-#define IEEE_CMD_SET_WPA_PARAM                 1
-#define        IEEE_CMD_SET_WPA_IE                     2
-#define IEEE_CMD_SET_ENCRYPTION                        3
-#define IEEE_CMD_MLME                          4
-
-#define IEEE_PARAM_WPA_ENABLED                 1
-#define IEEE_PARAM_TKIP_COUNTERMEASURES                2
-#define IEEE_PARAM_DROP_UNENCRYPTED            3
-#define IEEE_PARAM_PRIVACY_INVOKED             4
-#define IEEE_PARAM_AUTH_ALGS                   5
-#define IEEE_PARAM_IEEE_802_1X                 6
-//It should consistent with the driver_XXX.c
-//   David, 2006.9.26
-#define IEEE_PARAM_WPAX_SELECT                 7
-//Added for notify the encryption type selection
-//   David, 2006.9.26
-#define IEEE_PROTO_WPA                         1
-#define IEEE_PROTO_RSN                         2
-//Added for notify the encryption type selection
-//   David, 2006.9.26
-#define IEEE_WPAX_USEGROUP                     0
-#define IEEE_WPAX_WEP40                                1
-#define IEEE_WPAX_TKIP                         2
-#define IEEE_WPAX_WRAP                         3
-#define IEEE_WPAX_CCMP                         4
-#define IEEE_WPAX_WEP104                       5
-
-#define IEEE_KEY_MGMT_IEEE8021X                        1
-#define IEEE_KEY_MGMT_PSK                      2
-
-
-
-#define IEEE_MLME_STA_DEAUTH                   1
-#define IEEE_MLME_STA_DISASSOC                 2
-
-
-#define IEEE_CRYPT_ERR_UNKNOWN_ALG             2
-#define IEEE_CRYPT_ERR_UNKNOWN_ADDR            3
-#define IEEE_CRYPT_ERR_CRYPT_INIT_FAILED               4
-#define IEEE_CRYPT_ERR_KEY_SET_FAILED          5
-#define IEEE_CRYPT_ERR_TX_KEY_SET_FAILED               6
-#define IEEE_CRYPT_ERR_CARD_CONF_FAILED                7
-
-
-#define        IEEE_CRYPT_ALG_NAME_LEN                 16
-
-extern int ieee80211_crypto_tkip_init(void);
-extern void ieee80211_crypto_tkip_exit(void);
-
-//by amy for ps
-typedef struct ieee_param {
-       u32 cmd;
-       u8 sta_addr[ETH_ALEN];
-        union {
-               struct {
-                       u8 name;
-                       u32 value;
-               } wpa_param;
-               struct {
-                       u32 len;
-                       u8 reserved[32];
-                       u8 data[0];
-               } wpa_ie;
-               struct{
-                       int command;
-                       int reason_code;
-               } mlme;
-               struct {
-                       u8 alg[IEEE_CRYPT_ALG_NAME_LEN];
-                       u8 set_tx;
-                       u32 err;
-                       u8 idx;
-                       u8 seq[8]; /* sequence counter (set: RX, get: TX) */
-                       u16 key_len;
-                       u8 key[0];
-               } crypt;
-
-       } u;
-}ieee_param;
-
-
-#define MSECS(t) msecs_to_jiffies(t)
-#define msleep_interruptible_rtl  msleep_interruptible
-
-#define IEEE80211_DATA_LEN             2304
-/* Maximum size for the MA-UNITDATA primitive, 802.11 standard section
-   6.2.1.1.2.
-
-   The figure in section 7.1.2 suggests a body size of up to 2312
-   bytes is allowed, which is a bit confusing, I suspect this
-   represents the 2304 bytes of real data, plus a possible 8 bytes of
-   WEP IV and ICV. (this interpretation suggested by Ramiro Barreiro) */
-
-#define IEEE80211_3ADDR_LEN 24
-#define IEEE80211_4ADDR_LEN 30
-#define IEEE80211_FCS_LEN    4
-#define IEEE80211_HLEN                 IEEE80211_4ADDR_LEN
-#define IEEE80211_FRAME_LEN            (IEEE80211_DATA_LEN + IEEE80211_HLEN)
-#define IEEE80211_MGMT_HDR_LEN 24
-#define IEEE80211_DATA_HDR3_LEN 24
-#define IEEE80211_DATA_HDR4_LEN 30
-
-#define MIN_FRAG_THRESHOLD     256U
-#define        MAX_FRAG_THRESHOLD     2346U
-
-/* Frame control field constants */
-#define IEEE80211_FCTL_DSTODS          0x0300 //added by david
-#define IEEE80211_FCTL_WEP             0x4000
-
-/* debug macros */
-
-#ifdef CONFIG_IEEE80211_DEBUG
-extern u32 ieee80211_debug_level;
-#define IEEE80211_DEBUG(level, fmt, args...) \
-do { if (ieee80211_debug_level & (level)) \
-  printk(KERN_DEBUG "ieee80211: %c %s " fmt, \
-         in_interrupt() ? 'I' : 'U', __func__ , ## args); } while (0)
-#else
-#define IEEE80211_DEBUG(level, fmt, args...) do {} while (0)
-#endif /* CONFIG_IEEE80211_DEBUG */
-
-/*
- * To use the debug system;
- *
- * If you are defining a new debug classification, simply add it to the #define
- * list here in the form of:
- *
- * #define IEEE80211_DL_xxxx VALUE
- *
- * shifting value to the left one bit from the previous entry.  xxxx should be
- * the name of the classification (for example, WEP)
- *
- * You then need to either add a IEEE80211_xxxx_DEBUG() macro definition for your
- * classification, or use IEEE80211_DEBUG(IEEE80211_DL_xxxx, ...) whenever you want
- * to send output to that classification.
- *
- * To add your debug level to the list of levels seen when you perform
- *
- * % cat /proc/net/ipw/debug_level
- *
- * you simply need to add your entry to the ipw_debug_levels array.
- *
- * If you do not see debug_level in /proc/net/ipw then you do not have
- * CONFIG_IEEE80211_DEBUG defined in your kernel configuration
- *
- */
-
-#define IEEE80211_DL_INFO          (1<<0)
-#define IEEE80211_DL_WX            (1<<1)
-#define IEEE80211_DL_SCAN          (1<<2)
-#define IEEE80211_DL_STATE         (1<<3)
-#define IEEE80211_DL_MGMT          (1<<4)
-#define IEEE80211_DL_FRAG          (1<<5)
-#define IEEE80211_DL_EAP           (1<<6)
-#define IEEE80211_DL_DROP          (1<<7)
-
-#define IEEE80211_DL_TX            (1<<8)
-#define IEEE80211_DL_RX            (1<<9)
-
-#define IEEE80211_ERROR(f, a...) printk(KERN_ERR "ieee80211: " f, ## a)
-#define IEEE80211_WARNING(f, a...) printk(KERN_WARNING "ieee80211: " f, ## a)
-#define IEEE80211_DEBUG_INFO(f, a...)   IEEE80211_DEBUG(IEEE80211_DL_INFO, f, ## a)
-
-#define IEEE80211_DEBUG_WX(f, a...)     IEEE80211_DEBUG(IEEE80211_DL_WX, f, ## a)
-#define IEEE80211_DEBUG_SCAN(f, a...)   IEEE80211_DEBUG(IEEE80211_DL_SCAN, f, ## a)
-//#define IEEE_DEBUG_SCAN  IEEE80211_WARNING
-#define IEEE80211_DEBUG_STATE(f, a...)  IEEE80211_DEBUG(IEEE80211_DL_STATE, f, ## a)
-#define IEEE80211_DEBUG_MGMT(f, a...)  IEEE80211_DEBUG(IEEE80211_DL_MGMT, f, ## a)
-#define IEEE80211_DEBUG_FRAG(f, a...)  IEEE80211_DEBUG(IEEE80211_DL_FRAG, f, ## a)
-#define IEEE80211_DEBUG_EAP(f, a...)  IEEE80211_DEBUG(IEEE80211_DL_EAP, f, ## a)
-#define IEEE80211_DEBUG_DROP(f, a...)  IEEE80211_DEBUG(IEEE80211_DL_DROP, f, ## a)
-#define IEEE80211_DEBUG_TX(f, a...)  IEEE80211_DEBUG(IEEE80211_DL_TX, f, ## a)
-#define IEEE80211_DEBUG_RX(f, a...)  IEEE80211_DEBUG(IEEE80211_DL_RX, f, ## a)
-#include <linux/netdevice.h>
-#include <linux/if_arp.h> /* ARPHRD_ETHER */
-
-#ifndef WIRELESS_SPY
-#define WIRELESS_SPY           // enable iwspy support
-#endif
-#include <net/iw_handler.h>    // new driver API
-
-#ifndef ETH_P_PAE
-#define ETH_P_PAE 0x888E /* Port Access Entity (IEEE 802.1X) */
-#endif /* ETH_P_PAE */
-
-#define ETH_P_PREAUTH 0x88C7 /* IEEE 802.11i pre-authentication */
-
-#ifndef ETH_P_80211_RAW
-#define ETH_P_80211_RAW (ETH_P_ECONET + 1)
-#endif
-
-/* IEEE 802.11 defines */
-
-#define P80211_OUI_LEN 3
-
-struct ieee80211_snap_hdr {
-
-        u8    dsap;   /* always 0xAA */
-        u8    ssap;   /* always 0xAA */
-        u8    ctrl;   /* always 0x03 */
-        u8    oui[P80211_OUI_LEN];    /* organizational universal id */
-
-} __attribute__ ((packed));
-
-#define SNAP_SIZE sizeof(struct ieee80211_snap_hdr)
-
-#define WLAN_FC_GET_TYPE(fc) ((fc) & IEEE80211_FCTL_FTYPE)
-#define WLAN_FC_GET_STYPE(fc) ((fc) & IEEE80211_FCTL_STYPE)
-
-#define WLAN_GET_SEQ_FRAG(seq) ((seq) & IEEE80211_SCTL_FRAG)
-#define WLAN_GET_SEQ_SEQ(seq)  ((seq) & IEEE80211_SCTL_SEQ)
-
-#define WLAN_CAPABILITY_BSS (1<<0)
-#define WLAN_CAPABILITY_SHORT_SLOT (1<<10)
-
-#define IEEE80211_STATMASK_SIGNAL (1<<0)
-#define IEEE80211_STATMASK_RSSI (1<<1)
-#define IEEE80211_STATMASK_NOISE (1<<2)
-#define IEEE80211_STATMASK_RATE (1<<3)
-#define IEEE80211_STATMASK_WEMASK 0x7
-
-
-#define IEEE80211_CCK_MODULATION    (1<<0)
-#define IEEE80211_OFDM_MODULATION   (1<<1)
-
-#define IEEE80211_24GHZ_BAND     (1<<0)
-#define IEEE80211_52GHZ_BAND     (1<<1)
-
-#define IEEE80211_CCK_RATE_LEN                 4
-#define IEEE80211_CCK_RATE_1MB                 0x02
-#define IEEE80211_CCK_RATE_2MB                 0x04
-#define IEEE80211_CCK_RATE_5MB                 0x0B
-#define IEEE80211_CCK_RATE_11MB                        0x16
-#define IEEE80211_OFDM_RATE_LEN                8
-#define IEEE80211_OFDM_RATE_6MB                        0x0C
-#define IEEE80211_OFDM_RATE_9MB                        0x12
-#define IEEE80211_OFDM_RATE_12MB               0x18
-#define IEEE80211_OFDM_RATE_18MB               0x24
-#define IEEE80211_OFDM_RATE_24MB               0x30
-#define IEEE80211_OFDM_RATE_36MB               0x48
-#define IEEE80211_OFDM_RATE_48MB               0x60
-#define IEEE80211_OFDM_RATE_54MB               0x6C
-#define IEEE80211_BASIC_RATE_MASK              0x80
-
-#define IEEE80211_CCK_RATE_1MB_MASK            (1<<0)
-#define IEEE80211_CCK_RATE_2MB_MASK            (1<<1)
-#define IEEE80211_CCK_RATE_5MB_MASK            (1<<2)
-#define IEEE80211_CCK_RATE_11MB_MASK           (1<<3)
-#define IEEE80211_OFDM_RATE_6MB_MASK           (1<<4)
-#define IEEE80211_OFDM_RATE_9MB_MASK           (1<<5)
-#define IEEE80211_OFDM_RATE_12MB_MASK          (1<<6)
-#define IEEE80211_OFDM_RATE_18MB_MASK          (1<<7)
-#define IEEE80211_OFDM_RATE_24MB_MASK          (1<<8)
-#define IEEE80211_OFDM_RATE_36MB_MASK          (1<<9)
-#define IEEE80211_OFDM_RATE_48MB_MASK          (1<<10)
-#define IEEE80211_OFDM_RATE_54MB_MASK          (1<<11)
-
-#define IEEE80211_CCK_RATES_MASK               0x0000000F
-#define IEEE80211_CCK_BASIC_RATES_MASK (IEEE80211_CCK_RATE_1MB_MASK | \
-       IEEE80211_CCK_RATE_2MB_MASK)
-#define IEEE80211_CCK_DEFAULT_RATES_MASK       (IEEE80211_CCK_BASIC_RATES_MASK | \
-        IEEE80211_CCK_RATE_5MB_MASK | \
-        IEEE80211_CCK_RATE_11MB_MASK)
-
-#define IEEE80211_OFDM_RATES_MASK              0x00000FF0
-#define IEEE80211_OFDM_BASIC_RATES_MASK        (IEEE80211_OFDM_RATE_6MB_MASK | \
-       IEEE80211_OFDM_RATE_12MB_MASK | \
-       IEEE80211_OFDM_RATE_24MB_MASK)
-#define IEEE80211_OFDM_DEFAULT_RATES_MASK      (IEEE80211_OFDM_BASIC_RATES_MASK | \
-       IEEE80211_OFDM_RATE_9MB_MASK  | \
-       IEEE80211_OFDM_RATE_18MB_MASK | \
-       IEEE80211_OFDM_RATE_36MB_MASK | \
-       IEEE80211_OFDM_RATE_48MB_MASK | \
-       IEEE80211_OFDM_RATE_54MB_MASK)
-#define IEEE80211_DEFAULT_RATES_MASK (IEEE80211_OFDM_DEFAULT_RATES_MASK | \
-                                IEEE80211_CCK_DEFAULT_RATES_MASK)
-
-#define IEEE80211_NUM_OFDM_RATES           8
-#define IEEE80211_NUM_CCK_RATES                    4
-#define IEEE80211_OFDM_SHIFT_MASK_A         4
-
-/* this is stolen and modified from the madwifi driver*/
-#define IEEE80211_FC0_TYPE_MASK                0x0c
-#define IEEE80211_FC0_TYPE_DATA                0x08
-#define IEEE80211_FC0_SUBTYPE_MASK     0xB0
-#define IEEE80211_FC0_SUBTYPE_QOS      0x80
-
-#define IEEE80211_QOS_HAS_SEQ(fc) \
-       (((fc) & (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == \
-        (IEEE80211_FC0_TYPE_DATA | IEEE80211_FC0_SUBTYPE_QOS))
-
-/* this is stolen from ipw2200 driver */
-#define IEEE_IBSS_MAC_HASH_SIZE 31
-struct ieee_ibss_seq {
-       u8 mac[ETH_ALEN];
-       u16 seq_num[17];
-       u16 frag_num[17];
-       unsigned long packet_time[17];
-       struct list_head list;
-};
-
-/* NOTE: This data is for statistical purposes; not all hardware provides this
- *       information for frames received.  Not setting these will not cause
- *       any adverse affects. */
-struct ieee80211_rx_stats {
-       u32 mac_time[2];
-       u8 signalstrength;
-       s8 rssi;
-       u8 signal;
-       u8 noise;
-       u16 rate; /* in 100 kbps */
-       u8 received_channel;
-       u8 control;
-       u8 mask;
-       u8 freq;
-       u16 len;
-       u8 nic_type;
-};
-
-/* IEEE 802.11 requires that STA supports concurrent reception of at least
- * three fragmented frames. This define can be increased to support more
- * concurrent frames, but it should be noted that each entry can consume about
- * 2 kB of RAM and increasing cache size will slow down frame reassembly. */
-#define IEEE80211_FRAG_CACHE_LEN 4
-
-struct ieee80211_frag_entry {
-       unsigned long first_frag_time;
-       unsigned int seq;
-       unsigned int last_frag;
-       struct sk_buff *skb;
-       u8 src_addr[ETH_ALEN];
-       u8 dst_addr[ETH_ALEN];
-};
-
-struct ieee80211_stats {
-       unsigned int tx_unicast_frames;
-       unsigned int tx_multicast_frames;
-       unsigned int tx_fragments;
-       unsigned int tx_unicast_octets;
-       unsigned int tx_multicast_octets;
-       unsigned int tx_deferred_transmissions;
-       unsigned int tx_single_retry_frames;
-       unsigned int tx_multiple_retry_frames;
-       unsigned int tx_retry_limit_exceeded;
-       unsigned int tx_discards;
-       unsigned int rx_unicast_frames;
-       unsigned int rx_multicast_frames;
-       unsigned int rx_fragments;
-       unsigned int rx_unicast_octets;
-       unsigned int rx_multicast_octets;
-       unsigned int rx_fcs_errors;
-       unsigned int rx_discards_no_buffer;
-       unsigned int tx_discards_wrong_sa;
-       unsigned int rx_discards_undecryptable;
-       unsigned int rx_message_in_msg_fragments;
-       unsigned int rx_message_in_bad_msg_fragments;
-};
-
-struct ieee80211_device;
-
-#include "ieee80211_crypt.h"
-
-#define SEC_KEY_1         (1<<0)
-#define SEC_KEY_2         (1<<1)
-#define SEC_KEY_3         (1<<2)
-#define SEC_KEY_4         (1<<3)
-#define SEC_ACTIVE_KEY    (1<<4)
-#define SEC_AUTH_MODE     (1<<5)
-#define SEC_UNICAST_GROUP (1<<6)
-#define SEC_LEVEL         (1<<7)
-#define SEC_ENABLED       (1<<8)
-
-#define SEC_LEVEL_0      0 /* None */
-#define SEC_LEVEL_1      1 /* WEP 40 and 104 bit */
-#define SEC_LEVEL_2      2 /* Level 1 + TKIP */
-#define SEC_LEVEL_2_CKIP 3 /* Level 1 + CKIP */
-#define SEC_LEVEL_3      4 /* Level 2 + CCMP */
-
-#define WEP_KEYS 4
-#define WEP_KEY_LEN 13
-
-#define WEP_KEY_LEN_MODIF 32
-
-struct ieee80211_security {
-       u16 active_key:2,
-            enabled:1,
-           auth_mode:2,
-            auth_algo:4,
-            unicast_uses_group:1;
-       u8 key_sizes[WEP_KEYS];
-       u8 keys[WEP_KEYS][WEP_KEY_LEN_MODIF];
-       u8 level;
-       u16 flags;
-} __attribute__ ((packed));
-
-
-/*
-
- 802.11 data frame from AP
-
-      ,-------------------------------------------------------------------.
-Bytes |  2   |  2   |    6    |    6    |    6    |  2   | 0..2312 |   4  |
-      |------|------|---------|---------|---------|------|---------|------|
-Desc. | ctrl | dura |  DA/RA  |   TA    |    SA   | Sequ |  frame  |  fcs |
-      |      | tion | (BSSID) |         |         | ence |  data   |      |
-      `-------------------------------------------------------------------'
-
-Total: 28-2340 bytes
-
-*/
-
-/* Management Frame Information Element Types */
-enum {
-       MFIE_TYPE_SSID = 0,
-       MFIE_TYPE_RATES = 1,
-       MFIE_TYPE_FH_SET = 2,
-       MFIE_TYPE_DS_SET = 3,
-       MFIE_TYPE_CF_SET = 4,
-       MFIE_TYPE_TIM = 5,
-       MFIE_TYPE_IBSS_SET = 6,
-       MFIE_TYPE_COUNTRY = 7,
-       MFIE_TYPE_CHALLENGE = 16,
-       MFIE_TYPE_ERP = 42,
-       MFIE_TYPE_RSN = 48,
-       MFIE_TYPE_RATES_EX = 50,
-       MFIE_TYPE_GENERIC = 221,
-};
-
-struct ieee80211_header_data {
-       __le16 frame_ctl;
-       u16 duration_id;
-       u8 addr1[6];
-       u8 addr2[6];
-       u8 addr3[6];
-       u16 seq_ctrl;
-};
-
-struct ieee80211_hdr_4addr {
-       __le16 frame_ctl;
-       u16 duration_id;
-       u8 addr1[ETH_ALEN];
-       u8 addr2[ETH_ALEN];
-       u8 addr3[ETH_ALEN];
-       u16 seq_ctl;
-       u8 addr4[ETH_ALEN];
-} __attribute__ ((packed));
-
-struct ieee80211_hdr_3addrqos {
-       u16 frame_ctl;
-       u16 duration_id;
-       u8 addr1[ETH_ALEN];
-       u8 addr2[ETH_ALEN];
-       u8 addr3[ETH_ALEN];
-       u16 seq_ctl;
-       u16 qos_ctl;
-} __attribute__ ((packed));
-
-struct ieee80211_hdr_4addrqos {
-       u16 frame_ctl;
-       u16 duration_id;
-       u8 addr1[ETH_ALEN];
-       u8 addr2[ETH_ALEN];
-       u8 addr3[ETH_ALEN];
-       u16 seq_ctl;
-       u8 addr4[ETH_ALEN];
-       u16 qos_ctl;
-} __attribute__ ((packed));
-
-struct ieee80211_info_element_hdr {
-       u8 id;
-       u8 len;
-} __attribute__ ((packed));
-
-struct ieee80211_info_element {
-       u8 id;
-       u8 len;
-       u8 data[0];
-} __attribute__ ((packed));
-
-struct ieee80211_authentication {
-       struct ieee80211_header_data header;
-       u16 algorithm;
-       u16 transaction;
-       u16 status;
-       //struct ieee80211_info_element_hdr info_element;
-} __attribute__ ((packed));
-
-struct ieee80211_disassoc_frame {
-       struct ieee80211_hdr_3addr header;
-       u16    reasoncode;
-} __attribute__ ((packed));
-
-struct ieee80211_probe_request {
-       struct ieee80211_header_data header;
-       /* struct ieee80211_info_element info_element; */
-} __attribute__ ((packed));
-
-struct ieee80211_probe_response {
-       struct ieee80211_header_data header;
-       u32 time_stamp[2];
-       u16 beacon_interval;
-       u16 capability;
-       struct ieee80211_info_element info_element;
-} __attribute__ ((packed));
-
-struct ieee80211_assoc_request_frame {
-       struct ieee80211_hdr_3addr header;
-       u16 capability;
-       u16 listen_interval;
-       //u8 current_ap[ETH_ALEN];
-       struct ieee80211_info_element_hdr info_element;
-} __attribute__ ((packed));
-
-struct ieee80211_assoc_response_frame {
-       struct ieee80211_hdr_3addr header;
-       u16 capability;
-       u16 status;
-       u16 aid;
-       struct ieee80211_info_element info_element; /* supported rates */
-} __attribute__ ((packed));
-
-struct ieee80211_txb {
-       u8 nr_frags;
-       u8 encrypted;
-       u16 reserved;
-       u16 frag_size;
-       u16 payload_size;
-       struct sk_buff *fragments[0];
-};
-
-/* SWEEP TABLE ENTRIES NUMBER */
-#define MAX_SWEEP_TAB_ENTRIES                  42
-#define MAX_SWEEP_TAB_ENTRIES_PER_PACKET       7
-
-/* MAX_RATES_LENGTH needs to be 12.  The spec says 8, and many APs
- * only use 8, and then use extended rates for the remaining supported
- * rates.  Other APs, however, stick all of their supported rates on the
- * main rates information element... */
-#define MAX_RATES_LENGTH                       ((u8)12)
-#define MAX_RATES_EX_LENGTH                    ((u8)16)
-
-#define MAX_NETWORK_COUNT                      128
-
-#define MAX_CHANNEL_NUMBER                     165
-
-#define IEEE80211_SOFTMAC_SCAN_TIME            100 /* (HZ / 2) */
-#define IEEE80211_SOFTMAC_ASSOC_RETRY_TIME     (HZ * 2)
-
-#define CRC_LENGTH     4U
-
-#define MAX_WPA_IE_LEN 64
-
-#define NETWORK_EMPTY_ESSID    (1 << 0)
-#define NETWORK_HAS_OFDM       (1 << 1)
-#define NETWORK_HAS_CCK                (1 << 2)
-
-struct ieee80211_wmm_ac_param {
-       u8 ac_aci_acm_aifsn;
-       u8 ac_ecwmin_ecwmax;
-       u16 ac_txop_limit;
-};
-
-struct ieee80211_wmm_ts_info {
-       u8 ac_dir_tid;
-       u8 ac_up_psb;
-       u8 reserved;
-} __attribute__ ((packed));
-
-struct ieee80211_wmm_tspec_elem {
-       struct ieee80211_wmm_ts_info ts_info;
-       u16 norm_msdu_size;
-       u16 max_msdu_size;
-       u32 min_serv_inter;
-       u32 max_serv_inter;
-       u32 inact_inter;
-       u32 suspen_inter;
-       u32 serv_start_time;
-       u32 min_data_rate;
-       u32 mean_data_rate;
-       u32 peak_data_rate;
-       u32 max_burst_size;
-       u32 delay_bound;
-       u32 min_phy_rate;
-       u16 surp_band_allow;
-       u16 medium_time;
-}__attribute__((packed));
-
-enum eap_type {
-       EAP_PACKET = 0,
-       EAPOL_START,
-       EAPOL_LOGOFF,
-       EAPOL_KEY,
-       EAPOL_ENCAP_ASF_ALERT
-};
-
-static const char *eap_types[] = {
-       [EAP_PACKET]            = "EAP-Packet",
-       [EAPOL_START]           = "EAPOL-Start",
-       [EAPOL_LOGOFF]          = "EAPOL-Logoff",
-       [EAPOL_KEY]             = "EAPOL-Key",
-       [EAPOL_ENCAP_ASF_ALERT] = "EAPOL-Encap-ASF-Alert"
-};
-
-static inline const char *eap_get_type(int type)
-{
-       return (type >= ARRAY_SIZE(eap_types)) ? "Unknown" : eap_types[type];
-}
-
-struct eapol {
-       u8 snap[6];
-       u16 ethertype;
-       u8 version;
-       u8 type;
-       u16 length;
-} __attribute__ ((packed));
-
-struct ieee80211_softmac_stats {
-       unsigned int rx_ass_ok;
-       unsigned int rx_ass_err;
-       unsigned int rx_probe_rq;
-       unsigned int tx_probe_rs;
-       unsigned int tx_beacons;
-       unsigned int rx_auth_rq;
-       unsigned int rx_auth_rs_ok;
-       unsigned int rx_auth_rs_err;
-       unsigned int tx_auth_rq;
-       unsigned int no_auth_rs;
-       unsigned int no_ass_rs;
-       unsigned int tx_ass_rq;
-       unsigned int rx_ass_rq;
-       unsigned int tx_probe_rq;
-       unsigned int reassoc;
-       unsigned int swtxstop;
-       unsigned int swtxawake;
-};
-
-#define BEACON_PROBE_SSID_ID_POSITION 12
-
-/*
- * These are the data types that can make up management packets
- *
-       u16 auth_algorithm;
-       u16 auth_sequence;
-       u16 beacon_interval;
-       u16 capability;
-       u8 current_ap[ETH_ALEN];
-       u16 listen_interval;
-       struct {
-               u16 association_id:14, reserved:2;
-       } __attribute__ ((packed));
-       u32 time_stamp[2];
-       u16 reason;
-       u16 status;
-*/
-
-#define IEEE80211_DEFAULT_TX_ESSID "Penguin"
-#define IEEE80211_DEFAULT_BASIC_RATE 10
-
-enum {WMM_all_frame, WMM_two_frame, WMM_four_frame, WMM_six_frame};
-#define MAX_SP_Len  (WMM_all_frame << 4)
-#define IEEE80211_QOS_TID 0x0f
-#define QOS_CTL_NOTCONTAIN_ACK (0x01 << 5)
-
-#define MAX_IE_LEN                                             0xFF //+YJ,080625
-
-struct rtl8187se_channel_list {
-       u8      channel[MAX_CHANNEL_NUMBER + 1];
-       u8      len;
-};
-
-//by amy for ps
-#define IEEE80211_WATCH_DOG_TIME    2000
-//by amy for ps
-//by amy for antenna
-#define ANTENNA_DIVERSITY_TIMER_PERIOD         1000 // 1000 m
-//by amy for antenna
-
-#define IEEE80211_DTIM_MBCAST 4
-#define IEEE80211_DTIM_UCAST 2
-#define IEEE80211_DTIM_VALID 1
-#define IEEE80211_DTIM_INVALID 0
-
-#define IEEE80211_PS_DISABLED 0
-#define IEEE80211_PS_UNICAST IEEE80211_DTIM_UCAST
-#define IEEE80211_PS_MBCAST IEEE80211_DTIM_MBCAST
-#define IEEE80211_PS_ENABLE   IEEE80211_DTIM_VALID
-//added by David for QoS 2006/6/30
-//#define WMM_Hang_8187
-#ifdef WMM_Hang_8187
-#undef WMM_Hang_8187
-#endif
-
-#define WME_AC_BE   0x00
-#define WME_AC_BK   0x01
-#define WME_AC_VI   0x02
-#define WME_AC_VO   0x03
-#define WME_ACI_MASK 0x03
-#define WME_AIFSN_MASK 0x03
-#define WME_AC_PRAM_LEN 16
-
-//UP Mapping to AC, using in MgntQuery_SequenceNumber() and maybe for DSCP
-//#define UP2AC(up)    ((up<3) ? ((up==0)?1:0) : (up>>1))
-#define UP2AC(up) (               \
-       ((up) < 1) ? WME_AC_BE : \
-       ((up) < 3) ? WME_AC_BK : \
-       ((up) < 4) ? WME_AC_BE : \
-       ((up) < 6) ? WME_AC_VI : \
-       WME_AC_VO)
-//AC Mapping to UP, using in Tx part for selecting the corresponding TX queue
-#define AC2UP(_ac)     (       \
-       ((_ac) == WME_AC_VO) ? 6 : \
-       ((_ac) == WME_AC_VI) ? 5 : \
-       ((_ac) == WME_AC_BK) ? 1 : \
-       0)
-
-#define        ETHER_ADDR_LEN          6       /* length of an Ethernet address */
-struct ether_header {
-       u8 ether_dhost[ETHER_ADDR_LEN];
-       u8 ether_shost[ETHER_ADDR_LEN];
-       u16 ether_type;
-} __attribute__((packed));
-
-#ifndef ETHERTYPE_PAE
-#define        ETHERTYPE_PAE   0x888e          /* EAPOL PAE/802.1x */
-#endif
-#ifndef ETHERTYPE_IP
-#define        ETHERTYPE_IP    0x0800          /* IP protocol */
-#endif
-
-struct ieee80211_network {
-       /* These entries are used to identify a unique network */
-       u8 bssid[ETH_ALEN];
-       u8 channel;
-       /* Ensure null-terminated for any debug msgs */
-       u8 ssid[IW_ESSID_MAX_SIZE + 1];
-       u8 ssid_len;
-
-       /* These are network statistics */
-       struct ieee80211_rx_stats stats;
-       u16 capability;
-       u8 rates[MAX_RATES_LENGTH];
-       u8 rates_len;
-       u8 rates_ex[MAX_RATES_EX_LENGTH];
-       u8 rates_ex_len;
-       unsigned long last_scanned;
-       u8 mode;
-       u8 flags;
-       u32 last_associate;
-       u32 time_stamp[2];
-       u16 beacon_interval;
-       u16 listen_interval;
-       u16 atim_window;
-       u8 wpa_ie[MAX_WPA_IE_LEN];
-       size_t wpa_ie_len;
-       u8 rsn_ie[MAX_WPA_IE_LEN];
-       size_t rsn_ie_len;
-       u8 dtim_period;
-       u8 dtim_data;
-       u32 last_dtim_sta_time[2];
-       struct list_head list;
-       //appeded for QoS
-       u8 wmm_info;
-       struct ieee80211_wmm_ac_param wmm_param[4];
-       u8 QoS_Enable;
-       u8 SignalStrength;
-//by amy 080312
-       u8 HighestOperaRate;
-//by amy 080312
-       u8 Turbo_Enable;//enable turbo mode, added by thomas
-       u16 CountryIeLen;
-       u8 CountryIeBuf[MAX_IE_LEN];
-};
-
-enum ieee80211_state {
-
-       /* the card is not linked at all */
-       IEEE80211_NOLINK = 0,
-
-       /* IEEE80211_ASSOCIATING* are for BSS client mode
-        * the driver shall not perform RX filtering unless
-        * the state is LINKED.
-        * The driver shall just check for the state LINKED and
-        * defaults to NOLINK for ALL the other states (including
-        * LINKED_SCANNING)
-        */
-
-       /* the association procedure will start (wq scheduling)*/
-       IEEE80211_ASSOCIATING,
-       IEEE80211_ASSOCIATING_RETRY,
-
-       /* the association procedure is sending AUTH request*/
-       IEEE80211_ASSOCIATING_AUTHENTICATING,
-
-       /* the association procedure has successfully authenticated
-        * and is sending association request
-        */
-       IEEE80211_ASSOCIATING_AUTHENTICATED,
-
-       /* the link is ok. the card associated to a BSS or linked
-        * to a ibss cell or acting as an AP and creating the bss
-        */
-       IEEE80211_LINKED,
-
-       /* same as LINKED, but the driver shall apply RX filter
-        * rules as we are in NO_LINK mode. As the card is still
-        * logically linked, but it is doing a syncro site survey
-        * then it will be back to LINKED state.
-        */
-       IEEE80211_LINKED_SCANNING,
-
-};
-
-#define DEFAULT_MAX_SCAN_AGE (15 * HZ)
-#define DEFAULT_FTS 2346
-
-#define CFG_IEEE80211_RESERVE_FCS (1<<0)
-#define CFG_IEEE80211_COMPUTE_FCS (1<<1)
-
-typedef struct tx_pending_t{
-       int frag;
-       struct ieee80211_txb *txb;
-}tx_pending_t;
-
-enum {
-       COUNTRY_CODE_FCC = 0,
-       COUNTRY_CODE_IC = 1,
-       COUNTRY_CODE_ETSI = 2,
-       COUNTRY_CODE_SPAIN = 3,
-       COUNTRY_CODE_FRANCE = 4,
-       COUNTRY_CODE_MKK = 5,
-       COUNTRY_CODE_MKK1 = 6,
-       COUNTRY_CODE_ISRAEL = 7,
-       COUNTRY_CODE_TELEC = 8,
-       COUNTRY_CODE_GLOBAL_DOMAIN = 9,
-       COUNTRY_CODE_WORLD_WIDE_13_INDEX = 10
-};
-
-struct ieee80211_device {
-       struct net_device *dev;
-
-       /* Bookkeeping structures */
-       struct net_device_stats stats;
-       struct ieee80211_stats ieee_stats;
-       struct ieee80211_softmac_stats softmac_stats;
-
-       /* Probe / Beacon management */
-       struct list_head network_free_list;
-       struct list_head network_list;
-       struct ieee80211_network *networks;
-       int scans;
-       int scan_age;
-
-       int iw_mode; /* operating mode (IW_MODE_*) */
-
-       spinlock_t lock;
-       spinlock_t wpax_suitlist_lock;
-
-       int tx_headroom; /* Set to size of any additional room needed at front
-                         * of allocated Tx SKBs */
-       u32 config;
-
-       /* WEP and other encryption related settings at the device level */
-       int open_wep; /* Set to 1 to allow unencrypted frames */
-
-       int reset_on_keychange; /* Set to 1 if the HW needs to be reset on
-                                * WEP key changes */
-
-       /* If the host performs {en,de}cryption, then set to 1 */
-       int host_encrypt;
-       int host_decrypt;
-       int ieee802_1x; /* is IEEE 802.1X used */
-
-       /* WPA data */
-       int wpa_enabled;
-       int drop_unencrypted;
-       int tkip_countermeasures;
-       int privacy_invoked;
-       size_t wpa_ie_len;
-       u8 *wpa_ie;
-
-       u8 ap_mac_addr[6];
-       u16 pairwise_key_type;
-       u16 broadcast_key_type;
-
-       struct list_head crypt_deinit_list;
-       struct ieee80211_crypt_data *crypt[WEP_KEYS];
-       int tx_keyidx; /* default TX key index (crypt[tx_keyidx]) */
-       struct timer_list crypt_deinit_timer;
-
-       int bcrx_sta_key; /* use individual keys to override default keys even
-                          * with RX of broad/multicast frames */
-
-       /* Fragmentation structures */
-       /* each stream contains an entry */
-       struct ieee80211_frag_entry frag_cache[17][IEEE80211_FRAG_CACHE_LEN];
-       unsigned int frag_next_idx[17];
-       u16 fts; /* Fragmentation Threshold */
-
-       /* This stores infos for the current network.
-        * Either the network we are associated in INFRASTRUCTURE
-        * or the network that we are creating in MASTER mode.
-        * ad-hoc is a mixture ;-).
-        * Note that in infrastructure mode, even when not associated,
-        * fields bssid and essid may be valid (if wpa_set and essid_set
-        * are true) as thy carry the value set by the user via iwconfig
-        */
-       struct ieee80211_network current_network;
-
-
-       enum ieee80211_state state;
-
-       int short_slot;
-       int mode;       /* A, B, G */
-       int modulation; /* CCK, OFDM */
-       int freq_band;  /* 2.4Ghz, 5.2Ghz, Mixed */
-       int abg_true;   /* ABG flag              */
-
-       /* used for forcing the ibss workqueue to terminate
-        * without wait for the syncro scan to terminate
-        */
-       short sync_scan_hurryup;
-
-       void * pDot11dInfo;
-       bool bGlobalDomain;
-
-       // For Liteon Ch12~13 passive scan
-       u8      MinPassiveChnlNum;
-       u8      IbssStartChnl;
-
-       int rate;       /* current rate */
-       int basic_rate;
-       //FIXME: please callback, see if redundant with softmac_features
-       short active_scan;
-
-       /* this contains flags for selectively enable softmac support */
-       u16 softmac_features;
-
-       /* if the sequence control field is not filled by HW */
-       u16 seq_ctrl[5];
-
-       /* association procedure transaction sequence number */
-       u16 associate_seq;
-
-       /* AID for RTXed association responses */
-       u16 assoc_id;
-
-       /* power save mode related*/
-       short ps;
-       short sta_sleep;
-       int ps_timeout;
-       struct tasklet_struct ps_task;
-       u32 ps_th;
-       u32 ps_tl;
-
-       short raw_tx;
-       /* used if IEEE_SOFTMAC_TX_QUEUE is set */
-       short queue_stop;
-       short scanning;
-       short proto_started;
-
-       struct semaphore wx_sem;
-       struct semaphore scan_sem;
-
-       spinlock_t mgmt_tx_lock;
-       spinlock_t beacon_lock;
-
-       short beacon_txing;
-
-       short wap_set;
-       short ssid_set;
-
-       u8  wpax_type_set;    //{added by David, 2006.9.28}
-       u32 wpax_type_notify; //{added by David, 2006.9.26}
-
-       /* QoS related flag */
-       char init_wmmparam_flag;
-
-       /* for discarding duplicated packets in IBSS */
-       struct list_head ibss_mac_hash[IEEE_IBSS_MAC_HASH_SIZE];
-
-       /* for discarding duplicated packets in BSS */
-       u16 last_rxseq_num[17]; /* rx seq previous per-tid */
-       u16 last_rxfrag_num[17];/* tx frag previous per-tid */
-       unsigned long last_packet_time[17];
-
-       /* for PS mode */
-       unsigned long last_rx_ps_time;
-
-       /* used if IEEE_SOFTMAC_SINGLE_QUEUE is set */
-       struct sk_buff *mgmt_queue_ring[MGMT_QUEUE_NUM];
-       int mgmt_queue_head;
-       int mgmt_queue_tail;
-
-
-       /* used if IEEE_SOFTMAC_TX_QUEUE is set */
-       struct  tx_pending_t tx_pending;
-
-       /* used if IEEE_SOFTMAC_ASSOCIATE is set */
-       struct timer_list associate_timer;
-
-       /* used if IEEE_SOFTMAC_BEACONS is set */
-       struct timer_list beacon_timer;
-
-       struct work_struct associate_complete_wq;
-//     struct work_struct associate_retry_wq;
-       struct work_struct associate_procedure_wq;
-//     struct work_struct softmac_scan_wq;
-       struct work_struct wx_sync_scan_wq;
-       struct work_struct wmm_param_update_wq;
-       struct work_struct ps_request_tx_ack_wq;//for ps
-//     struct work_struct hw_wakeup_wq;
-//     struct work_struct hw_sleep_wq;
-//     struct work_struct watch_dog_wq;
-       bool bInactivePs;
-       bool actscanning;
-       bool beinretry;
-       u16 ListenInterval;
-       unsigned long NumRxDataInPeriod; //YJ,add,080828
-       unsigned long NumRxBcnInPeriod;  //YJ,add,080828
-       unsigned long NumRxOkTotal;
-       unsigned long NumRxUnicast;//YJ,add,080828,for keep alive
-       bool bHwRadioOff;
-        struct delayed_work softmac_scan_wq;
-        struct delayed_work associate_retry_wq;
-       struct delayed_work hw_wakeup_wq;
-       struct delayed_work hw_sleep_wq;//+by amy 080324
-       struct delayed_work watch_dog_wq;
-       struct delayed_work sw_antenna_wq;
-       struct delayed_work  start_ibss_wq;
-//by amy for rate adaptive 080312
-    struct delayed_work rate_adapter_wq;
-//by amy for rate adaptive
-       struct delayed_work hw_dig_wq;
-       struct delayed_work tx_pw_wq;
-
-//Added for RF power on power off by lizhaoming 080512
-       struct delayed_work GPIOChangeRFWorkItem;
-
-       struct workqueue_struct *wq;
-
-       /* Callback functions */
-       void (*set_security)(struct net_device *dev,
-                            struct ieee80211_security *sec);
-
-       /* Used to TX data frame by using txb structs.
-        * this is not used if in the softmac_features
-        * is set the flag IEEE_SOFTMAC_TX_QUEUE
-        */
-       int (*hard_start_xmit)(struct ieee80211_txb *txb,
-                              struct net_device *dev);
-
-       int (*reset_port)(struct net_device *dev);
-
-       /* Softmac-generated frames (management) are TXed via this
-        * callback if the flag IEEE_SOFTMAC_SINGLE_QUEUE is
-        * not set. As some cards may have different HW queues that
-        * one might want to use for data and management frames
-        * the option to have two callbacks might be useful.
-        * This function can't sleep.
-        */
-       int (*softmac_hard_start_xmit)(struct sk_buff *skb,
-                              struct net_device *dev);
-
-       /* used instead of hard_start_xmit (not softmac_hard_start_xmit)
-        * if the IEEE_SOFTMAC_TX_QUEUE feature is used to TX data
-        * frames. If the option IEEE_SOFTMAC_SINGLE_QUEUE is also set
-        * then also management frames are sent via this callback.
-        * This function can't sleep.
-        */
-       void (*softmac_data_hard_start_xmit)(struct sk_buff *skb,
-                              struct net_device *dev,int rate);
-
-       /* stops the HW queue for DATA frames. Useful to avoid
-        * waste time to TX data frame when we are reassociating
-        * This function can sleep.
-        */
-       void (*data_hard_stop)(struct net_device *dev);
-
-       /* OK this is complementar to data_poll_hard_stop */
-       void (*data_hard_resume)(struct net_device *dev);
-
-       /* ask to the driver to retune the radio .
-        * This function can sleep. the driver should ensure
-        * the radio has been switched before return.
-        */
-       void (*set_chan)(struct net_device *dev,short ch);
-
-       /* These are not used if the ieee stack takes care of
-        * scanning (IEEE_SOFTMAC_SCAN feature set).
-        * In this case only the set_chan is used.
-        *
-        * The syncro version is similar to the start_scan but
-        * does not return until all channels has been scanned.
-        * this is called in user context and should sleep,
-        * it is called in a work_queue when switching to ad-hoc mode
-        * or in behalf of iwlist scan when the card is associated
-        * and root user ask for a scan.
-        * the function stop_scan should stop both the syncro and
-        * background scanning and can sleep.
-        * The function start_scan should initiate the background
-        * scanning and can't sleep.
-        */
-       void (*scan_syncro)(struct net_device *dev);
-       void (*start_scan)(struct net_device *dev);
-       void (*stop_scan)(struct net_device *dev);
-
-       /* indicate the driver that the link state is changed
-        * for example it may indicate the card is associated now.
-        * Driver might be interested in this to apply RX filter
-        * rules or simply light the LINK led
-        */
-       void (*link_change)(struct net_device *dev);
-
-       /* these two function indicates to the HW when to start
-        * and stop to send beacons. This is used when the
-        * IEEE_SOFTMAC_BEACONS is not set. For now the
-        * stop_send_bacons is NOT guaranteed to be called only
-        * after start_send_beacons.
-        */
-       void (*start_send_beacons) (struct net_device *dev);
-       void (*stop_send_beacons) (struct net_device *dev);
-
-       /* power save mode related */
-       void (*sta_wake_up) (struct net_device *dev);
-       void (*ps_request_tx_ack) (struct net_device *dev);
-       void (*enter_sleep_state) (struct net_device *dev, u32 th, u32 tl);
-       short (*ps_is_queue_empty) (struct net_device *dev);
-
-       /* QoS related */
-       //void (*wmm_param_update) (struct net_device *dev, u8 *ac_param);
-       //void (*wmm_param_update) (struct ieee80211_device *ieee);
-
-       /* This must be the last item so that it points to the data
-        * allocated beyond this structure by alloc_ieee80211 */
-       u8 priv[0];
-};
-
-#define IEEE_A            (1<<0)
-#define IEEE_B            (1<<1)
-#define IEEE_G            (1<<2)
-#define IEEE_MODE_MASK    (IEEE_A|IEEE_B|IEEE_G)
-
-/* Generate a 802.11 header */
-
-/* Uses the channel change callback directly
- * instead of [start/stop] scan callbacks
- */
-#define IEEE_SOFTMAC_SCAN (1<<2)
-
-/* Perform authentication and association handshake */
-#define IEEE_SOFTMAC_ASSOCIATE (1<<3)
-
-/* Generate probe requests */
-#define IEEE_SOFTMAC_PROBERQ (1<<4)
-
-/* Generate response to probe requests */
-#define IEEE_SOFTMAC_PROBERS (1<<5)
-
-/* The ieee802.11 stack will manages the netif queue
- * wake/stop for the driver, taking care of 802.11
- * fragmentation. See softmac.c for details. */
-#define IEEE_SOFTMAC_TX_QUEUE (1<<7)
-
-/* Uses only the softmac_data_hard_start_xmit
- * even for TX management frames.
- */
-#define IEEE_SOFTMAC_SINGLE_QUEUE (1<<8)
-
-/* Generate beacons.  The stack will enqueue beacons
- * to the card
- */
-#define IEEE_SOFTMAC_BEACONS (1<<6)
-
-
-
-static inline void *ieee80211_priv(struct net_device *dev)
-{
-       return ((struct ieee80211_device *)netdev_priv(dev))->priv;
-}
-
-static inline int ieee80211_is_empty_essid(const char *essid, int essid_len)
-{
-       /* Single white space is for Linksys APs */
-       if (essid_len == 1 && essid[0] == ' ')
-               return 1;
-
-       /* Otherwise, if the entire essid is 0, we assume it is hidden */
-       while (essid_len) {
-               essid_len--;
-               if (essid[essid_len] != '\0')
-                       return 0;
-       }
-
-       return 1;
-}
-
-static inline int ieee80211_is_valid_mode(struct ieee80211_device *ieee,
-                                         int mode)
-{
-       /*
-        * It is possible for both access points and our device to support
-        * combinations of modes, so as long as there is one valid combination
-        * of ap/device supported modes, then return success
-        *
-        */
-       if ((mode & IEEE_A) &&
-           (ieee->modulation & IEEE80211_OFDM_MODULATION) &&
-           (ieee->freq_band & IEEE80211_52GHZ_BAND))
-               return 1;
-
-       if ((mode & IEEE_G) &&
-           (ieee->modulation & IEEE80211_OFDM_MODULATION) &&
-           (ieee->freq_band & IEEE80211_24GHZ_BAND))
-               return 1;
-
-       if ((mode & IEEE_B) &&
-           (ieee->modulation & IEEE80211_CCK_MODULATION) &&
-           (ieee->freq_band & IEEE80211_24GHZ_BAND))
-               return 1;
-
-       return 0;
-}
-
-static inline int ieee80211_get_hdrlen(u16 fc)
-{
-       int hdrlen = 24;
-
-       switch (WLAN_FC_GET_TYPE(fc)) {
-       case IEEE80211_FTYPE_DATA:
-               if ((fc & IEEE80211_FCTL_FROMDS) && (fc & IEEE80211_FCTL_TODS))
-                       hdrlen = 30; /* Addr4 */
-               if(IEEE80211_QOS_HAS_SEQ(fc))
-                       hdrlen += 2; /* QOS ctrl*/
-               break;
-       case IEEE80211_FTYPE_CTL:
-               switch (WLAN_FC_GET_STYPE(fc)) {
-               case IEEE80211_STYPE_CTS:
-               case IEEE80211_STYPE_ACK:
-                       hdrlen = 10;
-                       break;
-               default:
-                       hdrlen = 16;
-                       break;
-               }
-               break;
-       }
-
-       return hdrlen;
-}
-
-
-
-/* ieee80211.c */
-extern void free_ieee80211(struct net_device *dev);
-extern struct net_device *alloc_ieee80211(int sizeof_priv);
-
-extern int ieee80211_set_encryption(struct ieee80211_device *ieee);
-
-/* ieee80211_tx.c */
-
-extern int ieee80211_encrypt_fragment(struct ieee80211_device *ieee,
-                                     struct sk_buff *frag, int hdr_len);
-
-extern int ieee80211_rtl_xmit(struct sk_buff *skb, struct net_device *dev);
-extern void ieee80211_txb_free(struct ieee80211_txb *);
-
-
-/* ieee80211_rx.c */
-extern int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
-                           struct ieee80211_rx_stats *rx_stats);
-extern void ieee80211_rx_mgt(struct ieee80211_device *ieee,
-                            struct ieee80211_hdr_4addr *header,
-                            struct ieee80211_rx_stats *stats);
-
-/* ieee80211_wx.c */
-extern int ieee80211_wx_get_scan(struct ieee80211_device *ieee,
-                                struct iw_request_info *info,
-                                union iwreq_data *wrqu, char *key);
-extern int ieee80211_wx_set_encode(struct ieee80211_device *ieee,
-                                  struct iw_request_info *info,
-                                  union iwreq_data *wrqu, char *key);
-extern int ieee80211_wx_get_encode(struct ieee80211_device *ieee,
-                                  struct iw_request_info *info,
-                                  union iwreq_data *wrqu, char *key);
-extern int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee,
-                                      struct iw_request_info *info,
-                                      union iwreq_data *wrqu, char *extra);
-int ieee80211_wx_set_auth(struct ieee80211_device *ieee,
-                         struct iw_request_info *info,
-                         struct iw_param *data, char *extra);
-int ieee80211_wx_set_mlme(struct ieee80211_device *ieee,
-                         struct iw_request_info *info,
-                         union iwreq_data *wrqu, char *extra);
-
-int ieee80211_wx_set_gen_ie(struct ieee80211_device *ieee, u8 *ie, size_t len);
-/* ieee80211_softmac.c */
-extern short ieee80211_is_54g(const struct ieee80211_network *net);
-extern short ieee80211_is_shortslot(const struct ieee80211_network *net);
-extern int ieee80211_rx_frame_softmac(struct ieee80211_device *ieee,
-                                     struct sk_buff *skb,
-                                     struct ieee80211_rx_stats *rx_stats,
-                                     u16 type, u16 stype);
-extern void ieee80211_softmac_new_net(struct ieee80211_device *ieee,
-                                     struct ieee80211_network *net);
-
-extern void ieee80211_softmac_xmit(struct ieee80211_txb *txb,
-                                  struct ieee80211_device *ieee);
-extern void ieee80211_softmac_check_all_nets(struct ieee80211_device *ieee);
-extern void ieee80211_start_bss(struct ieee80211_device *ieee);
-extern void ieee80211_start_master_bss(struct ieee80211_device *ieee);
-extern void ieee80211_start_ibss(struct ieee80211_device *ieee);
-extern void ieee80211_softmac_init(struct ieee80211_device *ieee);
-extern void ieee80211_softmac_free(struct ieee80211_device *ieee);
-extern void ieee80211_associate_abort(struct ieee80211_device *ieee);
-extern void ieee80211_disassociate(struct ieee80211_device *ieee);
-extern void ieee80211_stop_scan(struct ieee80211_device *ieee);
-extern void ieee80211_start_scan_syncro(struct ieee80211_device *ieee);
-extern void ieee80211_check_all_nets(struct ieee80211_device *ieee);
-extern void ieee80211_start_protocol(struct ieee80211_device *ieee);
-extern void ieee80211_stop_protocol(struct ieee80211_device *ieee);
-extern void ieee80211_softmac_start_protocol(struct ieee80211_device *ieee);
-extern void ieee80211_softmac_stop_protocol(struct ieee80211_device *ieee);
-extern void ieee80211_reset_queue(struct ieee80211_device *ieee);
-extern void ieee80211_rtl_wake_queue(struct ieee80211_device *ieee);
-extern void ieee80211_rtl_stop_queue(struct ieee80211_device *ieee);
-extern struct sk_buff *ieee80211_get_beacon(struct ieee80211_device *ieee);
-extern void ieee80211_start_send_beacons(struct ieee80211_device *ieee);
-extern void ieee80211_stop_send_beacons(struct ieee80211_device *ieee);
-extern int ieee80211_wpa_supplicant_ioctl(struct ieee80211_device *ieee,
-                                         struct iw_point *p);
-extern void notify_wx_assoc_event(struct ieee80211_device *ieee);
-extern void ieee80211_ps_tx_ack(struct ieee80211_device *ieee, short success);
-extern void SendDisassociation(struct ieee80211_device *ieee, u8 *asSta,
-                              u8 asRsn);
-extern void ieee80211_rtl_start_scan(struct ieee80211_device *ieee);
-
-//Add for RF power on power off by lizhaoming 080512
-extern void SendDisassociation(struct ieee80211_device *ieee, u8 *asSta,
-                              u8 asRsn);
-
-/* ieee80211_crypt_ccmp&tkip&wep.c */
-extern void ieee80211_tkip_null(void);
-extern void ieee80211_wep_null(void);
-extern void ieee80211_ccmp_null(void);
-/* ieee80211_softmac_wx.c */
-
-extern int ieee80211_wx_get_wap(struct ieee80211_device *ieee,
-                               struct iw_request_info *info,
-                               union iwreq_data *wrqu, char *ext);
-
-extern int ieee80211_wx_set_wap(struct ieee80211_device *ieee,
-                               struct iw_request_info *info,
-                               union iwreq_data *awrq,
-                               char *extra);
-
-extern int ieee80211_wx_get_essid(struct ieee80211_device *ieee,
-                                 struct iw_request_info *a,
-                                 union iwreq_data *wrqu, char *b);
-
-extern int ieee80211_wx_set_rate(struct ieee80211_device *ieee,
-                                struct iw_request_info *info,
-                                union iwreq_data *wrqu, char *extra);
-
-extern int ieee80211_wx_get_rate(struct ieee80211_device *ieee,
-                                struct iw_request_info *info,
-                                union iwreq_data *wrqu, char *extra);
-
-extern int ieee80211_wx_set_mode(struct ieee80211_device *ieee,
-                                struct iw_request_info *a,
-                                union iwreq_data *wrqu, char *b);
-
-extern int ieee80211_wx_set_scan(struct ieee80211_device *ieee,
-                                struct iw_request_info *a,
-                                union iwreq_data *wrqu, char *b);
-
-extern int ieee80211_wx_set_essid(struct ieee80211_device *ieee,
-                                 struct iw_request_info *a,
-                                 union iwreq_data *wrqu, char *extra);
-
-extern int ieee80211_wx_get_mode(struct ieee80211_device *ieee,
-                                struct iw_request_info *a,
-                                union iwreq_data *wrqu, char *b);
-
-extern int ieee80211_wx_set_freq(struct ieee80211_device *ieee,
-                                struct iw_request_info *a,
-                                union iwreq_data *wrqu, char *b);
-
-extern int ieee80211_wx_get_freq(struct ieee80211_device *ieee,
-                                struct iw_request_info *a,
-                                union iwreq_data *wrqu, char *b);
-
-extern void ieee80211_wx_sync_scan_wq(struct work_struct *work);
-
-extern int ieee80211_wx_set_rawtx(struct ieee80211_device *ieee,
-                                 struct iw_request_info *info,
-                                 union iwreq_data *wrqu, char *extra);
-
-extern int ieee80211_wx_get_name(struct ieee80211_device *ieee,
-                                struct iw_request_info *info,
-                                union iwreq_data *wrqu, char *extra);
-
-extern int ieee80211_wx_set_power(struct ieee80211_device *ieee,
-                                 struct iw_request_info *info,
-                                 union iwreq_data *wrqu, char *extra);
-
-extern int ieee80211_wx_get_power(struct ieee80211_device *ieee,
-                                 struct iw_request_info *info,
-                                 union iwreq_data *wrqu, char *extra);
-
-extern void ieee80211_softmac_ips_scan_syncro(struct ieee80211_device *ieee);
-
-extern void ieee80211_sta_ps_send_null_frame(struct ieee80211_device *ieee,
-                                            short pwr);
-
-extern const long ieee80211_wlan_frequencies[];
-
-extern inline void ieee80211_increment_scans(struct ieee80211_device *ieee)
-{
-       ieee->scans++;
-}
-
-extern inline int ieee80211_get_scans(struct ieee80211_device *ieee)
-{
-       return ieee->scans;
-}
-
-static inline const char *escape_essid(const char *essid, u8 essid_len) {
-       static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
-       const char *s = essid;
-       char *d = escaped;
-
-       if (ieee80211_is_empty_essid(essid, essid_len)) {
-               memcpy(escaped, "<hidden>", sizeof("<hidden>"));
-               return escaped;
-       }
-
-       essid_len = min(essid_len, (u8)IW_ESSID_MAX_SIZE);
-       while (essid_len--) {
-               if (*s == '\0') {
-                       *d++ = '\\';
-                       *d++ = '0';
-                       s++;
-               } else {
-                       *d++ = *s++;
-               }
-       }
-       *d = '\0';
-       return escaped;
-}
-#endif /* IEEE80211_H */
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt.c
deleted file mode 100644 (file)
index 101f0c0..0000000
+++ /dev/null
@@ -1,240 +0,0 @@
-/*
- * Host AP crypto routines
- *
- * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
- * Portions Copyright (C) 2004, Intel Corporation <jketreno@linux.intel.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation. See README and COPYING for
- * more details.
- *
- */
-
-#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
-
-//#include <linux/config.h>
-#include <linux/module.h>
-#include <linux/slab.h>
-#include <linux/string.h>
-#include <linux/errno.h>
-
-#include "ieee80211.h"
-
-MODULE_AUTHOR("Jouni Malinen");
-MODULE_DESCRIPTION("HostAP crypto");
-MODULE_LICENSE("GPL");
-
-struct ieee80211_crypto_alg {
-       struct list_head list;
-       struct ieee80211_crypto_ops *ops;
-};
-
-
-struct ieee80211_crypto {
-       struct list_head algs;
-       spinlock_t lock;
-};
-
-static struct ieee80211_crypto *hcrypt;
-
-void ieee80211_crypt_deinit_entries(struct ieee80211_device *ieee, int force)
-{
-       struct list_head *ptr, *n;
-       struct ieee80211_crypt_data *entry;
-
-       for (ptr = ieee->crypt_deinit_list.next, n = ptr->next;
-            ptr != &ieee->crypt_deinit_list; ptr = n, n = ptr->next) {
-               entry = list_entry(ptr, struct ieee80211_crypt_data, list);
-
-               if (atomic_read(&entry->refcnt) != 0 && !force)
-                       continue;
-
-               list_del(ptr);
-
-               if (entry->ops)
-                       entry->ops->deinit(entry->priv);
-               kfree(entry);
-       }
-}
-
-void ieee80211_crypt_deinit_handler(unsigned long data)
-{
-       struct ieee80211_device *ieee = (struct ieee80211_device *)data;
-       unsigned long flags;
-
-       spin_lock_irqsave(&ieee->lock, flags);
-       ieee80211_crypt_deinit_entries(ieee, 0);
-       if (!list_empty(&ieee->crypt_deinit_list)) {
-               pr_debug("entries remaining in delayed crypt deletion list\n");
-               ieee->crypt_deinit_timer.expires = jiffies + HZ;
-               add_timer(&ieee->crypt_deinit_timer);
-       }
-       spin_unlock_irqrestore(&ieee->lock, flags);
-
-}
-
-void ieee80211_crypt_delayed_deinit(struct ieee80211_device *ieee,
-                                   struct ieee80211_crypt_data **crypt)
-{
-       struct ieee80211_crypt_data *tmp;
-       unsigned long flags;
-
-       if (*crypt == NULL)
-               return;
-
-       tmp = *crypt;
-       *crypt = NULL;
-
-       /* must not run ops->deinit() while there may be pending encrypt or
-        * decrypt operations. Use a list of delayed deinits to avoid needing
-        * locking. */
-
-       spin_lock_irqsave(&ieee->lock, flags);
-       list_add(&tmp->list, &ieee->crypt_deinit_list);
-       if (!timer_pending(&ieee->crypt_deinit_timer)) {
-               ieee->crypt_deinit_timer.expires = jiffies + HZ;
-               add_timer(&ieee->crypt_deinit_timer);
-       }
-       spin_unlock_irqrestore(&ieee->lock, flags);
-}
-
-int ieee80211_register_crypto_ops(struct ieee80211_crypto_ops *ops)
-{
-       unsigned long flags;
-       struct ieee80211_crypto_alg *alg;
-
-       if (hcrypt == NULL)
-               return -1;
-
-       alg = kzalloc(sizeof(*alg), GFP_KERNEL);
-       if (alg == NULL)
-               return -ENOMEM;
-
-       alg->ops = ops;
-
-       spin_lock_irqsave(&hcrypt->lock, flags);
-       list_add(&alg->list, &hcrypt->algs);
-       spin_unlock_irqrestore(&hcrypt->lock, flags);
-
-       pr_debug("registered algorithm '%s'\n", ops->name);
-
-       return 0;
-}
-
-int ieee80211_unregister_crypto_ops(struct ieee80211_crypto_ops *ops)
-{
-       unsigned long flags;
-       struct list_head *ptr;
-       struct ieee80211_crypto_alg *del_alg = NULL;
-
-       if (hcrypt == NULL)
-               return -1;
-
-       spin_lock_irqsave(&hcrypt->lock, flags);
-       for (ptr = hcrypt->algs.next; ptr != &hcrypt->algs; ptr = ptr->next) {
-               struct ieee80211_crypto_alg *alg =
-                       (struct ieee80211_crypto_alg *) ptr;
-               if (alg->ops == ops) {
-                       list_del(&alg->list);
-                       del_alg = alg;
-                       break;
-               }
-       }
-       spin_unlock_irqrestore(&hcrypt->lock, flags);
-
-       if (del_alg) {
-               pr_debug("unregistered algorithm '%s'\n", ops->name);
-               kfree(del_alg);
-       }
-
-       return del_alg ? 0 : -1;
-}
-
-
-struct ieee80211_crypto_ops *ieee80211_get_crypto_ops(const char *name)
-{
-       unsigned long flags;
-       struct list_head *ptr;
-       struct ieee80211_crypto_alg *found_alg = NULL;
-
-       if (hcrypt == NULL)
-               return NULL;
-
-       spin_lock_irqsave(&hcrypt->lock, flags);
-       for (ptr = hcrypt->algs.next; ptr != &hcrypt->algs; ptr = ptr->next) {
-               struct ieee80211_crypto_alg *alg =
-                       (struct ieee80211_crypto_alg *) ptr;
-               if (strcmp(alg->ops->name, name) == 0) {
-                       found_alg = alg;
-                       break;
-               }
-       }
-       spin_unlock_irqrestore(&hcrypt->lock, flags);
-
-       if (found_alg)
-               return found_alg->ops;
-       else
-               return NULL;
-}
-
-
-static void *ieee80211_crypt_null_init(int keyidx) { return (void *) 1; }
-static void ieee80211_crypt_null_deinit(void *priv) {}
-
-static struct ieee80211_crypto_ops ieee80211_crypt_null = {
-       .name                   = "NULL",
-       .init                   = ieee80211_crypt_null_init,
-       .deinit                 = ieee80211_crypt_null_deinit,
-       .encrypt_mpdu           = NULL,
-       .decrypt_mpdu           = NULL,
-       .encrypt_msdu           = NULL,
-       .decrypt_msdu           = NULL,
-       .set_key                = NULL,
-       .get_key                = NULL,
-       .extra_prefix_len       = 0,
-       .extra_postfix_len      = 0,
-       .owner                  = THIS_MODULE,
-};
-
-
-int ieee80211_crypto_init(void)
-{
-       int ret = -ENOMEM;
-
-       hcrypt = kzalloc(sizeof(*hcrypt), GFP_KERNEL);
-       if (!hcrypt)
-               goto out;
-
-       INIT_LIST_HEAD(&hcrypt->algs);
-       spin_lock_init(&hcrypt->lock);
-
-       ret = ieee80211_register_crypto_ops(&ieee80211_crypt_null);
-       if (ret < 0) {
-               kfree(hcrypt);
-               hcrypt = NULL;
-       }
-out:
-       return ret;
-}
-
-
-void ieee80211_crypto_deinit(void)
-{
-       struct list_head *ptr, *n;
-       struct ieee80211_crypto_alg *alg = NULL;
-
-       if (hcrypt == NULL)
-               return;
-
-       list_for_each_safe(ptr, n, &hcrypt->algs) {
-               alg = list_entry(ptr, struct ieee80211_crypto_alg, list);
-               if (alg) {
-                       list_del(ptr);
-                       pr_debug("unregistered algorithm '%s' (deinit)\n",
-                                alg->ops->name);
-                       kfree(alg);
-               }
-       }
-       kfree(hcrypt);
-}
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt.h b/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt.h
deleted file mode 100644 (file)
index 0b4ea43..0000000
+++ /dev/null
@@ -1,86 +0,0 @@
-/*
- * Original code based on Host AP (software wireless LAN access point) driver
- * for Intersil Prism2/2.5/3.
- *
- * Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
- * <jkmaline@cc.hut.fi>
- * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
- *
- * Adaption to a generic IEEE 802.11 stack by James Ketrenos
- * <jketreno@linux.intel.com>
- *
- * Copyright (c) 2004, Intel Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation. See README and COPYING for
- * more details.
- */
-
-/*
- * This file defines the interface to the ieee80211 crypto module.
- */
-#ifndef IEEE80211_CRYPT_H
-#define IEEE80211_CRYPT_H
-
-#include <linux/skbuff.h>
-
-struct ieee80211_crypto_ops {
-       const char *name;
-
-       /* init new crypto context (e.g., allocate private data space,
-        * select IV, etc.); returns NULL on failure or pointer to allocated
-        * private data on success */
-       void * (*init)(int keyidx);
-
-       /* deinitialize crypto context and free allocated private data */
-       void (*deinit)(void *priv);
-
-       /* encrypt/decrypt return < 0 on error or >= 0 on success. The return
-        * value from decrypt_mpdu is passed as the keyidx value for
-        * decrypt_msdu. skb must have enough head and tail room for the
-        * encryption; if not, error will be returned; these functions are
-        * called for all MPDUs (i.e., fragments).
-        */
-       int (*encrypt_mpdu)(struct sk_buff *skb, int hdr_len, void *priv);
-       int (*decrypt_mpdu)(struct sk_buff *skb, int hdr_len, void *priv);
-
-       /* These functions are called for full MSDUs, i.e. full frames.
-        * These can be NULL if full MSDU operations are not needed. */
-       int (*encrypt_msdu)(struct sk_buff *skb, int hdr_len, void *priv);
-       int (*decrypt_msdu)(struct sk_buff *skb, int keyidx, int hdr_len,
-                           void *priv);
-
-       int (*set_key)(void *key, int len, u8 *seq, void *priv);
-       int (*get_key)(void *key, int len, u8 *seq, void *priv);
-
-       /* procfs handler for printing out key information and possible
-        * statistics */
-       char * (*print_stats)(char *p, void *priv);
-
-       /* maximum number of bytes added by encryption; encrypt buf is
-        * allocated with extra_prefix_len bytes, copy of in_buf, and
-        * extra_postfix_len; encrypt need not use all this space, but
-        * the result must start at the beginning of the buffer and correct
-        * length must be returned */
-       int extra_prefix_len, extra_postfix_len;
-
-       struct module *owner;
-};
-
-struct ieee80211_crypt_data {
-       struct list_head list; /* delayed deletion list */
-       struct ieee80211_crypto_ops *ops;
-       void *priv;
-       atomic_t refcnt;
-};
-
-int ieee80211_register_crypto_ops(struct ieee80211_crypto_ops *ops);
-int ieee80211_unregister_crypto_ops(struct ieee80211_crypto_ops *ops);
-struct ieee80211_crypto_ops *ieee80211_get_crypto_ops(const char *name);
-void ieee80211_crypt_deinit_entries(struct ieee80211_device *, int);
-void ieee80211_crypt_deinit_handler(unsigned long);
-void ieee80211_crypt_delayed_deinit(struct ieee80211_device *ieee,
-                                   struct ieee80211_crypt_data **crypt);
-
-#endif
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_ccmp.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_ccmp.c
deleted file mode 100644 (file)
index 4fe2538..0000000
+++ /dev/null
@@ -1,455 +0,0 @@
-/*
- * Host AP crypt: host-based CCMP encryption implementation for Host AP driver
- *
- * Copyright (c) 2003-2004, Jouni Malinen <jkmaline@cc.hut.fi>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation. See README and COPYING for
- * more details.
- */
-
-#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
-
-#include <linux/module.h>
-#include <linux/slab.h>
-#include <linux/random.h>
-#include <linux/skbuff.h>
-#include <linux/netdevice.h>
-#include <linux/if_ether.h>
-#include <linux/if_arp.h>
-#include <linux/string.h>
-#include <linux/wireless.h>
-
-#include "ieee80211.h"
-
-#include <linux/crypto.h>
-#include <linux/scatterlist.h>
-
-MODULE_AUTHOR("Jouni Malinen");
-MODULE_DESCRIPTION("Host AP crypt: CCMP");
-MODULE_LICENSE("GPL");
-
-
-#define AES_BLOCK_LEN 16
-#define CCMP_HDR_LEN 8
-#define CCMP_MIC_LEN 8
-#define CCMP_TK_LEN 16
-#define CCMP_PN_LEN 6
-
-struct ieee80211_ccmp_data {
-       u8 key[CCMP_TK_LEN];
-       int key_set;
-
-       u8 tx_pn[CCMP_PN_LEN];
-       u8 rx_pn[CCMP_PN_LEN];
-
-       u32 dot11RSNAStatsCCMPFormatErrors;
-       u32 dot11RSNAStatsCCMPReplays;
-       u32 dot11RSNAStatsCCMPDecryptErrors;
-
-       int key_idx;
-
-       struct crypto_tfm *tfm;
-
-       /* scratch buffers for virt_to_page() (crypto API) */
-       u8 tx_b0[AES_BLOCK_LEN], tx_b[AES_BLOCK_LEN],
-               tx_e[AES_BLOCK_LEN], tx_s0[AES_BLOCK_LEN];
-       u8 rx_b0[AES_BLOCK_LEN], rx_b[AES_BLOCK_LEN], rx_a[AES_BLOCK_LEN];
-};
-
-static void ieee80211_ccmp_aes_encrypt(struct crypto_tfm *tfm,
-                               const u8 pt[16], u8 ct[16])
-{
-       crypto_cipher_encrypt_one((void *)tfm, ct, pt);
-}
-
-static void *ieee80211_ccmp_init(int key_idx)
-{
-       struct ieee80211_ccmp_data *priv;
-
-       priv = kzalloc(sizeof(*priv), GFP_ATOMIC);
-       if (priv == NULL)
-               goto fail;
-       priv->key_idx = key_idx;
-
-       priv->tfm = (void *)crypto_alloc_cipher("aes", 0, CRYPTO_ALG_ASYNC);
-       if (IS_ERR(priv->tfm)) {
-               pr_debug("could not allocate crypto API aes\n");
-               priv->tfm = NULL;
-               goto fail;
-       }
-
-       return priv;
-
-fail:
-       if (priv) {
-               if (priv->tfm)
-                       crypto_free_cipher((void *)priv->tfm);
-               kfree(priv);
-       }
-
-       return NULL;
-}
-
-
-static void ieee80211_ccmp_deinit(void *priv)
-{
-       struct ieee80211_ccmp_data *_priv = priv;
-
-       if (_priv && _priv->tfm)
-               crypto_free_cipher((void *)_priv->tfm);
-       kfree(priv);
-}
-
-
-static inline void xor_block(u8 *b, u8 *a, size_t len)
-{
-       int i;
-       for (i = 0; i < len; i++)
-               b[i] ^= a[i];
-}
-
-static void ccmp_init_blocks(struct crypto_tfm *tfm,
-                            struct ieee80211_hdr_4addr *hdr,
-                            u8 *pn, size_t dlen, u8 *b0, u8 *auth,
-                            u8 *s0)
-{
-       u8 *pos, qc = 0;
-       size_t aad_len;
-       u16 fc;
-       int a4_included, qc_included;
-       u8 aad[2 * AES_BLOCK_LEN];
-
-       fc = le16_to_cpu(hdr->frame_ctl);
-       a4_included = ((fc & (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) ==
-                      (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS));
-       /*
-       qc_included = ((WLAN_FC_GET_TYPE(fc) == IEEE80211_FTYPE_DATA) &&
-                      (WLAN_FC_GET_STYPE(fc) & 0x08));
-       */
-       qc_included = ((WLAN_FC_GET_TYPE(fc) == IEEE80211_FTYPE_DATA) &&
-                      (WLAN_FC_GET_STYPE(fc) & 0x80));
-       aad_len = 22;
-       if (a4_included)
-               aad_len += 6;
-       if (qc_included) {
-               pos = (u8 *) &hdr->addr4;
-               if (a4_included)
-                       pos += 6;
-               qc = *pos & 0x0f;
-               aad_len += 2;
-       }
-       /* CCM Initial Block:
-        * Flag (Include authentication header, M=3 (8-octet MIC),
-        *       L=1 (2-octet Dlen))
-        * Nonce: 0x00 | A2 | PN
-        * Dlen */
-       b0[0] = 0x59;
-       b0[1] = qc;
-       memcpy(b0 + 2, hdr->addr2, ETH_ALEN);
-       memcpy(b0 + 8, pn, CCMP_PN_LEN);
-       b0[14] = (dlen >> 8) & 0xff;
-       b0[15] = dlen & 0xff;
-
-       /* AAD:
-        * FC with bits 4..6 and 11..13 masked to zero; 14 is always one
-        * A1 | A2 | A3
-        * SC with bits 4..15 (seq#) masked to zero
-        * A4 (if present)
-        * QC (if present)
-        */
-       pos = (u8 *) hdr;
-       aad[0] = 0; /* aad_len >> 8 */
-       aad[1] = aad_len & 0xff;
-       aad[2] = pos[0] & 0x8f;
-       aad[3] = pos[1] & 0xc7;
-       memcpy(aad + 4, hdr->addr1, 3 * ETH_ALEN);
-       pos = (u8 *) &hdr->seq_ctl;
-       aad[22] = pos[0] & 0x0f;
-       aad[23] = 0; /* all bits masked */
-       memset(aad + 24, 0, 8);
-       if (a4_included)
-               memcpy(aad + 24, hdr->addr4, ETH_ALEN);
-       if (qc_included) {
-               aad[a4_included ? 30 : 24] = qc;
-               /* rest of QC masked */
-       }
-
-       /* Start with the first block and AAD */
-       ieee80211_ccmp_aes_encrypt(tfm, b0, auth);
-       xor_block(auth, aad, AES_BLOCK_LEN);
-       ieee80211_ccmp_aes_encrypt(tfm, auth, auth);
-       xor_block(auth, &aad[AES_BLOCK_LEN], AES_BLOCK_LEN);
-       ieee80211_ccmp_aes_encrypt(tfm, auth, auth);
-       b0[0] &= 0x07;
-       b0[14] = b0[15] = 0;
-       ieee80211_ccmp_aes_encrypt(tfm, b0, s0);
-}
-
-static int ieee80211_ccmp_encrypt(struct sk_buff *skb, int hdr_len, void *priv)
-{
-       struct ieee80211_ccmp_data *key = priv;
-       int data_len, i;
-       u8 *pos;
-       struct ieee80211_hdr_4addr *hdr;
-       int blocks, last, len;
-       u8 *mic;
-       u8 *b0 = key->tx_b0;
-       u8 *b = key->tx_b;
-       u8 *e = key->tx_e;
-       u8 *s0 = key->tx_s0;
-
-       if (skb_headroom(skb) < CCMP_HDR_LEN ||
-           skb_tailroom(skb) < CCMP_MIC_LEN ||
-           skb->len < hdr_len)
-               return -1;
-
-       data_len = skb->len - hdr_len;
-       pos = skb_push(skb, CCMP_HDR_LEN);
-       memmove(pos, pos + CCMP_HDR_LEN, hdr_len);
-       pos += hdr_len;
-
-       i = CCMP_PN_LEN - 1;
-       while (i >= 0) {
-               key->tx_pn[i]++;
-               if (key->tx_pn[i] != 0)
-                       break;
-               i--;
-       }
-
-       *pos++ = key->tx_pn[5];
-       *pos++ = key->tx_pn[4];
-       *pos++ = 0;
-       *pos++ = (key->key_idx << 6) | (1 << 5) /* Ext IV included */;
-       *pos++ = key->tx_pn[3];
-       *pos++ = key->tx_pn[2];
-       *pos++ = key->tx_pn[1];
-       *pos++ = key->tx_pn[0];
-
-       hdr = (struct ieee80211_hdr_4addr *)skb->data;
-       mic = skb_put(skb, CCMP_MIC_LEN);
-
-       ccmp_init_blocks(key->tfm, hdr, key->tx_pn, data_len, b0, b, s0);
-
-       blocks = (data_len + AES_BLOCK_LEN - 1) / AES_BLOCK_LEN;
-       last = data_len % AES_BLOCK_LEN;
-
-       for (i = 1; i <= blocks; i++) {
-               len = (i == blocks && last) ? last : AES_BLOCK_LEN;
-               /* Authentication */
-               xor_block(b, pos, len);
-               ieee80211_ccmp_aes_encrypt(key->tfm, b, b);
-               /* Encryption, with counter */
-               b0[14] = (i >> 8) & 0xff;
-               b0[15] = i & 0xff;
-               ieee80211_ccmp_aes_encrypt(key->tfm, b0, e);
-               xor_block(pos, e, len);
-               pos += len;
-       }
-
-       for (i = 0; i < CCMP_MIC_LEN; i++)
-               mic[i] = b[i] ^ s0[i];
-
-       return 0;
-}
-
-
-static int ieee80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
-{
-       struct ieee80211_ccmp_data *key = priv;
-       u8 keyidx, *pos;
-       struct ieee80211_hdr_4addr *hdr;
-       u8 pn[6];
-       size_t data_len = skb->len - hdr_len - CCMP_HDR_LEN - CCMP_MIC_LEN;
-       u8 *mic = skb->data + skb->len - CCMP_MIC_LEN;
-       u8 *b0 = key->rx_b0;
-       u8 *b = key->rx_b;
-       u8 *a = key->rx_a;
-       int i, blocks, last, len;
-
-       if (skb->len < hdr_len + CCMP_HDR_LEN + CCMP_MIC_LEN) {
-               key->dot11RSNAStatsCCMPFormatErrors++;
-               return -1;
-       }
-
-       hdr = (struct ieee80211_hdr_4addr *)skb->data;
-       pos = skb->data + hdr_len;
-       keyidx = pos[3];
-       if (!(keyidx & (1 << 5))) {
-               if (net_ratelimit()) {
-                       pr_debug("received packet without ExtIV flag from %pM\n",
-                                hdr->addr2);
-               }
-               key->dot11RSNAStatsCCMPFormatErrors++;
-               return -2;
-       }
-       keyidx >>= 6;
-       if (key->key_idx != keyidx) {
-               pr_debug("RX tkey->key_idx=%d frame keyidx=%d priv=%p\n",
-                        key->key_idx, keyidx, priv);
-               return -6;
-       }
-       if (!key->key_set) {
-               if (net_ratelimit()) {
-                       pr_debug("received packet from %pM with keyid=%d that does not have a configured key\n",
-                                hdr->addr2, keyidx);
-               }
-               return -3;
-       }
-
-       pn[0] = pos[7];
-       pn[1] = pos[6];
-       pn[2] = pos[5];
-       pn[3] = pos[4];
-       pn[4] = pos[1];
-       pn[5] = pos[0];
-       pos += 8;
-
-       if (memcmp(pn, key->rx_pn, CCMP_PN_LEN) <= 0) {
-               if (net_ratelimit()) {
-                       pr_debug("replay detected: STA=%pM previous PN %pm received PN %pm\n",
-                                hdr->addr2, key->rx_pn, pn);
-               }
-               key->dot11RSNAStatsCCMPReplays++;
-               return -4;
-       }
-
-       ccmp_init_blocks(key->tfm, hdr, pn, data_len, b0, a, b);
-       xor_block(mic, b, CCMP_MIC_LEN);
-
-       blocks = (data_len + AES_BLOCK_LEN - 1) / AES_BLOCK_LEN;
-       last = data_len % AES_BLOCK_LEN;
-
-       for (i = 1; i <= blocks; i++) {
-               len = (i == blocks && last) ? last : AES_BLOCK_LEN;
-               /* Decrypt, with counter */
-               b0[14] = (i >> 8) & 0xff;
-               b0[15] = i & 0xff;
-               ieee80211_ccmp_aes_encrypt(key->tfm, b0, b);
-               xor_block(pos, b, len);
-               /* Authentication */
-               xor_block(a, pos, len);
-               ieee80211_ccmp_aes_encrypt(key->tfm, a, a);
-               pos += len;
-       }
-
-       if (memcmp(mic, a, CCMP_MIC_LEN) != 0) {
-               if (net_ratelimit())
-                       pr_debug("decrypt failed: STA=%pM\n", hdr->addr2);
-
-               key->dot11RSNAStatsCCMPDecryptErrors++;
-               return -5;
-       }
-
-       memcpy(key->rx_pn, pn, CCMP_PN_LEN);
-
-       /* Remove hdr and MIC */
-       memmove(skb->data + CCMP_HDR_LEN, skb->data, hdr_len);
-       skb_pull(skb, CCMP_HDR_LEN);
-       skb_trim(skb, skb->len - CCMP_MIC_LEN);
-
-       return keyidx;
-}
-
-
-static int ieee80211_ccmp_set_key(void *key, int len, u8 *seq, void *priv)
-{
-       struct ieee80211_ccmp_data *data = priv;
-       int keyidx;
-       struct crypto_tfm *tfm = data->tfm;
-
-       keyidx = data->key_idx;
-       memset(data, 0, sizeof(*data));
-       data->key_idx = keyidx;
-       data->tfm = tfm;
-       if (len == CCMP_TK_LEN) {
-               memcpy(data->key, key, CCMP_TK_LEN);
-               data->key_set = 1;
-               if (seq) {
-                       data->rx_pn[0] = seq[5];
-                       data->rx_pn[1] = seq[4];
-                       data->rx_pn[2] = seq[3];
-                       data->rx_pn[3] = seq[2];
-                       data->rx_pn[4] = seq[1];
-                       data->rx_pn[5] = seq[0];
-               }
-               crypto_cipher_setkey((void *)data->tfm, data->key, CCMP_TK_LEN);
-       } else if (len == 0)
-               data->key_set = 0;
-       else
-               return -1;
-
-       return 0;
-}
-
-
-static int ieee80211_ccmp_get_key(void *key, int len, u8 *seq, void *priv)
-{
-       struct ieee80211_ccmp_data *data = priv;
-
-       if (len < CCMP_TK_LEN)
-               return -1;
-
-       if (!data->key_set)
-               return 0;
-       memcpy(key, data->key, CCMP_TK_LEN);
-
-       if (seq) {
-               seq[0] = data->tx_pn[5];
-               seq[1] = data->tx_pn[4];
-               seq[2] = data->tx_pn[3];
-               seq[3] = data->tx_pn[2];
-               seq[4] = data->tx_pn[1];
-               seq[5] = data->tx_pn[0];
-       }
-
-       return CCMP_TK_LEN;
-}
-
-
-static char *ieee80211_ccmp_print_stats(char *p, void *priv)
-{
-       struct ieee80211_ccmp_data *ccmp = priv;
-       p += sprintf(p,
-                    "key[%d] alg=CCMP key_set=%d tx_pn=%pm rx_pn=%pm format_errors=%d replays=%d decrypt_errors=%d\n",
-                    ccmp->key_idx, ccmp->key_set,
-                    ccmp->tx_pn, ccmp->rx_pn,
-                    ccmp->dot11RSNAStatsCCMPFormatErrors,
-                    ccmp->dot11RSNAStatsCCMPReplays,
-                    ccmp->dot11RSNAStatsCCMPDecryptErrors);
-
-       return p;
-}
-
-void ieee80211_ccmp_null(void)
-{
-       return;
-}
-static struct ieee80211_crypto_ops ieee80211_crypt_ccmp = {
-       .name                   = "CCMP",
-       .init                   = ieee80211_ccmp_init,
-       .deinit                 = ieee80211_ccmp_deinit,
-       .encrypt_mpdu           = ieee80211_ccmp_encrypt,
-       .decrypt_mpdu           = ieee80211_ccmp_decrypt,
-       .encrypt_msdu           = NULL,
-       .decrypt_msdu           = NULL,
-       .set_key                = ieee80211_ccmp_set_key,
-       .get_key                = ieee80211_ccmp_get_key,
-       .print_stats            = ieee80211_ccmp_print_stats,
-       .extra_prefix_len       = CCMP_HDR_LEN,
-       .extra_postfix_len      = CCMP_MIC_LEN,
-       .owner                  = THIS_MODULE,
-};
-
-
-int ieee80211_crypto_ccmp_init(void)
-{
-       return ieee80211_register_crypto_ops(&ieee80211_crypt_ccmp);
-}
-
-
-void ieee80211_crypto_ccmp_exit(void)
-{
-       ieee80211_unregister_crypto_ops(&ieee80211_crypt_ccmp);
-}
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_tkip.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_tkip.c
deleted file mode 100644 (file)
index 6c1acc5..0000000
+++ /dev/null
@@ -1,740 +0,0 @@
-/*
- * Host AP crypt: host-based TKIP encryption implementation for Host AP driver
- *
- * Copyright (c) 2003-2004, Jouni Malinen <jkmaline@cc.hut.fi>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation. See README and COPYING for
- * more details.
- */
-
-#include <linux/module.h>
-#include <linux/slab.h>
-#include <linux/random.h>
-#include <linux/skbuff.h>
-#include <linux/netdevice.h>
-#include <linux/if_ether.h>
-#include <linux/if_arp.h>
-#include <asm/string.h>
-
-#include "ieee80211.h"
-
-#include <linux/crypto.h>
-#include <linux/scatterlist.h>
-#include <linux/crc32.h>
-
-MODULE_AUTHOR("Jouni Malinen");
-MODULE_DESCRIPTION("Host AP crypt: TKIP");
-MODULE_LICENSE("GPL");
-
-
-struct ieee80211_tkip_data {
-#define TKIP_KEY_LEN 32
-       u8 key[TKIP_KEY_LEN];
-       int key_set;
-
-       u32 tx_iv32;
-       u16 tx_iv16;
-       u16 tx_ttak[5];
-       int tx_phase1_done;
-
-       u32 rx_iv32;
-       u16 rx_iv16;
-       u16 rx_ttak[5];
-       int rx_phase1_done;
-       u32 rx_iv32_new;
-       u16 rx_iv16_new;
-
-       u32 dot11RSNAStatsTKIPReplays;
-       u32 dot11RSNAStatsTKIPICVErrors;
-       u32 dot11RSNAStatsTKIPLocalMICFailures;
-
-       int key_idx;
-
-       struct crypto_blkcipher *rx_tfm_arc4;
-       struct crypto_hash *rx_tfm_michael;
-       struct crypto_blkcipher *tx_tfm_arc4;
-       struct crypto_hash *tx_tfm_michael;
-       struct crypto_tfm *tfm_arc4;
-       struct crypto_tfm *tfm_michael;
-
-       /* scratch buffers for virt_to_page() (crypto API) */
-       u8 rx_hdr[16], tx_hdr[16];
-};
-
-static void *ieee80211_tkip_init(int key_idx)
-{
-       struct ieee80211_tkip_data *priv;
-
-       priv = kzalloc(sizeof(*priv), GFP_ATOMIC);
-       if (priv == NULL)
-               goto fail;
-       priv->key_idx = key_idx;
-
-       priv->tx_tfm_arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0,
-                                               CRYPTO_ALG_ASYNC);
-       if (IS_ERR(priv->tx_tfm_arc4)) {
-               printk(KERN_DEBUG "ieee80211_crypt_tkip: could not allocate "
-                      "crypto API arc4\n");
-               priv->tx_tfm_arc4 = NULL;
-               goto fail;
-       }
-
-       priv->tx_tfm_michael = crypto_alloc_hash("michael_mic", 0,
-                                                CRYPTO_ALG_ASYNC);
-       if (IS_ERR(priv->tx_tfm_michael)) {
-               printk(KERN_DEBUG "ieee80211_crypt_tkip: could not allocate "
-                      "crypto API michael_mic\n");
-               priv->tx_tfm_michael = NULL;
-               goto fail;
-       }
-
-       priv->rx_tfm_arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0,
-                                               CRYPTO_ALG_ASYNC);
-       if (IS_ERR(priv->rx_tfm_arc4)) {
-               printk(KERN_DEBUG "ieee80211_crypt_tkip: could not allocate "
-                      "crypto API arc4\n");
-               priv->rx_tfm_arc4 = NULL;
-               goto fail;
-       }
-
-       priv->rx_tfm_michael = crypto_alloc_hash("michael_mic", 0,
-                                                CRYPTO_ALG_ASYNC);
-       if (IS_ERR(priv->rx_tfm_michael)) {
-               printk(KERN_DEBUG "ieee80211_crypt_tkip: could not allocate "
-                      "crypto API michael_mic\n");
-               priv->rx_tfm_michael = NULL;
-               goto fail;
-       }
-
-       return priv;
-
-fail:
-       if (priv) {
-               if (priv->tx_tfm_michael)
-                       crypto_free_hash(priv->tx_tfm_michael);
-               if (priv->tx_tfm_arc4)
-                       crypto_free_blkcipher(priv->tx_tfm_arc4);
-               if (priv->rx_tfm_michael)
-                       crypto_free_hash(priv->rx_tfm_michael);
-               if (priv->rx_tfm_arc4)
-                       crypto_free_blkcipher(priv->rx_tfm_arc4);
-               kfree(priv);
-       }
-
-       return NULL;
-}
-
-
-static void ieee80211_tkip_deinit(void *priv)
-{
-       struct ieee80211_tkip_data *_priv = priv;
-
-       if (_priv) {
-               if (_priv->tx_tfm_michael)
-                       crypto_free_hash(_priv->tx_tfm_michael);
-               if (_priv->tx_tfm_arc4)
-                       crypto_free_blkcipher(_priv->tx_tfm_arc4);
-               if (_priv->rx_tfm_michael)
-                       crypto_free_hash(_priv->rx_tfm_michael);
-               if (_priv->rx_tfm_arc4)
-                       crypto_free_blkcipher(_priv->rx_tfm_arc4);
-       }
-       kfree(priv);
-}
-
-
-static inline u16 RotR1(u16 val)
-{
-       return (val >> 1) | (val << 15);
-}
-
-
-static inline u8 Lo8(u16 val)
-{
-       return val & 0xff;
-}
-
-
-static inline u8 Hi8(u16 val)
-{
-       return val >> 8;
-}
-
-
-static inline u16 Lo16(u32 val)
-{
-       return val & 0xffff;
-}
-
-
-static inline u16 Hi16(u32 val)
-{
-       return val >> 16;
-}
-
-
-static inline u16 Mk16(u8 hi, u8 lo)
-{
-       return lo | (((u16) hi) << 8);
-}
-
-
-static inline u16 Mk16_le(u16 *v)
-{
-       return le16_to_cpu(*v);
-}
-
-
-static const u16 Sbox[256] = {
-       0xC6A5, 0xF884, 0xEE99, 0xF68D, 0xFF0D, 0xD6BD, 0xDEB1, 0x9154,
-       0x6050, 0x0203, 0xCEA9, 0x567D, 0xE719, 0xB562, 0x4DE6, 0xEC9A,
-       0x8F45, 0x1F9D, 0x8940, 0xFA87, 0xEF15, 0xB2EB, 0x8EC9, 0xFB0B,
-       0x41EC, 0xB367, 0x5FFD, 0x45EA, 0x23BF, 0x53F7, 0xE496, 0x9B5B,
-       0x75C2, 0xE11C, 0x3DAE, 0x4C6A, 0x6C5A, 0x7E41, 0xF502, 0x834F,
-       0x685C, 0x51F4, 0xD134, 0xF908, 0xE293, 0xAB73, 0x6253, 0x2A3F,
-       0x080C, 0x9552, 0x4665, 0x9D5E, 0x3028, 0x37A1, 0x0A0F, 0x2FB5,
-       0x0E09, 0x2436, 0x1B9B, 0xDF3D, 0xCD26, 0x4E69, 0x7FCD, 0xEA9F,
-       0x121B, 0x1D9E, 0x5874, 0x342E, 0x362D, 0xDCB2, 0xB4EE, 0x5BFB,
-       0xA4F6, 0x764D, 0xB761, 0x7DCE, 0x527B, 0xDD3E, 0x5E71, 0x1397,
-       0xA6F5, 0xB968, 0x0000, 0xC12C, 0x4060, 0xE31F, 0x79C8, 0xB6ED,
-       0xD4BE, 0x8D46, 0x67D9, 0x724B, 0x94DE, 0x98D4, 0xB0E8, 0x854A,
-       0xBB6B, 0xC52A, 0x4FE5, 0xED16, 0x86C5, 0x9AD7, 0x6655, 0x1194,
-       0x8ACF, 0xE910, 0x0406, 0xFE81, 0xA0F0, 0x7844, 0x25BA, 0x4BE3,
-       0xA2F3, 0x5DFE, 0x80C0, 0x058A, 0x3FAD, 0x21BC, 0x7048, 0xF104,
-       0x63DF, 0x77C1, 0xAF75, 0x4263, 0x2030, 0xE51A, 0xFD0E, 0xBF6D,
-       0x814C, 0x1814, 0x2635, 0xC32F, 0xBEE1, 0x35A2, 0x88CC, 0x2E39,
-       0x9357, 0x55F2, 0xFC82, 0x7A47, 0xC8AC, 0xBAE7, 0x322B, 0xE695,
-       0xC0A0, 0x1998, 0x9ED1, 0xA37F, 0x4466, 0x547E, 0x3BAB, 0x0B83,
-       0x8CCA, 0xC729, 0x6BD3, 0x283C, 0xA779, 0xBCE2, 0x161D, 0xAD76,
-       0xDB3B, 0x6456, 0x744E, 0x141E, 0x92DB, 0x0C0A, 0x486C, 0xB8E4,
-       0x9F5D, 0xBD6E, 0x43EF, 0xC4A6, 0x39A8, 0x31A4, 0xD337, 0xF28B,
-       0xD532, 0x8B43, 0x6E59, 0xDAB7, 0x018C, 0xB164, 0x9CD2, 0x49E0,
-       0xD8B4, 0xACFA, 0xF307, 0xCF25, 0xCAAF, 0xF48E, 0x47E9, 0x1018,
-       0x6FD5, 0xF088, 0x4A6F, 0x5C72, 0x3824, 0x57F1, 0x73C7, 0x9751,
-       0xCB23, 0xA17C, 0xE89C, 0x3E21, 0x96DD, 0x61DC, 0x0D86, 0x0F85,
-       0xE090, 0x7C42, 0x71C4, 0xCCAA, 0x90D8, 0x0605, 0xF701, 0x1C12,
-       0xC2A3, 0x6A5F, 0xAEF9, 0x69D0, 0x1791, 0x9958, 0x3A27, 0x27B9,
-       0xD938, 0xEB13, 0x2BB3, 0x2233, 0xD2BB, 0xA970, 0x0789, 0x33A7,
-       0x2DB6, 0x3C22, 0x1592, 0xC920, 0x8749, 0xAAFF, 0x5078, 0xA57A,
-       0x038F, 0x59F8, 0x0980, 0x1A17, 0x65DA, 0xD731, 0x84C6, 0xD0B8,
-       0x82C3, 0x29B0, 0x5A77, 0x1E11, 0x7BCB, 0xA8FC, 0x6DD6, 0x2C3A,
-};
-
-
-static inline u16 _S_(u16 v)
-{
-       u16 t = Sbox[Hi8(v)];
-       return Sbox[Lo8(v)] ^ ((t << 8) | (t >> 8));
-}
-
-#define PHASE1_LOOP_COUNT 8
-
-static void tkip_mixing_phase1(u16 *TTAK, const u8 *TK, const u8 *TA, u32 IV32)
-{
-       int i, j;
-
-       /* Initialize the 80-bit TTAK from TSC (IV32) and TA[0..5] */
-       TTAK[0] = Lo16(IV32);
-       TTAK[1] = Hi16(IV32);
-       TTAK[2] = Mk16(TA[1], TA[0]);
-       TTAK[3] = Mk16(TA[3], TA[2]);
-       TTAK[4] = Mk16(TA[5], TA[4]);
-
-       for (i = 0; i < PHASE1_LOOP_COUNT; i++) {
-               j = 2 * (i & 1);
-               TTAK[0] += _S_(TTAK[4] ^ Mk16(TK[1 + j], TK[0 + j]));
-               TTAK[1] += _S_(TTAK[0] ^ Mk16(TK[5 + j], TK[4 + j]));
-               TTAK[2] += _S_(TTAK[1] ^ Mk16(TK[9 + j], TK[8 + j]));
-               TTAK[3] += _S_(TTAK[2] ^ Mk16(TK[13 + j], TK[12 + j]));
-               TTAK[4] += _S_(TTAK[3] ^ Mk16(TK[1 + j], TK[0 + j])) + i;
-       }
-}
-
-
-static void tkip_mixing_phase2(u8 *WEPSeed, const u8 *TK, const u16 *TTAK,
-                              u16 IV16)
-{
-       /* Make temporary area overlap WEP seed so that the final copy can be
-        * avoided on little endian hosts. */
-       u16 *PPK = (u16 *) &WEPSeed[4];
-
-       /* Step 1 - make copy of TTAK and bring in TSC */
-       PPK[0] = TTAK[0];
-       PPK[1] = TTAK[1];
-       PPK[2] = TTAK[2];
-       PPK[3] = TTAK[3];
-       PPK[4] = TTAK[4];
-       PPK[5] = TTAK[4] + IV16;
-
-       /* Step 2 - 96-bit bijective mixing using S-box */
-       PPK[0] += _S_(PPK[5] ^ Mk16_le((u16 *) &TK[0]));
-       PPK[1] += _S_(PPK[0] ^ Mk16_le((u16 *) &TK[2]));
-       PPK[2] += _S_(PPK[1] ^ Mk16_le((u16 *) &TK[4]));
-       PPK[3] += _S_(PPK[2] ^ Mk16_le((u16 *) &TK[6]));
-       PPK[4] += _S_(PPK[3] ^ Mk16_le((u16 *) &TK[8]));
-       PPK[5] += _S_(PPK[4] ^ Mk16_le((u16 *) &TK[10]));
-
-       PPK[0] += RotR1(PPK[5] ^ Mk16_le((u16 *) &TK[12]));
-       PPK[1] += RotR1(PPK[0] ^ Mk16_le((u16 *) &TK[14]));
-       PPK[2] += RotR1(PPK[1]);
-       PPK[3] += RotR1(PPK[2]);
-       PPK[4] += RotR1(PPK[3]);
-       PPK[5] += RotR1(PPK[4]);
-
-       /* Step 3 - bring in last of TK bits, assign 24-bit WEP IV value
-        * WEPSeed[0..2] is transmitted as WEP IV */
-       WEPSeed[0] = Hi8(IV16);
-       WEPSeed[1] = (Hi8(IV16) | 0x20) & 0x7F;
-       WEPSeed[2] = Lo8(IV16);
-       WEPSeed[3] = Lo8((PPK[5] ^ Mk16_le((u16 *) &TK[0])) >> 1);
-
-#ifdef __BIG_ENDIAN
-       {
-               int i;
-               for (i = 0; i < 6; i++)
-                       PPK[i] = (PPK[i] << 8) | (PPK[i] >> 8);
-       }
-#endif
-}
-
-static int ieee80211_tkip_encrypt(struct sk_buff *skb, int hdr_len, void *priv)
-{
-       struct ieee80211_tkip_data *tkey = priv;
-       struct blkcipher_desc desc = {.tfm = tkey->tx_tfm_arc4};
-       int len;
-       u8  *pos;
-       struct ieee80211_hdr_4addr *hdr;
-       u8 rc4key[16], *icv;
-       u32 crc;
-       struct scatterlist sg;
-       int ret;
-
-       ret = 0;
-       if (skb_headroom(skb) < 8 || skb_tailroom(skb) < 4 ||
-           skb->len < hdr_len)
-               return -1;
-
-       hdr = (struct ieee80211_hdr_4addr *)skb->data;
-
-       if (!tkey->tx_phase1_done) {
-               tkip_mixing_phase1(tkey->tx_ttak, tkey->key, hdr->addr2,
-                                  tkey->tx_iv32);
-               tkey->tx_phase1_done = 1;
-       }
-       tkip_mixing_phase2(rc4key, tkey->key, tkey->tx_ttak, tkey->tx_iv16);
-
-       len = skb->len - hdr_len;
-       pos = skb_push(skb, 8);
-       memmove(pos, pos + 8, hdr_len);
-       pos += hdr_len;
-
-       *pos++ = rc4key[0];
-       *pos++ = rc4key[1];
-       *pos++ = rc4key[2];
-       *pos++ = (tkey->key_idx << 6) | (1 << 5) /* Ext IV included */;
-       *pos++ = tkey->tx_iv32 & 0xff;
-       *pos++ = (tkey->tx_iv32 >> 8) & 0xff;
-       *pos++ = (tkey->tx_iv32 >> 16) & 0xff;
-       *pos++ = (tkey->tx_iv32 >> 24) & 0xff;
-
-       icv = skb_put(skb, 4);
-       crc = ~crc32_le(~0, pos, len);
-       icv[0] = crc;
-       icv[1] = crc >> 8;
-       icv[2] = crc >> 16;
-       icv[3] = crc >> 24;
-       crypto_blkcipher_setkey(tkey->tx_tfm_arc4, rc4key, 16);
-       sg_init_one(&sg, pos, len + 4);
-       ret = crypto_blkcipher_encrypt(&desc, &sg, &sg, len + 4);
-
-       tkey->tx_iv16++;
-       if (tkey->tx_iv16 == 0) {
-               tkey->tx_phase1_done = 0;
-               tkey->tx_iv32++;
-       }
-          return ret;
-}
-
-static int ieee80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
-{
-       struct ieee80211_tkip_data *tkey = priv;
-       struct blkcipher_desc desc = { .tfm = tkey->rx_tfm_arc4 };
-       u8 keyidx, *pos;
-       u32 iv32;
-       u16 iv16;
-       struct ieee80211_hdr_4addr *hdr;
-       u8 icv[4];
-       u32 crc;
-       struct scatterlist sg;
-       u8 rc4key[16];
-       int plen;
-
-       if (skb->len < hdr_len + 8 + 4)
-               return -1;
-
-       hdr = (struct ieee80211_hdr_4addr *)skb->data;
-       pos = skb->data + hdr_len;
-       keyidx = pos[3];
-       if (!(keyidx & (1 << 5))) {
-               if (net_ratelimit()) {
-                       printk(KERN_DEBUG "TKIP: received packet without ExtIV"
-                              " flag from %pM\n", hdr->addr2);
-               }
-               return -2;
-       }
-       keyidx >>= 6;
-       if (tkey->key_idx != keyidx) {
-               printk(KERN_DEBUG "TKIP: RX tkey->key_idx=%d frame "
-                      "keyidx=%d priv=%p\n", tkey->key_idx, keyidx, priv);
-               return -6;
-       }
-       if (!tkey->key_set) {
-               if (net_ratelimit()) {
-                       printk(KERN_DEBUG "TKIP: received packet from %pM"
-                              " with keyid=%d that does not have a configured"
-                              " key\n", hdr->addr2, keyidx);
-               }
-               return -3;
-       }
-       iv16 = (pos[0] << 8) | pos[2];
-       iv32 = pos[4] | (pos[5] << 8) | (pos[6] << 16) | (pos[7] << 24);
-       pos += 8;
-
-       if (iv32 < tkey->rx_iv32 ||
-           (iv32 == tkey->rx_iv32 && iv16 <= tkey->rx_iv16)) {
-               if (net_ratelimit()) {
-                       printk(KERN_DEBUG "TKIP: replay detected: STA=%pM"
-                              " previous TSC %08x%04x received TSC "
-                              "%08x%04x\n", hdr->addr2,
-                              tkey->rx_iv32, tkey->rx_iv16, iv32, iv16);
-               }
-               tkey->dot11RSNAStatsTKIPReplays++;
-               return -4;
-       }
-
-       if (iv32 != tkey->rx_iv32 || !tkey->rx_phase1_done) {
-               tkip_mixing_phase1(tkey->rx_ttak, tkey->key, hdr->addr2, iv32);
-               tkey->rx_phase1_done = 1;
-       }
-       tkip_mixing_phase2(rc4key, tkey->key, tkey->rx_ttak, iv16);
-
-       plen = skb->len - hdr_len - 12;
-       crypto_blkcipher_setkey(tkey->rx_tfm_arc4, rc4key, 16);
-       sg_init_one(&sg, pos, plen + 4);
-       if (crypto_blkcipher_decrypt(&desc, &sg, &sg, plen + 4)) {
-               if (net_ratelimit()) {
-                       printk(KERN_DEBUG ": TKIP: failed to decrypt "
-                              "received packet from %pM\n",
-                              hdr->addr2);
-               }
-               return -7;
-       }
-
-       crc = ~crc32_le(~0, pos, plen);
-       icv[0] = crc;
-       icv[1] = crc >> 8;
-       icv[2] = crc >> 16;
-       icv[3] = crc >> 24;
-       if (memcmp(icv, pos + plen, 4) != 0) {
-               if (iv32 != tkey->rx_iv32) {
-                       /* Previously cached Phase1 result was already lost, so
-                        * it needs to be recalculated for the next packet. */
-                       tkey->rx_phase1_done = 0;
-               }
-               if (net_ratelimit()) {
-                       printk(KERN_DEBUG "TKIP: ICV error detected: STA="
-                              "%pM\n", hdr->addr2);
-               }
-               tkey->dot11RSNAStatsTKIPICVErrors++;
-               return -5;
-       }
-
-       /* Update real counters only after Michael MIC verification has
-        * completed */
-       tkey->rx_iv32_new = iv32;
-       tkey->rx_iv16_new = iv16;
-
-       /* Remove IV and ICV */
-       memmove(skb->data + 8, skb->data, hdr_len);
-       skb_pull(skb, 8);
-       skb_trim(skb, skb->len - 4);
-
-       return keyidx;
-}
-
-static int michael_mic(struct crypto_hash *tfm_michael, u8 *key, u8 *hdr,
-                       u8 *data, size_t data_len, u8 *mic)
-{
-       struct hash_desc desc;
-       struct scatterlist sg[2];
-
-       if (tfm_michael == NULL) {
-               printk(KERN_WARNING "michael_mic: tfm_michael == NULL\n");
-               return -1;
-       }
-
-       sg_init_table(sg, 2);
-       sg_set_buf(&sg[0], hdr, 16);
-       sg_set_buf(&sg[1], data, data_len);
-
-       if (crypto_hash_setkey(tfm_michael, key, 8))
-               return -1;
-
-       desc.tfm = tfm_michael;
-       desc.flags = 0;
-       return crypto_hash_digest(&desc, sg, data_len + 16, mic);
-}
-
-static void michael_mic_hdr(struct sk_buff *skb, u8 *hdr)
-{
-       struct ieee80211_hdr_4addr *hdr11;
-
-       hdr11 = (struct ieee80211_hdr_4addr *)skb->data;
-       switch (le16_to_cpu(hdr11->frame_ctl) &
-               (IEEE80211_FCTL_FROMDS | IEEE80211_FCTL_TODS)) {
-       case IEEE80211_FCTL_TODS:
-               memcpy(hdr, hdr11->addr3, ETH_ALEN); /* DA */
-               memcpy(hdr + ETH_ALEN, hdr11->addr2, ETH_ALEN); /* SA */
-               break;
-       case IEEE80211_FCTL_FROMDS:
-               memcpy(hdr, hdr11->addr1, ETH_ALEN); /* DA */
-               memcpy(hdr + ETH_ALEN, hdr11->addr3, ETH_ALEN); /* SA */
-               break;
-       case IEEE80211_FCTL_FROMDS | IEEE80211_FCTL_TODS:
-               memcpy(hdr, hdr11->addr3, ETH_ALEN); /* DA */
-               memcpy(hdr + ETH_ALEN, hdr11->addr4, ETH_ALEN); /* SA */
-               break;
-       case 0:
-               memcpy(hdr, hdr11->addr1, ETH_ALEN); /* DA */
-               memcpy(hdr + ETH_ALEN, hdr11->addr2, ETH_ALEN); /* SA */
-               break;
-       }
-
-       hdr[12] = 0; /* priority */
-
-       hdr[13] = hdr[14] = hdr[15] = 0; /* reserved */
-}
-
-
-static int ieee80211_michael_mic_add(struct sk_buff *skb, int hdr_len,
-                                    void *priv)
-{
-       struct ieee80211_tkip_data *tkey = priv;
-       u8 *pos;
-       struct ieee80211_hdr_4addr *hdr;
-
-       hdr = (struct ieee80211_hdr_4addr *)skb->data;
-
-       if (skb_tailroom(skb) < 8 || skb->len < hdr_len) {
-               printk(KERN_DEBUG "Invalid packet for Michael MIC add "
-                      "(tailroom=%d hdr_len=%d skb->len=%d)\n",
-                      skb_tailroom(skb), hdr_len, skb->len);
-               return -1;
-       }
-
-       michael_mic_hdr(skb, tkey->tx_hdr);
-
-       if (IEEE80211_QOS_HAS_SEQ(le16_to_cpu(hdr->frame_ctl)))
-               tkey->tx_hdr[12] = *(skb->data + hdr_len - 2) & 0x07;
-
-       pos = skb_put(skb, 8);
-
-       if (michael_mic(tkey->tx_tfm_michael, &tkey->key[16], tkey->tx_hdr,
-                       skb->data + hdr_len, skb->len - 8 - hdr_len, pos))
-               return -1;
-
-       return 0;
-}
-
-static void ieee80211_michael_mic_failure(struct net_device *dev,
-                                         struct ieee80211_hdr_4addr *hdr,
-                                         int keyidx)
-{
-       union iwreq_data wrqu;
-       struct iw_michaelmicfailure ev;
-
-       /* TODO: needed parameters: count, keyid, key type, TSC */
-       memset(&ev, 0, sizeof(ev));
-       ev.flags = keyidx & IW_MICFAILURE_KEY_ID;
-       if (hdr->addr1[0] & 0x01)
-               ev.flags |= IW_MICFAILURE_GROUP;
-       else
-               ev.flags |= IW_MICFAILURE_PAIRWISE;
-       ev.src_addr.sa_family = ARPHRD_ETHER;
-       memcpy(ev.src_addr.sa_data, hdr->addr2, ETH_ALEN);
-       memset(&wrqu, 0, sizeof(wrqu));
-       wrqu.data.length = sizeof(ev);
-       wireless_send_event(dev, IWEVMICHAELMICFAILURE, &wrqu, (char *) &ev);
-}
-
-static int ieee80211_michael_mic_verify(struct sk_buff *skb, int keyidx,
-                                       int hdr_len, void *priv)
-{
-       struct ieee80211_tkip_data *tkey = priv;
-       u8 mic[8];
-       struct ieee80211_hdr_4addr *hdr;
-
-       hdr = (struct ieee80211_hdr_4addr *)skb->data;
-
-       if (!tkey->key_set)
-               return -1;
-
-       michael_mic_hdr(skb, tkey->rx_hdr);
-       if (IEEE80211_QOS_HAS_SEQ(le16_to_cpu(hdr->frame_ctl)))
-               tkey->rx_hdr[12] = *(skb->data + hdr_len - 2) & 0x07;
-
-       if (michael_mic(tkey->rx_tfm_michael, &tkey->key[24], tkey->rx_hdr,
-                       skb->data + hdr_len, skb->len - 8 - hdr_len, mic))
-               return -1;
-
-       if (memcmp(mic, skb->data + skb->len - 8, 8) != 0) {
-               struct ieee80211_hdr_4addr *hdr;
-               hdr = (struct ieee80211_hdr_4addr *)skb->data;
-               printk(KERN_DEBUG "%s: Michael MIC verification failed for "
-                      "MSDU from %pM keyidx=%d\n",
-                      skb->dev ? skb->dev->name : "N/A", hdr->addr2,
-                      keyidx);
-               if (skb->dev)
-                       ieee80211_michael_mic_failure(skb->dev, hdr, keyidx);
-               tkey->dot11RSNAStatsTKIPLocalMICFailures++;
-               return -1;
-       }
-
-       /* Update TSC counters for RX now that the packet verification has
-        * completed. */
-       tkey->rx_iv32 = tkey->rx_iv32_new;
-       tkey->rx_iv16 = tkey->rx_iv16_new;
-
-       skb_trim(skb, skb->len - 8);
-
-       return 0;
-}
-
-
-static int ieee80211_tkip_set_key(void *key, int len, u8 *seq, void *priv)
-{
-       struct ieee80211_tkip_data *tkey = priv;
-       int keyidx;
-       struct crypto_hash *tfm = tkey->tx_tfm_michael;
-       struct crypto_blkcipher *tfm2 = tkey->tx_tfm_arc4;
-       struct crypto_hash *tfm3 = tkey->rx_tfm_michael;
-       struct crypto_blkcipher *tfm4 = tkey->rx_tfm_arc4;
-
-       keyidx = tkey->key_idx;
-       memset(tkey, 0, sizeof(*tkey));
-       tkey->key_idx = keyidx;
-
-       tkey->tx_tfm_michael = tfm;
-       tkey->tx_tfm_arc4 = tfm2;
-       tkey->rx_tfm_michael = tfm3;
-       tkey->rx_tfm_arc4 = tfm4;
-
-       if (len == TKIP_KEY_LEN) {
-               memcpy(tkey->key, key, TKIP_KEY_LEN);
-               tkey->key_set = 1;
-               tkey->tx_iv16 = 1; /* TSC is initialized to 1 */
-               if (seq) {
-                       tkey->rx_iv32 = (seq[5] << 24) | (seq[4] << 16) |
-                               (seq[3] << 8) | seq[2];
-                       tkey->rx_iv16 = (seq[1] << 8) | seq[0];
-               }
-       } else if (len == 0)
-               tkey->key_set = 0;
-       else
-               return -1;
-
-       return 0;
-}
-
-
-static int ieee80211_tkip_get_key(void *key, int len, u8 *seq, void *priv)
-{
-       struct ieee80211_tkip_data *tkey = priv;
-
-       if (len < TKIP_KEY_LEN)
-               return -1;
-
-       if (!tkey->key_set)
-               return 0;
-       memcpy(key, tkey->key, TKIP_KEY_LEN);
-
-       if (seq) {
-               /* Return the sequence number of the last transmitted frame. */
-               u16 iv16 = tkey->tx_iv16;
-               u32 iv32 = tkey->tx_iv32;
-               if (iv16 == 0)
-                       iv32--;
-               iv16--;
-               seq[0] = tkey->tx_iv16;
-               seq[1] = tkey->tx_iv16 >> 8;
-               seq[2] = tkey->tx_iv32;
-               seq[3] = tkey->tx_iv32 >> 8;
-               seq[4] = tkey->tx_iv32 >> 16;
-               seq[5] = tkey->tx_iv32 >> 24;
-       }
-
-       return TKIP_KEY_LEN;
-}
-
-
-static char *ieee80211_tkip_print_stats(char *p, void *priv)
-{
-       struct ieee80211_tkip_data *tkip = priv;
-       p += sprintf(p, "key[%d] alg=TKIP key_set=%d "
-                    "tx_pn=%02x%02x%02x%02x%02x%02x "
-                    "rx_pn=%02x%02x%02x%02x%02x%02x "
-                    "replays=%d icv_errors=%d local_mic_failures=%d\n",
-                    tkip->key_idx, tkip->key_set,
-                    (tkip->tx_iv32 >> 24) & 0xff,
-                    (tkip->tx_iv32 >> 16) & 0xff,
-                    (tkip->tx_iv32 >> 8) & 0xff,
-                    tkip->tx_iv32 & 0xff,
-                    (tkip->tx_iv16 >> 8) & 0xff,
-                    tkip->tx_iv16 & 0xff,
-                    (tkip->rx_iv32 >> 24) & 0xff,
-                    (tkip->rx_iv32 >> 16) & 0xff,
-                    (tkip->rx_iv32 >> 8) & 0xff,
-                    tkip->rx_iv32 & 0xff,
-                    (tkip->rx_iv16 >> 8) & 0xff,
-                    tkip->rx_iv16 & 0xff,
-                    tkip->dot11RSNAStatsTKIPReplays,
-                    tkip->dot11RSNAStatsTKIPICVErrors,
-                    tkip->dot11RSNAStatsTKIPLocalMICFailures);
-       return p;
-}
-
-
-static struct ieee80211_crypto_ops ieee80211_crypt_tkip = {
-       .name                   = "TKIP",
-       .init                   = ieee80211_tkip_init,
-       .deinit                 = ieee80211_tkip_deinit,
-       .encrypt_mpdu           = ieee80211_tkip_encrypt,
-       .decrypt_mpdu           = ieee80211_tkip_decrypt,
-       .encrypt_msdu           = ieee80211_michael_mic_add,
-       .decrypt_msdu           = ieee80211_michael_mic_verify,
-       .set_key                = ieee80211_tkip_set_key,
-       .get_key                = ieee80211_tkip_get_key,
-       .print_stats            = ieee80211_tkip_print_stats,
-       .extra_prefix_len       = 4 + 4, /* IV + ExtIV */
-       .extra_postfix_len      = 8 + 4, /* MIC + ICV */
-       .owner                  = THIS_MODULE,
-};
-
-
-int ieee80211_crypto_tkip_init(void)
-{
-       return ieee80211_register_crypto_ops(&ieee80211_crypt_tkip);
-}
-
-
-void ieee80211_crypto_tkip_exit(void)
-{
-       ieee80211_unregister_crypto_ops(&ieee80211_crypt_tkip);
-}
-
-
-void ieee80211_tkip_null(void)
-{
-}
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_wep.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_wep.c
deleted file mode 100644 (file)
index f253672..0000000
+++ /dev/null
@@ -1,277 +0,0 @@
-/*
- * Host AP crypt: host-based WEP encryption implementation for Host AP driver
- *
- * Copyright (c) 2002-2004, Jouni Malinen <jkmaline@cc.hut.fi>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation. See README and COPYING for
- * more details.
- */
-
-#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
-
-#include <linux/module.h>
-#include <linux/slab.h>
-#include <linux/random.h>
-#include <linux/skbuff.h>
-#include <linux/string.h>
-
-#include "ieee80211.h"
-
-#include <linux/crypto.h>
-#include <linux/scatterlist.h>
-#include <linux/crc32.h>
-
-MODULE_AUTHOR("Jouni Malinen");
-MODULE_DESCRIPTION("Host AP crypt: WEP");
-MODULE_LICENSE("GPL");
-
-struct prism2_wep_data {
-       u32 iv;
-#define WEP_KEY_LEN 13
-       u8 key[WEP_KEY_LEN + 1];
-       u8 key_len;
-       u8 key_idx;
-       struct crypto_blkcipher *tx_tfm;
-       struct crypto_blkcipher *rx_tfm;
-};
-
-static void *prism2_wep_init(int keyidx)
-{
-       struct prism2_wep_data *priv;
-
-       priv = kzalloc(sizeof(*priv), GFP_ATOMIC);
-       if (priv == NULL)
-               goto fail;
-       priv->key_idx = keyidx;
-       priv->tx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC);
-       if (IS_ERR(priv->tx_tfm)) {
-               pr_debug("could not allocate crypto API arc4\n");
-               priv->tx_tfm = NULL;
-               goto fail;
-       }
-       priv->rx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC);
-       if (IS_ERR(priv->rx_tfm)) {
-               pr_debug("could not allocate crypto API arc4\n");
-               priv->rx_tfm = NULL;
-               goto fail;
-       }
-
-       /* start WEP IV from a random value */
-       get_random_bytes(&priv->iv, 4);
-
-       return priv;
-
-fail:
-       if (priv) {
-               if (priv->tx_tfm)
-                       crypto_free_blkcipher(priv->tx_tfm);
-               if (priv->rx_tfm)
-                       crypto_free_blkcipher(priv->rx_tfm);
-               kfree(priv);
-       }
-
-       return NULL;
-}
-
-static void prism2_wep_deinit(void *priv)
-{
-       struct prism2_wep_data *_priv = priv;
-
-       if (_priv) {
-               if (_priv->tx_tfm)
-                       crypto_free_blkcipher(_priv->tx_tfm);
-               if (_priv->rx_tfm)
-                       crypto_free_blkcipher(_priv->rx_tfm);
-       }
-
-       kfree(priv);
-}
-
-/* Perform WEP encryption on given skb that has at least 4 bytes of headroom
- * for IV and 4 bytes of tailroom for ICV. Both IV and ICV will be transmitted,
- * so the payload length increases with 8 bytes.
- *
- * WEP frame payload: IV + TX key idx, RC4(data), ICV = RC4(CRC32(data))
- */
-static int prism2_wep_encrypt(struct sk_buff *skb, int hdr_len, void *priv)
-{
-       struct prism2_wep_data *wep = priv;
-       struct blkcipher_desc desc = { .tfm = wep->tx_tfm };
-       u32 klen, len;
-       u8 key[WEP_KEY_LEN + 3];
-       u8 *pos;
-       u32 crc;
-       u8 *icv;
-       struct scatterlist sg;
-
-       if (skb_headroom(skb) < 4 || skb_tailroom(skb) < 4 ||
-           skb->len < hdr_len)
-               return -1;
-
-       len = skb->len - hdr_len;
-       pos = skb_push(skb, 4);
-       memmove(pos, pos + 4, hdr_len);
-       pos += hdr_len;
-
-       klen = 3 + wep->key_len;
-
-       wep->iv++;
-
-       /* Fluhrer, Mantin, and Shamir have reported weaknesses in the key
-        * scheduling algorithm of RC4. At least IVs (KeyByte + 3, 0xff, N)
-        * can be used to speedup attacks, so avoid using them. */
-       if ((wep->iv & 0xff00) == 0xff00) {
-               u8 B = (wep->iv >> 16) & 0xff;
-               if (B >= 3 && B < klen)
-                       wep->iv += 0x0100;
-       }
-
-       /* Prepend 24-bit IV to RC4 key and TX frame */
-       *pos++ = key[0] = (wep->iv >> 16) & 0xff;
-       *pos++ = key[1] = (wep->iv >> 8) & 0xff;
-       *pos++ = key[2] = wep->iv & 0xff;
-       *pos++ = wep->key_idx << 6;
-
-       /* Copy rest of the WEP key (the secret part) */
-       memcpy(key + 3, wep->key, wep->key_len);
-
-       /* Append little-endian CRC32 and encrypt it to produce ICV */
-       crc = ~crc32_le(~0, pos, len);
-       icv = skb_put(skb, 4);
-       icv[0] = crc;
-       icv[1] = crc >> 8;
-       icv[2] = crc >> 16;
-       icv[3] = crc >> 24;
-
-       crypto_blkcipher_setkey(wep->tx_tfm, key, klen);
-       sg_init_one(&sg, pos, len + 4);
-
-       return crypto_blkcipher_encrypt(&desc, &sg, &sg, len + 4);
-}
-
-/* Perform WEP decryption on given buffer. Buffer includes whole WEP part of
- * the frame: IV (4 bytes), encrypted payload (including SNAP header),
- * ICV (4 bytes). len includes both IV and ICV.
- *
- * Returns 0 if frame was decrypted successfully and ICV was correct and -1 on
- * failure. If frame is OK, IV and ICV will be removed.
- */
-static int prism2_wep_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
-{
-       struct prism2_wep_data *wep = priv;
-       struct blkcipher_desc desc = { .tfm = wep->rx_tfm };
-       u32 klen, plen;
-       u8 key[WEP_KEY_LEN + 3];
-       u8 keyidx, *pos;
-       u32 crc;
-       u8 icv[4];
-       struct scatterlist sg;
-
-       if (skb->len < hdr_len + 8)
-               return -1;
-
-       pos = skb->data + hdr_len;
-       key[0] = *pos++;
-       key[1] = *pos++;
-       key[2] = *pos++;
-       keyidx = *pos++ >> 6;
-       if (keyidx != wep->key_idx)
-               return -1;
-
-       klen = 3 + wep->key_len;
-
-       /* Copy rest of the WEP key (the secret part) */
-       memcpy(key + 3, wep->key, wep->key_len);
-
-       /* Apply RC4 to data and compute CRC32 over decrypted data */
-       plen = skb->len - hdr_len - 8;
-
-       crypto_blkcipher_setkey(wep->rx_tfm, key, klen);
-       sg_init_one(&sg, pos, plen + 4);
-
-       if (crypto_blkcipher_decrypt(&desc, &sg, &sg, plen + 4))
-               return -7;
-
-       crc = ~crc32_le(~0, pos, plen);
-       icv[0] = crc;
-       icv[1] = crc >> 8;
-       icv[2] = crc >> 16;
-       icv[3] = crc >> 24;
-
-       if (memcmp(icv, pos + plen, 4) != 0) {
-               /* ICV mismatch - drop frame */
-               return -2;
-       }
-
-       /* Remove IV and ICV */
-       memmove(skb->data + 4, skb->data, hdr_len);
-       skb_pull(skb, 4);
-       skb_trim(skb, skb->len - 4);
-       return 0;
-}
-
-static int prism2_wep_set_key(void *key, int len, u8 *seq, void *priv)
-{
-       struct prism2_wep_data *wep = priv;
-
-       if (len < 0 || len > WEP_KEY_LEN)
-               return -1;
-
-       memcpy(wep->key, key, len);
-       wep->key_len = len;
-
-       return 0;
-}
-
-static int prism2_wep_get_key(void *key, int len, u8 *seq, void *priv)
-{
-       struct prism2_wep_data *wep = priv;
-
-       if (len < wep->key_len)
-               return -1;
-
-       memcpy(key, wep->key, wep->key_len);
-
-       return wep->key_len;
-}
-
-static char *prism2_wep_print_stats(char *p, void *priv)
-{
-       struct prism2_wep_data *wep = priv;
-       p += sprintf(p, "key[%d] alg=WEP len=%d\n",
-                    wep->key_idx, wep->key_len);
-       return p;
-}
-
-static struct ieee80211_crypto_ops ieee80211_crypt_wep = {
-       .name                   = "WEP",
-       .init                   = prism2_wep_init,
-       .deinit                 = prism2_wep_deinit,
-       .encrypt_mpdu           = prism2_wep_encrypt,
-       .decrypt_mpdu           = prism2_wep_decrypt,
-       .encrypt_msdu           = NULL,
-       .decrypt_msdu           = NULL,
-       .set_key                = prism2_wep_set_key,
-       .get_key                = prism2_wep_get_key,
-       .print_stats            = prism2_wep_print_stats,
-       .extra_prefix_len       = 4, /* IV */
-       .extra_postfix_len      = 4, /* ICV */
-       .owner                  = THIS_MODULE,
-};
-
-int ieee80211_crypto_wep_init(void)
-{
-       return ieee80211_register_crypto_ops(&ieee80211_crypt_wep);
-}
-
-void ieee80211_crypto_wep_exit(void)
-{
-       ieee80211_unregister_crypto_ops(&ieee80211_crypt_wep);
-}
-
-void ieee80211_wep_null(void)
-{
-       return;
-}
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_module.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_module.c
deleted file mode 100644 (file)
index 07a1fbb..0000000
+++ /dev/null
@@ -1,203 +0,0 @@
-/*******************************************************************************
-
-  Copyright(c) 2004 Intel Corporation. All rights reserved.
-
-  Portions of this file are based on the WEP enablement code provided by the
-  Host AP project hostap-drivers v0.1.3
-  Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
-  <jkmaline@cc.hut.fi>
-  Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
-
-  This program is free software; you can redistribute it and/or modify it
-  under the terms of version 2 of the GNU General Public License as
-  published by the Free Software Foundation.
-
-  This program is distributed in the hope that it will be useful, but WITHOUT
-  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-  more details.
-
-  You should have received a copy of the GNU General Public License along with
-  this program; if not, write to the Free Software Foundation, Inc., 59
-  Temple Place - Suite 330, Boston, MA  02111-1307, USA.
-
-  The full GNU General Public License is included in this distribution in the
-  file called LICENSE.
-
-  Contact Information:
-  James P. Ketrenos <ipw2100-admin@linux.intel.com>
-  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
-
-*******************************************************************************/
-
-#include <linux/compiler.h>
-//#include <linux/config.h>
-#include <linux/errno.h>
-#include <linux/if_arp.h>
-#include <linux/in6.h>
-#include <linux/in.h>
-#include <linux/ip.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/netdevice.h>
-#include <linux/pci.h>
-#include <linux/proc_fs.h>
-#include <linux/skbuff.h>
-#include <linux/slab.h>
-#include <linux/tcp.h>
-#include <linux/types.h>
-#include <linux/wireless.h>
-#include <linux/etherdevice.h>
-#include <linux/uaccess.h>
-#include <net/arp.h>
-#include <net/net_namespace.h>
-
-#include "ieee80211.h"
-
-MODULE_DESCRIPTION("802.11 data/management/control stack");
-MODULE_AUTHOR("Copyright (C) 2004 Intel Corporation <jketreno@linux.intel.com>");
-MODULE_LICENSE("GPL");
-
-#define DRV_NAME "ieee80211"
-
-static inline int ieee80211_networks_allocate(struct ieee80211_device *ieee)
-{
-       if (ieee->networks)
-               return 0;
-
-       ieee->networks = kcalloc(
-               MAX_NETWORK_COUNT, sizeof(struct ieee80211_network),
-               GFP_KERNEL);
-       if (!ieee->networks)
-               return -ENOMEM;
-
-       return 0;
-}
-
-static inline void ieee80211_networks_free(struct ieee80211_device *ieee)
-{
-       if (!ieee->networks)
-               return;
-       kfree(ieee->networks);
-       ieee->networks = NULL;
-}
-
-static inline void ieee80211_networks_initialize(struct ieee80211_device *ieee)
-{
-       int i;
-
-       INIT_LIST_HEAD(&ieee->network_free_list);
-       INIT_LIST_HEAD(&ieee->network_list);
-       for (i = 0; i < MAX_NETWORK_COUNT; i++)
-               list_add_tail(&ieee->networks[i].list, &ieee->network_free_list);
-}
-
-
-struct net_device *alloc_ieee80211(int sizeof_priv)
-{
-       struct ieee80211_device *ieee;
-       struct net_device *dev;
-       int i, err;
-
-       IEEE80211_DEBUG_INFO("Initializing...\n");
-
-       dev = alloc_etherdev(sizeof(struct ieee80211_device) + sizeof_priv);
-       if (!dev) {
-               IEEE80211_ERROR("Unable to network device.\n");
-               goto failed;
-       }
-       ieee = netdev_priv(dev);
-
-       ieee->dev = dev;
-
-       err = ieee80211_networks_allocate(ieee);
-       if (err) {
-               IEEE80211_ERROR("Unable to allocate beacon storage: %d\n",
-                               err);
-               goto failed;
-       }
-       ieee80211_networks_initialize(ieee);
-
-       /* Default fragmentation threshold is maximum payload size */
-       ieee->fts = DEFAULT_FTS;
-       ieee->scan_age = DEFAULT_MAX_SCAN_AGE;
-       ieee->open_wep = 1;
-
-       /* Default to enabling full open WEP with host based encrypt/decrypt */
-       ieee->host_encrypt = 1;
-       ieee->host_decrypt = 1;
-       ieee->ieee802_1x = 1; /* Default to supporting 802.1x */
-
-       INIT_LIST_HEAD(&ieee->crypt_deinit_list);
-       init_timer(&ieee->crypt_deinit_timer);
-       ieee->crypt_deinit_timer.data = (unsigned long)ieee;
-       ieee->crypt_deinit_timer.function = ieee80211_crypt_deinit_handler;
-
-       spin_lock_init(&ieee->lock);
-       spin_lock_init(&ieee->wpax_suitlist_lock);
-
-       ieee->wpax_type_set = 0;
-       ieee->wpa_enabled = 0;
-       ieee->tkip_countermeasures = 0;
-       ieee->drop_unencrypted = 0;
-       ieee->privacy_invoked = 0;
-       ieee->ieee802_1x = 1;
-       ieee->raw_tx = 0;
-
-       ieee80211_softmac_init(ieee);
-
-       for (i = 0; i < IEEE_IBSS_MAC_HASH_SIZE; i++)
-               INIT_LIST_HEAD(&ieee->ibss_mac_hash[i]);
-
-       for (i = 0; i < 17; i++) {
-               ieee->last_rxseq_num[i] = -1;
-               ieee->last_rxfrag_num[i] = -1;
-               ieee->last_packet_time[i] = 0;
-       }
-//These function were added to load crypte module autoly
-       ieee80211_tkip_null();
-       ieee80211_wep_null();
-       ieee80211_ccmp_null();
-       return dev;
-
- failed:
-       if (dev)
-               free_netdev(dev);
-       return NULL;
-}
-
-
-void free_ieee80211(struct net_device *dev)
-{
-       struct ieee80211_device *ieee = netdev_priv(dev);
-
-       int i;
-       struct list_head *p, *q;
-
-
-       ieee80211_softmac_free(ieee);
-       del_timer_sync(&ieee->crypt_deinit_timer);
-       ieee80211_crypt_deinit_entries(ieee, 1);
-
-       for (i = 0; i < WEP_KEYS; i++) {
-               struct ieee80211_crypt_data *crypt = ieee->crypt[i];
-               if (crypt) {
-                       if (crypt->ops)
-                               crypt->ops->deinit(crypt->priv);
-                       kfree(crypt);
-                       ieee->crypt[i] = NULL;
-               }
-       }
-
-       ieee80211_networks_free(ieee);
-
-       for (i = 0; i < IEEE_IBSS_MAC_HASH_SIZE; i++) {
-               list_for_each_safe(p, q, &ieee->ibss_mac_hash[i]) {
-                       kfree(list_entry(p, struct ieee_ibss_seq, list));
-                       list_del(p);
-               }
-       }
-
-
-       free_netdev(dev);
-}
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_rx.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_rx.c
deleted file mode 100644 (file)
index b522b57..0000000
+++ /dev/null
@@ -1,1486 +0,0 @@
-/*
- * Original code based Host AP (software wireless LAN access point) driver
- * for Intersil Prism2/2.5/3 - hostap.o module, common routines
- *
- * Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
- * <jkmaline@cc.hut.fi>
- * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
- * Copyright (c) 2004, Intel Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation. See README and COPYING for
- * more details.
- ******************************************************************************
-
-  Few modifications for Realtek's Wi-Fi drivers by
-  Andrea Merello <andrea.merello@gmail.com>
-
-  A special thanks goes to Realtek for their support !
-
-******************************************************************************/
-
-
-#include <linux/compiler.h>
-//#include <linux/config.h>
-#include <linux/errno.h>
-#include <linux/if_arp.h>
-#include <linux/in6.h>
-#include <linux/in.h>
-#include <linux/ip.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/netdevice.h>
-#include <linux/pci.h>
-#include <linux/proc_fs.h>
-#include <linux/skbuff.h>
-#include <linux/slab.h>
-#include <linux/tcp.h>
-#include <linux/types.h>
-#include <linux/wireless.h>
-#include <linux/etherdevice.h>
-#include <linux/uaccess.h>
-#include <linux/ctype.h>
-
-#include "ieee80211.h"
-#include "dot11d.h"
-static inline void ieee80211_monitor_rx(struct ieee80211_device *ieee,
-                                       struct sk_buff *skb,
-                                       struct ieee80211_rx_stats *rx_stats)
-{
-       struct ieee80211_hdr_4addr *hdr =
-               (struct ieee80211_hdr_4addr *)skb->data;
-       u16 fc = le16_to_cpu(hdr->frame_ctl);
-
-       skb->dev = ieee->dev;
-       skb_reset_mac_header(skb);
-       skb_pull(skb, ieee80211_get_hdrlen(fc));
-       skb->pkt_type = PACKET_OTHERHOST;
-       skb->protocol = __constant_htons(ETH_P_80211_RAW);
-       memset(skb->cb, 0, sizeof(skb->cb));
-       netif_rx(skb);
-}
-
-
-/* Called only as a tasklet (software IRQ) */
-static struct ieee80211_frag_entry *
-ieee80211_frag_cache_find(struct ieee80211_device *ieee, unsigned int seq,
-                         unsigned int frag, u8 tid, u8 *src, u8 *dst)
-{
-       struct ieee80211_frag_entry *entry;
-       int i;
-
-       for (i = 0; i < IEEE80211_FRAG_CACHE_LEN; i++) {
-               entry = &ieee->frag_cache[tid][i];
-               if (entry->skb != NULL &&
-                   time_after(jiffies, entry->first_frag_time + 2 * HZ)) {
-                       IEEE80211_DEBUG_FRAG(
-                               "expiring fragment cache entry "
-                               "seq=%u last_frag=%u\n",
-                               entry->seq, entry->last_frag);
-                       dev_kfree_skb_any(entry->skb);
-                       entry->skb = NULL;
-               }
-
-               if (entry->skb != NULL && entry->seq == seq &&
-                   (entry->last_frag + 1 == frag || frag == -1) &&
-                   memcmp(entry->src_addr, src, ETH_ALEN) == 0 &&
-                   memcmp(entry->dst_addr, dst, ETH_ALEN) == 0)
-                       return entry;
-       }
-
-       return NULL;
-}
-
-/* Called only as a tasklet (software IRQ) */
-static struct sk_buff *
-ieee80211_frag_cache_get(struct ieee80211_device *ieee,
-                        struct ieee80211_hdr_4addr *hdr)
-{
-       struct sk_buff *skb = NULL;
-       u16 fc = le16_to_cpu(hdr->frame_ctl);
-       u16 sc = le16_to_cpu(hdr->seq_ctl);
-       unsigned int frag = WLAN_GET_SEQ_FRAG(sc);
-       unsigned int seq = WLAN_GET_SEQ_SEQ(sc);
-       struct ieee80211_frag_entry *entry;
-       struct ieee80211_hdr_3addrqos *hdr_3addrqos;
-       struct ieee80211_hdr_4addrqos *hdr_4addrqos;
-       u8 tid;
-
-       if (((fc & IEEE80211_FCTL_DSTODS) == IEEE80211_FCTL_DSTODS) && IEEE80211_QOS_HAS_SEQ(fc)) {
-               hdr_4addrqos = (struct ieee80211_hdr_4addrqos *)hdr;
-               tid = le16_to_cpu(hdr_4addrqos->qos_ctl) & IEEE80211_QOS_TID;
-               tid = UP2AC(tid);
-               tid++;
-       } else if (IEEE80211_QOS_HAS_SEQ(fc)) {
-               hdr_3addrqos = (struct ieee80211_hdr_3addrqos *)hdr;
-               tid = le16_to_cpu(hdr_3addrqos->qos_ctl) & IEEE80211_QOS_TID;
-               tid = UP2AC(tid);
-               tid++;
-       } else {
-               tid = 0;
-       }
-
-       if (frag == 0) {
-               /* Reserve enough space to fit maximum frame length */
-               skb = dev_alloc_skb(ieee->dev->mtu +
-                                   sizeof(struct ieee80211_hdr_4addr) +
-                                   8 /* LLC */ +
-                                   2 /* alignment */ +
-                                   8 /* WEP */ +
-                                   ETH_ALEN /* WDS */ +
-                                   (IEEE80211_QOS_HAS_SEQ(fc) ? 2 : 0) /* QOS Control */);
-               if (skb == NULL)
-                       return NULL;
-
-               entry = &ieee->frag_cache[tid][ieee->frag_next_idx[tid]];
-               ieee->frag_next_idx[tid]++;
-               if (ieee->frag_next_idx[tid] >= IEEE80211_FRAG_CACHE_LEN)
-                       ieee->frag_next_idx[tid] = 0;
-
-               if (entry->skb != NULL)
-                       dev_kfree_skb_any(entry->skb);
-
-               entry->first_frag_time = jiffies;
-               entry->seq = seq;
-               entry->last_frag = frag;
-               entry->skb = skb;
-               memcpy(entry->src_addr, hdr->addr2, ETH_ALEN);
-               memcpy(entry->dst_addr, hdr->addr1, ETH_ALEN);
-       } else {
-               /* received a fragment of a frame for which the head fragment
-                * should have already been received */
-               entry = ieee80211_frag_cache_find(ieee, seq, frag, tid, hdr->addr2,
-                                                 hdr->addr1);
-               if (entry != NULL) {
-                       entry->last_frag = frag;
-                       skb = entry->skb;
-               }
-       }
-
-       return skb;
-}
-
-
-/* Called only as a tasklet (software IRQ) */
-static int ieee80211_frag_cache_invalidate(struct ieee80211_device *ieee,
-                                          struct ieee80211_hdr_4addr *hdr)
-{
-       u16 fc = le16_to_cpu(hdr->frame_ctl);
-       u16 sc = le16_to_cpu(hdr->seq_ctl);
-       unsigned int seq = WLAN_GET_SEQ_SEQ(sc);
-       struct ieee80211_frag_entry *entry;
-       struct ieee80211_hdr_3addrqos *hdr_3addrqos;
-       struct ieee80211_hdr_4addrqos *hdr_4addrqos;
-       u8 tid;
-
-       if (((fc & IEEE80211_FCTL_DSTODS) == IEEE80211_FCTL_DSTODS) && IEEE80211_QOS_HAS_SEQ(fc)) {
-               hdr_4addrqos = (struct ieee80211_hdr_4addrqos *)hdr;
-               tid = le16_to_cpu(hdr_4addrqos->qos_ctl) & IEEE80211_QOS_TID;
-               tid = UP2AC(tid);
-               tid++;
-       } else if (IEEE80211_QOS_HAS_SEQ(fc)) {
-               hdr_3addrqos = (struct ieee80211_hdr_3addrqos *)hdr;
-               tid = le16_to_cpu(hdr_3addrqos->qos_ctl) & IEEE80211_QOS_TID;
-               tid = UP2AC(tid);
-               tid++;
-       } else {
-               tid = 0;
-       }
-
-       entry = ieee80211_frag_cache_find(ieee, seq, -1, tid, hdr->addr2,
-                                         hdr->addr1);
-
-       if (entry == NULL) {
-               IEEE80211_DEBUG_FRAG(
-                       "could not invalidate fragment cache "
-                       "entry (seq=%u)\n", seq);
-               return -1;
-       }
-
-       entry->skb = NULL;
-       return 0;
-}
-
-
-
-/* ieee80211_rx_frame_mgtmt
- *
- * Responsible for handling management control frames
- *
- * Called by ieee80211_rx */
-static inline int
-ieee80211_rx_frame_mgmt(struct ieee80211_device *ieee, struct sk_buff *skb,
-                       struct ieee80211_rx_stats *rx_stats, u16 type,
-                       u16 stype)
-{
-       struct ieee80211_hdr_4addr *hdr;
-
-       // cheat the the hdr type
-       hdr = (struct ieee80211_hdr_4addr *)skb->data;
-
-       /* On the struct stats definition there is written that
-        * this is not mandatory.... but seems that the probe
-        * response parser uses it
-        */
-       rx_stats->len = skb->len;
-       ieee80211_rx_mgt(ieee, (struct ieee80211_hdr_4addr *)skb->data,
-                        rx_stats);
-
-       if ((ieee->state == IEEE80211_LINKED) && (memcmp(hdr->addr3, ieee->current_network.bssid, ETH_ALEN))) {
-               dev_kfree_skb_any(skb);
-               return 0;
-       }
-
-       ieee80211_rx_frame_softmac(ieee, skb, rx_stats, type, stype);
-
-       dev_kfree_skb_any(skb);
-
-       return 0;
-
-}
-
-
-
-/* See IEEE 802.1H for LLC/SNAP encapsulation/decapsulation */
-/* Ethernet-II snap header (RFC1042 for most EtherTypes) */
-static unsigned char rfc1042_header[] = { 0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00 };
-/* Bridge-Tunnel header (for EtherTypes ETH_P_AARP and ETH_P_IPX) */
-static unsigned char bridge_tunnel_header[] = { 0xaa, 0xaa, 0x03, 0x00, 0x00, 0xf8 };
-/* No encapsulation header if EtherType < 0x600 (=length) */
-
-/* Called by ieee80211_rx_frame_decrypt */
-static int ieee80211_is_eapol_frame(struct ieee80211_device *ieee,
-                                   struct sk_buff *skb, size_t hdrlen)
-{
-       struct net_device *dev = ieee->dev;
-       u16 fc, ethertype;
-       struct ieee80211_hdr_4addr *hdr;
-       u8 *pos;
-
-       if (skb->len < 24)
-               return 0;
-
-       hdr = (struct ieee80211_hdr_4addr *)skb->data;
-       fc = le16_to_cpu(hdr->frame_ctl);
-
-       /* check that the frame is unicast frame to us */
-       if ((fc & (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) ==
-           IEEE80211_FCTL_TODS &&
-           memcmp(hdr->addr1, dev->dev_addr, ETH_ALEN) == 0 &&
-           memcmp(hdr->addr3, dev->dev_addr, ETH_ALEN) == 0) {
-               /* ToDS frame with own addr BSSID and DA */
-       } else if ((fc & (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) ==
-                  IEEE80211_FCTL_FROMDS &&
-                  memcmp(hdr->addr1, dev->dev_addr, ETH_ALEN) == 0) {
-               /* FromDS frame with own addr as DA */
-       } else
-               return 0;
-
-       if (skb->len < 24 + 8)
-               return 0;
-
-       /* check for port access entity Ethernet type */
-//     pos = skb->data + 24;
-       pos = skb->data + hdrlen;
-       ethertype = (pos[6] << 8) | pos[7];
-       if (ethertype == ETH_P_PAE)
-               return 1;
-
-       return 0;
-}
-
-/* Called only as a tasklet (software IRQ), by ieee80211_rx */
-static inline int
-ieee80211_rx_frame_decrypt(struct ieee80211_device *ieee, struct sk_buff *skb,
-                          struct ieee80211_crypt_data *crypt)
-{
-       struct ieee80211_hdr_4addr *hdr;
-       int res, hdrlen;
-
-       if (crypt == NULL || crypt->ops->decrypt_mpdu == NULL)
-               return 0;
-
-       hdr = (struct ieee80211_hdr_4addr *)skb->data;
-       hdrlen = ieee80211_get_hdrlen(le16_to_cpu(hdr->frame_ctl));
-
-#ifdef CONFIG_IEEE80211_CRYPT_TKIP
-       if (ieee->tkip_countermeasures &&
-           strcmp(crypt->ops->name, "TKIP") == 0) {
-               if (net_ratelimit()) {
-                       netdev_dbg(ieee->dev,
-                                  "TKIP countermeasures: dropped received packet from %pM\n",
-                                  ieee->dev->name, hdr->addr2);
-               }
-               return -1;
-       }
-#endif
-
-       atomic_inc(&crypt->refcnt);
-       res = crypt->ops->decrypt_mpdu(skb, hdrlen, crypt->priv);
-       atomic_dec(&crypt->refcnt);
-       if (res < 0) {
-               IEEE80211_DEBUG_DROP(
-                       "decryption failed (SA=%pM"
-                       ") res=%d\n", hdr->addr2, res);
-               if (res == -2)
-                       IEEE80211_DEBUG_DROP("Decryption failed ICV "
-                                            "mismatch (key %d)\n",
-                                            skb->data[hdrlen + 3] >> 6);
-               ieee->ieee_stats.rx_discards_undecryptable++;
-               return -1;
-       }
-
-       return res;
-}
-
-
-/* Called only as a tasklet (software IRQ), by ieee80211_rx */
-static inline int
-ieee80211_rx_frame_decrypt_msdu(struct ieee80211_device *ieee,
-                               struct sk_buff *skb, int keyidx,
-                               struct ieee80211_crypt_data *crypt)
-{
-       struct ieee80211_hdr_4addr *hdr;
-       int res, hdrlen;
-
-       if (crypt == NULL || crypt->ops->decrypt_msdu == NULL)
-               return 0;
-
-       hdr = (struct ieee80211_hdr_4addr *)skb->data;
-       hdrlen = ieee80211_get_hdrlen(le16_to_cpu(hdr->frame_ctl));
-
-       atomic_inc(&crypt->refcnt);
-       res = crypt->ops->decrypt_msdu(skb, keyidx, hdrlen, crypt->priv);
-       atomic_dec(&crypt->refcnt);
-       if (res < 0) {
-               netdev_dbg(ieee->dev,
-                          "MSDU decryption/MIC verification failed (SA=%pM keyidx=%d)\n",
-                          hdr->addr2, keyidx);
-               return -1;
-       }
-
-       return 0;
-}
-
-
-/* this function is stolen from ipw2200 driver*/
-#define IEEE_PACKET_RETRY_TIME (5*HZ)
-static int is_duplicate_packet(struct ieee80211_device *ieee,
-                              struct ieee80211_hdr_4addr *header)
-{
-       u16 fc = le16_to_cpu(header->frame_ctl);
-       u16 sc = le16_to_cpu(header->seq_ctl);
-       u16 seq = WLAN_GET_SEQ_SEQ(sc);
-       u16 frag = WLAN_GET_SEQ_FRAG(sc);
-       u16 *last_seq, *last_frag;
-       unsigned long *last_time;
-       struct ieee80211_hdr_3addrqos *hdr_3addrqos;
-       struct ieee80211_hdr_4addrqos *hdr_4addrqos;
-       u8 tid;
-
-       //TO2DS and QoS
-       if (((fc & IEEE80211_FCTL_DSTODS) == IEEE80211_FCTL_DSTODS) && IEEE80211_QOS_HAS_SEQ(fc)) {
-               hdr_4addrqos = (struct ieee80211_hdr_4addrqos *)header;
-               tid = le16_to_cpu(hdr_4addrqos->qos_ctl) & IEEE80211_QOS_TID;
-               tid = UP2AC(tid);
-               tid++;
-       } else if (IEEE80211_QOS_HAS_SEQ(fc)) { //QoS
-               hdr_3addrqos = (struct ieee80211_hdr_3addrqos *)header;
-               tid = le16_to_cpu(hdr_3addrqos->qos_ctl) & IEEE80211_QOS_TID;
-               tid = UP2AC(tid);
-               tid++;
-       } else { // no QoS
-               tid = 0;
-       }
-       switch (ieee->iw_mode) {
-       case IW_MODE_ADHOC:
-       {
-               struct list_head *p;
-               struct ieee_ibss_seq *entry = NULL;
-               u8 *mac = header->addr2;
-               int index = mac[5] % IEEE_IBSS_MAC_HASH_SIZE;
-
-               list_for_each(p, &ieee->ibss_mac_hash[index]) {
-                       entry = list_entry(p, struct ieee_ibss_seq, list);
-                       if (!memcmp(entry->mac, mac, ETH_ALEN))
-                               break;
-               }
-       //      if (memcmp(entry->mac, mac, ETH_ALEN)){
-               if (p == &ieee->ibss_mac_hash[index]) {
-                       entry = kmalloc(sizeof(struct ieee_ibss_seq), GFP_ATOMIC);
-                       if (!entry)
-                               return 0;
-
-                       memcpy(entry->mac, mac, ETH_ALEN);
-                       entry->seq_num[tid] = seq;
-                       entry->frag_num[tid] = frag;
-                       entry->packet_time[tid] = jiffies;
-                       list_add(&entry->list, &ieee->ibss_mac_hash[index]);
-                       return 0;
-               }
-               last_seq = &entry->seq_num[tid];
-               last_frag = &entry->frag_num[tid];
-               last_time = &entry->packet_time[tid];
-               break;
-       }
-
-       case IW_MODE_INFRA:
-               last_seq = &ieee->last_rxseq_num[tid];
-               last_frag = &ieee->last_rxfrag_num[tid];
-               last_time = &ieee->last_packet_time[tid];
-
-               break;
-       default:
-               return 0;
-       }
-
-//     if(tid != 0) {
-//             printk(KERN_WARNING ":)))))))))))%x %x %x, fc(%x)\n", tid, *last_seq, seq, header->frame_ctl);
-//     }
-       if ((*last_seq == seq) &&
-           time_after(*last_time + IEEE_PACKET_RETRY_TIME, jiffies)) {
-               if (*last_frag == frag) {
-                       //printk(KERN_WARNING "[1] go drop!\n");
-                       goto drop;
-
-               }
-               if (*last_frag + 1 != frag)
-                       /* out-of-order fragment */
-                       //printk(KERN_WARNING "[2] go drop!\n");
-                       goto drop;
-       } else
-               *last_seq = seq;
-
-       *last_frag = frag;
-       *last_time = jiffies;
-       return 0;
-
-drop:
-//     BUG_ON(!(fc & IEEE80211_FCTL_RETRY));
-//     printk("DUP\n");
-
-       return 1;
-}
-
-
-/* All received frames are sent to this function. @skb contains the frame in
- * IEEE 802.11 format, i.e., in the format it was sent over air.
- * This function is called only as a tasklet (software IRQ). */
-int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
-                    struct ieee80211_rx_stats *rx_stats)
-{
-       struct net_device *dev = ieee->dev;
-       //struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-       struct ieee80211_hdr_4addr *hdr;
-
-       size_t hdrlen;
-       u16 fc, type, stype, sc;
-       struct net_device_stats *stats;
-       unsigned int frag;
-       u8 *payload;
-       u16 ethertype;
-       u8 dst[ETH_ALEN];
-       u8 src[ETH_ALEN];
-       u8 bssid[ETH_ALEN];
-       struct ieee80211_crypt_data *crypt = NULL;
-       int keyidx = 0;
-
-       // cheat the the hdr type
-       hdr = (struct ieee80211_hdr_4addr *)skb->data;
-       stats = &ieee->stats;
-
-       if (skb->len < 10) {
-               netdev_info(ieee->dev, "SKB length < 10\n");
-               goto rx_dropped;
-       }
-
-       fc = le16_to_cpu(hdr->frame_ctl);
-       type = WLAN_FC_GET_TYPE(fc);
-       stype = WLAN_FC_GET_STYPE(fc);
-       sc = le16_to_cpu(hdr->seq_ctl);
-
-       frag = WLAN_GET_SEQ_FRAG(sc);
-
-//YJ,add,080828,for keep alive
-       if ((fc & IEEE80211_FCTL_TODS) != IEEE80211_FCTL_TODS) {
-               if (!memcmp(hdr->addr1, dev->dev_addr, ETH_ALEN))
-                       ieee->NumRxUnicast++;
-       } else {
-               if (!memcmp(hdr->addr3, dev->dev_addr, ETH_ALEN))
-                       ieee->NumRxUnicast++;
-       }
-//YJ,add,080828,for keep alive,end
-
-       hdrlen = ieee80211_get_hdrlen(fc);
-
-
-       if (ieee->iw_mode == IW_MODE_MONITOR) {
-               ieee80211_monitor_rx(ieee, skb, rx_stats);
-               stats->rx_packets++;
-               stats->rx_bytes += skb->len;
-               return 1;
-       }
-
-       if (ieee->host_decrypt) {
-               int idx = 0;
-               if (skb->len >= hdrlen + 3)
-                       idx = skb->data[hdrlen + 3] >> 6;
-               crypt = ieee->crypt[idx];
-
-               /* allow NULL decrypt to indicate an station specific override
-                * for default encryption */
-               if (crypt && (crypt->ops == NULL ||
-                             crypt->ops->decrypt_mpdu == NULL))
-                       crypt = NULL;
-
-               if (!crypt && (fc & IEEE80211_FCTL_WEP)) {
-                       /* This seems to be triggered by some (multicast?)
-                        * frames from other than current BSS, so just drop the
-                        * frames silently instead of filling system log with
-                        * these reports. */
-                       IEEE80211_DEBUG_DROP("Decryption failed (not set)"
-                                            " (SA=%pM)\n",
-                                            hdr->addr2);
-                       ieee->ieee_stats.rx_discards_undecryptable++;
-                       goto rx_dropped;
-               }
-       }
-
-       if (skb->len < IEEE80211_DATA_HDR3_LEN)
-               goto rx_dropped;
-
-       // if QoS enabled, should check the sequence for each of the AC
-       if (is_duplicate_packet(ieee, hdr))
-               goto rx_dropped;
-
-
-       if (type == IEEE80211_FTYPE_MGMT) {
-               if (ieee80211_rx_frame_mgmt(ieee, skb, rx_stats, type, stype))
-                       goto rx_dropped;
-               else
-                       goto rx_exit;
-       }
-
-       /* Data frame - extract src/dst addresses */
-       switch (fc & (IEEE80211_FCTL_FROMDS | IEEE80211_FCTL_TODS)) {
-       case IEEE80211_FCTL_FROMDS:
-               memcpy(dst, hdr->addr1, ETH_ALEN);
-               memcpy(src, hdr->addr3, ETH_ALEN);
-               memcpy(bssid, hdr->addr2, ETH_ALEN);
-               break;
-       case IEEE80211_FCTL_TODS:
-               memcpy(dst, hdr->addr3, ETH_ALEN);
-               memcpy(src, hdr->addr2, ETH_ALEN);
-               memcpy(bssid, hdr->addr1, ETH_ALEN);
-               break;
-       case IEEE80211_FCTL_FROMDS | IEEE80211_FCTL_TODS:
-               if (skb->len < IEEE80211_DATA_HDR4_LEN)
-                       goto rx_dropped;
-               memcpy(dst, hdr->addr3, ETH_ALEN);
-               memcpy(src, hdr->addr4, ETH_ALEN);
-               memcpy(bssid, ieee->current_network.bssid, ETH_ALEN);
-               break;
-       case 0:
-               memcpy(dst, hdr->addr1, ETH_ALEN);
-               memcpy(src, hdr->addr2, ETH_ALEN);
-               memcpy(bssid, hdr->addr3, ETH_ALEN);
-               break;
-       }
-
-
-       dev->last_rx = jiffies;
-
-
-       /* Nullfunc frames may have PS-bit set, so they must be passed to
-        * hostap_handle_sta_rx() before being dropped here. */
-       if (stype != IEEE80211_STYPE_DATA &&
-           stype != IEEE80211_STYPE_DATA_CFACK &&
-           stype != IEEE80211_STYPE_DATA_CFPOLL &&
-           stype != IEEE80211_STYPE_DATA_CFACKPOLL &&
-           stype != IEEE80211_STYPE_QOS_DATA//add by David,2006.8.4
-           ) {
-               if (stype != IEEE80211_STYPE_NULLFUNC)
-                       IEEE80211_DEBUG_DROP(
-                               "RX: dropped data frame "
-                               "with no data (type=0x%02x, "
-                               "subtype=0x%02x, len=%d)\n",
-                               type, stype, skb->len);
-               goto rx_dropped;
-       }
-       if (memcmp(bssid, ieee->current_network.bssid, ETH_ALEN))
-               goto rx_dropped;
-
-       ieee->NumRxDataInPeriod++;
-       ieee->NumRxOkTotal++;
-       /* skb: hdr + (possibly fragmented, possibly encrypted) payload */
-
-       if (ieee->host_decrypt && (fc & IEEE80211_FCTL_WEP) &&
-           (keyidx = ieee80211_rx_frame_decrypt(ieee, skb, crypt)) < 0)
-               goto rx_dropped;
-
-       hdr = (struct ieee80211_hdr_4addr *)skb->data;
-
-       /* skb: hdr + (possibly fragmented) plaintext payload */
-       // PR: FIXME: hostap has additional conditions in the "if" below:
-       // ieee->host_decrypt && (fc & IEEE80211_FCTL_WEP) &&
-       if ((frag != 0 || (fc & IEEE80211_FCTL_MOREFRAGS))) {
-               int flen;
-               struct sk_buff *frag_skb = ieee80211_frag_cache_get(ieee, hdr);
-               IEEE80211_DEBUG_FRAG("Rx Fragment received (%u)\n", frag);
-
-               if (!frag_skb) {
-                       IEEE80211_DEBUG(IEEE80211_DL_RX | IEEE80211_DL_FRAG,
-                                       "Rx cannot get skb from fragment "
-                                       "cache (morefrag=%d seq=%u frag=%u)\n",
-                                       (fc & IEEE80211_FCTL_MOREFRAGS) != 0,
-                                       WLAN_GET_SEQ_SEQ(sc), frag);
-                       goto rx_dropped;
-               }
-               flen = skb->len;
-               if (frag != 0)
-                       flen -= hdrlen;
-
-               if (frag_skb->tail + flen > frag_skb->end) {
-                       netdev_warn(ieee->dev,
-                                   "host decrypted and reassembled frame did not fit skb\n");
-                       ieee80211_frag_cache_invalidate(ieee, hdr);
-                       goto rx_dropped;
-               }
-
-               if (frag == 0) {
-                       /* copy first fragment (including full headers) into
-                        * beginning of the fragment cache skb */
-                       memcpy(skb_put(frag_skb, flen), skb->data, flen);
-               } else {
-                       /* append frame payload to the end of the fragment
-                        * cache skb */
-                       memcpy(skb_put(frag_skb, flen), skb->data + hdrlen,
-                              flen);
-               }
-               dev_kfree_skb_any(skb);
-               skb = NULL;
-
-               if (fc & IEEE80211_FCTL_MOREFRAGS) {
-                       /* more fragments expected - leave the skb in fragment
-                        * cache for now; it will be delivered to upper layers
-                        * after all fragments have been received */
-                       goto rx_exit;
-               }
-
-               /* this was the last fragment and the frame will be
-                * delivered, so remove skb from fragment cache */
-               skb = frag_skb;
-               hdr = (struct ieee80211_hdr_4addr *)skb->data;
-               ieee80211_frag_cache_invalidate(ieee, hdr);
-       }
-
-       /* skb: hdr + (possible reassembled) full MSDU payload; possibly still
-        * encrypted/authenticated */
-       if (ieee->host_decrypt && (fc & IEEE80211_FCTL_WEP) &&
-           ieee80211_rx_frame_decrypt_msdu(ieee, skb, keyidx, crypt))
-               goto rx_dropped;
-
-       hdr = (struct ieee80211_hdr_4addr *)skb->data;
-       if (crypt && !(fc & IEEE80211_FCTL_WEP) && !ieee->open_wep) {
-               if (/*ieee->ieee802_1x &&*/
-                   ieee80211_is_eapol_frame(ieee, skb, hdrlen)) {
-
-#ifdef CONFIG_IEEE80211_DEBUG
-                       /* pass unencrypted EAPOL frames even if encryption is
-                        * configured */
-                       struct eapol *eap = (struct eapol *)(skb->data +
-                               24);
-                       IEEE80211_DEBUG_EAP("RX: IEEE 802.1X EAPOL frame: %s\n",
-                                               eap_get_type(eap->type));
-#endif
-               } else {
-                       IEEE80211_DEBUG_DROP(
-                               "encryption configured, but RX "
-                               "frame not encrypted (SA=%pM)\n",
-                               hdr->addr2);
-                       goto rx_dropped;
-               }
-       }
-
-#ifdef CONFIG_IEEE80211_DEBUG
-       if (crypt && !(fc & IEEE80211_FCTL_WEP) &&
-           ieee80211_is_eapol_frame(ieee, skb, hdrlen)) {
-                       struct eapol *eap = (struct eapol *)(skb->data +
-                               24);
-                       IEEE80211_DEBUG_EAP("RX: IEEE 802.1X EAPOL frame: %s\n",
-                                               eap_get_type(eap->type));
-       }
-#endif
-
-       if (crypt && !(fc & IEEE80211_FCTL_WEP) && !ieee->open_wep &&
-           !ieee80211_is_eapol_frame(ieee, skb, hdrlen)) {
-               IEEE80211_DEBUG_DROP(
-                       "dropped unencrypted RX data "
-                       "frame from %pM"
-                       " (drop_unencrypted=1)\n",
-                       hdr->addr2);
-               goto rx_dropped;
-       }
-/*
-       if(ieee80211_is_eapol_frame(ieee, skb, hdrlen)) {
-               printk(KERN_WARNING "RX: IEEE802.1X EPAOL frame!\n");
-       }
-*/
-       /* skb: hdr + (possible reassembled) full plaintext payload */
-       payload = skb->data + hdrlen;
-       ethertype = (payload[6] << 8) | payload[7];
-
-
-       /* convert hdr + possible LLC headers into Ethernet header */
-       if (skb->len - hdrlen >= 8 &&
-           ((memcmp(payload, rfc1042_header, SNAP_SIZE) == 0 &&
-             ethertype != ETH_P_AARP && ethertype != ETH_P_IPX) ||
-            memcmp(payload, bridge_tunnel_header, SNAP_SIZE) == 0)) {
-               /* remove RFC1042 or Bridge-Tunnel encapsulation and
-                * replace EtherType */
-               skb_pull(skb, hdrlen + SNAP_SIZE);
-               memcpy(skb_push(skb, ETH_ALEN), src, ETH_ALEN);
-               memcpy(skb_push(skb, ETH_ALEN), dst, ETH_ALEN);
-       } else {
-               u16 len;
-               /* Leave Ethernet header part of hdr and full payload */
-               skb_pull(skb, hdrlen);
-               len = htons(skb->len);
-               memcpy(skb_push(skb, 2), &len, 2);
-               memcpy(skb_push(skb, ETH_ALEN), src, ETH_ALEN);
-               memcpy(skb_push(skb, ETH_ALEN), dst, ETH_ALEN);
-       }
-
-
-       stats->rx_packets++;
-       stats->rx_bytes += skb->len;
-
-       if (skb) {
-               skb->protocol = eth_type_trans(skb, dev);
-               memset(skb->cb, 0, sizeof(skb->cb));
-               skb->dev = dev;
-               skb->ip_summed = CHECKSUM_NONE; /* 802.11 crc not sufficient */
-               ieee->last_rx_ps_time = jiffies;
-               netif_rx(skb);
-       }
-
- rx_exit:
-       return 1;
-
- rx_dropped:
-       stats->rx_dropped++;
-
-       /* Returning 0 indicates to caller that we have not handled the SKB--
-        * so it is still allocated and can be used again by underlying
-        * hardware as a DMA target */
-       return 0;
-}
-
-#define MGMT_FRAME_FIXED_PART_LENGTH           0x24
-
-static inline int ieee80211_is_ofdm_rate(u8 rate)
-{
-       switch (rate & ~IEEE80211_BASIC_RATE_MASK) {
-       case IEEE80211_OFDM_RATE_6MB:
-       case IEEE80211_OFDM_RATE_9MB:
-       case IEEE80211_OFDM_RATE_12MB:
-       case IEEE80211_OFDM_RATE_18MB:
-       case IEEE80211_OFDM_RATE_24MB:
-       case IEEE80211_OFDM_RATE_36MB:
-       case IEEE80211_OFDM_RATE_48MB:
-       case IEEE80211_OFDM_RATE_54MB:
-               return 1;
-       }
-       return 0;
-}
-
-static inline int ieee80211_SignalStrengthTranslate(int CurrSS)
-{
-       int RetSS;
-
-       // Step 1. Scale mapping.
-       if (CurrSS >= 71 && CurrSS <= 100)
-               RetSS = 90 + ((CurrSS - 70) / 3);
-       else if (CurrSS >= 41 && CurrSS <= 70)
-               RetSS = 78 + ((CurrSS - 40) / 3);
-       else if (CurrSS >= 31 && CurrSS <= 40)
-               RetSS = 66 + (CurrSS - 30);
-       else if (CurrSS >= 21 && CurrSS <= 30)
-               RetSS = 54 + (CurrSS - 20);
-       else if (CurrSS >= 5 && CurrSS <= 20)
-               RetSS = 42 + (((CurrSS - 5) * 2) / 3);
-       else if (CurrSS == 4)
-               RetSS = 36;
-       else if (CurrSS == 3)
-               RetSS = 27;
-       else if (CurrSS == 2)
-               RetSS = 18;
-       else if (CurrSS == 1)
-               RetSS = 9;
-       else
-               RetSS = CurrSS;
-
-       //RT_TRACE(COMP_DBG, DBG_LOUD, ("##### After Mapping:  LastSS: %d, CurrSS: %d, RetSS: %d\n", LastSS, CurrSS, RetSS));
-
-       // Step 2. Smoothing.
-
-       //RT_TRACE(COMP_DBG, DBG_LOUD, ("$$$$$ After Smoothing:  LastSS: %d, CurrSS: %d, RetSS: %d\n", LastSS, CurrSS, RetSS));
-
-       return RetSS;
-}
-
-static inline void
-ieee80211_extract_country_ie(struct ieee80211_device *ieee,
-                            struct ieee80211_info_element *info_element,
-                            struct ieee80211_network *network, u8 *addr2)
-{
-       if (IS_DOT11D_ENABLE(ieee)) {
-               if (info_element->len != 0) {
-                       memcpy(network->CountryIeBuf, info_element->data, info_element->len);
-                       network->CountryIeLen = info_element->len;
-
-                       if (!IS_COUNTRY_IE_VALID(ieee))
-                               Dot11d_UpdateCountryIe(ieee, addr2, info_element->len, info_element->data);
-               }
-
-               //
-               // 070305, rcnjko: I update country IE watch dog here because
-               // some AP (e.g. Cisco 1242) don't include country IE in their
-               // probe response frame.
-               //
-               if (IS_EQUAL_CIE_SRC(ieee, addr2))
-                       UPDATE_CIE_WATCHDOG(ieee);
-       }
-
-}
-
-/* SignalStrengthIndex is 0-100 */
-static int ieee80211_TranslateToDbm(unsigned char SignalStrengthIndex)
-{
-       unsigned char SignalPower; // in dBm.
-
-       // Translate to dBm (x=0.5y-95).
-       SignalPower = (int)SignalStrengthIndex * 7 / 10;
-       SignalPower -= 95;
-
-       return SignalPower;
-}
-inline int ieee80211_network_init(
-       struct ieee80211_device *ieee,
-       struct ieee80211_probe_response *beacon,
-       struct ieee80211_network *network,
-       struct ieee80211_rx_stats *stats)
-{
-#ifdef CONFIG_IEEE80211_DEBUG
-       char rates_str[64];
-       char *p;
-#endif
-       struct ieee80211_info_element *info_element;
-       u16 left;
-       u8 i;
-       short offset;
-       u8 curRate = 0, hOpRate = 0, curRate_ex = 0;
-
-       /* Pull out fixed field data */
-       memcpy(network->bssid, beacon->header.addr3, ETH_ALEN);
-       network->capability = beacon->capability;
-       network->last_scanned = jiffies;
-       network->time_stamp[0] = beacon->time_stamp[0];
-       network->time_stamp[1] = beacon->time_stamp[1];
-       network->beacon_interval = beacon->beacon_interval;
-       /* Where to pull this? beacon->listen_interval;*/
-       network->listen_interval = 0x0A;
-       network->rates_len = network->rates_ex_len = 0;
-       network->last_associate = 0;
-       network->ssid_len = 0;
-       network->flags = 0;
-       network->atim_window = 0;
-       network->QoS_Enable = 0;
-//by amy 080312
-       network->HighestOperaRate = 0;
-//by amy 080312
-       network->Turbo_Enable = 0;
-       network->CountryIeLen = 0;
-       memset(network->CountryIeBuf, 0, MAX_IE_LEN);
-
-       if (stats->freq == IEEE80211_52GHZ_BAND) {
-               /* for A band (No DS info) */
-               network->channel = stats->received_channel;
-       } else
-               network->flags |= NETWORK_HAS_CCK;
-
-       network->wpa_ie_len = 0;
-       network->rsn_ie_len = 0;
-
-       info_element = &beacon->info_element;
-       left = stats->len - ((void *)info_element - (void *)beacon);
-       while (left >= sizeof(struct ieee80211_info_element_hdr)) {
-               if (sizeof(struct ieee80211_info_element_hdr) + info_element->len > left) {
-                       IEEE80211_DEBUG_SCAN("SCAN: parse failed: info_element->len + 2 > left : info_element->len+2=%d left=%d.\n",
-                                            info_element->len + sizeof(struct ieee80211_info_element),
-                                            left);
-                       return 1;
-               }
-
-               switch (info_element->id) {
-               case MFIE_TYPE_SSID:
-                       if (ieee80211_is_empty_essid(info_element->data,
-                                                    info_element->len)) {
-                               network->flags |= NETWORK_EMPTY_ESSID;
-                               break;
-                       }
-
-                       network->ssid_len = min(info_element->len,
-                                               (u8)IW_ESSID_MAX_SIZE);
-                       memcpy(network->ssid, info_element->data, network->ssid_len);
-                       if (network->ssid_len < IW_ESSID_MAX_SIZE)
-                               memset(network->ssid + network->ssid_len, 0,
-                                      IW_ESSID_MAX_SIZE - network->ssid_len);
-
-                       IEEE80211_DEBUG_SCAN("MFIE_TYPE_SSID: '%s' len=%d.\n",
-                                            network->ssid, network->ssid_len);
-                       break;
-
-               case MFIE_TYPE_RATES:
-#ifdef CONFIG_IEEE80211_DEBUG
-                       p = rates_str;
-#endif
-                       network->rates_len = min(info_element->len, MAX_RATES_LENGTH);
-                       for (i = 0; i < network->rates_len; i++) {
-                               network->rates[i] = info_element->data[i];
-                               curRate = network->rates[i] & 0x7f;
-                               if (hOpRate < curRate)
-                                       hOpRate = curRate;
-#ifdef CONFIG_IEEE80211_DEBUG
-                               p += snprintf(p, sizeof(rates_str) - (p - rates_str), "%02X ", network->rates[i]);
-#endif
-                               if (ieee80211_is_ofdm_rate(info_element->data[i])) {
-                                       network->flags |= NETWORK_HAS_OFDM;
-                                       if (info_element->data[i] &
-                                           IEEE80211_BASIC_RATE_MASK)
-                                               network->flags &=
-                                                       ~NETWORK_HAS_CCK;
-                               }
-                       }
-
-                       IEEE80211_DEBUG_SCAN("MFIE_TYPE_RATES: '%s' (%d)\n",
-                                            rates_str, network->rates_len);
-                       break;
-
-               case MFIE_TYPE_RATES_EX:
-#ifdef CONFIG_IEEE80211_DEBUG
-                       p = rates_str;
-#endif
-                       network->rates_ex_len = min(info_element->len, MAX_RATES_EX_LENGTH);
-                       for (i = 0; i < network->rates_ex_len; i++) {
-                               network->rates_ex[i] = info_element->data[i];
-                               curRate_ex = network->rates_ex[i] & 0x7f;
-                               if (hOpRate < curRate_ex)
-                                       hOpRate = curRate_ex;
-#ifdef CONFIG_IEEE80211_DEBUG
-                               p += snprintf(p, sizeof(rates_str) - (p - rates_str), "%02X ", network->rates[i]);
-#endif
-                               if (ieee80211_is_ofdm_rate(info_element->data[i])) {
-                                       network->flags |= NETWORK_HAS_OFDM;
-                                       if (info_element->data[i] &
-                                           IEEE80211_BASIC_RATE_MASK)
-                                               network->flags &=
-                                                       ~NETWORK_HAS_CCK;
-                               }
-                       }
-
-                       IEEE80211_DEBUG_SCAN("MFIE_TYPE_RATES_EX: '%s' (%d)\n",
-                                            rates_str, network->rates_ex_len);
-                       break;
-
-               case MFIE_TYPE_DS_SET:
-                       IEEE80211_DEBUG_SCAN("MFIE_TYPE_DS_SET: %d\n",
-                                            info_element->data[0]);
-                       if (stats->freq == IEEE80211_24GHZ_BAND)
-                               network->channel = info_element->data[0];
-                       break;
-
-               case MFIE_TYPE_FH_SET:
-                       IEEE80211_DEBUG_SCAN("MFIE_TYPE_FH_SET: ignored\n");
-                       break;
-
-               case MFIE_TYPE_CF_SET:
-                       IEEE80211_DEBUG_SCAN("MFIE_TYPE_CF_SET: ignored\n");
-                       break;
-
-               case MFIE_TYPE_TIM:
-
-                       if (info_element->len < 4)
-                               break;
-
-                       network->dtim_period = info_element->data[1];
-
-                       if (ieee->state != IEEE80211_LINKED)
-                               break;
-
-                       network->last_dtim_sta_time[0] = jiffies;
-                       network->last_dtim_sta_time[1] = stats->mac_time[1];
-
-                       network->dtim_data = IEEE80211_DTIM_VALID;
-
-                       if (info_element->data[0] != 0)
-                               break;
-
-                       if (info_element->data[2] & 1)
-                               network->dtim_data |= IEEE80211_DTIM_MBCAST;
-
-                       offset = (info_element->data[2] >> 1)*2;
-
-                       //printk("offset1:%x aid:%x\n",offset, ieee->assoc_id);
-
-                       /* add and modified for ps 2008.1.22 */
-                       if (ieee->assoc_id < 8*offset ||
-                               ieee->assoc_id > 8*(offset + info_element->len - 3)) {
-                               break;
-                       }
-
-                       offset = (ieee->assoc_id/8) - offset;// + ((aid % 8)? 0 : 1) ;
-
-               //      printk("offset:%x data:%x, ucast:%d\n", offset,
-                       //      info_element->data[3+offset] ,
-                       //      info_element->data[3+offset] & (1<<(ieee->assoc_id%8)));
-
-                       if (info_element->data[3+offset] & (1<<(ieee->assoc_id%8)))
-                               network->dtim_data |= IEEE80211_DTIM_UCAST;
-
-                       break;
-
-               case MFIE_TYPE_IBSS_SET:
-                       IEEE80211_DEBUG_SCAN("MFIE_TYPE_IBSS_SET: ignored\n");
-                       break;
-
-               case MFIE_TYPE_CHALLENGE:
-                       IEEE80211_DEBUG_SCAN("MFIE_TYPE_CHALLENGE: ignored\n");
-                       break;
-
-               case MFIE_TYPE_GENERIC:
-                       //nic is 87B
-                       IEEE80211_DEBUG_SCAN("MFIE_TYPE_GENERIC: %d bytes\n",
-                                            info_element->len);
-                       if (info_element->len >= 4  &&
-                           info_element->data[0] == 0x00 &&
-                           info_element->data[1] == 0x50 &&
-                           info_element->data[2] == 0xf2 &&
-                           info_element->data[3] == 0x01) {
-                               network->wpa_ie_len = min(info_element->len + 2,
-                                                        MAX_WPA_IE_LEN);
-                               memcpy(network->wpa_ie, info_element,
-                                      network->wpa_ie_len);
-                       }
-
-                       if (info_element->len == 7 &&
-                           info_element->data[0] == 0x00 &&
-                           info_element->data[1] == 0xe0 &&
-                           info_element->data[2] == 0x4c &&
-                           info_element->data[3] == 0x01 &&
-                           info_element->data[4] == 0x02) {
-                               network->Turbo_Enable = 1;
-                       }
-                       if (1 == stats->nic_type) //nic 87
-                               break;
-
-                       if (info_element->len >= 5  &&
-                           info_element->data[0] == 0x00 &&
-                           info_element->data[1] == 0x50 &&
-                           info_element->data[2] == 0xf2 &&
-                           info_element->data[3] == 0x02 &&
-                           info_element->data[4] == 0x00) {
-                               //printk(KERN_WARNING "wmm info updated: %x\n", info_element->data[6]);
-                               //WMM Information Element
-                               network->wmm_info = info_element->data[6];
-                               network->QoS_Enable = 1;
-                       }
-
-                       if (info_element->len >= 8  &&
-                           info_element->data[0] == 0x00 &&
-                           info_element->data[1] == 0x50 &&
-                           info_element->data[2] == 0xf2 &&
-                           info_element->data[3] == 0x02 &&
-                           info_element->data[4] == 0x01) {
-                               // Not care about version at present.
-                               //WMM Information Element
-                               //printk(KERN_WARNING "wmm info&param updated: %x\n", info_element->data[6]);
-                               network->wmm_info = info_element->data[6];
-                               //WMM Parameter Element
-                               memcpy(network->wmm_param, (u8 *)(info_element->data + 8), (info_element->len - 8));
-                               network->QoS_Enable = 1;
-                       }
-                       break;
-
-               case MFIE_TYPE_RSN:
-                       IEEE80211_DEBUG_SCAN("MFIE_TYPE_RSN: %d bytes\n",
-                                            info_element->len);
-                       network->rsn_ie_len = min(info_element->len + 2,
-                                                MAX_WPA_IE_LEN);
-                       memcpy(network->rsn_ie, info_element,
-                              network->rsn_ie_len);
-                       break;
-               case MFIE_TYPE_COUNTRY:
-                       IEEE80211_DEBUG_SCAN("MFIE_TYPE_COUNTRY: %d bytes\n",
-                                            info_element->len);
-//                     printk("=====>Receive <%s> Country IE\n",network->ssid);
-                       ieee80211_extract_country_ie(ieee, info_element, network, beacon->header.addr2);
-                       break;
-               default:
-                       IEEE80211_DEBUG_SCAN("unsupported IE %d\n",
-                                            info_element->id);
-                       break;
-               }
-
-               left -= sizeof(struct ieee80211_info_element_hdr) +
-                       info_element->len;
-               info_element = (struct ieee80211_info_element *)
-                       &info_element->data[info_element->len];
-       }
-//by amy 080312
-       network->HighestOperaRate = hOpRate;
-//by amy 080312
-       network->mode = 0;
-       if (stats->freq == IEEE80211_52GHZ_BAND)
-               network->mode = IEEE_A;
-       else {
-               if (network->flags & NETWORK_HAS_OFDM)
-                       network->mode |= IEEE_G;
-               if (network->flags & NETWORK_HAS_CCK)
-                       network->mode |= IEEE_B;
-       }
-
-       if (network->mode == 0) {
-               IEEE80211_DEBUG_SCAN("Filtered out '%s (%pM)' "
-                                    "network.\n",
-                                    escape_essid(network->ssid,
-                                                 network->ssid_len),
-                                    network->bssid);
-               return 1;
-       }
-
-       if (ieee80211_is_empty_essid(network->ssid, network->ssid_len))
-               network->flags |= NETWORK_EMPTY_ESSID;
-
-       stats->signal = ieee80211_TranslateToDbm(stats->signalstrength);
-       //stats->noise = stats->signal - stats->noise;
-       stats->noise = ieee80211_TranslateToDbm(100 - stats->signalstrength) - 25;
-       memcpy(&network->stats, stats, sizeof(network->stats));
-
-       return 0;
-}
-
-static inline int is_same_network(struct ieee80211_network *src,
-                                 struct ieee80211_network *dst,
-                                 struct ieee80211_device *ieee)
-{
-       /* A network is only a duplicate if the channel, BSSID, ESSID
-        * and the capability field (in particular IBSS and BSS) all match.
-        * We treat all <hidden> with the same BSSID and channel
-        * as one network */
-       return (((src->ssid_len == dst->ssid_len) || (ieee->iw_mode == IW_MODE_INFRA)) &&  //YJ,mod,080819,for hidden ap
-               //((src->ssid_len == dst->ssid_len) &&
-               (src->channel == dst->channel) &&
-               !memcmp(src->bssid, dst->bssid, ETH_ALEN) &&
-               (!memcmp(src->ssid, dst->ssid, src->ssid_len) || (ieee->iw_mode == IW_MODE_INFRA)) && //YJ,mod,080819,for hidden ap
-               //!memcmp(src->ssid, dst->ssid, src->ssid_len) &&
-               ((src->capability & WLAN_CAPABILITY_IBSS) ==
-               (dst->capability & WLAN_CAPABILITY_IBSS)) &&
-               ((src->capability & WLAN_CAPABILITY_BSS) ==
-               (dst->capability & WLAN_CAPABILITY_BSS)));
-}
-
-inline void update_network(struct ieee80211_network *dst,
-                          struct ieee80211_network *src)
-{
-       unsigned char quality = src->stats.signalstrength;
-       unsigned char signal = 0;
-       unsigned char noise = 0;
-       if (dst->stats.signalstrength > 0)
-               quality = (dst->stats.signalstrength * 5 + src->stats.signalstrength + 5)/6;
-       signal = ieee80211_TranslateToDbm(quality);
-       //noise = signal - src->stats.noise;
-       if (dst->stats.noise > 0)
-               noise = (dst->stats.noise * 5 + src->stats.noise)/6;
-        //if(strcmp(dst->ssid, "linksys_lzm000") == 0)
-//     printk("ssid:%s, quality:%d, signal:%d\n", dst->ssid, quality, signal);
-       memcpy(&dst->stats, &src->stats, sizeof(struct ieee80211_rx_stats));
-       dst->stats.signalstrength = quality;
-       dst->stats.signal = signal;
-//     printk("==================>stats.signal is %d\n",dst->stats.signal);
-       dst->stats.noise = noise;
-
-
-       dst->capability = src->capability;
-       memcpy(dst->rates, src->rates, src->rates_len);
-       dst->rates_len = src->rates_len;
-       memcpy(dst->rates_ex, src->rates_ex, src->rates_ex_len);
-       dst->rates_ex_len = src->rates_ex_len;
-       dst->HighestOperaRate = src->HighestOperaRate;
-       //printk("==========>in %s: src->ssid is %s,chan is %d\n",__func__,src->ssid,src->channel);
-
-       //YJ,add,080819,for hidden ap
-       if (src->ssid_len > 0) {
-               //if(src->ssid_len == 13)
-               //      printk("=====================>>>>>>>> Dst ssid: %s Src ssid: %s\n", dst->ssid, src->ssid);
-               memset(dst->ssid, 0, dst->ssid_len);
-               dst->ssid_len = src->ssid_len;
-               memcpy(dst->ssid, src->ssid, src->ssid_len);
-       }
-       //YJ,add,080819,for hidden ap,end
-
-       dst->channel = src->channel;
-       dst->mode = src->mode;
-       dst->flags = src->flags;
-       dst->time_stamp[0] = src->time_stamp[0];
-       dst->time_stamp[1] = src->time_stamp[1];
-
-       dst->beacon_interval = src->beacon_interval;
-       dst->listen_interval = src->listen_interval;
-       dst->atim_window = src->atim_window;
-       dst->dtim_period = src->dtim_period;
-       dst->dtim_data = src->dtim_data;
-       dst->last_dtim_sta_time[0] = src->last_dtim_sta_time[0];
-       dst->last_dtim_sta_time[1] = src->last_dtim_sta_time[1];
-//     printk("update:%s, dtim_period:%x, dtim_data:%x\n", src->ssid, src->dtim_period, src->dtim_data);
-       memcpy(dst->wpa_ie, src->wpa_ie, src->wpa_ie_len);
-       dst->wpa_ie_len = src->wpa_ie_len;
-       memcpy(dst->rsn_ie, src->rsn_ie, src->rsn_ie_len);
-       dst->rsn_ie_len = src->rsn_ie_len;
-
-       dst->last_scanned = jiffies;
-       /* dst->last_associate is not overwritten */
-// disable QoS process now, added by David 2006/7/25
-#if 1
-       dst->wmm_info = src->wmm_info; //sure to exist in beacon or probe response frame.
-/*
-       if((dst->wmm_info^src->wmm_info)&0x0f) {//Param Set Count change, update Parameter
-         memcpy(dst->wmm_param, src->wmm_param, IEEE80211_AC_PRAM_LEN);
-       }
-*/
-       if (src->wmm_param[0].ac_aci_acm_aifsn || \
-          src->wmm_param[1].ac_aci_acm_aifsn || \
-          src->wmm_param[2].ac_aci_acm_aifsn || \
-          src->wmm_param[3].ac_aci_acm_aifsn) {
-               memcpy(dst->wmm_param, src->wmm_param, WME_AC_PRAM_LEN);
-       }
-       dst->QoS_Enable = src->QoS_Enable;
-#else
-       dst->QoS_Enable = 1;//for Rtl8187 simulation
-#endif
-       dst->SignalStrength = src->SignalStrength;
-       dst->Turbo_Enable = src->Turbo_Enable;
-       dst->CountryIeLen = src->CountryIeLen;
-       memcpy(dst->CountryIeBuf, src->CountryIeBuf, src->CountryIeLen);
-}
-
-
-inline void
-ieee80211_process_probe_response(struct ieee80211_device *ieee,
-                                struct ieee80211_probe_response *beacon,
-                                struct ieee80211_rx_stats *stats)
-{
-       struct ieee80211_network network;
-       struct ieee80211_network *target;
-       struct ieee80211_network *oldest = NULL;
-#ifdef CONFIG_IEEE80211_DEBUG
-       struct ieee80211_info_element *info_element = &beacon->info_element;
-#endif
-       unsigned long flags;
-       short renew;
-       u8 wmm_info;
-       u8 is_beacon = (WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == IEEE80211_STYPE_BEACON) ? 1 : 0;  //YJ,add,080819,for hidden ap
-
-       memset(&network, 0, sizeof(struct ieee80211_network));
-
-       IEEE80211_DEBUG_SCAN(
-               "'%s' (%pM): %c%c%c%c %c%c%c%c-%c%c%c%c %c%c%c%c\n",
-               escape_essid(info_element->data, info_element->len),
-               beacon->header.addr3,
-               (beacon->capability & (1<<0xf)) ? '1' : '0',
-               (beacon->capability & (1<<0xe)) ? '1' : '0',
-               (beacon->capability & (1<<0xd)) ? '1' : '0',
-               (beacon->capability & (1<<0xc)) ? '1' : '0',
-               (beacon->capability & (1<<0xb)) ? '1' : '0',
-               (beacon->capability & (1<<0xa)) ? '1' : '0',
-               (beacon->capability & (1<<0x9)) ? '1' : '0',
-               (beacon->capability & (1<<0x8)) ? '1' : '0',
-               (beacon->capability & (1<<0x7)) ? '1' : '0',
-               (beacon->capability & (1<<0x6)) ? '1' : '0',
-               (beacon->capability & (1<<0x5)) ? '1' : '0',
-               (beacon->capability & (1<<0x4)) ? '1' : '0',
-               (beacon->capability & (1<<0x3)) ? '1' : '0',
-               (beacon->capability & (1<<0x2)) ? '1' : '0',
-               (beacon->capability & (1<<0x1)) ? '1' : '0',
-               (beacon->capability & (1<<0x0)) ? '1' : '0');
-
-       if (ieee80211_network_init(ieee, beacon, &network, stats)) {
-               IEEE80211_DEBUG_SCAN("Dropped '%s' (%pM) via %s.\n",
-                                    escape_essid(info_element->data,
-                                                 info_element->len),
-                                    beacon->header.addr3,
-                                    WLAN_FC_GET_STYPE(beacon->header.frame_ctl) ==
-                                    IEEE80211_STYPE_PROBE_RESP ?
-                                    "PROBE RESPONSE" : "BEACON");
-               return;
-       }
-
-       // For Asus EeePc request,
-       // (1) if wireless adapter receive get any 802.11d country code in AP beacon,
-       //         wireless adapter should follow the country code.
-       // (2)  If there is no any country code in beacon,
-       //       then wireless adapter should do active scan from ch1~11 and
-       //       passive scan from ch12~14
-       if (ieee->bGlobalDomain) {
-               if (WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == IEEE80211_STYPE_PROBE_RESP) {
-                       // Case 1: Country code
-                       if (IS_COUNTRY_IE_VALID(ieee)) {
-                               if (!IsLegalChannel(ieee, network.channel)) {
-                                       printk("GetScanInfo(): For Country code, filter probe response at channel(%d).\n", network.channel);
-                                       return;
-                               }
-                       }
-                       // Case 2: No any country code.
-                       else {
-                               // Filter over channel ch12~14
-                               if (network.channel > 11) {
-                                       printk("GetScanInfo(): For Global Domain, filter probe response at channel(%d).\n", network.channel);
-                                       return;
-                               }
-                       }
-               } else {
-                       // Case 1: Country code
-                       if (IS_COUNTRY_IE_VALID(ieee)) {
-                               if (!IsLegalChannel(ieee, network.channel)) {
-                                       printk("GetScanInfo(): For Country code, filter beacon at channel(%d).\n", network.channel);
-                                       return;
-                               }
-                       }
-                       // Case 2: No any country code.
-                       else {
-                               // Filter over channel ch12~14
-                               if (network.channel > 14) {
-                                       printk("GetScanInfo(): For Global Domain, filter beacon at channel(%d).\n", network.channel);
-                                       return;
-                               }
-                       }
-               }
-       }
-       /* The network parsed correctly -- so now we scan our known networks
-        * to see if we can find it in our list.
-        *
-        * NOTE:  This search is definitely not optimized.  Once its doing
-        *        the "right thing" we'll optimize it for efficiency if
-        *        necessary */
-
-       /* Search for this entry in the list and update it if it is
-        * already there. */
-
-       spin_lock_irqsave(&ieee->lock, flags);
-
-       if (is_same_network(&ieee->current_network, &network, ieee)) {
-               wmm_info = ieee->current_network.wmm_info;
-               //YJ,add,080819,for hidden ap
-               if (is_beacon == 0)
-                       network.flags = (~NETWORK_EMPTY_ESSID & network.flags)|(NETWORK_EMPTY_ESSID & ieee->current_network.flags);
-               else if (ieee->state == IEEE80211_LINKED)
-                       ieee->NumRxBcnInPeriod++;
-               //YJ,add,080819,for hidden ap,end
-               //printk("====>network.ssid=%s cur_ssid=%s\n", network.ssid, ieee->current_network.ssid);
-               update_network(&ieee->current_network, &network);
-       }
-
-       list_for_each_entry(target, &ieee->network_list, list) {
-               if (is_same_network(target, &network, ieee))
-                       break;
-               if ((oldest == NULL) ||
-                   (target->last_scanned < oldest->last_scanned))
-                       oldest = target;
-       }
-
-       /* If we didn't find a match, then get a new network slot to initialize
-        * with this beacon's information */
-       if (&target->list == &ieee->network_list) {
-               if (list_empty(&ieee->network_free_list)) {
-                       /* If there are no more slots, expire the oldest */
-                       list_del(&oldest->list);
-                       target = oldest;
-                       IEEE80211_DEBUG_SCAN("Expired '%s' (%pM) from "
-                                            "network list.\n",
-                                            escape_essid(target->ssid,
-                                                         target->ssid_len),
-                                            target->bssid);
-               } else {
-                       /* Otherwise just pull from the free list */
-                       target = list_entry(ieee->network_free_list.next,
-                                           struct ieee80211_network, list);
-                       list_del(ieee->network_free_list.next);
-               }
-
-
-#ifdef CONFIG_IEEE80211_DEBUG
-               IEEE80211_DEBUG_SCAN("Adding '%s' (%pM) via %s.\n",
-                                    escape_essid(network.ssid,
-                                                 network.ssid_len),
-                                    network.bssid,
-                                    WLAN_FC_GET_STYPE(beacon->header.frame_ctl) ==
-                                    IEEE80211_STYPE_PROBE_RESP ?
-                                    "PROBE RESPONSE" : "BEACON");
-#endif
-
-               memcpy(target, &network, sizeof(*target));
-               list_add_tail(&target->list, &ieee->network_list);
-       } else {
-               IEEE80211_DEBUG_SCAN("Updating '%s' (%pM) via %s.\n",
-                                    escape_essid(target->ssid,
-                                                 target->ssid_len),
-                                    target->bssid,
-                                    WLAN_FC_GET_STYPE(beacon->header.frame_ctl) ==
-                                    IEEE80211_STYPE_PROBE_RESP ?
-                                    "PROBE RESPONSE" : "BEACON");
-
-               /* we have an entry and we are going to update it. But this entry may
-                * be already expired. In this case we do the same as we found a new
-                * net and call the new_net handler
-                */
-               renew = !time_after(target->last_scanned + ieee->scan_age, jiffies);
-               //YJ,add,080819,for hidden ap
-               if (is_beacon == 0)
-                       network.flags = (~NETWORK_EMPTY_ESSID & network.flags)|(NETWORK_EMPTY_ESSID & target->flags);
-               //if(strncmp(network.ssid, "linksys-c",9) == 0)
-               //      printk("====>2 network.ssid=%s FLAG=%d target.ssid=%s FLAG=%d\n", network.ssid, network.flags, target->ssid, target->flags);
-               if (((network.flags & NETWORK_EMPTY_ESSID) == NETWORK_EMPTY_ESSID) \
-                   && (((network.ssid_len > 0) && (strncmp(target->ssid, network.ssid, network.ssid_len)))\
-                   || ((ieee->current_network.ssid_len == network.ssid_len) && (strncmp(ieee->current_network.ssid, network.ssid, network.ssid_len) == 0) && (ieee->state == IEEE80211_NOLINK))))
-                       renew = 1;
-               //YJ,add,080819,for hidden ap,end
-               update_network(target, &network);
-       }
-
-       spin_unlock_irqrestore(&ieee->lock, flags);
-}
-
-void ieee80211_rx_mgt(struct ieee80211_device *ieee,
-                     struct ieee80211_hdr_4addr *header,
-                     struct ieee80211_rx_stats *stats)
-{
-       switch (WLAN_FC_GET_STYPE(header->frame_ctl)) {
-
-       case IEEE80211_STYPE_BEACON:
-               IEEE80211_DEBUG_MGMT("received BEACON (%d)\n",
-                                    WLAN_FC_GET_STYPE(header->frame_ctl));
-               IEEE80211_DEBUG_SCAN("Beacon\n");
-               ieee80211_process_probe_response(
-                       ieee, (struct ieee80211_probe_response *)header, stats);
-               break;
-
-       case IEEE80211_STYPE_PROBE_RESP:
-               IEEE80211_DEBUG_MGMT("received PROBE RESPONSE (%d)\n",
-                                    WLAN_FC_GET_STYPE(header->frame_ctl));
-               IEEE80211_DEBUG_SCAN("Probe response\n");
-               ieee80211_process_probe_response(
-                       ieee, (struct ieee80211_probe_response *)header, stats);
-               break;
-       }
-}
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c
deleted file mode 100644 (file)
index 03eb164..0000000
+++ /dev/null
@@ -1,2711 +0,0 @@
-/* IEEE 802.11 SoftMAC layer
- * Copyright (c) 2005 Andrea Merello <andrea.merello@gmail.com>
- *
- * Mostly extracted from the rtl8180-sa2400 driver for the
- * in-kernel generic ieee802.11 stack.
- *
- * Few lines might be stolen from other part of the ieee80211
- * stack. Copyright who own it's copyright
- *
- * WPA code stolen from the ipw2200 driver.
- * Copyright who own it's copyright.
- *
- * released under the GPL
- */
-
-#include "ieee80211.h"
-
-#include <linux/random.h>
-#include <linux/delay.h>
-#include <linux/slab.h>
-#include <linux/interrupt.h>
-#include <linux/uaccess.h>
-#include <linux/etherdevice.h>
-
-#include "dot11d.h"
-
-short ieee80211_is_54g(const struct ieee80211_network *net)
-{
-       return (net->rates_ex_len > 0) || (net->rates_len > 4);
-}
-
-short ieee80211_is_shortslot(const struct ieee80211_network *net)
-{
-       return net->capability & WLAN_CAPABILITY_SHORT_SLOT;
-}
-
-/* returns the total length needed for placing the RATE MFIE
- * tag and the EXTENDED RATE MFIE tag if needed.
- * It encludes two bytes per tag for the tag itself and its len
- */
-static unsigned int ieee80211_MFIE_rate_len(struct ieee80211_device *ieee)
-{
-       unsigned int rate_len = 0;
-
-       if (ieee->modulation & IEEE80211_CCK_MODULATION)
-               rate_len = IEEE80211_CCK_RATE_LEN + 2;
-
-       if (ieee->modulation & IEEE80211_OFDM_MODULATION)
-
-               rate_len += IEEE80211_OFDM_RATE_LEN + 2;
-
-       return rate_len;
-}
-
-/* place the MFIE rate, tag to the memory (double) poised.
- * Then it updates the pointer so that it points after the new MFIE tag added.
- */
-static void ieee80211_MFIE_Brate(struct ieee80211_device *ieee, u8 **tag_p)
-{
-       u8 *tag = *tag_p;
-
-       if (ieee->modulation & IEEE80211_CCK_MODULATION) {
-               *tag++ = MFIE_TYPE_RATES;
-               *tag++ = 4;
-               *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_1MB;
-               *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_2MB;
-               *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_5MB;
-               *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_11MB;
-       }
-
-       /* We may add an option for custom rates that specific HW might support */
-       *tag_p = tag;
-}
-
-static void ieee80211_MFIE_Grate(struct ieee80211_device *ieee, u8 **tag_p)
-{
-       u8 *tag = *tag_p;
-
-               if (ieee->modulation & IEEE80211_OFDM_MODULATION) {
-               *tag++ = MFIE_TYPE_RATES_EX;
-               *tag++ = 8;
-               *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_6MB;
-               *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_9MB;
-               *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_12MB;
-               *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_18MB;
-               *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_24MB;
-               *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_36MB;
-               *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_48MB;
-               *tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_54MB;
-
-       }
-       /* We may add an option for custom rates that specific HW might support */
-       *tag_p = tag;
-}
-
-static void ieee80211_WMM_Info(struct ieee80211_device *ieee, u8 **tag_p)
-{
-       u8 *tag = *tag_p;
-
-       *tag++ = MFIE_TYPE_GENERIC; /* 0 */
-       *tag++ = 7;
-       *tag++ = 0x00;
-       *tag++ = 0x50;
-       *tag++ = 0xf2;
-       *tag++ = 0x02; /* 5 */
-       *tag++ = 0x00;
-       *tag++ = 0x01;
-#ifdef SUPPORT_USPD
-       if (ieee->current_network.wmm_info & 0x80)
-               *tag++ = 0x0f|MAX_SP_Len;
-       else
-               *tag++ = MAX_SP_Len;
-#else
-       *tag++ = MAX_SP_Len;
-#endif
-       *tag_p = tag;
-}
-
-static void ieee80211_TURBO_Info(struct ieee80211_device *ieee, u8 **tag_p)
-{
-       u8 *tag = *tag_p;
-       *tag++ = MFIE_TYPE_GENERIC; /* 0 */
-       *tag++ = 7;
-       *tag++ = 0x00;
-       *tag++ = 0xe0;
-       *tag++ = 0x4c;
-       *tag++ = 0x01; /* 5 */
-       *tag++ = 0x02;
-       *tag++ = 0x11;
-       *tag++ = 0x00;
-       *tag_p = tag;
-       printk(KERN_ALERT "This is enable turbo mode IE process\n");
-}
-
-static void enqueue_mgmt(struct ieee80211_device *ieee, struct sk_buff *skb)
-{
-       int nh;
-       nh = (ieee->mgmt_queue_head + 1) % MGMT_QUEUE_NUM;
-
-       ieee->mgmt_queue_head = nh;
-       ieee->mgmt_queue_ring[nh] = skb;
-}
-
-static struct sk_buff *dequeue_mgmt(struct ieee80211_device *ieee)
-{
-       struct sk_buff *ret;
-
-       if (ieee->mgmt_queue_tail == ieee->mgmt_queue_head)
-               return NULL;
-
-       ret = ieee->mgmt_queue_ring[ieee->mgmt_queue_tail];
-
-       ieee->mgmt_queue_tail =
-               (ieee->mgmt_queue_tail + 1) % MGMT_QUEUE_NUM;
-
-       return ret;
-}
-
-static void init_mgmt_queue(struct ieee80211_device *ieee)
-{
-       ieee->mgmt_queue_tail = ieee->mgmt_queue_head = 0;
-}
-
-void ieee80211_sta_wakeup(struct ieee80211_device *ieee, short nl);
-
-inline void softmac_mgmt_xmit(struct sk_buff *skb,
-                             struct ieee80211_device *ieee)
-{
-       unsigned long flags;
-       short single = ieee->softmac_features & IEEE_SOFTMAC_SINGLE_QUEUE;
-       struct ieee80211_hdr_3addr  *header =
-               (struct ieee80211_hdr_3addr  *) skb->data;
-
-       spin_lock_irqsave(&ieee->lock, flags);
-
-       /* called with 2nd param 0, no mgmt lock required */
-       ieee80211_sta_wakeup(ieee, 0);
-
-       if (single) {
-               if (ieee->queue_stop) {
-                       enqueue_mgmt(ieee, skb);
-               } else {
-                       header->seq_ctrl = cpu_to_le16(ieee->seq_ctrl[0]<<4);
-
-                       if (ieee->seq_ctrl[0] == 0xFFF)
-                               ieee->seq_ctrl[0] = 0;
-                       else
-                               ieee->seq_ctrl[0]++;
-
-                       /* avoid watchdog triggers */
-                       ieee->dev->trans_start = jiffies;
-                       ieee->softmac_data_hard_start_xmit(skb, ieee->dev, ieee->basic_rate);
-               }
-
-               spin_unlock_irqrestore(&ieee->lock, flags);
-       } else {
-               spin_unlock_irqrestore(&ieee->lock, flags);
-               spin_lock_irqsave(&ieee->mgmt_tx_lock, flags);
-
-               header->seq_ctrl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
-
-               if (ieee->seq_ctrl[0] == 0xFFF)
-                       ieee->seq_ctrl[0] = 0;
-               else
-                       ieee->seq_ctrl[0]++;
-
-               /* avoid watchdog triggers */
-               ieee->dev->trans_start = jiffies;
-               ieee->softmac_hard_start_xmit(skb, ieee->dev);
-
-               spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags);
-       }
-}
-
-inline void softmac_ps_mgmt_xmit(struct sk_buff *skb,
-                                struct ieee80211_device *ieee)
-{
-       short single = ieee->softmac_features & IEEE_SOFTMAC_SINGLE_QUEUE;
-       struct ieee80211_hdr_3addr  *header =
-               (struct ieee80211_hdr_3addr  *) skb->data;
-
-       if (single) {
-               header->seq_ctrl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
-
-               if (ieee->seq_ctrl[0] == 0xFFF)
-                       ieee->seq_ctrl[0] = 0;
-               else
-                       ieee->seq_ctrl[0]++;
-
-               /* avoid watchdog triggers */
-               ieee->dev->trans_start = jiffies;
-               ieee->softmac_data_hard_start_xmit(skb, ieee->dev, ieee->basic_rate);
-       } else {
-               header->seq_ctrl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
-
-               if (ieee->seq_ctrl[0] == 0xFFF)
-                       ieee->seq_ctrl[0] = 0;
-               else
-                       ieee->seq_ctrl[0]++;
-
-               /* avoid watchdog triggers */
-               ieee->dev->trans_start = jiffies;
-               ieee->softmac_hard_start_xmit(skb, ieee->dev);
-       }
-}
-
-inline struct sk_buff *
-ieee80211_disassociate_skb(struct ieee80211_network *beacon,
-                          struct ieee80211_device *ieee, u8 asRsn)
-{
-       struct sk_buff *skb;
-       struct ieee80211_disassoc_frame *disass;
-
-       skb = dev_alloc_skb(sizeof(struct ieee80211_disassoc_frame));
-       if (!skb)
-               return NULL;
-
-       disass = (struct ieee80211_disassoc_frame *) skb_put(skb, sizeof(struct ieee80211_disassoc_frame));
-       disass->header.frame_control = cpu_to_le16(IEEE80211_STYPE_DISASSOC);
-       disass->header.duration_id = 0;
-
-       memcpy(disass->header.addr1, beacon->bssid, ETH_ALEN);
-       memcpy(disass->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
-       memcpy(disass->header.addr3, beacon->bssid, ETH_ALEN);
-
-       disass->reasoncode = asRsn;
-       return skb;
-}
-
-void SendDisassociation(struct ieee80211_device *ieee, u8 *asSta, u8 asRsn)
-{
-       struct ieee80211_network *beacon = &ieee->current_network;
-       struct sk_buff *skb;
-       skb = ieee80211_disassociate_skb(beacon, ieee, asRsn);
-       if (skb)
-               softmac_mgmt_xmit(skb, ieee);
-}
-
-inline struct sk_buff *ieee80211_probe_req(struct ieee80211_device *ieee)
-{
-       unsigned int len, rate_len;
-       u8 *tag;
-       struct sk_buff *skb;
-       struct ieee80211_probe_request *req;
-
-       len = ieee->current_network.ssid_len;
-
-       rate_len = ieee80211_MFIE_rate_len(ieee);
-
-       skb = dev_alloc_skb(sizeof(struct ieee80211_probe_request) +
-                           2 + len + rate_len);
-       if (!skb)
-               return NULL;
-
-       req = (struct ieee80211_probe_request *) skb_put(skb, sizeof(struct ieee80211_probe_request));
-       req->header.frame_ctl = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
-       req->header.duration_id = 0; /* FIXME: is this OK ? */
-
-       memset(req->header.addr1, 0xff, ETH_ALEN);
-       memcpy(req->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
-       memset(req->header.addr3, 0xff, ETH_ALEN);
-
-       tag = (u8 *) skb_put(skb, len + 2 + rate_len);
-
-       *tag++ = MFIE_TYPE_SSID;
-       *tag++ = len;
-       memcpy(tag, ieee->current_network.ssid, len);
-       tag += len;
-       ieee80211_MFIE_Brate(ieee, &tag);
-       ieee80211_MFIE_Grate(ieee, &tag);
-
-       return skb;
-}
-
-struct sk_buff *ieee80211_get_beacon_(struct ieee80211_device *ieee);
-
-static void ieee80211_send_beacon(struct ieee80211_device *ieee)
-{
-       struct sk_buff *skb;
-
-       skb = ieee80211_get_beacon_(ieee);
-
-       if (skb) {
-               softmac_mgmt_xmit(skb, ieee);
-               ieee->softmac_stats.tx_beacons++;
-               dev_kfree_skb_any(skb);
-       }
-
-       ieee->beacon_timer.expires = jiffies +
-               (MSECS(ieee->current_network.beacon_interval - 5));
-
-       if (ieee->beacon_txing)
-               add_timer(&ieee->beacon_timer);
-}
-
-
-static void ieee80211_send_beacon_cb(unsigned long _ieee)
-{
-       struct ieee80211_device *ieee =
-               (struct ieee80211_device *) _ieee;
-       unsigned long flags;
-
-       spin_lock_irqsave(&ieee->beacon_lock, flags);
-       ieee80211_send_beacon(ieee);
-       spin_unlock_irqrestore(&ieee->beacon_lock, flags);
-}
-
-static void ieee80211_send_probe(struct ieee80211_device *ieee)
-{
-       struct sk_buff *skb;
-
-       skb = ieee80211_probe_req(ieee);
-       if (skb) {
-               softmac_mgmt_xmit(skb, ieee);
-               ieee->softmac_stats.tx_probe_rq++;
-       }
-}
-
-static void ieee80211_send_probe_requests(struct ieee80211_device *ieee)
-{
-       if (ieee->active_scan && (ieee->softmac_features & IEEE_SOFTMAC_PROBERQ)) {
-               ieee80211_send_probe(ieee);
-               ieee80211_send_probe(ieee);
-       }
-}
-
-/* this performs syncro scan blocking the caller until all channels
- * in the allowed channel map has been checked.
- */
-static void ieee80211_softmac_scan_syncro(struct ieee80211_device *ieee)
-{
-       short ch = 0;
-       u8 channel_map[MAX_CHANNEL_NUMBER+1];
-       memcpy(channel_map, GET_DOT11D_INFO(ieee)->channel_map, MAX_CHANNEL_NUMBER+1);
-       down(&ieee->scan_sem);
-
-       while (1) {
-               do {
-                       ch++;
-                       if (ch > MAX_CHANNEL_NUMBER)
-                               goto out; /* scan completed */
-
-               } while (!channel_map[ch]);
-               /* this function can be called in two situations
-                * 1- We have switched to ad-hoc mode and we are
-                *    performing a complete syncro scan before conclude
-                *    there are no interesting cell and to create a
-                *    new one. In this case the link state is
-                *    IEEE80211_NOLINK until we found an interesting cell.
-                *    If so the ieee8021_new_net, called by the RX path
-                *    will set the state to IEEE80211_LINKED, so we stop
-                *    scanning
-                * 2- We are linked and the root uses run iwlist scan.
-                *    So we switch to IEEE80211_LINKED_SCANNING to remember
-                *    that we are still logically linked (not interested in
-                *    new network events, despite for updating the net list,
-                *    but we are temporarily 'unlinked' as the driver shall
-                *    not filter RX frames and the channel is changing.
-                * So the only situation in witch are interested is to check
-                * if the state become LINKED because of the #1 situation
-                */
-
-               if (ieee->state == IEEE80211_LINKED)
-                       goto out;
-
-               ieee->set_chan(ieee->dev, ch);
-               if (channel_map[ch] == 1)
-                       ieee80211_send_probe_requests(ieee);
-
-               /* this prevent excessive time wait when we
-                * need to wait for a syncro scan to end..
-                */
-               if (ieee->sync_scan_hurryup)
-                       goto out;
-
-               msleep_interruptible_rtl(IEEE80211_SOFTMAC_SCAN_TIME);
-       }
-out:
-       ieee->sync_scan_hurryup = 0;
-       up(&ieee->scan_sem);
-       if (IS_DOT11D_ENABLE(ieee))
-               DOT11D_ScanComplete(ieee);
-}
-
-void ieee80211_softmac_ips_scan_syncro(struct ieee80211_device *ieee)
-{
-       int ch;
-       unsigned int watch_dog = 0;
-       u8 channel_map[MAX_CHANNEL_NUMBER+1];
-       memcpy(channel_map, GET_DOT11D_INFO(ieee)->channel_map, MAX_CHANNEL_NUMBER+1);
-       down(&ieee->scan_sem);
-       ch = ieee->current_network.channel;
-
-       while (1) {
-               /* this function can be called in two situations
-                * 1- We have switched to ad-hoc mode and we are
-                *    performing a complete syncro scan before conclude
-                *    there are no interesting cell and to create a
-                *    new one. In this case the link state is
-                *    IEEE80211_NOLINK until we found an interesting cell.
-                *    If so the ieee8021_new_net, called by the RX path
-                *    will set the state to IEEE80211_LINKED, so we stop
-                *    scanning
-                * 2- We are linked and the root uses run iwlist scan.
-                *    So we switch to IEEE80211_LINKED_SCANNING to remember
-                *    that we are still logically linked (not interested in
-                *    new network events, despite for updating the net list,
-                *    but we are temporarily 'unlinked' as the driver shall
-                *    not filter RX frames and the channel is changing.
-                * So the only situation in witch are interested is to check
-                * if the state become LINKED because of the #1 situation
-                */
-               if (ieee->state == IEEE80211_LINKED)
-                       goto out;
-
-               if (channel_map[ieee->current_network.channel] > 0)
-                       ieee->set_chan(ieee->dev, ieee->current_network.channel);
-
-               if (channel_map[ieee->current_network.channel] == 1)
-                       ieee80211_send_probe_requests(ieee);
-
-               msleep_interruptible_rtl(IEEE80211_SOFTMAC_SCAN_TIME);
-
-               do {
-                       if (watch_dog++ >= MAX_CHANNEL_NUMBER)
-                               goto out; /* scan completed */
-
-                       ieee->current_network.channel = (ieee->current_network.channel + 1)%MAX_CHANNEL_NUMBER;
-               } while (!channel_map[ieee->current_network.channel]);
-       }
-out:
-       ieee->actscanning = false;
-       up(&ieee->scan_sem);
-       if (IS_DOT11D_ENABLE(ieee))
-               DOT11D_ScanComplete(ieee);
-}
-
-static void ieee80211_softmac_scan_wq(struct work_struct *work)
-{
-       struct delayed_work *dwork = to_delayed_work(work);
-       struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, softmac_scan_wq);
-       static short watchdog;
-       u8 channel_map[MAX_CHANNEL_NUMBER+1];
-       memcpy(channel_map, GET_DOT11D_INFO(ieee)->channel_map, MAX_CHANNEL_NUMBER+1);
-       down(&ieee->scan_sem);
-
-       do {
-               ieee->current_network.channel =
-                       (ieee->current_network.channel + 1) % MAX_CHANNEL_NUMBER;
-               if (watchdog++ > MAX_CHANNEL_NUMBER)
-                               goto out; /* no good chans */
-       } while (!channel_map[ieee->current_network.channel]);
-
-       if (ieee->scanning == 0) {
-               printk("error out, scanning = 0\n");
-               goto out;
-       }
-       ieee->set_chan(ieee->dev, ieee->current_network.channel);
-       if (channel_map[ieee->current_network.channel] == 1)
-               ieee80211_send_probe_requests(ieee);
-
-       queue_delayed_work(ieee->wq, &ieee->softmac_scan_wq, IEEE80211_SOFTMAC_SCAN_TIME);
-       up(&ieee->scan_sem);
-       return;
-out:
-       ieee->actscanning = false;
-       watchdog = 0;
-       ieee->scanning = 0;
-       up(&ieee->scan_sem);
-
-       if (IS_DOT11D_ENABLE(ieee))
-               DOT11D_ScanComplete(ieee);
-       return;
-}
-
-static void ieee80211_beacons_start(struct ieee80211_device *ieee)
-{
-       unsigned long flags;
-
-       spin_lock_irqsave(&ieee->beacon_lock, flags);
-
-       ieee->beacon_txing = 1;
-       ieee80211_send_beacon(ieee);
-
-       spin_unlock_irqrestore(&ieee->beacon_lock, flags);
-}
-
-static void ieee80211_beacons_stop(struct ieee80211_device *ieee)
-{
-       unsigned long flags;
-
-       spin_lock_irqsave(&ieee->beacon_lock, flags);
-
-       ieee->beacon_txing = 0;
-       del_timer_sync(&ieee->beacon_timer);
-
-       spin_unlock_irqrestore(&ieee->beacon_lock, flags);
-}
-
-void ieee80211_stop_send_beacons(struct ieee80211_device *ieee)
-{
-       if (ieee->stop_send_beacons)
-               ieee->stop_send_beacons(ieee->dev);
-       if (ieee->softmac_features & IEEE_SOFTMAC_BEACONS)
-               ieee80211_beacons_stop(ieee);
-}
-
-void ieee80211_start_send_beacons(struct ieee80211_device *ieee)
-{
-       if (ieee->start_send_beacons)
-               ieee->start_send_beacons(ieee->dev);
-       if (ieee->softmac_features & IEEE_SOFTMAC_BEACONS)
-               ieee80211_beacons_start(ieee);
-}
-
-static void ieee80211_softmac_stop_scan(struct ieee80211_device *ieee)
-{
-       down(&ieee->scan_sem);
-
-       if (ieee->scanning == 1) {
-               ieee->scanning = 0;
-               cancel_delayed_work(&ieee->softmac_scan_wq);
-       }
-
-       up(&ieee->scan_sem);
-}
-
-void ieee80211_stop_scan(struct ieee80211_device *ieee)
-{
-       if (ieee->softmac_features & IEEE_SOFTMAC_SCAN)
-               ieee80211_softmac_stop_scan(ieee);
-       else
-               ieee->stop_scan(ieee->dev);
-}
-
-/* called with ieee->lock held */
-void ieee80211_rtl_start_scan(struct ieee80211_device *ieee)
-{
-       if (IS_DOT11D_ENABLE(ieee)) {
-               if (IS_COUNTRY_IE_VALID(ieee))
-                       RESET_CIE_WATCHDOG(ieee);
-       }
-
-       if (ieee->softmac_features & IEEE_SOFTMAC_SCAN) {
-               if (ieee->scanning == 0) {
-                       ieee->scanning = 1;
-#if 1
-                       queue_delayed_work(ieee->wq, &ieee->softmac_scan_wq, 0);
-#endif
-               }
-       }else
-               ieee->start_scan(ieee->dev);
-}
-
-/* called with wx_sem held */
-void ieee80211_start_scan_syncro(struct ieee80211_device *ieee)
-{
-       if (IS_DOT11D_ENABLE(ieee)) {
-               if (IS_COUNTRY_IE_VALID(ieee))
-                       RESET_CIE_WATCHDOG(ieee);
-       }
-       ieee->sync_scan_hurryup = 0;
-
-       if (ieee->softmac_features & IEEE_SOFTMAC_SCAN)
-               ieee80211_softmac_scan_syncro(ieee);
-       else
-               ieee->scan_syncro(ieee->dev);
-}
-
-inline struct sk_buff *
-ieee80211_authentication_req(struct ieee80211_network *beacon,
-                            struct ieee80211_device *ieee, int challengelen)
-{
-       struct sk_buff *skb;
-       struct ieee80211_authentication *auth;
-
-       skb = dev_alloc_skb(sizeof(struct ieee80211_authentication) + challengelen);
-
-       if (!skb)
-               return NULL;
-
-       auth = (struct ieee80211_authentication *)
-               skb_put(skb, sizeof(struct ieee80211_authentication));
-
-       auth->header.frame_ctl = IEEE80211_STYPE_AUTH;
-       if (challengelen)
-               auth->header.frame_ctl |= IEEE80211_FCTL_WEP;
-
-       auth->header.duration_id = 0x013a; /* FIXME */
-
-       memcpy(auth->header.addr1, beacon->bssid, ETH_ALEN);
-       memcpy(auth->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
-       memcpy(auth->header.addr3, beacon->bssid, ETH_ALEN);
-
-       auth->algorithm = ieee->open_wep ? WLAN_AUTH_OPEN : WLAN_AUTH_SHARED_KEY;
-
-       auth->transaction = cpu_to_le16(ieee->associate_seq);
-       ieee->associate_seq++;
-
-       auth->status = cpu_to_le16(WLAN_STATUS_SUCCESS);
-
-       return skb;
-}
-
-static struct sk_buff *ieee80211_probe_resp(struct ieee80211_device *ieee,
-                                           u8 *dest)
-{
-       u8 *tag;
-       int beacon_size;
-       struct ieee80211_probe_response *beacon_buf;
-       struct sk_buff *skb;
-       int encrypt;
-       int atim_len, erp_len;
-       struct ieee80211_crypt_data *crypt;
-
-       char *ssid = ieee->current_network.ssid;
-       int ssid_len = ieee->current_network.ssid_len;
-       int rate_len = ieee->current_network.rates_len+2;
-       int rate_ex_len = ieee->current_network.rates_ex_len;
-       int wpa_ie_len = ieee->wpa_ie_len;
-       if (rate_ex_len > 0)
-               rate_ex_len += 2;
-
-       if (ieee->current_network.capability & WLAN_CAPABILITY_IBSS)
-               atim_len = 4;
-       else
-               atim_len = 0;
-
-       if (ieee80211_is_54g(&ieee->current_network))
-               erp_len = 3;
-       else
-               erp_len = 0;
-
-       beacon_size = sizeof(struct ieee80211_probe_response)+
-               ssid_len
-               +3 /* channel */
-               +rate_len
-               +rate_ex_len
-               +atim_len
-               +wpa_ie_len
-               +erp_len;
-
-       skb = dev_alloc_skb(beacon_size);
-
-       if (!skb)
-               return NULL;
-
-       beacon_buf = (struct ieee80211_probe_response *) skb_put(skb, beacon_size);
-
-       memcpy(beacon_buf->header.addr1, dest, ETH_ALEN);
-       memcpy(beacon_buf->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
-       memcpy(beacon_buf->header.addr3, ieee->current_network.bssid, ETH_ALEN);
-
-       beacon_buf->header.duration_id = 0; /* FIXME */
-       beacon_buf->beacon_interval =
-               cpu_to_le16(ieee->current_network.beacon_interval);
-       beacon_buf->capability =
-               cpu_to_le16(ieee->current_network.capability & WLAN_CAPABILITY_IBSS);
-
-       if (ieee->short_slot && (ieee->current_network.capability & WLAN_CAPABILITY_SHORT_SLOT))
-               beacon_buf->capability |= cpu_to_le16(WLAN_CAPABILITY_SHORT_SLOT);
-
-       crypt = ieee->crypt[ieee->tx_keyidx];
-
-       encrypt = ieee->host_encrypt && crypt && crypt->ops &&
-               ((0 == strcmp(crypt->ops->name, "WEP")) || wpa_ie_len);
-
-       if (encrypt)
-               beacon_buf->capability |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY);
-
-
-       beacon_buf->header.frame_ctl = cpu_to_le16(IEEE80211_STYPE_PROBE_RESP);
-
-       beacon_buf->info_element.id = MFIE_TYPE_SSID;
-       beacon_buf->info_element.len = ssid_len;
-
-       tag = (u8 *) beacon_buf->info_element.data;
-
-       memcpy(tag, ssid, ssid_len);
-
-       tag += ssid_len;
-
-       *(tag++) = MFIE_TYPE_RATES;
-       *(tag++) = rate_len - 2;
-       memcpy(tag, ieee->current_network.rates, rate_len-2);
-       tag += rate_len - 2;
-
-       *(tag++) = MFIE_TYPE_DS_SET;
-       *(tag++) = 1;
-       *(tag++) = ieee->current_network.channel;
-
-       if (atim_len) {
-               *(tag++) = MFIE_TYPE_IBSS_SET;
-               *(tag++) = 2;
-               *((u16 *)(tag)) = cpu_to_le16(ieee->current_network.atim_window);
-               tag += 2;
-       }
-
-       if (erp_len) {
-               *(tag++) = MFIE_TYPE_ERP;
-               *(tag++) = 1;
-               *(tag++) = 0;
-       }
-
-       if (rate_ex_len) {
-               *(tag++) = MFIE_TYPE_RATES_EX;
-               *(tag++) = rate_ex_len-2;
-               memcpy(tag, ieee->current_network.rates_ex, rate_ex_len-2);
-               tag += rate_ex_len - 2;
-       }
-
-       if (wpa_ie_len) {
-               if (ieee->iw_mode == IW_MODE_ADHOC) {
-                       /* as Windows will set pairwise key same as the group
-                        * key which is not allowed in Linux, so set this for
-                        * IOT issue.
-                        */
-                       memcpy(&ieee->wpa_ie[14], &ieee->wpa_ie[8], 4);
-               }
-
-               memcpy(tag, ieee->wpa_ie, ieee->wpa_ie_len);
-       }
-       skb->dev = ieee->dev;
-       return skb;
-}
-
-static struct sk_buff *ieee80211_assoc_resp(struct ieee80211_device *ieee,
-                                           u8 *dest)
-{
-       struct sk_buff *skb;
-       u8 *tag;
-
-       struct ieee80211_crypt_data *crypt;
-       struct ieee80211_assoc_response_frame *assoc;
-       short encrypt;
-
-       unsigned int rate_len = ieee80211_MFIE_rate_len(ieee);
-       int len = sizeof(struct ieee80211_assoc_response_frame) + rate_len;
-
-       skb = dev_alloc_skb(len);
-
-       if (!skb)
-               return NULL;
-
-       assoc = (struct ieee80211_assoc_response_frame *)
-               skb_put(skb, sizeof(struct ieee80211_assoc_response_frame));
-
-       assoc->header.frame_control = cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP);
-       memcpy(assoc->header.addr1, dest, ETH_ALEN);
-       memcpy(assoc->header.addr3, ieee->dev->dev_addr, ETH_ALEN);
-       memcpy(assoc->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
-       assoc->capability = cpu_to_le16(ieee->iw_mode == IW_MODE_MASTER ?
-               WLAN_CAPABILITY_BSS : WLAN_CAPABILITY_IBSS);
-
-       if (ieee->short_slot)
-               assoc->capability |= cpu_to_le16(WLAN_CAPABILITY_SHORT_SLOT);
-
-       if (ieee->host_encrypt)
-               crypt = ieee->crypt[ieee->tx_keyidx];
-       else
-               crypt = NULL;
-
-       encrypt = (crypt && crypt->ops);
-
-       if (encrypt)
-               assoc->capability |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY);
-
-       assoc->status = 0;
-       assoc->aid = cpu_to_le16(ieee->assoc_id);
-       if (ieee->assoc_id == 0x2007)
-               ieee->assoc_id = 0;
-       else
-               ieee->assoc_id++;
-
-       tag = (u8 *) skb_put(skb, rate_len);
-
-       ieee80211_MFIE_Brate(ieee, &tag);
-       ieee80211_MFIE_Grate(ieee, &tag);
-
-       return skb;
-}
-
-static struct sk_buff *ieee80211_auth_resp(struct ieee80211_device *ieee,
-                                          int status, u8 *dest)
-{
-       struct sk_buff *skb;
-       struct ieee80211_authentication *auth;
-
-       skb = dev_alloc_skb(sizeof(struct ieee80211_authentication)+1);
-
-       if (!skb)
-               return NULL;
-
-       skb->len = sizeof(struct ieee80211_authentication);
-
-       auth = (struct ieee80211_authentication *)skb->data;
-
-       auth->status = cpu_to_le16(status);
-       auth->transaction = cpu_to_le16(2);
-       auth->algorithm = cpu_to_le16(WLAN_AUTH_OPEN);
-
-       memcpy(auth->header.addr3, ieee->dev->dev_addr, ETH_ALEN);
-       memcpy(auth->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
-       memcpy(auth->header.addr1, dest, ETH_ALEN);
-       auth->header.frame_ctl = cpu_to_le16(IEEE80211_STYPE_AUTH);
-       return skb;
-}
-
-static struct sk_buff *ieee80211_null_func(struct ieee80211_device *ieee, short pwr)
-{
-       struct sk_buff *skb;
-       struct ieee80211_hdr_3addr *hdr;
-
-       skb = dev_alloc_skb(sizeof(struct ieee80211_hdr_3addr));
-
-       if (!skb)
-               return NULL;
-
-       hdr = (struct ieee80211_hdr_3addr *)skb_put(skb, sizeof(struct ieee80211_hdr_3addr));
-
-       memcpy(hdr->addr1, ieee->current_network.bssid, ETH_ALEN);
-       memcpy(hdr->addr2, ieee->dev->dev_addr, ETH_ALEN);
-       memcpy(hdr->addr3, ieee->current_network.bssid, ETH_ALEN);
-
-       hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_DATA |
-               IEEE80211_STYPE_NULLFUNC | IEEE80211_FCTL_TODS |
-               (pwr ? IEEE80211_FCTL_PM:0));
-
-       return skb;
-}
-
-static void ieee80211_resp_to_assoc_rq(struct ieee80211_device *ieee, u8 *dest)
-{
-       struct sk_buff *buf = ieee80211_assoc_resp(ieee, dest);
-
-       if (buf) {
-               softmac_mgmt_xmit(buf, ieee);
-               dev_kfree_skb_any(buf);
-       }
-}
-
-static void ieee80211_resp_to_auth(struct ieee80211_device *ieee, int s, u8 *dest)
-{
-       struct sk_buff *buf = ieee80211_auth_resp(ieee, s, dest);
-
-       if (buf) {
-               softmac_mgmt_xmit(buf, ieee);
-               dev_kfree_skb_any(buf);
-       }
-}
-
-static void ieee80211_resp_to_probe(struct ieee80211_device *ieee, u8 *dest)
-{
-       struct sk_buff *buf = ieee80211_probe_resp(ieee, dest);
-
-       if (buf) {
-               softmac_mgmt_xmit(buf, ieee);
-               dev_kfree_skb_any(buf);
-       }
-}
-
-inline struct sk_buff *
-ieee80211_association_req(struct ieee80211_network *beacon,
-                         struct ieee80211_device *ieee)
-{
-       struct sk_buff *skb;
-
-       struct ieee80211_assoc_request_frame *hdr;
-       u8 *tag;
-       unsigned int wpa_len = beacon->wpa_ie_len;
-#if 1
-       /* for testing purpose */
-       unsigned int rsn_len = beacon->rsn_ie_len;
-#endif
-       unsigned int rate_len = ieee80211_MFIE_rate_len(ieee);
-       unsigned int wmm_info_len = beacon->QoS_Enable?9:0;
-       unsigned int turbo_info_len = beacon->Turbo_Enable?9:0;
-
-       u8  encry_proto = ieee->wpax_type_notify & 0xff;
-
-       int len = 0;
-
-       /* [0] Notify type of encryption: WPA/WPA2
-        * [1] pair wise type
-        * [2] authen type
-        */
-       if (ieee->wpax_type_set) {
-               if (IEEE_PROTO_WPA == encry_proto) {
-                       rsn_len = 0;
-               } else if (IEEE_PROTO_RSN == encry_proto) {
-                       wpa_len = 0;
-               }
-       }
-       len = sizeof(struct ieee80211_assoc_request_frame)+
-               + beacon->ssid_len /* essid tagged val */
-               + rate_len /* rates tagged val */
-               + wpa_len
-               + rsn_len
-               + wmm_info_len
-               + turbo_info_len;
-
-       skb = dev_alloc_skb(len);
-
-       if (!skb)
-               return NULL;
-
-       hdr = (struct ieee80211_assoc_request_frame *)
-               skb_put(skb, sizeof(struct ieee80211_assoc_request_frame));
-
-       hdr->header.frame_control = IEEE80211_STYPE_ASSOC_REQ;
-       hdr->header.duration_id = 37; /* FIXME */
-       memcpy(hdr->header.addr1, beacon->bssid, ETH_ALEN);
-       memcpy(hdr->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
-       memcpy(hdr->header.addr3, beacon->bssid, ETH_ALEN);
-       memcpy(ieee->ap_mac_addr, beacon->bssid, ETH_ALEN); /* for HW security */
-
-       hdr->capability = cpu_to_le16(WLAN_CAPABILITY_BSS);
-       if (beacon->capability & WLAN_CAPABILITY_PRIVACY)
-               hdr->capability |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY);
-       if (beacon->capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
-               hdr->capability |= cpu_to_le16(WLAN_CAPABILITY_SHORT_PREAMBLE);
-
-       if (ieee->short_slot)
-               hdr->capability |= cpu_to_le16(WLAN_CAPABILITY_SHORT_SLOT);
-
-       hdr->listen_interval = 0xa; /* FIXME */
-
-       hdr->info_element.id = MFIE_TYPE_SSID;
-
-       hdr->info_element.len = beacon->ssid_len;
-       tag = skb_put(skb, beacon->ssid_len);
-       memcpy(tag, beacon->ssid, beacon->ssid_len);
-
-       tag = skb_put(skb, rate_len);
-
-       ieee80211_MFIE_Brate(ieee, &tag);
-       ieee80211_MFIE_Grate(ieee, &tag);
-
-       /* add rsn==0 condition for ap's mix security mode(wpa+wpa2)
-        * choose AES encryption as default algorithm while using mixed mode.
-        */
-
-       tag = skb_put(skb, ieee->wpa_ie_len);
-       memcpy(tag, ieee->wpa_ie, ieee->wpa_ie_len);
-
-       tag = skb_put(skb, wmm_info_len);
-       if (wmm_info_len)
-         ieee80211_WMM_Info(ieee, &tag);
-
-       tag = skb_put(skb, turbo_info_len);
-       if (turbo_info_len)
-               ieee80211_TURBO_Info(ieee, &tag);
-
-       return skb;
-}
-
-void ieee80211_associate_abort(struct ieee80211_device *ieee)
-{
-       unsigned long flags;
-       spin_lock_irqsave(&ieee->lock, flags);
-
-       ieee->associate_seq++;
-
-       /* don't scan, and avoid to have the RX path possibly
-        * try again to associate. Even do not react to AUTH or
-        * ASSOC response. Just wait for the retry wq to be scheduled.
-        * Here we will check if there are good nets to associate
-        * with, so we retry or just get back to NO_LINK and scanning
-        */
-       if (ieee->state == IEEE80211_ASSOCIATING_AUTHENTICATING) {
-               IEEE80211_DEBUG_MGMT("Authentication failed\n");
-               ieee->softmac_stats.no_auth_rs++;
-       } else {
-               IEEE80211_DEBUG_MGMT("Association failed\n");
-               ieee->softmac_stats.no_ass_rs++;
-       }
-
-       ieee->state = IEEE80211_ASSOCIATING_RETRY;
-
-       queue_delayed_work(ieee->wq, &ieee->associate_retry_wq, IEEE80211_SOFTMAC_ASSOC_RETRY_TIME);
-
-       spin_unlock_irqrestore(&ieee->lock, flags);
-}
-
-static void ieee80211_associate_abort_cb(unsigned long dev)
-{
-       ieee80211_associate_abort((struct ieee80211_device *) dev);
-}
-
-static void ieee80211_associate_step1(struct ieee80211_device *ieee)
-{
-       struct ieee80211_network *beacon = &ieee->current_network;
-       struct sk_buff *skb;
-
-       IEEE80211_DEBUG_MGMT("Stopping scan\n");
-       ieee->softmac_stats.tx_auth_rq++;
-       skb = ieee80211_authentication_req(beacon, ieee, 0);
-       if (!skb) {
-               ieee80211_associate_abort(ieee);
-       } else {
-               ieee->state = IEEE80211_ASSOCIATING_AUTHENTICATING;
-               IEEE80211_DEBUG_MGMT("Sending authentication request\n");
-               softmac_mgmt_xmit(skb, ieee);
-               /* BUGON when you try to add_timer twice, using mod_timer may
-                * be better.
-                */
-               if (!timer_pending(&ieee->associate_timer)) {
-                       ieee->associate_timer.expires = jiffies + (HZ / 2);
-                       add_timer(&ieee->associate_timer);
-               }
-               /* If call dev_kfree_skb_any,a warning will ocur....
-                * KERNEL: assertion (!atomic_read(&skb->users)) failed at
-                * net/core/dev.c (1708)
-                */
-       }
-}
-
-static void ieee80211_rtl_auth_challenge(struct ieee80211_device *ieee, u8 *challenge,
-                                 int chlen)
-{
-       u8 *c;
-       struct sk_buff *skb;
-       struct ieee80211_network *beacon = &ieee->current_network;
-       del_timer_sync(&ieee->associate_timer);
-       ieee->associate_seq++;
-       ieee->softmac_stats.tx_auth_rq++;
-
-       skb = ieee80211_authentication_req(beacon, ieee, chlen+2);
-       if (!skb)
-               ieee80211_associate_abort(ieee);
-       else {
-               c = skb_put(skb, chlen+2);
-               *(c++) = MFIE_TYPE_CHALLENGE;
-               *(c++) = chlen;
-               memcpy(c, challenge, chlen);
-
-               IEEE80211_DEBUG_MGMT("Sending authentication challenge response\n");
-
-               ieee80211_encrypt_fragment(ieee, skb, sizeof(struct ieee80211_hdr_3addr));
-
-               softmac_mgmt_xmit(skb, ieee);
-               if (!timer_pending(&ieee->associate_timer)) {
-               ieee->associate_timer.expires = jiffies + (HZ / 2);
-               add_timer(&ieee->associate_timer);
-               }
-               dev_kfree_skb_any(skb);
-       }
-       kfree(challenge);
-}
-
-static void ieee80211_associate_step2(struct ieee80211_device *ieee)
-{
-       struct sk_buff *skb;
-       struct ieee80211_network *beacon = &ieee->current_network;
-
-       del_timer_sync(&ieee->associate_timer);
-
-       IEEE80211_DEBUG_MGMT("Sending association request\n");
-       ieee->softmac_stats.tx_ass_rq++;
-       skb = ieee80211_association_req(beacon, ieee);
-       if (!skb)
-               ieee80211_associate_abort(ieee);
-       else {
-               softmac_mgmt_xmit(skb, ieee);
-               if (!timer_pending(&ieee->associate_timer)) {
-               ieee->associate_timer.expires = jiffies + (HZ / 2);
-               add_timer(&ieee->associate_timer);
-               }
-       }
-}
-
-static void ieee80211_associate_complete_wq(struct work_struct *work)
-{
-       struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, associate_complete_wq);
-
-       printk(KERN_INFO "Associated successfully\n");
-       if (ieee80211_is_54g(&ieee->current_network) &&
-               (ieee->modulation & IEEE80211_OFDM_MODULATION)) {
-               ieee->rate = 540;
-               printk(KERN_INFO"Using G rates\n");
-       } else {
-               ieee->rate = 110;
-               printk(KERN_INFO"Using B rates\n");
-       }
-       ieee->link_change(ieee->dev);
-       notify_wx_assoc_event(ieee);
-       if (ieee->data_hard_resume)
-               ieee->data_hard_resume(ieee->dev);
-       netif_carrier_on(ieee->dev);
-}
-
-static void ieee80211_associate_complete(struct ieee80211_device *ieee)
-{
-       del_timer_sync(&ieee->associate_timer);
-
-       ieee->state = IEEE80211_LINKED;
-       IEEE80211_DEBUG_MGMT("Successfully associated\n");
-
-       queue_work(ieee->wq, &ieee->associate_complete_wq);
-}
-
-static void ieee80211_associate_procedure_wq(struct work_struct *work)
-{
-       struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, associate_procedure_wq);
-
-       ieee->sync_scan_hurryup = 1;
-       down(&ieee->wx_sem);
-
-       if (ieee->data_hard_stop)
-               ieee->data_hard_stop(ieee->dev);
-
-       ieee80211_stop_scan(ieee);
-       ieee->set_chan(ieee->dev, ieee->current_network.channel);
-
-       ieee->associate_seq = 1;
-       ieee80211_associate_step1(ieee);
-
-       up(&ieee->wx_sem);
-}
-
-inline void ieee80211_softmac_new_net(struct ieee80211_device *ieee,
-                                     struct ieee80211_network *net)
-{
-       u8 tmp_ssid[IW_ESSID_MAX_SIZE+1];
-       int tmp_ssid_len = 0;
-
-       short apset, ssidset, ssidbroad, apmatch, ssidmatch;
-
-       /* we are interested in new new only if we are not associated
-        * and we are not associating / authenticating
-        */
-       if (ieee->state != IEEE80211_NOLINK)
-               return;
-
-       if ((ieee->iw_mode == IW_MODE_INFRA) && !(net->capability & WLAN_CAPABILITY_BSS))
-               return;
-
-       if ((ieee->iw_mode == IW_MODE_ADHOC) && !(net->capability & WLAN_CAPABILITY_IBSS))
-               return;
-
-       if (ieee->iw_mode == IW_MODE_INFRA || ieee->iw_mode == IW_MODE_ADHOC) {
-               /* if the user specified the AP MAC, we need also the essid
-                * This could be obtained by beacons or, if the network does not
-                * broadcast it, it can be put manually.
-                */
-               apset = ieee->wap_set;
-               ssidset = ieee->ssid_set;
-               ssidbroad =  !(net->ssid_len == 0 || net->ssid[0] == '\0');
-               apmatch = (memcmp(ieee->current_network.bssid, net->bssid, ETH_ALEN) == 0);
-
-               if (ieee->current_network.ssid_len != net->ssid_len)
-                       ssidmatch = 0;
-               else
-                       ssidmatch = (0 == strncmp(ieee->current_network.ssid, net->ssid, net->ssid_len));
-
-               /* if the user set the AP check if match.
-                * if the network does not broadcast essid we check the user
-                * supplied ANY essid
-                * if the network does broadcast and the user does not set essid
-                * it is OK
-                * if the network does broadcast and the user did set essid
-                * chech if essid match
-                * (apset && apmatch && ((ssidset && ssidbroad && ssidmatch) ||
-                *  (ssidbroad && !ssidset) || (!ssidbroad && ssidset))) ||
-                * if the ap is not set, check that the user set the bssid and
-                * the network does broadcast and that those two bssid matches
-                * (!apset && ssidset && ssidbroad && ssidmatch)
-                */
-               if ((apset && apmatch && ((ssidset && ssidbroad && ssidmatch) ||
-                    (ssidbroad && !ssidset) || (!ssidbroad && ssidset))) ||
-                   (!apset && ssidset && ssidbroad && ssidmatch)) {
-                       /* if the essid is hidden replace it with the
-                        * essid provided by the user.
-                        */
-                       if (!ssidbroad) {
-                               strncpy(tmp_ssid, ieee->current_network.ssid, IW_ESSID_MAX_SIZE);
-                               tmp_ssid_len = ieee->current_network.ssid_len;
-                       }
-                       memcpy(&ieee->current_network, net, sizeof(struct ieee80211_network));
-
-                       if (!ssidbroad) {
-                               strncpy(ieee->current_network.ssid, tmp_ssid, IW_ESSID_MAX_SIZE);
-                               ieee->current_network.ssid_len = tmp_ssid_len;
-                       }
-                       printk(KERN_INFO"Linking with %s: channel is %d\n", ieee->current_network.ssid, ieee->current_network.channel);
-
-                       if (ieee->iw_mode == IW_MODE_INFRA) {
-                               ieee->state = IEEE80211_ASSOCIATING;
-                               ieee->beinretry = false;
-                               queue_work(ieee->wq, &ieee->associate_procedure_wq);
-                       } else {
-                               if (ieee80211_is_54g(&ieee->current_network) &&
-                                               (ieee->modulation & IEEE80211_OFDM_MODULATION)) {
-                                       ieee->rate = 540;
-                                       printk(KERN_INFO"Using G rates\n");
-                               } else {
-                                       ieee->rate = 110;
-                                       printk(KERN_INFO"Using B rates\n");
-                               }
-                               ieee->state = IEEE80211_LINKED;
-                               ieee->beinretry = false;
-                       }
-               }
-       }
-}
-
-void ieee80211_softmac_check_all_nets(struct ieee80211_device *ieee)
-{
-       unsigned long flags;
-       struct ieee80211_network *target;
-
-       spin_lock_irqsave(&ieee->lock, flags);
-       list_for_each_entry(target, &ieee->network_list, list) {
-               /* if the state become different that NOLINK means
-                * we had found what we are searching for
-                */
-               if (ieee->state != IEEE80211_NOLINK)
-                       break;
-
-               if (ieee->scan_age == 0 || time_after(target->last_scanned + ieee->scan_age, jiffies))
-                       ieee80211_softmac_new_net(ieee, target);
-       }
-       spin_unlock_irqrestore(&ieee->lock, flags);
-}
-
-static inline u16 auth_parse(struct sk_buff *skb, u8 **challenge, int *chlen)
-{
-       struct ieee80211_authentication *a;
-       u8 *t;
-       if (skb->len < (sizeof(struct ieee80211_authentication) - sizeof(struct ieee80211_info_element))) {
-               IEEE80211_DEBUG_MGMT("invalid len in auth resp: %d\n", skb->len);
-               return 0xcafe;
-       }
-       *challenge = NULL;
-       a = (struct ieee80211_authentication *) skb->data;
-       if (skb->len > (sizeof(struct ieee80211_authentication) + 3)) {
-               t = skb->data + sizeof(struct ieee80211_authentication);
-
-               if (*(t++) == MFIE_TYPE_CHALLENGE) {
-                       *chlen = *(t++);
-                       *challenge = kmemdup(t, *chlen, GFP_ATOMIC);
-                       if (!*challenge)
-                               return -ENOMEM;
-               }
-       }
-       return cpu_to_le16(a->status);
-}
-
-static int auth_rq_parse(struct sk_buff *skb, u8 *dest)
-{
-       struct ieee80211_authentication *a;
-
-       if (skb->len < (sizeof(struct ieee80211_authentication) - sizeof(struct ieee80211_info_element))) {
-               IEEE80211_DEBUG_MGMT("invalid len in auth request: %d\n", skb->len);
-               return -1;
-       }
-       a = (struct ieee80211_authentication *) skb->data;
-
-       memcpy(dest, a->header.addr2, ETH_ALEN);
-
-       if (le16_to_cpu(a->algorithm) != WLAN_AUTH_OPEN)
-               return  WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG;
-
-       return WLAN_STATUS_SUCCESS;
-}
-
-static short probe_rq_parse(struct ieee80211_device *ieee, struct sk_buff *skb,
-                           u8 *src)
-{
-       u8 *tag;
-       u8 *skbend;
-       u8 *ssid = NULL;
-       u8 ssidlen = 0;
-
-       struct ieee80211_hdr_3addr   *header =
-               (struct ieee80211_hdr_3addr   *) skb->data;
-
-       if (skb->len < sizeof(struct ieee80211_hdr_3addr))
-               return -1; /* corrupted */
-
-       memcpy(src, header->addr2, ETH_ALEN);
-
-       skbend = (u8 *)skb->data + skb->len;
-
-       tag = skb->data + sizeof(struct ieee80211_hdr_3addr);
-
-       while (tag+1 < skbend) {
-               if (*tag == 0) {
-                       ssid = tag+2;
-                       ssidlen = *(tag+1);
-                       break;
-               }
-               tag++; /* point to the len field */
-               tag = tag + *(tag); /* point to the last data byte of the tag */
-               tag++; /* point to the next tag */
-       }
-
-       if (ssidlen == 0)
-               return 1;
-
-       if (!ssid)
-                return 1; /* ssid not found in tagged param */
-
-       return (!strncmp(ssid, ieee->current_network.ssid, ssidlen));
-
-}
-
-static int assoc_rq_parse(struct sk_buff *skb, u8 *dest)
-{
-       struct ieee80211_assoc_request_frame *a;
-
-       if (skb->len < (sizeof(struct ieee80211_assoc_request_frame) -
-               sizeof(struct ieee80211_info_element))) {
-
-               IEEE80211_DEBUG_MGMT("invalid len in auth request:%d\n", skb->len);
-               return -1;
-       }
-
-       a = (struct ieee80211_assoc_request_frame *) skb->data;
-
-       memcpy(dest, a->header.addr2, ETH_ALEN);
-
-       return 0;
-}
-
-static inline u16 assoc_parse(struct sk_buff *skb, int *aid)
-{
-       struct ieee80211_assoc_response_frame *a;
-       if (skb->len < sizeof(struct ieee80211_assoc_response_frame)) {
-               IEEE80211_DEBUG_MGMT("invalid len in auth resp: %d\n", skb->len);
-               return 0xcafe;
-       }
-
-       a = (struct ieee80211_assoc_response_frame *) skb->data;
-       *aid = le16_to_cpu(a->aid) & 0x3fff;
-       return le16_to_cpu(a->status);
-}
-
-static inline void ieee80211_rx_probe_rq(struct ieee80211_device *ieee,
-                                        struct sk_buff *skb)
-{
-       u8 dest[ETH_ALEN];
-
-       ieee->softmac_stats.rx_probe_rq++;
-       if (probe_rq_parse(ieee, skb, dest)) {
-               ieee->softmac_stats.tx_probe_rs++;
-               ieee80211_resp_to_probe(ieee, dest);
-       }
-}
-
-inline void ieee80211_rx_auth_rq(struct ieee80211_device *ieee,
-                                struct sk_buff *skb)
-{
-       u8 dest[ETH_ALEN];
-       int status;
-       ieee->softmac_stats.rx_auth_rq++;
-
-       status = auth_rq_parse(skb, dest);
-       if (status != -1)
-               ieee80211_resp_to_auth(ieee, status, dest);
-}
-
-inline void
-ieee80211_rx_assoc_rq(struct ieee80211_device *ieee, struct sk_buff *skb)
-{
-
-       u8 dest[ETH_ALEN];
-
-       ieee->softmac_stats.rx_ass_rq++;
-       if (assoc_rq_parse(skb, dest) != -1)
-               ieee80211_resp_to_assoc_rq(ieee, dest);
-
-
-       printk(KERN_INFO"New client associated: %pM\n", dest);
-}
-
-void ieee80211_sta_ps_send_null_frame(struct ieee80211_device *ieee, short pwr)
-{
-       struct sk_buff *buf = ieee80211_null_func(ieee, pwr);
-
-       if (buf)
-               softmac_ps_mgmt_xmit(buf, ieee);
-}
-
-static short ieee80211_sta_ps_sleep(struct ieee80211_device *ieee, u32 *time_h,
-                            u32 *time_l)
-{
-       int timeout = 0;
-
-       u8 dtim;
-       dtim = ieee->current_network.dtim_data;
-
-       if (!(dtim & IEEE80211_DTIM_VALID))
-               return 0;
-       else
-               timeout = ieee->current_network.beacon_interval;
-
-       ieee->current_network.dtim_data = IEEE80211_DTIM_INVALID;
-
-       if (dtim & ((IEEE80211_DTIM_UCAST | IEEE80211_DTIM_MBCAST) & ieee->ps))
-               return 2;
-
-       if (!time_after(jiffies, ieee->dev->trans_start + MSECS(timeout)))
-               return 0;
-
-       if (!time_after(jiffies, ieee->last_rx_ps_time + MSECS(timeout)))
-               return 0;
-
-       if ((ieee->softmac_features & IEEE_SOFTMAC_SINGLE_QUEUE) &&
-               (ieee->mgmt_queue_tail != ieee->mgmt_queue_head))
-               return 0;
-
-       if (time_l) {
-               *time_l = ieee->current_network.last_dtim_sta_time[0]
-                       + MSECS((ieee->current_network.beacon_interval));
-       }
-
-       if (time_h) {
-               *time_h = ieee->current_network.last_dtim_sta_time[1];
-               if (time_l && *time_l < ieee->current_network.last_dtim_sta_time[0])
-                       *time_h += 1;
-       }
-
-       return 1;
-}
-
-static inline void ieee80211_sta_ps(struct ieee80211_device *ieee)
-{
-
-       u32 th, tl;
-       short sleep;
-
-       unsigned long flags, flags2;
-
-       spin_lock_irqsave(&ieee->lock, flags);
-
-       if ((ieee->ps == IEEE80211_PS_DISABLED ||
-               ieee->iw_mode != IW_MODE_INFRA ||
-               ieee->state != IEEE80211_LINKED)) {
-
-               /* #warning CHECK_LOCK_HERE */
-               spin_lock_irqsave(&ieee->mgmt_tx_lock, flags2);
-
-               ieee80211_sta_wakeup(ieee, 1);
-
-               spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags2);
-       }
-
-       sleep = ieee80211_sta_ps_sleep(ieee, &th, &tl);
-       /* 2 wake, 1 sleep, 0 do nothing */
-       if (sleep == 0)
-               goto out;
-
-       if (sleep == 1) {
-               if (ieee->sta_sleep == 1)
-                       ieee->enter_sleep_state(ieee->dev, th, tl);
-
-               else if (ieee->sta_sleep == 0) {
-                       spin_lock_irqsave(&ieee->mgmt_tx_lock, flags2);
-                       if (ieee->ps_is_queue_empty(ieee->dev)) {
-                               ieee->sta_sleep = 2;
-
-                               ieee->ps_request_tx_ack(ieee->dev);
-
-                               ieee80211_sta_ps_send_null_frame(ieee, 1);
-
-                               ieee->ps_th = th;
-                               ieee->ps_tl = tl;
-                       }
-                       spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags2);
-               }
-       } else if (sleep == 2) {
-               /* #warning CHECK_LOCK_HERE */
-               spin_lock_irqsave(&ieee->mgmt_tx_lock, flags2);
-
-               ieee80211_sta_wakeup(ieee, 1);
-
-               spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags2);
-       }
-out:
-       spin_unlock_irqrestore(&ieee->lock, flags);
-}
-
-void ieee80211_sta_wakeup(struct ieee80211_device *ieee, short nl)
-{
-       if (ieee->sta_sleep == 0) {
-               if (nl) {
-                       ieee->ps_request_tx_ack(ieee->dev);
-                       ieee80211_sta_ps_send_null_frame(ieee, 0);
-               }
-               return;
-       }
-
-       if (ieee->sta_sleep == 1)
-               ieee->sta_wake_up(ieee->dev);
-
-       ieee->sta_sleep = 0;
-
-       if (nl) {
-               ieee->ps_request_tx_ack(ieee->dev);
-               ieee80211_sta_ps_send_null_frame(ieee, 0);
-       }
-}
-
-void ieee80211_ps_tx_ack(struct ieee80211_device *ieee, short success)
-{
-       unsigned long flags, flags2;
-
-       spin_lock_irqsave(&ieee->lock, flags);
-       if (ieee->sta_sleep == 2) {
-               /* Null frame with PS bit set */
-               if (success) {
-                       ieee->sta_sleep = 1;
-                       ieee->enter_sleep_state(ieee->dev, ieee->ps_th, ieee->ps_tl);
-               }
-               /* if the card report not success we can't be sure the AP
-                * has not RXed so we can't assume the AP believe us awake
-                */
-       } else {
-               if ((ieee->sta_sleep == 0) && !success) {
-                       spin_lock_irqsave(&ieee->mgmt_tx_lock, flags2);
-                       ieee80211_sta_ps_send_null_frame(ieee, 0);
-                       spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags2);
-               }
-       }
-       spin_unlock_irqrestore(&ieee->lock, flags);
-}
-
-inline int ieee80211_rx_frame_softmac(struct ieee80211_device *ieee,
-                                     struct sk_buff *skb,
-                                     struct ieee80211_rx_stats *rx_stats,
-                                     u16 type, u16 stype)
-{
-       struct ieee80211_hdr_3addr *header = (struct ieee80211_hdr_3addr *) skb->data;
-       u16 errcode;
-       u8 *challenge = NULL;
-       int chlen = 0;
-       int aid = 0;
-       struct ieee80211_assoc_response_frame *assoc_resp;
-       struct ieee80211_info_element *info_element;
-
-       if (!ieee->proto_started)
-               return 0;
-
-       if (ieee->sta_sleep || (ieee->ps != IEEE80211_PS_DISABLED &&
-               ieee->iw_mode == IW_MODE_INFRA &&
-               ieee->state == IEEE80211_LINKED))
-
-               tasklet_schedule(&ieee->ps_task);
-
-       if (WLAN_FC_GET_STYPE(header->frame_control) != IEEE80211_STYPE_PROBE_RESP &&
-               WLAN_FC_GET_STYPE(header->frame_control) != IEEE80211_STYPE_BEACON)
-               ieee->last_rx_ps_time = jiffies;
-
-       switch (WLAN_FC_GET_STYPE(header->frame_control)) {
-               case IEEE80211_STYPE_ASSOC_RESP:
-               case IEEE80211_STYPE_REASSOC_RESP:
-                       IEEE80211_DEBUG_MGMT("received [RE]ASSOCIATION RESPONSE (%d)\n",
-                                       WLAN_FC_GET_STYPE(header->frame_ctl));
-                       if ((ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) &&
-                               ieee->state == IEEE80211_ASSOCIATING_AUTHENTICATED &&
-                               ieee->iw_mode == IW_MODE_INFRA) {
-                               errcode = assoc_parse(skb, &aid);
-                               if (0 == errcode) {
-                                       u16 left;
-
-                                       ieee->state = IEEE80211_LINKED;
-                                       ieee->assoc_id = aid;
-                                       ieee->softmac_stats.rx_ass_ok++;
-                                       /* card type is 8187 */
-                                       if (1 == rx_stats->nic_type)
-                                               goto associate_complete;
-
-                                       assoc_resp = (struct ieee80211_assoc_response_frame *)skb->data;
-                                       info_element = &assoc_resp->info_element;
-                                       left = skb->len - ((void *)info_element - (void *)assoc_resp);
-
-                                       while (left >= sizeof(struct ieee80211_info_element_hdr)) {
-                                               if (sizeof(struct ieee80211_info_element_hdr) + info_element->len > left) {
-                                                       printk(KERN_WARNING "[re]associate response error!");
-                                                       return 1;
-                                               }
-                                               switch (info_element->id) {
-                                                 case MFIE_TYPE_GENERIC:
-                                                       IEEE80211_DEBUG_SCAN("MFIE_TYPE_GENERIC: %d bytes\n", info_element->len);
-                                                       if (info_element->len >= 8  &&
-                                                           info_element->data[0] == 0x00 &&
-                                                           info_element->data[1] == 0x50 &&
-                                                           info_element->data[2] == 0xf2 &&
-                                                           info_element->data[3] == 0x02 &&
-                                                           info_element->data[4] == 0x01) {
-                                                               /* Not care about version at present.
-                                                                * WMM Parameter Element.
-                                                                */
-                                                               memcpy(ieee->current_network.wmm_param, (u8 *)(info_element->data\
-                                                                       + 8), (info_element->len - 8));
-
-                                                               if (((ieee->current_network.wmm_info^info_element->data[6])& \
-                                                                                   0x0f) || (!ieee->init_wmmparam_flag)) {
-                                                                       /* refresh parameter element for current network
-                                                                        * update the register parameter for hardware.
-                                                                        */
-                                                                       ieee->init_wmmparam_flag = 1;
-                                                                       queue_work(ieee->wq, &ieee->wmm_param_update_wq);
-                                                               }
-                                                               /* update info_element for current network */
-                                                               ieee->current_network.wmm_info  = info_element->data[6];
-                                                       }
-                                                       break;
-                                                 default:
-                                                       /* nothing to do at present!!! */
-                                                       break;
-                                               }
-
-                                               left -= sizeof(struct ieee80211_info_element_hdr) +
-                                                       info_element->len;
-                                               info_element = (struct ieee80211_info_element *)
-                                                       &info_element->data[info_element->len];
-                                       }
-                                       /* legacy AP, reset the AC_xx_param register */
-                                       if (!ieee->init_wmmparam_flag) {
-                                               queue_work(ieee->wq, &ieee->wmm_param_update_wq);
-                                               ieee->init_wmmparam_flag = 1; /* indicate AC_xx_param upated since last associate */
-                                       }
-associate_complete:
-                                       ieee80211_associate_complete(ieee);
-                               } else {
-                                       ieee->softmac_stats.rx_ass_err++;
-                                       IEEE80211_DEBUG_MGMT(
-                                               "Association response status code 0x%x\n",
-                                               errcode);
-                                       ieee80211_associate_abort(ieee);
-                               }
-                       }
-                       break;
-               case IEEE80211_STYPE_ASSOC_REQ:
-               case IEEE80211_STYPE_REASSOC_REQ:
-                       if ((ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) &&
-                               ieee->iw_mode == IW_MODE_MASTER)
-
-                               ieee80211_rx_assoc_rq(ieee, skb);
-                       break;
-               case IEEE80211_STYPE_AUTH:
-                       if (ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) {
-                               if (ieee->state == IEEE80211_ASSOCIATING_AUTHENTICATING &&
-                               ieee->iw_mode == IW_MODE_INFRA){
-                                               IEEE80211_DEBUG_MGMT("Received authentication response");
-
-                                               errcode = auth_parse(skb, &challenge, &chlen);
-                                               if (0 == errcode) {
-                                                       if (ieee->open_wep || !challenge) {
-                                                               ieee->state = IEEE80211_ASSOCIATING_AUTHENTICATED;
-                                                               ieee->softmac_stats.rx_auth_rs_ok++;
-
-                                                               ieee80211_associate_step2(ieee);
-                                                       } else {
-                                                               ieee80211_rtl_auth_challenge(ieee, challenge, chlen);
-                                                       }
-                                               } else {
-                                                       ieee->softmac_stats.rx_auth_rs_err++;
-                                                       IEEE80211_DEBUG_MGMT("Authentication response status code 0x%x", errcode);
-                                                       ieee80211_associate_abort(ieee);
-                                               }
-
-                                       } else if (ieee->iw_mode == IW_MODE_MASTER) {
-                                               ieee80211_rx_auth_rq(ieee, skb);
-                                       }
-                               }
-                       break;
-               case IEEE80211_STYPE_PROBE_REQ:
-                       if ((ieee->softmac_features & IEEE_SOFTMAC_PROBERS) &&
-                               ((ieee->iw_mode == IW_MODE_ADHOC ||
-                               ieee->iw_mode == IW_MODE_MASTER) &&
-                               ieee->state == IEEE80211_LINKED))
-
-                               ieee80211_rx_probe_rq(ieee, skb);
-                       break;
-               case IEEE80211_STYPE_DISASSOC:
-               case IEEE80211_STYPE_DEAUTH:
-                       /* FIXME for now repeat all the association procedure
-                        * both for disassociation and deauthentication
-                        */
-                       if ((ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) &&
-                               (ieee->state == IEEE80211_LINKED) &&
-                               (ieee->iw_mode == IW_MODE_INFRA) &&
-                               (!memcmp(header->addr2, ieee->current_network.bssid, ETH_ALEN))) {
-                               ieee->state = IEEE80211_ASSOCIATING;
-                               ieee->softmac_stats.reassoc++;
-
-                               queue_work(ieee->wq, &ieee->associate_procedure_wq);
-                       }
-                       break;
-               default:
-                       return -1;
-                       break;
-       }
-       return 0;
-}
-
-/* following are for a simpler TX queue management.
- * Instead of using netif_[stop/wake]_queue the driver
- * will uses these two function (plus a reset one), that
- * will internally uses the kernel netif_* and takes
- * care of the ieee802.11 fragmentation.
- * So the driver receives a fragment per time and might
- * call the stop function when it want without take care
- * to have enough room to TX an entire packet.
- * This might be useful if each fragment need it's own
- * descriptor, thus just keep a total free memory > than
- * the max fragmentation threshold is not enough.. If the
- * ieee802.11 stack passed a TXB struct then you needed
- * to keep N free descriptors where
- * N = MAX_PACKET_SIZE / MIN_FRAG_TRESHOLD
- * In this way you need just one and the 802.11 stack
- * will take care of buffering fragments and pass them to
- * to the driver later, when it wakes the queue.
- */
-
-void ieee80211_softmac_xmit(struct ieee80211_txb *txb,
-                           struct ieee80211_device *ieee)
-{
-       unsigned long flags;
-       int  i;
-
-       spin_lock_irqsave(&ieee->lock, flags);
-
-       /* called with 2nd parm 0, no tx mgmt lock required */
-       ieee80211_sta_wakeup(ieee, 0);
-
-       for (i = 0; i < txb->nr_frags; i++) {
-               if (ieee->queue_stop) {
-                       ieee->tx_pending.txb = txb;
-                       ieee->tx_pending.frag = i;
-                       goto exit;
-               } else {
-                       ieee->softmac_data_hard_start_xmit(
-                               txb->fragments[i],
-                               ieee->dev, ieee->rate);
-                       ieee->stats.tx_packets++;
-                       ieee->stats.tx_bytes += txb->fragments[i]->len;
-                       ieee->dev->trans_start = jiffies;
-               }
-       }
-
-       ieee80211_txb_free(txb);
-
-       exit:
-       spin_unlock_irqrestore(&ieee->lock, flags);
-}
-
-/* called with ieee->lock acquired */
-static void ieee80211_resume_tx(struct ieee80211_device *ieee)
-{
-       int i;
-       for (i = ieee->tx_pending.frag; i < ieee->tx_pending.txb->nr_frags; i++) {
-
-               if (ieee->queue_stop) {
-                       ieee->tx_pending.frag = i;
-                       return;
-               } else {
-                       ieee->softmac_data_hard_start_xmit(
-                               ieee->tx_pending.txb->fragments[i],
-                               ieee->dev, ieee->rate);
-                       ieee->stats.tx_packets++;
-                       ieee->dev->trans_start = jiffies;
-               }
-       }
-
-       ieee80211_txb_free(ieee->tx_pending.txb);
-       ieee->tx_pending.txb = NULL;
-}
-
-void ieee80211_reset_queue(struct ieee80211_device *ieee)
-{
-       unsigned long flags;
-
-       spin_lock_irqsave(&ieee->lock, flags);
-       init_mgmt_queue(ieee);
-       if (ieee->tx_pending.txb) {
-               ieee80211_txb_free(ieee->tx_pending.txb);
-               ieee->tx_pending.txb = NULL;
-       }
-       ieee->queue_stop = 0;
-       spin_unlock_irqrestore(&ieee->lock, flags);
-}
-
-void ieee80211_rtl_wake_queue(struct ieee80211_device *ieee)
-{
-       unsigned long flags;
-       struct sk_buff *skb;
-       struct ieee80211_hdr_3addr  *header;
-
-       spin_lock_irqsave(&ieee->lock, flags);
-       if (!ieee->queue_stop)
-               goto exit;
-
-       ieee->queue_stop = 0;
-
-       if (ieee->softmac_features & IEEE_SOFTMAC_SINGLE_QUEUE) {
-               while (!ieee->queue_stop && (skb = dequeue_mgmt(ieee))) {
-                       header = (struct ieee80211_hdr_3addr  *) skb->data;
-
-                       header->seq_ctrl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
-
-                       if (ieee->seq_ctrl[0] == 0xFFF)
-                               ieee->seq_ctrl[0] = 0;
-                       else
-                               ieee->seq_ctrl[0]++;
-
-                       ieee->softmac_data_hard_start_xmit(skb, ieee->dev, ieee->basic_rate);
-                       dev_kfree_skb_any(skb);
-               }
-       }
-       if (!ieee->queue_stop && ieee->tx_pending.txb)
-               ieee80211_resume_tx(ieee);
-
-       if (!ieee->queue_stop && netif_queue_stopped(ieee->dev)) {
-               ieee->softmac_stats.swtxawake++;
-               netif_wake_queue(ieee->dev);
-       }
-exit:
-       spin_unlock_irqrestore(&ieee->lock, flags);
-}
-
-void ieee80211_rtl_stop_queue(struct ieee80211_device *ieee)
-{
-       if (!netif_queue_stopped(ieee->dev)) {
-               netif_stop_queue(ieee->dev);
-               ieee->softmac_stats.swtxstop++;
-       }
-       ieee->queue_stop = 1;
-}
-
-inline void ieee80211_randomize_cell(struct ieee80211_device *ieee)
-{
-       random_ether_addr(ieee->current_network.bssid);
-}
-
-/* called in user context only */
-void ieee80211_start_master_bss(struct ieee80211_device *ieee)
-{
-       ieee->assoc_id = 1;
-
-       if (ieee->current_network.ssid_len == 0) {
-               strncpy(ieee->current_network.ssid,
-                       IEEE80211_DEFAULT_TX_ESSID,
-                       IW_ESSID_MAX_SIZE);
-
-               ieee->current_network.ssid_len = strlen(IEEE80211_DEFAULT_TX_ESSID);
-               ieee->ssid_set = 1;
-       }
-
-       memcpy(ieee->current_network.bssid, ieee->dev->dev_addr, ETH_ALEN);
-
-       ieee->set_chan(ieee->dev, ieee->current_network.channel);
-       ieee->state = IEEE80211_LINKED;
-       ieee->link_change(ieee->dev);
-       notify_wx_assoc_event(ieee);
-
-       if (ieee->data_hard_resume)
-               ieee->data_hard_resume(ieee->dev);
-
-       netif_carrier_on(ieee->dev);
-}
-
-static void ieee80211_start_monitor_mode(struct ieee80211_device *ieee)
-{
-       if (ieee->raw_tx) {
-
-               if (ieee->data_hard_resume)
-                       ieee->data_hard_resume(ieee->dev);
-
-               netif_carrier_on(ieee->dev);
-       }
-}
-
-static void ieee80211_start_ibss_wq(struct work_struct *work)
-{
-       struct delayed_work *dwork = to_delayed_work(work);
-       struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, start_ibss_wq);
-
-       /* iwconfig mode ad-hoc will schedule this and return
-        * on the other hand this will block further iwconfig SET
-        * operations because of the wx_sem hold.
-        * Anyway some most set operations set a flag to speed-up
-        * (abort) this wq (when syncro scanning) before sleeping
-        * on the semaphore
-        */
-
-       down(&ieee->wx_sem);
-
-       if (ieee->current_network.ssid_len == 0) {
-               strcpy(ieee->current_network.ssid, IEEE80211_DEFAULT_TX_ESSID);
-               ieee->current_network.ssid_len = strlen(IEEE80211_DEFAULT_TX_ESSID);
-               ieee->ssid_set = 1;
-       }
-
-       /* check if we have this cell in our network list */
-       ieee80211_softmac_check_all_nets(ieee);
-
-       if (ieee->state == IEEE80211_NOLINK)
-               ieee->current_network.channel = 10;
-       /* if not then the state is not linked. Maybe the user switched to
-        * ad-hoc mode just after being in monitor mode, or just after
-        * being very few time in managed mode (so the card have had no
-        * time to scan all the chans..) or we have just run up the iface
-        * after setting ad-hoc mode. So we have to give another try..
-        * Here, in ibss mode, should be safe to do this without extra care
-        * (in bss mode we had to make sure no-one tried to associate when
-        * we had just checked the ieee->state and we was going to start the
-        * scan) because in ibss mode the ieee80211_new_net function, when
-        * finds a good net, just set the ieee->state to IEEE80211_LINKED,
-        * so, at worst, we waste a bit of time to initiate an unneeded syncro
-        * scan, that will stop at the first round because it sees the state
-        * associated.
-        */
-       if (ieee->state == IEEE80211_NOLINK)
-               ieee80211_start_scan_syncro(ieee);
-
-       /* the network definitively is not here.. create a new cell */
-       if (ieee->state == IEEE80211_NOLINK) {
-               printk("creating new IBSS cell\n");
-               if (!ieee->wap_set)
-                       ieee80211_randomize_cell(ieee);
-
-               if (ieee->modulation & IEEE80211_CCK_MODULATION) {
-                       ieee->current_network.rates_len = 4;
-
-                       ieee->current_network.rates[0] = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_1MB;
-                       ieee->current_network.rates[1] = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_2MB;
-                       ieee->current_network.rates[2] = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_5MB;
-                       ieee->current_network.rates[3] = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_11MB;
-
-               } else
-                       ieee->current_network.rates_len = 0;
-
-               if (ieee->modulation & IEEE80211_OFDM_MODULATION) {
-                       ieee->current_network.rates_ex_len = 8;
-
-                       ieee->current_network.rates_ex[0] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_6MB;
-                       ieee->current_network.rates_ex[1] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_9MB;
-                       ieee->current_network.rates_ex[2] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_12MB;
-                       ieee->current_network.rates_ex[3] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_18MB;
-                       ieee->current_network.rates_ex[4] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_24MB;
-                       ieee->current_network.rates_ex[5] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_36MB;
-                       ieee->current_network.rates_ex[6] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_48MB;
-                       ieee->current_network.rates_ex[7] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_54MB;
-
-                       ieee->rate = 540;
-               } else {
-                       ieee->current_network.rates_ex_len = 0;
-                       ieee->rate = 110;
-               }
-
-               /* By default, WMM function will be disabled in IBSS mode */
-               ieee->current_network.QoS_Enable = 0;
-
-               ieee->current_network.atim_window = 0;
-               ieee->current_network.capability = WLAN_CAPABILITY_IBSS;
-               if (ieee->short_slot)
-                       ieee->current_network.capability |= WLAN_CAPABILITY_SHORT_SLOT;
-       }
-
-       ieee->state = IEEE80211_LINKED;
-       ieee->set_chan(ieee->dev, ieee->current_network.channel);
-       ieee->link_change(ieee->dev);
-
-       notify_wx_assoc_event(ieee);
-
-       ieee80211_start_send_beacons(ieee);
-       printk(KERN_WARNING "after sending beacon packet!\n");
-
-       if (ieee->data_hard_resume)
-               ieee->data_hard_resume(ieee->dev);
-
-       netif_carrier_on(ieee->dev);
-
-       up(&ieee->wx_sem);
-}
-
-inline void ieee80211_start_ibss(struct ieee80211_device *ieee)
-{
-       queue_delayed_work(ieee->wq, &ieee->start_ibss_wq, 100);
-}
-
-/* this is called only in user context, with wx_sem held */
-void ieee80211_start_bss(struct ieee80211_device *ieee)
-{
-       unsigned long flags;
-       /* Ref: 802.11d 11.1.3.3
-        * STA shall not start a BSS unless properly formed Beacon frame
-        * including a Country IE.
-        */
-       if (IS_DOT11D_ENABLE(ieee) && !IS_COUNTRY_IE_VALID(ieee)) {
-               if (!ieee->bGlobalDomain)
-                       return;
-       }
-       /* check if we have already found the net we are interested in (if any).
-        * if not (we are disassociated and we are not
-        * in associating / authenticating phase) start the background scanning.
-        */
-       ieee80211_softmac_check_all_nets(ieee);
-
-       /* ensure no-one start an associating process (thus setting
-        * the ieee->state to ieee80211_ASSOCIATING) while we
-        * have just cheked it and we are going to enable scan.
-        * The ieee80211_new_net function is always called with
-        * lock held (from both ieee80211_softmac_check_all_nets and
-        * the rx path), so we cannot be in the middle of such function
-        */
-       spin_lock_irqsave(&ieee->lock, flags);
-
-       if (ieee->state == IEEE80211_NOLINK) {
-               ieee->actscanning = true;
-               ieee80211_rtl_start_scan(ieee);
-       }
-       spin_unlock_irqrestore(&ieee->lock, flags);
-}
-
-/* called only in userspace context */
-void ieee80211_disassociate(struct ieee80211_device *ieee)
-{
-       netif_carrier_off(ieee->dev);
-
-       if (ieee->softmac_features & IEEE_SOFTMAC_TX_QUEUE)
-                       ieee80211_reset_queue(ieee);
-
-       if (ieee->data_hard_stop)
-                       ieee->data_hard_stop(ieee->dev);
-
-       if (IS_DOT11D_ENABLE(ieee))
-               Dot11d_Reset(ieee);
-
-       ieee->link_change(ieee->dev);
-       if (ieee->state == IEEE80211_LINKED)
-               notify_wx_assoc_event(ieee);
-       ieee->state = IEEE80211_NOLINK;
-
-}
-static void ieee80211_associate_retry_wq(struct work_struct *work)
-{
-       struct delayed_work *dwork = to_delayed_work(work);
-       struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, associate_retry_wq);
-       unsigned long flags;
-       down(&ieee->wx_sem);
-       if (!ieee->proto_started)
-               goto exit;
-       if (ieee->state != IEEE80211_ASSOCIATING_RETRY)
-               goto exit;
-       /* until we do not set the state to IEEE80211_NOLINK
-       * there are no possibility to have someone else trying
-       * to start an association procedure (we get here with
-       * ieee->state = IEEE80211_ASSOCIATING).
-       * When we set the state to IEEE80211_NOLINK it is possible
-       * that the RX path run an attempt to associate, but
-       * both ieee80211_softmac_check_all_nets and the
-       * RX path works with ieee->lock held so there are no
-       * problems. If we are still disassociated then start a scan.
-       * the lock here is necessary to ensure no one try to start
-       * an association procedure when we have just checked the
-       * state and we are going to start the scan.
-       */
-       ieee->state = IEEE80211_NOLINK;
-       ieee->beinretry = true;
-       ieee80211_softmac_check_all_nets(ieee);
-
-       spin_lock_irqsave(&ieee->lock, flags);
-
-       if (ieee->state == IEEE80211_NOLINK) {
-               ieee->beinretry = false;
-               ieee->actscanning = true;
-               ieee80211_rtl_start_scan(ieee);
-       }
-       if (ieee->state == IEEE80211_NOLINK)
-               notify_wx_assoc_event(ieee);
-       spin_unlock_irqrestore(&ieee->lock, flags);
-
-exit:
-       up(&ieee->wx_sem);
-}
-
-struct sk_buff *ieee80211_get_beacon_(struct ieee80211_device *ieee)
-{
-       u8 broadcast_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
-
-       struct sk_buff *skb = NULL;
-       struct ieee80211_probe_response *b;
-
-       skb = ieee80211_probe_resp(ieee, broadcast_addr);
-       if (!skb)
-               return NULL;
-
-       b = (struct ieee80211_probe_response *) skb->data;
-       b->header.frame_ctl = cpu_to_le16(IEEE80211_STYPE_BEACON);
-
-       return skb;
-}
-
-struct sk_buff *ieee80211_get_beacon(struct ieee80211_device *ieee)
-{
-       struct sk_buff *skb;
-       struct ieee80211_probe_response *b;
-
-       skb = ieee80211_get_beacon_(ieee);
-       if (!skb)
-               return NULL;
-
-       b = (struct ieee80211_probe_response *) skb->data;
-       b->header.seq_ctrl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
-
-       if (ieee->seq_ctrl[0] == 0xFFF)
-               ieee->seq_ctrl[0] = 0;
-       else
-               ieee->seq_ctrl[0]++;
-
-       return skb;
-}
-
-void ieee80211_softmac_stop_protocol(struct ieee80211_device *ieee)
-{
-       ieee->sync_scan_hurryup = 1;
-       down(&ieee->wx_sem);
-       ieee80211_stop_protocol(ieee);
-       up(&ieee->wx_sem);
-}
-
-void ieee80211_stop_protocol(struct ieee80211_device *ieee)
-{
-       if (!ieee->proto_started)
-               return;
-
-       ieee->proto_started = 0;
-
-       ieee80211_stop_send_beacons(ieee);
-       if ((ieee->iw_mode == IW_MODE_INFRA) && (ieee->state == IEEE80211_LINKED))
-               SendDisassociation(ieee, NULL, WLAN_REASON_DISASSOC_STA_HAS_LEFT);
-
-       del_timer_sync(&ieee->associate_timer);
-       cancel_delayed_work(&ieee->associate_retry_wq);
-       cancel_delayed_work(&ieee->start_ibss_wq);
-       ieee80211_stop_scan(ieee);
-
-       ieee80211_disassociate(ieee);
-}
-
-void ieee80211_softmac_start_protocol(struct ieee80211_device *ieee)
-{
-       ieee->sync_scan_hurryup = 0;
-       down(&ieee->wx_sem);
-       ieee80211_start_protocol(ieee);
-       up(&ieee->wx_sem);
-}
-
-void ieee80211_start_protocol(struct ieee80211_device *ieee)
-{
-       short ch = 0;
-       int i = 0;
-
-       if (ieee->proto_started)
-               return;
-
-       ieee->proto_started = 1;
-
-       if (ieee->current_network.channel == 0) {
-               do {
-                       ch++;
-                       if (ch > MAX_CHANNEL_NUMBER)
-                               return; /* no channel found */
-
-               } while (!GET_DOT11D_INFO(ieee)->channel_map[ch]);
-
-               ieee->current_network.channel = ch;
-       }
-
-       if (ieee->current_network.beacon_interval == 0)
-               ieee->current_network.beacon_interval = 100;
-       ieee->set_chan(ieee->dev, ieee->current_network.channel);
-
-       for (i = 0; i < 17; i++) {
-               ieee->last_rxseq_num[i] = -1;
-               ieee->last_rxfrag_num[i] = -1;
-               ieee->last_packet_time[i] = 0;
-       }
-
-       ieee->init_wmmparam_flag = 0; /* reinitialize AC_xx_PARAM registers. */
-
-       /* if the user set the MAC of the ad-hoc cell and then
-        * switch to managed mode, shall we  make sure that association
-        * attempts does not fail just because the user provide the essid
-        * and the nic is still checking for the AP MAC ??
-        */
-       switch (ieee->iw_mode) {
-               case IW_MODE_AUTO:
-                       ieee->iw_mode = IW_MODE_INFRA;
-                       /* not set break here intentionly */
-               case IW_MODE_INFRA:
-                       ieee80211_start_bss(ieee);
-                       break;
-
-               case IW_MODE_ADHOC:
-                       ieee80211_start_ibss(ieee);
-                       break;
-
-               case IW_MODE_MASTER:
-                       ieee80211_start_master_bss(ieee);
-               break;
-
-               case IW_MODE_MONITOR:
-                       ieee80211_start_monitor_mode(ieee);
-                       break;
-
-               default:
-                       ieee->iw_mode = IW_MODE_INFRA;
-                       ieee80211_start_bss(ieee);
-                       break;
-       }
-}
-
-#define DRV_NAME  "Ieee80211"
-void ieee80211_softmac_init(struct ieee80211_device *ieee)
-{
-       int i;
-       memset(&ieee->current_network, 0, sizeof(struct ieee80211_network));
-
-       ieee->state = IEEE80211_NOLINK;
-       ieee->sync_scan_hurryup = 0;
-       for (i = 0; i < 5; i++)
-               ieee->seq_ctrl[i] = 0;
-
-       ieee->assoc_id = 0;
-       ieee->queue_stop = 0;
-       ieee->scanning = 0;
-       ieee->softmac_features = 0; /* so IEEE2100-like driver are happy */
-       ieee->wap_set = 0;
-       ieee->ssid_set = 0;
-       ieee->proto_started = 0;
-       ieee->basic_rate = IEEE80211_DEFAULT_BASIC_RATE;
-       ieee->rate = 3;
-       ieee->ps = IEEE80211_PS_MBCAST|IEEE80211_PS_UNICAST;
-       ieee->sta_sleep = 0;
-       ieee->bInactivePs = false;
-       ieee->actscanning = false;
-       ieee->ListenInterval = 2;
-       ieee->NumRxDataInPeriod = 0;
-       ieee->NumRxBcnInPeriod = 0;
-       ieee->NumRxOkTotal = 0;
-       ieee->NumRxUnicast = 0; /* for keep alive */
-       ieee->beinretry = false;
-       ieee->bHwRadioOff = false;
-
-       init_mgmt_queue(ieee);
-
-       ieee->tx_pending.txb = NULL;
-
-       init_timer(&ieee->associate_timer);
-       ieee->associate_timer.data = (unsigned long)ieee;
-       ieee->associate_timer.function = ieee80211_associate_abort_cb;
-
-       init_timer(&ieee->beacon_timer);
-       ieee->beacon_timer.data = (unsigned long) ieee;
-       ieee->beacon_timer.function = ieee80211_send_beacon_cb;
-
-       ieee->wq = create_workqueue(DRV_NAME);
-
-       INIT_DELAYED_WORK(&ieee->start_ibss_wq, (void *) ieee80211_start_ibss_wq);
-       INIT_WORK(&ieee->associate_complete_wq, (void *) ieee80211_associate_complete_wq);
-       INIT_WORK(&ieee->associate_procedure_wq, (void *) ieee80211_associate_procedure_wq);
-       INIT_DELAYED_WORK(&ieee->softmac_scan_wq, (void *) ieee80211_softmac_scan_wq);
-       INIT_DELAYED_WORK(&ieee->associate_retry_wq, (void *) ieee80211_associate_retry_wq);
-       INIT_WORK(&ieee->wx_sync_scan_wq, (void *) ieee80211_wx_sync_scan_wq);
-
-       sema_init(&ieee->wx_sem, 1);
-       sema_init(&ieee->scan_sem, 1);
-
-       spin_lock_init(&ieee->mgmt_tx_lock);
-       spin_lock_init(&ieee->beacon_lock);
-
-       tasklet_init(&ieee->ps_task,
-            (void(*)(unsigned long)) ieee80211_sta_ps,
-            (unsigned long)ieee);
-       ieee->pDot11dInfo = kmalloc(sizeof(RT_DOT11D_INFO), GFP_ATOMIC);
-}
-
-void ieee80211_softmac_free(struct ieee80211_device *ieee)
-{
-       down(&ieee->wx_sem);
-
-       del_timer_sync(&ieee->associate_timer);
-       cancel_delayed_work(&ieee->associate_retry_wq);
-
-       /* add for RF power on power of */
-       cancel_delayed_work(&ieee->GPIOChangeRFWorkItem);
-
-       destroy_workqueue(ieee->wq);
-       kfree(ieee->pDot11dInfo);
-       up(&ieee->wx_sem);
-}
-
-/* Start of WPA code. This is stolen from the ipw2200 driver  */
-static int ieee80211_wpa_enable(struct ieee80211_device *ieee, int value)
-{
-       /* This is called when wpa_supplicant loads and closes the driver
-        * interface. */
-       printk("%s WPA\n", value ? "enabling" : "disabling");
-       ieee->wpa_enabled = value;
-       return 0;
-}
-
-static void ieee80211_wpa_assoc_frame(struct ieee80211_device *ieee, char *wpa_ie,
-                              int wpa_ie_len)
-{
-       /* make sure WPA is enabled */
-       ieee80211_wpa_enable(ieee, 1);
-
-       ieee80211_disassociate(ieee);
-}
-
-static int ieee80211_wpa_mlme(struct ieee80211_device *ieee, int command,
-                             int reason)
-{
-       int ret = 0;
-
-       switch (command) {
-       case IEEE_MLME_STA_DEAUTH:
-               /* silently ignore */
-               break;
-
-       case IEEE_MLME_STA_DISASSOC:
-               ieee80211_disassociate(ieee);
-               break;
-
-       default:
-               printk("Unknown MLME request: %d\n", command);
-               ret = -EOPNOTSUPP;
-       }
-
-       return ret;
-}
-
-static int ieee80211_wpa_set_wpa_ie(struct ieee80211_device *ieee,
-                                   struct ieee_param *param, int plen)
-{
-       u8 *buf;
-
-       if (param->u.wpa_ie.len > MAX_WPA_IE_LEN ||
-           (param->u.wpa_ie.len && param->u.wpa_ie.data == NULL))
-               return -EINVAL;
-
-       if (param->u.wpa_ie.len) {
-               buf = kmemdup(param->u.wpa_ie.data, param->u.wpa_ie.len,
-                             GFP_KERNEL);
-               if (buf == NULL)
-                       return -ENOMEM;
-
-               kfree(ieee->wpa_ie);
-               ieee->wpa_ie = buf;
-               ieee->wpa_ie_len = param->u.wpa_ie.len;
-       } else {
-               kfree(ieee->wpa_ie);
-               ieee->wpa_ie = NULL;
-               ieee->wpa_ie_len = 0;
-       }
-
-       ieee80211_wpa_assoc_frame(ieee, ieee->wpa_ie, ieee->wpa_ie_len);
-       return 0;
-}
-
-#define AUTH_ALG_OPEN_SYSTEM                   0x1
-#define AUTH_ALG_SHARED_KEY                    0x2
-
-static int ieee80211_wpa_set_auth_algs(struct ieee80211_device *ieee, int value)
-{
-       struct ieee80211_security sec = {
-               .flags = SEC_AUTH_MODE,
-       };
-       int ret = 0;
-
-       if (value & AUTH_ALG_SHARED_KEY) {
-               sec.auth_mode = WLAN_AUTH_SHARED_KEY;
-               ieee->open_wep = 0;
-       } else {
-               sec.auth_mode = WLAN_AUTH_OPEN;
-               ieee->open_wep = 1;
-       }
-
-       if (ieee->set_security)
-               ieee->set_security(ieee->dev, &sec);
-       else
-               ret = -EOPNOTSUPP;
-
-       return ret;
-}
-
-static int ieee80211_wpa_set_param(struct ieee80211_device *ieee, u8 name,
-                                  u32 value)
-{
-       int ret = 0;
-       unsigned long flags;
-
-       switch (name) {
-       case IEEE_PARAM_WPA_ENABLED:
-               ret = ieee80211_wpa_enable(ieee, value);
-               break;
-
-       case IEEE_PARAM_TKIP_COUNTERMEASURES:
-               ieee->tkip_countermeasures = value;
-               break;
-
-       case IEEE_PARAM_DROP_UNENCRYPTED: {
-               /* HACK:
-                *
-                * wpa_supplicant calls set_wpa_enabled when the driver
-                * is loaded and unloaded, regardless of if WPA is being
-                * used.  No other calls are made which can be used to
-                * determine if encryption will be used or not prior to
-                * association being expected.  If encryption is not being
-                * used, drop_unencrypted is set to false, else true -- we
-                * can use this to determine if the CAP_PRIVACY_ON bit should
-                * be set.
-                */
-               struct ieee80211_security sec = {
-                       .flags = SEC_ENABLED,
-                       .enabled = value,
-               };
-               ieee->drop_unencrypted = value;
-               /* We only change SEC_LEVEL for open mode. Others
-                * are set by ipw_wpa_set_encryption.
-                */
-               if (!value) {
-                       sec.flags |= SEC_LEVEL;
-                       sec.level = SEC_LEVEL_0;
-               } else {
-                       sec.flags |= SEC_LEVEL;
-                       sec.level = SEC_LEVEL_1;
-               }
-               if (ieee->set_security)
-                       ieee->set_security(ieee->dev, &sec);
-               break;
-       }
-
-       case IEEE_PARAM_PRIVACY_INVOKED:
-               ieee->privacy_invoked = value;
-               break;
-       case IEEE_PARAM_AUTH_ALGS:
-               ret = ieee80211_wpa_set_auth_algs(ieee, value);
-               break;
-       case IEEE_PARAM_IEEE_802_1X:
-               ieee->ieee802_1x = value;
-               break;
-       case IEEE_PARAM_WPAX_SELECT:
-               spin_lock_irqsave(&ieee->wpax_suitlist_lock, flags);
-               ieee->wpax_type_set = 1;
-               ieee->wpax_type_notify = value;
-               spin_unlock_irqrestore(&ieee->wpax_suitlist_lock, flags);
-               break;
-       default:
-               printk("Unknown WPA param: %d\n", name);
-               ret = -EOPNOTSUPP;
-       }
-
-       return ret;
-}
-
-/* implementation borrowed from hostap driver */
-
-static int ieee80211_wpa_set_encryption(struct ieee80211_device *ieee,
-                                       struct ieee_param *param, int param_len)
-{
-       int ret = 0;
-
-       struct ieee80211_crypto_ops *ops;
-       struct ieee80211_crypt_data **crypt;
-
-       struct ieee80211_security sec = {
-               .flags = 0,
-       };
-
-       param->u.crypt.err = 0;
-       param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0';
-
-       if (param_len !=
-           (int) ((char *) param->u.crypt.key - (char *) param) +
-           param->u.crypt.key_len) {
-               printk("Len mismatch %d, %d\n", param_len,
-                              param->u.crypt.key_len);
-               return -EINVAL;
-       }
-       if (is_broadcast_ether_addr(param->sta_addr)) {
-               if (param->u.crypt.idx >= WEP_KEYS)
-                       return -EINVAL;
-               crypt = &ieee->crypt[param->u.crypt.idx];
-       } else {
-               return -EINVAL;
-       }
-
-       if (strcmp(param->u.crypt.alg, "none") == 0) {
-               if (crypt) {
-                       sec.enabled = 0;
-                       /* FIXME FIXME */
-                       sec.level = SEC_LEVEL_0;
-                       sec.flags |= SEC_ENABLED | SEC_LEVEL;
-                       ieee80211_crypt_delayed_deinit(ieee, crypt);
-               }
-               goto done;
-       }
-       sec.enabled = 1;
-       /* FIXME FIXME */
-       sec.flags |= SEC_ENABLED;
-
-       /* IPW HW cannot build TKIP MIC, host decryption still needed. */
-       if (!(ieee->host_encrypt || ieee->host_decrypt) &&
-           strcmp(param->u.crypt.alg, "TKIP"))
-               goto skip_host_crypt;
-
-       ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
-       if (ops == NULL && strcmp(param->u.crypt.alg, "WEP") == 0)
-               ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
-       else if (ops == NULL && strcmp(param->u.crypt.alg, "TKIP") == 0)
-               ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
-       else if (ops == NULL && strcmp(param->u.crypt.alg, "CCMP") == 0)
-               ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
-       if (ops == NULL) {
-               printk("unknown crypto alg '%s'\n", param->u.crypt.alg);
-               param->u.crypt.err = IEEE_CRYPT_ERR_UNKNOWN_ALG;
-               ret = -EINVAL;
-               goto done;
-       }
-
-       if (*crypt == NULL || (*crypt)->ops != ops) {
-               struct ieee80211_crypt_data *new_crypt;
-
-               ieee80211_crypt_delayed_deinit(ieee, crypt);
-
-               new_crypt = kmalloc(sizeof(*new_crypt), GFP_KERNEL);
-               if (new_crypt == NULL) {
-                       ret = -ENOMEM;
-                       goto done;
-               }
-               memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data));
-               new_crypt->ops = ops;
-               if (new_crypt->ops)
-                       new_crypt->priv =
-                               new_crypt->ops->init(param->u.crypt.idx);
-
-               if (new_crypt->priv == NULL) {
-                       kfree(new_crypt);
-                       param->u.crypt.err = IEEE_CRYPT_ERR_CRYPT_INIT_FAILED;
-                       ret = -EINVAL;
-                       goto done;
-               }
-
-               *crypt = new_crypt;
-       }
-
-       if (param->u.crypt.key_len > 0 && (*crypt)->ops->set_key &&
-           (*crypt)->ops->set_key(param->u.crypt.key,
-                                  param->u.crypt.key_len, param->u.crypt.seq,
-                                  (*crypt)->priv) < 0) {
-               printk("key setting failed\n");
-               param->u.crypt.err = IEEE_CRYPT_ERR_KEY_SET_FAILED;
-               ret = -EINVAL;
-               goto done;
-       }
-
- skip_host_crypt:
-       if (param->u.crypt.set_tx) {
-               ieee->tx_keyidx = param->u.crypt.idx;
-               sec.active_key = param->u.crypt.idx;
-               sec.flags |= SEC_ACTIVE_KEY;
-       } else
-               sec.flags &= ~SEC_ACTIVE_KEY;
-
-       if (param->u.crypt.alg != NULL) {
-               memcpy(sec.keys[param->u.crypt.idx],
-                      param->u.crypt.key,
-                      param->u.crypt.key_len);
-               sec.key_sizes[param->u.crypt.idx] = param->u.crypt.key_len;
-               sec.flags |= (1 << param->u.crypt.idx);
-
-               if (strcmp(param->u.crypt.alg, "WEP") == 0) {
-                       sec.flags |= SEC_LEVEL;
-                       sec.level = SEC_LEVEL_1;
-               } else if (strcmp(param->u.crypt.alg, "TKIP") == 0) {
-                       sec.flags |= SEC_LEVEL;
-                       sec.level = SEC_LEVEL_2;
-               } else if (strcmp(param->u.crypt.alg, "CCMP") == 0) {
-                       sec.flags |= SEC_LEVEL;
-                       sec.level = SEC_LEVEL_3;
-               }
-       }
- done:
-       if (ieee->set_security)
-               ieee->set_security(ieee->dev, &sec);
-
-       /* Do not reset port if card is in Managed mode since resetting will
-        * generate new IEEE 802.11 authentication which may end up in looping
-        * with IEEE 802.1X.  If your hardware requires a reset after WEP
-        * configuration (for example... Prism2), implement the reset_port in
-        * the callbacks structures used to initialize the 802.11 stack. */
-       if (ieee->reset_on_keychange &&
-           ieee->iw_mode != IW_MODE_INFRA &&
-           ieee->reset_port &&
-           ieee->reset_port(ieee->dev)) {
-               printk("reset_port failed\n");
-               param->u.crypt.err = IEEE_CRYPT_ERR_CARD_CONF_FAILED;
-               return -EINVAL;
-       }
-
-       return ret;
-}
-
-int ieee80211_wpa_supplicant_ioctl(struct ieee80211_device *ieee,
-                                  struct iw_point *p)
-{
-       struct ieee_param *param;
-       int ret = 0;
-
-       down(&ieee->wx_sem);
-
-       if (p->length < sizeof(struct ieee_param) || !p->pointer) {
-               ret = -EINVAL;
-               goto out;
-       }
-
-       param = memdup_user(p->pointer, p->length);
-       if (IS_ERR(param)) {
-               ret = PTR_ERR(param);
-               goto out;
-       }
-
-       switch (param->cmd) {
-       case IEEE_CMD_SET_WPA_PARAM:
-               ret = ieee80211_wpa_set_param(ieee, param->u.wpa_param.name,
-                                       param->u.wpa_param.value);
-               break;
-       case IEEE_CMD_SET_WPA_IE:
-               ret = ieee80211_wpa_set_wpa_ie(ieee, param, p->length);
-               break;
-       case IEEE_CMD_SET_ENCRYPTION:
-               ret = ieee80211_wpa_set_encryption(ieee, param, p->length);
-               break;
-       case IEEE_CMD_MLME:
-               ret = ieee80211_wpa_mlme(ieee, param->u.mlme.command,
-                                  param->u.mlme.reason_code);
-               break;
-       default:
-               printk("Unknown WPA supplicant request: %d\n", param->cmd);
-               ret = -EOPNOTSUPP;
-               break;
-       }
-
-       if (ret == 0 && copy_to_user(p->pointer, param, p->length))
-               ret = -EFAULT;
-
-       kfree(param);
-out:
-       up(&ieee->wx_sem);
-
-       return ret;
-}
-
-void notify_wx_assoc_event(struct ieee80211_device *ieee)
-{
-       union iwreq_data wrqu;
-       wrqu.ap_addr.sa_family = ARPHRD_ETHER;
-       if (ieee->state == IEEE80211_LINKED)
-               memcpy(wrqu.ap_addr.sa_data, ieee->current_network.bssid, ETH_ALEN);
-       else
-               memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN);
-       wireless_send_event(ieee->dev, SIOCGIWAP, &wrqu, NULL);
-}
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac_wx.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac_wx.c
deleted file mode 100644 (file)
index 46f3564..0000000
+++ /dev/null
@@ -1,567 +0,0 @@
-/* IEEE 802.11 SoftMAC layer
- * Copyright (c) 2005 Andrea Merello <andrea.merello@gmail.com>
- *
- * Mostly extracted from the rtl8180-sa2400 driver for the
- * in-kernel generic ieee802.11 stack.
- *
- * Some pieces of code might be stolen from ipw2100 driver
- * copyright of who own it's copyright ;-)
- *
- * PS wx handler mostly stolen from hostap, copyright who
- * own it's copyright ;-)
- *
- * released under the GPL
- */
-
-
-#include <linux/etherdevice.h>
-
-#include "ieee80211.h"
-
-/* FIXME: add A freqs */
-
-const long ieee80211_wlan_frequencies[] = {
-       2412, 2417, 2422, 2427,
-       2432, 2437, 2442, 2447,
-       2452, 2457, 2462, 2467,
-       2472, 2484
-};
-
-
-int ieee80211_wx_set_freq(struct ieee80211_device *ieee,
-                         struct iw_request_info *a, union iwreq_data *wrqu,
-                         char *b)
-{
-       int ret;
-       struct iw_freq *fwrq = &wrqu->freq;
-//     printk("in %s\n",__func__);
-       down(&ieee->wx_sem);
-
-       if (ieee->iw_mode == IW_MODE_INFRA) {
-               ret = -EOPNOTSUPP;
-               goto out;
-       }
-
-       /* if setting by freq convert to channel */
-       if (fwrq->e == 1) {
-               if ((fwrq->m >= (int) 2.412e8 &&
-                    fwrq->m <= (int) 2.487e8)) {
-                       int f = fwrq->m / 100000;
-                       int c = 0;
-
-                       while ((c < 14) && (f != ieee80211_wlan_frequencies[c]))
-                               c++;
-
-                       /* hack to fall through */
-                       fwrq->e = 0;
-                       fwrq->m = c + 1;
-               }
-       }
-
-       if (fwrq->e > 0 || fwrq->m > 14 || fwrq->m < 1) {
-               ret = -EOPNOTSUPP;
-               goto out;
-
-       } else { /* Set the channel */
-
-
-               ieee->current_network.channel = fwrq->m;
-               ieee->set_chan(ieee->dev, ieee->current_network.channel);
-
-               if (ieee->iw_mode == IW_MODE_ADHOC || ieee->iw_mode == IW_MODE_MASTER)
-                       if (ieee->state == IEEE80211_LINKED) {
-                               ieee80211_stop_send_beacons(ieee);
-                               ieee80211_start_send_beacons(ieee);
-                       }
-       }
-
-       ret = 0;
-out:
-       up(&ieee->wx_sem);
-       return ret;
-}
-
-
-int ieee80211_wx_get_freq(struct ieee80211_device *ieee,
-                         struct iw_request_info *a, union iwreq_data *wrqu,
-                         char *b)
-{
-       struct iw_freq *fwrq = &wrqu->freq;
-
-       if (ieee->current_network.channel == 0)
-               return -1;
-
-       fwrq->m = ieee->current_network.channel;
-       fwrq->e = 0;
-
-       return 0;
-}
-
-int ieee80211_wx_get_wap(struct ieee80211_device *ieee,
-                        struct iw_request_info *info, union iwreq_data *wrqu,
-                        char *extra)
-{
-       unsigned long flags;
-
-       wrqu->ap_addr.sa_family = ARPHRD_ETHER;
-
-       if (ieee->iw_mode == IW_MODE_MONITOR)
-               return -1;
-
-       /* We want avoid to give to the user inconsistent infos*/
-       spin_lock_irqsave(&ieee->lock, flags);
-
-       if (ieee->state != IEEE80211_LINKED &&
-               ieee->state != IEEE80211_LINKED_SCANNING &&
-               ieee->wap_set == 0)
-
-               memset(wrqu->ap_addr.sa_data, 0, ETH_ALEN);
-       else
-               memcpy(wrqu->ap_addr.sa_data,
-                      ieee->current_network.bssid, ETH_ALEN);
-
-       spin_unlock_irqrestore(&ieee->lock, flags);
-
-       return 0;
-}
-
-
-int ieee80211_wx_set_wap(struct ieee80211_device *ieee,
-                        struct iw_request_info *info, union iwreq_data *awrq,
-                        char *extra)
-{
-
-       int ret = 0;
-       unsigned long flags;
-
-       short ifup = ieee->proto_started;//dev->flags & IFF_UP;
-       struct sockaddr *temp = (struct sockaddr *)awrq;
-
-       //printk("=======Set WAP:");
-       ieee->sync_scan_hurryup = 1;
-
-       down(&ieee->wx_sem);
-       /* use ifconfig hw ether */
-       if (ieee->iw_mode == IW_MODE_MASTER) {
-               ret = -1;
-               goto out;
-       }
-
-       if (temp->sa_family != ARPHRD_ETHER) {
-               ret = -EINVAL;
-               goto out;
-       }
-
-       if (ifup)
-               ieee80211_stop_protocol(ieee);
-
-       /* just to avoid to give inconsistent infos in the
-        * get wx method. not really needed otherwise
-        */
-       spin_lock_irqsave(&ieee->lock, flags);
-
-       memcpy(ieee->current_network.bssid, temp->sa_data, ETH_ALEN);
-       ieee->wap_set = !is_zero_ether_addr(temp->sa_data);
-       //printk(" %x:%x:%x:%x:%x:%x\n", ieee->current_network.bssid[0],ieee->current_network.bssid[1],ieee->current_network.bssid[2],ieee->current_network.bssid[3],ieee->current_network.bssid[4],ieee->current_network.bssid[5]);
-
-       spin_unlock_irqrestore(&ieee->lock, flags);
-
-       if (ifup)
-               ieee80211_start_protocol(ieee);
-
-out:
-       up(&ieee->wx_sem);
-       return ret;
-}
-
-int ieee80211_wx_get_essid(struct ieee80211_device *ieee,
-                          struct iw_request_info *a, union iwreq_data *wrqu,
-                          char *b)
-{
-       int len, ret = 0;
-       unsigned long flags;
-
-       if (ieee->iw_mode == IW_MODE_MONITOR)
-               return -1;
-
-       /* We want avoid to give to the user inconsistent infos*/
-       spin_lock_irqsave(&ieee->lock, flags);
-
-       if (ieee->current_network.ssid[0] == '\0' ||
-               ieee->current_network.ssid_len == 0){
-               ret = -1;
-               goto out;
-       }
-
-       if (ieee->state != IEEE80211_LINKED &&
-               ieee->state != IEEE80211_LINKED_SCANNING &&
-               ieee->ssid_set == 0){
-               ret = -1;
-               goto out;
-       }
-       len = ieee->current_network.ssid_len;
-       wrqu->essid.length = len;
-       strncpy(b, ieee->current_network.ssid, len);
-       wrqu->essid.flags = 1;
-
-out:
-       spin_unlock_irqrestore(&ieee->lock, flags);
-
-       return ret;
-
-}
-
-int ieee80211_wx_set_rate(struct ieee80211_device *ieee,
-                         struct iw_request_info *info, union iwreq_data *wrqu,
-                         char *extra)
-{
-
-       u32 target_rate = wrqu->bitrate.value;
-
-       //added by lizhaoming for auto mode
-       if (target_rate == -1)
-               ieee->rate = 110;
-       else
-               ieee->rate = target_rate/100000;
-
-       //FIXME: we might want to limit rate also in management protocols.
-       return 0;
-}
-
-
-
-int ieee80211_wx_get_rate(struct ieee80211_device *ieee,
-                         struct iw_request_info *info, union iwreq_data *wrqu,
-                         char *extra)
-{
-
-       wrqu->bitrate.value = ieee->rate * 100000;
-
-       return 0;
-}
-
-int ieee80211_wx_set_mode(struct ieee80211_device *ieee,
-                         struct iw_request_info *a, union iwreq_data *wrqu,
-                         char *b)
-{
-
-       ieee->sync_scan_hurryup = 1;
-
-       down(&ieee->wx_sem);
-
-       if (wrqu->mode == ieee->iw_mode)
-               goto out;
-
-       if (wrqu->mode == IW_MODE_MONITOR)
-               ieee->dev->type = ARPHRD_IEEE80211;
-       else
-               ieee->dev->type = ARPHRD_ETHER;
-
-       if (!ieee->proto_started) {
-               ieee->iw_mode = wrqu->mode;
-       } else {
-               ieee80211_stop_protocol(ieee);
-               ieee->iw_mode = wrqu->mode;
-               ieee80211_start_protocol(ieee);
-       }
-
-out:
-       up(&ieee->wx_sem);
-       return 0;
-}
-
-
-void ieee80211_wx_sync_scan_wq(struct work_struct *work)
-{
-       struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, wx_sync_scan_wq);
-       short chan;
-
-       chan = ieee->current_network.channel;
-
-       if (ieee->data_hard_stop)
-               ieee->data_hard_stop(ieee->dev);
-
-       ieee80211_stop_send_beacons(ieee);
-
-       ieee->state = IEEE80211_LINKED_SCANNING;
-       ieee->link_change(ieee->dev);
-
-       ieee80211_start_scan_syncro(ieee);
-
-       ieee->set_chan(ieee->dev, chan);
-
-       ieee->state = IEEE80211_LINKED;
-       ieee->link_change(ieee->dev);
-
-       if (ieee->data_hard_resume)
-               ieee->data_hard_resume(ieee->dev);
-
-       if (ieee->iw_mode == IW_MODE_ADHOC || ieee->iw_mode == IW_MODE_MASTER)
-               ieee80211_start_send_beacons(ieee);
-
-       //YJ,add,080828, In prevent of lossing ping packet during scanning
-       //ieee80211_sta_ps_send_null_frame(ieee, false);
-       //YJ,add,080828,end
-
-       up(&ieee->wx_sem);
-
-}
-
-int ieee80211_wx_set_scan(struct ieee80211_device *ieee,
-                         struct iw_request_info *a, union iwreq_data *wrqu,
-                         char *b)
-{
-       int ret = 0;
-
-       down(&ieee->wx_sem);
-
-       if (ieee->iw_mode == IW_MODE_MONITOR || !(ieee->proto_started)) {
-               ret = -1;
-               goto out;
-       }
-       //YJ,add,080828
-       //In prevent of lossing ping packet during scanning
-       //ieee80211_sta_ps_send_null_frame(ieee, true);
-       //YJ,add,080828,end
-
-       if (ieee->state == IEEE80211_LINKED) {
-               queue_work(ieee->wq, &ieee->wx_sync_scan_wq);
-               /* intentionally forget to up sem */
-               return 0;
-       }
-
-out:
-       up(&ieee->wx_sem);
-       return ret;
-}
-
-int ieee80211_wx_set_essid(struct ieee80211_device *ieee,
-                          struct iw_request_info *a, union iwreq_data *wrqu,
-                          char *extra)
-{
-
-       int ret = 0, len;
-       short proto_started;
-       unsigned long flags;
-
-       ieee->sync_scan_hurryup = 1;
-
-       down(&ieee->wx_sem);
-
-       proto_started = ieee->proto_started;
-
-       if (wrqu->essid.length > IW_ESSID_MAX_SIZE) {
-               ret = -E2BIG;
-               goto out;
-       }
-
-       if (ieee->iw_mode == IW_MODE_MONITOR) {
-               ret = -1;
-               goto out;
-       }
-
-       if (proto_started)
-               ieee80211_stop_protocol(ieee);
-
-       /* this is just to be sure that the GET wx callback
-        * has consistent infos. not needed otherwise
-        */
-       spin_lock_irqsave(&ieee->lock, flags);
-
-       if (wrqu->essid.flags && wrqu->essid.length) {
-//YJ,modified,080819
-               len = (wrqu->essid.length < IW_ESSID_MAX_SIZE) ? (wrqu->essid.length) : IW_ESSID_MAX_SIZE;
-               memset(ieee->current_network.ssid, 0, ieee->current_network.ssid_len); //YJ,add,080819
-               strncpy(ieee->current_network.ssid, extra, len);
-               ieee->current_network.ssid_len = len;
-               ieee->ssid_set = 1;
-//YJ,modified,080819,end
-
-               //YJ,add,080819,for hidden ap
-               if (len == 0) {
-                       memset(ieee->current_network.bssid, 0, ETH_ALEN);
-                       ieee->current_network.capability = 0;
-               }
-               //YJ,add,080819,for hidden ap,end
-       } else {
-               ieee->ssid_set = 0;
-               ieee->current_network.ssid[0] = '\0';
-               ieee->current_network.ssid_len = 0;
-       }
-       //printk("==========set essid %s!\n",ieee->current_network.ssid);
-       spin_unlock_irqrestore(&ieee->lock, flags);
-
-       if (proto_started)
-               ieee80211_start_protocol(ieee);
-out:
-       up(&ieee->wx_sem);
-       return ret;
-}
-
-int ieee80211_wx_get_mode(struct ieee80211_device *ieee,
-                         struct iw_request_info *a, union iwreq_data *wrqu,
-                         char *b)
-{
-
-       wrqu->mode = ieee->iw_mode;
-       return 0;
-}
-
-int ieee80211_wx_set_rawtx(struct ieee80211_device *ieee,
-                          struct iw_request_info *info, union iwreq_data *wrqu,
-                          char *extra)
-{
-
-       int *parms = (int *)extra;
-       int enable = (parms[0] > 0);
-       short prev = ieee->raw_tx;
-
-       down(&ieee->wx_sem);
-
-       if (enable)
-               ieee->raw_tx = 1;
-       else
-               ieee->raw_tx = 0;
-
-       netdev_info(ieee->dev, "raw TX is %s\n",
-                   ieee->raw_tx ? "enabled" : "disabled");
-
-       if (ieee->iw_mode == IW_MODE_MONITOR) {
-               if (prev == 0 && ieee->raw_tx) {
-                       if (ieee->data_hard_resume)
-                               ieee->data_hard_resume(ieee->dev);
-
-                       netif_carrier_on(ieee->dev);
-               }
-
-               if (prev && ieee->raw_tx == 1)
-                       netif_carrier_off(ieee->dev);
-       }
-
-       up(&ieee->wx_sem);
-
-       return 0;
-}
-
-int ieee80211_wx_get_name(struct ieee80211_device *ieee,
-                         struct iw_request_info *info, union iwreq_data *wrqu,
-                         char *extra)
-{
-       strlcpy(wrqu->name, "802.11", IFNAMSIZ);
-       if (ieee->modulation & IEEE80211_CCK_MODULATION) {
-               strlcat(wrqu->name, "b", IFNAMSIZ);
-               if (ieee->modulation & IEEE80211_OFDM_MODULATION)
-                       strlcat(wrqu->name, "/g", IFNAMSIZ);
-       } else if (ieee->modulation & IEEE80211_OFDM_MODULATION)
-               strlcat(wrqu->name, "g", IFNAMSIZ);
-
-       if ((ieee->state == IEEE80211_LINKED) ||
-               (ieee->state == IEEE80211_LINKED_SCANNING))
-               strlcat(wrqu->name, "  link", IFNAMSIZ);
-       else if (ieee->state != IEEE80211_NOLINK)
-               strlcat(wrqu->name, " .....", IFNAMSIZ);
-
-
-       return 0;
-}
-
-
-/* this is mostly stolen from hostap */
-int ieee80211_wx_set_power(struct ieee80211_device *ieee,
-                          struct iw_request_info *info, union iwreq_data *wrqu,
-                          char *extra)
-{
-       int ret = 0;
-
-       if ((!ieee->sta_wake_up) ||
-           (!ieee->ps_request_tx_ack) ||
-           (!ieee->enter_sleep_state) ||
-           (!ieee->ps_is_queue_empty)) {
-
-               printk("ERROR. PS mode tried to be use but driver missed a callback\n\n");
-
-               return -1;
-       }
-
-       down(&ieee->wx_sem);
-
-       if (wrqu->power.disabled) {
-               ieee->ps = IEEE80211_PS_DISABLED;
-
-               goto exit;
-       }
-       switch (wrqu->power.flags & IW_POWER_MODE) {
-       case IW_POWER_UNICAST_R:
-               ieee->ps = IEEE80211_PS_UNICAST;
-
-               break;
-       case IW_POWER_ALL_R:
-               ieee->ps = IEEE80211_PS_UNICAST | IEEE80211_PS_MBCAST;
-               break;
-
-       case IW_POWER_ON:
-               ieee->ps = IEEE80211_PS_DISABLED;
-               break;
-
-       default:
-               ret = -EINVAL;
-               goto exit;
-       }
-
-       if (wrqu->power.flags & IW_POWER_TIMEOUT) {
-
-               ieee->ps_timeout = wrqu->power.value / 1000;
-               printk("Timeout %d\n", ieee->ps_timeout);
-       }
-
-       if (wrqu->power.flags & IW_POWER_PERIOD) {
-
-               ret = -EOPNOTSUPP;
-               goto exit;
-               //wrq->value / 1024;
-
-       }
-exit:
-       up(&ieee->wx_sem);
-       return ret;
-
-}
-
-/* this is stolen from hostap */
-int ieee80211_wx_get_power(struct ieee80211_device *ieee,
-                          struct iw_request_info *info, union iwreq_data *wrqu,
-                          char *extra)
-{
-       int ret = 0;
-
-       down(&ieee->wx_sem);
-
-       if (ieee->ps == IEEE80211_PS_DISABLED) {
-               wrqu->power.disabled = 1;
-               goto exit;
-       }
-
-       wrqu->power.disabled = 0;
-
-//     if ((wrqu->power.flags & IW_POWER_TYPE) == IW_POWER_TIMEOUT) {
-               wrqu->power.flags = IW_POWER_TIMEOUT;
-               wrqu->power.value = ieee->ps_timeout * 1000;
-//     } else {
-//             ret = -EOPNOTSUPP;
-//             goto exit;
-               //wrqu->power.flags = IW_POWER_PERIOD;
-               //wrqu->power.value = ieee->current_network.dtim_period *
-               //      ieee->current_network.beacon_interval * 1024;
-//     }
-
-
-       if (ieee->ps & IEEE80211_PS_MBCAST)
-               wrqu->power.flags |= IW_POWER_ALL_R;
-       else
-               wrqu->power.flags |= IW_POWER_UNICAST_R;
-
-exit:
-       up(&ieee->wx_sem);
-       return ret;
-
-}
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_tx.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_tx.c
deleted file mode 100644 (file)
index 0dc5ae4..0000000
+++ /dev/null
@@ -1,591 +0,0 @@
-/******************************************************************************
-
-  Copyright(c) 2003 - 2004 Intel Corporation. All rights reserved.
-
-  This program is free software; you can redistribute it and/or modify it
-  under the terms of version 2 of the GNU General Public License as
-  published by the Free Software Foundation.
-
-  This program is distributed in the hope that it will be useful, but WITHOUT
-  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-  more details.
-
-  You should have received a copy of the GNU General Public License along with
-  this program; if not, write to the Free Software Foundation, Inc., 59
-  Temple Place - Suite 330, Boston, MA  02111-1307, USA.
-
-  The full GNU General Public License is included in this distribution in the
-  file called LICENSE.
-
-  Contact Information:
-  James P. Ketrenos <ipw2100-admin@linux.intel.com>
-  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
-
-******************************************************************************
-
-  Few modifications for Realtek's Wi-Fi drivers by
-  Andrea Merello <andrea.merello@gmail.com>
-
-  A special thanks goes to Realtek for their support !
-
-******************************************************************************/
-
-#include <linux/compiler.h>
-#include <linux/errno.h>
-#include <linux/if_arp.h>
-#include <linux/in6.h>
-#include <linux/in.h>
-#include <linux/ip.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/netdevice.h>
-#include <linux/pci.h>
-#include <linux/proc_fs.h>
-#include <linux/skbuff.h>
-#include <linux/slab.h>
-#include <linux/tcp.h>
-#include <linux/types.h>
-#include <linux/wireless.h>
-#include <linux/etherdevice.h>
-#include <asm/uaccess.h>
-#include <linux/if_vlan.h>
-
-#include "ieee80211.h"
-
-
-/*
-
-
-802.11 Data Frame
-
-
-802.11 frame_contorl for data frames - 2 bytes
-     ,-----------------------------------------------------------------------------------------.
-bits | 0  |  1  |  2  |  3  |  4  |  5  |  6  |  7  |  8  |  9  |  a  |  b  |  c  |  d  |  e   |
-     |----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|------|
-val  | 0  |  0  |  0  |  1  |  x  |  0  |  0  |  0  |  1  |  0  |  x  |  x  |  x  |  x  |  x   |
-     |----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|------|
-desc | ^-ver-^  |  ^type-^  |  ^-----subtype-----^  | to  |from |more |retry| pwr |more |wep   |
-     |          |           | x=0 data,x=1 data+ack | DS  | DS  |frag |     | mgm |data |      |
-     '-----------------------------------------------------------------------------------------'
-                                                   /\
-                                                    |
-802.11 Data Frame                                   |
-           ,--------- 'ctrl' expands to >-----------'
-          |
-      ,--'---,-------------------------------------------------------------.
-Bytes |  2   |  2   |    6    |    6    |    6    |  2   | 0..2312 |   4  |
-      |------|------|---------|---------|---------|------|---------|------|
-Desc. | ctrl | dura |  DA/RA  |   TA    |    SA   | Sequ |  Frame  |  fcs |
-      |      | tion | (BSSID) |         |         | ence |  data   |      |
-      `--------------------------------------------------|         |------'
-Total: 28 non-data bytes                                 `----.----'
-                                                              |
-       .- 'Frame data' expands to <---------------------------'
-       |
-       V
-      ,---------------------------------------------------.
-Bytes |  1   |  1   |    1    |    3     |  2   |  0-2304 |
-      |------|------|---------|----------|------|---------|
-Desc. | SNAP | SNAP | Control |Eth Tunnel| Type | IP      |
-      | DSAP | SSAP |         |          |      | Packet  |
-      | 0xAA | 0xAA |0x03 (UI)|0x00-00-F8|      |         |
-      `-----------------------------------------|         |
-Total: 8 non-data bytes                         `----.----'
-                                                     |
-       .- 'IP Packet' expands, if WEP enabled, to <--'
-       |
-       V
-      ,-----------------------.
-Bytes |  4  |   0-2296  |  4  |
-      |-----|-----------|-----|
-Desc. | IV  | Encrypted | ICV |
-      |     | IP Packet |     |
-      `-----------------------'
-Total: 8 non-data bytes
-
-
-802.3 Ethernet Data Frame
-
-      ,-----------------------------------------.
-Bytes |   6   |   6   |  2   |  Variable |   4  |
-      |-------|-------|------|-----------|------|
-Desc. | Dest. | Source| Type | IP Packet |  fcs |
-      |  MAC  |  MAC  |      |           |      |
-      `-----------------------------------------'
-Total: 18 non-data bytes
-
-In the event that fragmentation is required, the incoming payload is split into
-N parts of size ieee->fts.  The first fragment contains the SNAP header and the
-remaining packets are just data.
-
-If encryption is enabled, each fragment payload size is reduced by enough space
-to add the prefix and postfix (IV and ICV totalling 8 bytes in the case of WEP)
-So if you have 1500 bytes of payload with ieee->fts set to 500 without
-encryption it will take 3 frames.  With WEP it will take 4 frames as the
-payload of each frame is reduced to 492 bytes.
-
-* SKB visualization
-*
-*  ,- skb->data
-* |
-* |    ETHERNET HEADER        ,-<-- PAYLOAD
-* |                           |     14 bytes from skb->data
-* |  2 bytes for Type --> ,T. |     (sizeof ethhdr)
-* |                       | | |
-* |,-Dest.--. ,--Src.---. | | |
-* |  6 bytes| | 6 bytes | | | |
-* v         | |         | | | |
-* 0         | v       1 | v | v           2
-* 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5
-*     ^     | ^         | ^ |
-*     |     | |         | | |
-*     |     | |         | `T' <---- 2 bytes for Type
-*     |     | |         |
-*     |     | '---SNAP--' <-------- 6 bytes for SNAP
-*     |     |
-*     `-IV--' <-------------------- 4 bytes for IV (WEP)
-*
-*      SNAP HEADER
-*
-*/
-
-static u8 P802_1H_OUI[P80211_OUI_LEN] = { 0x00, 0x00, 0xf8 };
-static u8 RFC1042_OUI[P80211_OUI_LEN] = { 0x00, 0x00, 0x00 };
-
-static inline int ieee80211_put_snap(u8 *data, u16 h_proto)
-{
-       struct ieee80211_snap_hdr *snap;
-       u8 *oui;
-
-       snap = (struct ieee80211_snap_hdr *)data;
-       snap->dsap = 0xaa;
-       snap->ssap = 0xaa;
-       snap->ctrl = 0x03;
-
-       if (h_proto == 0x8137 || h_proto == 0x80f3)
-               oui = P802_1H_OUI;
-       else
-               oui = RFC1042_OUI;
-       snap->oui[0] = oui[0];
-       snap->oui[1] = oui[1];
-       snap->oui[2] = oui[2];
-
-       *(u16 *)(data + SNAP_SIZE) = htons(h_proto);
-
-       return SNAP_SIZE + sizeof(u16);
-}
-
-int ieee80211_encrypt_fragment(struct ieee80211_device *ieee,
-                              struct sk_buff *frag, int hdr_len)
-{
-       struct ieee80211_crypt_data* crypt = ieee->crypt[ieee->tx_keyidx];
-       int res;
-
-       /*
-        * added to care about null crypt condition, to solve that system hangs
-        * when shared keys error
-        */
-       if (!crypt || !crypt->ops)
-               return -1;
-
-#ifdef CONFIG_IEEE80211_CRYPT_TKIP
-       struct ieee80211_hdr_4addr *header;
-
-       if (ieee->tkip_countermeasures &&
-           crypt && crypt->ops && strcmp(crypt->ops->name, "TKIP") == 0) {
-               header = (struct ieee80211_hdr_4addr *)frag->data;
-               if (net_ratelimit()) {
-                       netdev_dbg(ieee->dev, "TKIP countermeasures: dropped "
-                              "TX packet to %pM\n", header->addr1);
-               }
-               return -1;
-       }
-#endif
-       /*
-        * To encrypt, frame format is:
-        * IV (4 bytes), clear payload (including SNAP), ICV (4 bytes)
-        *
-        * PR: FIXME: Copied from hostap. Check fragmentation/MSDU/MPDU
-        * encryption.
-        *
-        * Host-based IEEE 802.11 fragmentation for TX is not yet supported, so
-        * call both MSDU and MPDU encryption functions from here.
-        */
-       atomic_inc(&crypt->refcnt);
-       res = 0;
-       if (crypt->ops->encrypt_msdu)
-               res = crypt->ops->encrypt_msdu(frag, hdr_len, crypt->priv);
-       if (res == 0 && crypt->ops->encrypt_mpdu)
-               res = crypt->ops->encrypt_mpdu(frag, hdr_len, crypt->priv);
-
-       atomic_dec(&crypt->refcnt);
-       if (res < 0) {
-               netdev_info(ieee->dev, "Encryption failed: len=%d.\n", frag->len);
-               ieee->ieee_stats.tx_discards++;
-               return -1;
-       }
-
-       return 0;
-}
-
-
-void ieee80211_txb_free(struct ieee80211_txb *txb)
-{
-       int i;
-       if (unlikely(!txb))
-               return;
-       for (i = 0; i < txb->nr_frags; i++)
-               if (txb->fragments[i])
-                       dev_kfree_skb_any(txb->fragments[i]);
-       kfree(txb);
-}
-
-static struct ieee80211_txb *ieee80211_alloc_txb(int nr_frags, int txb_size,
-                                                gfp_t gfp_mask)
-{
-       struct ieee80211_txb *txb;
-       int i;
-       txb = kmalloc(
-               sizeof(struct ieee80211_txb) + (sizeof(u8 *) * nr_frags),
-               gfp_mask);
-       if (!txb)
-               return NULL;
-
-       memset(txb, 0, sizeof(struct ieee80211_txb));
-       txb->nr_frags = nr_frags;
-       txb->frag_size = txb_size;
-
-       for (i = 0; i < nr_frags; i++) {
-               txb->fragments[i] = dev_alloc_skb(txb_size);
-               if (unlikely(!txb->fragments[i])) {
-                       i--;
-                       break;
-               }
-       }
-       if (unlikely(i != nr_frags)) {
-               while (i >= 0)
-                       dev_kfree_skb_any(txb->fragments[i--]);
-               kfree(txb);
-               return NULL;
-       }
-       return txb;
-}
-
-/*
- * Classify the to-be send data packet
- * Need to acquire the sent queue index.
- */
-static int ieee80211_classify(struct sk_buff *skb,
-                             struct ieee80211_network *network)
-{
-       struct ether_header *eh = (struct ether_header *)skb->data;
-       unsigned int wme_UP = 0;
-
-       if (!network->QoS_Enable) {
-               skb->priority = 0;
-               return(wme_UP);
-       }
-
-       if (eh->ether_type == __constant_htons(ETHERTYPE_IP)) {
-               const struct iphdr *ih = (struct iphdr *)(skb->data +
-                   sizeof(struct ether_header));
-               wme_UP = (ih->tos >> 5)&0x07;
-       } else if (vlan_tx_tag_present(skb)) {/* vtag packet */
-#ifndef VLAN_PRI_SHIFT
-#define VLAN_PRI_SHIFT  13              /* Shift to find VLAN user priority */
-#define VLAN_PRI_MASK   7               /* Mask for user priority bits in VLAN */
-#endif
-               u32 tag = vlan_tx_tag_get(skb);
-               wme_UP = (tag >> VLAN_PRI_SHIFT) & VLAN_PRI_MASK;
-       } else if (ETH_P_PAE ==  ntohs(((struct ethhdr *)skb->data)->h_proto)) {
-               wme_UP = 7;
-       }
-
-       skb->priority = wme_UP;
-       return(wme_UP);
-}
-
-/* SKBs are added to the ieee->tx_queue. */
-int ieee80211_rtl_xmit(struct sk_buff *skb, struct net_device *dev)
-{
-       struct ieee80211_device *ieee = netdev_priv(dev);
-       struct ieee80211_txb *txb = NULL;
-       struct ieee80211_hdr_3addrqos *frag_hdr;
-       int i, bytes_per_frag, nr_frags, bytes_last_frag, frag_size;
-       unsigned long flags;
-       struct net_device_stats *stats = &ieee->stats;
-       int ether_type, encrypt;
-       int bytes, fc, qos_ctl, hdr_len;
-       struct sk_buff *skb_frag;
-       struct ieee80211_hdr_3addrqos header = { /* Ensure zero initialized */
-               .duration_id = 0,
-               .seq_ctl = 0,
-               .qos_ctl = 0
-       };
-       u8 dest[ETH_ALEN], src[ETH_ALEN];
-
-       struct ieee80211_crypt_data* crypt;
-
-       spin_lock_irqsave(&ieee->lock, flags);
-
-       /*
-        * If there is no driver handler to take the TXB, don't bother
-        * creating it...
-        */
-       if ((!ieee->hard_start_xmit &&
-            !(ieee->softmac_features & IEEE_SOFTMAC_TX_QUEUE)) ||
-           ((!ieee->softmac_data_hard_start_xmit &&
-             (ieee->softmac_features & IEEE_SOFTMAC_TX_QUEUE)))) {
-               netdev_warn(ieee->dev, "No xmit handler.\n");
-               goto success;
-       }
-
-       ieee80211_classify(skb,&ieee->current_network);
-       if (likely(ieee->raw_tx == 0)){
-
-               if (unlikely(skb->len < SNAP_SIZE + sizeof(u16))) {
-                       netdev_warn(ieee->dev, "skb too small (%d).\n", skb->len);
-                       goto success;
-               }
-
-               ether_type = ntohs(((struct ethhdr *)skb->data)->h_proto);
-
-               crypt = ieee->crypt[ieee->tx_keyidx];
-
-               encrypt = !(ether_type == ETH_P_PAE && ieee->ieee802_1x) &&
-                       ieee->host_encrypt && crypt && crypt->ops;
-
-               if (!encrypt && ieee->ieee802_1x &&
-               ieee->drop_unencrypted && ether_type != ETH_P_PAE) {
-                       stats->tx_dropped++;
-                       goto success;
-               }
-
-       #ifdef CONFIG_IEEE80211_DEBUG
-               if (crypt && !encrypt && ether_type == ETH_P_PAE) {
-                       struct eapol *eap = (struct eapol *)(skb->data +
-                               sizeof(struct ethhdr) - SNAP_SIZE - sizeof(u16));
-                       IEEE80211_DEBUG_EAP("TX: IEEE 802.11 EAPOL frame: %s\n",
-                               eap_get_type(eap->type));
-               }
-       #endif
-
-               /* Save source and destination addresses */
-               memcpy(&dest, skb->data, ETH_ALEN);
-               memcpy(&src, skb->data+ETH_ALEN, ETH_ALEN);
-
-               /* Advance the SKB to the start of the payload */
-               skb_pull(skb, sizeof(struct ethhdr));
-
-               /* Determine total amount of storage required for TXB packets */
-               bytes = skb->len + SNAP_SIZE + sizeof(u16);
-
-               if (ieee->current_network.QoS_Enable) {
-                       if (encrypt)
-                               fc = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_QOS_DATA |
-                                       IEEE80211_FCTL_WEP;
-                       else
-                               fc = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_QOS_DATA;
-
-               } else {
-                       if (encrypt)
-                               fc = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_DATA |
-                                       IEEE80211_FCTL_WEP;
-                       else
-                               fc = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_DATA;
-               }
-
-               if (ieee->iw_mode == IW_MODE_INFRA) {
-                       fc |= IEEE80211_FCTL_TODS;
-                       /* To DS: Addr1 = BSSID, Addr2 = SA, Addr3 = DA */
-                       memcpy(&header.addr1, ieee->current_network.bssid, ETH_ALEN);
-                       memcpy(&header.addr2, &src, ETH_ALEN);
-                       memcpy(&header.addr3, &dest, ETH_ALEN);
-               } else if (ieee->iw_mode == IW_MODE_ADHOC) {
-                       /*
-                        * not From/To DS: Addr1 = DA, Addr2 = SA,
-                        * Addr3 = BSSID
-                        */
-                       memcpy(&header.addr1, dest, ETH_ALEN);
-                       memcpy(&header.addr2, src, ETH_ALEN);
-                       memcpy(&header.addr3, ieee->current_network.bssid, ETH_ALEN);
-               }
-               header.frame_ctl = cpu_to_le16(fc);
-
-               /*
-                * Determine fragmentation size based on destination (multicast
-                * and broadcast are not fragmented)
-                */
-               if (is_multicast_ether_addr(header.addr1)) {
-                       frag_size = MAX_FRAG_THRESHOLD;
-                       qos_ctl = QOS_CTL_NOTCONTAIN_ACK;
-               } else {
-                       /* default:392 */
-                       frag_size = ieee->fts;
-                       qos_ctl = 0;
-               }
-
-               if (ieee->current_network.QoS_Enable)   {
-                       hdr_len = IEEE80211_3ADDR_LEN + 2;
-                       /* skb->priority is set in the ieee80211_classify() */
-                       qos_ctl |= skb->priority;
-                       header.qos_ctl = cpu_to_le16(qos_ctl);
-               } else {
-                       hdr_len = IEEE80211_3ADDR_LEN;
-               }
-
-               /*
-                * Determine amount of payload per fragment.  Regardless of if
-                * this stack is providing the full 802.11 header, one will
-                * eventually be affixed to this fragment -- so we must account
-                * for it when determining the amount of payload space.
-                */
-               bytes_per_frag = frag_size - hdr_len;
-               if (ieee->config &
-               (CFG_IEEE80211_COMPUTE_FCS | CFG_IEEE80211_RESERVE_FCS))
-                       bytes_per_frag -= IEEE80211_FCS_LEN;
-
-               /* Each fragment may need to have room for encryption pre/postfix */
-               if (encrypt)
-                       bytes_per_frag -= crypt->ops->extra_prefix_len +
-                               crypt->ops->extra_postfix_len;
-
-               /*
-                * Number of fragments is the total bytes_per_frag /
-                * payload_per_fragment
-                */
-               nr_frags = bytes / bytes_per_frag;
-               bytes_last_frag = bytes % bytes_per_frag;
-               if (bytes_last_frag)
-                       nr_frags++;
-               else
-                       bytes_last_frag = bytes_per_frag;
-
-               /*
-                * When we allocate the TXB we allocate enough space for the 
-                * reserve and full fragment bytes (bytes_per_frag doesn't
-                * include prefix, postfix, header, FCS, etc.)
-                */
-               txb = ieee80211_alloc_txb(nr_frags, frag_size, GFP_ATOMIC);
-               if (unlikely(!txb)) {
-                       netdev_warn(ieee->dev, "Could not allocate TXB\n");
-                       goto failed;
-               }
-               txb->encrypted = encrypt;
-               txb->payload_size = bytes;
-
-               for (i = 0; i < nr_frags; i++) {
-                       skb_frag = txb->fragments[i];
-                       skb_frag->priority = UP2AC(skb->priority);
-                       if (encrypt)
-                               skb_reserve(skb_frag, crypt->ops->extra_prefix_len);
-
-                       frag_hdr = (struct ieee80211_hdr_3addrqos *)skb_put(
-                               skb_frag, hdr_len);
-                       memcpy(frag_hdr, &header, hdr_len);
-
-                       /*
-                        * If this is not the last fragment, then add the MOREFRAGS
-                        * bit to the frame control
-                        */
-                       if (i != nr_frags - 1) {
-                               frag_hdr->frame_ctl = cpu_to_le16(
-                                       fc | IEEE80211_FCTL_MOREFRAGS);
-                               bytes = bytes_per_frag;
-
-                       } else {
-                               /* The last fragment takes the remaining length */
-                               bytes = bytes_last_frag;
-                       }
-                       if (ieee->current_network.QoS_Enable) {
-                               /*
-                                * add 1 only indicate to corresponding seq
-                                * number control 2006/7/12
-                                */
-                               frag_hdr->seq_ctl = cpu_to_le16(
-                                       ieee->seq_ctrl[UP2AC(skb->priority)+1]<<4 | i);
-                       } else {
-                               frag_hdr->seq_ctl = cpu_to_le16(
-                                       ieee->seq_ctrl[0]<<4 | i);
-                       }
-
-                       /* Put a SNAP header on the first fragment */
-                       if (i == 0) {
-                               ieee80211_put_snap(
-                                       skb_put(skb_frag, SNAP_SIZE + sizeof(u16)),
-                                       ether_type);
-                               bytes -= SNAP_SIZE + sizeof(u16);
-                       }
-
-                       memcpy(skb_put(skb_frag, bytes), skb->data, bytes);
-
-                       /* Advance the SKB... */
-                       skb_pull(skb, bytes);
-
-                       /*
-                        * Encryption routine will move the header forward in
-                        * order to insert the IV between the header and the
-                        * payload
-                        */
-                       if (encrypt)
-                               ieee80211_encrypt_fragment(ieee, skb_frag, hdr_len);
-                       if (ieee->config &
-                       (CFG_IEEE80211_COMPUTE_FCS | CFG_IEEE80211_RESERVE_FCS))
-                               skb_put(skb_frag, 4);
-               }
-               /* Advance sequence number in data frame. */
-               if (ieee->current_network.QoS_Enable) {
-                       if (ieee->seq_ctrl[UP2AC(skb->priority) + 1] == 0xFFF)
-                               ieee->seq_ctrl[UP2AC(skb->priority) + 1] = 0;
-                       else
-                               ieee->seq_ctrl[UP2AC(skb->priority) + 1]++;
-               } else {
-                       if (ieee->seq_ctrl[0] == 0xFFF)
-                               ieee->seq_ctrl[0] = 0;
-                       else
-                               ieee->seq_ctrl[0]++;
-               }
-       } else {
-               if (unlikely(skb->len < sizeof(struct ieee80211_hdr_3addr))) {
-                       netdev_warn(ieee->dev, "skb too small (%d).\n", skb->len);
-                       goto success;
-               }
-
-               txb = ieee80211_alloc_txb(1, skb->len, GFP_ATOMIC);
-               if (!txb) {
-                       netdev_warn(ieee->dev, "Could not allocate TXB\n");
-                       goto failed;
-               }
-
-               txb->encrypted = 0;
-               txb->payload_size = skb->len;
-               memcpy(skb_put(txb->fragments[0], skb->len), skb->data, skb->len);
-       }
-
- success:
-       spin_unlock_irqrestore(&ieee->lock, flags);
-               dev_kfree_skb_any(skb);
-       if (txb) {
-               if (ieee->softmac_features & IEEE_SOFTMAC_TX_QUEUE) {
-                       ieee80211_softmac_xmit(txb, ieee);
-               } else {
-                       if ((*ieee->hard_start_xmit)(txb, dev) == 0) {
-                               stats->tx_packets++;
-                               stats->tx_bytes += txb->payload_size;
-                               return NETDEV_TX_OK;
-                       }
-                       ieee80211_txb_free(txb);
-               }
-       }
-
-       return NETDEV_TX_OK;
-
- failed:
-       spin_unlock_irqrestore(&ieee->lock, flags);
-       netif_stop_queue(dev);
-       stats->tx_errors++;
-       return NETDEV_TX_BUSY;
-
-}
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_wx.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_wx.c
deleted file mode 100644 (file)
index 07c3f71..0000000
+++ /dev/null
@@ -1,713 +0,0 @@
-/*
- *  Copyright(c) 2004 Intel Corporation. All rights reserved.
- *
- * Portions of this file are based on the WEP enablement code provided by the
- * Host AP project hostap-drivers v0.1.3
- * Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
- * <jkmaline@cc.hut.fi>
- * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston, MA  02111-1307, USA.
- *
- * The full GNU General Public License is included in this distribution in the
- * file called LICENSE.
- *
- * Contact Information:
- * James P. Ketrenos <ipw2100-admin@linux.intel.com>
- * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
- */
-
-#include <linux/wireless.h>
-#include <linux/kmod.h>
-#include <linux/slab.h>
-#include <linux/module.h>
-#include <linux/etherdevice.h>
-
-#include "ieee80211.h"
-static const char *ieee80211_modes[] = {
-       "?", "a", "b", "ab", "g", "ag", "bg", "abg"
-};
-
-#define MAX_CUSTOM_LEN 64
-static inline char *rtl818x_translate_scan(struct ieee80211_device *ieee,
-                                          char *start, char *stop,
-                                          struct ieee80211_network *network,
-                                          struct iw_request_info *info)
-{
-       char custom[MAX_CUSTOM_LEN];
-       char *p;
-       struct iw_event iwe;
-       int i, j;
-       u8 max_rate, rate;
-
-       /* First entry *MUST* be the AP MAC address */
-       iwe.cmd = SIOCGIWAP;
-       iwe.u.ap_addr.sa_family = ARPHRD_ETHER;
-       ether_addr_copy(iwe.u.ap_addr.sa_data, network->bssid);
-       start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_ADDR_LEN);
-
-       /* Remaining entries will be displayed in the order we provide them */
-
-       /* Add the ESSID */
-       iwe.cmd = SIOCGIWESSID;
-       iwe.u.data.flags = 1;
-       if (network->ssid_len == 0) {
-               iwe.u.data.length = sizeof("<hidden>");
-               start = iwe_stream_add_point(info, start, stop, &iwe, "<hidden>");
-       } else {
-               iwe.u.data.length = min_t(u8, network->ssid_len, 32);
-               start = iwe_stream_add_point(info, start, stop, &iwe, network->ssid);
-       }
-       /* Add the protocol name */
-       iwe.cmd = SIOCGIWNAME;
-       snprintf(iwe.u.name, IFNAMSIZ, "IEEE 802.11%s", ieee80211_modes[network->mode]);
-       start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_CHAR_LEN);
-
-       /* Add mode */
-       iwe.cmd = SIOCGIWMODE;
-       if (network->capability &
-           (WLAN_CAPABILITY_BSS | WLAN_CAPABILITY_IBSS)) {
-               if (network->capability & WLAN_CAPABILITY_BSS)
-                       iwe.u.mode = IW_MODE_MASTER;
-               else
-                       iwe.u.mode = IW_MODE_ADHOC;
-
-               start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_UINT_LEN);
-       }
-
-       /* Add frequency/channel */
-       iwe.cmd = SIOCGIWFREQ;
-       iwe.u.freq.m = network->channel;
-       iwe.u.freq.e = 0;
-       iwe.u.freq.i = 0;
-       start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_FREQ_LEN);
-
-       /* Add encryption capability */
-       iwe.cmd = SIOCGIWENCODE;
-       if (network->capability & WLAN_CAPABILITY_PRIVACY)
-               iwe.u.data.flags = IW_ENCODE_ENABLED | IW_ENCODE_NOKEY;
-       else
-               iwe.u.data.flags = IW_ENCODE_DISABLED;
-       iwe.u.data.length = 0;
-       start = iwe_stream_add_point(info, start, stop, &iwe, network->ssid);
-
-       /* Add basic and extended rates */
-       max_rate = 0;
-       p = custom;
-       p += snprintf(p, MAX_CUSTOM_LEN - (p - custom), " Rates (Mb/s): ");
-       for (i = 0, j = 0; i < network->rates_len; ) {
-               if (j < network->rates_ex_len &&
-                   ((network->rates_ex[j] & 0x7F) <
-                    (network->rates[i] & 0x7F)))
-                       rate = network->rates_ex[j++] & 0x7F;
-               else
-                       rate = network->rates[i++] & 0x7F;
-               if (rate > max_rate)
-                       max_rate = rate;
-               p += snprintf(p, MAX_CUSTOM_LEN - (p - custom),
-                             "%d%s ", rate >> 1, (rate & 1) ? ".5" : "");
-       }
-       for (; j < network->rates_ex_len; j++) {
-               rate = network->rates_ex[j] & 0x7F;
-               p += snprintf(p, MAX_CUSTOM_LEN - (p - custom),
-                             "%d%s ", rate >> 1, (rate & 1) ? ".5" : "");
-               if (rate > max_rate)
-                       max_rate = rate;
-       }
-
-       iwe.cmd = SIOCGIWRATE;
-       iwe.u.bitrate.fixed = iwe.u.bitrate.disabled = 0;
-       iwe.u.bitrate.value = max_rate * 500000;
-       start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_PARAM_LEN);
-
-       iwe.cmd = IWEVCUSTOM;
-       iwe.u.data.length = p - custom;
-       if (iwe.u.data.length)
-               start = iwe_stream_add_point(info, start, stop, &iwe, custom);
-
-       /* Add quality statistics */
-       /* TODO: Fix these values... */
-       if (network->stats.signal == 0 || network->stats.rssi == 0)
-               netdev_info(ieee->dev, "========>signal:%d, rssi:%d\n",
-                           network->stats.signal, network->stats.rssi);
-       iwe.cmd = IWEVQUAL;
-       iwe.u.qual.qual = network->stats.signalstrength;
-       iwe.u.qual.level = network->stats.signal;
-       iwe.u.qual.noise = network->stats.noise;
-       iwe.u.qual.updated = network->stats.mask & IEEE80211_STATMASK_WEMASK;
-       if (!(network->stats.mask & IEEE80211_STATMASK_RSSI))
-               iwe.u.qual.updated |= IW_QUAL_LEVEL_INVALID;
-       if (!(network->stats.mask & IEEE80211_STATMASK_NOISE))
-               iwe.u.qual.updated |= IW_QUAL_NOISE_INVALID;
-       if (!(network->stats.mask & IEEE80211_STATMASK_SIGNAL))
-               iwe.u.qual.updated |= IW_QUAL_QUAL_INVALID;
-       iwe.u.qual.updated = 7;
-       start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_QUAL_LEN);
-
-       iwe.cmd = IWEVCUSTOM;
-       p = custom;
-
-       iwe.u.data.length = p - custom;
-       if (iwe.u.data.length)
-               start = iwe_stream_add_point(info, start, stop, &iwe, custom);
-
-       memset(&iwe, 0, sizeof(iwe));
-       if (network->wpa_ie_len) {
-               char buf[MAX_WPA_IE_LEN];
-               memcpy(buf, network->wpa_ie, network->wpa_ie_len);
-               iwe.cmd = IWEVGENIE;
-               iwe.u.data.length = network->wpa_ie_len;
-               start = iwe_stream_add_point(info, start, stop, &iwe, buf);
-       }
-
-       memset(&iwe, 0, sizeof(iwe));
-       if (network->rsn_ie_len) {
-               char buf[MAX_WPA_IE_LEN];
-               memcpy(buf, network->rsn_ie, network->rsn_ie_len);
-               iwe.cmd = IWEVGENIE;
-               iwe.u.data.length = network->rsn_ie_len;
-               start = iwe_stream_add_point(info, start, stop, &iwe, buf);
-       }
-
-       /* Add EXTRA: Age to display seconds since last beacon/probe response
-        * for given network.
-        */
-       iwe.cmd = IWEVCUSTOM;
-       p = custom;
-       p += snprintf(p, MAX_CUSTOM_LEN - (p - custom),
-                     " Last beacon: %lums ago", (jiffies - network->last_scanned) / (HZ / 100));
-       iwe.u.data.length = p - custom;
-       if (iwe.u.data.length)
-               start = iwe_stream_add_point(info, start, stop, &iwe, custom);
-
-       return start;
-}
-
-int ieee80211_wx_get_scan(struct ieee80211_device *ieee,
-                         struct iw_request_info *info,
-                         union iwreq_data *wrqu, char *extra)
-{
-       struct ieee80211_network *network;
-       unsigned long flags;
-       int err = 0;
-       char *ev = extra;
-       char *stop = ev + wrqu->data.length;
-       int i = 0;
-
-       IEEE80211_DEBUG_WX("Getting scan\n");
-       down(&ieee->wx_sem);
-       spin_lock_irqsave(&ieee->lock, flags);
-
-       if (!ieee->bHwRadioOff) {
-               list_for_each_entry(network, &ieee->network_list, list) {
-                       i++;
-
-                       if ((stop-ev) < 200) {
-                               err = -E2BIG;
-                               break;
-                       }
-                       if (ieee->scan_age == 0 ||
-                           time_after(network->last_scanned + ieee->scan_age, jiffies)) {
-                               ev = rtl818x_translate_scan(ieee, ev, stop, network, info);
-                       } else
-                               IEEE80211_DEBUG_SCAN(
-                                       "Not showing network '%s ("
-                                       "%pM)' due to age (%lums).\n",
-                                       escape_essid(network->ssid,
-                                                    network->ssid_len),
-                                       network->bssid,
-                                       (jiffies - network->last_scanned) / (HZ / 100));
-               }
-       }
-       spin_unlock_irqrestore(&ieee->lock, flags);
-       up(&ieee->wx_sem);
-       wrqu->data.length = ev -  extra;
-       wrqu->data.flags = 0;
-       IEEE80211_DEBUG_WX("exit: %d networks returned.\n", i);
-
-       return err;
-}
-
-int ieee80211_wx_set_encode(struct ieee80211_device *ieee,
-                           struct iw_request_info *info,
-                           union iwreq_data *wrqu, char *keybuf)
-{
-       struct iw_point *erq = &(wrqu->encoding);
-       struct net_device *dev = ieee->dev;
-       struct ieee80211_security sec = {
-               .flags = 0
-       };
-       int i, key, key_provided, len;
-       struct ieee80211_crypt_data **crypt;
-
-       IEEE80211_DEBUG_WX("SET_ENCODE\n");
-
-       key = erq->flags & IW_ENCODE_INDEX;
-       if (key) {
-               if (key > WEP_KEYS)
-                       return -EINVAL;
-               key--;
-               key_provided = 1;
-       } else {
-               key_provided = 0;
-               key = ieee->tx_keyidx;
-       }
-
-       IEEE80211_DEBUG_WX("Key: %d [%s]\n", key, key_provided ?
-                          "provided" : "default");
-
-       crypt = &ieee->crypt[key];
-
-       if (erq->flags & IW_ENCODE_DISABLED) {
-               if (key_provided && *crypt) {
-                       IEEE80211_DEBUG_WX("Disabling encryption on key %d.\n",
-                                          key);
-                       ieee80211_crypt_delayed_deinit(ieee, crypt);
-               } else
-                       IEEE80211_DEBUG_WX("Disabling encryption.\n");
-
-               /* Check all the keys to see if any are still configured,
-                * and if no key index was provided, de-init them all.
-                */
-               for (i = 0; i < WEP_KEYS; i++) {
-                       if (ieee->crypt[i] != NULL) {
-                               if (key_provided)
-                                       break;
-                               ieee80211_crypt_delayed_deinit(
-                                       ieee, &ieee->crypt[i]);
-                       }
-               }
-
-               if (i == WEP_KEYS) {
-                       sec.enabled = 0;
-                       sec.level = SEC_LEVEL_0;
-                       sec.flags |= SEC_ENABLED | SEC_LEVEL;
-               }
-
-               goto done;
-       }
-
-       sec.enabled = 1;
-       sec.flags |= SEC_ENABLED;
-
-       if (*crypt != NULL && (*crypt)->ops != NULL &&
-           strcmp((*crypt)->ops->name, "WEP") != 0) {
-               /* changing to use WEP; deinit previously used algorithm
-                * on this key.
-                */
-               ieee80211_crypt_delayed_deinit(ieee, crypt);
-       }
-
-       if (*crypt == NULL) {
-               struct ieee80211_crypt_data *new_crypt;
-
-               /* take WEP into use */
-               new_crypt = kzalloc(sizeof(struct ieee80211_crypt_data),
-                                   GFP_KERNEL);
-               if (new_crypt == NULL)
-                       return -ENOMEM;
-               new_crypt->ops = ieee80211_get_crypto_ops("WEP");
-               if (!new_crypt->ops)
-                       new_crypt->ops = ieee80211_get_crypto_ops("WEP");
-
-               if (new_crypt->ops)
-                       new_crypt->priv = new_crypt->ops->init(key);
-
-               if (!new_crypt->ops || !new_crypt->priv) {
-                       kfree(new_crypt);
-                       new_crypt = NULL;
-
-                       netdev_warn(ieee->dev,
-                                   "could not initialize WEP: load module ieee80211_crypt_wep\n");
-                       return -EOPNOTSUPP;
-               }
-               *crypt = new_crypt;
-       }
-
-       /* If a new key was provided, set it up */
-       if (erq->length > 0) {
-               len = erq->length <= 5 ? 5 : 13;
-               memcpy(sec.keys[key], keybuf, erq->length);
-               if (len > erq->length)
-                       memset(sec.keys[key] + erq->length, 0,
-                              len - erq->length);
-               IEEE80211_DEBUG_WX("Setting key %d to '%s' (%d:%d bytes)\n",
-                                  key, escape_essid(sec.keys[key], len),
-                                  erq->length, len);
-               sec.key_sizes[key] = len;
-               (*crypt)->ops->set_key(sec.keys[key], len, NULL,
-                                      (*crypt)->priv);
-               sec.flags |= (1 << key);
-               /* This ensures a key will be activated if no key is
-                * explicitly set.
-                */
-               if (key == sec.active_key)
-                       sec.flags |= SEC_ACTIVE_KEY;
-               ieee->tx_keyidx = key;
-       } else {
-               len = (*crypt)->ops->get_key(sec.keys[key], WEP_KEY_LEN,
-                                            NULL, (*crypt)->priv);
-               if (len == 0) {
-                       /* Set a default key of all 0 */
-                       IEEE80211_DEBUG_WX("Setting key %d to all zero.\n",
-                                          key);
-                       memset(sec.keys[key], 0, 13);
-                       (*crypt)->ops->set_key(sec.keys[key], 13, NULL,
-                                              (*crypt)->priv);
-                       sec.key_sizes[key] = 13;
-                       sec.flags |= (1 << key);
-               }
-
-               /* No key data - just set the default TX key index */
-               if (key_provided) {
-                       IEEE80211_DEBUG_WX(
-                               "Setting key %d to default Tx key.\n", key);
-                       ieee->tx_keyidx = key;
-                       sec.active_key = key;
-                       sec.flags |= SEC_ACTIVE_KEY;
-               }
-       }
-
- done:
-       ieee->open_wep = !(erq->flags & IW_ENCODE_RESTRICTED);
-       sec.auth_mode = ieee->open_wep ? WLAN_AUTH_OPEN : WLAN_AUTH_SHARED_KEY;
-       sec.flags |= SEC_AUTH_MODE;
-       IEEE80211_DEBUG_WX("Auth: %s\n", sec.auth_mode == WLAN_AUTH_OPEN ?
-                          "OPEN" : "SHARED KEY");
-
-       /* For now we just support WEP, so only set that security level...
-        * TODO: When WPA is added this is one place that needs to change
-        */
-       sec.flags |= SEC_LEVEL;
-       sec.level = SEC_LEVEL_1; /* 40 and 104 bit WEP */
-
-       if (ieee->set_security)
-               ieee->set_security(dev, &sec);
-
-       /* Do not reset port if card is in Managed mode since resetting will
-        * generate new IEEE 802.11 authentication which may end up in looping
-        * with IEEE 802.1X.  If your hardware requires a reset after WEP
-        * configuration (for example... Prism2), implement the reset_port in
-        * the callbacks structures used to initialize the 802.11 stack.
-        */
-       if (ieee->reset_on_keychange &&
-           ieee->iw_mode != IW_MODE_INFRA &&
-           ieee->reset_port && ieee->reset_port(dev)) {
-               netdev_dbg(ieee->dev, "reset_port failed\n");
-               return -EINVAL;
-       }
-       return 0;
-}
-
-int ieee80211_wx_get_encode(struct ieee80211_device *ieee,
-                           struct iw_request_info *info,
-                           union iwreq_data *wrqu, char *keybuf)
-{
-       struct iw_point *erq = &(wrqu->encoding);
-       int len, key;
-       struct ieee80211_crypt_data *crypt;
-
-       IEEE80211_DEBUG_WX("GET_ENCODE\n");
-
-       if (ieee->iw_mode == IW_MODE_MONITOR)
-               return -1;
-
-       key = erq->flags & IW_ENCODE_INDEX;
-       if (key) {
-               if (key > WEP_KEYS)
-                       return -EINVAL;
-               key--;
-       } else
-               key = ieee->tx_keyidx;
-
-       crypt = ieee->crypt[key];
-       erq->flags = key + 1;
-
-       if (crypt == NULL || crypt->ops == NULL) {
-               erq->length = 0;
-               erq->flags |= IW_ENCODE_DISABLED;
-               return 0;
-       }
-
-       if (strcmp(crypt->ops->name, "WEP") != 0) {
-               /* only WEP is supported with wireless extensions, so just
-                * report that encryption is used.
-                */
-               erq->length = 0;
-               erq->flags |= IW_ENCODE_ENABLED;
-               return 0;
-       }
-
-       len = crypt->ops->get_key(keybuf, WEP_KEY_LEN, NULL, crypt->priv);
-       erq->length = (len >= 0 ? len : 0);
-
-       erq->flags |= IW_ENCODE_ENABLED;
-
-       if (ieee->open_wep)
-               erq->flags |= IW_ENCODE_OPEN;
-       else
-               erq->flags |= IW_ENCODE_RESTRICTED;
-
-       return 0;
-}
-
-int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee,
-                               struct iw_request_info *info,
-                               union iwreq_data *wrqu, char *extra)
-{
-       struct net_device *dev = ieee->dev;
-       struct iw_point *encoding = &wrqu->encoding;
-       struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
-       int i, idx, ret = 0;
-       int group_key = 0;
-       const char *alg;
-       struct ieee80211_crypto_ops *ops;
-       struct ieee80211_crypt_data **crypt;
-
-       struct ieee80211_security sec = {
-               .flags = 0,
-       };
-       idx = encoding->flags & IW_ENCODE_INDEX;
-       if (idx) {
-               if (idx < 1 || idx > WEP_KEYS)
-                       return -EINVAL;
-               idx--;
-       } else
-               idx = ieee->tx_keyidx;
-
-       if (ext->ext_flags & IW_ENCODE_EXT_GROUP_KEY) {
-               crypt = &ieee->crypt[idx];
-               group_key = 1;
-       } else {
-               /* some Cisco APs use idx>0 for unicast in dynamic WEP */
-               if (idx != 0 && ext->alg != IW_ENCODE_ALG_WEP)
-                       return -EINVAL;
-               if (ieee->iw_mode == IW_MODE_INFRA)
-                       crypt = &ieee->crypt[idx];
-               else
-                       return -EINVAL;
-       }
-
-       sec.flags |= SEC_ENABLED;
-       if ((encoding->flags & IW_ENCODE_DISABLED) ||
-           ext->alg == IW_ENCODE_ALG_NONE) {
-               if (*crypt)
-                       ieee80211_crypt_delayed_deinit(ieee, crypt);
-
-               for (i = 0; i < WEP_KEYS; i++)
-                       if (ieee->crypt[i] != NULL)
-                               break;
-
-               if (i == WEP_KEYS) {
-                       sec.enabled = 0;
-                       sec.level = SEC_LEVEL_0;
-                       sec.flags |= SEC_LEVEL;
-               }
-               goto done;
-       }
-
-       sec.enabled = 1;
-
-       switch (ext->alg) {
-       case IW_ENCODE_ALG_WEP:
-               alg = "WEP";
-               break;
-       case IW_ENCODE_ALG_TKIP:
-               alg = "TKIP";
-               break;
-       case IW_ENCODE_ALG_CCMP:
-               alg = "CCMP";
-               break;
-       default:
-               IEEE80211_DEBUG_WX("%s: unknown crypto alg %d\n",
-                                  dev->name, ext->alg);
-               ret = -EINVAL;
-               goto done;
-       }
-
-       ops = ieee80211_get_crypto_ops(alg);
-       if (ops == NULL)
-               ops = ieee80211_get_crypto_ops(alg);
-       if (ops == NULL) {
-               IEEE80211_DEBUG_WX("%s: unknown crypto alg %d\n",
-                                  dev->name, ext->alg);
-               netdev_err(ieee->dev, "========>unknown crypto alg %d\n",
-                          ext->alg);
-               ret = -EINVAL;
-               goto done;
-       }
-
-       if (*crypt == NULL || (*crypt)->ops != ops) {
-               struct ieee80211_crypt_data *new_crypt;
-
-               ieee80211_crypt_delayed_deinit(ieee, crypt);
-
-               new_crypt = kzalloc(sizeof(*new_crypt), GFP_KERNEL);
-               if (new_crypt == NULL) {
-                       ret = -ENOMEM;
-                       goto done;
-               }
-               new_crypt->ops = ops;
-               if (new_crypt->ops)
-                       new_crypt->priv = new_crypt->ops->init(idx);
-               if (new_crypt->priv == NULL) {
-                       kfree(new_crypt);
-                       ret = -EINVAL;
-                       goto done;
-               }
-               *crypt = new_crypt;
-
-       }
-
-       if (ext->key_len > 0 && (*crypt)->ops->set_key &&
-           (*crypt)->ops->set_key(ext->key, ext->key_len, ext->rx_seq,
-                                  (*crypt)->priv) < 0) {
-               IEEE80211_DEBUG_WX("%s: key setting failed\n", dev->name);
-               netdev_err(ieee->dev, "key setting failed\n");
-               ret = -EINVAL;
-               goto done;
-       }
-#if 1
-       if (ext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY) {
-               ieee->tx_keyidx = idx;
-               sec.active_key = idx;
-               sec.flags |= SEC_ACTIVE_KEY;
-       }
-
-       if (ext->alg != IW_ENCODE_ALG_NONE) {
-               memcpy(sec.keys[idx], ext->key, ext->key_len);
-               sec.key_sizes[idx] = ext->key_len;
-               sec.flags |= (1 << idx);
-               if (ext->alg == IW_ENCODE_ALG_WEP) {
-                       sec.flags |= SEC_LEVEL;
-                       sec.level = SEC_LEVEL_1;
-               } else if (ext->alg == IW_ENCODE_ALG_TKIP) {
-                       sec.flags |= SEC_LEVEL;
-                       sec.level = SEC_LEVEL_2;
-               } else if (ext->alg == IW_ENCODE_ALG_CCMP) {
-                       sec.flags |= SEC_LEVEL;
-                       sec.level = SEC_LEVEL_3;
-               }
-               /* Don't set sec level for group keys. */
-               if (group_key)
-                       sec.flags &= ~SEC_LEVEL;
-       }
-#endif
-done:
-       if (ieee->set_security)
-               ieee->set_security(ieee->dev, &sec);
-
-       if (ieee->reset_on_keychange &&
-           ieee->iw_mode != IW_MODE_INFRA &&
-           ieee->reset_port && ieee->reset_port(dev)) {
-               IEEE80211_DEBUG_WX("%s: reset_port failed\n", dev->name);
-               return -EINVAL;
-       }
-
-       return ret;
-}
-
-int ieee80211_wx_set_mlme(struct ieee80211_device *ieee,
-                         struct iw_request_info *info,
-                         union iwreq_data *wrqu, char *extra)
-{
-       struct iw_mlme *mlme = (struct iw_mlme *) extra;
-#if 1
-       switch (mlme->cmd) {
-       case IW_MLME_DEAUTH:
-       case IW_MLME_DISASSOC:
-               ieee80211_disassociate(ieee);
-               break;
-       default:
-               return -EOPNOTSUPP;
-       }
-#endif
-       return 0;
-}
-
-int ieee80211_wx_set_auth(struct ieee80211_device *ieee,
-                         struct iw_request_info *info,
-                         struct iw_param *data, char *extra)
-{
-       switch (data->flags & IW_AUTH_INDEX) {
-       case IW_AUTH_WPA_VERSION:
-               /* need to support wpa2 here */
-               break;
-       case IW_AUTH_CIPHER_PAIRWISE:
-       case IW_AUTH_CIPHER_GROUP:
-       case IW_AUTH_KEY_MGMT:
-               /* Host AP driver does not use these parameters and allows
-                * wpa_supplicant to control them internally.
-                */
-               break;
-       case IW_AUTH_TKIP_COUNTERMEASURES:
-               ieee->tkip_countermeasures = data->value;
-               break;
-       case IW_AUTH_DROP_UNENCRYPTED:
-               ieee->drop_unencrypted = data->value;
-               break;
-
-       case IW_AUTH_80211_AUTH_ALG:
-               ieee->open_wep = (data->value&IW_AUTH_ALG_OPEN_SYSTEM) ? 1 : 0;
-               break;
-
-#if 1
-       case IW_AUTH_WPA_ENABLED:
-               ieee->wpa_enabled = (data->value) ? 1 : 0;
-               break;
-
-#endif
-       case IW_AUTH_RX_UNENCRYPTED_EAPOL:
-               ieee->ieee802_1x = data->value;
-               break;
-       case IW_AUTH_PRIVACY_INVOKED:
-               ieee->privacy_invoked = data->value;
-               break;
-       default:
-               return -EOPNOTSUPP;
-       }
-       return 0;
-}
-
-#if 1
-int ieee80211_wx_set_gen_ie(struct ieee80211_device *ieee, u8 *ie, size_t len)
-{
-       u8 *buf = NULL;
-
-       if (len > MAX_WPA_IE_LEN || (len && ie == NULL)) {
-               netdev_err(ieee->dev, "return error out, len:%zu\n", len);
-       return -EINVAL;
-       }
-
-       if (len) {
-               if (len != ie[1]+2) {
-                       netdev_err(ieee->dev, "len:%zu, ie:%d\n", len, ie[1]);
-                       return -EINVAL;
-               }
-               buf = kmemdup(ie, len, GFP_KERNEL);
-               if (buf == NULL)
-                       return -ENOMEM;
-               kfree(ieee->wpa_ie);
-               ieee->wpa_ie = buf;
-               ieee->wpa_ie_len = len;
-       } else {
-               kfree(ieee->wpa_ie);
-               ieee->wpa_ie = NULL;
-               ieee->wpa_ie_len = 0;
-       }
-
-       return 0;
-
-}
-#endif
diff --git a/drivers/staging/rtl8187se/r8180.h b/drivers/staging/rtl8187se/r8180.h
deleted file mode 100644 (file)
index 9f931db..0000000
+++ /dev/null
@@ -1,640 +0,0 @@
-/*
- * This is part of rtl8180 OpenSource driver.
- * Copyright (C) Andrea Merello 2004-2005  <andrea.merello@gmail.com>
- * Released under the terms of GPL (General Public Licence)
- *
- * Parts of this driver are based on the GPL part of the official realtek driver
- *
- * Parts of this driver are based on the rtl8180 driver skeleton from Patric
- * Schenke & Andres Salomon
- *
- * Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver
- *
- * We want to thanks the Authors of those projects and the Ndiswrapper project
- * Authors.
- */
-
-#ifndef R8180H
-#define R8180H
-
-#include <linux/interrupt.h>
-
-#define RTL8180_MODULE_NAME "r8180"
-#define DMESG(x, a...) printk(KERN_INFO RTL8180_MODULE_NAME ": " x "\n", ## a)
-#define DMESGW(x, a...) printk(KERN_WARNING RTL8180_MODULE_NAME ": WW:" x "\n", ## a)
-#define DMESGE(x, a...) printk(KERN_WARNING RTL8180_MODULE_NAME ": EE:" x "\n", ## a)
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/ioport.h>
-#include <linux/sched.h>
-#include <linux/types.h>
-#include <linux/slab.h>
-#include <linux/netdevice.h>
-#include <linux/pci.h>
-#include <linux/etherdevice.h>
-#include <linux/delay.h>
-#include <linux/rtnetlink.h> /* for rtnl_lock() */
-#include <linux/wireless.h>
-#include <linux/timer.h>
-#include <linux/proc_fs.h> /* Necessary because we use the proc fs. */
-#include <linux/if_arp.h>
-#include "ieee80211/ieee80211.h"
-#include <asm/io.h>
-
-#define EPROM_93c46 0
-#define EPROM_93c56 1
-
-#define RTL_IOCTL_WPA_SUPPLICANT (SIOCIWFIRSTPRIV + 30)
-
-#define DEFAULT_FRAG_THRESHOLD 2342U
-#define MIN_FRAG_THRESHOLD 256U
-#define DEFAULT_RTS_THRESHOLD 2342U
-#define MIN_RTS_THRESHOLD 0U
-#define MAX_RTS_THRESHOLD 2342U
-#define DEFAULT_BEACONINTERVAL 0x64U
-
-#define DEFAULT_RETRY_RTS 7
-#define DEFAULT_RETRY_DATA 7
-
-#define BEACON_QUEUE 6
-
-#define aSifsTime 10
-
-#define sCrcLng 4
-#define sAckCtsLng 112 /* bits in ACK and CTS frames. */
-/* +by amy 080312. */
-#define RATE_ADAPTIVE_TIMER_PERIOD 300
-
-enum wireless_mode {
-       WIRELESS_MODE_UNKNOWN = 0x00,
-       WIRELESS_MODE_A = 0x01,
-       WIRELESS_MODE_B = 0x02,
-       WIRELESS_MODE_G = 0x04,
-       WIRELESS_MODE_AUTO = 0x08,
-};
-
-struct chnl_access_setting {
-       u16 sifs_timer;
-       u16 difs_timer;
-       u16 slot_time_timer;
-       u16 eifs_timer;
-       u16 cwmin_index;
-       u16 cwmax_index;
-};
-
-enum nic_t {
-       NIC_8185 = 1,
-       NIC_8185B
-};
-
-typedef u32 AC_CODING;
-#define AC0_BE 0 /* ACI: 0x00 */ /* Best Effort. */
-#define AC1_BK 1 /* ACI: 0x01 */ /* Background. */
-#define AC2_VI 2 /* ACI: 0x10 */ /* Video. */
-#define AC3_VO 3 /* ACI: 0x11 */ /* Voice. */
-#define AC_MAX 4 /* Max: define total number; Should not to be used as a real
-                  * enum.
-                  */
-
-/*
- * ECWmin/ECWmax field.
- * Ref: WMM spec 2.2.2: WME Parameter Element, p.13.
- */
-typedef union _ECW {
-       u8 charData;
-       struct {
-               u8 ECWmin:4;
-               u8 ECWmax:4;
-       } f;    /* Field */
-} ECW, *PECW;
-
-/*
- * ACI/AIFSN Field. Ref: WMM spec 2.2.2: WME Parameter Element, p.12.
- */
-typedef union _ACI_AIFSN {
-       u8 charData;
-
-       struct {
-               u8 AIFSN:4;
-               u8 ACM:1;
-               u8 ACI:2;
-               u8 Reserved:1;
-       } f;    /* Field */
-} ACI_AIFSN, *PACI_AIFSN;
-
-/*
- * AC Parameters Record Format.
- * Ref: WMM spec 2.2.2: WME Parameter Element, p.12.
- */
-typedef union _AC_PARAM {
-       u32 longData;
-       u8 charData[4];
-
-       struct {
-               ACI_AIFSN AciAifsn;
-               ECW Ecw;
-               u16 TXOPLimit;
-       } f;    /* Field */
-} AC_PARAM, *PAC_PARAM;
-
-struct buffer {
-       struct buffer *next;
-       u32 *buf;
-       dma_addr_t dma;
-};
-
-/* YJ,modified,080828. */
-struct stats {
-       unsigned long txrdu;
-       unsigned long rxrdu;
-       unsigned long rxnolast;
-       unsigned long rxnodata;
-       unsigned long rxnopointer;
-       unsigned long txnperr;
-       unsigned long txresumed;
-       unsigned long rxerr;
-       unsigned long rxoverflow;
-       unsigned long rxint;
-       unsigned long txbkpokint;
-       unsigned long txbepoking;
-       unsigned long txbkperr;
-       unsigned long txbeperr;
-       unsigned long txnpokint;
-       unsigned long txhpokint;
-       unsigned long txhperr;
-       unsigned long ints;
-       unsigned long shints;
-       unsigned long txoverflow;
-       unsigned long rxdmafail;
-       unsigned long txbeacon;
-       unsigned long txbeaconerr;
-       unsigned long txlpokint;
-       unsigned long txlperr;
-       unsigned long txretry; /* retry number tony 20060601 */
-       unsigned long rxcrcerrmin; /* crc error (0-500) */
-       unsigned long rxcrcerrmid; /* crc error (500-1000) */
-       unsigned long rxcrcerrmax; /* crc error (>1000) */
-       unsigned long rxicverr; /* ICV error */
-};
-
-#define MAX_LD_SLOT_NUM 10
-#define KEEP_ALIVE_INTERVAL 20 /* in seconds. */
-#define CHECK_FOR_HANG_PERIOD 2 /* be equal to watchdog check time. */
-#define DEFAULT_KEEP_ALIVE_LEVEL 1
-#define DEFAULT_SLOT_NUM 2
-#define POWER_PROFILE_AC 0
-#define POWER_PROFILE_BATTERY 1
-
-struct link_detect_t {
-       u32 rx_frame_num[MAX_LD_SLOT_NUM]; /* number of Rx Frame.
-                                           * CheckForHang_period  to determine
-                                           * link status.
-                                           */
-       u16 slot_num; /* number of CheckForHang period to determine link status,
-                      * default is 2.
-                      */
-       u16 slot_index;
-       u32 num_tx_ok_in_period; /* number of packet transmitted during
-                                 * CheckForHang.
-                                 */
-       u32 num_rx_ok_in_period; /* number of packet received during
-                                 * CheckForHang.
-                                 */
-       u8 idle_count; /* (KEEP_ALIVE_INTERVAL / CHECK_FOR_HANG_PERIOD) */
-       u32 last_num_tx_unicast;
-       u32 last_num_rx_unicast;
-
-       bool b_busy_traffic; /* when it is set to 1, UI cann't scan at will. */
-};
-
-/* YJ,modified,080828,end */
-
-/* by amy for led
- * ==========================================================================
- * LED customization.
- * ==========================================================================
- */
-enum led_strategy_8185 {
-       SW_LED_MODE0,
-       SW_LED_MODE1,
-       HW_LED, /* HW control 2 LEDs, LED0 and LED1 (there are 4 different
-                * control modes). */
-};
-
-enum rt_rf_power_state {
-       RF_ON,
-       RF_SLEEP,
-       RF_OFF
-};
-
-enum _ReasonCode {
-       unspec_reason = 0x1,
-       auth_not_valid = 0x2,
-       deauth_lv_ss = 0x3,
-       inactivity = 0x4,
-       ap_overload = 0x5,
-       class2_err = 0x6,
-       class3_err = 0x7,
-       disas_lv_ss = 0x8,
-       asoc_not_auth = 0x9,
-
-       /* ----MIC_CHECK */
-       mic_failure = 0xe,
-       /* ----END MIC_CHECK */
-
-       /* Reason code defined in 802.11i D10.0 p.28. */
-       invalid_IE = 0x0d,
-       four_way_tmout = 0x0f,
-       two_way_tmout = 0x10,
-       IE_dismatch = 0x11,
-       invalid_Gcipher = 0x12,
-       invalid_Pcipher = 0x13,
-       invalid_AKMP = 0x14,
-       unsup_RSNIEver = 0x15,
-       invalid_RSNIE = 0x16,
-       auth_802_1x_fail = 0x17,
-       ciper_reject = 0x18,
-
-       /* Reason code defined in 7.3.1.7, 802.1e D13.0, p.42. Added by Annie,
-        * 2005-11-15.
-        */
-       QoS_unspec = 0x20, /* 32 */
-       QAP_bandwidth = 0x21, /* 33 */
-       poor_condition = 0x22, /* 34 */
-       no_facility = 0x23, /* 35 */
-       /* Where is 36??? */
-       req_declined = 0x25, /* 37 */
-       invalid_param = 0x26, /* 38 */
-       req_not_honored = 0x27, /* 39 */
-       TS_not_created = 0x2F, /* 47 */
-       DL_not_allowed = 0x30, /* 48 */
-       dest_not_exist = 0x31, /* 49 */
-       dest_not_QSTA = 0x32, /* 50 */
-};
-
-enum rt_ps_mode {
-       ACTIVE, /* Active/Continuous access. */
-       MAX_PS, /* Max power save mode. */
-       FAST_PS /* Fast power save mode. */
-};
-
-/* by amy for power save. */
-struct r8180_priv {
-       struct pci_dev *pdev;
-
-       short epromtype;
-       int irq;
-       struct ieee80211_device *ieee80211;
-
-       short plcp_preamble_mode; /* 0:auto 1:short 2:long */
-
-       spinlock_t irq_th_lock;
-       spinlock_t tx_lock;
-       spinlock_t ps_lock;
-       spinlock_t rf_ps_lock;
-
-       u16 irq_mask;
-       short irq_enabled;
-       struct net_device *dev;
-       short chan;
-       short sens;
-       short max_sens;
-       u8 chtxpwr[15]; /* channels from 1 to 14, 0 not used. */
-       u8 chtxpwr_ofdm[15]; /* channels from 1 to 14, 0 not used. */
-       u8 channel_plan;  /* it's the channel plan index. */
-       short up;
-       short crcmon; /* if 1 allow bad crc frame reception in monitor mode. */
-
-       struct timer_list scan_timer;
-       spinlock_t scan_lock;
-       u8 active_probe;
-       struct semaphore wx_sem;
-       short hw_wep;
-
-       short digphy;
-       short antb;
-       short diversity;
-       u32 key0[4];
-       short (*rf_set_sens)(struct net_device *dev, short sens);
-       void (*rf_set_chan)(struct net_device *dev, short ch);
-       void (*rf_close)(struct net_device *dev);
-       void (*rf_init)(struct net_device *dev);
-       void (*rf_sleep)(struct net_device *dev);
-       void (*rf_wakeup)(struct net_device *dev);
-       /* short rate; */
-       short promisc;
-       /* stats */
-       struct stats stats;
-       struct link_detect_t link_detect; /* YJ,add,080828 */
-       struct iw_statistics wstats;
-
-       /* RX stuff. */
-       u32 *rxring;
-       u32 *rxringtail;
-       dma_addr_t rxringdma;
-       struct buffer *rxbuffer;
-       struct buffer *rxbufferhead;
-       int rxringcount;
-       u16 rxbuffersize;
-
-       struct sk_buff *rx_skb;
-
-       short rx_skb_complete;
-
-       u32 rx_prevlen;
-
-       u32 *txmapring;
-       u32 *txbkpring;
-       u32 *txbepring;
-       u32 *txvipring;
-       u32 *txvopring;
-       u32 *txhpring;
-       dma_addr_t txmapringdma;
-       dma_addr_t txbkpringdma;
-       dma_addr_t txbepringdma;
-       dma_addr_t txvipringdma;
-       dma_addr_t txvopringdma;
-       dma_addr_t txhpringdma;
-       u32 *txmapringtail;
-       u32 *txbkpringtail;
-       u32 *txbepringtail;
-       u32 *txvipringtail;
-       u32 *txvopringtail;
-       u32 *txhpringtail;
-       u32 *txmapringhead;
-       u32 *txbkpringhead;
-       u32 *txbepringhead;
-       u32 *txvipringhead;
-       u32 *txvopringhead;
-       u32 *txhpringhead;
-       struct buffer *txmapbufs;
-       struct buffer *txbkpbufs;
-       struct buffer *txbepbufs;
-       struct buffer *txvipbufs;
-       struct buffer *txvopbufs;
-       struct buffer *txhpbufs;
-       struct buffer *txmapbufstail;
-       struct buffer *txbkpbufstail;
-       struct buffer *txbepbufstail;
-       struct buffer *txvipbufstail;
-       struct buffer *txvopbufstail;
-       struct buffer *txhpbufstail;
-
-       int txringcount;
-       int txbuffsize;
-       struct tasklet_struct irq_rx_tasklet;
-       u8 dma_poll_mask;
-
-       /* adhoc/master mode stuff. */
-       u32 *txbeaconringtail;
-       dma_addr_t txbeaconringdma;
-       u32 *txbeaconring;
-       int txbeaconcount;
-       struct buffer *txbeaconbufs;
-       struct buffer *txbeaconbufstail;
-
-       u8 retry_data;
-       u8 retry_rts;
-       u16 rts;
-
-       /* by amy for led. */
-       enum led_strategy_8185 led_strategy;
-       /* by amy for led. */
-
-       /* by amy for power save. */
-       struct timer_list watch_dog_timer;
-       bool bInactivePs;
-       bool bSwRfProcessing;
-       enum rt_rf_power_state eInactivePowerState;
-       enum rt_rf_power_state eRFPowerState;
-       u32 RfOffReason;
-       bool RFChangeInProgress;
-       bool SetRFPowerStateInProgress;
-       u8 RFProgType;
-       bool bLeisurePs;
-       enum rt_ps_mode dot11PowerSaveMode;
-       u8 TxPollingTimes;
-
-       bool bApBufOurFrame; /* TRUE if AP buffer our unicast data , we will
-                             * keep eAwake until receive data or timeout.
-                             */
-       u8 WaitBufDataBcnCount;
-       u8 WaitBufDataTimeOut;
-
-       /* by amy for power save. */
-       /* by amy for antenna. */
-       u8 EEPROMSwAntennaDiversity;
-       bool EEPROMDefaultAntenna1;
-       u8 RegSwAntennaDiversityMechanism;
-       bool bSwAntennaDiverity;
-       u8 RegDefaultAntenna;
-       bool bDefaultAntenna1;
-       u8 SignalStrength;
-       long Stats_SignalStrength;
-       long LastSignalStrengthInPercent; /* In percentage, used for smoothing,
-                                          * e.g. Moving Average.
-                                          */
-       u8 SignalQuality; /* in 0-100 index. */
-       long Stats_SignalQuality;
-       long RecvSignalPower; /* in dBm. */
-       long Stats_RecvSignalPower;
-       u8 LastRxPktAntenna; /* +by amy 080312 Antenna which received the lasted
-                             * packet. 0: Aux, 1:Main. Added by Roger,
-                             * 2008.01.25.
-                             */
-       u32 AdRxOkCnt;
-       long AdRxSignalStrength;
-       u8 CurrAntennaIndex; /* Index to current Antenna (both Tx and Rx). */
-       u8 AdTickCount; /* Times of SwAntennaDiversityTimer happened. */
-       u8 AdCheckPeriod; /* # of period SwAntennaDiversityTimer to check Rx
-                          * signal strength for SW Antenna Diversity.
-                          */
-       u8 AdMinCheckPeriod; /* Min value of AdCheckPeriod. */
-       u8 AdMaxCheckPeriod; /* Max value of AdCheckPeriod. */
-       long AdRxSsThreshold; /* Signal strength threshold to switch antenna. */
-       long AdMaxRxSsThreshold; /* Max value of AdRxSsThreshold. */
-       bool bAdSwitchedChecking; /* TRUE if we shall shall check Rx signal
-                                  * strength for last time switching antenna.
-                                  */
-       long AdRxSsBeforeSwitched; /* Rx signal strength before we switched
-                                   * antenna.
-                                   */
-       struct timer_list SwAntennaDiversityTimer;
-       /* by amy for antenna {by amy 080312 */
-
-       /* Crystal calibration. Added by Roger, 2007.12.11. */
-
-       bool bXtalCalibration; /* Crystal calibration.*/
-       u8 XtalCal_Xin; /* Crystal calibration for Xin. 0~7.5pF */
-       u8 XtalCal_Xout; /* Crystal calibration for Xout. 0~7.5pF */
-
-       /* Tx power tracking with thermal meter indication.
-        * Added by Roger, 2007.12.11.
-        */
-
-       bool bTxPowerTrack; /* Tx Power tracking. */
-       u8 ThermalMeter; /* Thermal meter reference indication. */
-
-       /* Dynamic Initial Gain Adjustment Mechanism. Added by Bruce,
-        * 2007-02-14.
-        */
-       bool bDigMechanism; /* TRUE if DIG is enabled, FALSE ow. */
-       bool bRegHighPowerMechanism; /* For High Power Mechanism. 061010,
-                                     * by rcnjko.
-                                     */
-       u32 FalseAlarmRegValue;
-       u8 RegDigOfdmFaUpTh; /* Upper threshold of OFDM false alarm, which is
-                             * used in DIG.
-                             */
-       u8 DIG_NumberFallbackVote;
-       u8 DIG_NumberUpgradeVote;
-       /* For HW antenna diversity, added by Roger, 2008.01.30. */
-       u32 AdMainAntennaRxOkCnt; /* Main antenna Rx OK count. */
-       u32 AdAuxAntennaRxOkCnt; /* Aux antenna Rx OK count. */
-       bool bHWAdSwitched; /* TRUE if we has switched default antenna by HW
-                            * evaluation.
-                            */
-       /* RF High Power upper/lower threshold. */
-       u8 RegHiPwrUpperTh;
-       u8 RegHiPwrLowerTh;
-       /* RF RSSI High Power upper/lower Threshold. */
-       u8 RegRSSIHiPwrUpperTh;
-       u8 RegRSSIHiPwrLowerTh;
-       /* Current CCK RSSI value to determine CCK high power, asked by SD3 DZ,
-        * by Bruce, 2007-04-12.
-        */
-       u8 CurCCKRSSI;
-       bool bCurCCKPkt;
-       /* High Power Mechanism. Added by amy, 080312. */
-       bool bToUpdateTxPwr;
-       long UndecoratedSmoothedSS;
-       long UndecoratedSmoothedRxPower;
-       u8 RSSI;
-       char RxPower;
-       u8 InitialGain;
-       /* For adjust Dig Threshold during Legacy/Leisure Power Save Mode. */
-       u32 DozePeriodInPast2Sec;
-       /* Don't access BB/RF under disable PLL situation. */
-       u8 InitialGainBackUp;
-       u8 RegBModeGainStage;
-       /* by amy for rate adaptive */
-       struct timer_list rateadapter_timer;
-       u32 RateAdaptivePeriod;
-       bool bEnhanceTxPwr;
-       bool bUpdateARFR;
-       int ForcedDataRate; /* Force Data Rate. 0: Auto, 0x02: 1M ~ 0x6C: 54M.)
-                            */
-       u32 NumTxUnicast; /* YJ,add,080828,for keep alive. */
-       u8 keepAliveLevel; /*YJ,add,080828,for KeepAlive. */
-       unsigned long NumTxOkTotal;
-       u16 LastRetryCnt;
-       u16 LastRetryRate;
-       unsigned long LastTxokCnt;
-       unsigned long LastRxokCnt;
-       u16 CurrRetryCnt;
-       unsigned long LastTxOKBytes;
-       unsigned long NumTxOkBytesTotal;
-       u8 LastFailTxRate;
-       long LastFailTxRateSS;
-       u8 FailTxRateCount;
-       u32 LastTxThroughput;
-       /* for up rate. */
-       unsigned short bTryuping;
-       u8 CurrTxRate; /* the rate before up. */
-       u16 CurrRetryRate;
-       u16 TryupingCount;
-       u8 TryDownCountLowData;
-       u8 TryupingCountNoData;
-
-       u8 CurrentOperaRate;
-       struct work_struct reset_wq;
-       struct work_struct watch_dog_wq;
-       short ack_tx_to_ieee;
-
-       u8 dma_poll_stop_mask;
-
-       u16 ShortRetryLimit;
-       u16 LongRetryLimit;
-       u16 EarlyRxThreshold;
-       u32 TransmitConfig;
-       u32 ReceiveConfig;
-       u32 IntrMask;
-
-       struct chnl_access_setting ChannelAccessSetting;
-};
-
-#define MANAGE_PRIORITY 0
-#define BK_PRIORITY 1
-#define BE_PRIORITY 2
-#define VI_PRIORITY 3
-#define VO_PRIORITY 4
-#define HI_PRIORITY 5
-#define BEACON_PRIORITY 6
-
-#define LOW_PRIORITY VI_PRIORITY
-#define NORM_PRIORITY VO_PRIORITY
-/* AC2Queue mapping. */
-#define AC2Q(_ac) (((_ac) == WME_AC_VO) ? VO_PRIORITY : \
-               ((_ac) == WME_AC_VI) ? VI_PRIORITY : \
-               ((_ac) == WME_AC_BK) ? BK_PRIORITY : \
-               BE_PRIORITY)
-
-short rtl8180_tx(struct net_device *dev, u8 *skbuf, int len, int priority,
-                bool morefrag, short fragdesc, int rate);
-
-u8 read_nic_byte(struct net_device *dev, int x);
-u32 read_nic_dword(struct net_device *dev, int x);
-u16 read_nic_word(struct net_device *dev, int x);
-void write_nic_byte(struct net_device *dev, int x, u8 y);
-void write_nic_word(struct net_device *dev, int x, u16 y);
-void write_nic_dword(struct net_device *dev, int x, u32 y);
-void force_pci_posting(struct net_device *dev);
-
-void rtl8180_rtx_disable(struct net_device *);
-void rtl8180_set_anaparam(struct net_device *dev, u32 a);
-void rtl8185_set_anaparam2(struct net_device *dev, u32 a);
-void rtl8180_set_hw_wep(struct net_device *dev);
-void rtl8180_no_hw_wep(struct net_device *dev);
-void rtl8180_update_msr(struct net_device *dev);
-void rtl8180_beacon_tx_disable(struct net_device *dev);
-void rtl8180_beacon_rx_disable(struct net_device *dev);
-int rtl8180_down(struct net_device *dev);
-int rtl8180_up(struct net_device *dev);
-void rtl8180_commit(struct net_device *dev);
-void rtl8180_set_chan(struct net_device *dev, short ch);
-void write_phy(struct net_device *dev, u8 adr, u8 data);
-void write_phy_cck(struct net_device *dev, u8 adr, u32 data);
-void write_phy_ofdm(struct net_device *dev, u8 adr, u32 data);
-void rtl8185_tx_antenna(struct net_device *dev, u8 ant);
-void rtl8185_rf_pins_enable(struct net_device *dev);
-void IPSEnter(struct net_device *dev);
-void IPSLeave(struct net_device *dev);
-int get_curr_tx_free_desc(struct net_device *dev, int priority);
-void UpdateInitialGain(struct net_device *dev);
-bool SetAntennaConfig87SE(struct net_device *dev, u8 DefaultAnt,
-                         bool bAntDiversity);
-
-void rtl8185b_adapter_start(struct net_device *dev);
-void rtl8185b_rx_enable(struct net_device *dev);
-void rtl8185b_tx_enable(struct net_device *dev);
-void rtl8180_reset(struct net_device *dev);
-void rtl8185b_irq_enable(struct net_device *dev);
-void fix_rx_fifo(struct net_device *dev);
-void fix_tx_fifo(struct net_device *dev);
-void rtl8225z2_SetTXPowerLevel(struct net_device *dev, short ch);
-void rtl8180_rate_adapter(struct work_struct *work);
-bool MgntActSet_RF_State(struct net_device *dev, enum rt_rf_power_state StateToSet,
-                        u32 ChangeSource);
-
-#endif
-
-/* fun with the built-in ieee80211 stack... */
-extern int ieee80211_crypto_init(void);
-extern void ieee80211_crypto_deinit(void);
-extern int ieee80211_crypto_tkip_init(void);
-extern void ieee80211_crypto_tkip_exit(void);
-extern int ieee80211_crypto_ccmp_init(void);
-extern void ieee80211_crypto_ccmp_exit(void);
-extern int ieee80211_crypto_wep_init(void);
-extern void ieee80211_crypto_wep_exit(void);
diff --git a/drivers/staging/rtl8187se/r8180_93cx6.h b/drivers/staging/rtl8187se/r8180_93cx6.h
deleted file mode 100644 (file)
index b52b5b0..0000000
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
-       This is part of rtl8180 OpenSource driver
-       Copyright (C) Andrea Merello 2004-2005  <andrea.merello@gmail.com>
-       Released under the terms of GPL (General Public Licence)
-
-       Parts of this driver are based on the GPL part of the official realtek driver
-       Parts of this driver are based on the rtl8180 driver skeleton from Patric Schenke & Andres Salomon
-       Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver
-
-       We want to tanks the Authors of such projects and the Ndiswrapper project Authors.
-*/
-
-/*This files contains card eeprom (93c46 or 93c56) programming routines*/
-/*memory is addressed by WORDS*/
-
-#include "r8180.h"
-#include "r8180_hw.h"
-
-#define EPROM_DELAY 10
-
-#define EPROM_ANAPARAM_ADDRLWORD 0xd
-#define EPROM_ANAPARAM_ADDRHWORD 0xe
-
-#define RFCHIPID 0x6
-#define        RFCHIPID_INTERSIL 1
-#define        RFCHIPID_RFMD 2
-#define        RFCHIPID_PHILIPS 3
-#define        RFCHIPID_MAXIM 4
-#define        RFCHIPID_GCT 5
-#define RFCHIPID_RTL8225 9
-#define RF_ZEBRA2 11
-#define EPROM_TXPW_BASE 0x05
-#define RF_ZEBRA4 12
-#define RFCHIPID_RTL8255 0xa
-#define RF_PARAM 0x19
-#define RF_PARAM_DIGPHY_SHIFT 0
-#define RF_PARAM_ANTBDEFAULT_SHIFT 1
-#define RF_PARAM_CARRIERSENSE_SHIFT 2
-#define RF_PARAM_CARRIERSENSE_MASK (3<<2)
-#define ENERGY_TRESHOLD 0x17
-#define EPROM_VERSION 0x1E
-#define MAC_ADR 0x7
-
-#define CIS 0x18
-
-#define        EPROM_TXPW_OFDM_CH1_2 0x20
-
-#define        EPROM_TXPW_CH1_2 0x30
-
-#define RTL818X_EEPROM_CMD_READ                (1 << 0)
-#define RTL818X_EEPROM_CMD_WRITE       (1 << 1)
-#define RTL818X_EEPROM_CMD_CK          (1 << 2)
-#define RTL818X_EEPROM_CMD_CS          (1 << 3)
-
diff --git a/drivers/staging/rtl8187se/r8180_core.c b/drivers/staging/rtl8187se/r8180_core.c
deleted file mode 100644 (file)
index a6022d4..0000000
+++ /dev/null
@@ -1,3775 +0,0 @@
-/*
- * This is part of rtl818x pci OpenSource driver - v 0.1
- * Copyright (C) Andrea Merello 2004-2005  <andrea.merello@gmail.com>
- * Released under the terms of GPL (General Public License)
- *
- * Parts of this driver are based on the GPL part of the official
- * Realtek driver.
- *
- * Parts of this driver are based on the rtl8180 driver skeleton
- * from Patric Schenke & Andres Salomon.
- *
- * Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
- *
- * Parts of BB/RF code are derived from David Young rtl8180 netbsd driver.
- *
- * RSSI calc function from 'The Deuce'
- *
- * Some ideas borrowed from the 8139too.c driver included in linux kernel.
- *
- * We (I?) want to thanks the Authors of those projecs and also the
- * Ndiswrapper's project Authors.
- *
- * A big big thanks goes also to Realtek corp. for their help in my attempt to
- * add RTL8185 and RTL8225 support, and to David Young also.
- *
- * Power management interface routines.
- * Written by Mariusz Matuszek.
- */
-
-#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
-
-#undef RX_DONT_PASS_UL
-#undef DUMMY_RX
-
-#include <linux/slab.h>
-#include <linux/syscalls.h>
-#include <linux/eeprom_93cx6.h>
-#include <linux/interrupt.h>
-#include <linux/proc_fs.h>
-#include <linux/seq_file.h>
-
-#include "r8180_hw.h"
-#include "r8180.h"
-#include "r8180_rtl8225.h" /* RTL8225 Radio frontend */
-#include "r8180_93cx6.h"   /* Card EEPROM */
-#include "r8180_wx.h"
-#include "r8180_dm.h"
-
-#include "ieee80211/dot11d.h"
-
-static struct pci_device_id rtl8180_pci_id_tbl[] = {
-       {
-               .vendor = PCI_VENDOR_ID_REALTEK,
-               .device = 0x8199,
-               .subvendor = PCI_ANY_ID,
-               .subdevice = PCI_ANY_ID,
-               .driver_data = 0,
-       },
-       {
-               .vendor = 0,
-               .device = 0,
-               .subvendor = 0,
-               .subdevice = 0,
-               .driver_data = 0,
-       }
-};
-
-static char ifname[IFNAMSIZ] = "wlan%d";
-static int hwwep;
-
-MODULE_LICENSE("GPL");
-MODULE_DEVICE_TABLE(pci, rtl8180_pci_id_tbl);
-MODULE_AUTHOR("Andrea Merello <andrea.merello@gmail.com>");
-MODULE_DESCRIPTION("Linux driver for Realtek RTL8187SE WiFi cards");
-
-module_param_string(ifname, ifname, sizeof(ifname), S_IRUGO|S_IWUSR);
-module_param(hwwep, int, S_IRUGO|S_IWUSR);
-
-MODULE_PARM_DESC(hwwep, " Try to use hardware WEP support. Still broken and not available on all cards");
-
-static int rtl8180_pci_probe(struct pci_dev *pdev,
-                            const struct pci_device_id *id);
-
-static void rtl8180_pci_remove(struct pci_dev *pdev);
-
-static void rtl8180_shutdown(struct pci_dev *pdev)
-{
-       struct net_device *dev = pci_get_drvdata(pdev);
-       if (dev->netdev_ops->ndo_stop)
-               dev->netdev_ops->ndo_stop(dev);
-       pci_disable_device(pdev);
-}
-
-static int rtl8180_suspend(struct pci_dev *pdev, pm_message_t state)
-{
-       struct net_device *dev = pci_get_drvdata(pdev);
-
-       if (!netif_running(dev))
-               goto out_pci_suspend;
-
-       if (dev->netdev_ops->ndo_stop)
-               dev->netdev_ops->ndo_stop(dev);
-
-       netif_device_detach(dev);
-
-out_pci_suspend:
-       pci_save_state(pdev);
-       pci_disable_device(pdev);
-       pci_set_power_state(pdev, pci_choose_state(pdev, state));
-       return 0;
-}
-
-static int rtl8180_resume(struct pci_dev *pdev)
-{
-       struct net_device *dev = pci_get_drvdata(pdev);
-       int err;
-       u32 val;
-
-       pci_set_power_state(pdev, PCI_D0);
-
-       err = pci_enable_device(pdev);
-       if (err) {
-               dev_err(&pdev->dev, "pci_enable_device failed on resume\n");
-
-               return err;
-       }
-
-       pci_restore_state(pdev);
-
-       /*
-        * Suspend/Resume resets the PCI configuration space, so we have to
-        * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries
-        * from interfering with C3 CPU state. pci_restore_state won't help
-        * here since it only restores the first 64 bytes pci config header.
-        */
-       pci_read_config_dword(pdev, 0x40, &val);
-       if ((val & 0x0000ff00) != 0)
-               pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
-
-       if (!netif_running(dev))
-               goto out;
-
-       if (dev->netdev_ops->ndo_open)
-               dev->netdev_ops->ndo_open(dev);
-
-       netif_device_attach(dev);
-out:
-       return 0;
-}
-
-static struct pci_driver rtl8180_pci_driver = {
-       .name           = RTL8180_MODULE_NAME,
-       .id_table       = rtl8180_pci_id_tbl,
-       .probe          = rtl8180_pci_probe,
-       .remove         = rtl8180_pci_remove,
-       .suspend        = rtl8180_suspend,
-       .resume         = rtl8180_resume,
-       .shutdown       = rtl8180_shutdown,
-};
-
-u8 read_nic_byte(struct net_device *dev, int x)
-{
-       return 0xff&readb((u8 __iomem *)dev->mem_start + x);
-}
-
-u32 read_nic_dword(struct net_device *dev, int x)
-{
-       return readl((u8 __iomem *)dev->mem_start + x);
-}
-
-u16 read_nic_word(struct net_device *dev, int x)
-{
-       return readw((u8 __iomem *)dev->mem_start + x);
-}
-
-void write_nic_byte(struct net_device *dev, int x, u8 y)
-{
-       writeb(y, (u8 __iomem *)dev->mem_start + x);
-       udelay(20);
-}
-
-void write_nic_dword(struct net_device *dev, int x, u32 y)
-{
-       writel(y, (u8 __iomem *)dev->mem_start + x);
-       udelay(20);
-}
-
-void write_nic_word(struct net_device *dev, int x, u16 y)
-{
-       writew(y, (u8 __iomem *)dev->mem_start + x);
-       udelay(20);
-}
-
-inline void force_pci_posting(struct net_device *dev)
-{
-       read_nic_byte(dev, EPROM_CMD);
-       mb();
-}
-
-static irqreturn_t rtl8180_interrupt(int irq, void *netdev);
-void set_nic_rxring(struct net_device *dev);
-void set_nic_txring(struct net_device *dev);
-static struct net_device_stats *rtl8180_stats(struct net_device *dev);
-void rtl8180_commit(struct net_device *dev);
-void rtl8180_start_tx_beacon(struct net_device *dev);
-
-static struct proc_dir_entry *rtl8180_proc;
-
-static int proc_get_registers(struct seq_file *m, void *v)
-{
-       struct net_device *dev = m->private;
-       int i, n, max = 0xff;
-
-       /* This dump the current register page */
-       for (n = 0; n <= max;) {
-               seq_printf(m, "\nD:  %2x > ", n);
-
-               for (i = 0; i < 16 && n <= max; i++, n++)
-                       seq_printf(m, "%2x ", read_nic_byte(dev, n));
-       }
-       seq_putc(m, '\n');
-       return 0;
-}
-
-int get_curr_tx_free_desc(struct net_device *dev, int priority);
-
-static int proc_get_stats_hw(struct seq_file *m, void *v)
-{
-       return 0;
-}
-
-static int proc_get_stats_rx(struct seq_file *m, void *v)
-{
-       struct net_device *dev = m->private;
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-
-       seq_printf(m,
-               "RX OK: %lu\n"
-               "RX Retry: %lu\n"
-               "RX CRC Error(0-500): %lu\n"
-               "RX CRC Error(500-1000): %lu\n"
-               "RX CRC Error(>1000): %lu\n"
-               "RX ICV Error: %lu\n",
-               priv->stats.rxint,
-               priv->stats.rxerr,
-               priv->stats.rxcrcerrmin,
-               priv->stats.rxcrcerrmid,
-               priv->stats.rxcrcerrmax,
-               priv->stats.rxicverr
-               );
-
-       return 0;
-}
-
-static int proc_get_stats_tx(struct seq_file *m, void *v)
-{
-       struct net_device *dev = m->private;
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-       unsigned long totalOK;
-
-       totalOK = priv->stats.txnpokint + priv->stats.txhpokint +
-               priv->stats.txlpokint;
-
-       seq_printf(m,
-               "TX OK: %lu\n"
-               "TX Error: %lu\n"
-               "TX Retry: %lu\n"
-               "TX beacon OK: %lu\n"
-               "TX beacon error: %lu\n",
-               totalOK,
-               priv->stats.txnperr+priv->stats.txhperr+priv->stats.txlperr,
-               priv->stats.txretry,
-               priv->stats.txbeacon,
-               priv->stats.txbeaconerr
-       );
-
-       return 0;
-}
-
-static void rtl8180_proc_module_init(void)
-{
-       DMESG("Initializing proc filesystem");
-       rtl8180_proc = proc_mkdir(RTL8180_MODULE_NAME, init_net.proc_net);
-}
-
-static void rtl8180_proc_module_remove(void)
-{
-       remove_proc_entry(RTL8180_MODULE_NAME, init_net.proc_net);
-}
-
-static void rtl8180_proc_remove_one(struct net_device *dev)
-{
-       remove_proc_subtree(dev->name, rtl8180_proc);
-}
-
-/*
- * seq_file wrappers for procfile show routines.
- */
-static int rtl8180_proc_open(struct inode *inode, struct file *file)
-{
-       struct net_device *dev = proc_get_parent_data(inode);
-       int (*show)(struct seq_file *, void *) = PDE_DATA(inode);
-
-       return single_open(file, show, dev);
-}
-
-static const struct file_operations rtl8180_proc_fops = {
-       .open           = rtl8180_proc_open,
-       .read           = seq_read,
-       .llseek         = seq_lseek,
-       .release        = single_release,
-};
-
-/*
- * Table of proc files we need to create.
- */
-struct rtl8180_proc_file {
-       char name[12];
-       int (*show)(struct seq_file *, void *);
-};
-
-static const struct rtl8180_proc_file rtl8180_proc_files[] = {
-       { "stats-hw",   &proc_get_stats_hw },
-       { "stats-rx",   &proc_get_stats_rx },
-       { "stats-tx",   &proc_get_stats_tx },
-       { "registers",  &proc_get_registers },
-       { "" }
-};
-
-static void rtl8180_proc_init_one(struct net_device *dev)
-{
-       const struct rtl8180_proc_file *f;
-       struct proc_dir_entry *dir;
-
-       dir = proc_mkdir_data(dev->name, 0, rtl8180_proc, dev);
-       if (!dir) {
-               DMESGE("Unable to initialize /proc/net/r8180/%s\n", dev->name);
-               return;
-       }
-
-       for (f = rtl8180_proc_files; f->name[0]; f++) {
-               if (!proc_create_data(f->name, S_IFREG | S_IRUGO, dir,
-                                     &rtl8180_proc_fops, f->show)) {
-                       DMESGE("Unable to initialize /proc/net/r8180/%s/%s\n",
-                              dev->name, f->name);
-                       return;
-               }
-       }
-}
-
-/*
- * FIXME: check if we can use some standard already-existent
- * data type+functions in kernel.
- */
-
-static short buffer_add(struct buffer **buffer, u32 *buf, dma_addr_t dma,
-                       struct buffer **bufferhead)
-{
-       struct buffer *tmp;
-
-       if (!*buffer) {
-
-               *buffer = kmalloc(sizeof(struct buffer), GFP_KERNEL);
-
-               if (*buffer == NULL) {
-                       DMESGE("Failed to kmalloc head of TX/RX struct");
-                       return -1;
-               }
-               (*buffer)->next = *buffer;
-               (*buffer)->buf = buf;
-               (*buffer)->dma = dma;
-               if (bufferhead != NULL)
-                       (*bufferhead) = (*buffer);
-               return 0;
-       }
-       tmp = *buffer;
-
-       while (tmp->next != (*buffer))
-               tmp = tmp->next;
-       tmp->next = kmalloc(sizeof(struct buffer), GFP_KERNEL);
-       if (tmp->next == NULL) {
-               DMESGE("Failed to kmalloc TX/RX struct");
-               return -1;
-       }
-       tmp->next->buf = buf;
-       tmp->next->dma = dma;
-       tmp->next->next = *buffer;
-
-       return 0;
-}
-
-static void buffer_free(struct net_device *dev, struct buffer **buffer, int len,
-                short consistent)
-{
-
-       struct buffer *tmp, *next;
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-       struct pci_dev *pdev = priv->pdev;
-
-       if (!*buffer)
-               return;
-
-       tmp = *buffer;
-
-       do {
-               next = tmp->next;
-               if (consistent) {
-                       pci_free_consistent(pdev, len,
-                                   tmp->buf, tmp->dma);
-               } else {
-                       pci_unmap_single(pdev, tmp->dma,
-                       len, PCI_DMA_FROMDEVICE);
-                       kfree(tmp->buf);
-               }
-               kfree(tmp);
-               tmp = next;
-       } while (next != *buffer);
-
-       *buffer = NULL;
-}
-
-int get_curr_tx_free_desc(struct net_device *dev, int priority)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       u32 *tail;
-       u32 *head;
-       int ret;
-
-       switch (priority) {
-       case MANAGE_PRIORITY:
-               head = priv->txmapringhead;
-               tail = priv->txmapringtail;
-               break;
-       case BK_PRIORITY:
-               head = priv->txbkpringhead;
-               tail = priv->txbkpringtail;
-               break;
-       case BE_PRIORITY:
-               head = priv->txbepringhead;
-               tail = priv->txbepringtail;
-               break;
-       case VI_PRIORITY:
-               head = priv->txvipringhead;
-               tail = priv->txvipringtail;
-               break;
-       case VO_PRIORITY:
-               head = priv->txvopringhead;
-               tail = priv->txvopringtail;
-               break;
-       case HI_PRIORITY:
-               head = priv->txhpringhead;
-               tail = priv->txhpringtail;
-               break;
-       default:
-               return -1;
-       }
-
-       if (head <= tail)
-               ret = priv->txringcount - (tail - head)/8;
-       else
-               ret = (head - tail)/8;
-
-       if (ret > priv->txringcount)
-               DMESG("BUG");
-
-       return ret;
-}
-
-static short check_nic_enought_desc(struct net_device *dev, int priority)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       struct ieee80211_device *ieee = netdev_priv(dev);
-       int requiredbyte;
-       int required;
-
-       requiredbyte = priv->ieee80211->fts +
-               sizeof(struct ieee80211_header_data);
-
-       if (ieee->current_network.QoS_Enable)
-               requiredbyte += 2;
-
-       required = requiredbyte / (priv->txbuffsize-4);
-
-       if (requiredbyte % priv->txbuffsize)
-               required++;
-
-       /* for now we keep two free descriptor as a safety boundary
-        * between the tail and the head
-        */
-
-       return required + 2 < get_curr_tx_free_desc(dev, priority);
-}
-
-void fix_tx_fifo(struct net_device *dev)
-{
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-       u32 *tmp;
-       int i;
-
-       for (tmp = priv->txmapring, i = 0;
-            i < priv->txringcount;
-            tmp += 8, i++) {
-               *tmp = *tmp & ~(1<<31);
-       }
-
-       for (tmp = priv->txbkpring, i = 0;
-            i < priv->txringcount;
-            tmp += 8, i++) {
-               *tmp = *tmp & ~(1<<31);
-       }
-
-       for (tmp = priv->txbepring, i = 0;
-            i < priv->txringcount;
-            tmp += 8, i++) {
-               *tmp = *tmp & ~(1<<31);
-       }
-       for (tmp = priv->txvipring, i = 0;
-            i < priv->txringcount;
-            tmp += 8, i++) {
-               *tmp = *tmp & ~(1<<31);
-       }
-
-       for (tmp = priv->txvopring, i = 0;
-            i < priv->txringcount;
-            tmp += 8, i++) {
-               *tmp = *tmp & ~(1<<31);
-       }
-
-       for (tmp = priv->txhpring, i = 0;
-            i < priv->txringcount;
-            tmp += 8, i++) {
-               *tmp = *tmp & ~(1<<31);
-       }
-
-       for (tmp = priv->txbeaconring, i = 0;
-            i < priv->txbeaconcount;
-            tmp += 8, i++) {
-               *tmp = *tmp & ~(1<<31);
-       }
-
-       priv->txmapringtail = priv->txmapring;
-       priv->txmapringhead = priv->txmapring;
-       priv->txmapbufstail = priv->txmapbufs;
-
-       priv->txbkpringtail = priv->txbkpring;
-       priv->txbkpringhead = priv->txbkpring;
-       priv->txbkpbufstail = priv->txbkpbufs;
-
-       priv->txbepringtail = priv->txbepring;
-       priv->txbepringhead = priv->txbepring;
-       priv->txbepbufstail = priv->txbepbufs;
-
-       priv->txvipringtail = priv->txvipring;
-       priv->txvipringhead = priv->txvipring;
-       priv->txvipbufstail = priv->txvipbufs;
-
-       priv->txvopringtail = priv->txvopring;
-       priv->txvopringhead = priv->txvopring;
-       priv->txvopbufstail = priv->txvopbufs;
-
-       priv->txhpringtail = priv->txhpring;
-       priv->txhpringhead = priv->txhpring;
-       priv->txhpbufstail = priv->txhpbufs;
-
-       priv->txbeaconringtail = priv->txbeaconring;
-       priv->txbeaconbufstail = priv->txbeaconbufs;
-       set_nic_txring(dev);
-
-       ieee80211_reset_queue(priv->ieee80211);
-       priv->ack_tx_to_ieee = 0;
-}
-
-void fix_rx_fifo(struct net_device *dev)
-{
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-       u32 *tmp;
-       struct buffer *rxbuf;
-       u8 rx_desc_size;
-
-       rx_desc_size = 8; /* 4*8 = 32 bytes */
-
-       for (tmp = priv->rxring, rxbuf = priv->rxbufferhead;
-            (tmp < (priv->rxring)+(priv->rxringcount)*rx_desc_size);
-            tmp += rx_desc_size, rxbuf = rxbuf->next) {
-               *(tmp+2) = rxbuf->dma;
-               *tmp = *tmp & ~0xfff;
-               *tmp = *tmp | priv->rxbuffersize;
-               *tmp |= (1<<31);
-       }
-
-       priv->rxringtail = priv->rxring;
-       priv->rxbuffer = priv->rxbufferhead;
-       priv->rx_skb_complete = 1;
-       set_nic_rxring(dev);
-}
-
-static void rtl8180_irq_disable(struct net_device *dev)
-{
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-
-       write_nic_dword(dev, IMR, 0);
-       force_pci_posting(dev);
-       priv->irq_enabled = 0;
-}
-
-void rtl8180_set_mode(struct net_device *dev, int mode)
-{
-       u8 ecmd;
-
-       ecmd = read_nic_byte(dev, EPROM_CMD);
-       ecmd = ecmd & ~EPROM_CMD_OPERATING_MODE_MASK;
-       ecmd = ecmd | (mode<<EPROM_CMD_OPERATING_MODE_SHIFT);
-       ecmd = ecmd & ~(1<<EPROM_CS_SHIFT);
-       ecmd = ecmd & ~(1<<EPROM_CK_SHIFT);
-       write_nic_byte(dev, EPROM_CMD, ecmd);
-}
-
-void rtl8180_beacon_tx_enable(struct net_device *dev);
-
-void rtl8180_update_msr(struct net_device *dev)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       u8 msr;
-       u32 rxconf;
-
-       msr  = read_nic_byte(dev, MSR);
-       msr &= ~MSR_LINK_MASK;
-
-       rxconf = read_nic_dword(dev, RX_CONF);
-
-       if (priv->ieee80211->state == IEEE80211_LINKED) {
-               if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
-                       msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
-               else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
-                       msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
-               else if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
-                       msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
-               else
-                       msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
-               rxconf |= (1<<RX_CHECK_BSSID_SHIFT);
-
-       } else {
-               msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
-               rxconf &= ~(1<<RX_CHECK_BSSID_SHIFT);
-       }
-
-       write_nic_byte(dev, MSR, msr);
-       write_nic_dword(dev, RX_CONF, rxconf);
-}
-
-void rtl8180_set_chan(struct net_device *dev, short ch)
-{
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-
-       if ((ch > 14) || (ch < 1)) {
-               netdev_err(dev, "In %s: Invalid channel %d\n", __func__, ch);
-               return;
-       }
-
-       priv->chan = ch;
-       priv->rf_set_chan(dev, priv->chan);
-}
-
-void set_nic_txring(struct net_device *dev)
-{
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-
-       write_nic_dword(dev, TX_MANAGEPRIORITY_RING_ADDR, priv->txmapringdma);
-       write_nic_dword(dev, TX_BKPRIORITY_RING_ADDR, priv->txbkpringdma);
-       write_nic_dword(dev, TX_BEPRIORITY_RING_ADDR, priv->txbepringdma);
-       write_nic_dword(dev, TX_VIPRIORITY_RING_ADDR, priv->txvipringdma);
-       write_nic_dword(dev, TX_VOPRIORITY_RING_ADDR, priv->txvopringdma);
-       write_nic_dword(dev, TX_HIGHPRIORITY_RING_ADDR, priv->txhpringdma);
-       write_nic_dword(dev, TX_BEACON_RING_ADDR, priv->txbeaconringdma);
-}
-
-void rtl8180_beacon_tx_enable(struct net_device *dev)
-{
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-
-       rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
-       priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_BQ);
-       write_nic_byte(dev, TPPollStop, priv->dma_poll_mask);
-       rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
-}
-
-void rtl8180_beacon_tx_disable(struct net_device *dev)
-{
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-
-       rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
-       priv->dma_poll_stop_mask |= TPPOLLSTOP_BQ;
-       write_nic_byte(dev, TPPollStop, priv->dma_poll_stop_mask);
-       rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
-
-}
-
-void rtl8180_rtx_disable(struct net_device *dev)
-{
-       u8 cmd;
-       struct r8180_priv *priv = ieee80211_priv(dev);
-
-       cmd = read_nic_byte(dev, CMD);
-       write_nic_byte(dev, CMD, cmd &
-                      ~((1<<CMD_RX_ENABLE_SHIFT)|(1<<CMD_TX_ENABLE_SHIFT)));
-       force_pci_posting(dev);
-       mdelay(10);
-
-       if (!priv->rx_skb_complete)
-               dev_kfree_skb_any(priv->rx_skb);
-}
-
-static short alloc_tx_desc_ring(struct net_device *dev, int bufsize, int count,
-                               int addr)
-{
-       int i;
-       u32 *desc;
-       u32 *tmp;
-       dma_addr_t dma_desc, dma_tmp;
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-       struct pci_dev *pdev = priv->pdev;
-       void *buf;
-
-       if ((bufsize & 0xfff) != bufsize) {
-               DMESGE("TX buffer allocation too large");
-               return 0;
-       }
-       desc = (u32 *)pci_alloc_consistent(pdev,
-                                         sizeof(u32)*8*count+256, &dma_desc);
-       if (desc == NULL)
-               return -1;
-
-       if (dma_desc & 0xff)
-               /*
-                * descriptor's buffer must be 256 byte aligned
-                * we shouldn't be here, since we set DMA mask !
-                */
-               WARN(1, "DMA buffer is not aligned\n");
-
-       tmp = desc;
-
-       for (i = 0; i < count; i++) {
-               buf = (void *)pci_alloc_consistent(pdev, bufsize, &dma_tmp);
-               if (buf == NULL)
-                       return -ENOMEM;
-
-               switch (addr) {
-               case TX_MANAGEPRIORITY_RING_ADDR:
-                       if (-1 == buffer_add(&priv->txmapbufs,
-                               buf, dma_tmp, NULL)) {
-                               DMESGE("Unable to allocate mem for buffer NP");
-                               return -ENOMEM;
-                       }
-                       break;
-               case TX_BKPRIORITY_RING_ADDR:
-                       if (-1 == buffer_add(&priv->txbkpbufs,
-                               buf, dma_tmp, NULL)) {
-                               DMESGE("Unable to allocate mem for buffer LP");
-                               return -ENOMEM;
-                       }
-                       break;
-               case TX_BEPRIORITY_RING_ADDR:
-                       if (-1 == buffer_add(&priv->txbepbufs,
-                               buf, dma_tmp, NULL)) {
-                               DMESGE("Unable to allocate mem for buffer NP");
-                               return -ENOMEM;
-                       }
-                       break;
-               case TX_VIPRIORITY_RING_ADDR:
-                       if (-1 == buffer_add(&priv->txvipbufs,
-                               buf, dma_tmp, NULL)) {
-                               DMESGE("Unable to allocate mem for buffer LP");
-                               return -ENOMEM;
-                       }
-                       break;
-               case TX_VOPRIORITY_RING_ADDR:
-                       if (-1 == buffer_add(&priv->txvopbufs,
-                               buf, dma_tmp, NULL)) {
-                               DMESGE("Unable to allocate mem for buffer NP");
-                               return -ENOMEM;
-                       }
-                       break;
-               case TX_HIGHPRIORITY_RING_ADDR:
-                       if (-1 == buffer_add(&priv->txhpbufs,
-                               buf, dma_tmp, NULL)) {
-                               DMESGE("Unable to allocate mem for buffer HP");
-                               return -ENOMEM;
-                       }
-                       break;
-               case TX_BEACON_RING_ADDR:
-                       if (-1 == buffer_add(&priv->txbeaconbufs,
-                               buf, dma_tmp, NULL)) {
-                               DMESGE("Unable to allocate mem for buffer BP");
-                               return -ENOMEM;
-                       }
-                       break;
-               }
-               *tmp = *tmp & ~(1<<31); /* descriptor empty, owned by the drv */
-               *(tmp+2) = (u32)dma_tmp;
-               *(tmp+3) = bufsize;
-
-               if (i+1 < count)
-                       *(tmp+4) = (u32)dma_desc+((i+1)*8*4);
-               else
-                       *(tmp+4) = (u32)dma_desc;
-
-               tmp = tmp+8;
-       }
-
-       switch (addr) {
-       case TX_MANAGEPRIORITY_RING_ADDR:
-               priv->txmapringdma = dma_desc;
-               priv->txmapring = desc;
-               break;
-       case TX_BKPRIORITY_RING_ADDR:
-               priv->txbkpringdma = dma_desc;
-               priv->txbkpring = desc;
-               break;
-       case TX_BEPRIORITY_RING_ADDR:
-               priv->txbepringdma = dma_desc;
-               priv->txbepring = desc;
-               break;
-       case TX_VIPRIORITY_RING_ADDR:
-               priv->txvipringdma = dma_desc;
-               priv->txvipring = desc;
-               break;
-       case TX_VOPRIORITY_RING_ADDR:
-               priv->txvopringdma = dma_desc;
-               priv->txvopring = desc;
-               break;
-       case TX_HIGHPRIORITY_RING_ADDR:
-               priv->txhpringdma = dma_desc;
-               priv->txhpring = desc;
-               break;
-       case TX_BEACON_RING_ADDR:
-               priv->txbeaconringdma = dma_desc;
-               priv->txbeaconring = desc;
-               break;
-
-       }
-
-       return 0;
-}
-
-static void free_tx_desc_rings(struct net_device *dev)
-{
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-       struct pci_dev *pdev = priv->pdev;
-       int count = priv->txringcount;
-
-       pci_free_consistent(pdev, sizeof(u32)*8*count+256,
-                           priv->txmapring, priv->txmapringdma);
-       buffer_free(dev, &(priv->txmapbufs), priv->txbuffsize, 1);
-
-       pci_free_consistent(pdev, sizeof(u32)*8*count+256,
-                           priv->txbkpring, priv->txbkpringdma);
-       buffer_free(dev, &(priv->txbkpbufs), priv->txbuffsize, 1);
-
-       pci_free_consistent(pdev, sizeof(u32)*8*count+256,
-                           priv->txbepring, priv->txbepringdma);
-       buffer_free(dev, &(priv->txbepbufs), priv->txbuffsize, 1);
-
-       pci_free_consistent(pdev, sizeof(u32)*8*count+256,
-                           priv->txvipring, priv->txvipringdma);
-       buffer_free(dev, &(priv->txvipbufs), priv->txbuffsize, 1);
-
-       pci_free_consistent(pdev, sizeof(u32)*8*count+256,
-                           priv->txvopring, priv->txvopringdma);
-       buffer_free(dev, &(priv->txvopbufs), priv->txbuffsize, 1);
-
-       pci_free_consistent(pdev, sizeof(u32)*8*count+256,
-                           priv->txhpring, priv->txhpringdma);
-       buffer_free(dev, &(priv->txhpbufs), priv->txbuffsize, 1);
-
-       count = priv->txbeaconcount;
-       pci_free_consistent(pdev, sizeof(u32)*8*count+256,
-                           priv->txbeaconring, priv->txbeaconringdma);
-       buffer_free(dev, &(priv->txbeaconbufs), priv->txbuffsize, 1);
-}
-
-static void free_rx_desc_ring(struct net_device *dev)
-{
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-       struct pci_dev *pdev = priv->pdev;
-       int count = priv->rxringcount;
-
-       pci_free_consistent(pdev, sizeof(u32)*8*count+256,
-                           priv->rxring, priv->rxringdma);
-
-       buffer_free(dev, &(priv->rxbuffer), priv->rxbuffersize, 0);
-}
-
-static short alloc_rx_desc_ring(struct net_device *dev, u16 bufsize, int count)
-{
-       int i;
-       u32 *desc;
-       u32 *tmp;
-       dma_addr_t dma_desc, dma_tmp;
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-       struct pci_dev *pdev = priv->pdev;
-       void *buf;
-       u8 rx_desc_size;
-
-       rx_desc_size = 8; /* 4*8 = 32 bytes */
-
-       if ((bufsize & 0xfff) != bufsize) {
-               DMESGE("RX buffer allocation too large");
-               return -1;
-       }
-
-       desc = (u32 *)pci_alloc_consistent(pdev,
-               sizeof(u32) * rx_desc_size * count + 256, &dma_desc);
-
-       if (dma_desc & 0xff)
-               /*
-                * descriptor's buffer must be 256 byte aligned
-                * should never happen since we specify the DMA mask
-                */
-               WARN(1, "DMA buffer is not aligned\n");
-
-       priv->rxring = desc;
-       priv->rxringdma = dma_desc;
-       tmp = desc;
-
-       for (i = 0; i < count; i++) {
-               buf = kmalloc(bufsize * sizeof(u8), GFP_ATOMIC);
-               if (buf == NULL) {
-                       DMESGE("Failed to kmalloc RX buffer");
-                       return -1;
-               }
-
-               dma_tmp = pci_map_single(pdev, buf, bufsize * sizeof(u8),
-                                        PCI_DMA_FROMDEVICE);
-               if (pci_dma_mapping_error(pdev, dma_tmp))
-                       return -1;
-               if (-1 == buffer_add(&(priv->rxbuffer), buf, dma_tmp,
-                          &(priv->rxbufferhead))) {
-                       DMESGE("Unable to allocate mem RX buf");
-                       return -1;
-               }
-               *tmp = 0; /* zero pads the header of the descriptor */
-               *tmp = *tmp | (bufsize&0xfff);
-               *(tmp+2) = (u32)dma_tmp;
-               *tmp = *tmp | (1<<31); /* descriptor void, owned by the NIC */
-
-               tmp = tmp+rx_desc_size;
-       }
-
-       /* this is the last descriptor */
-       *(tmp - rx_desc_size) = *(tmp - rx_desc_size) | (1 << 30);
-
-       return 0;
-}
-
-
-void set_nic_rxring(struct net_device *dev)
-{
-       u8 pgreg;
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-
-       pgreg = read_nic_byte(dev, PGSELECT);
-       write_nic_byte(dev, PGSELECT, pgreg & ~(1<<PGSELECT_PG_SHIFT));
-
-       write_nic_dword(dev, RXRING_ADDR, priv->rxringdma);
-}
-
-void rtl8180_reset(struct net_device *dev)
-{
-       u8 cr;
-
-       rtl8180_irq_disable(dev);
-
-       cr = read_nic_byte(dev, CMD);
-       cr = cr & 2;
-       cr = cr | (1<<CMD_RST_SHIFT);
-       write_nic_byte(dev, CMD, cr);
-
-       force_pci_posting(dev);
-
-       mdelay(200);
-
-       if (read_nic_byte(dev, CMD) & (1<<CMD_RST_SHIFT))
-               DMESGW("Card reset timeout!");
-       else
-               DMESG("Card successfully reset");
-
-       rtl8180_set_mode(dev, EPROM_CMD_LOAD);
-       force_pci_posting(dev);
-       mdelay(200);
-}
-
-inline u16 ieeerate2rtlrate(int rate)
-{
-       switch (rate) {
-       case 10:
-               return 0;
-       case 20:
-               return 1;
-       case 55:
-               return 2;
-       case 110:
-               return 3;
-       case 60:
-               return 4;
-       case 90:
-               return 5;
-       case 120:
-               return 6;
-       case 180:
-               return 7;
-       case 240:
-               return 8;
-       case 360:
-               return 9;
-       case 480:
-               return 10;
-       case 540:
-               return 11;
-       default:
-               return 3;
-       }
-}
-
-static u16 rtl_rate[] = {10, 20, 55, 110, 60,
-       90, 120, 180, 240, 360, 480, 540, 720};
-
-inline u16 rtl8180_rate2rate(short rate)
-{
-       if (rate > 12)
-               return 10;
-       return rtl_rate[rate];
-}
-
-inline u8 rtl8180_IsWirelessBMode(u16 rate)
-{
-       if (((rate <= 110) && (rate != 60) && (rate != 90)) || (rate == 220))
-               return 1;
-       else
-               return 0;
-}
-
-u16 N_DBPSOfRate(u16 DataRate);
-
-static u16 ComputeTxTime(u16 FrameLength, u16 DataRate, u8 bManagementFrame,
-                 u8 bShortPreamble)
-{
-       u16     FrameTime;
-       u16     N_DBPS;
-       u16     Ceiling;
-
-       if (rtl8180_IsWirelessBMode(DataRate)) {
-               if (bManagementFrame || !bShortPreamble || DataRate == 10)
-                       /* long preamble */
-                       FrameTime = (u16)(144+48+(FrameLength*8/(DataRate/10)));
-               else
-                       /* short preamble */
-                       FrameTime = (u16)(72+24+(FrameLength*8/(DataRate/10)));
-
-               if ((FrameLength*8 % (DataRate/10)) != 0) /* get the ceilling */
-                       FrameTime++;
-       } else {        /* 802.11g DSSS-OFDM PLCP length field calculation. */
-               N_DBPS = N_DBPSOfRate(DataRate);
-               Ceiling = (16 + 8*FrameLength + 6) / N_DBPS
-                               + (((16 + 8*FrameLength + 6) % N_DBPS) ? 1 : 0);
-               FrameTime = (u16)(16 + 4 + 4*Ceiling + 6);
-       }
-       return FrameTime;
-}
-
-u16 N_DBPSOfRate(u16 DataRate)
-{
-        u16 N_DBPS = 24;
-
-       switch (DataRate) {
-       case 60:
-               N_DBPS = 24;
-               break;
-       case 90:
-               N_DBPS = 36;
-               break;
-       case 120:
-               N_DBPS = 48;
-               break;
-       case 180:
-               N_DBPS = 72;
-               break;
-       case 240:
-               N_DBPS = 96;
-               break;
-       case 360:
-               N_DBPS = 144;
-               break;
-       case 480:
-               N_DBPS = 192;
-               break;
-       case 540:
-               N_DBPS = 216;
-               break;
-       default:
-               break;
-       }
-
-       return N_DBPS;
-}
-
-/*
- * For Netgear case, they want good-looking signal strength.
- */
-static long NetgearSignalStrengthTranslate(long LastSS, long CurrSS)
-{
-       long RetSS;
-
-       /* Step 1. Scale mapping. */
-       if (CurrSS >= 71 && CurrSS <= 100)
-               RetSS = 90 + ((CurrSS - 70) / 3);
-       else if (CurrSS >= 41 && CurrSS <= 70)
-               RetSS = 78 + ((CurrSS - 40) / 3);
-       else if (CurrSS >= 31 && CurrSS <= 40)
-               RetSS = 66 + (CurrSS - 30);
-       else if (CurrSS >= 21 && CurrSS <= 30)
-               RetSS = 54 + (CurrSS - 20);
-       else if (CurrSS >= 5 && CurrSS <= 20)
-               RetSS = 42 + (((CurrSS - 5) * 2) / 3);
-       else if (CurrSS == 4)
-               RetSS = 36;
-       else if (CurrSS == 3)
-               RetSS = 27;
-       else if (CurrSS == 2)
-               RetSS = 18;
-       else if (CurrSS == 1)
-               RetSS = 9;
-       else
-               RetSS = CurrSS;
-
-       /* Step 2. Smoothing. */
-       if (LastSS > 0)
-               RetSS = ((LastSS * 5) + (RetSS) + 5) / 6;
-
-       return RetSS;
-}
-
-/*
- * Translate 0-100 signal strength index into dBm.
- */
-static long TranslateToDbm8185(u8 SignalStrengthIndex)
-{
-       long SignalPower;
-
-       /* Translate to dBm (x=0.5y-95). */
-       SignalPower = (long)((SignalStrengthIndex + 1) >> 1);
-       SignalPower -= 95;
-
-       return SignalPower;
-}
-
-/*
- * Perform signal smoothing for dynamic mechanism.
- * This is different with PerformSignalSmoothing8185 in smoothing formula.
- * No dramatic adjustment is applied because dynamic mechanism need some
- * degree of correctness. Ported from 8187B.
- */
-static void PerformUndecoratedSignalSmoothing8185(struct r8180_priv *priv,
-                                                 bool bCckRate)
-{
-       long smoothedSS;
-       long smoothedRx;
-
-       /* Determine the current packet is CCK rate. */
-       priv->bCurCCKPkt = bCckRate;
-
-       smoothedSS = priv->SignalStrength * 10;
-
-       if (priv->UndecoratedSmoothedSS >= 0)
-               smoothedSS = ((priv->UndecoratedSmoothedSS * 5) +
-                               smoothedSS) / 6;
-
-       priv->UndecoratedSmoothedSS = smoothedSS;
-
-       smoothedRx = ((priv->UndecoratedSmoothedRxPower * 50) +
-                       (priv->RxPower * 11)) / 60;
-
-       priv->UndecoratedSmoothedRxPower = smoothedRx;
-
-       if (bCckRate)
-               priv->CurCCKRSSI = priv->RSSI;
-       else
-               priv->CurCCKRSSI = 0;
-}
-
-
-/*
- * This is rough RX isr handling routine
- */
-static void rtl8180_rx(struct net_device *dev)
-{
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-       struct sk_buff *tmp_skb;
-       short first, last;
-       u32 len;
-       int lastlen;
-       unsigned char quality, signal;
-       u8 rate;
-       u32 *tmp, *tmp2;
-       u8 rx_desc_size;
-       u8 padding;
-       char rxpower = 0;
-       u32 RXAGC = 0;
-       long RxAGC_dBm = 0;
-       u8      LNA = 0, BB = 0;
-       u8      LNA_gain[4] = {02, 17, 29, 39};
-       u8  Antenna = 0;
-       struct ieee80211_hdr_4addr *hdr;
-       u16 fc, type;
-       u8 bHwError = 0, bCRC = 0, bICV = 0;
-       bool    bCckRate = false;
-       u8     RSSI = 0;
-       long    SignalStrengthIndex = 0;
-       struct ieee80211_rx_stats stats = {
-               .signal = 0,
-               .noise = -98,
-               .rate = 0,
-               .freq = IEEE80211_24GHZ_BAND,
-       };
-
-       stats.nic_type = NIC_8185B;
-       rx_desc_size = 8;
-
-       if ((*(priv->rxringtail)) & (1<<31)) {
-               /* we have got an RX int, but the descriptor. we are pointing
-                * is empty.
-                */
-
-               priv->stats.rxnodata++;
-               priv->ieee80211->stats.rx_errors++;
-
-               tmp2 = NULL;
-               tmp = priv->rxringtail;
-               do {
-                       if (tmp == priv->rxring)
-                               tmp  = priv->rxring + (priv->rxringcount - 1) *
-                                       rx_desc_size;
-                       else
-                               tmp -= rx_desc_size;
-
-                       if (!(*tmp & (1<<31)))
-                               tmp2 = tmp;
-               } while (tmp != priv->rxring);
-
-               if (tmp2)
-                       priv->rxringtail = tmp2;
-       }
-
-       /* while there are filled descriptors */
-       while (!(*(priv->rxringtail) & (1<<31))) {
-               if (*(priv->rxringtail) & (1<<26))
-                       DMESGW("RX buffer overflow");
-               if (*(priv->rxringtail) & (1<<12))
-                       priv->stats.rxicverr++;
-
-               if (*(priv->rxringtail) & (1<<27)) {
-                       priv->stats.rxdmafail++;
-                       goto drop;
-               }
-
-               pci_dma_sync_single_for_cpu(priv->pdev,
-                                   priv->rxbuffer->dma,
-                                   priv->rxbuffersize * sizeof(u8),
-                                   PCI_DMA_FROMDEVICE);
-
-               first = *(priv->rxringtail) & (1<<29) ? 1 : 0;
-               if (first)
-                       priv->rx_prevlen = 0;
-
-               last = *(priv->rxringtail) & (1<<28) ? 1 : 0;
-               if (last) {
-                       lastlen = ((*priv->rxringtail) & 0xfff);
-
-                       /* if the last descriptor (that should tell us the total
-                        * packet len) tell us something less than the
-                        * descriptors len we had until now, then there is some
-                        * problem..
-                        * workaround to prevent kernel panic
-                        */
-                       if (lastlen < priv->rx_prevlen)
-                               len = 0;
-                       else
-                               len = lastlen-priv->rx_prevlen;
-
-                       if (*(priv->rxringtail) & (1<<13)) {
-                               if ((*(priv->rxringtail) & 0xfff) < 500)
-                                       priv->stats.rxcrcerrmin++;
-                               else if ((*(priv->rxringtail) & 0x0fff) > 1000)
-                                       priv->stats.rxcrcerrmax++;
-                               else
-                                       priv->stats.rxcrcerrmid++;
-
-                       }
-
-               } else {
-                       len = priv->rxbuffersize;
-               }
-
-               if (first && last) {
-                       padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
-               } else if (first) {
-                       padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
-                       if (padding)
-                               len -= 2;
-               } else {
-                       padding = 0;
-               }
-               padding = 0;
-               priv->rx_prevlen += len;
-
-               if (priv->rx_prevlen > MAX_FRAG_THRESHOLD + 100) {
-                       /* HW is probably passing several buggy frames without
-                        * FD or LD flag set.
-                        * Throw this garbage away to prevent skb memory
-                        * exhausting
-                        */
-                       if (!priv->rx_skb_complete)
-                               dev_kfree_skb_any(priv->rx_skb);
-                       priv->rx_skb_complete = 1;
-               }
-
-               signal = (unsigned char)((*(priv->rxringtail + 3) &
-                       0x00ff0000) >> 16);
-               signal = (signal & 0xfe) >> 1;
-
-               quality = (unsigned char)((*(priv->rxringtail+3)) & (0xff));
-
-               stats.mac_time[0] = *(priv->rxringtail+1);
-               stats.mac_time[1] = *(priv->rxringtail+2);
-
-               rxpower = ((char)((*(priv->rxringtail + 4) &
-                       0x00ff0000) >> 16)) / 2 - 42;
-
-               RSSI = ((u8)((*(priv->rxringtail + 3) &
-                       0x0000ff00) >> 8)) & 0x7f;
-
-               rate = ((*(priv->rxringtail)) &
-                       ((1<<23)|(1<<22)|(1<<21)|(1<<20)))>>20;
-
-               stats.rate = rtl8180_rate2rate(rate);
-               Antenna = (*(priv->rxringtail + 3) & 0x00008000) == 0 ? 0 : 1;
-               if (!rtl8180_IsWirelessBMode(stats.rate)) { /* OFDM rate. */
-                       RxAGC_dBm = rxpower+1;  /* bias */
-               } else { /* CCK rate. */
-                       RxAGC_dBm = signal; /* bit 0 discard */
-
-                       LNA = (u8) (RxAGC_dBm & 0x60) >> 5; /* bit 6~ bit 5 */
-                       BB  = (u8) (RxAGC_dBm & 0x1F); /* bit 4 ~ bit 0 */
-
-                       /* Pin_11b=-(LNA_gain+BB_gain) (dBm) */
-                       RxAGC_dBm = -(LNA_gain[LNA] + (BB * 2));
-
-                       RxAGC_dBm += 4; /* bias */
-               }
-
-               if (RxAGC_dBm & 0x80) /* absolute value */
-                       RXAGC = ~(RxAGC_dBm)+1;
-               bCckRate = rtl8180_IsWirelessBMode(stats.rate);
-               /* Translate RXAGC into 1-100. */
-               if (!rtl8180_IsWirelessBMode(stats.rate)) { /* OFDM rate. */
-                       if (RXAGC > 90)
-                               RXAGC = 90;
-                       else if (RXAGC < 25)
-                               RXAGC = 25;
-                       RXAGC = (90-RXAGC)*100/65;
-               } else { /* CCK rate. */
-                       if (RXAGC > 95)
-                               RXAGC = 95;
-                       else if (RXAGC < 30)
-                               RXAGC = 30;
-                       RXAGC = (95-RXAGC)*100/65;
-               }
-               priv->SignalStrength = (u8)RXAGC;
-               priv->RecvSignalPower = RxAGC_dBm;
-               priv->RxPower = rxpower;
-               priv->RSSI = RSSI;
-               /* SQ translation formula is provided by SD3 DZ. 2006.06.27 */
-               if (quality >= 127)
-                       /* 0 causes epc to show signal zero, walk around now */
-                       quality = 1;
-               else if (quality < 27)
-                       quality = 100;
-               else
-                       quality = 127 - quality;
-               priv->SignalQuality = quality;
-
-               stats.signal = (u8) quality;
-
-               stats.signalstrength = RXAGC;
-               if (stats.signalstrength > 100)
-                       stats.signalstrength = 100;
-               stats.signalstrength = (stats.signalstrength * 70) / 100 + 30;
-               stats.rssi = priv->wstats.qual.qual = priv->SignalQuality;
-               stats.noise = priv->wstats.qual.noise =
-                       100 - priv->wstats.qual.qual;
-               bHwError = (((*(priv->rxringtail)) & (0x00000fff)) == 4080) |
-                          (((*(priv->rxringtail)) & (0x04000000)) != 0) |
-                          (((*(priv->rxringtail)) & (0x08000000)) != 0) |
-                          (((~(*(priv->rxringtail))) & (0x10000000)) != 0) |
-                          (((~(*(priv->rxringtail))) & (0x20000000)) != 0);
-               bCRC = ((*(priv->rxringtail)) & (0x00002000)) >> 13;
-               bICV = ((*(priv->rxringtail)) & (0x00001000)) >> 12;
-               hdr = (struct ieee80211_hdr_4addr *)priv->rxbuffer->buf;
-                   fc = le16_to_cpu(hdr->frame_ctl);
-               type = WLAN_FC_GET_TYPE(fc);
-
-               if (IEEE80211_FTYPE_CTL != type &&
-                   !bHwError && !bCRC && !bICV &&
-                   eqMacAddr(priv->ieee80211->current_network.bssid,
-                       fc & IEEE80211_FCTL_TODS ? hdr->addr1 :
-                       fc & IEEE80211_FCTL_FROMDS ? hdr->addr2 :
-                       hdr->addr3)) {
-
-                       /* Perform signal smoothing for dynamic
-                        * mechanism on demand. This is different
-                        * with PerformSignalSmoothing8185 in smoothing
-                        * fomula. No dramatic adjustion is apply
-                        * because dynamic mechanism need some degree
-                        * of correctness. */
-                       PerformUndecoratedSignalSmoothing8185(priv, bCckRate);
-
-                       /* For good-looking singal strength. */
-                       SignalStrengthIndex = NetgearSignalStrengthTranslate(
-                               priv->LastSignalStrengthInPercent,
-                               priv->SignalStrength);
-
-                       priv->LastSignalStrengthInPercent = SignalStrengthIndex;
-                       priv->Stats_SignalStrength =
-                               TranslateToDbm8185((u8)SignalStrengthIndex);
-
-                       /*
-                        * We need more correct power of received packets and
-                        * the "SignalStrength" of RxStats is beautified, so we
-                        * record the correct power here.
-                        */
-
-                       priv->Stats_SignalQuality = (long)(
-                               priv->Stats_SignalQuality * 5 +
-                               (long)priv->SignalQuality + 5) / 6;
-
-                       priv->Stats_RecvSignalPower = (long)(
-                               priv->Stats_RecvSignalPower * 5 +
-                               priv->RecvSignalPower - 1) / 6;
-
-                       /*
-                        * Figure out which antenna received the last packet.
-                        * 0: aux, 1: main
-                        */
-                       priv->LastRxPktAntenna = Antenna ? 1 : 0;
-                       SwAntennaDiversityRxOk8185(dev, priv->SignalStrength);
-               }
-
-               if (first) {
-                       if (!priv->rx_skb_complete) {
-                               /* seems that HW sometimes fails to receive and
-                                * doesn't provide the last descriptor.
-                                */
-                               dev_kfree_skb_any(priv->rx_skb);
-                               priv->stats.rxnolast++;
-                       }
-                       priv->rx_skb = dev_alloc_skb(len+2);
-                       if (!priv->rx_skb)
-                               goto drop;
-
-                       priv->rx_skb_complete = 0;
-                       priv->rx_skb->dev = dev;
-               } else {
-                       /* if we are here we should have already RXed the first
-                        * frame.
-                        * If we get here and the skb is not allocated then
-                        * we have just throw out garbage (skb not allocated)
-                        * and we are still rxing garbage....
-                        */
-                       if (!priv->rx_skb_complete) {
-
-                               tmp_skb = dev_alloc_skb(
-                                       priv->rx_skb->len + len + 2);
-
-                               if (!tmp_skb)
-                                       goto drop;
-
-                               tmp_skb->dev = dev;
-
-                               memcpy(skb_put(tmp_skb, priv->rx_skb->len),
-                                       priv->rx_skb->data,
-                                       priv->rx_skb->len);
-
-                               dev_kfree_skb_any(priv->rx_skb);
-
-                               priv->rx_skb = tmp_skb;
-                       }
-               }
-
-               if (!priv->rx_skb_complete) {
-                       memcpy(skb_put(priv->rx_skb, len), ((unsigned char *)
-                               priv->rxbuffer->buf) + (padding ? 2 : 0), len);
-               }
-
-               if (last && !priv->rx_skb_complete) {
-                       if (priv->rx_skb->len > 4)
-                               skb_trim(priv->rx_skb, priv->rx_skb->len-4);
-                       if (!ieee80211_rtl_rx(priv->ieee80211,
-                                        priv->rx_skb, &stats))
-                               dev_kfree_skb_any(priv->rx_skb);
-                       priv->rx_skb_complete = 1;
-               }
-
-               pci_dma_sync_single_for_device(priv->pdev,
-                                   priv->rxbuffer->dma,
-                                   priv->rxbuffersize * sizeof(u8),
-                                   PCI_DMA_FROMDEVICE);
-
-drop: /* this is used when we have not enough mem */
-               /* restore the descriptor */
-               *(priv->rxringtail+2) = priv->rxbuffer->dma;
-               *(priv->rxringtail) = *(priv->rxringtail) & ~0xfff;
-               *(priv->rxringtail) =
-                       *(priv->rxringtail) | priv->rxbuffersize;
-
-               *(priv->rxringtail) =
-                       *(priv->rxringtail) | (1<<31);
-
-               priv->rxringtail += rx_desc_size;
-               if (priv->rxringtail >=
-                  (priv->rxring)+(priv->rxringcount)*rx_desc_size)
-                       priv->rxringtail = priv->rxring;
-
-               priv->rxbuffer = (priv->rxbuffer->next);
-       }
-}
-
-
-static void rtl8180_dma_kick(struct net_device *dev, int priority)
-{
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-
-       rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
-       write_nic_byte(dev, TX_DMA_POLLING,
-                       (1 << (priority + 1)) | priv->dma_poll_mask);
-       rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
-
-       force_pci_posting(dev);
-}
-
-static void rtl8180_data_hard_stop(struct net_device *dev)
-{
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-
-       rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
-       priv->dma_poll_stop_mask |= TPPOLLSTOP_AC_VIQ;
-       write_nic_byte(dev, TPPollStop, priv->dma_poll_stop_mask);
-       rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
-}
-
-static void rtl8180_data_hard_resume(struct net_device *dev)
-{
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-
-       rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
-       priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_AC_VIQ);
-       write_nic_byte(dev, TPPollStop, priv->dma_poll_stop_mask);
-       rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
-}
-
-/*
- * This function TX data frames when the ieee80211 stack requires this.
- * It checks also if we need to stop the ieee tx queue, eventually do it
- */
-static void rtl8180_hard_data_xmit(struct sk_buff *skb, struct net_device *dev,
-                                  int rate)
-{
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-       int mode;
-       struct ieee80211_hdr_3addr *h = (struct ieee80211_hdr_3addr *)skb->data;
-       bool morefrag = le16_to_cpu(h->frame_control) & IEEE80211_FCTL_MOREFRAGS;
-       unsigned long flags;
-       int priority;
-
-       mode = priv->ieee80211->iw_mode;
-
-       rate = ieeerate2rtlrate(rate);
-       /*
-        * This function doesn't require lock because we make sure it's called
-        * with the tx_lock already acquired.
-        * This come from the kernel's hard_xmit callback (through the ieee
-        * stack, or from the try_wake_queue (again through the ieee stack.
-        */
-       priority = AC2Q(skb->priority);
-       spin_lock_irqsave(&priv->tx_lock, flags);
-
-       if (priv->ieee80211->bHwRadioOff) {
-               spin_unlock_irqrestore(&priv->tx_lock, flags);
-
-               return;
-       }
-
-       if (!check_nic_enought_desc(dev, priority)) {
-               DMESGW("Error: no descriptor left by previous TX (avail %d) ",
-                       get_curr_tx_free_desc(dev, priority));
-               ieee80211_rtl_stop_queue(priv->ieee80211);
-       }
-       rtl8180_tx(dev, skb->data, skb->len, priority, morefrag, 0, rate);
-       if (!check_nic_enought_desc(dev, priority))
-               ieee80211_rtl_stop_queue(priv->ieee80211);
-
-       spin_unlock_irqrestore(&priv->tx_lock, flags);
-}
-
-/*
- * This is a rough attempt to TX a frame
- * This is called by the ieee 80211 stack to TX management frames.
- * If the ring is full packets are dropped (for data frame the queue
- * is stopped before this can happen). For this reason it is better
- * if the descriptors are larger than the largest management frame
- * we intend to TX: i'm unsure what the HW does if it will not find
- * the last fragment of a frame because it has been dropped...
- * Since queues for Management and Data frames are different we
- * might use a different lock than tx_lock (for example mgmt_tx_lock)
- */
-/* these function may loop if invoked with 0 descriptors or 0 len buffer */
-static int rtl8180_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
-{
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-       unsigned long flags;
-       int priority;
-
-       priority = MANAGE_PRIORITY;
-
-       spin_lock_irqsave(&priv->tx_lock, flags);
-
-       if (priv->ieee80211->bHwRadioOff) {
-               spin_unlock_irqrestore(&priv->tx_lock, flags);
-               dev_kfree_skb_any(skb);
-               return NETDEV_TX_OK;
-       }
-
-       rtl8180_tx(dev, skb->data, skb->len, priority,
-               0, 0, ieeerate2rtlrate(priv->ieee80211->basic_rate));
-
-       priv->ieee80211->stats.tx_bytes += skb->len;
-       priv->ieee80211->stats.tx_packets++;
-       spin_unlock_irqrestore(&priv->tx_lock, flags);
-
-       dev_kfree_skb_any(skb);
-       return NETDEV_TX_OK;
-}
-
-static void rtl8180_prepare_beacon(struct net_device *dev)
-{
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-       struct sk_buff *skb;
-
-       u16 word  = read_nic_word(dev, BcnItv);
-       word &= ~BcnItv_BcnItv; /* clear Bcn_Itv */
-
-       /* word |= 0x64; */
-       word |= cpu_to_le16(priv->ieee80211->current_network.beacon_interval);
-
-       write_nic_word(dev, BcnItv, word);
-
-       skb = ieee80211_get_beacon(priv->ieee80211);
-       if (skb) {
-               rtl8180_tx(dev, skb->data, skb->len, BEACON_PRIORITY,
-                       0, 0, ieeerate2rtlrate(priv->ieee80211->basic_rate));
-               dev_kfree_skb_any(skb);
-       }
-}
-
-/*
- * This function do the real dirty work: it enqueues a TX command descriptor in
- * the ring buffer, copyes the frame in a TX buffer and kicks the NIC to ensure
- * it does the DMA transfer.
- */
-short rtl8180_tx(struct net_device *dev, u8 *txbuf, int len, int priority,
-                bool morefrag, short descfrag, int rate)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       u32 *tail, *temp_tail;
-       u32 *begin;
-       u32 *buf;
-       int i;
-       int remain;
-       int buflen;
-       int count;
-       struct buffer *buflist;
-       struct ieee80211_hdr_3addr *frag_hdr =
-               (struct ieee80211_hdr_3addr *)txbuf;
-       u8 dest[ETH_ALEN];
-       u8 bUseShortPreamble = 0;
-       u8 bCTSEnable = 0;
-       u8 bRTSEnable = 0;
-       u16 Duration = 0;
-       u16 RtsDur = 0;
-       u16 ThisFrameTime = 0;
-       u16 TxDescDuration = 0;
-       bool ownbit_flag = false;
-
-       switch (priority) {
-       case MANAGE_PRIORITY:
-               tail = priv->txmapringtail;
-               begin = priv->txmapring;
-               buflist = priv->txmapbufstail;
-               count = priv->txringcount;
-               break;
-       case BK_PRIORITY:
-               tail = priv->txbkpringtail;
-               begin = priv->txbkpring;
-               buflist = priv->txbkpbufstail;
-               count = priv->txringcount;
-               break;
-       case BE_PRIORITY:
-               tail = priv->txbepringtail;
-               begin = priv->txbepring;
-               buflist = priv->txbepbufstail;
-               count = priv->txringcount;
-               break;
-       case VI_PRIORITY:
-               tail = priv->txvipringtail;
-               begin = priv->txvipring;
-               buflist = priv->txvipbufstail;
-               count = priv->txringcount;
-               break;
-       case VO_PRIORITY:
-               tail = priv->txvopringtail;
-               begin = priv->txvopring;
-               buflist = priv->txvopbufstail;
-               count = priv->txringcount;
-               break;
-       case HI_PRIORITY:
-               tail = priv->txhpringtail;
-               begin = priv->txhpring;
-               buflist = priv->txhpbufstail;
-               count = priv->txringcount;
-               break;
-       case BEACON_PRIORITY:
-               tail = priv->txbeaconringtail;
-               begin = priv->txbeaconring;
-               buflist = priv->txbeaconbufstail;
-               count = priv->txbeaconcount;
-               break;
-       default:
-               return -1;
-               break;
-       }
-
-       memcpy(&dest, frag_hdr->addr1, ETH_ALEN);
-       if (is_multicast_ether_addr(dest)) {
-               Duration = 0;
-               RtsDur = 0;
-               bRTSEnable = 0;
-               bCTSEnable = 0;
-
-               ThisFrameTime = ComputeTxTime(len + sCrcLng,
-                       rtl8180_rate2rate(rate), 0, bUseShortPreamble);
-               TxDescDuration = ThisFrameTime;
-       } else { /* Unicast packet */
-               u16 AckTime;
-
-               /* for Keep alive */
-               priv->NumTxUnicast++;
-
-               /* Figure out ACK rate according to BSS basic rate
-                * and Tx rate.
-                * AckCTSLng = 14 use 1M bps send
-                */
-               AckTime = ComputeTxTime(14, 10, 0, 0);
-
-               if (((len + sCrcLng) > priv->rts) && priv->rts) { /* RTS/CTS. */
-                       u16 RtsTime, CtsTime;
-                       bRTSEnable = 1;
-                       bCTSEnable = 0;
-
-                       /* Rate and time required for RTS. */
-                       RtsTime = ComputeTxTime(sAckCtsLng / 8,
-                               priv->ieee80211->basic_rate, 0, 0);
-
-                       /* Rate and time required for CTS.
-                        * AckCTSLng = 14 use 1M bps send
-                        */
-                       CtsTime = ComputeTxTime(14, 10, 0, 0);
-
-                       /* Figure out time required to transmit this frame. */
-                       ThisFrameTime = ComputeTxTime(len + sCrcLng,
-                               rtl8180_rate2rate(rate), 0,
-                               bUseShortPreamble);
-
-                       /* RTS-CTS-ThisFrame-ACK. */
-                       RtsDur = CtsTime + ThisFrameTime +
-                               AckTime + 3 * aSifsTime;
-
-                       TxDescDuration = RtsTime + RtsDur;
-               } else { /* Normal case. */
-                       bCTSEnable = 0;
-                       bRTSEnable = 0;
-                       RtsDur = 0;
-
-                       ThisFrameTime = ComputeTxTime(len + sCrcLng,
-                               rtl8180_rate2rate(rate), 0, bUseShortPreamble);
-                       TxDescDuration = ThisFrameTime + aSifsTime + AckTime;
-               }
-
-               if (!(le16_to_cpu(frag_hdr->frame_control) & IEEE80211_FCTL_MOREFRAGS)) {
-                       /* ThisFrame-ACK. */
-                       Duration = aSifsTime + AckTime;
-               } else { /* One or more fragments remained. */
-                       u16 NextFragTime;
-
-                       /* pretend following packet length = current packet */
-                       NextFragTime = ComputeTxTime(len + sCrcLng,
-                               rtl8180_rate2rate(rate), 0, bUseShortPreamble);
-
-                       /* ThisFrag-ACk-NextFrag-ACK. */
-                       Duration = NextFragTime + 3 * aSifsTime + 2 * AckTime;
-               }
-
-       } /* End of Unicast packet */
-
-       frag_hdr->duration_id = Duration;
-
-       buflen = priv->txbuffsize;
-       remain = len;
-       temp_tail = tail;
-
-       while (remain != 0) {
-               mb();
-               if (!buflist) {
-                       DMESGE("TX buffer error, cannot TX frames. pri %d.",
-                               priority);
-                       return -1;
-               }
-               buf = buflist->buf;
-
-               if ((*tail & (1 << 31)) && (priority != BEACON_PRIORITY)) {
-                       DMESGW("No more TX desc, returning %x of %x",
-                              remain, len);
-                       priv->stats.txrdu++;
-                       return remain;
-               }
-
-               *tail = 0; /* zeroes header */
-               *(tail+1) = 0;
-               *(tail+3) = 0;
-               *(tail+5) = 0;
-               *(tail+6) = 0;
-               *(tail+7) = 0;
-
-               /* FIXME: should be triggered by HW encryption parameters.*/
-               *tail |= (1<<15); /* no encrypt */
-
-               if (remain == len && !descfrag) {
-                       ownbit_flag = false;
-                       *tail = *tail | (1 << 29); /* first segment of packet */
-                       *tail = *tail | (len);
-               } else {
-                       ownbit_flag = true;
-               }
-
-               for (i = 0; i < buflen && remain > 0; i++, remain--) {
-                       /* copy data into descriptor pointed DMAble buffer */
-                       ((u8 *)buf)[i] = txbuf[i];
-
-                       if (remain == 4 && i+4 >= buflen)
-                               break;
-                       /* ensure the last desc has at least 4 bytes payload */
-               }
-               txbuf = txbuf + i;
-               *(tail+3) = *(tail+3) & ~0xfff;
-               *(tail+3) = *(tail+3) | i; /* buffer length */
-
-               if (bCTSEnable)
-                       *tail |= (1<<18);
-
-               if (bRTSEnable) { /* rts enable */
-                       /* RTS RATE */
-                       *tail |= (ieeerate2rtlrate(
-                               priv->ieee80211->basic_rate) << 19);
-
-                       *tail |= (1<<23); /* rts enable */
-                       *(tail+1) |= (RtsDur&0xffff); /* RTS Duration */
-               }
-               *(tail+3) |= ((TxDescDuration&0xffff)<<16); /* DURATION */
-
-               *(tail + 5) |= (11 << 8); /* retry lim; */
-
-               *tail = *tail | ((rate&0xf) << 24);
-
-               if (morefrag)
-                       *tail = (*tail) | (1<<17); /* more fragment */
-               if (!remain)
-                       *tail = (*tail) | (1<<28); /* last segment of frame */
-
-               *(tail+5) = *(tail+5)|(2<<27);
-               *(tail+7) = *(tail+7)|(1<<4);
-
-               wmb();
-               if (ownbit_flag)
-                       /* descriptor ready to be txed */
-                       *tail |= (1 << 31);
-
-               if ((tail - begin)/8 == count-1)
-                       tail = begin;
-               else
-                       tail = tail+8;
-
-               buflist = buflist->next;
-
-               mb();
-
-               switch (priority) {
-               case MANAGE_PRIORITY:
-                       priv->txmapringtail = tail;
-                       priv->txmapbufstail = buflist;
-                       break;
-               case BK_PRIORITY:
-                       priv->txbkpringtail = tail;
-                       priv->txbkpbufstail = buflist;
-                       break;
-               case BE_PRIORITY:
-                       priv->txbepringtail = tail;
-                       priv->txbepbufstail = buflist;
-                       break;
-               case VI_PRIORITY:
-                       priv->txvipringtail = tail;
-                       priv->txvipbufstail = buflist;
-                       break;
-               case VO_PRIORITY:
-                       priv->txvopringtail = tail;
-                       priv->txvopbufstail = buflist;
-                       break;
-               case HI_PRIORITY:
-                       priv->txhpringtail = tail;
-                       priv->txhpbufstail = buflist;
-                       break;
-               case BEACON_PRIORITY:
-                       /*
-                        * The HW seems to be happy with the 1st
-                        * descriptor filled and the 2nd empty...
-                        * So always update descriptor 1 and never
-                        * touch 2nd
-                        */
-                       break;
-               }
-       }
-       *temp_tail = *temp_tail | (1<<31); /* descriptor ready to be txed */
-       rtl8180_dma_kick(dev, priority);
-
-       return 0;
-}
-
-void rtl8180_irq_rx_tasklet(struct r8180_priv *priv);
-
-static void rtl8180_link_change(struct net_device *dev)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       u16 beacon_interval;
-       struct ieee80211_network *net = &priv->ieee80211->current_network;
-
-       rtl8180_update_msr(dev);
-
-       rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
-
-       write_nic_dword(dev, BSSID, ((u32 *)net->bssid)[0]);
-       write_nic_word(dev, BSSID+4, ((u16 *)net->bssid)[2]);
-
-       beacon_interval  = read_nic_word(dev, BEACON_INTERVAL);
-       beacon_interval &= ~BEACON_INTERVAL_MASK;
-       beacon_interval |= net->beacon_interval;
-       write_nic_word(dev, BEACON_INTERVAL, beacon_interval);
-
-       rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
-
-       rtl8180_set_chan(dev, priv->chan);
-}
-
-static void rtl8180_rq_tx_ack(struct net_device *dev)
-{
-
-       struct r8180_priv *priv = ieee80211_priv(dev);
-
-       write_nic_byte(dev, CONFIG4,
-               read_nic_byte(dev, CONFIG4) | CONFIG4_PWRMGT);
-       priv->ack_tx_to_ieee = 1;
-}
-
-static short rtl8180_is_tx_queue_empty(struct net_device *dev)
-{
-
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       u32 *d;
-
-       for (d = priv->txmapring;
-               d < priv->txmapring + priv->txringcount; d += 8)
-                       if (*d & (1<<31))
-                               return 0;
-
-       for (d = priv->txbkpring;
-               d < priv->txbkpring + priv->txringcount; d += 8)
-                       if (*d & (1<<31))
-                               return 0;
-
-       for (d = priv->txbepring;
-               d < priv->txbepring + priv->txringcount; d += 8)
-                       if (*d & (1<<31))
-                               return 0;
-
-       for (d = priv->txvipring;
-               d < priv->txvipring + priv->txringcount; d += 8)
-                       if (*d & (1<<31))
-                               return 0;
-
-       for (d = priv->txvopring;
-               d < priv->txvopring + priv->txringcount; d += 8)
-                       if (*d & (1<<31))
-                               return 0;
-
-       for (d = priv->txhpring;
-               d < priv->txhpring + priv->txringcount; d += 8)
-                       if (*d & (1<<31))
-                               return 0;
-       return 1;
-}
-
-static void rtl8180_hw_wakeup(struct net_device *dev)
-{
-       unsigned long flags;
-       struct r8180_priv *priv = ieee80211_priv(dev);
-
-       spin_lock_irqsave(&priv->ps_lock, flags);
-       write_nic_byte(dev, CONFIG4,
-               read_nic_byte(dev, CONFIG4) & ~CONFIG4_PWRMGT);
-       if (priv->rf_wakeup)
-               priv->rf_wakeup(dev);
-       spin_unlock_irqrestore(&priv->ps_lock, flags);
-}
-
-static void rtl8180_hw_sleep_down(struct net_device *dev)
-{
-       unsigned long flags;
-       struct r8180_priv *priv = ieee80211_priv(dev);
-
-       spin_lock_irqsave(&priv->ps_lock, flags);
-       if (priv->rf_sleep)
-               priv->rf_sleep(dev);
-       spin_unlock_irqrestore(&priv->ps_lock, flags);
-}
-
-static void rtl8180_hw_sleep(struct net_device *dev, u32 th, u32 tl)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       u32 rb = jiffies;
-       unsigned long flags;
-
-       spin_lock_irqsave(&priv->ps_lock, flags);
-
-       /*
-        * Writing HW register with 0 equals to disable
-        * the timer, that is not really what we want
-        */
-       tl -= MSECS(4+16+7);
-
-       /*
-        * If the interval in which we are requested to sleep is too
-        * short then give up and remain awake
-        */
-       if (((tl >= rb) && (tl-rb) <= MSECS(MIN_SLEEP_TIME))
-               || ((rb > tl) && (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
-               spin_unlock_irqrestore(&priv->ps_lock, flags);
-               netdev_warn(dev, "too short to sleep\n");
-               return;
-       }
-
-       {
-               u32 tmp = (tl > rb) ? (tl-rb) : (rb-tl);
-
-               priv->DozePeriodInPast2Sec += jiffies_to_msecs(tmp);
-               /* as tl may be less than rb */
-               queue_delayed_work(priv->ieee80211->wq,
-                       &priv->ieee80211->hw_wakeup_wq, tmp);
-       }
-       /*
-        * If we suspect the TimerInt is gone beyond tl
-        * while setting it, then give up
-        */
-
-       if (((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME))) ||
-               ((tl < rb) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))) {
-               spin_unlock_irqrestore(&priv->ps_lock, flags);
-               return;
-       }
-
-       queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_sleep_wq);
-       spin_unlock_irqrestore(&priv->ps_lock, flags);
-}
-
-static void rtl8180_wmm_single_param_update(struct net_device *dev,
-       u8 mode, AC_CODING eACI, PAC_PARAM param)
-{
-       u8 u1bAIFS;
-       u32 u4bAcParam;
-
-       /* Retrieve parameters to update. */
-       /* Mode G/A: slotTimeTimer = 9; Mode B: 20 */
-       u1bAIFS = param->f.AciAifsn.f.AIFSN * ((mode & IEEE_G) == IEEE_G ?
-               9 : 20) + aSifsTime;
-       u4bAcParam = (((u32)param->f.TXOPLimit << AC_PARAM_TXOP_LIMIT_OFFSET) |
-               ((u32)param->f.Ecw.f.ECWmax << AC_PARAM_ECW_MAX_OFFSET) |
-               ((u32)param->f.Ecw.f.ECWmin << AC_PARAM_ECW_MIN_OFFSET) |
-               ((u32)u1bAIFS << AC_PARAM_AIFS_OFFSET));
-
-       switch (eACI) {
-       case AC1_BK:
-               write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
-               return;
-       case AC0_BE:
-               write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
-               return;
-       case AC2_VI:
-               write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
-               return;
-       case AC3_VO:
-               write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
-               return;
-       default:
-               pr_warn("SetHwReg8185(): invalid ACI: %d!\n", eACI);
-               return;
-       }
-}
-
-static void rtl8180_wmm_param_update(struct work_struct *work)
-{
-       struct ieee80211_device *ieee = container_of(work,
-               struct ieee80211_device, wmm_param_update_wq);
-       struct net_device *dev = ieee->dev;
-       u8 *ac_param = (u8 *)(ieee->current_network.wmm_param);
-       u8 mode = ieee->current_network.mode;
-       AC_CODING eACI;
-       AC_PARAM AcParam;
-
-       if (!ieee->current_network.QoS_Enable) {
-               /* legacy ac_xx_param update */
-               AcParam.longData = 0;
-               AcParam.f.AciAifsn.f.AIFSN = 2; /* Follow 802.11 DIFS. */
-               AcParam.f.AciAifsn.f.ACM = 0;
-               AcParam.f.Ecw.f.ECWmin = 3; /* Follow 802.11 CWmin. */
-               AcParam.f.Ecw.f.ECWmax = 7; /* Follow 802.11 CWmax. */
-               AcParam.f.TXOPLimit = 0;
-
-               for (eACI = 0; eACI < AC_MAX; eACI++) {
-                       AcParam.f.AciAifsn.f.ACI = (u8)eACI;
-
-                       rtl8180_wmm_single_param_update(dev, mode, eACI,
-                               (PAC_PARAM)&AcParam);
-               }
-               return;
-       }
-
-       for (eACI = 0; eACI < AC_MAX; eACI++) {
-               rtl8180_wmm_single_param_update(dev, mode,
-                       ((PAC_PARAM)ac_param)->f.AciAifsn.f.ACI,
-                       (PAC_PARAM)ac_param);
-
-               ac_param += sizeof(AC_PARAM);
-       }
-}
-
-void rtl8180_restart_wq(struct work_struct *work);
-void rtl8180_watch_dog_wq(struct work_struct *work);
-void rtl8180_hw_wakeup_wq(struct work_struct *work);
-void rtl8180_hw_sleep_wq(struct work_struct *work);
-void rtl8180_sw_antenna_wq(struct work_struct *work);
-void rtl8180_watch_dog(struct net_device *dev);
-
-static void watch_dog_adaptive(unsigned long data)
-{
-       struct r8180_priv *priv = ieee80211_priv((struct net_device *)data);
-
-       if (!priv->up) {
-               DMESG("<----watch_dog_adaptive():driver is not up!\n");
-               return;
-       }
-
-       /* Tx High Power Mechanism. */
-       if (CheckHighPower((struct net_device *)data))
-               queue_work(priv->ieee80211->wq,
-                       (void *)&priv->ieee80211->tx_pw_wq);
-
-       /* Tx Power Tracking on 87SE. */
-       if (CheckTxPwrTracking((struct net_device *)data))
-               TxPwrTracking87SE((struct net_device *)data);
-
-       /* Perform DIG immediately. */
-       if (CheckDig((struct net_device *)data))
-               queue_work(priv->ieee80211->wq,
-                       (void *)&priv->ieee80211->hw_dig_wq);
-
-       rtl8180_watch_dog((struct net_device *)data);
-
-       queue_work(priv->ieee80211->wq,
-               (void *)&priv->ieee80211->GPIOChangeRFWorkItem);
-
-       priv->watch_dog_timer.expires = jiffies +
-               MSECS(IEEE80211_WATCH_DOG_TIME);
-
-       add_timer(&priv->watch_dog_timer);
-}
-
-static struct rtl8187se_channel_list channel_plan_list[] = {
-       /* FCC */
-       {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40,
-               44, 48, 52, 56, 60, 64}, 19},
-
-       /* IC */
-       {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11}, 11},
-
-       /* ETSI */
-       {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40,
-               44, 48, 52, 56, 60, 64}, 21},
-
-       /* Spain. Change to ETSI. */
-       {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40,
-               44, 48, 52, 56, 60, 64}, 21},
-
-       /* France. Change to ETSI. */
-       {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40,
-               44, 48, 52, 56, 60, 64}, 21},
-
-       /* MKK */
-       {{14, 36, 40, 44, 48, 52, 56, 60, 64}, 9},
-
-       /* MKK1 */
-       {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 36,
-               40, 44, 48, 52, 56, 60, 64}, 22},
-
-       /* Israel. */
-       {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40,
-               44, 48, 52, 56, 60, 64}, 21},
-
-       /* For 11a , TELEC */
-       {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 34, 38, 42, 46}, 17},
-
-       /* For Global Domain. 1-11 active, 12-14 passive. */
-       {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14}, 14},
-
-       /* world wide 13: ch1~ch11 active, ch12~13 passive */
-       {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13}
-};
-
-static void rtl8180_set_channel_map(u8 channel_plan,
-                                   struct ieee80211_device *ieee)
-{
-       int i;
-
-       ieee->MinPassiveChnlNum = MAX_CHANNEL_NUMBER+1;
-       ieee->IbssStartChnl = 0;
-
-       switch (channel_plan) {
-       case COUNTRY_CODE_FCC:
-       case COUNTRY_CODE_IC:
-       case COUNTRY_CODE_ETSI:
-       case COUNTRY_CODE_SPAIN:
-       case COUNTRY_CODE_FRANCE:
-       case COUNTRY_CODE_MKK:
-       case COUNTRY_CODE_MKK1:
-       case COUNTRY_CODE_ISRAEL:
-       case COUNTRY_CODE_TELEC:
-               {
-                       Dot11d_Init(ieee);
-                       ieee->bGlobalDomain = false;
-                       if (channel_plan_list[channel_plan].len != 0) {
-                               /* Clear old channel map */
-                               memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
-                               /* Set new channel map */
-                               for (i = 0; i < channel_plan_list[channel_plan].len; i++) {
-                                       if (channel_plan_list[channel_plan].channel[i] <= 14)
-                                               GET_DOT11D_INFO(ieee)->channel_map[channel_plan_list[channel_plan].channel[i]] = 1;
-                               }
-                       }
-                       break;
-               }
-       case COUNTRY_CODE_GLOBAL_DOMAIN:
-               {
-                       GET_DOT11D_INFO(ieee)->bEnabled = false;
-                       Dot11d_Reset(ieee);
-                       ieee->bGlobalDomain = true;
-                       break;
-               }
-       case COUNTRY_CODE_WORLD_WIDE_13_INDEX:
-               {
-                       ieee->MinPassiveChnlNum = 12;
-                       ieee->IbssStartChnl = 10;
-                       break;
-               }
-       default:
-               {
-                       Dot11d_Init(ieee);
-                       ieee->bGlobalDomain = false;
-                       memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
-                       for (i = 1; i <= 14; i++)
-                               GET_DOT11D_INFO(ieee)->channel_map[i] = 1;
-                       break;
-               }
-       }
-}
-
-void GPIOChangeRFWorkItemCallBack(struct work_struct *work);
-
-static void rtl8180_statistics_init(struct stats *pstats)
-{
-       memset(pstats, 0, sizeof(struct stats));
-}
-
-static void rtl8180_link_detect_init(struct link_detect_t *plink_detect)
-{
-       memset(plink_detect, 0, sizeof(struct link_detect_t));
-       plink_detect->slot_num = DEFAULT_SLOT_NUM;
-}
-
-static void rtl8187se_eeprom_register_read(struct eeprom_93cx6 *eeprom)
-{
-       struct net_device *dev = eeprom->data;
-       u8 reg = read_nic_byte(dev, EPROM_CMD);
-
-       eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
-       eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
-       eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
-       eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
-}
-
-static void rtl8187se_eeprom_register_write(struct eeprom_93cx6 *eeprom)
-{
-       struct net_device *dev = eeprom->data;
-       u8 reg = 2 << 6;
-
-       if (eeprom->reg_data_in)
-               reg |= RTL818X_EEPROM_CMD_WRITE;
-       if (eeprom->reg_data_out)
-               reg |= RTL818X_EEPROM_CMD_READ;
-       if (eeprom->reg_data_clock)
-               reg |= RTL818X_EEPROM_CMD_CK;
-       if (eeprom->reg_chip_select)
-               reg |= RTL818X_EEPROM_CMD_CS;
-
-       write_nic_byte(dev, EPROM_CMD, reg);
-       read_nic_byte(dev, EPROM_CMD);
-       udelay(10);
-}
-
-static short rtl8180_init(struct net_device *dev)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       u16 word;
-       u16 usValue;
-       u16 tmpu16;
-       int i, j;
-       struct eeprom_93cx6 eeprom;
-       u16 eeprom_val;
-
-       eeprom.data = dev;
-       eeprom.register_read = rtl8187se_eeprom_register_read;
-       eeprom.register_write = rtl8187se_eeprom_register_write;
-       eeprom.width = PCI_EEPROM_WIDTH_93C46;
-
-       eeprom_93cx6_read(&eeprom, EEPROM_COUNTRY_CODE>>1, &eeprom_val);
-       priv->channel_plan = eeprom_val & 0xFF;
-       if (priv->channel_plan > COUNTRY_CODE_GLOBAL_DOMAIN) {
-               netdev_err(dev, "rtl8180_init: Invalid channel plan! Set to default.\n");
-               priv->channel_plan = 0;
-       }
-
-       DMESG("Channel plan is %d\n", priv->channel_plan);
-       rtl8180_set_channel_map(priv->channel_plan, priv->ieee80211);
-
-       /* FIXME: these constants are placed in a bad pleace. */
-       priv->txbuffsize = 2048;        /* 1024; */
-       priv->txringcount = 32;         /* 32; */
-       priv->rxbuffersize = 2048;      /* 1024; */
-       priv->rxringcount = 64;         /* 32; */
-       priv->txbeaconcount = 2;
-       priv->rx_skb_complete = 1;
-
-       priv->RFChangeInProgress = false;
-       priv->SetRFPowerStateInProgress = false;
-       priv->RFProgType = 0;
-
-       priv->irq_enabled = 0;
-
-       rtl8180_statistics_init(&priv->stats);
-       rtl8180_link_detect_init(&priv->link_detect);
-
-       priv->ack_tx_to_ieee = 0;
-       priv->ieee80211->current_network.beacon_interval =
-               DEFAULT_BEACONINTERVAL;
-       priv->ieee80211->iw_mode = IW_MODE_INFRA;
-       priv->ieee80211->softmac_features  = IEEE_SOFTMAC_SCAN |
-               IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
-               IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE;
-       priv->ieee80211->active_scan = 1;
-       priv->ieee80211->rate = 110; /* 11 mbps */
-       priv->ieee80211->modulation = IEEE80211_CCK_MODULATION;
-       priv->ieee80211->host_encrypt = 1;
-       priv->ieee80211->host_decrypt = 1;
-       priv->ieee80211->sta_wake_up = rtl8180_hw_wakeup;
-       priv->ieee80211->ps_request_tx_ack = rtl8180_rq_tx_ack;
-       priv->ieee80211->enter_sleep_state = rtl8180_hw_sleep;
-       priv->ieee80211->ps_is_queue_empty = rtl8180_is_tx_queue_empty;
-
-       priv->hw_wep = hwwep;
-       priv->dev = dev;
-       priv->retry_rts = DEFAULT_RETRY_RTS;
-       priv->retry_data = DEFAULT_RETRY_DATA;
-       priv->RFChangeInProgress = false;
-       priv->SetRFPowerStateInProgress = false;
-       priv->RFProgType = 0;
-       priv->bInactivePs = true; /* false; */
-       priv->ieee80211->bInactivePs = priv->bInactivePs;
-       priv->bSwRfProcessing = false;
-       priv->eRFPowerState = RF_OFF;
-       priv->RfOffReason = 0;
-       priv->led_strategy = SW_LED_MODE0;
-       priv->TxPollingTimes = 0;
-       priv->bLeisurePs = true;
-       priv->dot11PowerSaveMode = ACTIVE;
-       priv->AdMinCheckPeriod = 5;
-       priv->AdMaxCheckPeriod = 10;
-       priv->AdMaxRxSsThreshold = 30;  /* 60->30 */
-       priv->AdRxSsThreshold = 20;     /* 50->20 */
-       priv->AdCheckPeriod = priv->AdMinCheckPeriod;
-       priv->AdTickCount = 0;
-       priv->AdRxSignalStrength = -1;
-       priv->RegSwAntennaDiversityMechanism = 0;
-       priv->RegDefaultAntenna = 0;
-       priv->SignalStrength = 0;
-       priv->AdRxOkCnt = 0;
-       priv->CurrAntennaIndex = 0;
-       priv->AdRxSsBeforeSwitched = 0;
-       init_timer(&priv->SwAntennaDiversityTimer);
-       priv->SwAntennaDiversityTimer.data = (unsigned long)dev;
-       priv->SwAntennaDiversityTimer.function =
-               (void *)SwAntennaDiversityTimerCallback;
-       priv->bDigMechanism = true;
-       priv->InitialGain = 6;
-       priv->bXtalCalibration = false;
-       priv->XtalCal_Xin = 0;
-       priv->XtalCal_Xout = 0;
-       priv->bTxPowerTrack = false;
-       priv->ThermalMeter = 0;
-       priv->FalseAlarmRegValue = 0;
-       priv->RegDigOfdmFaUpTh = 0xc; /* Upper threshold of OFDM false alarm,
-                                       which is used in DIG. */
-       priv->DIG_NumberFallbackVote = 0;
-       priv->DIG_NumberUpgradeVote = 0;
-       priv->LastSignalStrengthInPercent = 0;
-       priv->Stats_SignalStrength = 0;
-       priv->LastRxPktAntenna = 0;
-       priv->SignalQuality = 0; /* in 0-100 index. */
-       priv->Stats_SignalQuality = 0;
-       priv->RecvSignalPower = 0; /* in dBm. */
-       priv->Stats_RecvSignalPower = 0;
-       priv->AdMainAntennaRxOkCnt = 0;
-       priv->AdAuxAntennaRxOkCnt = 0;
-       priv->bHWAdSwitched = false;
-       priv->bRegHighPowerMechanism = true;
-       priv->RegHiPwrUpperTh = 77;
-       priv->RegHiPwrLowerTh = 75;
-       priv->RegRSSIHiPwrUpperTh = 70;
-       priv->RegRSSIHiPwrLowerTh = 20;
-       priv->bCurCCKPkt = false;
-       priv->UndecoratedSmoothedSS = -1;
-       priv->bToUpdateTxPwr = false;
-       priv->CurCCKRSSI = 0;
-       priv->RxPower = 0;
-       priv->RSSI = 0;
-       priv->NumTxOkTotal = 0;
-       priv->NumTxUnicast = 0;
-       priv->keepAliveLevel = DEFAULT_KEEP_ALIVE_LEVEL;
-       priv->CurrRetryCnt = 0;
-       priv->LastRetryCnt = 0;
-       priv->LastTxokCnt = 0;
-       priv->LastRxokCnt = 0;
-       priv->LastRetryRate = 0;
-       priv->bTryuping = 0;
-       priv->CurrTxRate = 0;
-       priv->CurrRetryRate = 0;
-       priv->TryupingCount = 0;
-       priv->TryupingCountNoData = 0;
-       priv->TryDownCountLowData = 0;
-       priv->LastTxOKBytes = 0;
-       priv->LastFailTxRate = 0;
-       priv->LastFailTxRateSS = 0;
-       priv->FailTxRateCount = 0;
-       priv->LastTxThroughput = 0;
-       priv->NumTxOkBytesTotal = 0;
-       priv->ForcedDataRate = 0;
-       priv->RegBModeGainStage = 1;
-
-       priv->promisc = (dev->flags & IFF_PROMISC) ? 1 : 0;
-       spin_lock_init(&priv->irq_th_lock);
-       spin_lock_init(&priv->tx_lock);
-       spin_lock_init(&priv->ps_lock);
-       spin_lock_init(&priv->rf_ps_lock);
-       sema_init(&priv->wx_sem, 1);
-       INIT_WORK(&priv->reset_wq, (void *)rtl8180_restart_wq);
-       INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,
-                         (void *)rtl8180_hw_wakeup_wq);
-       INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,
-                         (void *)rtl8180_hw_sleep_wq);
-       INIT_WORK(&priv->ieee80211->wmm_param_update_wq,
-                 (void *)rtl8180_wmm_param_update);
-       INIT_DELAYED_WORK(&priv->ieee80211->rate_adapter_wq,
-                         (void *)rtl8180_rate_adapter);
-       INIT_DELAYED_WORK(&priv->ieee80211->hw_dig_wq,
-                        (void *)rtl8180_hw_dig_wq);
-       INIT_DELAYED_WORK(&priv->ieee80211->tx_pw_wq,
-                        (void *)rtl8180_tx_pw_wq);
-       INIT_DELAYED_WORK(&priv->ieee80211->GPIOChangeRFWorkItem,
-                        (void *) GPIOChangeRFWorkItemCallBack);
-       tasklet_init(&priv->irq_rx_tasklet,
-                    (void(*)(unsigned long)) rtl8180_irq_rx_tasklet,
-                    (unsigned long)priv);
-
-       init_timer(&priv->watch_dog_timer);
-       priv->watch_dog_timer.data = (unsigned long)dev;
-       priv->watch_dog_timer.function = watch_dog_adaptive;
-
-       init_timer(&priv->rateadapter_timer);
-       priv->rateadapter_timer.data = (unsigned long)dev;
-       priv->rateadapter_timer.function = timer_rate_adaptive;
-       priv->RateAdaptivePeriod = RATE_ADAPTIVE_TIMER_PERIOD;
-       priv->bEnhanceTxPwr = false;
-
-       priv->ieee80211->softmac_hard_start_xmit = rtl8180_hard_start_xmit;
-       priv->ieee80211->set_chan = rtl8180_set_chan;
-       priv->ieee80211->link_change = rtl8180_link_change;
-       priv->ieee80211->softmac_data_hard_start_xmit = rtl8180_hard_data_xmit;
-       priv->ieee80211->data_hard_stop = rtl8180_data_hard_stop;
-       priv->ieee80211->data_hard_resume = rtl8180_data_hard_resume;
-
-       priv->ieee80211->init_wmmparam_flag = 0;
-
-       priv->ieee80211->start_send_beacons = rtl8180_start_tx_beacon;
-       priv->ieee80211->stop_send_beacons = rtl8180_beacon_tx_disable;
-       priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
-
-       priv->ShortRetryLimit = 7;
-       priv->LongRetryLimit = 7;
-       priv->EarlyRxThreshold = 7;
-
-       priv->TransmitConfig =  (1<<TCR_DurProcMode_OFFSET) |
-                               (7<<TCR_MXDMA_OFFSET) |
-                               (priv->ShortRetryLimit<<TCR_SRL_OFFSET) |
-                               (priv->LongRetryLimit<<TCR_LRL_OFFSET);
-
-       priv->ReceiveConfig =   RCR_AMF | RCR_ADF | RCR_ACF |
-                               RCR_AB | RCR_AM | RCR_APM |
-                               (7<<RCR_MXDMA_OFFSET) |
-                               (priv->EarlyRxThreshold<<RCR_FIFO_OFFSET) |
-                               (priv->EarlyRxThreshold == 7 ?
-                                        RCR_ONLYERLPKT : 0);
-
-       priv->IntrMask          = IMR_TMGDOK | IMR_TBDER |
-                                 IMR_THPDER | IMR_THPDOK |
-                                 IMR_TVODER | IMR_TVODOK |
-                                 IMR_TVIDER | IMR_TVIDOK |
-                                 IMR_TBEDER | IMR_TBEDOK |
-                                 IMR_TBKDER | IMR_TBKDOK |
-                                 IMR_RDU |
-                                 IMR_RER | IMR_ROK |
-                                 IMR_RQoSOK;
-
-       priv->InitialGain = 6;
-
-       DMESG("MAC controller is a RTL8187SE b/g");
-
-       priv->ieee80211->modulation |= IEEE80211_OFDM_MODULATION;
-       priv->ieee80211->short_slot = 1;
-
-       eeprom_93cx6_read(&eeprom, EEPROM_SW_REVD_OFFSET, &usValue);
-       DMESG("usValue is %#hx\n", usValue);
-       /* 3Read AntennaDiversity */
-
-       /* SW Antenna Diversity. */
-       priv->EEPROMSwAntennaDiversity = (usValue & EEPROM_SW_AD_MASK) ==
-               EEPROM_SW_AD_ENABLE;
-
-       /* Default Antenna to use. */
-       priv->EEPROMDefaultAntenna1 = (usValue & EEPROM_DEF_ANT_MASK) ==
-               EEPROM_DEF_ANT_1;
-
-       if (priv->RegSwAntennaDiversityMechanism == 0) /* Auto */
-               /* 0: default from EEPROM. */
-               priv->bSwAntennaDiverity = priv->EEPROMSwAntennaDiversity;
-       else
-               /* 1:disable antenna diversity, 2: enable antenna diversity. */
-               priv->bSwAntennaDiverity =
-                       priv->RegSwAntennaDiversityMechanism == 2;
-
-       if (priv->RegDefaultAntenna == 0)
-               /* 0: default from EEPROM. */
-               priv->bDefaultAntenna1 = priv->EEPROMDefaultAntenna1;
-       else
-               /* 1: main, 2: aux. */
-               priv->bDefaultAntenna1 = priv->RegDefaultAntenna == 2;
-
-       priv->plcp_preamble_mode = 2;
-       /* the eeprom type is stored in RCR register bit #6 */
-       if (RCR_9356SEL & read_nic_dword(dev, RCR))
-               priv->epromtype = EPROM_93c56;
-       else
-               priv->epromtype = EPROM_93c46;
-
-       eeprom_93cx6_multiread(&eeprom, 0x7, (__le16 *)
-                              dev->dev_addr, 3);
-
-       for (i = 1, j = 0; i < 14; i += 2, j++) {
-               eeprom_93cx6_read(&eeprom, EPROM_TXPW_CH1_2 + j, &word);
-               priv->chtxpwr[i] = word & 0xff;
-               priv->chtxpwr[i+1] = (word & 0xff00)>>8;
-       }
-       for (i = 1, j = 0; i < 14; i += 2, j++) {
-               eeprom_93cx6_read(&eeprom, EPROM_TXPW_OFDM_CH1_2 + j, &word);
-               priv->chtxpwr_ofdm[i] = word & 0xff;
-               priv->chtxpwr_ofdm[i+1] = (word & 0xff00) >> 8;
-       }
-
-       /* 3Read crystal calibration and thermal meter indication on 87SE. */
-       eeprom_93cx6_read(&eeprom, EEPROM_RSV>>1, &tmpu16);
-
-       /* Crystal calibration for Xin and Xout resp. */
-       priv->XtalCal_Xout = tmpu16 & EEPROM_XTAL_CAL_XOUT_MASK;
-       priv->XtalCal_Xin = (tmpu16 & EEPROM_XTAL_CAL_XIN_MASK) >> 4;
-       if ((tmpu16 & EEPROM_XTAL_CAL_ENABLE) >> 12)
-               priv->bXtalCalibration = true;
-
-       /* Thermal meter reference indication. */
-       priv->ThermalMeter =  (u8)((tmpu16 & EEPROM_THERMAL_METER_MASK) >> 8);
-       if ((tmpu16 & EEPROM_THERMAL_METER_ENABLE) >> 13)
-               priv->bTxPowerTrack = true;
-
-       priv->rf_sleep = rtl8225z4_rf_sleep;
-       priv->rf_wakeup = rtl8225z4_rf_wakeup;
-       DMESGW("**PLEASE** REPORT SUCCESSFUL/UNSUCCESSFUL TO Realtek!");
-
-       priv->rf_close = rtl8225z2_rf_close;
-       priv->rf_init = rtl8225z2_rf_init;
-       priv->rf_set_chan = rtl8225z2_rf_set_chan;
-       priv->rf_set_sens = NULL;
-
-       if (0 != alloc_rx_desc_ring(dev, priv->rxbuffersize, priv->rxringcount))
-               return -ENOMEM;
-
-       if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
-                                 TX_MANAGEPRIORITY_RING_ADDR))
-               return -ENOMEM;
-
-       if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
-                                TX_BKPRIORITY_RING_ADDR))
-               return -ENOMEM;
-
-       if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
-                                TX_BEPRIORITY_RING_ADDR))
-               return -ENOMEM;
-
-       if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
-                                 TX_VIPRIORITY_RING_ADDR))
-               return -ENOMEM;
-
-       if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
-                                 TX_VOPRIORITY_RING_ADDR))
-               return -ENOMEM;
-
-       if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
-                                 TX_HIGHPRIORITY_RING_ADDR))
-               return -ENOMEM;
-
-       if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txbeaconcount,
-                                 TX_BEACON_RING_ADDR))
-               return -ENOMEM;
-
-       if (request_irq(dev->irq, rtl8180_interrupt,
-               IRQF_SHARED, dev->name, dev)) {
-               DMESGE("Error allocating IRQ %d", dev->irq);
-               return -1;
-       } else {
-               priv->irq = dev->irq;
-               DMESG("IRQ %d", dev->irq);
-       }
-
-       return 0;
-}
-
-void rtl8180_no_hw_wep(struct net_device *dev)
-{
-}
-
-void rtl8180_set_hw_wep(struct net_device *dev)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       u8 pgreg;
-       u8 security;
-       u32 key0_word4;
-
-       pgreg = read_nic_byte(dev, PGSELECT);
-       write_nic_byte(dev, PGSELECT, pgreg & ~(1<<PGSELECT_PG_SHIFT));
-
-       key0_word4 = read_nic_dword(dev, KEY0+4+4+4);
-       key0_word4 &= ~0xff;
-       key0_word4 |= priv->key0[3] & 0xff;
-       write_nic_dword(dev, KEY0, (priv->key0[0]));
-       write_nic_dword(dev, KEY0+4, (priv->key0[1]));
-       write_nic_dword(dev, KEY0+4+4, (priv->key0[2]));
-       write_nic_dword(dev, KEY0+4+4+4, (key0_word4));
-
-       security  = read_nic_byte(dev, SECURITY);
-       security |= (1<<SECURITY_WEP_TX_ENABLE_SHIFT);
-       security |= (1<<SECURITY_WEP_RX_ENABLE_SHIFT);
-       security &= ~SECURITY_ENCRYP_MASK;
-       security |= (SECURITY_ENCRYP_104<<SECURITY_ENCRYP_SHIFT);
-
-       write_nic_byte(dev, SECURITY, security);
-
-       DMESG("key %x %x %x %x", read_nic_dword(dev, KEY0+4+4+4),
-             read_nic_dword(dev, KEY0+4+4), read_nic_dword(dev, KEY0+4),
-             read_nic_dword(dev, KEY0));
-}
-
-
-void rtl8185_rf_pins_enable(struct net_device *dev)
-{
-       write_nic_word(dev, RFPinsEnable, 0x1fff); /* | tmp); */
-}
-
-void rtl8185_set_anaparam2(struct net_device *dev, u32 a)
-{
-       u8 conf3;
-
-       rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
-
-       conf3 = read_nic_byte(dev, CONFIG3);
-       write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
-       write_nic_dword(dev, ANAPARAM2, a);
-
-       conf3 = read_nic_byte(dev, CONFIG3);
-       write_nic_byte(dev, CONFIG3, conf3 & ~(1<<CONFIG3_ANAPARAM_W_SHIFT));
-       rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
-}
-
-void rtl8180_set_anaparam(struct net_device *dev, u32 a)
-{
-       u8 conf3;
-
-       rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
-
-       conf3 = read_nic_byte(dev, CONFIG3);
-       write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
-       write_nic_dword(dev, ANAPARAM, a);
-
-       conf3 = read_nic_byte(dev, CONFIG3);
-       write_nic_byte(dev, CONFIG3, conf3 & ~(1<<CONFIG3_ANAPARAM_W_SHIFT));
-       rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
-}
-
-void rtl8185_tx_antenna(struct net_device *dev, u8 ant)
-{
-       write_nic_byte(dev, TX_ANTENNA, ant);
-       force_pci_posting(dev);
-       mdelay(1);
-}
-
-static void rtl8185_write_phy(struct net_device *dev, u8 adr, u32 data)
-{
-       u32 phyw;
-
-       adr |= 0x80;
-
-       phyw = ((data<<8) | adr);
-
-       /* Note: we must write 0xff7c after 0x7d-0x7f to write BB register. */
-       write_nic_byte(dev, 0x7f, ((phyw & 0xff000000) >> 24));
-       write_nic_byte(dev, 0x7e, ((phyw & 0x00ff0000) >> 16));
-       write_nic_byte(dev, 0x7d, ((phyw & 0x0000ff00) >> 8));
-       write_nic_byte(dev, 0x7c, ((phyw & 0x000000ff)));
-}
-
-inline void write_phy_ofdm(struct net_device *dev, u8 adr, u32 data)
-{
-       data = data & 0xff;
-       rtl8185_write_phy(dev, adr, data);
-}
-
-void write_phy_cck(struct net_device *dev, u8 adr, u32 data)
-{
-       data = data & 0xff;
-       rtl8185_write_phy(dev, adr, data | 0x10000);
-}
-
-/*
- * This configures registers for beacon tx and enables it via
- * rtl8180_beacon_tx_enable(). rtl8180_beacon_tx_disable() might
- * be used to stop beacon transmission
- */
-void rtl8180_start_tx_beacon(struct net_device *dev)
-{
-       u16 word;
-
-       DMESG("Enabling beacon TX");
-       rtl8180_prepare_beacon(dev);
-       rtl8180_irq_disable(dev);
-       rtl8180_beacon_tx_enable(dev);
-
-       word = read_nic_word(dev, AtimWnd) & ~AtimWnd_AtimWnd;
-       write_nic_word(dev, AtimWnd, word); /* word |= */
-
-       word  = read_nic_word(dev, BintrItv);
-       word &= ~BintrItv_BintrItv;
-       word |= 1000; /* priv->ieee80211->current_network.beacon_interval *
-                      * ((priv->txbeaconcount > 1)?(priv->txbeaconcount-1):1);
-                      * FIXME: check if correct ^^ worked with 0x3e8;
-                      */
-       write_nic_word(dev, BintrItv, word);
-
-       rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
-
-       rtl8185b_irq_enable(dev);
-}
-
-static struct net_device_stats *rtl8180_stats(struct net_device *dev)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-
-       return &priv->ieee80211->stats;
-}
-
-/*
- * Change current and default preamble mode.
- */
-static bool MgntActSet_802_11_PowerSaveMode(struct r8180_priv *priv,
-                                    enum rt_ps_mode rtPsMode)
-{
-       /* Currently, we do not change power save mode on IBSS mode. */
-       if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
-               return false;
-
-       priv->ieee80211->ps = rtPsMode;
-
-       return true;
-}
-
-static void LeisurePSEnter(struct r8180_priv *priv)
-{
-       if (priv->bLeisurePs)
-               if (priv->ieee80211->ps == IEEE80211_PS_DISABLED)
-                       /* IEEE80211_PS_ENABLE */
-                       MgntActSet_802_11_PowerSaveMode(priv,
-                               IEEE80211_PS_MBCAST | IEEE80211_PS_UNICAST);
-}
-
-static void LeisurePSLeave(struct r8180_priv *priv)
-{
-       if (priv->bLeisurePs)
-               if (priv->ieee80211->ps != IEEE80211_PS_DISABLED)
-                       MgntActSet_802_11_PowerSaveMode(
-                               priv, IEEE80211_PS_DISABLED);
-}
-
-void rtl8180_hw_wakeup_wq(struct work_struct *work)
-{
-       struct delayed_work *dwork = to_delayed_work(work);
-       struct ieee80211_device *ieee = container_of(
-               dwork, struct ieee80211_device, hw_wakeup_wq);
-       struct net_device *dev = ieee->dev;
-
-       rtl8180_hw_wakeup(dev);
-}
-
-void rtl8180_hw_sleep_wq(struct work_struct *work)
-{
-       struct delayed_work *dwork = to_delayed_work(work);
-       struct ieee80211_device *ieee = container_of(
-               dwork, struct ieee80211_device, hw_sleep_wq);
-       struct net_device *dev = ieee->dev;
-
-       rtl8180_hw_sleep_down(dev);
-}
-
-static void MgntLinkKeepAlive(struct r8180_priv *priv)
-{
-       if (priv->keepAliveLevel == 0)
-               return;
-
-       if (priv->ieee80211->state == IEEE80211_LINKED) {
-               /*
-                * Keep-Alive.
-                */
-
-               if ((priv->keepAliveLevel == 2) ||
-                       (priv->link_detect.last_num_tx_unicast ==
-                               priv->NumTxUnicast &&
-                       priv->link_detect.last_num_rx_unicast ==
-                               priv->ieee80211->NumRxUnicast)
-                       ) {
-                       priv->link_detect.idle_count++;
-
-                       /*
-                        * Send a Keep-Alive packet packet to AP if we had
-                        * been idle for a while.
-                        */
-                       if (priv->link_detect.idle_count >=
-                               KEEP_ALIVE_INTERVAL /
-                               CHECK_FOR_HANG_PERIOD - 1) {
-                               priv->link_detect.idle_count = 0;
-                               ieee80211_sta_ps_send_null_frame(
-                                       priv->ieee80211, false);
-                       }
-               } else {
-                       priv->link_detect.idle_count = 0;
-               }
-               priv->link_detect.last_num_tx_unicast = priv->NumTxUnicast;
-               priv->link_detect.last_num_rx_unicast =
-                       priv->ieee80211->NumRxUnicast;
-       }
-}
-
-void rtl8180_watch_dog(struct net_device *dev)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       bool bEnterPS = false;
-       bool bBusyTraffic = false;
-       u32 TotalRxNum = 0;
-       u16 SlotIndex = 0;
-       u16 i = 0;
-       if (priv->ieee80211->actscanning == false) {
-               if ((priv->ieee80211->iw_mode != IW_MODE_ADHOC) &&
-                   (priv->ieee80211->state == IEEE80211_NOLINK) &&
-                   (priv->ieee80211->beinretry == false) &&
-                   (priv->eRFPowerState == RF_ON))
-                       IPSEnter(dev);
-       }
-       if ((priv->ieee80211->state == IEEE80211_LINKED) &&
-               (priv->ieee80211->iw_mode == IW_MODE_INFRA)) {
-               SlotIndex = (priv->link_detect.slot_index++) %
-                       priv->link_detect.slot_num;
-
-               priv->link_detect.rx_frame_num[SlotIndex] =
-                       priv->ieee80211->NumRxDataInPeriod +
-                       priv->ieee80211->NumRxBcnInPeriod;
-
-               for (i = 0; i < priv->link_detect.slot_num; i++)
-                       TotalRxNum += priv->link_detect.rx_frame_num[i];
-
-               if (TotalRxNum == 0) {
-                       priv->ieee80211->state = IEEE80211_ASSOCIATING;
-                       queue_work(priv->ieee80211->wq,
-                               &priv->ieee80211->associate_procedure_wq);
-               }
-       }
-
-       MgntLinkKeepAlive(priv);
-
-       LeisurePSLeave(priv);
-
-       if (priv->ieee80211->state == IEEE80211_LINKED) {
-               priv->link_detect.num_rx_ok_in_period =
-                       priv->ieee80211->NumRxDataInPeriod;
-               if (priv->link_detect.num_rx_ok_in_period > 666 ||
-                       priv->link_detect.num_tx_ok_in_period > 666) {
-                       bBusyTraffic = true;
-               }
-               if ((priv->link_detect.num_rx_ok_in_period +
-                       priv->link_detect.num_tx_ok_in_period > 8)
-                       || (priv->link_detect.num_rx_ok_in_period > 2)) {
-                       bEnterPS = false;
-               } else
-                       bEnterPS = true;
-
-               if (bEnterPS)
-                       LeisurePSEnter(priv);
-               else
-                       LeisurePSLeave(priv);
-       } else
-               LeisurePSLeave(priv);
-       priv->link_detect.b_busy_traffic = bBusyTraffic;
-       priv->link_detect.num_rx_ok_in_period = 0;
-       priv->link_detect.num_tx_ok_in_period = 0;
-       priv->ieee80211->NumRxDataInPeriod = 0;
-       priv->ieee80211->NumRxBcnInPeriod = 0;
-}
-
-static int _rtl8180_up(struct net_device *dev)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-
-       priv->up = 1;
-
-       DMESG("Bringing up iface");
-       rtl8185b_adapter_start(dev);
-       rtl8185b_rx_enable(dev);
-       rtl8185b_tx_enable(dev);
-       if (priv->bInactivePs) {
-               if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
-                       IPSLeave(dev);
-       }
-       timer_rate_adaptive((unsigned long)dev);
-       watch_dog_adaptive((unsigned long)dev);
-       if (priv->bSwAntennaDiverity)
-                       SwAntennaDiversityTimerCallback(dev);
-       ieee80211_softmac_start_protocol(priv->ieee80211);
-       return 0;
-}
-
-static int rtl8180_open(struct net_device *dev)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       int ret;
-
-       down(&priv->wx_sem);
-       ret = rtl8180_up(dev);
-       up(&priv->wx_sem);
-       return ret;
-}
-
-int rtl8180_up(struct net_device *dev)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-
-       if (priv->up == 1)
-               return -1;
-
-       return _rtl8180_up(dev);
-}
-
-static int rtl8180_close(struct net_device *dev)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       int ret;
-
-       down(&priv->wx_sem);
-       ret = rtl8180_down(dev);
-       up(&priv->wx_sem);
-
-       return ret;
-}
-
-int rtl8180_down(struct net_device *dev)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-
-       if (priv->up == 0)
-               return -1;
-
-       priv->up = 0;
-
-       ieee80211_softmac_stop_protocol(priv->ieee80211);
-       /* FIXME */
-       if (!netif_queue_stopped(dev))
-               netif_stop_queue(dev);
-       rtl8180_rtx_disable(dev);
-       rtl8180_irq_disable(dev);
-       del_timer_sync(&priv->watch_dog_timer);
-       del_timer_sync(&priv->rateadapter_timer);
-       cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
-       cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
-       cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
-       cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
-       cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
-       del_timer_sync(&priv->SwAntennaDiversityTimer);
-       SetZebraRFPowerState8185(dev, RF_OFF);
-       memset(&priv->ieee80211->current_network,
-               0, sizeof(struct ieee80211_network));
-       priv->ieee80211->state = IEEE80211_NOLINK;
-       return 0;
-}
-
-void rtl8180_restart_wq(struct work_struct *work)
-{
-       struct r8180_priv *priv = container_of(
-               work, struct r8180_priv, reset_wq);
-       struct net_device *dev = priv->dev;
-
-       down(&priv->wx_sem);
-
-       rtl8180_commit(dev);
-
-       up(&priv->wx_sem);
-}
-
-static void rtl8180_restart(struct net_device *dev)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-
-       schedule_work(&priv->reset_wq);
-}
-
-void rtl8180_commit(struct net_device *dev)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-
-       if (priv->up == 0)
-               return;
-
-       del_timer_sync(&priv->watch_dog_timer);
-       del_timer_sync(&priv->rateadapter_timer);
-       cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
-       cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
-       cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
-       cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
-       cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
-       del_timer_sync(&priv->SwAntennaDiversityTimer);
-       ieee80211_softmac_stop_protocol(priv->ieee80211);
-       rtl8180_irq_disable(dev);
-       rtl8180_rtx_disable(dev);
-       _rtl8180_up(dev);
-}
-
-static void r8180_set_multicast(struct net_device *dev)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       short promisc;
-
-       promisc = (dev->flags & IFF_PROMISC) ? 1 : 0;
-
-       if (promisc != priv->promisc)
-               rtl8180_restart(dev);
-
-       priv->promisc = promisc;
-}
-
-static int r8180_set_mac_adr(struct net_device *dev, void *mac)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       struct sockaddr *addr = mac;
-
-       down(&priv->wx_sem);
-
-       memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
-
-       if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
-               memcpy(priv->ieee80211->current_network.bssid,
-                       dev->dev_addr, ETH_ALEN);
-
-       if (priv->up) {
-               rtl8180_down(dev);
-               rtl8180_up(dev);
-       }
-
-       up(&priv->wx_sem);
-
-       return 0;
-}
-
-/* based on ipw2200 driver */
-static int rtl8180_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
-{
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-       struct iwreq *wrq = (struct iwreq *) rq;
-       int ret = -1;
-
-       switch (cmd) {
-       case RTL_IOCTL_WPA_SUPPLICANT:
-               ret = ieee80211_wpa_supplicant_ioctl(
-                       priv->ieee80211, &wrq->u.data);
-               return ret;
-       default:
-               return -EOPNOTSUPP;
-       }
-
-       return -EOPNOTSUPP;
-}
-
-static const struct net_device_ops rtl8180_netdev_ops = {
-       .ndo_open               = rtl8180_open,
-       .ndo_stop               = rtl8180_close,
-       .ndo_get_stats          = rtl8180_stats,
-       .ndo_tx_timeout         = rtl8180_restart,
-       .ndo_do_ioctl           = rtl8180_ioctl,
-       .ndo_set_rx_mode        = r8180_set_multicast,
-       .ndo_set_mac_address    = r8180_set_mac_adr,
-       .ndo_validate_addr      = eth_validate_addr,
-       .ndo_change_mtu         = eth_change_mtu,
-       .ndo_start_xmit         = ieee80211_rtl_xmit,
-};
-
-static int rtl8180_pci_probe(struct pci_dev *pdev,
-                            const struct pci_device_id *id)
-{
-       unsigned long ioaddr = 0;
-       struct net_device *dev = NULL;
-       struct r8180_priv *priv = NULL;
-       u8 unit = 0;
-       int ret = -ENODEV;
-
-       unsigned long pmem_start, pmem_len, pmem_flags;
-
-       DMESG("Configuring chip resources");
-
-       if (pci_enable_device(pdev)) {
-               DMESG("Failed to enable PCI device");
-               return -EIO;
-       }
-
-       pci_set_master(pdev);
-       pci_set_dma_mask(pdev, 0xffffff00ULL);
-       pci_set_consistent_dma_mask(pdev, 0xffffff00ULL);
-       dev = alloc_ieee80211(sizeof(struct r8180_priv));
-       if (!dev) {
-               ret = -ENOMEM;
-               goto fail_free;
-       }
-       priv = ieee80211_priv(dev);
-       priv->ieee80211 = netdev_priv(dev);
-
-       pci_set_drvdata(pdev, dev);
-       SET_NETDEV_DEV(dev, &pdev->dev);
-
-       priv = ieee80211_priv(dev);
-       priv->pdev = pdev;
-
-       pmem_start = pci_resource_start(pdev, 1);
-       pmem_len = pci_resource_len(pdev, 1);
-       pmem_flags = pci_resource_flags(pdev, 1);
-
-       if (!(pmem_flags & IORESOURCE_MEM)) {
-               DMESG("region #1 not a MMIO resource, aborting");
-               goto fail;
-       }
-
-       if (!request_mem_region(pmem_start, pmem_len, RTL8180_MODULE_NAME)) {
-               DMESG("request_mem_region failed!");
-               goto fail;
-       }
-
-       ioaddr = (unsigned long)ioremap_nocache(pmem_start, pmem_len);
-       if (ioaddr == (unsigned long)NULL) {
-               DMESG("ioremap failed!");
-               goto fail1;
-       }
-
-       dev->mem_start = ioaddr; /* shared mem start */
-       dev->mem_end = ioaddr + pci_resource_len(pdev, 0); /* shared mem end */
-
-       pci_read_config_byte(pdev, 0x05, &unit);
-       pci_write_config_byte(pdev, 0x05, unit & (~0x04));
-
-       dev->irq = pdev->irq;
-       priv->irq = 0;
-
-       dev->netdev_ops = &rtl8180_netdev_ops;
-       dev->wireless_handlers = &r8180_wx_handlers_def;
-
-       dev->type = ARPHRD_ETHER;
-       dev->watchdog_timeo = HZ*3;
-
-       if (dev_alloc_name(dev, ifname) < 0) {
-               DMESG("Oops: devname already taken! Trying wlan%%d...\n");
-               strcpy(ifname, "wlan%d");
-               dev_alloc_name(dev, ifname);
-       }
-
-       if (rtl8180_init(dev) != 0) {
-               DMESG("Initialization failed");
-               goto fail1;
-       }
-
-       netif_carrier_off(dev);
-
-       if (register_netdev(dev))
-               goto fail1;
-
-       rtl8180_proc_init_one(dev);
-
-       DMESG("Driver probe completed\n");
-       return 0;
-fail1:
-       if (dev->mem_start != (unsigned long)NULL) {
-               iounmap((void __iomem *)dev->mem_start);
-               release_mem_region(pci_resource_start(pdev, 1),
-                                  pci_resource_len(pdev, 1));
-       }
-fail:
-       if (dev) {
-               if (priv->irq) {
-                       free_irq(dev->irq, dev);
-                       dev->irq = 0;
-               }
-               free_ieee80211(dev);
-       }
-
-fail_free:
-       pci_disable_device(pdev);
-
-       DMESG("wlan driver load failed\n");
-       return ret;
-}
-
-static void rtl8180_pci_remove(struct pci_dev *pdev)
-{
-       struct r8180_priv *priv;
-       struct net_device *dev = pci_get_drvdata(pdev);
-
-       if (dev) {
-               unregister_netdev(dev);
-
-               priv = ieee80211_priv(dev);
-
-               rtl8180_proc_remove_one(dev);
-               rtl8180_down(dev);
-               priv->rf_close(dev);
-               rtl8180_reset(dev);
-               mdelay(10);
-
-               if (priv->irq) {
-                       DMESG("Freeing irq %d", dev->irq);
-                       free_irq(dev->irq, dev);
-                       priv->irq = 0;
-               }
-
-               free_rx_desc_ring(dev);
-               free_tx_desc_rings(dev);
-
-               if (dev->mem_start != (unsigned long)NULL) {
-                       iounmap((void __iomem *)dev->mem_start);
-                       release_mem_region(pci_resource_start(pdev, 1),
-                                          pci_resource_len(pdev, 1));
-               }
-
-               free_ieee80211(dev);
-       }
-       pci_disable_device(pdev);
-
-       DMESG("wlan driver removed\n");
-}
-
-static int __init rtl8180_pci_module_init(void)
-{
-       int ret;
-
-       ret = ieee80211_crypto_init();
-       if (ret) {
-               pr_err("ieee80211_crypto_init() failed %d\n", ret);
-               return ret;
-       }
-       ret = ieee80211_crypto_tkip_init();
-       if (ret) {
-               pr_err("ieee80211_crypto_tkip_init() failed %d\n", ret);
-               return ret;
-       }
-       ret = ieee80211_crypto_ccmp_init();
-       if (ret) {
-               pr_err("ieee80211_crypto_ccmp_init() failed %d\n", ret);
-               return ret;
-       }
-       ret = ieee80211_crypto_wep_init();
-       if (ret) {
-               pr_err("ieee80211_crypto_wep_init() failed %d\n", ret);
-               return ret;
-       }
-
-       pr_info("\nLinux kernel driver for RTL8180 / RTL8185 based WLAN cards\n");
-       pr_info("Copyright (c) 2004-2005, Andrea Merello\n");
-       DMESG("Initializing module");
-       DMESG("Wireless extensions version %d", WIRELESS_EXT);
-       rtl8180_proc_module_init();
-
-       if (pci_register_driver(&rtl8180_pci_driver)) {
-               DMESG("No device found");
-               return -ENODEV;
-       }
-       return 0;
-}
-
-static void __exit rtl8180_pci_module_exit(void)
-{
-       pci_unregister_driver(&rtl8180_pci_driver);
-       rtl8180_proc_module_remove();
-       ieee80211_crypto_tkip_exit();
-       ieee80211_crypto_ccmp_exit();
-       ieee80211_crypto_wep_exit();
-       ieee80211_crypto_deinit();
-       DMESG("Exiting");
-}
-
-static void rtl8180_try_wake_queue(struct net_device *dev, int pri)
-{
-       unsigned long flags;
-       short enough_desc;
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-
-       spin_lock_irqsave(&priv->tx_lock, flags);
-       enough_desc = check_nic_enought_desc(dev, pri);
-       spin_unlock_irqrestore(&priv->tx_lock, flags);
-
-       if (enough_desc)
-               ieee80211_rtl_wake_queue(priv->ieee80211);
-}
-
-static void rtl8180_tx_isr(struct net_device *dev, int pri, short error)
-{
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-       u32 *tail; /* tail virtual addr */
-       u32 *head; /* head virtual addr */
-       u32 *begin; /* start of ring virtual addr */
-       u32 *nicv; /* nic pointer virtual addr */
-       u32 nic; /* nic pointer physical addr */
-       u32 nicbegin; /* start of ring physical addr */
-       unsigned long flag;
-       /* physical addr are ok on 32 bits since we set DMA mask */
-       int offs;
-       int j, i;
-       int hd;
-       if (error)
-               priv->stats.txretry++;
-       spin_lock_irqsave(&priv->tx_lock, flag);
-       switch (pri) {
-       case MANAGE_PRIORITY:
-               tail = priv->txmapringtail;
-               begin = priv->txmapring;
-               head = priv->txmapringhead;
-               nic = read_nic_dword(dev, TX_MANAGEPRIORITY_RING_ADDR);
-               nicbegin = priv->txmapringdma;
-               break;
-       case BK_PRIORITY:
-               tail = priv->txbkpringtail;
-               begin = priv->txbkpring;
-               head = priv->txbkpringhead;
-               nic = read_nic_dword(dev, TX_BKPRIORITY_RING_ADDR);
-               nicbegin = priv->txbkpringdma;
-               break;
-       case BE_PRIORITY:
-               tail = priv->txbepringtail;
-               begin = priv->txbepring;
-               head = priv->txbepringhead;
-               nic = read_nic_dword(dev, TX_BEPRIORITY_RING_ADDR);
-               nicbegin = priv->txbepringdma;
-               break;
-       case VI_PRIORITY:
-               tail = priv->txvipringtail;
-               begin = priv->txvipring;
-               head = priv->txvipringhead;
-               nic = read_nic_dword(dev, TX_VIPRIORITY_RING_ADDR);
-               nicbegin = priv->txvipringdma;
-               break;
-       case VO_PRIORITY:
-               tail = priv->txvopringtail;
-               begin = priv->txvopring;
-               head = priv->txvopringhead;
-               nic = read_nic_dword(dev, TX_VOPRIORITY_RING_ADDR);
-               nicbegin = priv->txvopringdma;
-               break;
-       case HI_PRIORITY:
-               tail = priv->txhpringtail;
-               begin = priv->txhpring;
-               head = priv->txhpringhead;
-               nic = read_nic_dword(dev, TX_HIGHPRIORITY_RING_ADDR);
-               nicbegin = priv->txhpringdma;
-               break;
-
-       default:
-               spin_unlock_irqrestore(&priv->tx_lock, flag);
-               return;
-       }
-
-       nicv = (u32 *)((nic - nicbegin) + (u8 *)begin);
-       if ((head <= tail && (nicv > tail || nicv < head)) ||
-               (head > tail && (nicv > tail && nicv < head))) {
-                       DMESGW("nic has lost pointer");
-                       spin_unlock_irqrestore(&priv->tx_lock, flag);
-                       rtl8180_restart(dev);
-                       return;
-               }
-
-       /*
-        * We check all the descriptors between the head and the nic,
-        * but not the currently pointed by the nic (the next to be txed)
-        * and the previous of the pointed (might be in process ??)
-        */
-       offs = (nic - nicbegin);
-       offs = offs / 8 / 4;
-       hd = (head - begin) / 8;
-
-       if (offs >= hd)
-               j = offs - hd;
-       else
-               j = offs + (priv->txringcount-1-hd);
-
-       j -= 2;
-       if (j < 0)
-               j = 0;
-
-       for (i = 0; i < j; i++) {
-               if ((*head) & (1<<31))
-                       break;
-               if (((*head)&(0x10000000)) != 0) {
-                       priv->CurrRetryCnt += (u16)((*head) & (0x000000ff));
-                       if (!error)
-                               priv->NumTxOkTotal++;
-               }
-
-               if (!error)
-                       priv->NumTxOkBytesTotal += (*(head+3)) & (0x00000fff);
-
-               *head = *head & ~(1<<31);
-
-               if ((head - begin)/8 == priv->txringcount-1)
-                       head = begin;
-               else
-                       head += 8;
-       }
-
-       /*
-        * The head has been moved to the last certainly TXed
-        * (or at least processed by the nic) packet.
-        * The driver take forcefully owning of all these packets
-        * If the packet previous of the nic pointer has been
-        * processed this doesn't matter: it will be checked
-        * here at the next round. Anyway if no more packet are
-        * TXed no memory leak occur at all.
-        */
-
-       switch (pri) {
-       case MANAGE_PRIORITY:
-               priv->txmapringhead = head;
-
-               if (priv->ack_tx_to_ieee) {
-                       if (rtl8180_is_tx_queue_empty(dev)) {
-                               priv->ack_tx_to_ieee = 0;
-                               ieee80211_ps_tx_ack(priv->ieee80211, !error);
-                       }
-               }
-               break;
-       case BK_PRIORITY:
-               priv->txbkpringhead = head;
-               break;
-       case BE_PRIORITY:
-               priv->txbepringhead = head;
-               break;
-       case VI_PRIORITY:
-               priv->txvipringhead = head;
-               break;
-       case VO_PRIORITY:
-               priv->txvopringhead = head;
-               break;
-       case HI_PRIORITY:
-               priv->txhpringhead = head;
-               break;
-       }
-
-       spin_unlock_irqrestore(&priv->tx_lock, flag);
-}
-
-static irqreturn_t rtl8180_interrupt(int irq, void *netdev)
-{
-       struct net_device *dev = (struct net_device *) netdev;
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-       unsigned long flags;
-       u32 inta;
-
-       /* We should return IRQ_NONE, but for now let me keep this */
-       if (priv->irq_enabled == 0)
-               return IRQ_HANDLED;
-
-       spin_lock_irqsave(&priv->irq_th_lock, flags);
-
-       /* ISR: 4bytes */
-       inta = read_nic_dword(dev, ISR);
-       write_nic_dword(dev, ISR, inta); /* reset int situation */
-
-       priv->stats.shints++;
-
-       if (!inta) {
-               spin_unlock_irqrestore(&priv->irq_th_lock, flags);
-               return IRQ_HANDLED;
-       /*
-        * most probably we can safely return IRQ_NONE,
-        * but for now is better to avoid problems
-        */
-       }
-
-       if (inta == 0xffff) {
-               /* HW disappeared */
-               spin_unlock_irqrestore(&priv->irq_th_lock, flags);
-               return IRQ_HANDLED;
-       }
-
-       priv->stats.ints++;
-
-       if (!netif_running(dev)) {
-               spin_unlock_irqrestore(&priv->irq_th_lock, flags);
-               return IRQ_HANDLED;
-       }
-
-       if (inta & ISR_TimeOut)
-               write_nic_dword(dev, TimerInt, 0);
-
-       if (inta & ISR_TBDOK)
-               priv->stats.txbeacon++;
-
-       if (inta & ISR_TBDER)
-               priv->stats.txbeaconerr++;
-
-       if (inta & IMR_TMGDOK)
-               rtl8180_tx_isr(dev, MANAGE_PRIORITY, 0);
-
-       if (inta & ISR_THPDER) {
-               priv->stats.txhperr++;
-               rtl8180_tx_isr(dev, HI_PRIORITY, 1);
-               priv->ieee80211->stats.tx_errors++;
-       }
-
-       if (inta & ISR_THPDOK) { /* High priority tx ok */
-               priv->link_detect.num_tx_ok_in_period++;
-               priv->stats.txhpokint++;
-               rtl8180_tx_isr(dev, HI_PRIORITY, 0);
-       }
-
-       if (inta & ISR_RER)
-               priv->stats.rxerr++;
-
-       if (inta & ISR_TBKDER) { /* corresponding to BK_PRIORITY */
-               priv->stats.txbkperr++;
-               priv->ieee80211->stats.tx_errors++;
-               rtl8180_tx_isr(dev, BK_PRIORITY, 1);
-               rtl8180_try_wake_queue(dev, BK_PRIORITY);
-       }
-
-       if (inta & ISR_TBEDER) { /* corresponding to BE_PRIORITY */
-               priv->stats.txbeperr++;
-               priv->ieee80211->stats.tx_errors++;
-               rtl8180_tx_isr(dev, BE_PRIORITY, 1);
-               rtl8180_try_wake_queue(dev, BE_PRIORITY);
-       }
-       if (inta & ISR_TNPDER) { /* corresponding to VO_PRIORITY */
-               priv->stats.txnperr++;
-               priv->ieee80211->stats.tx_errors++;
-               rtl8180_tx_isr(dev, NORM_PRIORITY, 1);
-               rtl8180_try_wake_queue(dev, NORM_PRIORITY);
-       }
-
-       if (inta & ISR_TLPDER) { /* corresponding to VI_PRIORITY */
-               priv->stats.txlperr++;
-               priv->ieee80211->stats.tx_errors++;
-               rtl8180_tx_isr(dev, LOW_PRIORITY, 1);
-               rtl8180_try_wake_queue(dev, LOW_PRIORITY);
-       }
-
-       if (inta & ISR_ROK) {
-               priv->stats.rxint++;
-               tasklet_schedule(&priv->irq_rx_tasklet);
-       }
-
-       if (inta & ISR_RQoSOK) {
-               priv->stats.rxint++;
-               tasklet_schedule(&priv->irq_rx_tasklet);
-       }
-
-       if (inta & ISR_BcnInt)
-               rtl8180_prepare_beacon(dev);
-
-       if (inta & ISR_RDU) {
-               DMESGW("No RX descriptor available");
-               priv->stats.rxrdu++;
-               tasklet_schedule(&priv->irq_rx_tasklet);
-       }
-
-       if (inta & ISR_RXFOVW) {
-               priv->stats.rxoverflow++;
-               tasklet_schedule(&priv->irq_rx_tasklet);
-       }
-
-       if (inta & ISR_TXFOVW)
-               priv->stats.txoverflow++;
-
-       if (inta & ISR_TNPDOK) { /* Normal priority tx ok */
-               priv->link_detect.num_tx_ok_in_period++;
-               priv->stats.txnpokint++;
-               rtl8180_tx_isr(dev, NORM_PRIORITY, 0);
-               rtl8180_try_wake_queue(dev, NORM_PRIORITY);
-       }
-
-       if (inta & ISR_TLPDOK) { /* Low priority tx ok */
-               priv->link_detect.num_tx_ok_in_period++;
-               priv->stats.txlpokint++;
-               rtl8180_tx_isr(dev, LOW_PRIORITY, 0);
-               rtl8180_try_wake_queue(dev, LOW_PRIORITY);
-       }
-
-       if (inta & ISR_TBKDOK) { /* corresponding to BK_PRIORITY */
-               priv->stats.txbkpokint++;
-               priv->link_detect.num_tx_ok_in_period++;
-               rtl8180_tx_isr(dev, BK_PRIORITY, 0);
-               rtl8180_try_wake_queue(dev, BE_PRIORITY);
-       }
-
-       if (inta & ISR_TBEDOK) { /* corresponding to BE_PRIORITY */
-               priv->stats.txbeperr++;
-               priv->link_detect.num_tx_ok_in_period++;
-               rtl8180_tx_isr(dev, BE_PRIORITY, 0);
-               rtl8180_try_wake_queue(dev, BE_PRIORITY);
-       }
-       force_pci_posting(dev);
-       spin_unlock_irqrestore(&priv->irq_th_lock, flags);
-
-       return IRQ_HANDLED;
-}
-
-void rtl8180_irq_rx_tasklet(struct r8180_priv *priv)
-{
-       rtl8180_rx(priv->dev);
-}
-
-void GPIOChangeRFWorkItemCallBack(struct work_struct *work)
-{
-       struct ieee80211_device *ieee = container_of(
-               work, struct ieee80211_device, GPIOChangeRFWorkItem.work);
-       struct net_device *dev = ieee->dev;
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       u8 btPSR;
-       u8 btConfig0;
-       enum rt_rf_power_state eRfPowerStateToSet;
-       bool bActuallySet = false;
-
-       char *argv[3];
-       static char *RadioPowerPath = "/etc/acpi/events/RadioPower.sh";
-       static char *envp[] = {"HOME=/", "TERM=linux",
-               "PATH=/usr/bin:/bin", NULL};
-       static int readf_count;
-
-       readf_count = (readf_count+1)%0xffff;
-       /* We should turn off LED before polling FF51[4]. */
-
-       /* Turn off LED. */
-       btPSR = read_nic_byte(dev, PSR);
-       write_nic_byte(dev, PSR, (btPSR & ~BIT3));
-
-       /* It need to delay 4us suggested */
-       udelay(4);
-
-       /* HW radio On/Off according to the value of FF51[4](config0) */
-       btConfig0 = btPSR = read_nic_byte(dev, CONFIG0);
-
-       eRfPowerStateToSet = (btConfig0 & BIT4) ?  RF_ON : RF_OFF;
-
-       /* Turn LED back on when radio enabled */
-       if (eRfPowerStateToSet == RF_ON)
-               write_nic_byte(dev, PSR, btPSR | BIT3);
-
-       if ((priv->ieee80211->bHwRadioOff == true) &&
-          (eRfPowerStateToSet == RF_ON)) {
-               priv->ieee80211->bHwRadioOff = false;
-               bActuallySet = true;
-       } else if ((priv->ieee80211->bHwRadioOff == false) &&
-                 (eRfPowerStateToSet == RF_OFF)) {
-               priv->ieee80211->bHwRadioOff = true;
-               bActuallySet = true;
-       }
-
-       if (bActuallySet) {
-               MgntActSet_RF_State(dev, eRfPowerStateToSet, RF_CHANGE_BY_HW);
-
-               /* To update the UI status for Power status changed */
-               if (priv->ieee80211->bHwRadioOff == true)
-                       argv[1] = "RFOFF";
-               else
-                       argv[1] = "RFON";
-               argv[0] = RadioPowerPath;
-               argv[2] = NULL;
-
-               call_usermodehelper(RadioPowerPath, argv, envp, UMH_WAIT_PROC);
-       }
-}
-
-module_init(rtl8180_pci_module_init);
-module_exit(rtl8180_pci_module_exit);
diff --git a/drivers/staging/rtl8187se/r8180_dm.c b/drivers/staging/rtl8187se/r8180_dm.c
deleted file mode 100644 (file)
index 8c020e0..0000000
+++ /dev/null
@@ -1,1139 +0,0 @@
-#include "r8180_dm.h"
-#include "r8180_hw.h"
-#include "r8180_93cx6.h"
-
- /*    Return TRUE if we shall perform High Power Mechanism, FALSE otherwise. */
-#define RATE_ADAPTIVE_TIMER_PERIOD      300
-
-bool CheckHighPower(struct net_device *dev)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       struct ieee80211_device *ieee = priv->ieee80211;
-
-       if (!priv->bRegHighPowerMechanism)
-               return false;
-
-       if (ieee->state == IEEE80211_LINKED_SCANNING)
-               return false;
-
-       return true;
-}
-
-/*
- *     Description:
- *             Update Tx power level if necessary.
- *             See also DoRxHighPower() and SetTxPowerLevel8185() for reference.
- *
- *     Note:
- *             The reason why we udpate Tx power level here instead of DoRxHighPower()
- *             is the number of IO to change Tx power is much more than channel TR switch
- *             and they are related to OFDM and MAC registers.
- *             So, we don't want to update it so frequently in per-Rx packet base.
- */
-static void DoTxHighPower(struct net_device *dev)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       u16                     HiPwrUpperTh = 0;
-       u16                     HiPwrLowerTh = 0;
-       u8                      RSSIHiPwrUpperTh;
-       u8                      RSSIHiPwrLowerTh;
-       u8                      u1bTmp;
-       char                    OfdmTxPwrIdx, CckTxPwrIdx;
-
-       HiPwrUpperTh = priv->RegHiPwrUpperTh;
-       HiPwrLowerTh = priv->RegHiPwrLowerTh;
-
-       HiPwrUpperTh = HiPwrUpperTh * 10;
-       HiPwrLowerTh = HiPwrLowerTh * 10;
-       RSSIHiPwrUpperTh = priv->RegRSSIHiPwrUpperTh;
-       RSSIHiPwrLowerTh = priv->RegRSSIHiPwrLowerTh;
-
-       /* lzm add 080826 */
-       OfdmTxPwrIdx  = priv->chtxpwr_ofdm[priv->ieee80211->current_network.channel];
-       CckTxPwrIdx  = priv->chtxpwr[priv->ieee80211->current_network.channel];
-
-       if ((priv->UndecoratedSmoothedSS > HiPwrUpperTh) ||
-               (priv->bCurCCKPkt && (priv->CurCCKRSSI > RSSIHiPwrUpperTh))) {
-               /* Stevenl suggested that degrade 8dbm in high power sate. 2007-12-04 Isaiah */
-
-               priv->bToUpdateTxPwr = true;
-               u1bTmp = read_nic_byte(dev, CCK_TXAGC);
-
-               /* If it never enter High Power. */
-               if (CckTxPwrIdx == u1bTmp) {
-                       u1bTmp = (u1bTmp > 16) ? (u1bTmp - 16) : 0;  /* 8dbm */
-                       write_nic_byte(dev, CCK_TXAGC, u1bTmp);
-
-                       u1bTmp = read_nic_byte(dev, OFDM_TXAGC);
-                       u1bTmp = (u1bTmp > 16) ? (u1bTmp - 16) : 0;  /* 8dbm */
-                       write_nic_byte(dev, OFDM_TXAGC, u1bTmp);
-               }
-
-       } else if ((priv->UndecoratedSmoothedSS < HiPwrLowerTh) &&
-               (!priv->bCurCCKPkt || priv->CurCCKRSSI < RSSIHiPwrLowerTh)) {
-               if (priv->bToUpdateTxPwr) {
-                       priv->bToUpdateTxPwr = false;
-                       /* SD3 required. */
-                       u1bTmp = read_nic_byte(dev, CCK_TXAGC);
-                       if (u1bTmp < CckTxPwrIdx) {
-                               write_nic_byte(dev, CCK_TXAGC, CckTxPwrIdx);
-                       }
-
-                       u1bTmp = read_nic_byte(dev, OFDM_TXAGC);
-                       if (u1bTmp < OfdmTxPwrIdx) {
-                               write_nic_byte(dev, OFDM_TXAGC, OfdmTxPwrIdx);
-                       }
-               }
-       }
-}
-
-
-/*
- *     Description:
- *             Callback function of UpdateTxPowerWorkItem.
- *             Because of some event happened, e.g. CCX TPC, High Power Mechanism,
- *             We update Tx power of current channel again.
- */
-void rtl8180_tx_pw_wq(struct work_struct *work)
-{
-       struct delayed_work *dwork = to_delayed_work(work);
-       struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, tx_pw_wq);
-       struct net_device *dev = ieee->dev;
-
-       DoTxHighPower(dev);
-}
-
-
-/*
- *     Return TRUE if we shall perform DIG Mechanism, FALSE otherwise.
- */
-bool CheckDig(struct net_device *dev)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       struct ieee80211_device *ieee = priv->ieee80211;
-
-       if (!priv->bDigMechanism)
-               return false;
-
-       if (ieee->state != IEEE80211_LINKED)
-               return false;
-
-       if ((priv->ieee80211->rate / 5) < 36) /* Schedule Dig under all OFDM rates. By Bruce, 2007-06-01. */
-               return false;
-       return true;
-}
-/*
- *     Implementation of DIG for Zebra and Zebra2.
- */
-static void DIG_Zebra(struct net_device *dev)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       u16                     CCKFalseAlarm, OFDMFalseAlarm;
-       u16                     OfdmFA1, OfdmFA2;
-       int                     InitialGainStep = 7; /* The number of initial gain stages. */
-       int                     LowestGainStage = 4; /* The capable lowest stage of performing dig workitem. */
-       u32                     AwakePeriodIn2Sec = 0;
-
-       CCKFalseAlarm = (u16)(priv->FalseAlarmRegValue & 0x0000ffff);
-       OFDMFalseAlarm = (u16)((priv->FalseAlarmRegValue >> 16) & 0x0000ffff);
-       OfdmFA1 =  0x15;
-       OfdmFA2 = ((u16)(priv->RegDigOfdmFaUpTh)) << 8;
-
-       /* The number of initial gain steps is different, by Bruce, 2007-04-13. */
-       if (priv->InitialGain == 0) { /* autoDIG */
-               /* Advised from SD3 DZ */
-               priv->InitialGain = 4; /* In 87B, m74dBm means State 4 (m82dBm) */
-       }
-       /* Advised from SD3 DZ */
-       OfdmFA1 = 0x20;
-
-#if 1 /* lzm reserved 080826 */
-       AwakePeriodIn2Sec = (2000 - priv->DozePeriodInPast2Sec);
-       priv->DozePeriodInPast2Sec = 0;
-
-       if (AwakePeriodIn2Sec) {
-               OfdmFA1 = (u16)((OfdmFA1 * AwakePeriodIn2Sec) / 2000);
-               OfdmFA2 = (u16)((OfdmFA2 * AwakePeriodIn2Sec) / 2000);
-       } else {
-               ;
-       }
-#endif
-
-       InitialGainStep = 8;
-       LowestGainStage = priv->RegBModeGainStage; /* Lowest gain stage. */
-
-       if (OFDMFalseAlarm > OfdmFA1) {
-               if (OFDMFalseAlarm > OfdmFA2) {
-                       priv->DIG_NumberFallbackVote++;
-                       if (priv->DIG_NumberFallbackVote > 1) {
-                               /* serious OFDM  False Alarm, need fallback */
-                               if (priv->InitialGain < InitialGainStep) {
-                                       priv->InitialGainBackUp = priv->InitialGain;
-
-                                       priv->InitialGain = (priv->InitialGain + 1);
-                                       UpdateInitialGain(dev);
-                               }
-                               priv->DIG_NumberFallbackVote = 0;
-                               priv->DIG_NumberUpgradeVote = 0;
-                       }
-               } else {
-                       if (priv->DIG_NumberFallbackVote)
-                               priv->DIG_NumberFallbackVote--;
-               }
-               priv->DIG_NumberUpgradeVote = 0;
-       } else {
-               if (priv->DIG_NumberFallbackVote)
-                       priv->DIG_NumberFallbackVote--;
-               priv->DIG_NumberUpgradeVote++;
-
-               if (priv->DIG_NumberUpgradeVote > 9) {
-                       if (priv->InitialGain > LowestGainStage) { /* In 87B, m78dBm means State 4 (m864dBm) */
-                               priv->InitialGainBackUp = priv->InitialGain;
-
-                               priv->InitialGain = (priv->InitialGain - 1);
-                               UpdateInitialGain(dev);
-                       }
-                       priv->DIG_NumberFallbackVote = 0;
-                       priv->DIG_NumberUpgradeVote = 0;
-               }
-       }
-}
-
-/*
- *     Dispatch DIG implementation according to RF.
- */
-static void DynamicInitGain(struct net_device *dev)
-{
-       DIG_Zebra(dev);
-}
-
-void rtl8180_hw_dig_wq(struct work_struct *work)
-{
-       struct delayed_work *dwork = to_delayed_work(work);
-       struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, hw_dig_wq);
-       struct net_device *dev = ieee->dev;
-       struct r8180_priv *priv = ieee80211_priv(dev);
-
-       /* Read CCK and OFDM False Alarm. */
-       priv->FalseAlarmRegValue = read_nic_dword(dev, CCK_FALSE_ALARM);
-
-
-       /* Adjust Initial Gain dynamically. */
-       DynamicInitGain(dev);
-
-}
-
-static int IncludedInSupportedRates(struct r8180_priv *priv, u8 TxRate)
-{
-       u8 rate_len;
-       u8 rate_ex_len;
-       u8                      RateMask = 0x7F;
-       u8                      idx;
-       unsigned short          Found = 0;
-       u8                      NaiveTxRate = TxRate&RateMask;
-
-       rate_len = priv->ieee80211->current_network.rates_len;
-       rate_ex_len = priv->ieee80211->current_network.rates_ex_len;
-       for (idx = 0; idx < rate_len; idx++) {
-               if ((priv->ieee80211->current_network.rates[idx] & RateMask) == NaiveTxRate) {
-                       Found = 1;
-                       goto found_rate;
-               }
-       }
-       for (idx = 0; idx < rate_ex_len; idx++) {
-               if ((priv->ieee80211->current_network.rates_ex[idx] & RateMask) == NaiveTxRate) {
-                       Found = 1;
-                       goto found_rate;
-               }
-       }
-       return Found;
-found_rate:
-       return Found;
-}
-
-/*
- *     Get the Tx rate one degree up form the input rate in the supported rates.
- *     Return the upgrade rate if it is successed, otherwise return the input rate.
- */
-static u8 GetUpgradeTxRate(struct net_device *dev, u8 rate)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       u8                      UpRate;
-
-       /* Upgrade 1 degree. */
-       switch (rate) {
-       case 108: /* Up to 54Mbps. */
-               UpRate = 108;
-               break;
-
-       case 96: /* Up to 54Mbps. */
-               UpRate = 108;
-               break;
-
-       case 72: /* Up to 48Mbps. */
-               UpRate = 96;
-               break;
-
-       case 48: /* Up to 36Mbps. */
-               UpRate = 72;
-               break;
-
-       case 36: /* Up to 24Mbps. */
-               UpRate = 48;
-               break;
-
-       case 22: /* Up to 18Mbps. */
-               UpRate = 36;
-               break;
-
-       case 11: /* Up to 11Mbps. */
-               UpRate = 22;
-               break;
-
-       case 4: /* Up to 5.5Mbps. */
-               UpRate = 11;
-               break;
-
-       case 2: /* Up to 2Mbps. */
-               UpRate = 4;
-               break;
-
-       default:
-               printk("GetUpgradeTxRate(): Input Tx Rate(%d) is undefined!\n", rate);
-               return rate;
-       }
-       /* Check if the rate is valid. */
-       if (IncludedInSupportedRates(priv, UpRate)) {
-               return UpRate;
-       } else {
-               return rate;
-       }
-       return rate;
-}
-/*
- *     Get the Tx rate one degree down form the input rate in the supported rates.
- *     Return the degrade rate if it is successed, otherwise return the input rate.
- */
-
-static u8 GetDegradeTxRate(struct net_device *dev, u8 rate)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       u8                      DownRate;
-
-       /* Upgrade 1 degree. */
-       switch (rate) {
-       case 108: /* Down to 48Mbps. */
-               DownRate = 96;
-               break;
-
-       case 96: /* Down to 36Mbps. */
-               DownRate = 72;
-               break;
-
-       case 72: /* Down to 24Mbps. */
-               DownRate = 48;
-               break;
-
-       case 48: /* Down to 18Mbps. */
-               DownRate = 36;
-               break;
-
-       case 36: /* Down to 11Mbps. */
-               DownRate = 22;
-               break;
-
-       case 22: /* Down to 5.5Mbps. */
-               DownRate = 11;
-               break;
-
-       case 11: /* Down to 2Mbps. */
-               DownRate = 4;
-               break;
-
-       case 4: /* Down to 1Mbps. */
-               DownRate = 2;
-               break;
-
-       case 2: /* Down to 1Mbps. */
-               DownRate = 2;
-               break;
-
-       default:
-               printk("GetDegradeTxRate(): Input Tx Rate(%d) is undefined!\n", rate);
-               return rate;
-       }
-       /* Check if the rate is valid. */
-       if (IncludedInSupportedRates(priv, DownRate)) {
-               return DownRate;
-       } else {
-               return rate;
-       }
-       return rate;
-}
-/*
- *      Helper function to determine if specified data rate is
- *      CCK rate.
- */
-
-static bool MgntIsCckRate(u16 rate)
-{
-       bool bReturn = false;
-
-       if ((rate <= 22) && (rate != 12) && (rate != 18)) {
-               bReturn = true;
-       }
-
-       return bReturn;
-}
-/*
- *     Description:
- *             Tx Power tracking mechanism routine on 87SE.
- */
-void TxPwrTracking87SE(struct net_device *dev)
-{
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-       u8      tmpu1Byte, CurrentThermal, Idx;
-       char    CckTxPwrIdx, OfdmTxPwrIdx;
-
-       tmpu1Byte = read_nic_byte(dev, EN_LPF_CAL);
-       CurrentThermal = (tmpu1Byte & 0xf0) >> 4; /*[ 7:4]: thermal meter indication. */
-       CurrentThermal = (CurrentThermal > 0x0c) ? 0x0c : CurrentThermal;/* lzm add 080826 */
-
-       if (CurrentThermal != priv->ThermalMeter) {
-               /* Update Tx Power level on each channel. */
-               for (Idx = 1; Idx < 15; Idx++) {
-                       CckTxPwrIdx = priv->chtxpwr[Idx];
-                       OfdmTxPwrIdx = priv->chtxpwr_ofdm[Idx];
-
-                       if (CurrentThermal > priv->ThermalMeter) {
-                               /* higher thermal meter. */
-                               CckTxPwrIdx += (CurrentThermal - priv->ThermalMeter) * 2;
-                               OfdmTxPwrIdx += (CurrentThermal - priv->ThermalMeter) * 2;
-
-                               if (CckTxPwrIdx > 35)
-                                       CckTxPwrIdx = 35; /* Force TxPower to maximal index. */
-                               if (OfdmTxPwrIdx > 35)
-                                       OfdmTxPwrIdx = 35;
-                       } else {
-                               /* lower thermal meter. */
-                               CckTxPwrIdx -= (priv->ThermalMeter - CurrentThermal) * 2;
-                               OfdmTxPwrIdx -= (priv->ThermalMeter - CurrentThermal) * 2;
-
-                               if (CckTxPwrIdx < 0)
-                                       CckTxPwrIdx = 0;
-                               if (OfdmTxPwrIdx < 0)
-                                       OfdmTxPwrIdx = 0;
-                       }
-
-                       /* Update TxPower level on CCK and OFDM resp. */
-                       priv->chtxpwr[Idx] = CckTxPwrIdx;
-                       priv->chtxpwr_ofdm[Idx] = OfdmTxPwrIdx;
-               }
-
-               /* Update TxPower level immediately. */
-               rtl8225z2_SetTXPowerLevel(dev, priv->ieee80211->current_network.channel);
-       }
-       priv->ThermalMeter = CurrentThermal;
-}
-static void StaRateAdaptive87SE(struct net_device *dev)
-{
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-       unsigned long   CurrTxokCnt;
-       u16             CurrRetryCnt;
-       u16             CurrRetryRate;
-       unsigned long   CurrRxokCnt;
-       bool            bTryUp = false;
-       bool            bTryDown = false;
-       u8              TryUpTh = 1;
-       u8              TryDownTh = 2;
-       u32             TxThroughput;
-       long            CurrSignalStrength;
-       bool            bUpdateInitialGain = false;
-       u8              u1bOfdm = 0, u1bCck = 0;
-       char            OfdmTxPwrIdx, CckTxPwrIdx;
-
-       priv->RateAdaptivePeriod = RATE_ADAPTIVE_TIMER_PERIOD;
-
-
-       CurrRetryCnt    = priv->CurrRetryCnt;
-       CurrTxokCnt     = priv->NumTxOkTotal - priv->LastTxokCnt;
-       CurrRxokCnt     = priv->ieee80211->NumRxOkTotal - priv->LastRxokCnt;
-       CurrSignalStrength = priv->Stats_RecvSignalPower;
-       TxThroughput = (u32)(priv->NumTxOkBytesTotal - priv->LastTxOKBytes);
-       priv->LastTxOKBytes = priv->NumTxOkBytesTotal;
-       priv->CurrentOperaRate = priv->ieee80211->rate / 5;
-       /* 2 Compute retry ratio. */
-       if (CurrTxokCnt > 0) {
-               CurrRetryRate = (u16)(CurrRetryCnt * 100 / CurrTxokCnt);
-       } else {
-       /* It may be serious retry. To distinguish serious retry or no packets modified by Bruce */
-               CurrRetryRate = (u16)(CurrRetryCnt * 100 / 1);
-       }
-
-       priv->LastRetryCnt = priv->CurrRetryCnt;
-       priv->LastTxokCnt = priv->NumTxOkTotal;
-       priv->LastRxokCnt = priv->ieee80211->NumRxOkTotal;
-       priv->CurrRetryCnt = 0;
-
-       /* 2No Tx packets, return to init_rate or not? */
-       if (CurrRetryRate == 0 && CurrTxokCnt == 0) {
-               /*
-                * After 9 (30*300ms) seconds in this condition, we try to raise rate.
-                */
-               priv->TryupingCountNoData++;
-
-               /* [TRC Dell Lab] Extend raised period from 4.5sec to 9sec, Isaiah 2008-02-15 18:00 */
-               if (priv->TryupingCountNoData > 30) {
-                       priv->TryupingCountNoData = 0;
-                       priv->CurrentOperaRate = GetUpgradeTxRate(dev, priv->CurrentOperaRate);
-                       /* Reset Fail Record */
-                       priv->LastFailTxRate = 0;
-                       priv->LastFailTxRateSS = -200;
-                       priv->FailTxRateCount = 0;
-               }
-               goto SetInitialGain;
-       } else {
-               priv->TryupingCountNoData = 0; /*Reset trying up times. */
-       }
-
-
-       /*
-        * For Netgear case, I comment out the following signal strength estimation,
-        * which can results in lower rate to transmit when sample is NOT enough (e.g. PING request).
-        *
-        * Restructure rate adaptive as the following main stages:
-        * (1) Add retry threshold in 54M upgrading condition with signal strength.
-        * (2) Add the mechanism to degrade to CCK rate according to signal strength
-        *              and retry rate.
-        * (3) Remove all Initial Gain Updates over OFDM rate. To avoid the complicated
-        *              situation, Initial Gain Update is upon on DIG mechanism except CCK rate.
-        * (4) Add the mechanism of trying to upgrade tx rate.
-        * (5) Record the information of upping tx rate to avoid trying upping tx rate constantly.
-        *
-        */
-
-       /*
-        * 11Mbps or 36Mbps
-        * Check more times in these rate(key rates).
-        */
-       if (priv->CurrentOperaRate == 22 || priv->CurrentOperaRate == 72)
-               TryUpTh += 9;
-       /*
-        * Let these rates down more difficult.
-        */
-       if (MgntIsCckRate(priv->CurrentOperaRate) || priv->CurrentOperaRate == 36)
-               TryDownTh += 1;
-
-       /* 1 Adjust Rate. */
-       if (priv->bTryuping == true) {
-               /* 2 For Test Upgrading mechanism
-                * Note:
-                *      Sometimes the throughput is upon on the capability between the AP and NIC,
-                *      thus the low data rate does not improve the performance.
-                *      We randomly upgrade the data rate and check if the retry rate is improved.
-                */
-
-               /* Upgrading rate did not improve the retry rate, fallback to the original rate. */
-               if ((CurrRetryRate > 25) && TxThroughput < priv->LastTxThroughput) {
-                       /*Not necessary raising rate, fall back rate. */
-                       bTryDown = true;
-               } else {
-                       priv->bTryuping = false;
-               }
-       } else if (CurrSignalStrength > -47 && (CurrRetryRate < 50)) {
-               /*
-                * 2For High Power
-                *
-                * Return to highest data rate, if signal strength is good enough.
-                * SignalStrength threshold(-50dbm) is for RTL8186.
-                * Revise SignalStrength threshold to -51dbm.
-                */
-               /* Also need to check retry rate for safety, by Bruce, 2007-06-05. */
-               if (priv->CurrentOperaRate != priv->ieee80211->current_network.HighestOperaRate) {
-                       bTryUp = true;
-                       /* Upgrade Tx Rate directly. */
-                       priv->TryupingCount += TryUpTh;
-               }
-
-       } else if (CurrTxokCnt > 9 && CurrTxokCnt < 100 && CurrRetryRate >= 600) {
-               /*
-                *2 For Serious Retry
-                *
-                * Traffic is not busy but our Tx retry is serious.
-                */
-               bTryDown = true;
-               /* Let Rate Mechanism to degrade tx rate directly. */
-               priv->TryDownCountLowData += TryDownTh;
-       } else if (priv->CurrentOperaRate == 108) {
-               /* 2For 54Mbps */
-               /* Air Link */
-               if ((CurrRetryRate > 26) && (priv->LastRetryRate > 25)) {
-                       bTryDown = true;
-               }
-               /* Cable Link */
-               else if ((CurrRetryRate > 17) && (priv->LastRetryRate > 16) && (CurrSignalStrength > -72)) {
-                       bTryDown = true;
-               }
-
-               if (bTryDown && (CurrSignalStrength < -75)) /* cable link */
-                       priv->TryDownCountLowData += TryDownTh;
-       } else if (priv->CurrentOperaRate == 96) {
-               /* 2For 48Mbps */
-               /* Air Link */
-               if (((CurrRetryRate > 48) && (priv->LastRetryRate > 47))) {
-                       bTryDown = true;
-               } else if (((CurrRetryRate > 21) && (priv->LastRetryRate > 20)) && (CurrSignalStrength > -74)) { /* Cable Link */
-                       /* Down to rate 36Mbps. */
-                       bTryDown = true;
-               } else if ((CurrRetryRate > (priv->LastRetryRate + 50)) && (priv->FailTxRateCount > 2)) {
-                       bTryDown = true;
-                       priv->TryDownCountLowData += TryDownTh;
-               } else if ((CurrRetryRate < 8) && (priv->LastRetryRate < 8)) { /* TO DO: need to consider (RSSI) */
-                       bTryUp = true;
-               }
-
-               if (bTryDown && (CurrSignalStrength < -75)) {
-                       priv->TryDownCountLowData += TryDownTh;
-               }
-       } else if (priv->CurrentOperaRate == 72) {
-               /* 2For 36Mbps */
-               if ((CurrRetryRate > 43) && (priv->LastRetryRate > 41)) {
-                       /* Down to rate 24Mbps. */
-                       bTryDown = true;
-               } else if ((CurrRetryRate > (priv->LastRetryRate + 50)) && (priv->FailTxRateCount > 2)) {
-                       bTryDown = true;
-                       priv->TryDownCountLowData += TryDownTh;
-               } else if ((CurrRetryRate < 15) &&  (priv->LastRetryRate < 16)) { /* TO DO: need to consider (RSSI) */
-                       bTryUp = true;
-               }
-
-               if (bTryDown && (CurrSignalStrength < -80))
-                       priv->TryDownCountLowData += TryDownTh;
-
-       } else if (priv->CurrentOperaRate == 48) {
-               /* 2For 24Mbps */
-               /* Air Link */
-               if (((CurrRetryRate > 63) && (priv->LastRetryRate > 62))) {
-                       bTryDown = true;
-               } else if (((CurrRetryRate > 33) && (priv->LastRetryRate > 32)) && (CurrSignalStrength > -82)) { /* Cable Link */
-                       bTryDown = true;
-               } else if ((CurrRetryRate > (priv->LastRetryRate + 50)) && (priv->FailTxRateCount > 2)) {
-                       bTryDown = true;
-                       priv->TryDownCountLowData += TryDownTh;
-               } else if ((CurrRetryRate < 20) && (priv->LastRetryRate < 21)) { /* TO DO: need to consider (RSSI) */
-                       bTryUp = true;
-               }
-
-               if (bTryDown && (CurrSignalStrength < -82))
-                       priv->TryDownCountLowData += TryDownTh;
-
-       } else if (priv->CurrentOperaRate == 36) {
-               if (((CurrRetryRate > 85) && (priv->LastRetryRate > 86))) {
-                       bTryDown = true;
-               } else if ((CurrRetryRate > (priv->LastRetryRate + 50)) && (priv->FailTxRateCount > 2)) {
-                       bTryDown = true;
-                       priv->TryDownCountLowData += TryDownTh;
-               } else if ((CurrRetryRate < 22) && (priv->LastRetryRate < 23)) { /* TO DO: need to consider (RSSI) */
-                       bTryUp = true;
-               }
-       } else if (priv->CurrentOperaRate == 22) {
-               /* 2For 11Mbps */
-               if (CurrRetryRate > 95) {
-                       bTryDown = true;
-               } else if ((CurrRetryRate < 29) && (priv->LastRetryRate < 30)) { /*TO DO: need to consider (RSSI) */
-                       bTryUp = true;
-               }
-       } else if (priv->CurrentOperaRate == 11) {
-               /* 2For 5.5Mbps */
-               if (CurrRetryRate > 149) {
-                       bTryDown = true;
-               } else if ((CurrRetryRate < 60) && (priv->LastRetryRate < 65)) {
-                       bTryUp = true;
-               }
-       } else if (priv->CurrentOperaRate == 4) {
-               /* 2For 2 Mbps */
-               if ((CurrRetryRate > 99) && (priv->LastRetryRate > 99)) {
-                       bTryDown = true;
-               } else if ((CurrRetryRate < 65) && (priv->LastRetryRate < 70)) {
-                       bTryUp = true;
-               }
-       } else if (priv->CurrentOperaRate == 2) {
-               /* 2For 1 Mbps */
-               if ((CurrRetryRate < 70) && (priv->LastRetryRate < 75)) {
-                       bTryUp = true;
-               }
-       }
-
-       if (bTryUp && bTryDown)
-               printk("StaRateAdaptive87B(): Tx Rate tried upping and downing simultaneously!\n");
-
-       /* 1 Test Upgrading Tx Rate
-        * Sometimes the cause of the low throughput (high retry rate) is the compatibility between the AP and NIC.
-        * To test if the upper rate may cause lower retry rate, this mechanism randomly occurs to test upgrading tx rate.
-        */
-       if (!bTryUp && !bTryDown && (priv->TryupingCount == 0) && (priv->TryDownCountLowData == 0)
-               && priv->CurrentOperaRate != priv->ieee80211->current_network.HighestOperaRate && priv->FailTxRateCount < 2) {
-               if (jiffies % (CurrRetryRate + 101) == 0) {
-                       bTryUp = true;
-                       priv->bTryuping = true;
-               }
-       }
-
-       /* 1 Rate Mechanism */
-       if (bTryUp) {
-               priv->TryupingCount++;
-               priv->TryDownCountLowData = 0;
-
-               /*
-                * Check more times if we need to upgrade indeed.
-                * Because the largest value of pHalData->TryupingCount is 0xFFFF and
-                * the largest value of pHalData->FailTxRateCount is 0x14,
-                * this condition will be satisfied at most every 2 min.
-                */
-
-               if ((priv->TryupingCount > (TryUpTh + priv->FailTxRateCount * priv->FailTxRateCount)) ||
-                       (CurrSignalStrength > priv->LastFailTxRateSS) || priv->bTryuping) {
-                       priv->TryupingCount = 0;
-                       /*
-                        * When transferring from CCK to OFDM, DIG is an important issue.
-                        */
-                       if (priv->CurrentOperaRate == 22)
-                               bUpdateInitialGain = true;
-
-                       /*
-                        * The difference in throughput between 48Mbps and 36Mbps is 8M.
-                        * So, we must be careful in this rate scale. Isaiah 2008-02-15.
-                        */
-                       if (((priv->CurrentOperaRate == 72) || (priv->CurrentOperaRate == 48) || (priv->CurrentOperaRate == 36)) &&
-                               (priv->FailTxRateCount > 2))
-                               priv->RateAdaptivePeriod = (RATE_ADAPTIVE_TIMER_PERIOD / 2);
-
-                       /* (1)To avoid upgrade frequently to the fail tx rate, add the FailTxRateCount into the threshold. */
-                       /* (2)If the signal strength is increased, it may be able to upgrade. */
-
-                       priv->CurrentOperaRate = GetUpgradeTxRate(dev, priv->CurrentOperaRate);
-
-                       if (priv->CurrentOperaRate == 36) {
-                               priv->bUpdateARFR = true;
-                               write_nic_word(dev, ARFR, 0x0F8F); /* bypass 12/9/6 */
-                       } else if (priv->bUpdateARFR) {
-                               priv->bUpdateARFR = false;
-                               write_nic_word(dev, ARFR, 0x0FFF); /* set 1M ~ 54Mbps. */
-                       }
-
-                       /* Update Fail Tx rate and count. */
-                       if (priv->LastFailTxRate != priv->CurrentOperaRate) {
-                               priv->LastFailTxRate = priv->CurrentOperaRate;
-                               priv->FailTxRateCount = 0;
-                               priv->LastFailTxRateSS = -200; /* Set lowest power. */
-                       }
-               }
-       } else {
-               if (priv->TryupingCount > 0)
-                       priv->TryupingCount--;
-       }
-
-       if (bTryDown) {
-               priv->TryDownCountLowData++;
-               priv->TryupingCount = 0;
-
-               /* Check if Tx rate can be degraded or Test trying upgrading should fallback. */
-               if (priv->TryDownCountLowData > TryDownTh || priv->bTryuping) {
-                       priv->TryDownCountLowData = 0;
-                       priv->bTryuping = false;
-                       /* Update fail information. */
-                       if (priv->LastFailTxRate == priv->CurrentOperaRate) {
-                               priv->FailTxRateCount++;
-                               /* Record the Tx fail rate signal strength. */
-                               if (CurrSignalStrength > priv->LastFailTxRateSS)
-                                       priv->LastFailTxRateSS = CurrSignalStrength;
-                       } else {
-                               priv->LastFailTxRate = priv->CurrentOperaRate;
-                               priv->FailTxRateCount = 1;
-                               priv->LastFailTxRateSS = CurrSignalStrength;
-                       }
-                       priv->CurrentOperaRate = GetDegradeTxRate(dev, priv->CurrentOperaRate);
-
-                       /* Reduce chariot training time at weak signal strength situation. SD3 ED demand. */
-                       if ((CurrSignalStrength < -80) && (priv->CurrentOperaRate > 72)) {
-                               priv->CurrentOperaRate = 72;
-                       }
-
-                       if (priv->CurrentOperaRate == 36) {
-                               priv->bUpdateARFR = true;
-                               write_nic_word(dev, ARFR, 0x0F8F); /* bypass 12/9/6 */
-                       } else if (priv->bUpdateARFR) {
-                               priv->bUpdateARFR = false;
-                               write_nic_word(dev, ARFR, 0x0FFF); /* set 1M ~ 54Mbps. */
-                       }
-
-                       /*
-                        * When it is CCK rate, it may need to update initial gain to receive lower power packets.
-                        */
-                       if (MgntIsCckRate(priv->CurrentOperaRate)) {
-                               bUpdateInitialGain = true;
-                       }
-               }
-       } else {
-               if (priv->TryDownCountLowData > 0)
-                       priv->TryDownCountLowData--;
-       }
-
-       /*
-        * Keep the Tx fail rate count to equal to 0x15 at most.
-        * Reduce the fail count at least to 10 sec if tx rate is tending stable.
-        */
-       if (priv->FailTxRateCount >= 0x15 ||
-               (!bTryUp && !bTryDown && priv->TryDownCountLowData == 0 && priv->TryupingCount && priv->FailTxRateCount > 0x6)) {
-               priv->FailTxRateCount--;
-       }
-
-
-       OfdmTxPwrIdx  = priv->chtxpwr_ofdm[priv->ieee80211->current_network.channel];
-       CckTxPwrIdx  = priv->chtxpwr[priv->ieee80211->current_network.channel];
-
-       /* Mac0x9e increase 2 level in 36M~18M situation */
-       if ((priv->CurrentOperaRate < 96) && (priv->CurrentOperaRate > 22)) {
-               u1bCck = read_nic_byte(dev, CCK_TXAGC);
-               u1bOfdm = read_nic_byte(dev, OFDM_TXAGC);
-
-               /* case 1: Never enter High power */
-               if (u1bCck == CckTxPwrIdx) {
-                       if (u1bOfdm != (OfdmTxPwrIdx + 2)) {
-                       priv->bEnhanceTxPwr = true;
-                       u1bOfdm = ((u1bOfdm + 2) > 35) ? 35 : (u1bOfdm + 2);
-                       write_nic_byte(dev, OFDM_TXAGC, u1bOfdm);
-                       }
-               } else if (u1bCck < CckTxPwrIdx) {
-               /* case 2: enter high power */
-                       if (!priv->bEnhanceTxPwr) {
-                               priv->bEnhanceTxPwr = true;
-                               u1bOfdm = ((u1bOfdm + 2) > 35) ? 35 : (u1bOfdm + 2);
-                               write_nic_byte(dev, OFDM_TXAGC, u1bOfdm);
-                       }
-               }
-       } else if (priv->bEnhanceTxPwr) {  /* 54/48/11/5.5/2/1 */
-               u1bCck = read_nic_byte(dev, CCK_TXAGC);
-               u1bOfdm = read_nic_byte(dev, OFDM_TXAGC);
-
-               /* case 1: Never enter High power */
-               if (u1bCck == CckTxPwrIdx) {
-                       priv->bEnhanceTxPwr = false;
-                       write_nic_byte(dev, OFDM_TXAGC, OfdmTxPwrIdx);
-               }
-               /* case 2: enter high power */
-               else if (u1bCck < CckTxPwrIdx) {
-                       priv->bEnhanceTxPwr = false;
-                       u1bOfdm = ((u1bOfdm - 2) > 0) ? (u1bOfdm - 2) : 0;
-                       write_nic_byte(dev, OFDM_TXAGC, u1bOfdm);
-               }
-       }
-
-       /*
-        * We need update initial gain when we set tx rate "from OFDM to CCK" or
-        * "from CCK to OFDM".
-        */
-SetInitialGain:
-       if (bUpdateInitialGain) {
-               if (MgntIsCckRate(priv->CurrentOperaRate)) { /* CCK */
-                       if (priv->InitialGain > priv->RegBModeGainStage) {
-                               priv->InitialGainBackUp = priv->InitialGain;
-
-                               if (CurrSignalStrength < -85) /* Low power, OFDM [0x17] = 26. */
-                                       /* SD3 SYs suggest that CurrSignalStrength < -65, ofdm 0x17=26. */
-                                       priv->InitialGain = priv->RegBModeGainStage;
-
-                               else if (priv->InitialGain > priv->RegBModeGainStage + 1)
-                                       priv->InitialGain -= 2;
-
-                               else
-                                       priv->InitialGain--;
-
-                               printk("StaRateAdaptive87SE(): update init_gain to index %d for date rate %d\n", priv->InitialGain, priv->CurrentOperaRate);
-                               UpdateInitialGain(dev);
-                       }
-               } else { /* OFDM */
-                       if (priv->InitialGain < 4) {
-                               priv->InitialGainBackUp = priv->InitialGain;
-
-                               priv->InitialGain++;
-                               printk("StaRateAdaptive87SE(): update init_gain to index %d for date rate %d\n", priv->InitialGain, priv->CurrentOperaRate);
-                               UpdateInitialGain(dev);
-                       }
-               }
-       }
-
-       /* Record the related info */
-       priv->LastRetryRate = CurrRetryRate;
-       priv->LastTxThroughput = TxThroughput;
-       priv->ieee80211->rate = priv->CurrentOperaRate * 5;
-}
-
-void rtl8180_rate_adapter(struct work_struct *work)
-{
-       struct delayed_work *dwork = to_delayed_work(work);
-       struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, rate_adapter_wq);
-       struct net_device *dev = ieee->dev;
-       StaRateAdaptive87SE(dev);
-}
-void timer_rate_adaptive(unsigned long data)
-{
-       struct r8180_priv *priv = ieee80211_priv((struct net_device *)data);
-       if (!priv->up) {
-               return;
-       }
-       if ((priv->ieee80211->iw_mode != IW_MODE_MASTER)
-                       && (priv->ieee80211->state == IEEE80211_LINKED) &&
-                       (priv->ForcedDataRate == 0)) {
-               queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->rate_adapter_wq);
-       }
-       priv->rateadapter_timer.expires = jiffies + MSECS(priv->RateAdaptivePeriod);
-       add_timer(&priv->rateadapter_timer);
-}
-
-void SwAntennaDiversityRxOk8185(struct net_device *dev, u8 SignalStrength)
-{
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-
-       priv->AdRxOkCnt++;
-
-       if (priv->AdRxSignalStrength != -1) {
-               priv->AdRxSignalStrength = ((priv->AdRxSignalStrength * 7) + (SignalStrength * 3)) / 10;
-       } else { /* Initialization case. */
-               priv->AdRxSignalStrength = SignalStrength;
-       }
-
-       if (priv->LastRxPktAntenna) /* Main antenna. */
-               priv->AdMainAntennaRxOkCnt++;
-       else     /* Aux antenna. */
-               priv->AdAuxAntennaRxOkCnt++;
-}
- /*    Change Antenna Switch. */
-bool SetAntenna8185(struct net_device *dev, u8 u1bAntennaIndex)
-{
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-       bool bAntennaSwitched = false;
-
-       switch (u1bAntennaIndex) {
-       case 0:
-               /* Mac register, main antenna */
-               write_nic_byte(dev, ANTSEL, 0x03);
-               /* base band */
-               write_phy_cck(dev, 0x11, 0x9b); /* Config CCK RX antenna. */
-               write_phy_ofdm(dev, 0x0d, 0x5c); /* Config OFDM RX antenna. */
-
-               bAntennaSwitched = true;
-               break;
-
-       case 1:
-               /* Mac register, aux antenna */
-               write_nic_byte(dev, ANTSEL, 0x00);
-               /* base band */
-               write_phy_cck(dev, 0x11, 0xbb); /* Config CCK RX antenna. */
-               write_phy_ofdm(dev, 0x0d, 0x54); /* Config OFDM RX antenna. */
-
-               bAntennaSwitched = true;
-
-               break;
-
-       default:
-               printk("SetAntenna8185: unknown u1bAntennaIndex(%d)\n", u1bAntennaIndex);
-               break;
-       }
-
-       if (bAntennaSwitched)
-               priv->CurrAntennaIndex = u1bAntennaIndex;
-
-       return bAntennaSwitched;
-}
- /*    Toggle Antenna switch. */
-bool SwitchAntenna(struct net_device *dev)
-{
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-
-       bool            bResult;
-
-       if (priv->CurrAntennaIndex == 0) {
-               bResult = SetAntenna8185(dev, 1);
-       } else {
-               bResult = SetAntenna8185(dev, 0);
-       }
-
-       return bResult;
-}
-/*
- * Engine of SW Antenna Diversity mechanism.
- * Since 8187 has no Tx part information,
- * this implementation is only dependend on Rx part information.
- */
-void SwAntennaDiversity(struct net_device *dev)
-{
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-       bool   bSwCheckSS = false;
-       if (bSwCheckSS) {
-               priv->AdTickCount++;
-
-               printk("(1) AdTickCount: %d, AdCheckPeriod: %d\n",
-                       priv->AdTickCount, priv->AdCheckPeriod);
-               printk("(2) AdRxSignalStrength: %ld, AdRxSsThreshold: %ld\n",
-                       priv->AdRxSignalStrength, priv->AdRxSsThreshold);
-       }
-
-       /* Case 1. No Link. */
-       if (priv->ieee80211->state != IEEE80211_LINKED) {
-               priv->bAdSwitchedChecking = false;
-               /* I switch antenna here to prevent any one of antenna is broken before link established, 2006.04.18, by rcnjko.. */
-               SwitchAntenna(dev);
-
-         /* Case 2. Linked but no packet receive.d */
-       } else if (priv->AdRxOkCnt == 0) {
-               priv->bAdSwitchedChecking = false;
-               SwitchAntenna(dev);
-
-         /* Case 3. Evaluate last antenna switch action and undo it if necessary. */
-       } else if (priv->bAdSwitchedChecking == true) {
-               priv->bAdSwitchedChecking = false;
-
-               /* Adjust Rx signal strength threshold. */
-               priv->AdRxSsThreshold = (priv->AdRxSignalStrength + priv->AdRxSsBeforeSwitched) / 2;
-
-               priv->AdRxSsThreshold = (priv->AdRxSsThreshold > priv->AdMaxRxSsThreshold) ?
-                                       priv->AdMaxRxSsThreshold : priv->AdRxSsThreshold;
-               if (priv->AdRxSignalStrength < priv->AdRxSsBeforeSwitched) {
-               /* Rx signal strength is not improved after we swtiched antenna. => Swich back. */
-                       /* Increase Antenna Diversity checking period due to bad decision. */
-                       priv->AdCheckPeriod *= 2;
-                       /* Increase Antenna Diversity checking period. */
-                       if (priv->AdCheckPeriod > priv->AdMaxCheckPeriod)
-                               priv->AdCheckPeriod = priv->AdMaxCheckPeriod;
-
-                       /* Wrong decision => switch back. */
-                       SwitchAntenna(dev);
-               } else {
-               /* Rx Signal Strength is improved. */
-
-                       /* Reset Antenna Diversity checking period to its min value. */
-                       priv->AdCheckPeriod = priv->AdMinCheckPeriod;
-               }
-
-       }
-       /* Case 4. Evaluate if we shall switch antenna now. */
-       /* Cause Table Speed is very fast in TRC Dell Lab, we check it every time. */
-       else {
-               priv->AdTickCount = 0;
-
-               /*
-                * <Roger_Notes> We evaluate RxOk counts for each antenna first and than
-                * evaluate signal strength.
-                * The following operation can overcome the disability of CCA on both two antennas
-                * When signal strength was extremely low or high.
-                * 2008.01.30.
-                */
-
-               /*
-                * Evaluate RxOk count from each antenna if we shall switch default antenna now.
-                */
-               if ((priv->AdMainAntennaRxOkCnt < priv->AdAuxAntennaRxOkCnt)
-                       && (priv->CurrAntennaIndex == 0)) {
-               /* We set Main antenna as default but RxOk count was less than Aux ones. */
-
-                       /* Switch to Aux antenna. */
-                       SwitchAntenna(dev);
-                       priv->bHWAdSwitched = true;
-               } else if ((priv->AdAuxAntennaRxOkCnt < priv->AdMainAntennaRxOkCnt)
-                       && (priv->CurrAntennaIndex == 1)) {
-               /* We set Aux antenna as default but RxOk count was less than Main ones. */
-
-                       /* Switch to Main antenna. */
-                       SwitchAntenna(dev);
-                       priv->bHWAdSwitched = true;
-               } else {
-               /* Default antenna is better. */
-
-                       /* Still need to check current signal strength. */
-                       priv->bHWAdSwitched = false;
-               }
-               /*
-                * <Roger_Notes> We evaluate Rx signal strength ONLY when default antenna
-                * didn't change by HW evaluation.
-                * 2008.02.27.
-                *
-                * [TRC Dell Lab] SignalStrength is inaccuracy. Isaiah 2008-03-05
-                * For example, Throughput of aux is better than main antenna(about 10M v.s 2M),
-                * but AdRxSignalStrength is less than main.
-                * Our guess is that main antenna have lower throughput and get many change
-                * to receive more CCK packets(ex.Beacon) which have stronger SignalStrength.
-                */
-               if ((!priv->bHWAdSwitched) && (bSwCheckSS)) {
-                       /* Evaluate Rx signal strength if we shall switch antenna now. */
-                       if (priv->AdRxSignalStrength < priv->AdRxSsThreshold) {
-                       /* Rx signal strength is weak => Switch Antenna. */
-                               priv->AdRxSsBeforeSwitched = priv->AdRxSignalStrength;
-                               priv->bAdSwitchedChecking = true;
-
-                               SwitchAntenna(dev);
-                       } else {
-                       /* Rx signal strength is OK. */
-                               priv->bAdSwitchedChecking = false;
-                               /* Increase Rx signal strength threshold if necessary. */
-                               if ((priv->AdRxSignalStrength > (priv->AdRxSsThreshold + 10)) && /* Signal is much stronger than current threshold */
-                                       priv->AdRxSsThreshold <= priv->AdMaxRxSsThreshold) { /* Current threhold is not yet reach upper limit. */
-
-                                       priv->AdRxSsThreshold = (priv->AdRxSsThreshold + priv->AdRxSignalStrength) / 2;
-                                       priv->AdRxSsThreshold = (priv->AdRxSsThreshold > priv->AdMaxRxSsThreshold) ?
-                                                               priv->AdMaxRxSsThreshold : priv->AdRxSsThreshold;/* +by amy 080312 */
-                               }
-
-                               /* Reduce Antenna Diversity checking period if possible. */
-                               if (priv->AdCheckPeriod > priv->AdMinCheckPeriod)
-                                       priv->AdCheckPeriod /= 2;
-                       }
-               }
-       }
-       /* Reset antenna diversity Rx related statistics. */
-       priv->AdRxOkCnt = 0;
-       priv->AdMainAntennaRxOkCnt = 0;
-       priv->AdAuxAntennaRxOkCnt = 0;
-}
-
- /*    Return TRUE if we shall perform Tx Power Tracking Mechanism, FALSE otherwise. */
-bool CheckTxPwrTracking(struct net_device *dev)
-{
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-
-       if (!priv->bTxPowerTrack)
-               return false;
-
-       /* if 87SE is in High Power , don't do Tx Power Tracking. asked by SD3 ED. 2008-08-08 Isaiah */
-       if (priv->bToUpdateTxPwr)
-               return false;
-
-       return true;
-}
-
-
- /*    Timer callback function of SW Antenna Diversity. */
-void SwAntennaDiversityTimerCallback(struct net_device *dev)
-{
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-       enum rt_rf_power_state rtState;
-
-        /* We do NOT need to switch antenna while RF is off. */
-       rtState = priv->eRFPowerState;
-       do {
-               if (rtState == RF_OFF) {
-                       break;
-               } else if (rtState == RF_SLEEP) {
-                       /* Don't access BB/RF under Disable PLL situation. */
-                       break;
-               }
-               SwAntennaDiversity(dev);
-
-       } while (false);
-
-       if (priv->up) {
-               priv->SwAntennaDiversityTimer.expires = jiffies + MSECS(ANTENNA_DIVERSITY_TIMER_PERIOD);
-               add_timer(&priv->SwAntennaDiversityTimer);
-       }
-}
-
diff --git a/drivers/staging/rtl8187se/r8180_dm.h b/drivers/staging/rtl8187se/r8180_dm.h
deleted file mode 100644 (file)
index cb4046f..0000000
+++ /dev/null
@@ -1,23 +0,0 @@
-#ifndef R8180_DM_H
-#define R8180_DM_H
-
-#include "r8180.h"
-/* #include "r8180_hw.h"       */
-/* #include "r8180_93cx6.h"    */
-void SwAntennaDiversityRxOk8185(struct net_device *dev, u8 SignalStrength);
-bool SetAntenna8185(struct net_device *dev, u8 u1bAntennaIndex);
-bool SwitchAntenna(struct net_device *dev);
-void SwAntennaDiversity(struct net_device *dev);
-void SwAntennaDiversityTimerCallback(struct net_device *dev);
-bool CheckDig(struct net_device *dev);
-bool CheckHighPower(struct net_device *dev);
-void rtl8180_hw_dig_wq(struct work_struct *work);
-void rtl8180_tx_pw_wq(struct work_struct *work);
-void rtl8180_rate_adapter(struct work_struct *work);
-void TxPwrTracking87SE(struct net_device *dev);
-bool CheckTxPwrTracking(struct net_device *dev);
-void rtl8180_rate_adapter(struct work_struct *work);
-void timer_rate_adaptive(unsigned long data);
-
-
-#endif
diff --git a/drivers/staging/rtl8187se/r8180_hw.h b/drivers/staging/rtl8187se/r8180_hw.h
deleted file mode 100644 (file)
index e59d74f..0000000
+++ /dev/null
@@ -1,588 +0,0 @@
-/*
-       This is part of rtl8180 OpenSource driver.
-       Copyright (C) Andrea Merello 2004-2005  <andrea.merello@gmail.com>
-       Released under the terms of GPL (General Public Licence)
-
-       Parts of this driver are based on the GPL part of the
-       official Realtek driver.
-       Parts of this driver are based on the rtl8180 driver skeleton
-       from Patric Schenke & Andres Salomon.
-       Parts of this driver are based on the Intel Pro Wireless
-       2100 GPL driver.
-
-       We want to tanks the Authors of those projects
-       and the Ndiswrapper project Authors.
-*/
-
-/* Mariusz Matuszek added full registers definition with Realtek's name */
-
-/* this file contains register definitions for the rtl8180 MAC controller */
-#ifndef R8180_HW
-#define R8180_HW
-
-
-#define BIT0   0x00000001
-#define BIT1   0x00000002
-#define BIT2   0x00000004
-#define BIT3   0x00000008
-#define BIT4   0x00000010
-#define BIT5   0x00000020
-#define BIT6   0x00000040
-#define BIT7   0x00000080
-#define BIT9   0x00000200
-#define BIT11  0x00000800
-#define BIT13  0x00002000
-#define BIT15  0x00008000
-#define BIT20  0x00100000
-#define BIT21  0x00200000
-#define BIT22  0x00400000
-#define BIT23  0x00800000
-#define BIT24  0x01000000
-#define BIT25  0x02000000
-#define BIT26  0x04000000
-#define BIT27  0x08000000
-#define BIT28  0x10000000
-#define BIT29  0x20000000
-#define BIT30  0x40000000
-#define BIT31  0x80000000
-
-#define MAX_SLEEP_TIME (10000)
-#define MIN_SLEEP_TIME (50)
-
-#define BB_HOST_BANG_EN (1<<2)
-#define BB_HOST_BANG_CLK (1<<1)
-
-#define MAC0 0
-#define MAC4 4
-
-#define CMD 0x37
-#define CMD_RST_SHIFT 4
-#define CMD_RX_ENABLE_SHIFT 3
-#define CMD_TX_ENABLE_SHIFT 2
-
-#define EPROM_CMD 0x50
-#define EPROM_CMD_RESERVED_MASK ((1<<5)|(1<<4))
-#define EPROM_CMD_OPERATING_MODE_SHIFT 6
-#define EPROM_CMD_OPERATING_MODE_MASK ((1<<7)|(1<<6))
-#define EPROM_CMD_CONFIG 0x3
-#define EPROM_CMD_NORMAL 0
-#define EPROM_CMD_LOAD 1
-#define EPROM_CMD_PROGRAM 2
-#define EPROM_CS_SHIFT 3
-#define EPROM_CK_SHIFT 2
-#define EPROM_W_SHIFT 1
-#define EPROM_R_SHIFT 0
-#define CONFIG2_DMA_POLLING_MODE_SHIFT 3
-
-#define INTA_TXOVERFLOW (1<<15)
-#define INTA_TIMEOUT (1<<14)
-#define INTA_HIPRIORITYDESCERR (1<<9)
-#define INTA_HIPRIORITYDESCOK (1<<8)
-#define INTA_NORMPRIORITYDESCERR (1<<7)
-#define INTA_NORMPRIORITYDESCOK (1<<6)
-#define INTA_RXOVERFLOW (1<<5)
-#define INTA_RXDESCERR (1<<4)
-#define INTA_LOWPRIORITYDESCERR (1<<3)
-#define INTA_LOWPRIORITYDESCOK (1<<2)
-#define INTA_RXOK (1)
-#define INTA_MASK 0x3c
-
-#define RXRING_ADDR 0xe4 /* page 0 */
-#define PGSELECT 0x5e
-#define PGSELECT_PG_SHIFT 0
-#define RX_CONF 0x44
-#define MAC_FILTER_MASK ((1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<5) | \
-(1<<12) | (1<<18) | (1<<19) | (1<<20) | (1<<21) | (1<<22) | (1<<23))
-#define RX_CHECK_BSSID_SHIFT 23
-#define ACCEPT_PWR_FRAME_SHIFT 22
-#define ACCEPT_MNG_FRAME_SHIFT 20
-#define ACCEPT_CTL_FRAME_SHIFT 19
-#define ACCEPT_DATA_FRAME_SHIFT 18
-#define ACCEPT_ICVERR_FRAME_SHIFT 12
-#define ACCEPT_CRCERR_FRAME_SHIFT 5
-#define ACCEPT_BCAST_FRAME_SHIFT 3
-#define ACCEPT_MCAST_FRAME_SHIFT 2
-#define ACCEPT_ALLMAC_FRAME_SHIFT 0
-#define ACCEPT_NICMAC_FRAME_SHIFT 1
-
-#define RX_FIFO_THRESHOLD_MASK ((1<<13) | (1<<14) | (1<<15))
-#define RX_FIFO_THRESHOLD_SHIFT 13
-#define RX_FIFO_THRESHOLD_NONE 7
-#define RX_AUTORESETPHY_SHIFT 28
-
-#define TX_CONF 0x40
-#define TX_CONF_HEADER_AUTOICREMENT_SHIFT 30
-#define TX_LOOPBACK_SHIFT 17
-#define TX_LOOPBACK_NONE 0
-#define TX_LOOPBACK_CONTINUE 3
-#define TX_LOOPBACK_MASK ((1<<17)|(1<<18))
-#define TX_DPRETRY_SHIFT 0
-#define R8180_MAX_RETRY 255
-#define TX_RTSRETRY_SHIFT 8
-#define TX_NOICV_SHIFT 19
-#define TX_NOCRC_SHIFT 16
-#define TX_DMA_POLLING 0xd9
-#define TX_DMA_POLLING_BEACON_SHIFT 7
-#define TX_DMA_POLLING_HIPRIORITY_SHIFT 6
-#define TX_DMA_POLLING_NORMPRIORITY_SHIFT 5
-#define TX_DMA_POLLING_LOWPRIORITY_SHIFT 4
-#define TX_MANAGEPRIORITY_RING_ADDR 0x0C
-#define TX_BKPRIORITY_RING_ADDR 0x10
-#define TX_BEPRIORITY_RING_ADDR 0x14
-#define TX_VIPRIORITY_RING_ADDR 0x20
-#define TX_VOPRIORITY_RING_ADDR 0x24
-#define TX_HIGHPRIORITY_RING_ADDR 0x28
-#define MAX_RX_DMA_MASK ((1<<8) | (1<<9) | (1<<10))
-#define MAX_RX_DMA_2048 7
-#define MAX_RX_DMA_1024        6
-#define MAX_RX_DMA_SHIFT 10
-#define INT_TIMEOUT 0x48
-#define CONFIG3_CLKRUN_SHIFT 2
-#define CONFIG3_ANAPARAM_W_SHIFT 6
-#define ANAPARAM 0x54
-#define BEACON_INTERVAL 0x70
-#define BEACON_INTERVAL_MASK ((1<<0)|(1<<1)|(1<<2)|(1<<3)|(1<<4)|(1<<5)| \
-(1<<6)|(1<<7)|(1<<8)|(1<<9))
-#define ATIM_MASK ((1<<0)|(1<<1)|(1<<2)|(1<<3)|(1<<4)|(1<<5)|(1<<6)|(1<<7)| \
-(1<<8)|(1<<9))
-#define ATIM 0x72
-#define EPROM_CS_SHIFT 3
-#define EPROM_CK_SHIFT 2
-#define PHY_ADR 0x7c
-#define SECURITY 0x5f /* 1209 this is sth wrong */
-#define SECURITY_WEP_TX_ENABLE_SHIFT 1
-#define SECURITY_WEP_RX_ENABLE_SHIFT 0
-#define SECURITY_ENCRYP_104 1
-#define SECURITY_ENCRYP_SHIFT 4
-#define SECURITY_ENCRYP_MASK ((1<<4)|(1<<5))
-#define KEY0 0x90  /* 1209 this is sth wrong */
-#define CONFIG2_ANTENNA_SHIFT 6
-#define TX_BEACON_RING_ADDR 0x4c
-#define CONFIG0_WEP40_SHIFT 7
-#define CONFIG0_WEP104_SHIFT 6
-#define AGCRESET_SHIFT 5
-
-
-
-/*
- * Operational registers offsets in PCI (I/O) space.
- * RealTek names are used.
- */
-
-#define TSFTR 0x0018
-
-#define TLPDA 0x0020
-
-#define BSSID 0x002E
-
-#define CR 0x0037
-
-#define RF_SW_CONFIG           0x8                     /* store data which is transmitted to RF for driver     */
-#define RF_SW_CFG_SI           BIT1
-#define EIFS                   0x2D                    /* Extended InterFrame Space Timer, in unit of 4 us.    */
-
-#define BRSR                   0x34                    /* Basic rate set                                                                               */
-
-#define IMR 0x006C
-#define ISR 0x003C
-
-#define TCR 0x0040
-
-#define RCR 0x0044
-
-#define TimerInt 0x0048
-
-#define CR9346 0x0050
-
-#define CONFIG0 0x0051
-#define CONFIG2 0x0053
-
-#define MSR 0x0058
-
-#define CONFIG3 0x0059
-#define CONFIG4 0x005A
-       /* SD3 szuyitasi: Mac0x57= CC -> B0 Mac0x60= D1 -> C6   */
-       /* Mac0x60 = 0x000004C6 power save parameters                   */
-       #define ANAPARM_ASIC_ON    0xB0054D00
-       #define ANAPARM2_ASIC_ON  0x000004C6
-
-       #define ANAPARM_ON ANAPARM_ASIC_ON
-       #define ANAPARM2_ON ANAPARM2_ASIC_ON
-
-#define TESTR 0x005B
-
-#define PSR 0x005E
-
-#define BcnItv 0x0070
-
-#define AtimWnd 0x0072
-
-#define BintrItv 0x0074
-
-#define PhyAddr 0x007C
-#define PhyDataR 0x007E
-
-/* following are for rtl8185 */
-#define RFPinsOutput 0x80
-#define RFPinsEnable 0x82
-#define RF_TIMING 0x8c
-#define RFPinsSelect 0x84
-#define ANAPARAM2 0x60
-#define RF_PARA 0x88
-#define RFPinsInput 0x86
-#define GP_ENABLE 0x90
-#define GPIO 0x91
-#define SW_CONTROL_GPIO 0x400
-#define TX_ANTENNA 0x9f
-#define TX_GAIN_OFDM 0x9e
-#define TX_GAIN_CCK 0x9d
-#define WPA_CONFIG 0xb0
-#define TX_AGC_CTL 0x9c
-#define TX_AGC_CTL_PERPACKET_GAIN_SHIFT 0
-#define TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT 1
-#define TX_AGC_CTL_FEEDBACK_ANT 2
-#define RESP_RATE 0x34
-#define SIFS 0xb4
-#define DIFS 0xb5
-
-#define SLOT 0xb6
-#define CW_CONF 0xbc
-#define CW_CONF_PERPACKET_RETRY_SHIFT 1
-#define CW_CONF_PERPACKET_CW_SHIFT 0
-#define CW_VAL 0xbd
-#define MAX_RESP_RATE_SHIFT 4
-#define MIN_RESP_RATE_SHIFT 0
-#define RATE_FALLBACK 0xbe
-
-#define CONFIG5 0x00D8
-
-#define PHYPR                  0xDA                    /* 0xDA - 0x0B PHY Parameter Register.  */
-
-#define FEMR                   0x1D4   /* Function Event Mask register */
-
-#define FFER 0x00FC
-#define FFER_END 0x00FF
-
-
-
-/*
- * Bitmasks for specific register functions.
- * Names are derived from the register name and function name.
- *
- * <REGISTER>_<FUNCTION>[<bit>]
- *
- * this leads to some awkward names...
- */
-
-#define BRSR_BPLCP  ((1 << 8))
-#define BRSR_MBR    ((1 << 1)|(1 << 0))
-#define BRSR_MBR_8185 ((1 << 11)|(1 << 10)|(1 << 9)|(1 << 8)|(1 << 7)|(1 << 6)|(1 << 5)|(1 << 4)|(1 << 3)|(1 << 2)|(1 << 1)|(1 << 0))
-#define BRSR_MBR0   ((1 << 0))
-#define BRSR_MBR1   ((1 << 1))
-
-#define CR_RST      ((1 << 4))
-#define CR_RE       ((1 << 3))
-#define CR_TE       ((1 << 2))
-#define CR_MulRW    ((1 << 0))
-
-#define IMR_Dot11hInt  ((1 << 25))                     /*802.11h Measurement Interrupt                                 */
-#define IMR_BcnDmaInt  ((1 << 24))                     /*Beacon DMA Interrupt */ /*What differenct between BcnDmaInt and BcnInt???     */
-#define IMR_WakeInt            ((1 << 23))                     /*Wake Up Interrupt                                                             */
-#define IMR_TXFOVW             ((1 << 22))                     /*Tx FIFO Overflow Interrupt                                    */
-#define IMR_TimeOut1   ((1 << 21))                     /*Time Out Interrupt 1                                                  */
-#define IMR_BcnInt             ((1 << 20))                     /*Beacon Time out Interrupt                                             */
-#define IMR_ATIMInt            ((1 << 19))                     /*ATIM Time Out Interrupt                                               */
-#define IMR_TBDER              ((1 << 18))                     /*Tx Beacon Descriptor Error Interrupt                  */
-#define IMR_TBDOK              ((1 << 17))                     /*Tx Beacon Descriptor OK Interrupt                             */
-#define IMR_THPDER             ((1 << 16))                     /*Tx High Priority Descriptor Error Interrupt   */
-#define IMR_THPDOK             ((1 << 15))                     /*Tx High Priority Descriptor OK Interrupt              */
-#define IMR_TVODER             ((1 << 14))                     /*Tx AC_VO Descriptor Error Interrupt                   */
-#define IMR_TVODOK             ((1 << 13))                     /*Tx AC_VO Descriptor OK Interrupt                              */
-#define IMR_FOVW               ((1 << 12))                     /*Rx FIFO Overflow Interrupt                                    */
-#define IMR_RDU                        ((1 << 11))                     /*Rx Descriptor Unavailable Interrupt                   */
-#define IMR_TVIDER             ((1 << 10))                     /*Tx AC_VI Descriptor Error Interrupt                   */
-#define IMR_TVIDOK             ((1 << 9))                      /*Tx AC_VI Descriptor OK Interrupt                              */
-#define IMR_RER                        ((1 << 8))                      /*Rx Error Interrupt                                                    */
-#define IMR_ROK                        ((1 << 7))                      /*Receive OK Interrupt                                                  */
-#define IMR_TBEDER             ((1 << 6))                      /*Tx AC_BE Descriptor Error Interrupt                   */
-#define IMR_TBEDOK             ((1 << 5))                      /*Tx AC_BE Descriptor OK Interrupt                              */
-#define IMR_TBKDER             ((1 << 4))                      /*Tx AC_BK Descriptor Error Interrupt                   */
-#define IMR_TBKDOK             ((1 << 3))                      /*Tx AC_BK Descriptor OK Interrupt                              */
-#define IMR_RQoSOK             ((1 << 2))                      /*Rx QoS OK Interrupt                                                   */
-#define IMR_TimeOut2   ((1 << 1))                      /*Time Out Interrupt 2                                                  */
-#define IMR_TimeOut3   ((1 << 0))                      /*Time Out Interrupt 3                                                  */
-#define IMR_TMGDOK      ((1 << 30))
-#define ISR_Dot11hInt  ((1 << 25))                     /*802.11h Measurement Interrupt                                 */
-#define ISR_BcnDmaInt  ((1 << 24))                     /*Beacon DMA Interrupt  */ /*What differenct between BcnDmaInt and BcnInt???    */
-#define ISR_WakeInt            ((1 << 23))                     /*Wake Up Interrupt                                                             */
-#define ISR_TXFOVW             ((1 << 22))                     /*Tx FIFO Overflow Interrupt                                    */
-#define ISR_TimeOut1   ((1 << 21))                     /*Time Out Interrupt 1                                                  */
-#define ISR_BcnInt             ((1 << 20))                     /*Beacon Time out Interrupt                                             */
-#define ISR_ATIMInt            ((1 << 19))                     /*ATIM Time Out Interrupt                                               */
-#define ISR_TBDER              ((1 << 18))                     /*Tx Beacon Descriptor Error Interrupt                  */
-#define ISR_TBDOK              ((1 << 17))                     /*Tx Beacon Descriptor OK Interrupt                             */
-#define ISR_THPDER             ((1 << 16))                     /*Tx High Priority Descriptor Error Interrupt   */
-#define ISR_THPDOK             ((1 << 15))                     /*Tx High Priority Descriptor OK Interrupt              */
-#define ISR_TVODER             ((1 << 14))                     /*Tx AC_VO Descriptor Error Interrupt                   */
-#define ISR_TVODOK             ((1 << 13))                     /*Tx AC_VO Descriptor OK Interrupt                              */
-#define ISR_FOVW               ((1 << 12))                     /*Rx FIFO Overflow Interrupt                                    */
-#define ISR_RDU                        ((1 << 11))                     /*Rx Descriptor Unavailable Interrupt                   */
-#define ISR_TVIDER             ((1 << 10))                     /*Tx AC_VI Descriptor Error Interrupt                   */
-#define ISR_TVIDOK             ((1 << 9))                      /*Tx AC_VI Descriptor OK Interrupt                              */
-#define ISR_RER                        ((1 << 8))                      /*Rx Error Interrupt                                                    */
-#define ISR_ROK                        ((1 << 7))                      /*Receive OK Interrupt                                                  */
-#define ISR_TBEDER             ((1 << 6))                      /*Tx AC_BE Descriptor Error Interrupt                   */
-#define ISR_TBEDOK             ((1 << 5))                      /*Tx AC_BE Descriptor OK Interrupt                              */
-#define ISR_TBKDER             ((1 << 4))                      /*Tx AC_BK Descriptor Error Interrupt                   */
-#define ISR_TBKDOK             ((1 << 3))                      /*Tx AC_BK Descriptor OK Interrupt                              */
-#define ISR_RQoSOK             ((1 << 2))                      /*Rx QoS OK Interrupt                                                   */
-#define ISR_TimeOut2   ((1 << 1))                      /*Time Out Interrupt 2                                                  */
-#define ISR_TimeOut3   ((1 << 0))                      /*Time Out Interrupt 3                                                  */
-
-/* these definition is used for Tx/Rx test temporarily */
-#define ISR_TLPDER  ISR_TVIDER
-#define ISR_TLPDOK  ISR_TVIDOK
-#define ISR_TNPDER  ISR_TVODER
-#define ISR_TNPDOK  ISR_TVODOK
-#define ISR_TimeOut ISR_TimeOut1
-#define ISR_RXFOVW ISR_FOVW
-
-
-#define HW_VERID_R8180_F 3
-#define HW_VERID_R8180_ABCD 2
-#define HW_VERID_R8185_ABC 4
-#define HW_VERID_R8185_D 5
-#define HW_VERID_R8185B_B 6
-
-#define TCR_CWMIN   ((1 << 31))
-#define TCR_SWSEQ   ((1 << 30))
-#define TCR_HWVERID_MASK ((1 << 27)|(1 << 26)|(1 << 25))
-#define TCR_HWVERID_SHIFT 25
-#define TCR_SAT     ((1 << 24))
-#define TCR_PLCP_LEN TCR_SAT /* rtl8180 */
-#define TCR_MXDMA_MASK   ((1 << 23)|(1 << 22)|(1 << 21))
-#define TCR_MXDMA_1024 6
-#define TCR_MXDMA_2048 7
-#define TCR_MXDMA_SHIFT  21
-#define TCR_DISCW   ((1 << 20))
-#define TCR_ICV     ((1 << 19))
-#define TCR_LBK     ((1 << 18)|(1 << 17))
-#define TCR_LBK1    ((1 << 18))
-#define TCR_LBK0    ((1 << 17))
-#define TCR_CRC     ((1 << 16))
-#define TCR_DPRETRY_MASK   ((1 << 15)|(1 << 14)|(1 << 13)|(1 << 12)|(1 << 11)|(1 << 10)|(1 << 9)|(1 << 8))
-#define TCR_RTSRETRY_MASK   ((1 << 0)|(1 << 1)|(1 << 2)|(1 << 3)|(1 << 4)|(1 << 5)|(1 << 6)|(1 << 7))
-#define TCR_PROBE_NOTIMESTAMP_SHIFT 29 /* rtl8185 */
-
-#define RCR_ONLYERLPKT ((1 << 31))
-#define RCR_CS_SHIFT   29
-#define RCR_CS_MASK    ((1 << 30) | (1 << 29))
-#define RCR_ENMARP     ((1 << 28))
-#define RCR_CBSSID     ((1 << 23))
-#define RCR_APWRMGT    ((1 << 22))
-#define RCR_ADD3       ((1 << 21))
-#define RCR_AMF        ((1 << 20))
-#define RCR_ACF        ((1 << 19))
-#define RCR_ADF        ((1 << 18))
-#define RCR_RXFTH      ((1 << 15)|(1 << 14)|(1 << 13))
-#define RCR_RXFTH2     ((1 << 15))
-#define RCR_RXFTH1     ((1 << 14))
-#define RCR_RXFTH0     ((1 << 13))
-#define RCR_AICV       ((1 << 12))
-#define RCR_MXDMA      ((1 << 10)|(1 << 9)|(1 << 8))
-#define RCR_MXDMA2     ((1 << 10))
-#define RCR_MXDMA1     ((1 << 9))
-#define RCR_MXDMA0     ((1 << 8))
-#define RCR_9356SEL    ((1 << 6))
-#define RCR_ACRC32     ((1 << 5))
-#define RCR_AB         ((1 << 3))
-#define RCR_AM         ((1 << 2))
-#define RCR_APM        ((1 << 1))
-#define RCR_AAP        ((1 << 0))
-
-#define CR9346_EEM     ((1 << 7)|(1 << 6))
-#define CR9346_EEM1    ((1 << 7))
-#define CR9346_EEM0    ((1 << 6))
-#define CR9346_EECS    ((1 << 3))
-#define CR9346_EESK    ((1 << 2))
-#define CR9346_EED1    ((1 << 1))
-#define CR9346_EED0    ((1 << 0))
-
-#define CONFIG3_PARM_En    ((1 << 6))
-#define CONFIG3_FuncRegEn  ((1 << 1))
-
-#define CONFIG4_PWRMGT     ((1 << 5))
-
-#define MSR_LINK_MASK      ((1 << 2)|(1 << 3))
-#define MSR_LINK_MANAGED   2
-#define MSR_LINK_NONE      0
-#define MSR_LINK_SHIFT     2
-#define MSR_LINK_ADHOC     1
-#define MSR_LINK_MASTER    3
-
-#define BcnItv_BcnItv      (0x01FF)
-
-#define AtimWnd_AtimWnd    (0x01FF)
-
-#define BintrItv_BintrItv  (0x01FF)
-
-#define FEMR_INTR    ((1 << 15))
-#define FEMR_WKUP    ((1 << 14))
-#define FEMR_GWAKE   ((1 << 4))
-
-#define FFER_INTR    ((1 << 15))
-#define FFER_GWAKE   ((1 << 4))
-
-/* Three wire mode.                                    */
-#define SW_THREE_WIRE                  0
-#define HW_THREE_WIRE                  2
-/* RTL8187S by amy                                     */
-#define HW_THREE_WIRE_PI               5
-#define HW_THREE_WIRE_SI               6
-/* by amy                                                      */
-#define TCR_LRL_OFFSET         0
-#define TCR_SRL_OFFSET         8
-#define TCR_MXDMA_OFFSET       21
-#define TCR_DISReqQsize_OFFSET         28
-#define TCR_DurProcMode_OFFSET         30
-
-#define RCR_MXDMA_OFFSET                               8
-#define RCR_FIFO_OFFSET                                        13
-
-#define AckTimeOutReg  0x79            /* ACK timeout register, in unit of 4 us. */
-
-#define RFTiming                       0x8C
-
-#define TPPollStop             0x93
-
-#define TXAGC_CTL              0x9C                    /*< RJ_TODO_8185B> TX_AGC_CONTROL (0x9C seems be removed at 8185B, see p37). */
-#define CCK_TXAGC              0x9D
-#define OFDM_TXAGC             0x9E
-#define ANTSEL                 0x9F
-
-#define ACM_CONTROL             0x00BF      /* ACM Control Registe */
-
-#define        IntMig                  0xE2                    /* Interrupt Migration (0xE2 ~ 0xE3)    */
-
-#define TID_AC_MAP             0xE8                    /* TID to AC Mapping Register                   */
-
-#define ANAPARAM3              0xEE                    /* <RJ_TODO_8185B> How to use it?               */
-
-#define AC_VO_PARAM            0xF0                    /* AC_VO Parameters Record                              */
-#define AC_VI_PARAM            0xF4                    /* AC_VI Parameters Record                              */
-#define AC_BE_PARAM            0xF8                    /* AC_BE Parameters Record                              */
-#define AC_BK_PARAM            0xFC                    /* AC_BK Parameters Record                              */
-
-#define GPIOCtrl                       0x16B                   /*GPIO Control Register.                        */
-#define ARFR                   0x1E0   /* Auto Rate Fallback Register (0x1e0 ~ 0x1e2)  */
-
-#define RFSW_CTRL                      0x272   /* 0x272-0x273.                                                         */
-#define SW_3W_DB0                      0x274   /* Software 3-wire data buffer bit 31~0.                */
-#define SW_3W_DB1                      0x278   /* Software 3-wire data buffer bit 63~32.       */
-#define SW_3W_CMD0                     0x27C   /* Software 3-wire Control/Status Register.     */
-#define SW_3W_CMD1                     0x27D   /* Software 3-wire Control/Status Register.     */
-
-#define PI_DATA_READ           0X360   /* 0x360 - 0x361  Parallel Interface Data Register.     */
-#define SI_DATA_READ           0x362   /* 0x362 - 0x363  Serial Interface Data Register.       */
-
-/*
-----------------------------------------------------------------------------
-               8185B TPPollStop bits                                   (offset 0x93, 1 byte)
-----------------------------------------------------------------------------
-*/
-#define TPPOLLSTOP_BQ                  (0x01 << 7)
-#define TPPOLLSTOP_AC_VIQ              (0x01 << 4)
-
-#define MSR_LINK_ENEDCA           (1<<4)
-
-/*
-----------------------------------------------------------------------------
-               8187B AC_XX_PARAM bits
-----------------------------------------------------------------------------
-*/
-#define AC_PARAM_TXOP_LIMIT_OFFSET             16
-#define AC_PARAM_ECW_MAX_OFFSET                        12
-#define AC_PARAM_ECW_MIN_OFFSET                        8
-#define AC_PARAM_AIFS_OFFSET                   0
-
-/*
-----------------------------------------------------------------------------
-               8187B ACM_CONTROL bits                                  (Offset 0xBF, 1 Byte)
-----------------------------------------------------------------------------
-*/
-#define VOQ_ACM_EN                             (0x01 << 7)     /*BIT7  */
-#define VIQ_ACM_EN                             (0x01 << 6)     /*BIT6  */
-#define BEQ_ACM_EN                             (0x01 << 5)     /*BIT5  */
-#define ACM_HW_EN                              (0x01 << 4)     /*BIT4  */
-#define VOQ_ACM_CTL                            (0x01 << 2)     /*BIT2  */      /* Set to 1 when AC_VO used time reaches or exceeds the admitted time   */
-#define VIQ_ACM_CTL                            (0x01 << 1)     /*BIT1  */      /* Set to 1 when AC_VI used time reaches or exceeds the admitted time   */
-#define BEQ_ACM_CTL                            (0x01 << 0)     /*BIT0  */      /* Set to 1 when AC_BE used time reaches or exceeds the admitted time   */
-
-
-/*
-----------------------------------------------------------------------------
-               8185B SW_3W_CMD bits                                    (Offset 0x27C-0x27D, 16bit)
-----------------------------------------------------------------------------
-*/
-#define SW_3W_CMD0_HOLD                ((1 << 7))
-#define SW_3W_CMD1_RE          ((1 << 0)) /* BIT8              */
-#define SW_3W_CMD1_WE          ((1 << 1)) /* BIT9              */
-#define SW_3W_CMD1_DONE                ((1 << 2)) /* BIT10             */
-
-#define BB_HOST_BANG_RW                (1 << 3)
-
-/*
-----------------------------------------------------------------------------
-               8185B RATE_FALLBACK_CTL bits                    (Offset 0xBE, 8bit)
-----------------------------------------------------------------------------
-*/
-#define RATE_FALLBACK_CTL_ENABLE                               ((1 << 7))
-#define RATE_FALLBACK_CTL_ENABLE_RTSCTS                ((1 << 6))
-/* Auto rate fallback per 2^n retry. */
-#define RATE_FALLBACK_CTL_AUTO_STEP0   0x00
-#define RATE_FALLBACK_CTL_AUTO_STEP1   0x01
-#define RATE_FALLBACK_CTL_AUTO_STEP2   0x02
-#define RATE_FALLBACK_CTL_AUTO_STEP3   0x03
-
-
-#define RTL8225z2_ANAPARAM_OFF 0x55480658
-#define RTL8225z2_ANAPARAM2_OFF        0x72003f70
-/* by amy for power save               */
-#define RF_CHANGE_BY_HW BIT30
-#define RF_CHANGE_BY_PS BIT29
-#define RF_CHANGE_BY_IPS BIT28
-/* by amy for power save               */
-/* by amy for antenna                  */
-#define EEPROM_SW_REVD_OFFSET 0x3f
-
-/*  BIT[8-9] is for SW Antenna Diversity.
- *  Only the value EEPROM_SW_AD_ENABLE means enable, other values are disable.
- */
-#define EEPROM_SW_AD_MASK                      0x0300
-#define EEPROM_SW_AD_ENABLE                    0x0100
-
-/* BIT[10-11] determine if Antenna 1 is the Default Antenna.
- * Only the value EEPROM_DEF_ANT_1 means TRUE, other values are FALSE.
- */
-#define EEPROM_DEF_ANT_MASK                    0x0C00
-#define EEPROM_DEF_ANT_1                       0x0400
-/*by amy for antenna                                                                                                                                                           */
-/* {by amy 080312                                                                                                                                                                      */
-/* 0x7C, 0x7D Crystal calibration and Tx Power tracking mechanism. Added by Roger. 2007.12.10.         */
-#define EEPROM_RSV                                             0x7C
-#define EEPROM_XTAL_CAL_XOUT_MASK      0x0F    /* 0x7C[3:0], Crystal calibration for Xout.                             */
-#define EEPROM_XTAL_CAL_XIN_MASK               0xF0    /* 0x7C[7:4], Crystal calibration for Xin.                      */
-#define EEPROM_THERMAL_METER_MASK      0x0F00  /* 0x7D[3:0], Thermal meter reference level.                    */
-#define EEPROM_XTAL_CAL_ENABLE         0x1000  /* 0x7D[4], Crystal calibration enabled/disabled BIT.   */
-#define EEPROM_THERMAL_METER_ENABLE    0x2000  /* 0x7D[5], Thermal meter enabled/disabled BIT.                 */
-#define EN_LPF_CAL                     0x238   /* Enable LPF Calibration.                                                                              */
-#define PWR_METER_EN           BIT1
-/* <RJ_TODO_8185B> where are false alarm counters in 8185B? */
-#define CCK_FALSE_ALARM                0xD0
-/* by amy 080312} */
-
-/* YJ,add for Country IE, 080630 */
-#define EEPROM_COUNTRY_CODE  0x2E
-/* YJ,add,080630,end */
-
-#endif
diff --git a/drivers/staging/rtl8187se/r8180_rtl8225.h b/drivers/staging/rtl8187se/r8180_rtl8225.h
deleted file mode 100644 (file)
index 7df7392..0000000
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * This is part of the rtl8180-sa2400 driver released under the GPL (See file
- * COPYING for details).
- *
- * Copyright (c) 2005 Andrea Merello <andrea.merello@gmail.com>
- *
- * This files contains programming code for the rtl8225 radio frontend.
- *
- * *Many* thanks to Realtek Corp. for their great support!
- */
-
-#include "r8180.h"
-
-#define RTL8225_ANAPARAM_ON  0xa0000b59
-#define RTL8225_ANAPARAM_OFF 0xa00beb59
-#define RTL8225_ANAPARAM2_OFF 0x840dec11
-#define RTL8225_ANAPARAM2_ON  0x860dec11
-#define RTL8225_ANAPARAM_SLEEP 0xa00bab59
-#define RTL8225_ANAPARAM2_SLEEP 0x840dec11
-
-void rtl8225z2_rf_init(struct net_device *dev);
-void rtl8225z2_rf_set_chan(struct net_device *dev, short ch);
-void rtl8225z2_rf_close(struct net_device *dev);
-
-void RF_WriteReg(struct net_device *dev, u8 offset, u16 data);
-u16 RF_ReadReg(struct net_device *dev, u8 offset);
-
-void rtl8180_set_mode(struct net_device *dev, int mode);
-void rtl8180_set_mode(struct net_device *dev, int mode);
-bool SetZebraRFPowerState8185(struct net_device *dev,
-                             enum rt_rf_power_state eRFPowerState);
-void rtl8225z4_rf_sleep(struct net_device *dev);
-void rtl8225z4_rf_wakeup(struct net_device *dev);
-
diff --git a/drivers/staging/rtl8187se/r8180_rtl8225z2.c b/drivers/staging/rtl8187se/r8180_rtl8225z2.c
deleted file mode 100644 (file)
index 47104fa..0000000
+++ /dev/null
@@ -1,811 +0,0 @@
-/*
- * This is part of the rtl8180-sa2400 driver
- * released under the GPL (See file COPYING for details).
- * Copyright (c) 2005 Andrea Merello <andrea.merello@gmail.com>
- *
- * This files contains programming code for the rtl8225
- * radio frontend.
- *
- * *Many* thanks to Realtek Corp. for their great support!
- */
-
-#include "r8180_hw.h"
-#include "r8180_rtl8225.h"
-#include "r8180_93cx6.h"
-
-#include "ieee80211/dot11d.h"
-
-static void write_rtl8225(struct net_device *dev, u8 adr, u16 data)
-{
-       int i;
-       u16 out, select;
-       u8 bit;
-       u32 bangdata = (data << 4) | (adr & 0xf);
-
-       out = read_nic_word(dev, RFPinsOutput) & 0xfff3;
-
-       write_nic_word(dev, RFPinsEnable,
-               (read_nic_word(dev, RFPinsEnable) | 0x7));
-
-       select = read_nic_word(dev, RFPinsSelect);
-
-       write_nic_word(dev, RFPinsSelect, select | 0x7 |
-                      SW_CONTROL_GPIO);
-
-       force_pci_posting(dev);
-       udelay(10);
-
-       write_nic_word(dev, RFPinsOutput, out | BB_HOST_BANG_EN);
-
-       force_pci_posting(dev);
-       udelay(2);
-
-       write_nic_word(dev, RFPinsOutput, out);
-
-       force_pci_posting(dev);
-       udelay(10);
-
-       for (i = 15; i >= 0; i--) {
-               bit = (bangdata & (1 << i)) >> i;
-
-               write_nic_word(dev, RFPinsOutput, bit | out);
-
-               write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
-               write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
-
-               i--;
-               bit = (bangdata & (1 << i)) >> i;
-
-               write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
-               write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
-
-               write_nic_word(dev, RFPinsOutput, bit | out);
-
-       }
-
-       write_nic_word(dev, RFPinsOutput, out | BB_HOST_BANG_EN);
-
-       force_pci_posting(dev);
-       udelay(10);
-
-       write_nic_word(dev, RFPinsOutput, out | BB_HOST_BANG_EN);
-
-       write_nic_word(dev, RFPinsSelect, select | SW_CONTROL_GPIO);
-
-       rtl8185_rf_pins_enable(dev);
-}
-
-static const u8 rtl8225_agc[] = {
-       0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e,
-       0x9d, 0x9c, 0x9b, 0x9a, 0x99, 0x98, 0x97, 0x96,
-       0x95, 0x94, 0x93, 0x92, 0x91, 0x90, 0x8f, 0x8e,
-       0x8d, 0x8c, 0x8b, 0x8a, 0x89, 0x88, 0x87, 0x86,
-       0x85, 0x84, 0x83, 0x82, 0x81, 0x80, 0x3f, 0x3e,
-       0x3d, 0x3c, 0x3b, 0x3a, 0x39, 0x38, 0x37, 0x36,
-       0x35, 0x34, 0x33, 0x32, 0x31, 0x30, 0x2f, 0x2e,
-       0x2d, 0x2c, 0x2b, 0x2a, 0x29, 0x28, 0x27, 0x26,
-       0x25, 0x24, 0x23, 0x22, 0x21, 0x20, 0x1f, 0x1e,
-       0x1d, 0x1c, 0x1b, 0x1a, 0x19, 0x18, 0x17, 0x16,
-       0x15, 0x14, 0x13, 0x12, 0x11, 0x10, 0x0f, 0x0e,
-       0x0d, 0x0c, 0x0b, 0x0a, 0x09, 0x08, 0x07, 0x06,
-       0x05, 0x04, 0x03, 0x02, 0x01, 0x01, 0x01, 0x01,
-       0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
-       0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
-       0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
-};
-
-static const u32 rtl8225_chan[] = {
-       0,
-       0x0080, 0x0100, 0x0180, 0x0200, 0x0280, 0x0300, 0x0380,
-       0x0400, 0x0480, 0x0500, 0x0580, 0x0600, 0x0680, 0x074A,
-};
-
-static const u8 rtl8225z2_gain_bg[] = {
-       0x23, 0x15, 0xa5, /* -82-1dBm */
-       0x23, 0x15, 0xb5, /* -82-2dBm */
-       0x23, 0x15, 0xc5, /* -82-3dBm */
-       0x33, 0x15, 0xc5, /* -78dBm */
-       0x43, 0x15, 0xc5, /* -74dBm */
-       0x53, 0x15, 0xc5, /* -70dBm */
-       0x63, 0x15, 0xc5, /* -66dBm */
-};
-
-static const u8 rtl8225z2_gain_a[] = {
-       0x13, 0x27, 0x5a, /* -82dBm */
-       0x23, 0x23, 0x58, /* -82dBm */
-       0x33, 0x1f, 0x56, /* -82dBm */
-       0x43, 0x1b, 0x54, /* -78dBm */
-       0x53, 0x17, 0x51, /* -74dBm */
-       0x63, 0x24, 0x4f, /* -70dBm */
-       0x73, 0x0f, 0x4c, /* -66dBm */
-};
-
-static const u16 rtl8225z2_rxgain[] = {
-       0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409,
-       0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541,
-       0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583,
-       0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644,
-       0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688,
-       0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745,
-       0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789,
-       0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793,
-       0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d,
-       0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9,
-       0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3,
-       0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb
-
-};
-
-static void rtl8225z2_set_gain(struct net_device *dev, short gain)
-{
-       const u8 *rtl8225_gain;
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       u8 mode = priv->ieee80211->mode;
-
-       if (mode == IEEE_B || mode == IEEE_G)
-               rtl8225_gain = rtl8225z2_gain_bg;
-       else
-               rtl8225_gain = rtl8225z2_gain_a;
-
-       write_phy_ofdm(dev, 0x0b, rtl8225_gain[gain * 3]);
-       write_phy_ofdm(dev, 0x1b, rtl8225_gain[gain * 3 + 1]);
-       write_phy_ofdm(dev, 0x1d, rtl8225_gain[gain * 3 + 2]);
-       write_phy_ofdm(dev, 0x21, 0x37);
-}
-
-static u32 read_rtl8225(struct net_device *dev, u8 adr)
-{
-       u32 data2Write = ((u32)(adr & 0x1f)) << 27;
-       u32 dataRead;
-       u32 mask;
-       u16 oval, oval2, oval3, tmp;
-       int i;
-       short bit, rw;
-       u8 wLength = 6;
-       u8 rLength = 12;
-       u8 low2high = 0;
-
-       oval = read_nic_word(dev, RFPinsOutput);
-       oval2 = read_nic_word(dev, RFPinsEnable);
-       oval3 = read_nic_word(dev, RFPinsSelect);
-
-       write_nic_word(dev, RFPinsEnable, (oval2|0xf));
-       write_nic_word(dev, RFPinsSelect, (oval3|0xf));
-
-       dataRead = 0;
-
-       oval &= ~0xf;
-
-       write_nic_word(dev, RFPinsOutput, oval | BB_HOST_BANG_EN);
-       udelay(4);
-
-       write_nic_word(dev, RFPinsOutput, oval);
-       udelay(5);
-
-       rw = 0;
-
-       mask = (low2high) ? 0x01 : (((u32)0x01)<<(32-1));
-
-       for (i = 0; i < wLength/2; i++) {
-               bit = ((data2Write&mask) != 0) ? 1 : 0;
-               write_nic_word(dev, RFPinsOutput, bit | oval | rw);
-               udelay(1);
-
-               write_nic_word(dev, RFPinsOutput,
-                               bit | oval | BB_HOST_BANG_CLK | rw);
-               udelay(2);
-               write_nic_word(dev, RFPinsOutput,
-                               bit | oval | BB_HOST_BANG_CLK | rw);
-               udelay(2);
-
-               mask = (low2high) ? (mask<<1) : (mask>>1);
-
-               if (i == 2) {
-                       rw = BB_HOST_BANG_RW;
-                       write_nic_word(dev, RFPinsOutput,
-                                       bit | oval | BB_HOST_BANG_CLK | rw);
-                       udelay(2);
-                       write_nic_word(dev, RFPinsOutput, bit | oval | rw);
-                       udelay(2);
-                       break;
-               }
-
-               bit = ((data2Write&mask) != 0) ? 1 : 0;
-
-               write_nic_word(dev, RFPinsOutput,
-                               oval | bit | rw | BB_HOST_BANG_CLK);
-               udelay(2);
-               write_nic_word(dev, RFPinsOutput,
-                               oval | bit | rw | BB_HOST_BANG_CLK);
-               udelay(2);
-
-               write_nic_word(dev, RFPinsOutput, oval | bit | rw);
-               udelay(1);
-
-               mask = (low2high) ? (mask<<1) : (mask>>1);
-       }
-
-       write_nic_word(dev, RFPinsOutput, rw|oval);
-       udelay(2);
-       mask = (low2high) ? 0x01 : (((u32)0x01) << (12-1));
-
-       /*
-        * We must set data pin to HW controlled, otherwise RF can't driver it
-        * and value RF register won't be able to read back properly.
-        */
-       write_nic_word(dev, RFPinsEnable, (oval2 & (~0x01)));
-
-       for (i = 0; i < rLength; i++) {
-               write_nic_word(dev, RFPinsOutput, rw|oval); udelay(1);
-
-               write_nic_word(dev, RFPinsOutput, rw|oval|BB_HOST_BANG_CLK);
-               udelay(2);
-               write_nic_word(dev, RFPinsOutput, rw|oval|BB_HOST_BANG_CLK);
-               udelay(2);
-               write_nic_word(dev, RFPinsOutput, rw|oval|BB_HOST_BANG_CLK);
-               udelay(2);
-               tmp = read_nic_word(dev, RFPinsInput);
-
-               dataRead |= (tmp & BB_HOST_BANG_CLK ? mask : 0);
-
-               write_nic_word(dev, RFPinsOutput, (rw|oval)); udelay(2);
-
-               mask = (low2high) ? (mask<<1) : (mask>>1);
-       }
-
-       write_nic_word(dev, RFPinsOutput,
-                       BB_HOST_BANG_EN | BB_HOST_BANG_RW | oval);
-       udelay(2);
-
-       write_nic_word(dev, RFPinsEnable, oval2);
-       write_nic_word(dev, RFPinsSelect, oval3); /* Set To SW Switch */
-       write_nic_word(dev, RFPinsOutput, 0x3a0);
-
-       return dataRead;
-}
-
-void rtl8225z2_rf_close(struct net_device *dev)
-{
-       RF_WriteReg(dev, 0x4, 0x1f);
-
-       force_pci_posting(dev);
-       mdelay(1);
-
-       rtl8180_set_anaparam(dev, RTL8225z2_ANAPARAM_OFF);
-       rtl8185_set_anaparam2(dev, RTL8225z2_ANAPARAM2_OFF);
-}
-
-/*
- * Map dBm into Tx power index according to current HW model, for example,
- * RF and PA, and current wireless mode.
- */
-static s8 DbmToTxPwrIdx(struct r8180_priv *priv,
-                       enum wireless_mode mode, s32 PowerInDbm)
-{
-       bool bUseDefault = true;
-       s8 TxPwrIdx = 0;
-
-       /*
-        * OFDM Power in dBm = Index * 0.5 + 0
-        * CCK Power in dBm = Index * 0.25 + 13
-        */
-       s32 tmp = 0;
-
-       if (mode == WIRELESS_MODE_G) {
-               bUseDefault = false;
-               tmp = (2 * PowerInDbm);
-
-               if (tmp < 0)
-                       TxPwrIdx = 0;
-               else if (tmp > 40) /* 40 means 20 dBm. */
-                       TxPwrIdx = 40;
-               else
-                       TxPwrIdx = (s8)tmp;
-       } else if (mode == WIRELESS_MODE_B) {
-               bUseDefault = false;
-               tmp = (4 * PowerInDbm) - 52;
-
-               if (tmp < 0)
-                       TxPwrIdx = 0;
-               else if (tmp > 28) /* 28 means 20 dBm. */
-                       TxPwrIdx = 28;
-               else
-                       TxPwrIdx = (s8)tmp;
-       }
-
-       /*
-        * TRUE if we want to use a default implementation.
-        * We shall set it to FALSE when we have exact translation formula
-        * for target IC. 070622, by rcnjko.
-        */
-       if (bUseDefault) {
-               if (PowerInDbm < 0)
-                       TxPwrIdx = 0;
-               else if (PowerInDbm > 35)
-                       TxPwrIdx = 35;
-               else
-                       TxPwrIdx = (u8)PowerInDbm;
-       }
-
-       return TxPwrIdx;
-}
-
-void rtl8225z2_SetTXPowerLevel(struct net_device *dev, short ch)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       u8 max_cck_power_level;
-       u8 max_ofdm_power_level;
-       u8 min_ofdm_power_level;
-       char cck_power_level = (char)(0xff & priv->chtxpwr[ch]);
-       char ofdm_power_level = (char)(0xff & priv->chtxpwr_ofdm[ch]);
-
-       if (IS_DOT11D_ENABLE(priv->ieee80211) &&
-           IS_DOT11D_STATE_DONE(priv->ieee80211)) {
-               u8 MaxTxPwrInDbm = DOT11D_GetMaxTxPwrInDbm(priv->ieee80211, ch);
-               u8 CckMaxPwrIdx = DbmToTxPwrIdx(priv, WIRELESS_MODE_B,
-                                                       MaxTxPwrInDbm);
-               u8 OfdmMaxPwrIdx = DbmToTxPwrIdx(priv, WIRELESS_MODE_G,
-                                                       MaxTxPwrInDbm);
-
-               if (cck_power_level > CckMaxPwrIdx)
-                       cck_power_level = CckMaxPwrIdx;
-               if (ofdm_power_level > OfdmMaxPwrIdx)
-                       ofdm_power_level = OfdmMaxPwrIdx;
-       }
-
-       max_cck_power_level = 15;
-       max_ofdm_power_level = 25;
-       min_ofdm_power_level = 10;
-
-       if (cck_power_level > 35)
-               cck_power_level = 35;
-
-       write_nic_byte(dev, CCK_TXAGC, cck_power_level);
-       force_pci_posting(dev);
-       mdelay(1);
-
-       if (ofdm_power_level > 35)
-               ofdm_power_level = 35;
-
-       if (priv->up == 0) {
-               write_phy_ofdm(dev, 2, 0x42);
-               write_phy_ofdm(dev, 5, 0x00);
-               write_phy_ofdm(dev, 6, 0x40);
-               write_phy_ofdm(dev, 7, 0x00);
-               write_phy_ofdm(dev, 8, 0x40);
-       }
-
-       write_nic_byte(dev, OFDM_TXAGC, ofdm_power_level);
-
-       if (ofdm_power_level <= 11) {
-               write_phy_ofdm(dev, 0x07, 0x5c);
-               write_phy_ofdm(dev, 0x09, 0x5c);
-       }
-
-       if (ofdm_power_level <= 17) {
-               write_phy_ofdm(dev, 0x07, 0x54);
-               write_phy_ofdm(dev, 0x09, 0x54);
-       } else {
-               write_phy_ofdm(dev, 0x07, 0x50);
-               write_phy_ofdm(dev, 0x09, 0x50);
-       }
-
-       force_pci_posting(dev);
-       mdelay(1);
-}
-
-void rtl8225z2_rf_set_chan(struct net_device *dev, short ch)
-{
-       rtl8225z2_SetTXPowerLevel(dev, ch);
-
-       RF_WriteReg(dev, 0x7, rtl8225_chan[ch]);
-
-       if ((RF_ReadReg(dev, 0x7) & 0x0F80) != rtl8225_chan[ch])
-               RF_WriteReg(dev, 0x7, rtl8225_chan[ch]);
-
-       mdelay(1);
-
-       force_pci_posting(dev);
-       mdelay(10);
-}
-
-static void rtl8225_host_pci_init(struct net_device *dev)
-{
-       write_nic_word(dev, RFPinsOutput, 0x480);
-
-       rtl8185_rf_pins_enable(dev);
-
-       write_nic_word(dev, RFPinsSelect, 0x88 | SW_CONTROL_GPIO);
-
-       write_nic_byte(dev, GP_ENABLE, 0);
-
-       force_pci_posting(dev);
-       mdelay(200);
-
-       /* bit 6 is for RF on/off detection */
-       write_nic_word(dev, GP_ENABLE, 0xff & (~(1 << 6)));
-}
-
-void rtl8225z2_rf_init(struct net_device *dev)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       int i;
-       short channel = 1;
-       u16 brsr;
-       u32 data;
-
-       priv->chan = channel;
-
-       rtl8225_host_pci_init(dev);
-
-       write_nic_dword(dev, RF_TIMING, 0x000a8008);
-
-       brsr = read_nic_word(dev, BRSR);
-
-       write_nic_word(dev, BRSR, 0xffff);
-
-       write_nic_dword(dev, RF_PARA, 0x100044);
-
-       rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
-       write_nic_byte(dev, CONFIG3, 0x44);
-       rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
-
-       rtl8185_rf_pins_enable(dev);
-
-       write_rtl8225(dev, 0x0, 0x2bf); mdelay(1);
-       write_rtl8225(dev, 0x1, 0xee0); mdelay(1);
-       write_rtl8225(dev, 0x2, 0x44d); mdelay(1);
-       write_rtl8225(dev, 0x3, 0x441); mdelay(1);
-       write_rtl8225(dev, 0x4, 0x8c3); mdelay(1);
-       write_rtl8225(dev, 0x5, 0xc72); mdelay(1);
-       write_rtl8225(dev, 0x6, 0xe6);  mdelay(1);
-       write_rtl8225(dev, 0x7, rtl8225_chan[channel]);  mdelay(1);
-       write_rtl8225(dev, 0x8, 0x3f);  mdelay(1);
-       write_rtl8225(dev, 0x9, 0x335); mdelay(1);
-       write_rtl8225(dev, 0xa, 0x9d4); mdelay(1);
-       write_rtl8225(dev, 0xb, 0x7bb); mdelay(1);
-       write_rtl8225(dev, 0xc, 0x850); mdelay(1);
-       write_rtl8225(dev, 0xd, 0xcdf); mdelay(1);
-       write_rtl8225(dev, 0xe, 0x2b);  mdelay(1);
-       write_rtl8225(dev, 0xf, 0x114);
-
-       mdelay(100);
-
-       write_rtl8225(dev, 0x0, 0x1b7);
-
-       for (i = 0; i < ARRAY_SIZE(rtl8225z2_rxgain); i++) {
-               write_rtl8225(dev, 0x1, i + 1);
-               write_rtl8225(dev, 0x2, rtl8225z2_rxgain[i]);
-       }
-
-       write_rtl8225(dev, 0x3, 0x80);
-       write_rtl8225(dev, 0x5, 0x4);
-
-       write_rtl8225(dev, 0x0, 0xb7);
-
-       write_rtl8225(dev, 0x2, 0xc4d);
-
-       /* FIXME!! rtl8187 we have to check if calibrarion
-        * is successful and eventually cal. again (repeat
-        * the two write on reg 2)
-        */
-       data = read_rtl8225(dev, 6);
-       if (!(data & 0x00000080)) {
-               write_rtl8225(dev, 0x02, 0x0c4d);
-               force_pci_posting(dev); mdelay(200);
-               write_rtl8225(dev, 0x02, 0x044d);
-               force_pci_posting(dev); mdelay(100);
-               data = read_rtl8225(dev, 6);
-               if (!(data & 0x00000080))
-                       DMESGW("RF Calibration Failed!!!!\n");
-       }
-
-       mdelay(200);
-
-       write_rtl8225(dev, 0x0, 0x2bf);
-
-       for (i = 0; i < ARRAY_SIZE(rtl8225_agc); i++) {
-               write_phy_ofdm(dev, 0xb, rtl8225_agc[i]);
-               mdelay(1);
-
-               /* enable writing AGC table */
-               write_phy_ofdm(dev, 0xa, i + 0x80);
-               mdelay(1);
-       }
-
-       force_pci_posting(dev);
-       mdelay(1);
-
-       write_phy_ofdm(dev, 0x00, 0x01); mdelay(1);
-       write_phy_ofdm(dev, 0x01, 0x02); mdelay(1);
-       write_phy_ofdm(dev, 0x02, 0x62); mdelay(1);
-       write_phy_ofdm(dev, 0x03, 0x00); mdelay(1);
-       write_phy_ofdm(dev, 0x04, 0x00); mdelay(1);
-       write_phy_ofdm(dev, 0x05, 0x00); mdelay(1);
-       write_phy_ofdm(dev, 0x06, 0x40); mdelay(1);
-       write_phy_ofdm(dev, 0x07, 0x00); mdelay(1);
-       write_phy_ofdm(dev, 0x08, 0x40); mdelay(1);
-       write_phy_ofdm(dev, 0x09, 0xfe); mdelay(1);
-       write_phy_ofdm(dev, 0x0a, 0x08); mdelay(1);
-       write_phy_ofdm(dev, 0x0b, 0x80); mdelay(1);
-       write_phy_ofdm(dev, 0x0c, 0x01); mdelay(1);
-       write_phy_ofdm(dev, 0x0d, 0x43);
-       write_phy_ofdm(dev, 0x0e, 0xd3); mdelay(1);
-       write_phy_ofdm(dev, 0x0f, 0x38); mdelay(1);
-       write_phy_ofdm(dev, 0x10, 0x84); mdelay(1);
-       write_phy_ofdm(dev, 0x11, 0x07); mdelay(1);
-       write_phy_ofdm(dev, 0x12, 0x20); mdelay(1);
-       write_phy_ofdm(dev, 0x13, 0x20); mdelay(1);
-       write_phy_ofdm(dev, 0x14, 0x00); mdelay(1);
-       write_phy_ofdm(dev, 0x15, 0x40); mdelay(1);
-       write_phy_ofdm(dev, 0x16, 0x00); mdelay(1);
-       write_phy_ofdm(dev, 0x17, 0x40); mdelay(1);
-       write_phy_ofdm(dev, 0x18, 0xef); mdelay(1);
-       write_phy_ofdm(dev, 0x19, 0x19); mdelay(1);
-       write_phy_ofdm(dev, 0x1a, 0x20); mdelay(1);
-       write_phy_ofdm(dev, 0x1b, 0x15); mdelay(1);
-       write_phy_ofdm(dev, 0x1c, 0x04); mdelay(1);
-       write_phy_ofdm(dev, 0x1d, 0xc5); mdelay(1);
-       write_phy_ofdm(dev, 0x1e, 0x95); mdelay(1);
-       write_phy_ofdm(dev, 0x1f, 0x75); mdelay(1);
-       write_phy_ofdm(dev, 0x20, 0x1f); mdelay(1);
-       write_phy_ofdm(dev, 0x21, 0x17); mdelay(1);
-       write_phy_ofdm(dev, 0x22, 0x16); mdelay(1);
-       write_phy_ofdm(dev, 0x23, 0x80); mdelay(1); /* FIXME maybe not needed */
-       write_phy_ofdm(dev, 0x24, 0x46); mdelay(1);
-       write_phy_ofdm(dev, 0x25, 0x00); mdelay(1);
-       write_phy_ofdm(dev, 0x26, 0x90); mdelay(1);
-       write_phy_ofdm(dev, 0x27, 0x88); mdelay(1);
-
-       rtl8225z2_set_gain(dev, 4);
-
-       write_phy_cck(dev, 0x0, 0x98); mdelay(1);
-       write_phy_cck(dev, 0x3, 0x20); mdelay(1);
-       write_phy_cck(dev, 0x4, 0x7e); mdelay(1);
-       write_phy_cck(dev, 0x5, 0x12); mdelay(1);
-       write_phy_cck(dev, 0x6, 0xfc); mdelay(1);
-       write_phy_cck(dev, 0x7, 0x78); mdelay(1);
-       write_phy_cck(dev, 0x8, 0x2e); mdelay(1);
-       write_phy_cck(dev, 0x10, 0x93); mdelay(1);
-       write_phy_cck(dev, 0x11, 0x88); mdelay(1);
-       write_phy_cck(dev, 0x12, 0x47); mdelay(1);
-       write_phy_cck(dev, 0x13, 0xd0);
-       write_phy_cck(dev, 0x19, 0x00);
-       write_phy_cck(dev, 0x1a, 0xa0);
-       write_phy_cck(dev, 0x1b, 0x08);
-       write_phy_cck(dev, 0x40, 0x86); /* CCK Carrier Sense Threshold */
-       write_phy_cck(dev, 0x41, 0x8d); mdelay(1);
-       write_phy_cck(dev, 0x42, 0x15); mdelay(1);
-       write_phy_cck(dev, 0x43, 0x18); mdelay(1);
-       write_phy_cck(dev, 0x44, 0x36); mdelay(1);
-       write_phy_cck(dev, 0x45, 0x35); mdelay(1);
-       write_phy_cck(dev, 0x46, 0x2e); mdelay(1);
-       write_phy_cck(dev, 0x47, 0x25); mdelay(1);
-       write_phy_cck(dev, 0x48, 0x1c); mdelay(1);
-       write_phy_cck(dev, 0x49, 0x12); mdelay(1);
-       write_phy_cck(dev, 0x4a, 0x09); mdelay(1);
-       write_phy_cck(dev, 0x4b, 0x04); mdelay(1);
-       write_phy_cck(dev, 0x4c, 0x05); mdelay(1);
-
-       write_nic_byte(dev, 0x5b, 0x0d); mdelay(1);
-
-       rtl8225z2_SetTXPowerLevel(dev, channel);
-
-       /* RX antenna default to A */
-       write_phy_cck(dev, 0x11, 0x9b); mdelay(1);              /* B: 0xDB */
-       write_phy_ofdm(dev, 0x26, 0x90); mdelay(1);             /* B: 0x10 */
-
-       rtl8185_tx_antenna(dev, 0x03);                          /* B: 0x00 */
-
-       /* switch to high-speed 3-wire
-        * last digit. 2 for both cck and ofdm
-        */
-       write_nic_dword(dev, 0x94, 0x15c00002);
-       rtl8185_rf_pins_enable(dev);
-
-       rtl8225z2_rf_set_chan(dev, priv->chan);
-}
-
-#define MAX_DOZE_WAITING_TIMES_85B             20
-#define MAX_POLLING_24F_TIMES_87SE             10
-#define LPS_MAX_SLEEP_WAITING_TIMES_87SE       5
-
-bool SetZebraRFPowerState8185(struct net_device *dev,
-                             enum rt_rf_power_state eRFPowerState)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       u8                      btCR9346, btConfig3;
-       bool bActionAllowed = true, bTurnOffBB = true;
-       u8                      u1bTmp;
-       int                     i;
-       bool            bResult = true;
-       u8                      QueueID;
-
-       if (priv->SetRFPowerStateInProgress == true)
-               return false;
-
-       priv->SetRFPowerStateInProgress = true;
-
-       btCR9346 = read_nic_byte(dev, CR9346);
-       write_nic_byte(dev, CR9346, (btCR9346 | 0xC0));
-
-       btConfig3 = read_nic_byte(dev, CONFIG3);
-       write_nic_byte(dev, CONFIG3, (btConfig3 | CONFIG3_PARM_En));
-
-       switch (eRFPowerState) {
-       case RF_ON:
-               write_nic_word(dev, 0x37C, 0x00EC);
-
-               /* turn on AFE */
-               write_nic_byte(dev, 0x54, 0x00);
-               write_nic_byte(dev, 0x62, 0x00);
-
-               /* turn on RF */
-               RF_WriteReg(dev, 0x0, 0x009f); udelay(500);
-               RF_WriteReg(dev, 0x4, 0x0972); udelay(500);
-
-               /* turn on RF again */
-               RF_WriteReg(dev, 0x0, 0x009f); udelay(500);
-               RF_WriteReg(dev, 0x4, 0x0972); udelay(500);
-
-               /* turn on BB */
-               write_phy_ofdm(dev, 0x10, 0x40);
-               write_phy_ofdm(dev, 0x12, 0x40);
-
-               /* Avoid power down at init time. */
-               write_nic_byte(dev, CONFIG4, priv->RFProgType);
-
-               u1bTmp = read_nic_byte(dev, 0x24E);
-               write_nic_byte(dev, 0x24E, (u1bTmp & (~(BIT5 | BIT6))));
-               break;
-       case RF_SLEEP:
-               for (QueueID = 0, i = 0; QueueID < 6;) {
-                       if (get_curr_tx_free_desc(dev, QueueID) ==
-                                                       priv->txringcount) {
-                               QueueID++;
-                               continue;
-                       } else {
-                               priv->TxPollingTimes++;
-                               if (priv->TxPollingTimes >=
-                                       LPS_MAX_SLEEP_WAITING_TIMES_87SE) {
-                                       bActionAllowed = false;
-                                       break;
-                               } else
-                                       udelay(10);
-                       }
-               }
-
-               if (bActionAllowed) {
-                       /* turn off BB RXIQ matrix to cut off rx signal */
-                       write_phy_ofdm(dev, 0x10, 0x00);
-                       write_phy_ofdm(dev, 0x12, 0x00);
-
-                       /* turn off RF */
-                       RF_WriteReg(dev, 0x4, 0x0000);
-                       RF_WriteReg(dev, 0x0, 0x0000);
-
-                       /* turn off AFE except PLL */
-                       write_nic_byte(dev, 0x62, 0xff);
-                       write_nic_byte(dev, 0x54, 0xec);
-
-                       mdelay(1);
-
-                       {
-                               int i = 0;
-                               while (true) {
-                                       u8 tmp24F = read_nic_byte(dev, 0x24f);
-
-                                       if ((tmp24F == 0x01) ||
-                                                       (tmp24F == 0x09)) {
-                                               bTurnOffBB = true;
-                                               break;
-                                       } else {
-                                               udelay(10);
-                                               i++;
-                                               priv->TxPollingTimes++;
-
-                                               if (priv->TxPollingTimes >= LPS_MAX_SLEEP_WAITING_TIMES_87SE) {
-                                                       bTurnOffBB = false;
-                                                       break;
-                                               } else
-                                                       udelay(10);
-                                       }
-                               }
-                       }
-
-                       if (bTurnOffBB) {
-                               /* turn off BB */
-                               u1bTmp = read_nic_byte(dev, 0x24E);
-                               write_nic_byte(dev, 0x24E,
-                                               (u1bTmp | BIT5 | BIT6));
-
-                               /* turn off AFE PLL */
-                               write_nic_byte(dev, 0x54, 0xFC);
-                               write_nic_word(dev, 0x37C, 0x00FC);
-                       }
-               }
-               break;
-       case RF_OFF:
-               for (QueueID = 0, i = 0; QueueID < 6;) {
-                       if (get_curr_tx_free_desc(dev, QueueID) ==
-                                       priv->txringcount) {
-                               QueueID++;
-                               continue;
-                       } else {
-                               udelay(10);
-                               i++;
-                       }
-
-                       if (i >= MAX_DOZE_WAITING_TIMES_85B)
-                               break;
-               }
-
-               /* turn off BB RXIQ matrix to cut off rx signal */
-               write_phy_ofdm(dev, 0x10, 0x00);
-               write_phy_ofdm(dev, 0x12, 0x00);
-
-               /* turn off RF */
-               RF_WriteReg(dev, 0x4, 0x0000);
-               RF_WriteReg(dev, 0x0, 0x0000);
-
-               /* turn off AFE except PLL */
-               write_nic_byte(dev, 0x62, 0xff);
-               write_nic_byte(dev, 0x54, 0xec);
-
-               mdelay(1);
-
-               {
-                       int i = 0;
-
-                       while (true) {
-                               u8 tmp24F = read_nic_byte(dev, 0x24f);
-
-                               if ((tmp24F == 0x01) || (tmp24F == 0x09)) {
-                                       bTurnOffBB = true;
-                                       break;
-                               } else {
-                                       bTurnOffBB = false;
-                                       udelay(10);
-                                       i++;
-                               }
-
-                               if (i > MAX_POLLING_24F_TIMES_87SE)
-                                       break;
-                       }
-               }
-
-               if (bTurnOffBB) {
-                       /* turn off BB */
-                       u1bTmp = read_nic_byte(dev, 0x24E);
-                       write_nic_byte(dev, 0x24E, (u1bTmp | BIT5 | BIT6));
-
-                       /* turn off AFE PLL (80M) */
-                       write_nic_byte(dev, 0x54, 0xFC);
-                       write_nic_word(dev, 0x37C, 0x00FC);
-               }
-               break;
-       }
-
-       btConfig3 &= ~(CONFIG3_PARM_En);
-       write_nic_byte(dev, CONFIG3, btConfig3);
-
-       btCR9346 &= ~(0xC0);
-       write_nic_byte(dev, CR9346, btCR9346);
-
-       if (bResult && bActionAllowed)
-               priv->eRFPowerState = eRFPowerState;
-
-       priv->SetRFPowerStateInProgress = false;
-
-       return bResult && bActionAllowed;
-}
-
-void rtl8225z4_rf_sleep(struct net_device *dev)
-{
-       MgntActSet_RF_State(dev, RF_SLEEP, RF_CHANGE_BY_PS);
-}
-
-void rtl8225z4_rf_wakeup(struct net_device *dev)
-{
-       MgntActSet_RF_State(dev, RF_ON, RF_CHANGE_BY_PS);
-}
diff --git a/drivers/staging/rtl8187se/r8180_wx.c b/drivers/staging/rtl8187se/r8180_wx.c
deleted file mode 100644 (file)
index b552491..0000000
+++ /dev/null
@@ -1,1409 +0,0 @@
-/*
-       This file contains wireless extension handlers.
-
-       This is part of rtl8180 OpenSource driver.
-       Copyright (C) Andrea Merello 2004-2005  <andrea.merello@gmail.com>
-       Released under the terms of GPL (General Public Licence)
-
-       Parts of this driver are based on the GPL part
-       of the official realtek driver.
-
-       Parts of this driver are based on the rtl8180 driver skeleton
-       from Patric Schenke & Andres Salomon.
-
-       Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
-
-       We want to thanks the Authors of those projects and the Ndiswrapper
-       project Authors.
-*/
-
-
-#include "r8180.h"
-#include "r8180_hw.h"
-
-#include <net/iw_handler.h>
-#include "ieee80211/dot11d.h"
-
-static u32 rtl8180_rates[] = {1000000, 2000000, 5500000, 11000000,
-       6000000, 9000000, 12000000, 18000000, 24000000, 36000000, 48000000, 54000000};
-
-#define RATE_COUNT ARRAY_SIZE(rtl8180_rates)
-
-static struct rtl8187se_channel_list default_channel_plan[] = {
-       {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64}, 19},              /* FCC */
-       {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11}, 11},                                              /* IC */
-       {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52, 56, 60, 64}, 21},      /* ETSI */
-       {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52, 56, 60, 64}, 21},      /* Spain. Change to ETSI. */
-       {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52, 56, 60, 64}, 21},      /* France. Change to ETSI. */
-       {{14, 36, 40, 44, 48, 52, 56, 60, 64}, 9},                                              /* MKK */
-       {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 36, 40, 44, 48, 52, 56, 60, 64}, 22},  /* MKK1 */
-       {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52, 56, 60, 64}, 21},      /* Israel */
-       {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 34, 38, 42, 46}, 17},                      /* For 11a , TELEC */
-       {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14}, 14}                                   /* For Global Domain. 1-11:active scan, 12-14 passive scan.*/   /* +YJ, 080626 */
-};
-static int r8180_wx_get_freq(struct net_device *dev,
-                            struct iw_request_info *a,
-                            union iwreq_data *wrqu, char *b)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-
-       return ieee80211_wx_get_freq(priv->ieee80211, a, wrqu, b);
-}
-
-
-static int r8180_wx_set_key(struct net_device *dev,
-                           struct iw_request_info *info,
-                           union iwreq_data *wrqu, char *key)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       struct iw_point *erq = &(wrqu->encoding);
-
-       if (priv->ieee80211->bHwRadioOff)
-               return 0;
-
-       if (erq->length > 0) {
-               u32 *tkey = (u32 *) key;
-               priv->key0[0] = tkey[0];
-               priv->key0[1] = tkey[1];
-               priv->key0[2] = tkey[2];
-               priv->key0[3] = tkey[3] & 0xff;
-               DMESG("Setting wep key to %x %x %x %x",
-                     tkey[0], tkey[1], tkey[2], tkey[3]);
-               rtl8180_set_hw_wep(dev);
-       }
-       return 0;
-}
-
-
-static int r8180_wx_set_beaconinterval(struct net_device *dev,
-                                      struct iw_request_info *aa,
-                                      union iwreq_data *wrqu, char *b)
-{
-       int *parms = (int *)b;
-       int bi = parms[0];
-
-       struct r8180_priv *priv = ieee80211_priv(dev);
-
-       if (priv->ieee80211->bHwRadioOff)
-               return 0;
-
-       down(&priv->wx_sem);
-       DMESG("setting beacon interval to %x", bi);
-
-       priv->ieee80211->current_network.beacon_interval = bi;
-       rtl8180_commit(dev);
-       up(&priv->wx_sem);
-
-       return 0;
-}
-
-
-
-static int r8180_wx_get_mode(struct net_device *dev, struct iw_request_info *a,
-                            union iwreq_data *wrqu, char *b)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       return ieee80211_wx_get_mode(priv->ieee80211, a, wrqu, b);
-}
-
-
-
-static int r8180_wx_get_rate(struct net_device *dev,
-                            struct iw_request_info *info,
-                            union iwreq_data *wrqu, char *extra)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       return ieee80211_wx_get_rate(priv->ieee80211, info, wrqu, extra);
-}
-
-
-
-static int r8180_wx_set_rate(struct net_device *dev,
-                            struct iw_request_info *info,
-                            union iwreq_data *wrqu, char *extra)
-{
-       int ret;
-       struct r8180_priv *priv = ieee80211_priv(dev);
-
-
-       if (priv->ieee80211->bHwRadioOff)
-               return 0;
-
-       down(&priv->wx_sem);
-
-       ret = ieee80211_wx_set_rate(priv->ieee80211, info, wrqu, extra);
-
-       up(&priv->wx_sem);
-
-       return ret;
-}
-
-
-static int r8180_wx_set_crcmon(struct net_device *dev,
-                              struct iw_request_info *info,
-                              union iwreq_data *wrqu, char *extra)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       int *parms = (int *)extra;
-       int enable = (parms[0] > 0);
-       short prev = priv->crcmon;
-
-
-       if (priv->ieee80211->bHwRadioOff)
-               return 0;
-
-       down(&priv->wx_sem);
-
-       if (enable)
-               priv->crcmon = 1;
-       else
-               priv->crcmon = 0;
-
-       DMESG("bad CRC in monitor mode are %s",
-             priv->crcmon ? "accepted" : "rejected");
-
-       if (prev != priv->crcmon && priv->up)   {
-               rtl8180_down(dev);
-               rtl8180_up(dev);
-       }
-
-       up(&priv->wx_sem);
-
-       return 0;
-}
-
-
-static int r8180_wx_set_mode(struct net_device *dev, struct iw_request_info *a,
-                            union iwreq_data *wrqu, char *b)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       int ret;
-
-
-       if (priv->ieee80211->bHwRadioOff)
-               return 0;
-
-       down(&priv->wx_sem);
-       if (priv->bInactivePs)  {
-               if (wrqu->mode == IW_MODE_ADHOC)
-                       IPSLeave(dev);
-       }
-       ret = ieee80211_wx_set_mode(priv->ieee80211, a, wrqu, b);
-
-       up(&priv->wx_sem);
-       return ret;
-}
-
-/* YJ,add,080819,for hidden ap */
-struct  iw_range_with_scan_capa        {
-               /* Informative stuff (to choose between different interface) */
-
-               __u32           throughput; /* To give an idea... */
-
-               /* In theory this value should be the maximum benchmarked
-                * TCP/IP throughput, because with most of these devices the
-                * bit rate is meaningless (overhead an co) to estimate how
-                * fast the connection will go and pick the fastest one.
-                * I suggest people to play with Netperf or any benchmark...
-                */
-
-               /* NWID (or domain id)  */
-               __u32           min_nwid; /* Minimal NWID we are able to set */
-               __u32                   max_nwid; /* Maximal NWID we are able to set */
-
-               /* Old Frequency (backward compat - moved lower ) */
-               __u16                   old_num_channels;
-               __u8                    old_num_frequency;
-
-               /* Scan capabilities */
-               __u8                    scan_capa;
-};
-/* YJ,add,080819,for hidden ap */
-
-
-static int rtl8180_wx_get_range(struct net_device *dev,
-                               struct iw_request_info *info,
-                               union iwreq_data *wrqu, char *extra)
-{
-       struct iw_range *range = (struct iw_range *)extra;
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       u16 val;
-       int i;
-
-       wrqu->data.length = sizeof(*range);
-       memset(range, 0, sizeof(*range));
-
-       /* Let's try to keep this struct in the same order as in
-        * linux/include/wireless.h
-        */
-
-       /* TODO: See what values we can set, and remove the ones we can't
-        * set, or fill them with some default data.
-        */
-
-       /* ~5 Mb/s real (802.11b) */
-       range->throughput = 5 * 1000 * 1000;
-
-       /* TODO: Not used in 802.11b?   */
-/*     range->min_nwid; */     /* Minimal NWID we are able to set */
-       /* TODO: Not used in 802.11b?   */
-/*     range->max_nwid; */     /* Maximal NWID we are able to set */
-
-               /* Old Frequency (backward compat - moved lower ) */
-/*     range->old_num_channels; */
-/*     range->old_num_frequency; */
-/*     range->old_freq[6]; */ /* Filler to keep "version" at the same offset */
-       if (priv->rf_set_sens != NULL)
-               range->sensitivity = priv->max_sens;    /* signal level threshold range */
-
-       range->max_qual.qual = 100;
-       /* TODO: Find real max RSSI and stick here */
-       range->max_qual.level = 0;
-       range->max_qual.noise = -98;
-       range->max_qual.updated = 7; /* Updated all three */
-
-       range->avg_qual.qual = 92; /* > 8% missed beacons is 'bad' */
-       /* TODO: Find real 'good' to 'bad' threshold value for RSSI */
-       range->avg_qual.level = 20 + -98;
-       range->avg_qual.noise = 0;
-       range->avg_qual.updated = 7; /* Updated all three */
-
-       range->num_bitrates = RATE_COUNT;
-
-       for (i = 0; i < RATE_COUNT && i < IW_MAX_BITRATES; i++)
-               range->bitrate[i] = rtl8180_rates[i];
-
-       range->min_frag = MIN_FRAG_THRESHOLD;
-       range->max_frag = MAX_FRAG_THRESHOLD;
-
-       range->pm_capa = 0;
-
-       range->we_version_compiled = WIRELESS_EXT;
-       range->we_version_source = 16;
-
-               range->num_channels = 14;
-
-       for (i = 0, val = 0; i < 14; i++) {
-
-               /* Include only legal frequencies for some countries */
-               if ((GET_DOT11D_INFO(priv->ieee80211)->channel_map)[i+1]) {
-                               range->freq[val].i = i + 1;
-                       range->freq[val].m = ieee80211_wlan_frequencies[i] * 100000;
-                       range->freq[val].e = 1;
-                       val++;
-               } else {
-                       /* FIXME: do we need to set anything for channels */
-                       /* we don't use ? */
-               }
-
-               if (val == IW_MAX_FREQUENCIES)
-                       break;
-       }
-
-       range->num_frequency = val;
-       range->enc_capa = IW_ENC_CAPA_WPA | IW_ENC_CAPA_WPA2 |
-                                               IW_ENC_CAPA_CIPHER_TKIP | IW_ENC_CAPA_CIPHER_CCMP;
-
-       return 0;
-}
-
-
-static int r8180_wx_set_scan(struct net_device *dev, struct iw_request_info *a,
-                            union iwreq_data *wrqu, char *b)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       int ret;
-       struct ieee80211_device *ieee = priv->ieee80211;
-
-
-       if (priv->ieee80211->bHwRadioOff)
-               return 0;
-
-       if (wrqu->data.flags & IW_SCAN_THIS_ESSID)      {
-               struct iw_scan_req *req = (struct iw_scan_req *)b;
-               if (req->essid_len)             {
-                       ieee->current_network.ssid_len = req->essid_len;
-                       memcpy(ieee->current_network.ssid, req->essid, req->essid_len);
-               }
-       }
-
-       down(&priv->wx_sem);
-       if (priv->up)   {
-               priv->ieee80211->actscanning = true;
-               if (priv->bInactivePs && (priv->ieee80211->state != IEEE80211_LINKED))  {
-                       IPSLeave(dev);
-               ieee80211_softmac_ips_scan_syncro(priv->ieee80211);
-                       ret = 0;
-               }       else    {
-                       /* prevent scan in BusyTraffic */
-                       /* FIXME: Need to consider last scan time */
-                       if ((priv->link_detect.b_busy_traffic) && (true)) {
-                               ret = 0;
-                               printk("Now traffic is busy, please try later!\n");
-                       }       else
-                               /* prevent scan in BusyTraffic,end */
-                               ret = ieee80211_wx_set_scan(priv->ieee80211, a, wrqu, b);
-               }
-       }       else
-                       ret = -1;
-
-       up(&priv->wx_sem);
-
-       return ret;
-}
-
-
-static int r8180_wx_get_scan(struct net_device *dev, struct iw_request_info *a,
-                            union iwreq_data *wrqu, char *b)
-{
-
-       int ret;
-       struct r8180_priv *priv = ieee80211_priv(dev);
-
-       down(&priv->wx_sem);
-       if (priv->up)
-               ret = ieee80211_wx_get_scan(priv->ieee80211, a, wrqu, b);
-       else
-               ret = -1;
-
-       up(&priv->wx_sem);
-       return ret;
-}
-
-
-static int r8180_wx_set_essid(struct net_device *dev,
-                             struct iw_request_info *a,
-                             union iwreq_data *wrqu, char *b)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-
-       int ret;
-
-       if (priv->ieee80211->bHwRadioOff)
-               return 0;
-
-       down(&priv->wx_sem);
-       if (priv->bInactivePs)
-               IPSLeave(dev);
-
-       ret = ieee80211_wx_set_essid(priv->ieee80211, a, wrqu, b);
-
-       up(&priv->wx_sem);
-       return ret;
-}
-
-
-static int r8180_wx_get_essid(struct net_device *dev,
-                             struct iw_request_info *a,
-                             union iwreq_data *wrqu, char *b)
-{
-       int ret;
-       struct r8180_priv *priv = ieee80211_priv(dev);
-
-       down(&priv->wx_sem);
-
-       ret = ieee80211_wx_get_essid(priv->ieee80211, a, wrqu, b);
-
-       up(&priv->wx_sem);
-
-       return ret;
-}
-
-
-static int r8180_wx_set_freq(struct net_device *dev, struct iw_request_info *a,
-                            union iwreq_data *wrqu, char *b)
-{
-       int ret;
-       struct r8180_priv *priv = ieee80211_priv(dev);
-
-
-       if (priv->ieee80211->bHwRadioOff)
-               return 0;
-
-       down(&priv->wx_sem);
-
-       ret = ieee80211_wx_set_freq(priv->ieee80211, a, wrqu, b);
-
-       up(&priv->wx_sem);
-       return ret;
-}
-
-
-static int r8180_wx_get_name(struct net_device *dev,
-                            struct iw_request_info *info,
-                            union iwreq_data *wrqu, char *extra)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       return ieee80211_wx_get_name(priv->ieee80211, info, wrqu, extra);
-}
-
-static int r8180_wx_set_frag(struct net_device *dev,
-                            struct iw_request_info *info,
-                            union iwreq_data *wrqu, char *extra)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-
-       if (priv->ieee80211->bHwRadioOff)
-               return 0;
-
-       if (wrqu->frag.disabled)
-               priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
-       else {
-               if (wrqu->frag.value < MIN_FRAG_THRESHOLD ||
-                   wrqu->frag.value > MAX_FRAG_THRESHOLD)
-                       return -EINVAL;
-
-               priv->ieee80211->fts = wrqu->frag.value & ~0x1;
-       }
-
-       return 0;
-}
-
-
-static int r8180_wx_get_frag(struct net_device *dev,
-                            struct iw_request_info *info,
-                            union iwreq_data *wrqu, char *extra)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-
-       wrqu->frag.value = priv->ieee80211->fts;
-       wrqu->frag.fixed = 0;   /* no auto select */
-       wrqu->frag.disabled = (wrqu->frag.value == DEFAULT_FRAG_THRESHOLD);
-
-       return 0;
-}
-
-
-static int r8180_wx_set_wap(struct net_device *dev,
-                           struct iw_request_info *info,
-                           union iwreq_data *awrq, char *extra)
-{
-       int ret;
-       struct r8180_priv *priv = ieee80211_priv(dev);
-
-       if (priv->ieee80211->bHwRadioOff)
-               return 0;
-
-       down(&priv->wx_sem);
-
-       ret = ieee80211_wx_set_wap(priv->ieee80211, info, awrq, extra);
-
-       up(&priv->wx_sem);
-       return ret;
-
-}
-
-
-static int r8180_wx_get_wap(struct net_device *dev,
-                           struct iw_request_info *info,
-                           union iwreq_data *wrqu, char *extra)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-
-       return ieee80211_wx_get_wap(priv->ieee80211, info, wrqu, extra);
-}
-
-
-static int r8180_wx_set_enc(struct net_device *dev,
-                           struct iw_request_info *info,
-                           union iwreq_data *wrqu, char *key)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       int ret;
-
-       if (priv->ieee80211->bHwRadioOff)
-               return 0;
-
-
-       down(&priv->wx_sem);
-
-       if (priv->hw_wep)
-               ret = r8180_wx_set_key(dev, info, wrqu, key);
-       else    {
-               DMESG("Setting SW wep key");
-               ret = ieee80211_wx_set_encode(priv->ieee80211, info, wrqu, key);
-       }
-
-       up(&priv->wx_sem);
-       return ret;
-}
-
-
-static int r8180_wx_get_enc(struct net_device *dev,
-                           struct iw_request_info *info,
-                           union iwreq_data *wrqu, char *key)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-
-       return ieee80211_wx_get_encode(priv->ieee80211, info, wrqu, key);
-}
-
-
-static int r8180_wx_set_scan_type(struct net_device *dev,
-                                 struct iw_request_info *aa,
-                                 union iwreq_data *wrqu, char *p)
-{
-
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       int *parms = (int *)p;
-       int mode = parms[0];
-
-       if (priv->ieee80211->bHwRadioOff)
-               return 0;
-
-       priv->ieee80211->active_scan = mode;
-
-       return 1;
-}
-
-static int r8180_wx_set_retry(struct net_device *dev,
-                             struct iw_request_info *info,
-                             union iwreq_data *wrqu, char *extra)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       int err = 0;
-
-       if (priv->ieee80211->bHwRadioOff)
-               return 0;
-
-       down(&priv->wx_sem);
-
-       if (wrqu->retry.flags & IW_RETRY_LIFETIME ||
-           wrqu->retry.disabled)       {
-               err = -EINVAL;
-               goto exit;
-       }
-       if (!(wrqu->retry.flags & IW_RETRY_LIMIT))      {
-               err = -EINVAL;
-               goto exit;
-       }
-
-       if (wrqu->retry.value > R8180_MAX_RETRY)        {
-               err = -EINVAL;
-               goto exit;
-       }
-       if (wrqu->retry.flags & IW_RETRY_MAX) {
-               priv->retry_rts = wrqu->retry.value;
-               DMESG("Setting retry for RTS/CTS data to %d", wrqu->retry.value);
-
-       }       else {
-               priv->retry_data = wrqu->retry.value;
-               DMESG("Setting retry for non RTS/CTS data to %d", wrqu->retry.value);
-       }
-
-       /* FIXME !
-        * We might try to write directly the TX config register
-        * or to restart just the (R)TX process.
-        * I'm unsure if whole reset is really needed
-        */
-
-       rtl8180_commit(dev);
-exit:
-       up(&priv->wx_sem);
-
-       return err;
-}
-
-static int r8180_wx_get_retry(struct net_device *dev,
-                             struct iw_request_info *info,
-                             union iwreq_data *wrqu, char *extra)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-
-
-       wrqu->retry.disabled = 0; /* can't be disabled */
-
-       if ((wrqu->retry.flags & IW_RETRY_TYPE) ==
-           IW_RETRY_LIFETIME)
-               return -EINVAL;
-
-       if (wrqu->retry.flags & IW_RETRY_MAX) {
-               wrqu->retry.flags = IW_RETRY_LIMIT | IW_RETRY_MAX;
-               wrqu->retry.value = priv->retry_rts;
-       } else {
-               wrqu->retry.flags = IW_RETRY_LIMIT | IW_RETRY_MIN;
-               wrqu->retry.value = priv->retry_data;
-       }
-
-       return 0;
-}
-
-static int r8180_wx_get_sens(struct net_device *dev,
-                            struct iw_request_info *info,
-                            union iwreq_data *wrqu, char *extra)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       if (priv->rf_set_sens == NULL)
-               return -1; /* we have not this support for this radio */
-       wrqu->sens.value = priv->sens;
-       return 0;
-}
-
-
-static int r8180_wx_set_sens(struct net_device *dev,
-                            struct iw_request_info *info,
-                            union iwreq_data *wrqu, char *extra)
-{
-
-       struct r8180_priv *priv = ieee80211_priv(dev);
-
-       short err = 0;
-
-       if (priv->ieee80211->bHwRadioOff)
-               return 0;
-
-       down(&priv->wx_sem);
-       if (priv->rf_set_sens == NULL) {
-               err = -1; /* we have not this support for this radio */
-               goto exit;
-       }
-       if (priv->rf_set_sens(dev, wrqu->sens.value) == 0)
-               priv->sens = wrqu->sens.value;
-       else
-               err = -EINVAL;
-
-exit:
-       up(&priv->wx_sem);
-
-       return err;
-}
-
-
-static int r8180_wx_set_rawtx(struct net_device *dev,
-                             struct iw_request_info *info,
-                             union iwreq_data *wrqu, char *extra)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       int ret;
-
-       if (priv->ieee80211->bHwRadioOff)
-               return 0;
-
-       down(&priv->wx_sem);
-
-       ret = ieee80211_wx_set_rawtx(priv->ieee80211, info, wrqu, extra);
-
-       up(&priv->wx_sem);
-
-       return ret;
-
-}
-
-static int r8180_wx_get_power(struct net_device *dev,
-                             struct iw_request_info *info,
-                             union iwreq_data *wrqu, char *extra)
-{
-       int ret;
-       struct r8180_priv *priv = ieee80211_priv(dev);
-
-       down(&priv->wx_sem);
-
-       ret = ieee80211_wx_get_power(priv->ieee80211, info, wrqu, extra);
-
-       up(&priv->wx_sem);
-
-       return ret;
-}
-
-static int r8180_wx_set_power(struct net_device *dev,
-                             struct iw_request_info *info,
-                             union iwreq_data *wrqu, char *extra)
-{
-       int ret;
-       struct r8180_priv *priv = ieee80211_priv(dev);
-
-
-       if (priv->ieee80211->bHwRadioOff)
-               return 0;
-
-       down(&priv->wx_sem);
-       printk("=>>>>>>>>>>=============================>set power:%d, %d!\n", wrqu->power.disabled, wrqu->power.flags);
-       if (wrqu->power.disabled == 0) {
-               wrqu->power.flags |= IW_POWER_ALL_R;
-               wrqu->power.flags |= IW_POWER_TIMEOUT;
-               wrqu->power.value = 1000;
-       }
-
-       ret = ieee80211_wx_set_power(priv->ieee80211, info, wrqu, extra);
-
-       up(&priv->wx_sem);
-
-       return ret;
-}
-
-static int r8180_wx_set_rts(struct net_device *dev,
-                           struct iw_request_info *info,
-                           union iwreq_data *wrqu, char *extra)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-
-
-       if (priv->ieee80211->bHwRadioOff)
-               return 0;
-
-       if (wrqu->rts.disabled)
-               priv->rts = DEFAULT_RTS_THRESHOLD;
-       else {
-               if (wrqu->rts.value < MIN_RTS_THRESHOLD ||
-                   wrqu->rts.value > MAX_RTS_THRESHOLD)
-                       return -EINVAL;
-
-               priv->rts = wrqu->rts.value;
-       }
-
-       return 0;
-}
-static int r8180_wx_get_rts(struct net_device *dev,
-                           struct iw_request_info *info,
-                           union iwreq_data *wrqu, char *extra)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-
-
-
-       wrqu->rts.value = priv->rts;
-       wrqu->rts.fixed = 0;    /* no auto select */
-       wrqu->rts.disabled = (wrqu->rts.value == 0);
-
-       return 0;
-}
-static int dummy(struct net_device *dev, struct iw_request_info *a,
-                union iwreq_data *wrqu, char *b)
-{
-       return -1;
-}
-
-static int r8180_wx_get_iwmode(struct net_device *dev,
-                              struct iw_request_info *info,
-                              union iwreq_data *wrqu, char *extra)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       struct ieee80211_device *ieee;
-       int ret = 0;
-
-
-
-       down(&priv->wx_sem);
-
-       ieee = priv->ieee80211;
-
-       strcpy(extra, "802.11");
-       if (ieee->modulation & IEEE80211_CCK_MODULATION) {
-               strcat(extra, "b");
-               if (ieee->modulation & IEEE80211_OFDM_MODULATION)
-                       strcat(extra, "/g");
-       } else if (ieee->modulation & IEEE80211_OFDM_MODULATION)
-               strcat(extra, "g");
-
-       up(&priv->wx_sem);
-
-       return ret;
-}
-static int r8180_wx_set_iwmode(struct net_device *dev,
-                              struct iw_request_info *info,
-                              union iwreq_data *wrqu, char *extra)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       struct ieee80211_device *ieee = priv->ieee80211;
-       int *param = (int *)extra;
-       int ret = 0;
-       int modulation = 0, mode = 0;
-
-
-       if (priv->ieee80211->bHwRadioOff)
-               return 0;
-
-       down(&priv->wx_sem);
-
-       if (*param == 1) {
-               modulation |= IEEE80211_CCK_MODULATION;
-               mode = IEEE_B;
-       printk(KERN_INFO "B mode!\n");
-       } else if (*param == 2) {
-               modulation |= IEEE80211_OFDM_MODULATION;
-               mode = IEEE_G;
-       printk(KERN_INFO "G mode!\n");
-       } else if (*param == 3) {
-               modulation |= IEEE80211_CCK_MODULATION;
-               modulation |= IEEE80211_OFDM_MODULATION;
-               mode = IEEE_B|IEEE_G;
-       printk(KERN_INFO "B/G mode!\n");
-       }
-
-       if (ieee->proto_started) {
-               ieee80211_stop_protocol(ieee);
-               ieee->mode = mode;
-               ieee->modulation = modulation;
-               ieee80211_start_protocol(ieee);
-       } else {
-               ieee->mode = mode;
-               ieee->modulation = modulation;
-       }
-
-       up(&priv->wx_sem);
-
-       return ret;
-}
-static int r8180_wx_get_preamble(struct net_device *dev,
-                                struct iw_request_info *info,
-                                union iwreq_data *wrqu, char *extra)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-
-
-
-       down(&priv->wx_sem);
-
-
-
-       *extra = (char) priv->plcp_preamble_mode;       /* 0:auto 1:short 2:long */
-       up(&priv->wx_sem);
-
-       return 0;
-}
-static int r8180_wx_set_preamble(struct net_device *dev,
-                                struct iw_request_info *info,
-                                union iwreq_data *wrqu, char *extra)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       int ret = 0;
-
-
-       if (priv->ieee80211->bHwRadioOff)
-               return 0;
-
-       down(&priv->wx_sem);
-       if (*extra < 0 || *extra > 2)
-               ret = -1;
-       else
-               priv->plcp_preamble_mode = *((short *)extra);
-
-
-
-       up(&priv->wx_sem);
-
-       return ret;
-}
-static int r8180_wx_get_siglevel(struct net_device *dev,
-                                struct iw_request_info *info,
-                                union iwreq_data *wrqu, char *extra)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       int ret = 0;
-
-
-
-       down(&priv->wx_sem);
-       /* Modify by hikaru 6.5 */
-       *((int *)extra) = priv->wstats.qual.level;/*for interface test ,it should be the priv->wstats.qual.level; */
-
-
-
-       up(&priv->wx_sem);
-
-       return ret;
-}
-static int r8180_wx_get_sigqual(struct net_device *dev,
-                               struct iw_request_info *info,
-                               union iwreq_data *wrqu, char *extra)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       int ret = 0;
-
-
-
-       down(&priv->wx_sem);
-       /* Modify by hikaru 6.5 */
-       *((int *)extra) = priv->wstats.qual.qual;/* for interface test ,it should be the priv->wstats.qual.qual; */
-
-
-
-       up(&priv->wx_sem);
-
-       return ret;
-}
-static int r8180_wx_reset_stats(struct net_device *dev,
-                               struct iw_request_info *info,
-                               union iwreq_data *wrqu, char *extra)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       down(&priv->wx_sem);
-
-       priv->stats.txrdu = 0;
-       priv->stats.rxrdu = 0;
-       priv->stats.rxnolast = 0;
-       priv->stats.rxnodata = 0;
-       priv->stats.rxnopointer = 0;
-       priv->stats.txnperr = 0;
-       priv->stats.txresumed = 0;
-       priv->stats.rxerr = 0;
-       priv->stats.rxoverflow = 0;
-       priv->stats.rxint = 0;
-
-       priv->stats.txnpokint = 0;
-       priv->stats.txhpokint = 0;
-       priv->stats.txhperr = 0;
-       priv->stats.ints = 0;
-       priv->stats.shints = 0;
-       priv->stats.txoverflow = 0;
-       priv->stats.rxdmafail = 0;
-       priv->stats.txbeacon = 0;
-       priv->stats.txbeaconerr = 0;
-       priv->stats.txlpokint = 0;
-       priv->stats.txlperr = 0;
-       priv->stats.txretry = 0;/* 20060601 */
-       priv->stats.rxcrcerrmin = 0 ;
-       priv->stats.rxcrcerrmid = 0;
-       priv->stats.rxcrcerrmax = 0;
-       priv->stats.rxicverr = 0;
-
-       up(&priv->wx_sem);
-
-       return 0;
-
-}
-static int r8180_wx_radio_on(struct net_device *dev,
-                            struct iw_request_info *info,
-                            union iwreq_data *wrqu, char *extra)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-
-       if (priv->ieee80211->bHwRadioOff)
-               return 0;
-
-
-       down(&priv->wx_sem);
-       priv->rf_wakeup(dev);
-
-       up(&priv->wx_sem);
-
-       return 0;
-
-}
-
-static int r8180_wx_radio_off(struct net_device *dev,
-                             struct iw_request_info *info,
-                             union iwreq_data *wrqu, char *extra)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-
-       if (priv->ieee80211->bHwRadioOff)
-               return 0;
-
-
-       down(&priv->wx_sem);
-       priv->rf_sleep(dev);
-
-       up(&priv->wx_sem);
-
-       return 0;
-
-}
-static int r8180_wx_get_channelplan(struct net_device *dev,
-                                   struct iw_request_info *info,
-                                   union iwreq_data *wrqu, char *extra)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-
-
-
-       down(&priv->wx_sem);
-       *extra = priv->channel_plan;
-
-
-
-       up(&priv->wx_sem);
-
-       return 0;
-}
-static int r8180_wx_set_channelplan(struct net_device *dev,
-                                   struct iw_request_info *info,
-                                   union iwreq_data *wrqu, char *extra)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       int *val = (int *)extra;
-       int i;
-       printk("-----in fun %s\n", __func__);
-
-       if (priv->ieee80211->bHwRadioOff)
-               return 0;
-
-       /* unsigned long flags; */
-       down(&priv->wx_sem);
-       if (default_channel_plan[*val].len != 0) {
-               priv->channel_plan = *val;
-               /* Clear old channel map 8 */
-               for (i = 1; i <= MAX_CHANNEL_NUMBER; i++)
-                       GET_DOT11D_INFO(priv->ieee80211)->channel_map[i] = 0;
-
-               /* Set new channel map */
-               for (i = 1; i <= default_channel_plan[*val].len; i++)
-                       GET_DOT11D_INFO(priv->ieee80211)->channel_map[default_channel_plan[*val].channel[i-1]] = 1;
-
-       }
-       up(&priv->wx_sem);
-
-       return 0;
-}
-
-static int r8180_wx_get_version(struct net_device *dev,
-                               struct iw_request_info *info,
-                               union iwreq_data *wrqu, char *extra)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       /* struct ieee80211_device *ieee; */
-
-       down(&priv->wx_sem);
-       strcpy(extra, "1020.0808");
-       up(&priv->wx_sem);
-
-       return 0;
-}
-
-/* added by amy 080818 */
-/*receive datarate from user typing valid rate is from 2 to 108 (1 - 54M), if input 0, return to normal rate adaptive. */
-static int r8180_wx_set_forcerate(struct net_device *dev,
-                                 struct iw_request_info *info,
-                                 union iwreq_data *wrqu, char *extra)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       u8 forcerate = *extra;
-
-       down(&priv->wx_sem);
-
-       printk("==============>%s(): forcerate is %d\n", __func__, forcerate);
-       if ((forcerate == 2) || (forcerate == 4) || (forcerate == 11) || (forcerate == 22) || (forcerate == 12) ||
-               (forcerate == 18) || (forcerate == 24) || (forcerate == 36) || (forcerate == 48) || (forcerate == 72) ||
-               (forcerate == 96) || (forcerate == 108)) {
-               priv->ForcedDataRate = 1;
-               priv->ieee80211->rate = forcerate * 5;
-       }       else if (forcerate == 0)        {
-               priv->ForcedDataRate = 0;
-               printk("OK! return rate adaptive\n");
-       }       else
-                       printk("ERR: wrong rate\n");
-       up(&priv->wx_sem);
-       return 0;
-}
-
-static int r8180_wx_set_enc_ext(struct net_device *dev,
-                               struct iw_request_info *info,
-                               union iwreq_data *wrqu, char *extra)
-{
-
-       struct r8180_priv *priv = ieee80211_priv(dev);
-
-       int ret = 0;
-
-       if (priv->ieee80211->bHwRadioOff)
-               return 0;
-
-       down(&priv->wx_sem);
-       ret = ieee80211_wx_set_encode_ext(priv->ieee80211, info, wrqu, extra);
-       up(&priv->wx_sem);
-       return ret;
-
-}
-static int r8180_wx_set_auth(struct net_device *dev,
-                            struct iw_request_info *info,
-                            union iwreq_data *wrqu, char *extra)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       int ret = 0;
-
-       if (priv->ieee80211->bHwRadioOff)
-               return 0;
-
-       down(&priv->wx_sem);
-       ret = ieee80211_wx_set_auth(priv->ieee80211, info, &wrqu->param, extra);
-       up(&priv->wx_sem);
-       return ret;
-}
-
-static int r8180_wx_set_mlme(struct net_device *dev,
-                            struct iw_request_info *info,
-                            union iwreq_data *wrqu, char *extra)
-{
-       int ret = 0;
-       struct r8180_priv *priv = ieee80211_priv(dev);
-
-
-       if (priv->ieee80211->bHwRadioOff)
-               return 0;
-
-
-       down(&priv->wx_sem);
-#if 1
-       ret = ieee80211_wx_set_mlme(priv->ieee80211, info, wrqu, extra);
-#endif
-       up(&priv->wx_sem);
-       return ret;
-}
-static int r8180_wx_set_gen_ie(struct net_device *dev,
-                              struct iw_request_info *info,
-                              union iwreq_data *wrqu, char *extra)
-{
-       int ret = 0;
-               struct r8180_priv *priv = ieee80211_priv(dev);
-
-
-       if (priv->ieee80211->bHwRadioOff)
-               return 0;
-
-       down(&priv->wx_sem);
-#if 1
-       ret = ieee80211_wx_set_gen_ie(priv->ieee80211, extra, wrqu->data.length);
-#endif
-       up(&priv->wx_sem);
-       return ret;
-
-
-}
-
-static const iw_handler r8180_wx_handlers[] =  {
-       IW_HANDLER(SIOCGIWNAME,         r8180_wx_get_name),
-       IW_HANDLER(SIOCSIWNWID,         dummy),
-       IW_HANDLER(SIOCGIWNWID,         dummy),
-       IW_HANDLER(SIOCSIWFREQ,         r8180_wx_set_freq),
-       IW_HANDLER(SIOCGIWFREQ,         r8180_wx_get_freq),
-       IW_HANDLER(SIOCSIWMODE,         r8180_wx_set_mode),
-       IW_HANDLER(SIOCGIWMODE,         r8180_wx_get_mode),
-       IW_HANDLER(SIOCSIWSENS,         r8180_wx_set_sens),
-       IW_HANDLER(SIOCGIWSENS,         r8180_wx_get_sens),
-       IW_HANDLER(SIOCGIWRANGE,        rtl8180_wx_get_range),
-       IW_HANDLER(SIOCSIWSPY,          dummy),
-       IW_HANDLER(SIOCGIWSPY,          dummy),
-       IW_HANDLER(SIOCSIWAP,           r8180_wx_set_wap),
-       IW_HANDLER(SIOCGIWAP,           r8180_wx_get_wap),
-       IW_HANDLER(SIOCSIWMLME,         r8180_wx_set_mlme),
-       IW_HANDLER(SIOCGIWAPLIST,       dummy),         /* deprecated */
-       IW_HANDLER(SIOCSIWSCAN,         r8180_wx_set_scan),
-       IW_HANDLER(SIOCGIWSCAN,         r8180_wx_get_scan),
-       IW_HANDLER(SIOCSIWESSID,        r8180_wx_set_essid),
-       IW_HANDLER(SIOCGIWESSID,        r8180_wx_get_essid),
-       IW_HANDLER(SIOCSIWNICKN,        dummy),
-       IW_HANDLER(SIOCGIWNICKN,        dummy),
-       IW_HANDLER(SIOCSIWRATE,         r8180_wx_set_rate),
-       IW_HANDLER(SIOCGIWRATE,         r8180_wx_get_rate),
-       IW_HANDLER(SIOCSIWRTS,          r8180_wx_set_rts),
-       IW_HANDLER(SIOCGIWRTS,          r8180_wx_get_rts),
-       IW_HANDLER(SIOCSIWFRAG,         r8180_wx_set_frag),
-       IW_HANDLER(SIOCGIWFRAG,         r8180_wx_get_frag),
-       IW_HANDLER(SIOCSIWTXPOW,        dummy),
-       IW_HANDLER(SIOCGIWTXPOW,        dummy),
-       IW_HANDLER(SIOCSIWRETRY,        r8180_wx_set_retry),
-       IW_HANDLER(SIOCGIWRETRY,        r8180_wx_get_retry),
-       IW_HANDLER(SIOCSIWENCODE,       r8180_wx_set_enc),
-       IW_HANDLER(SIOCGIWENCODE,       r8180_wx_get_enc),
-       IW_HANDLER(SIOCSIWPOWER,        r8180_wx_set_power),
-       IW_HANDLER(SIOCGIWPOWER,        r8180_wx_get_power),
-       IW_HANDLER(SIOCSIWGENIE,        r8180_wx_set_gen_ie),
-       IW_HANDLER(SIOCSIWAUTH,         r8180_wx_set_auth),
-       IW_HANDLER(SIOCSIWENCODEEXT,    r8180_wx_set_enc_ext),
-};
-
-static const struct iw_priv_args r8180_private_args[] = {
-       {
-               SIOCIWFIRSTPRIV + 0x0,
-               IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "badcrc"
-       },
-       {       SIOCIWFIRSTPRIV + 0x1,
-               0, 0, "dummy"
-
-       },
-       {
-               SIOCIWFIRSTPRIV + 0x2,
-               IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "beaconint"
-       },
-       {       SIOCIWFIRSTPRIV + 0x3,
-               0, 0, "dummy"
-
-       },
-       {
-               SIOCIWFIRSTPRIV + 0x4,
-               IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "activescan"
-
-       },
-       {       SIOCIWFIRSTPRIV + 0x5,
-               0, 0, "dummy"
-
-       },
-       {
-               SIOCIWFIRSTPRIV + 0x6,
-               IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "rawtx"
-
-       },
-       {       SIOCIWFIRSTPRIV + 0x7,
-               0, 0, "dummy"
-
-       },
-       {
-               SIOCIWFIRSTPRIV + 0x8,
-               IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "setiwmode"
-       },
-       {
-               SIOCIWFIRSTPRIV + 0x9,
-               0, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | 32, "getiwmode"
-       },
-       {
-               SIOCIWFIRSTPRIV + 0xA,
-               IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "setpreamble"
-       },
-       {
-               SIOCIWFIRSTPRIV + 0xB,
-               0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getpreamble"
-       },
-       {       SIOCIWFIRSTPRIV + 0xC,
-               0, 0, "dummy"
-       },
-       {
-               SIOCIWFIRSTPRIV + 0xD,
-               0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getrssi"
-       },
-       {       SIOCIWFIRSTPRIV + 0xE,
-               0, 0, "dummy"
-       },
-       {
-               SIOCIWFIRSTPRIV + 0xF,
-               0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getlinkqual"
-       },
-       {
-               SIOCIWFIRSTPRIV + 0x10,
-               0, 0, "resetstats"
-       },
-       {
-               SIOCIWFIRSTPRIV + 0x11,
-               0, 0, "dummy"
-       },
-       {
-               SIOCIWFIRSTPRIV + 0x12,
-               0, 0, "radioon"
-       },
-       {
-               SIOCIWFIRSTPRIV + 0x13,
-               0, 0, "radiooff"
-       },
-       {
-               SIOCIWFIRSTPRIV + 0x14,
-               IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "setchannel"
-       },
-       {
-               SIOCIWFIRSTPRIV + 0x15,
-               0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getchannel"
-       },
-       {
-               SIOCIWFIRSTPRIV + 0x16,
-               0, 0, "dummy"
-       },
-       {
-               SIOCIWFIRSTPRIV + 0x17,
-               0, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | 32, "getversion"
-       },
-       {
-               SIOCIWFIRSTPRIV + 0x18,
-               IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "setrate"
-       },
-};
-
-
-static iw_handler r8180_private_handler[] = {
-       r8180_wx_set_crcmon, /*SIOCIWSECONDPRIV*/
-       dummy,
-       r8180_wx_set_beaconinterval,
-       dummy,
-       /* r8180_wx_set_monitor_type, */
-       r8180_wx_set_scan_type,
-       dummy,
-       r8180_wx_set_rawtx,
-       dummy,
-       r8180_wx_set_iwmode,
-       r8180_wx_get_iwmode,
-       r8180_wx_set_preamble,
-       r8180_wx_get_preamble,
-       dummy,
-       r8180_wx_get_siglevel,
-       dummy,
-       r8180_wx_get_sigqual,
-       r8180_wx_reset_stats,
-       dummy,/* r8180_wx_get_stats */
-       r8180_wx_radio_on,
-       r8180_wx_radio_off,
-       r8180_wx_set_channelplan,
-       r8180_wx_get_channelplan,
-       dummy,
-       r8180_wx_get_version,
-       r8180_wx_set_forcerate,
-};
-
-static inline int is_same_network(struct ieee80211_network *src,
-                                 struct ieee80211_network *dst,
-                                 struct ieee80211_device *ieee)
-{
-               /* A network is only a duplicate if the channel, BSSID, ESSID
-                * and the capability field (in particular IBSS and BSS) all match.
-                * We treat all <hidden> with the same BSSID and channel
-                * as one network
-                */
-               if (src->channel != dst->channel)
-                       return 0;
-
-               if (memcmp(src->bssid, dst->bssid, ETH_ALEN) != 0)
-                       return 0;
-
-               if (ieee->iw_mode != IW_MODE_INFRA) {
-                       if (src->ssid_len != dst->ssid_len)
-                               return 0;
-                       if (memcmp(src->ssid, dst->ssid, src->ssid_len) != 0)
-                               return 0;
-               }
-
-               if ((src->capability & WLAN_CAPABILITY_IBSS) !=
-                   (dst->capability & WLAN_CAPABILITY_IBSS))
-                       return 0;
-               if ((src->capability & WLAN_CAPABILITY_BSS) !=
-                   (dst->capability & WLAN_CAPABILITY_BSS))
-                       return 0;
-
-               return 1;
-}
-
-/* WB modified to show signal to GUI on 18-01-2008 */
-static struct iw_statistics *r8180_get_wireless_stats(struct net_device *dev)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       struct ieee80211_device *ieee = priv->ieee80211;
-       struct iw_statistics *wstats = &priv->wstats;
-       int tmp_level = 0;
-       int tmp_qual = 0;
-       int tmp_noise = 0;
-
-       if (ieee->state < IEEE80211_LINKED)     {
-               wstats->qual.qual = 0;
-               wstats->qual.level = 0;
-               wstats->qual.noise = 0;
-               wstats->qual.updated = IW_QUAL_ALL_UPDATED | IW_QUAL_DBM;
-               return wstats;
-       }
-
-       tmp_level = (&ieee->current_network)->stats.signal;
-       tmp_qual = (&ieee->current_network)->stats.signalstrength;
-       tmp_noise = (&ieee->current_network)->stats.noise;
-
-       wstats->qual.level = tmp_level;
-       wstats->qual.qual = tmp_qual;
-       wstats->qual.noise = tmp_noise;
-       wstats->qual.updated = IW_QUAL_ALL_UPDATED | IW_QUAL_DBM;
-       return wstats;
-}
-
-struct iw_handler_def  r8180_wx_handlers_def = {
-       .standard = r8180_wx_handlers,
-       .num_standard = ARRAY_SIZE(r8180_wx_handlers),
-       .private = r8180_private_handler,
-       .num_private = ARRAY_SIZE(r8180_private_handler),
-       .num_private_args = sizeof(r8180_private_args) / sizeof(struct iw_priv_args),
-       .get_wireless_stats = r8180_get_wireless_stats,
-       .private_args = (struct iw_priv_args *)r8180_private_args,
-};
-
-
diff --git a/drivers/staging/rtl8187se/r8180_wx.h b/drivers/staging/rtl8187se/r8180_wx.h
deleted file mode 100644 (file)
index d471520..0000000
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
-       This is part of rtl8180 OpenSource driver - v 0.3
-       Copyright (C) Andrea Merello 2004  <andrea.merello@gmail.com>
-       Released under the terms of GPL (General Public Licence)
-
-       Parts of this driver are based on the GPL part of the official realtek driver
-       Parts of this driver are based on the rtl8180 driver skeleton from Patric Schenke & Andres Salomon
-       Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver
-
-       We want to thanks the Authors of such projects and the Ndiswrapper project Authors.
-*/
-
-/* this file (will) contains wireless extension handlers*/
-
-#ifndef R8180_WX_H
-#define R8180_WX_H
-#include <linux/wireless.h>
-#include "ieee80211/ieee80211.h"
-extern struct iw_handler_def r8180_wx_handlers_def;
-
-#endif
diff --git a/drivers/staging/rtl8187se/r8185b_init.c b/drivers/staging/rtl8187se/r8185b_init.c
deleted file mode 100644 (file)
index cc6f100..0000000
+++ /dev/null
@@ -1,1464 +0,0 @@
-/*
- * Copyright (c) Realtek Semiconductor Corp. All rights reserved.
- *
- * Module Name:
- *     r8185b_init.c
- *
- * Abstract:
- *     Hardware Initialization and Hardware IO for RTL8185B
- *
- * Major Change History:
- *     When            Who                             What
- *     ----------      ---------------         -------------------------------
- *     2006-11-15      Xiong                   Created
- *
- * Notes:
- *     This file is ported from RTL8185B Windows driver.
- *
- *
- */
-
-/*--------------------------Include File------------------------------------*/
-#include <linux/spinlock.h>
-#include "r8180_hw.h"
-#include "r8180.h"
-#include "r8180_rtl8225.h" /* RTL8225 Radio frontend */
-#include "r8180_93cx6.h"   /* Card EEPROM */
-#include "r8180_wx.h"
-#include "ieee80211/dot11d.h"
-/* #define CONFIG_RTL8180_IO_MAP */
-#define TC_3W_POLL_MAX_TRY_CNT 5
-
-static u8 MAC_REG_TABLE[][2] = {
-       /*
-        * PAGE 0:
-        * 0x34(BRSR), 0xBE(RATE_FALLBACK_CTL), 0x1E0(ARFR) would set in
-        * HwConfigureRTL8185()
-        * 0x272(RFSW_CTRL), 0x1CE(AESMSK_QC) set in InitializeAdapter8185().
-        * 0x1F0~0x1F8  set in MacConfig_85BASIC()
-        */
-       {0x08, 0xae}, {0x0a, 0x72}, {0x5b, 0x42},
-       {0x84, 0x88}, {0x85, 0x24}, {0x88, 0x54}, {0x8b, 0xb8}, {0x8c, 0x03},
-       {0x8d, 0x40}, {0x8e, 0x00}, {0x8f, 0x00}, {0x5b, 0x18}, {0x91, 0x03},
-       {0x94, 0x0F}, {0x95, 0x32},
-       {0x96, 0x00}, {0x97, 0x07}, {0xb4, 0x22}, {0xdb, 0x00},
-       {0xf0, 0x32}, {0xf1, 0x32}, {0xf2, 0x00}, {0xf3, 0x00}, {0xf4, 0x32},
-       {0xf5, 0x43}, {0xf6, 0x00}, {0xf7, 0x00}, {0xf8, 0x46}, {0xf9, 0xa4},
-       {0xfa, 0x00}, {0xfb, 0x00}, {0xfc, 0x96}, {0xfd, 0xa4}, {0xfe, 0x00},
-       {0xff, 0x00},
-
-       /*
-        * PAGE 1:
-        * For Flextronics system Logo PCIHCT failure:
-        * 0x1C4~0x1CD set no-zero value to avoid PCI configuration
-        * space 0x45[7]=1
-        */
-       {0x5e, 0x01},
-       {0x58, 0x00}, {0x59, 0x00}, {0x5a, 0x04}, {0x5b, 0x00}, {0x60, 0x24},
-       {0x61, 0x97}, {0x62, 0xF0}, {0x63, 0x09}, {0x80, 0x0F}, {0x81, 0xFF},
-       {0x82, 0xFF}, {0x83, 0x03},
-       /* lzm add 080826 */
-       {0xC4, 0x22}, {0xC5, 0x22}, {0xC6, 0x22}, {0xC7, 0x22}, {0xC8, 0x22},
-       /* lzm add 080826 */
-       {0xC9, 0x22}, {0xCA, 0x22}, {0xCB, 0x22}, {0xCC, 0x22}, {0xCD, 0x22},
-       {0xe2, 0x00},
-
-
-       /* PAGE 2: */
-       {0x5e, 0x02},
-       {0x0c, 0x04}, {0x4c, 0x30}, {0x4d, 0x08}, {0x50, 0x05}, {0x51, 0xf5},
-       {0x52, 0x04}, {0x53, 0xa0}, {0x54, 0xff}, {0x55, 0xff}, {0x56, 0xff},
-       {0x57, 0xff}, {0x58, 0x08}, {0x59, 0x08}, {0x5a, 0x08}, {0x5b, 0x08},
-       {0x60, 0x08}, {0x61, 0x08}, {0x62, 0x08}, {0x63, 0x08}, {0x64, 0x2f},
-       {0x8c, 0x3f}, {0x8d, 0x3f}, {0x8e, 0x3f},
-       {0x8f, 0x3f}, {0xc4, 0xff}, {0xc5, 0xff}, {0xc6, 0xff}, {0xc7, 0xff},
-       {0xc8, 0x00}, {0xc9, 0x00}, {0xca, 0x80}, {0xcb, 0x00},
-
-       /* PAGE 0: */
-       {0x5e, 0x00}, {0x9f, 0x03}
-       };
-
-
-static u8  ZEBRA_AGC[] = {
-       0,
-       0x7E, 0x7E, 0x7E, 0x7E, 0x7D, 0x7C, 0x7B, 0x7A, 0x79, 0x78, 0x77, 0x76,
-       0x75, 0x74, 0x73, 0x72, 0x71, 0x70, 0x6F, 0x6E, 0x6D, 0x6C, 0x6B, 0x6A,
-       0x69, 0x68, 0x67, 0x66, 0x65, 0x64, 0x63, 0x62, 0x48, 0x47, 0x46, 0x45,
-       0x44, 0x29, 0x28, 0x27, 0x26, 0x25, 0x24, 0x23, 0x22, 0x21, 0x08, 0x07,
-       0x06, 0x05, 0x04, 0x03, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-       0x00, 0x00, 0x00, 0x00, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f,
-       0x0f, 0x0f, 0x10, 0x11, 0x12, 0x13, 0x15, 0x16, 0x17, 0x17, 0x18, 0x18,
-       0x19, 0x1a, 0x1a, 0x1b, 0x1b, 0x1c, 0x1c, 0x1d, 0x1d, 0x1d, 0x1e, 0x1e,
-       0x1f, 0x1f, 0x1f, 0x20, 0x20, 0x20, 0x20, 0x21, 0x21, 0x21, 0x22, 0x22,
-       0x22, 0x23, 0x23, 0x24, 0x24, 0x25, 0x25, 0x25, 0x26, 0x26, 0x27, 0x27,
-       0x2F, 0x2F, 0x2F, 0x2F, 0x2F, 0x2F, 0x2F, 0x2F
-       };
-
-static u32 ZEBRA_RF_RX_GAIN_TABLE[] = {
-       0x0096, 0x0076, 0x0056, 0x0036, 0x0016, 0x01f6, 0x01d6, 0x01b6,
-       0x0196, 0x0176, 0x00F7, 0x00D7, 0x00B7, 0x0097, 0x0077, 0x0057,
-       0x0037, 0x00FB, 0x00DB, 0x00BB, 0x00FF, 0x00E3, 0x00C3, 0x00A3,
-       0x0083, 0x0063, 0x0043, 0x0023, 0x0003, 0x01E3, 0x01C3, 0x01A3,
-       0x0183, 0x0163, 0x0143, 0x0123, 0x0103
-       };
-
-static u8 OFDM_CONFIG[]        = {
-       /* OFDM reg0x06[7:0]=0xFF: Enable power saving mode in RX */
-       /* OFDM reg0x3C[4]=1'b1: Enable RX power saving mode */
-       /* ofdm 0x3a = 0x7b ,(original : 0xfb) For ECS shielding room TP test */
-       /* 0x00 */
-       0x10, 0x0F, 0x0A, 0x0C, 0x14, 0xFA, 0xFF, 0x50,
-       0x00, 0x50, 0x00, 0x00, 0x00, 0x5C, 0x00, 0x00,
-       /* 0x10 */
-       0x40, 0x00, 0x40, 0x00, 0x00, 0x00, 0xA8, 0x26,
-       0x32, 0x33, 0x06, 0xA5, 0x6F, 0x55, 0xC8, 0xBB,
-       /* 0x20 */
-       0x0A, 0xE1, 0x2C, 0x4A, 0x86, 0x83, 0x34, 0x00,
-       0x4F, 0x24, 0x6F, 0xC2, 0x03, 0x40, 0x80, 0x00,
-       /* 0x30 */
-       0xC0, 0xC1, 0x58, 0xF1, 0x00, 0xC4, 0x90, 0x3e,
-       0xD8, 0x3C, 0x7B, 0x10, 0x10
-       };
-
-       /*---------------------------------------------------------------
-        *      Hardware IO
-        *      the code is ported from Windows source code
-        *---------------------------------------------------------------
-        */
-
-static u8 PlatformIORead1Byte(struct net_device *dev, u32 offset)
-{
-       return read_nic_byte(dev, offset);
-}
-
-static void PlatformIOWrite1Byte(struct net_device *dev, u32 offset, u8 data)
-{
-       write_nic_byte(dev, offset, data);
-       /*
-        * To make sure write operation is completed,
-        * 2005.11.09, by rcnjko.
-        */
-       read_nic_byte(dev, offset);
-}
-
-static void PlatformIOWrite2Byte(struct net_device *dev, u32 offset, u16 data)
-{
-       write_nic_word(dev, offset, data);
-       /*
-        * To make sure write operation is completed,
-        *  2005.11.09, by rcnjko.
-        */
-       read_nic_word(dev, offset);
-}
-
-static void PlatformIOWrite4Byte(struct net_device *dev, u32 offset, u32 data)
-{
-       if (offset == PhyAddr) {
-               /* For Base Band configuration. */
-               unsigned char   cmdByte;
-               unsigned long   dataBytes;
-               unsigned char   idx;
-               u8              u1bTmp;
-
-               cmdByte = (u8)(data & 0x000000ff);
-               dataBytes = data>>8;
-
-               /*
-                *      071010, rcnjko:
-                *      The critical section is only BB read/write race
-                *      condition. Assumption:
-                *      1. We assume NO one will access BB at DIRQL, otherwise,
-                *      system will crash for
-                *      acquiring the spinlock in such context.
-                *      2. PlatformIOWrite4Byte() MUST NOT be recursive.
-                */
-               /* NdisAcquireSpinLock( &(pDevice->IoSpinLock) ); */
-
-               for (idx = 0; idx < 30; idx++) {
-                       /* Make sure command bit is clear before access it. */
-                       u1bTmp = PlatformIORead1Byte(dev, PhyAddr);
-                       if ((u1bTmp & BIT7) == 0)
-                               break;
-                       else
-                               mdelay(10);
-               }
-
-               for (idx = 0; idx < 3; idx++)
-                       PlatformIOWrite1Byte(dev, offset+1+idx,
-                                            ((u8 *)&dataBytes)[idx]);
-
-               write_nic_byte(dev, offset, cmdByte);
-
-               /* NdisReleaseSpinLock( &(pDevice->IoSpinLock) ); */
-       } else {
-               write_nic_dword(dev, offset, data);
-               /*
-                * To make sure write operation is completed, 2005.11.09,
-                *  by rcnjko.
-                */
-               read_nic_dword(dev, offset);
-       }
-}
-
-static void SetOutputEnableOfRfPins(struct net_device *dev)
-{
-       write_nic_word(dev, RFPinsEnable, 0x1bff);
-}
-
-static bool HwHSSIThreeWire(struct net_device *dev,
-                           u8 *pDataBuf,
-                           bool write)
-{
-       u8      TryCnt;
-       u8      u1bTmp;
-
-       /* Check if WE and RE are cleared. */
-       for (TryCnt = 0; TryCnt < TC_3W_POLL_MAX_TRY_CNT; TryCnt++) {
-               u1bTmp = read_nic_byte(dev, SW_3W_CMD1);
-               if ((u1bTmp & (SW_3W_CMD1_RE|SW_3W_CMD1_WE)) == 0)
-                       break;
-
-               udelay(10);
-       }
-       if (TryCnt == TC_3W_POLL_MAX_TRY_CNT) {
-               netdev_err(dev,
-                          "HwThreeWire(): CmdReg: %#X RE|WE bits are not clear!!\n",
-                          u1bTmp);
-       return false;
-       }
-
-       /* RTL8187S HSSI Read/Write Function */
-       u1bTmp = read_nic_byte(dev, RF_SW_CONFIG);
-       u1bTmp |= RF_SW_CFG_SI; /* reg08[1]=1 Serial Interface(SI) */
-       write_nic_byte(dev, RF_SW_CONFIG, u1bTmp);
-
-       /* jong: HW SI read must set reg84[3]=0. */
-       u1bTmp = read_nic_byte(dev, RFPinsSelect);
-       u1bTmp &= ~BIT3;
-       write_nic_byte(dev, RFPinsSelect, u1bTmp);
-       /*  Fill up data buffer for write operation. */
-
-       /* SI - reg274[3:0] : RF register's Address */
-       if (write)
-               write_nic_word(dev, SW_3W_DB0, *((u16 *)pDataBuf));
-       else
-               write_nic_word(dev, SW_3W_DB0, *((u16 *)pDataBuf));
-
-       /* Set up command: WE or RE. */
-       if (write)
-               write_nic_byte(dev, SW_3W_CMD1, SW_3W_CMD1_WE);
-       else
-               write_nic_byte(dev, SW_3W_CMD1, SW_3W_CMD1_RE);
-
-
-       /* Check if DONE is set. */
-       for (TryCnt = 0; TryCnt < TC_3W_POLL_MAX_TRY_CNT; TryCnt++) {
-               u1bTmp = read_nic_byte(dev, SW_3W_CMD1);
-               if (u1bTmp & SW_3W_CMD1_DONE)
-                       break;
-
-               udelay(10);
-       }
-
-       write_nic_byte(dev, SW_3W_CMD1, 0);
-
-       /* Read back data for read operation. */
-       if (!write) {
-               /* Serial Interface : reg363_362[11:0] */
-               *((u16 *)pDataBuf) = read_nic_word(dev, SI_DATA_READ);
-               *((u16 *)pDataBuf) &= 0x0FFF;
-       }
-
-       return true;
-}
-
-void RF_WriteReg(struct net_device *dev, u8 offset, u16 data)
-{
-       u16 reg = (data << 4) | (offset & 0x0f);
-       HwHSSIThreeWire(dev, (u8 *)&reg, true);
-}
-
-u16 RF_ReadReg(struct net_device *dev, u8 offset)
-{
-       u16 reg = offset & 0x0f;
-       HwHSSIThreeWire(dev, (u8 *)&reg, false);
-       return reg;
-}
-
-static u8 ReadBBPortUchar(struct net_device *dev, u32 addr)
-{
-       PlatformIOWrite4Byte(dev, PhyAddr, addr & 0xffffff7f);
-       return PlatformIORead1Byte(dev, PhyDataR);
-}
-
-/* by Owen on 04/07/14 for writing BB register successfully */
-static void WriteBBPortUchar(struct net_device *dev, u32 Data)
-{
-       PlatformIOWrite4Byte(dev, PhyAddr, Data);
-       ReadBBPortUchar(dev, Data);
-}
-
-/*
- *     Description:
- *     Perform Antenna settings with antenna diversity on 87SE.
- *             Created by Roger, 2008.01.25.
- */
-bool SetAntennaConfig87SE(struct net_device *dev,
-                         u8   DefaultAnt, /* 0: Main, 1: Aux. */
-                         bool bAntDiversity) /* 1:Enable, 0: Disable. */
-{
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-       bool   bAntennaSwitched = true;
-       /* 0x00 = disabled, 0x80 = enabled */
-       u8      ant_diversity_offset = 0x00;
-
-       /*
-        * printk("SetAntennaConfig87SE(): DefaultAnt(%d), bAntDiversity(%d)\n",
-        * DefaultAnt, bAntDiversity);
-        */
-
-       /* Threshold for antenna diversity. */
-       write_phy_cck(dev, 0x0c, 0x09); /* Reg0c : 09 */
-
-       if (bAntDiversity)      /*      Enable Antenna Diversity. */
-               ant_diversity_offset = 0x80;
-
-       if (DefaultAnt == 1) { /* aux Antenna */
-               /* Mac register, aux antenna */
-               write_nic_byte(dev, ANTSEL, 0x00);
-
-               /* Config CCK RX antenna. */
-               write_phy_cck(dev, 0x11, 0xbb); /* Reg11 : bb */
-
-               /* Reg01 : 47 | ant_diversity_offset */
-               write_phy_cck(dev, 0x01, 0x47|ant_diversity_offset);
-
-               /* Config OFDM RX antenna. */
-               write_phy_ofdm(dev, 0x0D, 0x54);        /* Reg0d : 54 */
-               /* Reg18 : 32 */
-               write_phy_ofdm(dev, 0x18, 0x32|ant_diversity_offset);
-       } else { /* main Antenna */
-               /* Mac register, main antenna */
-               write_nic_byte(dev, ANTSEL, 0x03);
-
-               /* Config CCK RX antenna.       */
-               write_phy_cck(dev, 0x11, 0x9b); /* Reg11 : 9b */
-               /* Reg01 : 47 */
-               write_phy_cck(dev, 0x01, 0x47|ant_diversity_offset);
-
-               /* Config OFDM RX antenna. */
-               write_phy_ofdm(dev, 0x0D, 0x5c); /* Reg0d : 5c */
-               /*Reg18 : 32 */
-               write_phy_ofdm(dev, 0x18, 0x32|ant_diversity_offset);
-       }
-       priv->CurrAntennaIndex = DefaultAnt; /* Update default settings. */
-       return  bAntennaSwitched;
-}
-/*
- *--------------------------------------------------------------
- *             Hardware Initialization.
- *             the code is ported from Windows source code
- *--------------------------------------------------------------
- */
-
-static void ZEBRA_Config_85BASIC_HardCode(struct net_device *dev)
-{
-
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-       u32                     i;
-       u32     addr, data;
-       u32 u4bRegOffset, u4bRegValue;
-       u16 u4bRF23, u4bRF24;
-       u8                      u1b24E;
-       int d_cut = 0;
-
-
-/*
- *===========================================================================
- *     87S_PCIE :: RADIOCFG.TXT
- *===========================================================================
- */
-
-
-       /* Page1 : reg16-reg30 */
-       RF_WriteReg(dev, 0x00, 0x013f);         mdelay(1); /* switch to page1 */
-       u4bRF23 = RF_ReadReg(dev, 0x08);        mdelay(1);
-       u4bRF24 = RF_ReadReg(dev, 0x09);        mdelay(1);
-
-       if (u4bRF23 == 0x818 && u4bRF24 == 0x70C) {
-               d_cut = 1;
-               netdev_info(dev, "card type changed from C- to D-cut\n");
-       }
-
-       /* Page0 : reg0-reg15 */
-
-       RF_WriteReg(dev, 0x00, 0x009f);         mdelay(1);/* 1  */
-       RF_WriteReg(dev, 0x01, 0x06e0);         mdelay(1);
-       RF_WriteReg(dev, 0x02, 0x004d);         mdelay(1);/* 2  */
-       RF_WriteReg(dev, 0x03, 0x07f1);         mdelay(1);/* 3  */
-       RF_WriteReg(dev, 0x04, 0x0975);         mdelay(1);
-       RF_WriteReg(dev, 0x05, 0x0c72);         mdelay(1);
-       RF_WriteReg(dev, 0x06, 0x0ae6);         mdelay(1);
-       RF_WriteReg(dev, 0x07, 0x00ca);         mdelay(1);
-       RF_WriteReg(dev, 0x08, 0x0e1c);         mdelay(1);
-       RF_WriteReg(dev, 0x09, 0x02f0);         mdelay(1);
-       RF_WriteReg(dev, 0x0a, 0x09d0);         mdelay(1);
-       RF_WriteReg(dev, 0x0b, 0x01ba);         mdelay(1);
-       RF_WriteReg(dev, 0x0c, 0x0640);         mdelay(1);
-       RF_WriteReg(dev, 0x0d, 0x08df);         mdelay(1);
-       RF_WriteReg(dev, 0x0e, 0x0020);         mdelay(1);
-       RF_WriteReg(dev, 0x0f, 0x0990);         mdelay(1);
-
-       /*  Page1 : reg16-reg30 */
-       RF_WriteReg(dev, 0x00, 0x013f);         mdelay(1);
-       RF_WriteReg(dev, 0x03, 0x0806);         mdelay(1);
-       RF_WriteReg(dev, 0x04, 0x03a7);         mdelay(1);
-       RF_WriteReg(dev, 0x05, 0x059b);         mdelay(1);
-       RF_WriteReg(dev, 0x06, 0x0081);         mdelay(1);
-       RF_WriteReg(dev, 0x07, 0x01A0);         mdelay(1);
-/*
- * Don't write RF23/RF24 to make a difference between 87S C cut and D cut.
- * asked by SD3 stevenl.
- */
-       RF_WriteReg(dev, 0x0a, 0x0001);         mdelay(1);
-       RF_WriteReg(dev, 0x0b, 0x0418);         mdelay(1);
-
-       if (d_cut) {
-               RF_WriteReg(dev, 0x0c, 0x0fbe);         mdelay(1);
-               RF_WriteReg(dev, 0x0d, 0x0008);         mdelay(1);
-               /* RX LO buffer */
-               RF_WriteReg(dev, 0x0e, 0x0807);         mdelay(1);
-       } else {
-               RF_WriteReg(dev, 0x0c, 0x0fbe);         mdelay(1);
-               RF_WriteReg(dev, 0x0d, 0x0008);         mdelay(1);
-               /* RX LO buffer */
-               RF_WriteReg(dev, 0x0e, 0x0806);         mdelay(1);
-       }
-
-       RF_WriteReg(dev, 0x0f, 0x0acc);         mdelay(1);
-       RF_WriteReg(dev, 0x00, 0x01d7);         mdelay(1); /* 6 */
-       RF_WriteReg(dev, 0x03, 0x0e00);         mdelay(1);
-       RF_WriteReg(dev, 0x04, 0x0e50);         mdelay(1);
-
-       for (i = 0; i <= 36; i++) {
-               RF_WriteReg(dev, 0x01, i);              mdelay(1);
-               RF_WriteReg(dev, 0x02, ZEBRA_RF_RX_GAIN_TABLE[i]); mdelay(1);
-       }
-
-       RF_WriteReg(dev, 0x05, 0x0203);         mdelay(1); /* 203, 343 */
-       RF_WriteReg(dev, 0x06, 0x0200);         mdelay(1); /* 400 */
-       /* switch to reg16-reg30, and HSSI disable 137 */
-       RF_WriteReg(dev, 0x00, 0x0137);         mdelay(1);
-       mdelay(10); /* Deay 10 ms. */           /* 0xfd */
-
-       /* Z4 synthesizer loop filter setting, 392 */
-       RF_WriteReg(dev, 0x0d, 0x0008);         mdelay(1);
-       mdelay(10); /* Deay 10 ms. */           /* 0xfd */
-
-       /* switch to reg0-reg15, and HSSI disable */
-       RF_WriteReg(dev, 0x00, 0x0037);         mdelay(1);
-       mdelay(10); /* Deay 10 ms. */           /* 0xfd */
-
-       /* CBC on, Tx Rx disable, High gain */
-       RF_WriteReg(dev, 0x04, 0x0160);         mdelay(1);
-       mdelay(10); /* Deay 10 ms. */           /* 0xfd */
-
-       /* Z4 setted channel 1 */
-       RF_WriteReg(dev, 0x07, 0x0080);         mdelay(1);
-       mdelay(10); /* Deay 10 ms. */           /* 0xfd */
-
-       RF_WriteReg(dev, 0x02, 0x088D);         mdelay(1); /* LC calibration */
-       mdelay(200); /* Deay 200 ms. */         /* 0xfd */
-       mdelay(10);  /* Deay 10 ms. */          /* 0xfd */
-       mdelay(10);  /* Deay 10 ms. */          /* 0xfd */
-
-       /* switch to reg16-reg30 137, and HSSI disable 137 */
-       RF_WriteReg(dev, 0x00, 0x0137);         mdelay(1);
-       mdelay(10); /* Deay 10 ms. */           /* 0xfd */
-
-       RF_WriteReg(dev, 0x07, 0x0000);         mdelay(1);
-       RF_WriteReg(dev, 0x07, 0x0180);         mdelay(1);
-       RF_WriteReg(dev, 0x07, 0x0220);         mdelay(1);
-       RF_WriteReg(dev, 0x07, 0x03E0);         mdelay(1);
-
-       /* DAC calibration off 20070702 */
-       RF_WriteReg(dev, 0x06, 0x00c1);         mdelay(1);
-       RF_WriteReg(dev, 0x0a, 0x0001);         mdelay(1);
-       /* For crystal calibration, added by Roger, 2007.12.11. */
-       if (priv->bXtalCalibration) { /* reg 30.        */
-        /*
-         *     enable crystal calibration.
-         *     RF Reg[30], (1)Xin:[12:9], Xout:[8:5],  addr[4:0].
-         *     (2)PA Pwr delay timer[15:14], default: 2.4us,
-         *     set BIT15=0
-         *     (3)RF signal on/off when calibration[13], default: on,
-         *     set BIT13=0.
-         *     So we should minus 4 BITs offset.
-         */
-               RF_WriteReg(dev, 0x0f, (priv->XtalCal_Xin<<5) |
-                           (priv->XtalCal_Xout<<1) | BIT11 | BIT9); mdelay(1);
-               netdev_info(dev, "ZEBRA_Config_85BASIC_HardCode(): (%02x)\n",
-                     (priv->XtalCal_Xin<<5) | (priv->XtalCal_Xout<<1) |
-                      BIT11 | BIT9);
-       } else {
-               /* using default value. Xin=6, Xout=6.  */
-               RF_WriteReg(dev, 0x0f, 0x0acc);         mdelay(1);
-       }
-       /* switch to reg0-reg15, and HSSI enable */
-       RF_WriteReg(dev, 0x00, 0x00bf);         mdelay(1);
-       /* Rx BB start calibration, 00c//+edward */
-       RF_WriteReg(dev, 0x0d, 0x08df);         mdelay(1);
-       /* temperature meter off */
-       RF_WriteReg(dev, 0x02, 0x004d);         mdelay(1);
-       RF_WriteReg(dev, 0x04, 0x0975);         mdelay(1); /* Rx mode */
-       mdelay(10);     /* Deay 10 ms.*/        /* 0xfe */
-       mdelay(10);     /* Deay 10 ms.*/        /* 0xfe */
-       mdelay(10);     /* Deay 10 ms.*/        /* 0xfe */
-       /* Rx mode*/    /*+edward */
-       RF_WriteReg(dev, 0x00, 0x0197);         mdelay(1);
-       /* Rx mode*/    /*+edward */
-       RF_WriteReg(dev, 0x05, 0x05ab);         mdelay(1);
-       /* Rx mode*/    /*+edward */
-       RF_WriteReg(dev, 0x00, 0x009f);         mdelay(1);
-       /* Rx mode*/    /*+edward */
-       RF_WriteReg(dev, 0x01, 0x0000);         mdelay(1);
-       /* Rx mode*/    /*+edward */
-       RF_WriteReg(dev, 0x02, 0x0000);         mdelay(1);
-       /* power save parameters. */
-       u1b24E = read_nic_byte(dev, 0x24E);
-       write_nic_byte(dev, 0x24E, (u1b24E & (~(BIT5|BIT6))));
-
-       /*======================================================================
-        *
-        *======================================================================
-        * CCKCONF.TXT
-        *======================================================================
-        *
-        *      [POWER SAVE] Power Saving Parameters by jong. 2007-11-27
-        *      CCK reg0x00[7]=1'b1 :power saving for TX (default)
-        *      CCK reg0x00[6]=1'b1: power saving for RX (default)
-        *      CCK reg0x06[4]=1'b1: turn off channel estimation related
-        *      circuits if not doing channel estimation.
-        *      CCK reg0x06[3]=1'b1: turn off unused circuits before cca = 1
-        *      CCK reg0x06[2]=1'b1: turn off cck's circuit if macrst =0
-        */
-
-       write_phy_cck(dev, 0x00, 0xc8);
-       write_phy_cck(dev, 0x06, 0x1c);
-       write_phy_cck(dev, 0x10, 0x78);
-       write_phy_cck(dev, 0x2e, 0xd0);
-       write_phy_cck(dev, 0x2f, 0x06);
-       write_phy_cck(dev, 0x01, 0x46);
-
-       /* power control */
-       write_nic_byte(dev, CCK_TXAGC, 0x10);
-       write_nic_byte(dev, OFDM_TXAGC, 0x1B);
-       write_nic_byte(dev, ANTSEL, 0x03);
-
-
-
-       /*
-        *======================================================================
-        *      AGC.txt
-        *======================================================================
-        */
-
-       write_phy_ofdm(dev, 0x00, 0x12);
-
-       for (i = 0; i < 128; i++) {
-
-               data = ZEBRA_AGC[i+1];
-               data = data << 8;
-               data = data | 0x0000008F;
-
-               addr = i + 0x80; /* enable writing AGC table */
-               addr = addr << 8;
-               addr = addr | 0x0000008E;
-
-               WriteBBPortUchar(dev, data);
-               WriteBBPortUchar(dev, addr);
-               WriteBBPortUchar(dev, 0x0000008E);
-       }
-
-       PlatformIOWrite4Byte(dev, PhyAddr, 0x00001080); /* Annie, 2006-05-05 */
-
-       /*
-        *======================================================================
-        *
-        *======================================================================
-        * OFDMCONF.TXT
-        *======================================================================
-        */
-
-       for (i = 0; i < 60; i++) {
-               u4bRegOffset = i;
-               u4bRegValue = OFDM_CONFIG[i];
-
-               WriteBBPortUchar(dev,
-                               (0x00000080 |
-                               (u4bRegOffset & 0x7f) |
-                               ((u4bRegValue & 0xff) << 8)));
-       }
-
-       /*
-        *======================================================================
-        * by amy for antenna
-        *======================================================================
-        */
-       /*
-        * Config Sw/Hw  Combinational Antenna Diversity. Added by Roger,
-        * 2008.02.26.
-        */
-       SetAntennaConfig87SE(dev, priv->bDefaultAntenna1,
-                            priv->bSwAntennaDiverity);
-}
-
-
-void UpdateInitialGain(struct net_device *dev)
-{
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-
-       /* lzm add 080826 */
-       if (priv->eRFPowerState != RF_ON) {
-               /*      Don't access BB/RF under disable PLL situation.
-                *      RT_TRACE(COMP_DIG, DBG_LOUD, ("UpdateInitialGain -
-                *      pHalData->eRFPowerState!=RF_ON\n"));
-                *      Back to the original state
-                */
-               priv->InitialGain = priv->InitialGainBackUp;
-               return;
-       }
-
-       switch (priv->InitialGain) {
-       case 1: /* m861dBm */
-               write_phy_ofdm(dev, 0x17, 0x26);        mdelay(1);
-               write_phy_ofdm(dev, 0x24, 0x86);        mdelay(1);
-               write_phy_ofdm(dev, 0x05, 0xfa);        mdelay(1);
-               break;
-
-       case 2: /* m862dBm */
-               write_phy_ofdm(dev, 0x17, 0x36);        mdelay(1);
-               write_phy_ofdm(dev, 0x24, 0x86);        mdelay(1);
-               write_phy_ofdm(dev, 0x05, 0xfa);        mdelay(1);
-               break;
-
-       case 3: /* m863dBm */
-               write_phy_ofdm(dev, 0x17, 0x36);        mdelay(1);
-               write_phy_ofdm(dev, 0x24, 0x86);        mdelay(1);
-               write_phy_ofdm(dev, 0x05, 0xfb);        mdelay(1);
-               break;
-
-       case 4: /* m864dBm */
-               write_phy_ofdm(dev, 0x17, 0x46);        mdelay(1);
-               write_phy_ofdm(dev, 0x24, 0x86);        mdelay(1);
-               write_phy_ofdm(dev, 0x05, 0xfb);        mdelay(1);
-               break;
-
-       case 5: /* m82dBm */
-               write_phy_ofdm(dev, 0x17, 0x46);        mdelay(1);
-               write_phy_ofdm(dev, 0x24, 0x96);        mdelay(1);
-               write_phy_ofdm(dev, 0x05, 0xfb);        mdelay(1);
-               break;
-
-       case 6: /* m78dBm */
-               write_phy_ofdm(dev, 0x17, 0x56);        mdelay(1);
-               write_phy_ofdm(dev, 0x24, 0x96);        mdelay(1);
-               write_phy_ofdm(dev, 0x05, 0xfc);        mdelay(1);
-               break;
-
-       case 7: /* m74dBm */
-               write_phy_ofdm(dev, 0x17, 0x56);        mdelay(1);
-               write_phy_ofdm(dev, 0x24, 0xa6);        mdelay(1);
-               write_phy_ofdm(dev, 0x05, 0xfc);        mdelay(1);
-               break;
-
-       case 8:
-               write_phy_ofdm(dev, 0x17, 0x66);        mdelay(1);
-               write_phy_ofdm(dev, 0x24, 0xb6);        mdelay(1);
-               write_phy_ofdm(dev, 0x05, 0xfc);        mdelay(1);
-               break;
-
-       default: /* MP */
-               write_phy_ofdm(dev, 0x17, 0x26);        mdelay(1);
-               write_phy_ofdm(dev, 0x24, 0x86);        mdelay(1);
-               write_phy_ofdm(dev, 0x05, 0xfa);        mdelay(1);
-               break;
-       }
-}
-/*
- *     Description:
- *             Tx Power tracking mechanism routine on 87SE.
- *     Created by Roger, 2007.12.11.
- */
-static void InitTxPwrTracking87SE(struct net_device *dev)
-{
-       u32     u4bRfReg;
-
-       u4bRfReg = RF_ReadReg(dev, 0x02);
-
-       /* Enable Thermal meter indication.     */
-       RF_WriteReg(dev, 0x02, u4bRfReg|PWR_METER_EN);          mdelay(1);
-}
-
-static void PhyConfig8185(struct net_device *dev)
-{
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-               write_nic_dword(dev, RCR, priv->ReceiveConfig);
-          priv->RFProgType = read_nic_byte(dev, CONFIG4) & 0x03;
-       /*  RF config */
-       ZEBRA_Config_85BASIC_HardCode(dev);
-       /* Set default initial gain state to 4, approved by SD3 DZ, by Bruce,
-        * 2007-06-06.
-        */
-       if (priv->bDigMechanism) {
-               if (priv->InitialGain == 0)
-                       priv->InitialGain = 4;
-       }
-
-       /*
-        *      Enable thermal meter indication to implement TxPower tracking
-        *      on 87SE. We initialize thermal meter here to avoid unsuccessful
-        *      configuration. Added by Roger, 2007.12.11.
-        */
-       if (priv->bTxPowerTrack)
-               InitTxPwrTracking87SE(dev);
-
-       priv->InitialGainBackUp = priv->InitialGain;
-       UpdateInitialGain(dev);
-
-       return;
-}
-
-static void HwConfigureRTL8185(struct net_device *dev)
-{
-       /*
-        * RTL8185_TODO: Determine Retrylimit, TxAGC,
-        * AutoRateFallback control.
-        */
-       u8 bUNIVERSAL_CONTROL_RL = 0;
-       u8 bUNIVERSAL_CONTROL_AGC = 1;
-       u8 bUNIVERSAL_CONTROL_ANT = 1;
-       u8 bAUTO_RATE_FALLBACK_CTL = 1;
-       u8 val8;
-       write_nic_word(dev, BRSR, 0x0fff);
-       /* Retry limit */
-       val8 = read_nic_byte(dev, CW_CONF);
-
-       if (bUNIVERSAL_CONTROL_RL)
-               val8 = val8 & 0xfd;
-       else
-               val8 = val8 | 0x02;
-
-       write_nic_byte(dev, CW_CONF, val8);
-
-       /* Tx AGC */
-       val8 = read_nic_byte(dev, TXAGC_CTL);
-       if (bUNIVERSAL_CONTROL_AGC) {
-               write_nic_byte(dev, CCK_TXAGC, 128);
-               write_nic_byte(dev, OFDM_TXAGC, 128);
-               val8 = val8 & 0xfe;
-       } else {
-               val8 = val8 | 0x01;
-       }
-
-
-       write_nic_byte(dev, TXAGC_CTL, val8);
-
-       /* Tx Antenna including Feedback control */
-       val8 = read_nic_byte(dev, TXAGC_CTL);
-
-       if (bUNIVERSAL_CONTROL_ANT) {
-               write_nic_byte(dev, ANTSEL, 0x00);
-               val8 = val8 & 0xfd;
-       } else {
-               val8 = val8 & (val8|0x02); /* xiong-2006-11-15 */
-       }
-
-       write_nic_byte(dev, TXAGC_CTL, val8);
-
-       /* Auto Rate fallback control   */
-       val8 = read_nic_byte(dev, RATE_FALLBACK);
-       val8 &= 0x7c;
-       if (bAUTO_RATE_FALLBACK_CTL) {
-               val8 |= RATE_FALLBACK_CTL_ENABLE | RATE_FALLBACK_CTL_AUTO_STEP1;
-
-               /* <RJ_TODO_8185B> We shall set up the ARFR according
-                * to user's setting.
-                */
-               PlatformIOWrite2Byte(dev, ARFR, 0x0fff); /* set 1M ~ 54Mbps. */
-       }
-       write_nic_byte(dev, RATE_FALLBACK, val8);
-}
-
-static void MacConfig_85BASIC_HardCode(struct net_device *dev)
-{
-       /*
-        *======================================================================
-        * MACREG.TXT
-        *======================================================================
-        */
-       int nLinesRead = 0;
-       u32 u4bRegOffset, u4bRegValue, u4bPageIndex = 0;
-       int i;
-
-       nLinesRead = sizeof(MAC_REG_TABLE)/2;
-
-       for (i = 0; i < nLinesRead; i++) { /* nLinesRead=101 */
-               u4bRegOffset = MAC_REG_TABLE[i][0];
-               u4bRegValue = MAC_REG_TABLE[i][1];
-
-                               if (u4bRegOffset == 0x5e)
-                                       u4bPageIndex = u4bRegValue;
-                               else
-                                       u4bRegOffset |= (u4bPageIndex << 8);
-
-               write_nic_byte(dev, u4bRegOffset, (u8)u4bRegValue);
-       }
-       /* ================================================================= */
-}
-
-static void MacConfig_85BASIC(struct net_device *dev)
-{
-
-       u8                      u1DA;
-       MacConfig_85BASIC_HardCode(dev);
-
-       /* ================================================================= */
-
-       /* Follow TID_AC_MAP of WMac. */
-       write_nic_word(dev, TID_AC_MAP, 0xfa50);
-
-       /* Interrupt Migration, Jong suggested we use set 0x0000 first,
-        * 2005.12.14, by rcnjko.
-        */
-       write_nic_word(dev, IntMig, 0x0000);
-
-       /* Prevent TPC to cause CRC error. Added by Annie, 2006-06-10. */
-       PlatformIOWrite4Byte(dev, 0x1F0, 0x00000000);
-       PlatformIOWrite4Byte(dev, 0x1F4, 0x00000000);
-       PlatformIOWrite1Byte(dev, 0x1F8, 0x00);
-
-       /* Asked for by SD3 CM Lin, 2006.06.27, by rcnjko. */
-
-       /*
-        *  power save parameter based on
-        * "87SE power save parameters 20071127.doc", as follow.
-        */
-
-       /* Enable DA10 TX power saving */
-       u1DA = read_nic_byte(dev, PHYPR);
-       write_nic_byte(dev, PHYPR, (u1DA | BIT2));
-
-       /* POWER: */
-       write_nic_word(dev, 0x360, 0x1000);
-       write_nic_word(dev, 0x362, 0x1000);
-
-       /* AFE. */
-       write_nic_word(dev, 0x370, 0x0560);
-       write_nic_word(dev, 0x372, 0x0560);
-       write_nic_word(dev, 0x374, 0x0DA4);
-       write_nic_word(dev, 0x376, 0x0DA4);
-       write_nic_word(dev, 0x378, 0x0560);
-       write_nic_word(dev, 0x37A, 0x0560);
-       write_nic_word(dev, 0x37C, 0x00EC);
-       write_nic_word(dev, 0x37E, 0x00EC); /* +edward */
-       write_nic_byte(dev, 0x24E, 0x01);
-}
-
-static u8 GetSupportedWirelessMode8185(struct net_device *dev)
-{
-       return WIRELESS_MODE_B | WIRELESS_MODE_G;
-}
-
-static void
-ActUpdateChannelAccessSetting(struct net_device *dev,
-                             enum wireless_mode mode,
-                             struct chnl_access_setting *chnl_access_setting)
-{
-       AC_CODING       eACI;
-
-       /*
-        *      <RJ_TODO_8185B>
-        *      TODO: We still don't know how to set up these registers,
-        *      just follow WMAC to verify 8185B FPAG.
-        *
-        *      <RJ_TODO_8185B>
-        *      Jong said CWmin/CWmax register are not functional in 8185B,
-        *      so we shall fill channel access realted register into AC
-        *      parameter registers,
-        *      even in nQBss.
-        */
-
-       /* Suggested by Jong, 2005.12.08. */
-       chnl_access_setting->sifs_timer = 0x22;
-       chnl_access_setting->difs_timer = 0x1C; /* 2006.06.02, by rcnjko. */
-       chnl_access_setting->slot_time_timer = 9; /* 2006.06.02, by rcnjko. */
-       /*
-        * Suggested by wcchu, it is the default value of EIFS register,
-        * 2005.12.08.
-        */
-       chnl_access_setting->eifs_timer = 0x5B;
-       chnl_access_setting->cwmin_index = 3; /* 2006.06.02, by rcnjko. */
-       chnl_access_setting->cwmax_index = 7; /* 2006.06.02, by rcnjko. */
-
-       write_nic_byte(dev, SIFS, chnl_access_setting->sifs_timer);
-       /*
-        * Rewrited from directly use PlatformEFIOWrite1Byte(),
-        * by Annie, 2006-03-29.
-        */
-       write_nic_byte(dev, SLOT, chnl_access_setting->slot_time_timer);
-
-       write_nic_byte(dev, EIFS, chnl_access_setting->eifs_timer);
-
-       /*
-        * <RJ_EXPR_QOS> Suggested by wcchu, it is the default value of EIFS
-        * register, 2005.12.08.
-        */
-       write_nic_byte(dev, AckTimeOutReg, 0x5B);
-
-       for (eACI = 0; eACI < AC_MAX; eACI++)
-               write_nic_byte(dev, ACM_CONTROL, 0);
-}
-
-static void ActSetWirelessMode8185(struct net_device *dev, u8 btWirelessMode)
-{
-       struct  r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-       struct  ieee80211_device *ieee = priv->ieee80211;
-       u8      btSupportedWirelessMode = GetSupportedWirelessMode8185(dev);
-
-       if ((btWirelessMode & btSupportedWirelessMode) == 0)    {
-               /*
-                * Don't switch to unsupported wireless mode, 2006.02.15,
-                * by rcnjko.
-                */
-               DMESGW("ActSetWirelessMode8185(): WirelessMode(%d) is not supported (%d)!\n",
-                       btWirelessMode, btSupportedWirelessMode);
-               return;
-       }
-
-       /* 1. Assign wireless mode to switch if necessary. */
-       if (btWirelessMode == WIRELESS_MODE_AUTO) {
-               if ((btSupportedWirelessMode & WIRELESS_MODE_A)) {
-                       btWirelessMode = WIRELESS_MODE_A;
-               } else if (btSupportedWirelessMode & WIRELESS_MODE_G) {
-                               btWirelessMode = WIRELESS_MODE_G;
-
-               } else if ((btSupportedWirelessMode & WIRELESS_MODE_B)) {
-                               btWirelessMode = WIRELESS_MODE_B;
-               } else {
-                       DMESGW("ActSetWirelessMode8185(): No valid wireless mode supported, btSupportedWirelessMode(%x)!!!\n",
-                              btSupportedWirelessMode);
-                       btWirelessMode = WIRELESS_MODE_B;
-               }
-       }
-
-       /*
-        * 2. Swtich band: RF or BB specific actions,
-        * for example, refresh tables in omc8255, or change initial gain if
-        * necessary. Nothing to do for Zebra to switch band. Update current
-        * wireless mode if we switch to specified band successfully.
-        */
-
-       ieee->mode = (enum wireless_mode)btWirelessMode;
-
-       /* 3. Change related setting. */
-       if (ieee->mode == WIRELESS_MODE_A)
-               DMESG("WIRELESS_MODE_A\n");
-       else if (ieee->mode == WIRELESS_MODE_B)
-               DMESG("WIRELESS_MODE_B\n");
-       else if (ieee->mode == WIRELESS_MODE_G)
-               DMESG("WIRELESS_MODE_G\n");
-
-       ActUpdateChannelAccessSetting(dev, ieee->mode,
-                                     &priv->ChannelAccessSetting);
-}
-
-void rtl8185b_irq_enable(struct net_device *dev)
-{
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-
-       priv->irq_enabled = 1;
-       write_nic_dword(dev, IMR, priv->IntrMask);
-}
-
-static void MgntDisconnectIBSS(struct net_device *dev)
-{
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-       u8 i;
-
-       for (i = 0; i < 6; i++)
-               priv->ieee80211->current_network.bssid[i] = 0x55;
-
-
-
-       priv->ieee80211->state = IEEE80211_NOLINK;
-       /*
-        *      Stop Beacon.
-        *
-        *      Vista add a Adhoc profile, HW radio off until
-        *      OID_DOT11_RESET_REQUEST Driver would set MSR=NO_LINK,
-        *      then HW Radio ON, MgntQueue Stuck. Because Bcn DMA isn't
-        *      complete, mgnt queue would stuck until Bcn packet send.
-        *
-        *      Disable Beacon Queue Own bit, suggested by jong
-        */
-       ieee80211_stop_send_beacons(priv->ieee80211);
-
-       priv->ieee80211->link_change(dev);
-       notify_wx_assoc_event(priv->ieee80211);
-}
-
-static void MlmeDisassociateRequest(struct net_device *dev, u8 *asSta, u8 asRsn)
-{
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-       u8 i;
-
-       SendDisassociation(priv->ieee80211, asSta, asRsn);
-
-       if (memcmp(priv->ieee80211->current_network.bssid, asSta, 6) == 0) {
-               /* ShuChen TODO: change media status. */
-
-               for (i = 0; i < 6; i++)
-                       priv->ieee80211->current_network.bssid[i] = 0x22;
-
-               ieee80211_disassociate(priv->ieee80211);
-       }
-}
-
-static void MgntDisconnectAP(struct net_device *dev, u8 asRsn)
-{
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-
-       /*
-        * Commented out by rcnjko, 2005.01.27:
-        * I move SecClearAllKeys() to MgntActSet_802_11_DISASSOCIATE().
-        *
-        *      2004/09/15, kcwu, the key should be cleared, or the new
-        *      handshaking will not success
-        *
-        *      In WPA WPA2 need to Clear all key ... because new key will set
-        *      after new handshaking. 2004.10.11, by rcnjko.
-        */
-       MlmeDisassociateRequest(dev, priv->ieee80211->current_network.bssid,
-                               asRsn);
-
-       priv->ieee80211->state = IEEE80211_NOLINK;
-}
-
-static bool MgntDisconnect(struct net_device *dev, u8 asRsn)
-{
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-       /*
-        *      Schedule an workitem to wake up for ps mode, 070109, by rcnjko.
-        */
-
-       if (IS_DOT11D_ENABLE(priv->ieee80211))
-               Dot11d_Reset(priv->ieee80211);
-       /* In adhoc mode, update beacon frame. */
-       if (priv->ieee80211->state == IEEE80211_LINKED) {
-               if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
-                       MgntDisconnectIBSS(dev);
-
-               if (priv->ieee80211->iw_mode == IW_MODE_INFRA) {
-                       /*
-                        *      We clear key here instead of MgntDisconnectAP()
-                        *      because that MgntActSet_802_11_DISASSOCIATE()
-                        *      is an interface called by OS, e.g.
-                        *      OID_802_11_DISASSOCIATE in Windows while as
-                        *      MgntDisconnectAP() is used to handle
-                        *      disassociation related things to AP, e.g. send
-                        *      Disassoc frame to AP.  2005.01.27, by rcnjko.
-                        */
-                       MgntDisconnectAP(dev, asRsn);
-               }
-               /* Indicate Disconnect, 2005.02.23, by rcnjko.  */
-       }
-       return true;
-}
-/*
- *     Description:
- *             Chang RF Power State.
- *             Note that, only MgntActSet_RF_State() is allowed to set
- *             HW_VAR_RF_STATE.
- *
- *     Assumption:
- *             PASSIVE LEVEL.
- */
-static bool SetRFPowerState(struct net_device *dev,
-                           enum rt_rf_power_state eRFPowerState)
-{
-       struct  r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-       bool    bResult = false;
-
-       if (eRFPowerState == priv->eRFPowerState)
-               return bResult;
-
-       bResult = SetZebraRFPowerState8185(dev, eRFPowerState);
-
-       return bResult;
-}
-
-bool MgntActSet_RF_State(struct net_device *dev, enum rt_rf_power_state StateToSet,
-                        u32 ChangeSource)
-{
-       struct  r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-       bool    bActionAllowed = false;
-       bool    bConnectBySSID = false;
-       enum rt_rf_power_state rtState;
-       u16     RFWaitCounter = 0;
-       unsigned long flag;
-       /*
-        *      Prevent the race condition of RF state change. By Bruce,
-        *      2007-11-28. Only one thread can change the RF state at one time,
-        *      and others should wait to be executed.
-        */
-       while (true) {
-               spin_lock_irqsave(&priv->rf_ps_lock, flag);
-               if (priv->RFChangeInProgress) {
-                       spin_unlock_irqrestore(&priv->rf_ps_lock, flag);
-                       /*  Set RF after the previous action is done.   */
-                       while (priv->RFChangeInProgress) {
-                               RFWaitCounter++;
-                               udelay(1000); /* 1 ms   */
-
-                               /*
-                                *      Wait too long, return FALSE to avoid
-                                *      to be stuck here.
-                                */
-                               if (RFWaitCounter > 1000) { /* 1sec */
-                                       netdev_info(dev, "MgntActSet_RF_State(): Wait too long to set RF\n");
-                                       /* TODO: Reset RF state? */
-                                       return false;
-                               }
-                       }
-               } else {
-                       priv->RFChangeInProgress = true;
-                       spin_unlock_irqrestore(&priv->rf_ps_lock, flag);
-                       break;
-               }
-       }
-       rtState = priv->eRFPowerState;
-
-       switch (StateToSet) {
-       case RF_ON:
-               /*
-                *      Turn On RF no matter the IPS setting because we need to
-                *      update the RF state to Ndis under Vista, or the Windows
-                *      does not allow the driver to perform site survey any
-                *      more. By Bruce, 2007-10-02.
-                */
-               priv->RfOffReason &= (~ChangeSource);
-
-               if (!priv->RfOffReason) {
-                       priv->RfOffReason = 0;
-                       bActionAllowed = true;
-
-                       if (rtState == RF_OFF &&
-                           ChangeSource >= RF_CHANGE_BY_HW)
-                               bConnectBySSID = true;
-               }
-               break;
-
-       case RF_OFF:
-                /* 070125, rcnjko: we always keep connected in AP mode. */
-
-               if (priv->RfOffReason > RF_CHANGE_BY_IPS) {
-                       /*
-                        *      060808, Annie:
-                        *      Disconnect to current BSS when radio off.
-                        *      Asked by QuanTa.
-                        *
-                        *      Calling MgntDisconnect() instead of
-                        *      MgntActSet_802_11_DISASSOCIATE(), because
-                        *      we do NOT need to set ssid to dummy ones.
-                        */
-                       MgntDisconnect(dev, disas_lv_ss);
-                       /*
-                        *      Clear content of bssDesc[] and bssDesc4Query[]
-                        *      to avoid reporting old bss to UI.
-                        */
-               }
-
-               priv->RfOffReason |= ChangeSource;
-               bActionAllowed = true;
-               break;
-       case RF_SLEEP:
-               priv->RfOffReason |= ChangeSource;
-               bActionAllowed = true;
-               break;
-       default:
-               break;
-       }
-
-       if (bActionAllowed) {
-               /* Config HW to the specified mode. */
-               SetRFPowerState(dev, StateToSet);
-       }
-
-       /* Release RF spinlock  */
-       spin_lock_irqsave(&priv->rf_ps_lock, flag);
-       priv->RFChangeInProgress = false;
-       spin_unlock_irqrestore(&priv->rf_ps_lock, flag);
-       return bActionAllowed;
-}
-
-static void InactivePowerSave(struct net_device *dev)
-{
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-       /*
-        *      This flag "bSwRfProcessing", indicates the status of IPS
-        *      procedure, should be set if the IPS workitem is really
-        *      scheduled. The old code, sets this flag before scheduling the
-        *      IPS workitem and however, at the same time the previous IPS
-        *      workitem did not end yet, fails to schedule the current
-        *      workitem. Thus, bSwRfProcessing blocks the IPS procedure of
-        *      switching RF.
-        */
-       priv->bSwRfProcessing = true;
-
-       MgntActSet_RF_State(dev, priv->eInactivePowerState, RF_CHANGE_BY_IPS);
-
-       /*
-        *      To solve CAM values miss in RF OFF, rewrite CAM values after
-        *      RF ON. By Bruce, 2007-09-20.
-        */
-
-       priv->bSwRfProcessing = false;
-}
-
-/*
- *     Description:
- *             Enter the inactive power save mode. RF will be off
- */
-void IPSEnter(struct net_device *dev)
-{
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-       enum rt_rf_power_state rtState;
-       if (priv->bInactivePs) {
-               rtState = priv->eRFPowerState;
-
-               /*
-                *      Do not enter IPS in the following conditions:
-                *      (1) RF is already OFF or
-                *      Sleep (2) bSwRfProcessing (indicates the IPS is still
-                *      under going) (3) Connected (only disconnected can
-                *      trigger IPS)(4) IBSS (send Beacon)
-                *      (5) AP mode (send Beacon)
-                */
-               if (rtState == RF_ON && !priv->bSwRfProcessing
-                       && (priv->ieee80211->state != IEEE80211_LINKED)) {
-                       priv->eInactivePowerState = RF_OFF;
-                       InactivePowerSave(dev);
-               }
-       }
-}
-void IPSLeave(struct net_device *dev)
-{
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-       enum rt_rf_power_state rtState;
-       if (priv->bInactivePs) {
-               rtState = priv->eRFPowerState;
-               if ((rtState == RF_OFF || rtState == RF_SLEEP) &&
-                   !priv->bSwRfProcessing
-                   && priv->RfOffReason <= RF_CHANGE_BY_IPS) {
-                       priv->eInactivePowerState = RF_ON;
-                       InactivePowerSave(dev);
-               }
-       }
-}
-
-void rtl8185b_adapter_start(struct net_device *dev)
-{
-       struct r8180_priv *priv = ieee80211_priv(dev);
-       struct ieee80211_device *ieee = priv->ieee80211;
-
-       u8 SupportedWirelessMode;
-       u8 InitWirelessMode;
-       u8 bInvalidWirelessMode = 0;
-       u8 tmpu8;
-       u8 btCR9346;
-       u8 TmpU1b;
-       u8 btPSR;
-
-       write_nic_byte(dev, 0x24e, (BIT5|BIT6|BIT0));
-       rtl8180_reset(dev);
-
-       priv->dma_poll_mask = 0;
-       priv->dma_poll_stop_mask = 0;
-
-       HwConfigureRTL8185(dev);
-       write_nic_dword(dev, MAC0, ((u32 *)dev->dev_addr)[0]);
-       write_nic_word(dev, MAC4, ((u32 *)dev->dev_addr)[1] & 0xffff);
-       /* default network type to 'No Link' */
-       write_nic_byte(dev, MSR, read_nic_byte(dev, MSR) & 0xf3);
-       write_nic_word(dev, BcnItv, 100);
-       write_nic_word(dev, AtimWnd, 2);
-       PlatformIOWrite2Byte(dev, FEMR, 0xFFFF);
-       write_nic_byte(dev, WPA_CONFIG, 0);
-       MacConfig_85BASIC(dev);
-       /* Override the RFSW_CTRL (MAC offset 0x272-0x273), 2006.06.07,
-        * by rcnjko.
-        */
-       /* BT_DEMO_BOARD type */
-       PlatformIOWrite2Byte(dev, RFSW_CTRL, 0x569a);
-
-       /*
-        *---------------------------------------------------------------------
-        *      Set up PHY related.
-        *---------------------------------------------------------------------
-        */
-       /* Enable Config3.PARAM_En to revise AnaaParm. */
-       write_nic_byte(dev, CR9346, 0xc0); /* enable config register write */
-       tmpu8 = read_nic_byte(dev, CONFIG3);
-       write_nic_byte(dev, CONFIG3, (tmpu8 | CONFIG3_PARM_En));
-       /* Turn on Analog power. */
-       /* Asked for by William, otherwise, MAC 3-wire can't work,
-        * 2006.06.27, by rcnjko.
-        */
-       write_nic_dword(dev, ANAPARAM2, ANAPARM2_ASIC_ON);
-       write_nic_dword(dev, ANAPARAM, ANAPARM_ASIC_ON);
-       write_nic_word(dev, ANAPARAM3, 0x0010);
-
-       write_nic_byte(dev, CONFIG3, tmpu8);
-       write_nic_byte(dev, CR9346, 0x00);
-       /* enable EEM0 and EEM1 in 9346CR */
-       btCR9346 = read_nic_byte(dev, CR9346);
-       write_nic_byte(dev, CR9346, (btCR9346 | 0xC0));
-
-       /* B cut use LED1 to control HW RF on/off */
-       TmpU1b = read_nic_byte(dev, CONFIG5);
-       TmpU1b = TmpU1b & ~BIT3;
-       write_nic_byte(dev, CONFIG5, TmpU1b);
-
-       /* disable EEM0 and EEM1 in 9346CR */
-       btCR9346 &= ~(0xC0);
-       write_nic_byte(dev, CR9346, btCR9346);
-
-       /* Enable Led (suggested by Jong) */
-       /* B-cut RF Radio on/off  5e[3]=0 */
-       btPSR = read_nic_byte(dev, PSR);
-       write_nic_byte(dev, PSR, (btPSR | BIT3));
-       /* setup initial timing for RFE. */
-       write_nic_word(dev, RFPinsOutput, 0x0480);
-       SetOutputEnableOfRfPins(dev);
-       write_nic_word(dev, RFPinsSelect, 0x2488);
-
-       /* PHY config. */
-       PhyConfig8185(dev);
-
-       /*
-        *      We assume RegWirelessMode has already been initialized before,
-        *      however, we has to validate the wireless mode here and provide a
-        *      reasonable initialized value if necessary. 2005.01.13,
-        *      by rcnjko.
-        */
-       SupportedWirelessMode = GetSupportedWirelessMode8185(dev);
-       if ((ieee->mode != WIRELESS_MODE_B) &&
-               (ieee->mode != WIRELESS_MODE_G) &&
-               (ieee->mode != WIRELESS_MODE_A) &&
-               (ieee->mode != WIRELESS_MODE_AUTO)) {
-               /* It should be one of B, G, A, or AUTO. */
-               bInvalidWirelessMode = 1;
-       } else {
-       /* One of B, G, A, or AUTO. */
-               /* Check if the wireless mode is supported by RF. */
-               if      ((ieee->mode != WIRELESS_MODE_AUTO) &&
-                       (ieee->mode & SupportedWirelessMode) == 0) {
-                       bInvalidWirelessMode = 1;
-               }
-       }
-
-       if (bInvalidWirelessMode || ieee->mode == WIRELESS_MODE_AUTO) {
-               /* Auto or other invalid value. */
-               /* Assigne a wireless mode to initialize. */
-               if ((SupportedWirelessMode & WIRELESS_MODE_A)) {
-                       InitWirelessMode = WIRELESS_MODE_A;
-               } else if ((SupportedWirelessMode & WIRELESS_MODE_G)) {
-                       InitWirelessMode = WIRELESS_MODE_G;
-               } else if ((SupportedWirelessMode & WIRELESS_MODE_B)) {
-                       InitWirelessMode = WIRELESS_MODE_B;
-               } else {
-                       DMESGW("InitializeAdapter8185(): No valid wireless mode supported, SupportedWirelessMode(%x)!!!\n",
-                                SupportedWirelessMode);
-                       InitWirelessMode = WIRELESS_MODE_B;
-               }
-
-               /* Initialize RegWirelessMode if it is not a valid one. */
-               if (bInvalidWirelessMode)
-                       ieee->mode = (enum wireless_mode)InitWirelessMode;
-
-       } else {
-       /* One of B, G, A. */
-               InitWirelessMode = ieee->mode;
-       }
-       priv->eRFPowerState = RF_OFF;
-       priv->RfOffReason = 0;
-       {
-               MgntActSet_RF_State(dev, RF_ON, 0);
-       }
-               /*
-                * If inactive power mode is enabled, disable rf while in
-                * disconnected state.
-                */
-       if (priv->bInactivePs)
-               MgntActSet_RF_State(dev , RF_OFF, RF_CHANGE_BY_IPS);
-
-       ActSetWirelessMode8185(dev, (u8)(InitWirelessMode));
-
-       /* ----------------------------------------------------------------- */
-
-       rtl8185b_irq_enable(dev);
-
-       netif_start_queue(dev);
-}
-
-void rtl8185b_rx_enable(struct net_device *dev)
-{
-       u8 cmd;
-       /* for now we accept data, management & ctl frame*/
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-
-
-       if (dev->flags & IFF_PROMISC)
-               DMESG("NIC in promisc mode");
-
-       if (priv->ieee80211->iw_mode == IW_MODE_MONITOR || dev->flags &
-           IFF_PROMISC) {
-               priv->ReceiveConfig = priv->ReceiveConfig & (~RCR_APM);
-               priv->ReceiveConfig = priv->ReceiveConfig | RCR_AAP;
-       }
-
-       if (priv->ieee80211->iw_mode == IW_MODE_MONITOR)
-               priv->ReceiveConfig = priv->ReceiveConfig | RCR_ACF |
-                                     RCR_APWRMGT | RCR_AICV;
-
-
-       if (priv->crcmon == 1 && priv->ieee80211->iw_mode == IW_MODE_MONITOR)
-               priv->ReceiveConfig = priv->ReceiveConfig | RCR_ACRC32;
-
-       write_nic_dword(dev, RCR, priv->ReceiveConfig);
-
-       fix_rx_fifo(dev);
-
-       cmd = read_nic_byte(dev, CMD);
-       write_nic_byte(dev, CMD, cmd | (1<<CMD_RX_ENABLE_SHIFT));
-
-}
-
-void rtl8185b_tx_enable(struct net_device *dev)
-{
-       u8 cmd;
-       u8 byte;
-       struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
-
-       write_nic_dword(dev, TCR, priv->TransmitConfig);
-       byte = read_nic_byte(dev, MSR);
-       byte |= MSR_LINK_ENEDCA;
-       write_nic_byte(dev, MSR, byte);
-
-       fix_tx_fifo(dev);
-
-       cmd = read_nic_byte(dev, CMD);
-       write_nic_byte(dev, CMD, cmd | (1<<CMD_TX_ENABLE_SHIFT));
-}
-
index 636ec553ae83680cc4daea367bca0b13d5fbc506..e305d43ebd0656210d111403ad1ef5ab7a818f87 100644 (file)
@@ -545,20 +545,18 @@ static struct recv_frame *decryptor(struct adapter *padapter,
 static struct recv_frame *portctrl(struct adapter *adapter,
                                   struct recv_frame *precv_frame)
 {
-       u8   *psta_addr = NULL, *ptr;
+       u8   *psta_addr, *ptr;
        uint  auth_alg;
        struct recv_frame *pfhdr;
        struct sta_info *psta;
        struct sta_priv *pstapriv;
        struct recv_frame *prtnframe;
-       u16     ether_type = 0;
+       u16     ether_type;
        u16  eapol_type = 0x888e;/* for Funia BD's WPA issue */
        struct rx_pkt_attrib *pattrib;
-       __be16 be_tmp;
 
 
        pstapriv = &adapter->stapriv;
-       psta = rtw_get_stainfo(pstapriv, psta_addr);
 
        auth_alg = adapter->securitypriv.dot11AuthAlgrthm;
 
@@ -566,24 +564,23 @@ static struct recv_frame *portctrl(struct adapter *adapter,
        pfhdr = precv_frame;
        pattrib = &pfhdr->attrib;
        psta_addr = pattrib->ta;
+       psta = rtw_get_stainfo(pstapriv, psta_addr);
 
        prtnframe = NULL;
 
        RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, ("########portctrl:adapter->securitypriv.dot11AuthAlgrthm=%d\n", adapter->securitypriv.dot11AuthAlgrthm));
 
        if (auth_alg == 2) {
+               /* get ether_type */
+               ptr = ptr + pfhdr->attrib.hdrlen + LLC_HEADER_SIZE;
+               memcpy(&ether_type, ptr, 2);
+               ether_type = ntohs((unsigned short)ether_type);
+
                if ((psta != NULL) && (psta->ieee8021x_blocked)) {
                        /* blocked */
                        /* only accept EAPOL frame */
                        RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, ("########portctrl:psta->ieee8021x_blocked==1\n"));
 
-                       prtnframe = precv_frame;
-
-                       /* get ether_type */
-                       ptr = ptr+pfhdr->attrib.hdrlen+pfhdr->attrib.iv_len+LLC_HEADER_SIZE;
-                       memcpy(&be_tmp, ptr, 2);
-                       ether_type = ntohs(be_tmp);
-
                        if (ether_type == eapol_type) {
                                prtnframe = precv_frame;
                        } else {
index 2636e7f3dbb8c50f4a024086a9e44525f7c7fc4d..cf30a08912d1762431c7048954ac68dea060e53b 100644 (file)
@@ -359,7 +359,7 @@ static char *translate_scan(struct adapter *padapter,
                if (wpa_len > 0) {
                        p = buf;
                        _rtw_memset(buf, 0, MAX_WPA_IE_LEN);
-                       p += sprintf(p, "wpa_ie =");
+                       p += sprintf(p, "wpa_ie=");
                        for (i = 0; i < wpa_len; i++)
                                p += sprintf(p, "%02x", wpa_ie[i]);
 
@@ -376,7 +376,7 @@ static char *translate_scan(struct adapter *padapter,
                if (rsn_len > 0) {
                        p = buf;
                        _rtw_memset(buf, 0, MAX_WPA_IE_LEN);
-                       p += sprintf(p, "rsn_ie =");
+                       p += sprintf(p, "rsn_ie=");
                        for (i = 0; i < rsn_len; i++)
                                p += sprintf(p, "%02x", rsn_ie[i]);
                        _rtw_memset(&iwe, 0, sizeof(iwe));
@@ -2899,7 +2899,7 @@ static int rtw_p2p_get_status(struct net_device *dev,
        /*      Commented by Albert 2010/10/12 */
        /*      Because of the output size limitation, I had removed the "Role" information. */
        /*      About the "Role" information, we will use the new private IOCTL to get the "Role" information. */
-       sprintf(extra, "\n\nStatus =%.2d\n", rtw_p2p_state(pwdinfo));
+       sprintf(extra, "\n\nStatus=%.2d\n", rtw_p2p_state(pwdinfo));
        wrqu->data.length = strlen(extra);
 
        return ret;
@@ -2918,7 +2918,7 @@ static int rtw_p2p_get_req_cm(struct net_device *dev,
        struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
        struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
 
-       sprintf(extra, "\n\nCM =%s\n", pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req);
+       sprintf(extra, "\n\nCM=%s\n", pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req);
        wrqu->data.length = strlen(extra);
        return ret;
 }
@@ -2935,7 +2935,7 @@ static int rtw_p2p_get_role(struct net_device *dev,
                        pwdinfo->p2p_peer_interface_addr[0], pwdinfo->p2p_peer_interface_addr[1], pwdinfo->p2p_peer_interface_addr[2],
                        pwdinfo->p2p_peer_interface_addr[3], pwdinfo->p2p_peer_interface_addr[4], pwdinfo->p2p_peer_interface_addr[5]);
 
-       sprintf(extra, "\n\nRole =%.2d\n", rtw_p2p_role(pwdinfo));
+       sprintf(extra, "\n\nRole=%.2d\n", rtw_p2p_role(pwdinfo));
        wrqu->data.length = strlen(extra);
        return ret;
 }
@@ -3022,7 +3022,7 @@ static int rtw_p2p_get_op_ch(struct net_device *dev,
 
        DBG_88E("[%s] Op_ch = %02x\n", __func__, pwdinfo->operating_channel);
 
-       sprintf(extra, "\n\nOp_ch =%.2d\n", pwdinfo->operating_channel);
+       sprintf(extra, "\n\nOp_ch=%.2d\n", pwdinfo->operating_channel);
        wrqu->data.length = strlen(extra);
        return ret;
 }
@@ -3043,7 +3043,7 @@ static int rtw_p2p_get_wps_configmethod(struct net_device *dev,
        u8 blnMatch = 0;
        u16     attr_content = 0;
        uint attr_contentlen = 0;
-       /* 6 is the string "wpsCM =", 17 is the MAC addr, we have to clear it at wrqu->data.pointer */
+       /* 6 is the string "wpsCM=", 17 is the MAC addr, we have to clear it at wrqu->data.pointer */
        u8 attr_content_str[6 + 17] = {0x00};
 
        /*      Commented by Albert 20110727 */
@@ -3079,7 +3079,7 @@ static int rtw_p2p_get_wps_configmethod(struct net_device *dev,
                                rtw_get_wps_attr_content(wpsie, wpsie_len, WPS_ATTR_CONF_METHOD, (u8 *) &be_tmp, &attr_contentlen);
                                if (attr_contentlen) {
                                        attr_content = be16_to_cpu(be_tmp);
-                                       sprintf(attr_content_str, "\n\nM =%.4d", attr_content);
+                                       sprintf(attr_content_str, "\n\nM=%.4d", attr_content);
                                        blnMatch = 1;
                                }
                        }
@@ -3091,7 +3091,7 @@ static int rtw_p2p_get_wps_configmethod(struct net_device *dev,
        spin_unlock_bh(&pmlmepriv->scanned_queue.lock);
 
        if (!blnMatch)
-               sprintf(attr_content_str, "\n\nM = 0000");
+               sprintf(attr_content_str, "\n\nM=0000");
 
        if (copy_to_user(wrqu->data.pointer, attr_content_str, 6 + 17))
                return -EFAULT;
@@ -3172,9 +3172,9 @@ static int rtw_p2p_get_go_device_address(struct net_device *dev,
        spin_unlock_bh(&pmlmepriv->scanned_queue.lock);
 
        if (!blnMatch)
-               snprintf(go_devadd_str, sizeof(go_devadd_str), "\n\ndev_add = NULL");
+               snprintf(go_devadd_str, sizeof(go_devadd_str), "\n\ndev_add=NULL");
        else
-               snprintf(go_devadd_str, sizeof(go_devadd_str), "\n\ndev_add =%.2X:%.2X:%.2X:%.2X:%.2X:%.2X",
+               snprintf(go_devadd_str, sizeof(go_devadd_str), "\n\ndev_add=%.2X:%.2X:%.2X:%.2X:%.2X:%.2X",
                        attr_content[0], attr_content[1], attr_content[2], attr_content[3], attr_content[4], attr_content[5]);
 
        if (copy_to_user(wrqu->data.pointer, go_devadd_str, sizeof(go_devadd_str)))
@@ -3198,7 +3198,7 @@ static int rtw_p2p_get_device_type(struct net_device *dev,
        u8 blnMatch = 0;
        u8 dev_type[8] = {0x00};
        uint dev_type_len = 0;
-       u8 dev_type_str[17 + 9] = {0x00};       /*  +9 is for the str "dev_type =", we have to clear it at wrqu->data.pointer */
+       u8 dev_type_str[17 + 9] = {0x00};       /*  +9 is for the str "dev_type=", we have to clear it at wrqu->data.pointer */
 
        /*      Commented by Albert 20121209 */
        /*      The input data is the MAC address which the application wants to know its device type. */
@@ -3239,7 +3239,7 @@ static int rtw_p2p_get_device_type(struct net_device *dev,
 
                                        memcpy(&be_tmp, dev_type, 2);
                                        type = be16_to_cpu(be_tmp);
-                                       sprintf(dev_type_str, "\n\nN =%.2d", type);
+                                       sprintf(dev_type_str, "\n\nN=%.2d", type);
                                        blnMatch = 1;
                                }
                        }
@@ -3252,7 +3252,7 @@ static int rtw_p2p_get_device_type(struct net_device *dev,
        spin_unlock_bh(&pmlmepriv->scanned_queue.lock);
 
        if (!blnMatch)
-               sprintf(dev_type_str, "\n\nN = 00");
+               sprintf(dev_type_str, "\n\nN=00");
 
        if (copy_to_user(wrqu->data.pointer, dev_type_str, 9 + 17)) {
                return -EFAULT;
@@ -3277,7 +3277,7 @@ static int rtw_p2p_get_device_name(struct net_device *dev,
        u8 blnMatch = 0;
        u8 dev_name[WPS_MAX_DEVICE_NAME_LEN] = {0x00};
        uint dev_len = 0;
-       u8 dev_name_str[WPS_MAX_DEVICE_NAME_LEN + 5] = {0x00};  /*  +5 is for the str "devN =", we have to clear it at wrqu->data.pointer */
+       u8 dev_name_str[WPS_MAX_DEVICE_NAME_LEN + 5] = {0x00};  /*  +5 is for the str "devN=", we have to clear it at wrqu->data.pointer */
 
        /*      Commented by Albert 20121225 */
        /*      The input data is the MAC address which the application wants to know its device name. */
@@ -3310,7 +3310,7 @@ static int rtw_p2p_get_device_name(struct net_device *dev,
                        if (wpsie) {
                                rtw_get_wps_attr_content(wpsie, wpsie_len, WPS_ATTR_DEVICE_NAME, dev_name, &dev_len);
                                if (dev_len) {
-                                       sprintf(dev_name_str, "\n\nN =%s", dev_name);
+                                       sprintf(dev_name_str, "\n\nN=%s", dev_name);
                                        blnMatch = 1;
                                }
                        }
@@ -3323,7 +3323,7 @@ static int rtw_p2p_get_device_name(struct net_device *dev,
        spin_unlock_bh(&pmlmepriv->scanned_queue.lock);
 
        if (!blnMatch)
-               sprintf(dev_name_str, "\n\nN = 0000");
+               sprintf(dev_name_str, "\n\nN=0000");
 
        if (copy_to_user(wrqu->data.pointer, dev_name_str, 5 + ((dev_len > 17) ? dev_len : 17)))
                return -EFAULT;
@@ -3349,7 +3349,7 @@ static int rtw_p2p_get_invitation_procedure(struct net_device *dev,
        u8 attr_content[2] = {0x00};
 
        u8 inv_proc_str[17 + 8] = {0x00};
-       /*  +8 is for the str "InvProc =", we have to clear it at wrqu->data.pointer */
+       /*  +8 is for the str "InvProc=", we have to clear it at wrqu->data.pointer */
 
        /*      Commented by Ouden 20121226 */
        /*      The application wants to know P2P initiation procedure is supported or not. */
@@ -3397,12 +3397,12 @@ static int rtw_p2p_get_invitation_procedure(struct net_device *dev,
        spin_unlock_bh(&pmlmepriv->scanned_queue.lock);
 
        if (!blnMatch) {
-               sprintf(inv_proc_str, "\nIP =-1");
+               sprintf(inv_proc_str, "\nIP=-1");
        } else {
                if (attr_content[0] & 0x20)
-                       sprintf(inv_proc_str, "\nIP = 1");
+                       sprintf(inv_proc_str, "\nIP=1");
                else
-                       sprintf(inv_proc_str, "\nIP = 0");
+                       sprintf(inv_proc_str, "\nIP=0");
        }
        if (copy_to_user(wrqu->data.pointer, inv_proc_str, 8 + 17))
                return -EFAULT;
@@ -3512,7 +3512,7 @@ static int rtw_p2p_invite_req(struct net_device *dev,
        /*      The input data contains two informations. */
        /*      1. First information is the P2P device address which you want to send to. */
        /*      2. Second information is the group id which combines with GO's mac address, space and GO's ssid. */
-       /*      Command line sample: iwpriv wlan0 p2p_set invite ="00:11:22:33:44:55 00:E0:4C:00:00:05 DIRECT-xy" */
+       /*      Command line sample: iwpriv wlan0 p2p_set invite="00:11:22:33:44:55 00:E0:4C:00:00:05 DIRECT-xy" */
        /*      Format: 00:11:22:33:44:55 00:E0:4C:00:00:05 DIRECT-xy */
 
        DBG_88E("[%s] data = %s\n", __func__, extra);
@@ -3805,48 +3805,48 @@ static int rtw_p2p_set(struct net_device *dev,
 
 #ifdef CONFIG_88EU_P2P
        DBG_88E("[%s] extra = %s\n", __func__, extra);
-       if (!memcmp(extra, "enable =", 7)) {
+       if (!memcmp(extra, "enable=", 7)) {
                rtw_wext_p2p_enable(dev, info, wrqu, &extra[7]);
-       } else if (!memcmp(extra, "setDN =", 6)) {
+       } else if (!memcmp(extra, "setDN=", 6)) {
                wrqu->data.length -= 6;
                rtw_p2p_setDN(dev, info, wrqu, &extra[6]);
-       } else if (!memcmp(extra, "profilefound =", 13)) {
+       } else if (!memcmp(extra, "profilefound=", 13)) {
                wrqu->data.length -= 13;
                rtw_p2p_profilefound(dev, info, wrqu, &extra[13]);
-       } else if (!memcmp(extra, "prov_disc =", 10)) {
+       } else if (!memcmp(extra, "prov_disc=", 10)) {
                wrqu->data.length -= 10;
                rtw_p2p_prov_disc(dev, info, wrqu, &extra[10]);
-       } else if (!memcmp(extra, "nego =", 5)) {
+       } else if (!memcmp(extra, "nego=", 5)) {
                wrqu->data.length -= 5;
                rtw_p2p_connect(dev, info, wrqu, &extra[5]);
-       } else if (!memcmp(extra, "intent =", 7)) {
+       } else if (!memcmp(extra, "intent=", 7)) {
                /*      Commented by Albert 2011/03/23 */
                /*      The wrqu->data.length will include the null character */
                /*      So, we will decrease 7 + 1 */
                wrqu->data.length -= 8;
                rtw_p2p_set_intent(dev, info, wrqu, &extra[7]);
-       } else if (!memcmp(extra, "ssid =", 5)) {
+       } else if (!memcmp(extra, "ssid=", 5)) {
                wrqu->data.length -= 5;
                rtw_p2p_set_go_nego_ssid(dev, info, wrqu, &extra[5]);
-       } else if (!memcmp(extra, "got_wpsinfo =", 12)) {
+       } else if (!memcmp(extra, "got_wpsinfo=", 12)) {
                wrqu->data.length -= 12;
                rtw_p2p_got_wpsinfo(dev, info, wrqu, &extra[12]);
-       } else if (!memcmp(extra, "listen_ch =", 10)) {
+       } else if (!memcmp(extra, "listen_ch=", 10)) {
                /*      Commented by Albert 2011/05/24 */
                /*      The wrqu->data.length will include the null character */
                /*      So, we will decrease (10 + 1) */
                wrqu->data.length -= 11;
                rtw_p2p_set_listen_ch(dev, info, wrqu, &extra[10]);
-       } else if (!memcmp(extra, "op_ch =", 6)) {
+       } else if (!memcmp(extra, "op_ch=", 6)) {
                /*      Commented by Albert 2011/05/24 */
                /*      The wrqu->data.length will include the null character */
                /*      So, we will decrease (6 + 1) */
                wrqu->data.length -= 7;
                rtw_p2p_set_op_ch(dev, info, wrqu, &extra[6]);
-       } else if (!memcmp(extra, "invite =", 7)) {
+       } else if (!memcmp(extra, "invite=", 7)) {
                wrqu->data.length -= 8;
                rtw_p2p_invite_req(dev, info, wrqu, &extra[7]);
-       } else if (!memcmp(extra, "persistent =", 11)) {
+       } else if (!memcmp(extra, "persistent=", 11)) {
                wrqu->data.length -= 11;
                rtw_p2p_set_persistent(dev, info, wrqu, &extra[11]);
        }
@@ -3887,7 +3887,7 @@ static int rtw_p2p_get(struct net_device *dev,
                        "group_id", 8)) {
                rtw_p2p_get_groupid(dev, info, wrqu, extra);
        } else if (!memcmp((__force const char *)wrqu->data.pointer,
-                       "peer_deva_inv", 9)) {
+                       "peer_deva_inv", 13)) {
                /*      Get the P2P device address when receiving the P2P Invitation request frame. */
                rtw_p2p_get_peer_devaddr_by_invitation(dev, info, wrqu, extra);
        } else if (!memcmp((__force const char *)wrqu->data.pointer,
@@ -6920,7 +6920,7 @@ static int rtw_mp_ctx(struct net_device *dev,
 
        DBG_88E("%s: in =%s\n", __func__, extra);
 
-       countPkTx = strncmp(extra, "count =", 5); /*  strncmp true is 0 */
+       countPkTx = strncmp(extra, "count=", 6); /*  strncmp true is 0 */
        cotuTx = strncmp(extra, "background", 20);
        CarrSprTx = strncmp(extra, "background, cs", 20);
        scTx = strncmp(extra, "background, sc", 20);
@@ -7044,7 +7044,7 @@ static int rtw_mp_arx(struct net_device *dev,
        DBG_88E("%s: %s\n", __func__, input);
 
        bStartRx = (strncmp(input, "start", 5) == 0) ? 1 : 0; /*  strncmp true is 0 */
-       bStopRx = (strncmp(input, "stop", 5) == 0) ? 1 : 0; /*  strncmp true is 0 */
+       bStopRx = (strncmp(input, "stop", 4) == 0) ? 1 : 0; /*  strncmp true is 0 */
        bQueryPhy = (strncmp(input, "phy", 3) == 0) ? 1 : 0; /*  strncmp true is 0 */
 
        if (bStartRx) {
index 23ec684b60e1aff8f585be71ad76b3d7f0d043ea..274c359279ef387dd730b1277f1e0ec6bf522459 100644 (file)
@@ -254,7 +254,7 @@ union recv_frame *r8712_portctrl(struct _adapter *adapter,
        struct sta_info *psta;
        struct  sta_priv *pstapriv;
        union recv_frame *prtnframe;
-       u16 ether_type = 0;
+       u16 ether_type;
 
        pstapriv = &adapter->stapriv;
        ptr = get_recvframe_data(precv_frame);
@@ -263,15 +263,14 @@ union recv_frame *r8712_portctrl(struct _adapter *adapter,
        psta = r8712_get_stainfo(pstapriv, psta_addr);
        auth_alg = adapter->securitypriv.AuthAlgrthm;
        if (auth_alg == 2) {
+               /* get ether_type */
+               ptr = ptr + pfhdr->attrib.hdrlen + LLC_HEADER_SIZE;
+               memcpy(&ether_type, ptr, 2);
+               ether_type = ntohs((unsigned short)ether_type);
+
                if ((psta != NULL) && (psta->ieee8021x_blocked)) {
                        /* blocked
                         * only accept EAPOL frame */
-                       prtnframe = precv_frame;
-                       /*get ether_type */
-                       ptr = ptr + pfhdr->attrib.hdrlen +
-                             pfhdr->attrib.iv_len + LLC_HEADER_SIZE;
-                       memcpy(&ether_type, ptr, 2);
-                       ether_type = ntohs((unsigned short)ether_type);
                        if (ether_type == 0x888e)
                                prtnframe = precv_frame;
                        else {
index 780631fd3b6d4a8f9bbbb9b7662853f7ba5d9608..a48ab25a7d8a251cd93a30cb04349a09ce3cdf1b 100644 (file)
@@ -1496,45 +1496,23 @@ void rtw_wlan_bssid_ex_remove_p2p_attr23a(struct wlan_bssid_ex *bss_ex, u8 attr_
 int rtw_get_wfd_ie(u8 *in_ie, int in_len, u8 *wfd_ie, uint *wfd_ielen)
 {
        int match;
-       uint cnt = 0;
-       u8 eid, wfd_oui[4] = {0x50, 0x6F, 0x9A, 0x0A};
+       const u8 *ie;
 
-       match = false;
+       match = 0;
 
-       if (in_len < 0) {
+       if (in_len < 0)
                return match;
-       }
-
-       while (cnt < in_len)
-       {
-               eid = in_ie[cnt];
 
-               if ((eid == _VENDOR_SPECIFIC_IE_) &&
-                   !memcmp(&in_ie[cnt+2], wfd_oui, 4)) {
-                       if (wfd_ie != NULL) {
-                               memcpy(wfd_ie, &in_ie[cnt], in_ie[cnt + 1] + 2);
-
-                       } else {
-                               if (wfd_ielen != NULL) {
-                                       *wfd_ielen = 0;
-                               }
-                       }
-
-                       if (wfd_ielen != NULL) {
-                               *wfd_ielen = in_ie[cnt + 1] + 2;
-                       }
-
-                       cnt += in_ie[cnt + 1] + 2;
-
-                       match = true;
-                       break;
-               } else {
-                       cnt += in_ie[cnt + 1] +2; /* goto next */
-               }
-       }
+       ie = cfg80211_find_vendor_ie(0x506F9A, 0x0A, in_ie, in_len);
+       if (ie && (ie[1] <= (MAX_WFD_IE_LEN - 2))) {
+               if (wfd_ie) {
+                       *wfd_ielen = ie[1] + 2;
+                       memcpy(wfd_ie, ie, ie[1] + 2);
+               } else
+                       if (wfd_ielen)
+                               *wfd_ielen = 0;
 
-       if (match == true) {
-               match = cnt;
+               match = 1;
        }
 
        return match;
index 4c753639ea5a64b27ada4d02ea1d343bf16ada04..1f3e8a0aece4603a7b26a9b704290ef198f13caa 100644 (file)
@@ -1281,7 +1281,7 @@ unsigned int OnAssocReq23a(struct rtw_adapter *padapter, struct recv_frame *prec
        u8 p2p_status_code = P2P_STATUS_SUCCESS;
        u8 *p2pie;
        u32 p2pielen = 0;
-       u8      wfd_ie[ 128 ] = { 0x00 };
+       u8      wfd_ie[MAX_WFD_IE_LEN] = { 0x00 };
        u32     wfd_ielen = 0;
 #endif /* CONFIG_8723AU_P2P */
 
index 27a6cc76973de4970ba903d24060bab46f1a83d1..1a961e3f3a5541d183d6edeed532834d23e59892 100644 (file)
@@ -2535,7 +2535,7 @@ u8 process_p2p_group_negotation_req23a(struct wifidirect_info *pwdinfo, u8 *pfra
        u16             wps_devicepassword_id = 0x0000;
        uint    wps_devicepassword_id_len = 0;
 #ifdef CONFIG_8723AU_P2P
-       u8      wfd_ie[ 128 ] = { 0x00 };
+       u8      wfd_ie[MAX_WFD_IE_LEN] = { 0x00 };
        u32     wfd_ielen = 0;
 #endif /*  CONFIG_8723AU_P2P */
 
@@ -2741,7 +2741,7 @@ u8 process_p2p_group_negotation_resp23a(struct wifidirect_info *pwdinfo, u8 *pfr
        u32 ies_len;
        u8 * p2p_ie;
 #ifdef CONFIG_8723AU_P2P
-       u8      wfd_ie[ 128 ] = { 0x00 };
+       u8      wfd_ie[MAX_WFD_IE_LEN] = { 0x00 };
        u32     wfd_ielen = 0;
 #endif /*  CONFIG_8723AU_P2P */
 
index 0dfcfbce3b521f7fc241c3ead72136c0be75710d..99d81e612e7b69bf8cc368af3f41f842dc197367 100644 (file)
@@ -570,7 +570,7 @@ void flush_all_cam_entry23a(struct rtw_adapter *padapter)
 int WFD_info_handler(struct rtw_adapter *padapter, struct ndis_802_11_var_ies *        pIE)
 {
        struct wifidirect_info  *pwdinfo;
-       u8      wfd_ie[128] = {0x00};
+       u8      wfd_ie[MAX_WFD_IE_LEN] = {0x00};
        u32     wfd_ielen = 0;
 
        pwdinfo = &padapter->wdinfo;
@@ -681,7 +681,7 @@ void WMMOnAssocRsp23a(struct rtw_adapter *padapter)
        inx[0] = 0; inx[1] = 1; inx[2] = 2; inx[3] = 3;
 
        if (pregpriv->wifi_spec == 1) {
-               u32     j, tmp, change_inx;
+               u32     j, tmp, change_inx = false;
 
                /* entry indx: 0->vo, 1->vi, 2->be, 3->bk. */
                for (i = 0; i < 4; i++) {
index e5073fe247706311da8cecef2137c9521c2cf384..a4c9cc437bc6e3d1d64d285fc573651b70add311 100644 (file)
@@ -388,7 +388,7 @@ static void _rtl_init_mac80211(struct ieee80211_hw *hw)
 
 }
 
-static void _rtl_init_deferred_work(struct ieee80211_hw *hw)
+static int _rtl_init_deferred_work(struct ieee80211_hw *hw)
 {
        struct rtl_priv *rtlpriv = rtl_priv(hw);
 
@@ -410,6 +410,9 @@ static void _rtl_init_deferred_work(struct ieee80211_hw *hw)
        rtlpriv->works.rtl_wq = create_workqueue(rtlpriv->cfg->name);
 #endif
 /*<delete in kernel end>*/
+       if (!rtlpriv->works.rtl_wq)
+               return -ENOMEM;
+
        INIT_DELAYED_WORK(&rtlpriv->works.watchdog_wq,
                          (void *)rtl_watchdog_wq_callback);
        INIT_DELAYED_WORK(&rtlpriv->works.ips_nic_off_wq,
@@ -421,6 +424,8 @@ static void _rtl_init_deferred_work(struct ieee80211_hw *hw)
        INIT_DELAYED_WORK(&rtlpriv->works.fwevt_wq,
                          (void *)rtl_fwevt_wq_callback);
 
+       return 0;
+
 }
 
 void rtl_deinit_deferred_work(struct ieee80211_hw *hw)
@@ -519,7 +524,8 @@ int rtl_init_core(struct ieee80211_hw *hw)
        INIT_LIST_HEAD(&rtlpriv->entry_list);
 
        /* <6> init deferred work */
-       _rtl_init_deferred_work(hw);
+       if (_rtl_init_deferred_work(hw))
+               return 1;
 
        /* <7> */
 #ifdef VIF_TODO
index ef5933b935906365355b7031d5a70c6c705ca9b0..3b6e5358c723e0cbce0d1a38d81f6ee0bc9b4c35 100644 (file)
@@ -1855,8 +1855,9 @@ static int handle_goto(struct vc_data *vc, u_char type, u_char ch, u_short key)
 {
        static u_char goto_buf[8];
        static int num;
-       int maxlen, go_pos;
+       int maxlen;
        char *cp;
+
        if (type == KT_SPKUP && ch == SPEAKUP_GOTO)
                goto do_goto;
        if (type == KT_LATIN && ch == '\n')
@@ -1891,25 +1892,24 @@ oops:
                spk_special_handler = NULL;
                return 1;
        }
-       go_pos = kstrtol(goto_buf, 10, (long *)&cp);
-       goto_pos = (u_long) go_pos;
+
+       goto_pos = simple_strtoul(goto_buf, &cp, 10);
+
        if (*cp == 'x') {
                if (*goto_buf < '0')
                        goto_pos += spk_x;
-               else
+               else if (goto_pos > 0)
                        goto_pos--;
-               if (goto_pos < 0)
-                       goto_pos = 0;
+
                if (goto_pos >= vc->vc_cols)
                        goto_pos = vc->vc_cols - 1;
                goto_x = 1;
        } else {
                if (*goto_buf < '0')
                        goto_pos += spk_y;
-               else
+               else if (goto_pos > 0)
                        goto_pos--;
-               if (goto_pos < 0)
-                       goto_pos = 0;
+
                if (goto_pos >= vc->vc_rows)
                        goto_pos = vc->vc_rows - 1;
                goto_x = 0;
index 8ea9c46e56aef55ba9603baa3e7700278cb1e13d..3152a2180c456c0d9e06ee64333f6352964ca982 100644 (file)
@@ -381,17 +381,17 @@ create_bus(CONTROLVM_MESSAGE *msg, char *buf)
                cmd.add_vbus.busTypeGuid = msg->cmd.createBus.busDataTypeGuid;
                cmd.add_vbus.busInstGuid = msg->cmd.createBus.busInstGuid;
                if (!VirtControlChanFunc) {
-                       kfree(bus);
                        LOGERR("CONTROLVM_BUS_CREATE Failed: virtpci callback not registered.");
                        POSTCODE_LINUX_3(BUS_CREATE_FAILURE_PC, bus->busNo,
                                         POSTCODE_SEVERITY_ERR);
+                       kfree(bus);
                        return CONTROLVM_RESP_ERROR_VIRTPCI_DRIVER_FAILURE;
                }
                if (!VirtControlChanFunc(&cmd)) {
-                       kfree(bus);
                        LOGERR("CONTROLVM_BUS_CREATE Failed: virtpci GUEST_ADD_VBUS returned error.");
                        POSTCODE_LINUX_3(BUS_CREATE_FAILURE_PC, bus->busNo,
                                         POSTCODE_SEVERITY_ERR);
+                       kfree(bus);
                        return
                            CONTROLVM_RESP_ERROR_VIRTPCI_DRIVER_CALLBACK_ERROR;
                }
index d4bf203cdfdf53e36acee078b9c89a53c445862f..d95825dc541494d7af4ca1694bbca2748c4d7289 100644 (file)
@@ -104,9 +104,9 @@ finddevice(struct list_head *list, U32 busNo, U32 devNo)
 
 static inline void delbusdevices(struct list_head *list, U32 busNo)
 {
-       VISORCHIPSET_DEVICE_INFO *p;
+       VISORCHIPSET_DEVICE_INFO *p, *tmp;
 
-       list_for_each_entry(p, list, entry) {
+       list_for_each_entry_safe(p, tmp, list, entry) {
                if (p->busNo == busNo) {
                        list_del(&p->entry);
                        kfree(p);
index 257c6e59b4603b54ed44bca4147daae1a8a8162d..c475e256e34b639070de1dad460a7114e4327682 100644 (file)
@@ -605,16 +605,16 @@ EXPORT_SYMBOL_GPL(visorchipset_register_busdev_client);
 static void
 cleanup_controlvm_structures(void)
 {
-       VISORCHIPSET_BUS_INFO *bi;
-       VISORCHIPSET_DEVICE_INFO *di;
+       VISORCHIPSET_BUS_INFO *bi, *tmp_bi;
+       VISORCHIPSET_DEVICE_INFO *di, *tmp_di;
 
-       list_for_each_entry(bi, &BusInfoList, entry) {
+       list_for_each_entry_safe(bi, tmp_bi, &BusInfoList, entry) {
                busInfo_clear(bi);
                list_del(&bi->entry);
                kfree(bi);
        }
 
-       list_for_each_entry(di, &DevInfoList, entry) {
+       list_for_each_entry_safe(di, tmp_di, &DevInfoList, entry) {
                devInfo_clear(di);
                list_del(&di->entry);
                kfree(di);
index c5bf60b135b904973158f74b01fdd953af3fdfdb..92caef7474c7d7286486ae880876ab405fccf42f 100644 (file)
@@ -118,6 +118,7 @@ static int refresh_exported_devices(void)
        struct udev_list_entry *devices, *dev_list_entry;
        struct udev_device *dev;
        const char *path;
+       const char *driver;
 
        enumerate = udev_enumerate_new(udev_context);
        udev_enumerate_add_match_subsystem(enumerate, "usb");
@@ -128,10 +129,12 @@ static int refresh_exported_devices(void)
        udev_list_entry_foreach(dev_list_entry, devices) {
                path = udev_list_entry_get_name(dev_list_entry);
                dev = udev_device_new_from_syspath(udev_context, path);
+               if (dev == NULL)
+                       continue;
 
                /* Check whether device uses usbip-host driver. */
-               if (!strcmp(udev_device_get_driver(dev),
-                           USBIP_HOST_DRV_NAME)) {
+               driver = udev_device_get_driver(dev);
+               if (driver != NULL && !strcmp(driver, USBIP_HOST_DRV_NAME)) {
                        edev = usbip_exported_device_new(path);
                        if (!edev) {
                                dbg("usbip_exported_device_new failed");
index 47bddcdde0a621330a063d297b132f8da8396b72..211f43f67ea25f28ca46146bbadc099b2532924b 100644 (file)
@@ -184,7 +184,7 @@ static ssize_t store_attach(struct device *dev, struct device_attribute *attr,
         * @devid: unique device identifier in a remote host
         * @speed: usb device speed in a remote host
         */
-       if (sscanf(buf, "%u %u %u %u", &rhport, &sockfd, &devid, &speed) != 1)
+       if (sscanf(buf, "%u %u %u %u", &rhport, &sockfd, &devid, &speed) != 4)
                return -EINVAL;
 
        usbip_dbg_vhci_sysfs("rhport(%u) sockfd(%u) devid(%u) speed(%u)\n",
index 792792715673fe3e987c623f082c4c17c5ade5e5..ffb4eeefdddb37e5ae2447c6501b50e00e59f37f 100644 (file)
@@ -776,7 +776,8 @@ static int vme_user_probe(struct vme_dev *vdev)
                image[i].kern_buf = kmalloc(image[i].size_buf, GFP_KERNEL);
                if (image[i].kern_buf == NULL) {
                        err = -ENOMEM;
-                       goto err_master_buf;
+                       vme_master_free(image[i].resource);
+                       goto err_master;
                }
        }
 
@@ -819,8 +820,6 @@ static int vme_user_probe(struct vme_dev *vdev)
 
        return 0;
 
-       /* Ensure counter set correcty to destroy all sysfs devices */
-       i = VME_DEVS;
 err_sysfs:
        while (i > 0) {
                i--;
@@ -830,12 +829,10 @@ err_sysfs:
 
        /* Ensure counter set correcty to unalloc all master windows */
        i = MASTER_MAX + 1;
-err_master_buf:
-       for (i = MASTER_MINOR; i < (MASTER_MAX + 1); i++)
-               kfree(image[i].kern_buf);
 err_master:
        while (i > MASTER_MINOR) {
                i--;
+               kfree(image[i].kern_buf);
                vme_master_free(image[i].resource);
        }
 
index 5c739bebd8a5183f73ee1d548024c945fab22673..949f0e5eed8d42364b6f8d213e5541edd9957620 100644 (file)
@@ -1,6 +1,6 @@
 #ifndef _VB_DEF_
 #define _VB_DEF_
-#include "../../video/sis/initdef.h"
+#include "../../video/fbdev/sis/initdef.h"
 
 #define VB_XGI301C      0x0020 /* for 301C */
 
index c08ff5b2d6ee055dbca9092c9d6475bcb5375b6e..0d27594554ca271c30bff981b221ecfe27892f11 100644 (file)
@@ -1,6 +1,6 @@
 #ifndef _VB_STRUCT_
 #define _VB_STRUCT_
-#include "../../video/sis/vstruct.h"
+#include "../../video/fbdev/sis/vstruct.h"
 
 struct XGI_LVDSCRT1HDataStruct {
        unsigned char Reg[8];
index ddf7776c295b61ef885de62824c04ad244661e09..264351441f99ff5acdc1330552c898626acd1674 100644 (file)
@@ -2,8 +2,8 @@
 #define _VGATYPES_
 
 #include <linux/fb.h>  /* for struct fb_var_screeninfo for sis.h */
-#include "../../video/sis/vgatypes.h"
-#include "../../video/sis/sis.h"               /* for LCD_TYPE */
+#include "../../video/fbdev/sis/vgatypes.h"
+#include "../../video/fbdev/sis/sis.h"         /* for LCD_TYPE */
 
 #ifndef XGI_VB_CHIP_TYPE
 enum XGI_VB_CHIP_TYPE {
index 81f909c2101f6145f568fd048b60453533cf943d..0e1bf88584311352767e646faedc2b39183932ce 100644 (file)
@@ -1520,7 +1520,7 @@ int serial8250_handle_irq(struct uart_port *port, unsigned int iir)
                        status = serial8250_rx_chars(up, status);
        }
        serial8250_modem_status(up);
-       if (status & UART_LSR_THRE)
+       if (!up->dma && (status & UART_LSR_THRE))
                serial8250_tx_chars(up);
 
        spin_unlock_irqrestore(&port->lock, flags);
index 7046769608d403501158a044fd109203f0e0531f..ab9096dc384976de15c41f0d5f39b6975b72a45d 100644 (file)
@@ -20,12 +20,15 @@ static void __dma_tx_complete(void *param)
        struct uart_8250_port   *p = param;
        struct uart_8250_dma    *dma = p->dma;
        struct circ_buf         *xmit = &p->port.state->xmit;
-
-       dma->tx_running = 0;
+       unsigned long   flags;
 
        dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr,
                                UART_XMIT_SIZE, DMA_TO_DEVICE);
 
+       spin_lock_irqsave(&p->port.lock, flags);
+
+       dma->tx_running = 0;
+
        xmit->tail += dma->tx_size;
        xmit->tail &= UART_XMIT_SIZE - 1;
        p->port.icount.tx += dma->tx_size;
@@ -35,6 +38,8 @@ static void __dma_tx_complete(void *param)
 
        if (!uart_circ_empty(xmit) && !uart_tx_stopped(&p->port))
                serial8250_tx_dma(p);
+
+       spin_unlock_irqrestore(&p->port.lock, flags);
 }
 
 static void __dma_rx_complete(void *param)
index 2e6d8ddc44252b44bfeba8e9a2a0072052a9414f..5d9b01aa54f4c0e3d037611b721c562a2f4823fd 100644 (file)
@@ -1226,6 +1226,7 @@ config SERIAL_BFIN_SPORT3_UART_CTSRTS
 config SERIAL_TIMBERDALE
        tristate "Support for timberdale UART"
        select SERIAL_CORE
+       depends on X86_32 || COMPILE_TEST
        ---help---
        Add support for UART controller on timberdale.
 
index d4eda24aa68ba6392be747fe63176a79aaad7311..dacf0a09ab248cff1b81aabdb451c8df7c43b8f8 100644 (file)
@@ -318,7 +318,7 @@ static void pl011_dma_probe_initcall(struct device *dev, struct uart_amba_port *
                        .src_addr = uap->port.mapbase + UART01x_DR,
                        .src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE,
                        .direction = DMA_DEV_TO_MEM,
-                       .src_maxburst = uap->fifosize >> 1,
+                       .src_maxburst = uap->fifosize >> 2,
                        .device_fc = false,
                };
 
@@ -2176,6 +2176,7 @@ static int pl011_probe(struct amba_device *dev, const struct amba_id *id)
 static int pl011_remove(struct amba_device *dev)
 {
        struct uart_amba_port *uap = amba_get_drvdata(dev);
+       bool busy = false;
        int i;
 
        uart_remove_one_port(&amba_reg, &uap->port);
@@ -2183,9 +2184,12 @@ static int pl011_remove(struct amba_device *dev)
        for (i = 0; i < ARRAY_SIZE(amba_ports); i++)
                if (amba_ports[i] == uap)
                        amba_ports[i] = NULL;
+               else if (amba_ports[i])
+                       busy = true;
 
        pl011_dma_remove(uap);
-       uart_unregister_driver(&amba_reg);
+       if (!busy)
+               uart_unregister_driver(&amba_reg);
        return 0;
 }
 
index 5e6fdb1ea73b327365f1823dc2f5720eb31799e7..14aaea0d4131072d2bf1b5b5c45d0de048e835d6 100644 (file)
@@ -368,16 +368,12 @@ static const struct uart_ops uart_clps711x_ops = {
 static void uart_clps711x_console_putchar(struct uart_port *port, int ch)
 {
        struct clps711x_port *s = dev_get_drvdata(port->dev);
+       u32 sysflg = 0;
 
        /* Wait for FIFO is not full */
-       while (1) {
-               u32 sysflg = 0;
-
+       do {
                regmap_read(s->syscon, SYSFLG_OFFSET, &sysflg);
-               if (!(sysflg & SYSFLG_UTXFF))
-                       break;
-               cond_resched();
-       }
+       } while (sysflg & SYSFLG_UTXFF);
 
        writew(ch, port->membase + UARTDR_OFFSET);
 }
@@ -387,18 +383,14 @@ static void uart_clps711x_console_write(struct console *co, const char *c,
 {
        struct uart_port *port = clps711x_uart.state[co->index].uart_port;
        struct clps711x_port *s = dev_get_drvdata(port->dev);
+       u32 sysflg = 0;
 
        uart_console_write(port, c, n, uart_clps711x_console_putchar);
 
        /* Wait for transmitter to become empty */
-       while (1) {
-               u32 sysflg = 0;
-
+       do {
                regmap_read(s->syscon, SYSFLG_OFFSET, &sysflg);
-               if (!(sysflg & SYSFLG_UBUSY))
-                       break;
-               cond_resched();
-       }
+       } while (sysflg & SYSFLG_UBUSY);
 }
 
 static int uart_clps711x_console_setup(struct console *co, char *options)
index 028582e924a5fbff4394993e1102f4456e9b6ff5..c167a710dc39b5cdb1c84290c620c750bddd2652 100644 (file)
@@ -798,6 +798,9 @@ static int efm32_uart_remove(struct platform_device *pdev)
 
 static const struct of_device_id efm32_uart_dt_ids[] = {
        {
+               .compatible = "energymicro,efm32-uart",
+       }, {
+               /* doesn't follow the "vendor,device" scheme, don't use */
                .compatible = "efm32,uart",
        }, {
                /* sentinel */
index dd8b1a5458ff4365c14a857a45db4cea1b20539e..08b6b9419f0d042aaf478127dfde959e5c4216c1 100644 (file)
@@ -225,14 +225,19 @@ static inline void serial_omap_enable_wakeirq(struct uart_omap_port *up,
        if (enable)
                enable_irq(up->wakeirq);
        else
-               disable_irq(up->wakeirq);
+               disable_irq_nosync(up->wakeirq);
 }
 
 static void serial_omap_enable_wakeup(struct uart_omap_port *up, bool enable)
 {
        struct omap_uart_port_info *pdata = dev_get_platdata(up->dev);
 
+       if (enable == up->wakeups_enabled)
+               return;
+
        serial_omap_enable_wakeirq(up, enable);
+       up->wakeups_enabled = enable;
+
        if (!pdata || !pdata->enable_wakeup)
                return;
 
@@ -1495,6 +1500,11 @@ static int serial_omap_suspend(struct device *dev)
        uart_suspend_port(&serial_omap_reg, &up->port);
        flush_work(&up->qos_work);
 
+       if (device_may_wakeup(dev))
+               serial_omap_enable_wakeup(up, true);
+       else
+               serial_omap_enable_wakeup(up, false);
+
        return 0;
 }
 
@@ -1502,6 +1512,9 @@ static int serial_omap_resume(struct device *dev)
 {
        struct uart_omap_port *up = dev_get_drvdata(dev);
 
+       if (device_may_wakeup(dev))
+               serial_omap_enable_wakeup(up, false);
+
        uart_resume_port(&serial_omap_reg, &up->port);
 
        return 0;
@@ -1789,6 +1802,7 @@ static int serial_omap_remove(struct platform_device *dev)
        pm_runtime_disable(up->dev);
        uart_remove_one_port(&serial_omap_reg, &up->port);
        pm_qos_remove_request(&up->pm_qos_request);
+       device_init_wakeup(&dev->dev, false);
 
        return 0;
 }
@@ -1877,17 +1891,7 @@ static int serial_omap_runtime_suspend(struct device *dev)
 
        up->context_loss_cnt = serial_omap_get_context_loss_count(up);
 
-       if (device_may_wakeup(dev)) {
-               if (!up->wakeups_enabled) {
-                       serial_omap_enable_wakeup(up, true);
-                       up->wakeups_enabled = true;
-               }
-       } else {
-               if (up->wakeups_enabled) {
-                       serial_omap_enable_wakeup(up, false);
-                       up->wakeups_enabled = false;
-               }
-       }
+       serial_omap_enable_wakeup(up, true);
 
        up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE;
        schedule_work(&up->qos_work);
@@ -1901,6 +1905,8 @@ static int serial_omap_runtime_resume(struct device *dev)
 
        int loss_cnt = serial_omap_get_context_loss_count(up);
 
+       serial_omap_enable_wakeup(up, false);
+
        if (loss_cnt < 0) {
                dev_dbg(dev, "serial_omap_get_context_loss_count failed : %d\n",
                        loss_cnt);
index 23f4596007382501589476b885d269bcce1484a6..1f5505e7f90dd9de0c84770a164c3a1d95968dc4 100644 (file)
@@ -1446,8 +1446,8 @@ static int s3c24xx_serial_get_poll_char(struct uart_port *port)
 static void s3c24xx_serial_put_poll_char(struct uart_port *port,
                unsigned char c)
 {
-       unsigned int ufcon = rd_regl(cons_uart, S3C2410_UFCON);
-       unsigned int ucon = rd_regl(cons_uart, S3C2410_UCON);
+       unsigned int ufcon = rd_regl(port, S3C2410_UFCON);
+       unsigned int ucon = rd_regl(port, S3C2410_UCON);
 
        /* not possible to xmit on unconfigured port */
        if (!s3c24xx_port_configured(ucon))
@@ -1455,7 +1455,7 @@ static void s3c24xx_serial_put_poll_char(struct uart_port *port,
 
        while (!s3c24xx_serial_console_txrdy(port, ufcon))
                cpu_relax();
-       wr_regb(cons_uart, S3C2410_UTXH, c);
+       wr_regb(port, S3C2410_UTXH, c);
 }
 
 #endif /* CONFIG_CONSOLE_POLL */
@@ -1463,22 +1463,23 @@ static void s3c24xx_serial_put_poll_char(struct uart_port *port,
 static void
 s3c24xx_serial_console_putchar(struct uart_port *port, int ch)
 {
-       unsigned int ufcon = rd_regl(cons_uart, S3C2410_UFCON);
-       unsigned int ucon = rd_regl(cons_uart, S3C2410_UCON);
-
-       /* not possible to xmit on unconfigured port */
-       if (!s3c24xx_port_configured(ucon))
-               return;
+       unsigned int ufcon = rd_regl(port, S3C2410_UFCON);
 
        while (!s3c24xx_serial_console_txrdy(port, ufcon))
-               barrier();
-       wr_regb(cons_uart, S3C2410_UTXH, ch);
+               cpu_relax();
+       wr_regb(port, S3C2410_UTXH, ch);
 }
 
 static void
 s3c24xx_serial_console_write(struct console *co, const char *s,
                             unsigned int count)
 {
+       unsigned int ucon = rd_regl(cons_uart, S3C2410_UCON);
+
+       /* not possible to xmit on unconfigured port */
+       if (!s3c24xx_port_configured(ucon))
+               return;
+
        uart_console_write(cons_uart, s, count, s3c24xx_serial_console_putchar);
 }
 
index 2cf5649a6dc038396636f09098ed6024d5880838..b68550d95a403dbc6d5ecb0faa4a5bb4d38cd86f 100644 (file)
@@ -89,8 +89,7 @@ static void __uart_start(struct tty_struct *tty)
        struct uart_state *state = tty->driver_data;
        struct uart_port *port = state->uart_port;
 
-       if (!uart_circ_empty(&state->xmit) && state->xmit.buf &&
-           !tty->stopped && !tty->hw_stopped)
+       if (!tty->stopped && !tty->hw_stopped)
                port->ops->start_tx(port);
 }
 
@@ -137,6 +136,11 @@ static int uart_port_startup(struct tty_struct *tty, struct uart_state *state,
        if (uport->type == PORT_UNKNOWN)
                return 1;
 
+       /*
+        * Make sure the device is in D0 state.
+        */
+       uart_change_pm(state, UART_PM_STATE_ON);
+
        /*
         * Initialise and allocate the transmit and temporary
         * buffer.
@@ -826,25 +830,29 @@ static int uart_set_info(struct tty_struct *tty, struct tty_port *port,
                 * If we fail to request resources for the
                 * new port, try to restore the old settings.
                 */
-               if (retval && old_type != PORT_UNKNOWN) {
+               if (retval) {
                        uport->iobase = old_iobase;
                        uport->type = old_type;
                        uport->hub6 = old_hub6;
                        uport->iotype = old_iotype;
                        uport->regshift = old_shift;
                        uport->mapbase = old_mapbase;
-                       retval = uport->ops->request_port(uport);
-                       /*
-                        * If we failed to restore the old settings,
-                        * we fail like this.
-                        */
-                       if (retval)
-                               uport->type = PORT_UNKNOWN;
 
-                       /*
-                        * We failed anyway.
-                        */
-                       retval = -EBUSY;
+                       if (old_type != PORT_UNKNOWN) {
+                               retval = uport->ops->request_port(uport);
+                               /*
+                                * If we failed to restore the old settings,
+                                * we fail like this.
+                                */
+                               if (retval)
+                                       uport->type = PORT_UNKNOWN;
+
+                               /*
+                                * We failed anyway.
+                                */
+                               retval = -EBUSY;
+                       }
+
                        /* Added to return the correct error -Ram Gupta */
                        goto exit;
                }
@@ -1452,6 +1460,8 @@ static void uart_hangup(struct tty_struct *tty)
                clear_bit(ASYNCB_NORMAL_ACTIVE, &port->flags);
                spin_unlock_irqrestore(&port->lock, flags);
                tty_port_tty_set(port, NULL);
+               if (!uart_console(state->uart_port))
+                       uart_change_pm(state, UART_PM_STATE_OFF);
                wake_up_interruptible(&port->open_wait);
                wake_up_interruptible(&port->delta_msr_wait);
        }
@@ -1569,12 +1579,6 @@ static int uart_open(struct tty_struct *tty, struct file *filp)
                goto err_dec_count;
        }
 
-       /*
-        * Make sure the device is in D0 state.
-        */
-       if (port->count == 1)
-               uart_change_pm(state, UART_PM_STATE_ON);
-
        /*
         * Start up the serial port.
         */
index 21e6e84c0df872a97dbaae1d84ab433cce18411d..dd3a96e070265d6ab7e32782cbe24e47622b2965 100644 (file)
@@ -295,7 +295,7 @@ static void asc_receive_chars(struct uart_port *port)
                        status & ASC_STA_OE) {
 
                        if (c & ASC_RXBUF_FE) {
-                               if (c == ASC_RXBUF_FE) {
+                               if (c == (ASC_RXBUF_FE | ASC_RXBUF_DUMMY_RX)) {
                                        port->icount.brk++;
                                        if (uart_handle_break(port))
                                                continue;
@@ -325,7 +325,7 @@ static void asc_receive_chars(struct uart_port *port)
                                flag = TTY_FRAME;
                }
 
-               if (uart_handle_sysrq_char(port, c))
+               if (uart_handle_sysrq_char(port, c & 0xff))
                        continue;
 
                uart_insert_char(port, c, ASC_RXBUF_DUMMY_OE, c & 0xff, flag);
index 8ebd9f88a6f69ff85f63139944fad2542c789483..f1d30f6945af2cf8fece1a5a1b40d59aa46cd5e0 100644 (file)
@@ -255,11 +255,16 @@ static int __tty_buffer_request_room(struct tty_port *port, size_t size,
        if (change || left < size) {
                /* This is the slow path - looking for new buffers to use */
                if ((n = tty_buffer_alloc(port, size)) != NULL) {
+                       unsigned long iflags;
+
                        n->flags = flags;
                        buf->tail = n;
+
+                       spin_lock_irqsave(&buf->flush_lock, iflags);
                        b->commit = b->used;
-                       smp_mb();
                        b->next = n;
+                       spin_unlock_irqrestore(&buf->flush_lock, iflags);
+
                } else if (change)
                        size = 0;
                else
@@ -443,6 +448,7 @@ static void flush_to_ldisc(struct work_struct *work)
        mutex_lock(&buf->lock);
 
        while (1) {
+               unsigned long flags;
                struct tty_buffer *head = buf->head;
                int count;
 
@@ -450,14 +456,19 @@ static void flush_to_ldisc(struct work_struct *work)
                if (atomic_read(&buf->priority))
                        break;
 
+               spin_lock_irqsave(&buf->flush_lock, flags);
                count = head->commit - head->read;
                if (!count) {
-                       if (head->next == NULL)
+                       if (head->next == NULL) {
+                               spin_unlock_irqrestore(&buf->flush_lock, flags);
                                break;
+                       }
                        buf->head = head->next;
+                       spin_unlock_irqrestore(&buf->flush_lock, flags);
                        tty_buffer_free(port, head);
                        continue;
                }
+               spin_unlock_irqrestore(&buf->flush_lock, flags);
 
                count = receive_buf(tty, head, count);
                if (!count)
@@ -512,6 +523,7 @@ void tty_buffer_init(struct tty_port *port)
        struct tty_bufhead *buf = &port->buf;
 
        mutex_init(&buf->lock);
+       spin_lock_init(&buf->flush_lock);
        tty_buffer_reset(&buf->sentinel, 0);
        buf->head = &buf->sentinel;
        buf->tail = &buf->sentinel;
index d3448a90f0f9fed6e59408b03416f12b9182a108..34110719fe03776ee6f989d7efc05d6875339a7f 100644 (file)
@@ -878,9 +878,8 @@ void disassociate_ctty(int on_exit)
        spin_lock_irq(&current->sighand->siglock);
        put_pid(current->signal->tty_old_pgrp);
        current->signal->tty_old_pgrp = NULL;
-       spin_unlock_irq(&current->sighand->siglock);
 
-       tty = get_current_tty();
+       tty = tty_kref_get(current->signal->tty);
        if (tty) {
                unsigned long flags;
                spin_lock_irqsave(&tty->ctrl_lock, flags);
@@ -897,6 +896,7 @@ void disassociate_ctty(int on_exit)
 #endif
        }
 
+       spin_unlock_irq(&current->sighand->siglock);
        /* Now clear signal->tty under the lock */
        read_lock(&tasklist_lock);
        session_clear_tty(task_session(current));
index ca6831c5b763053d146d8c7bbae2f10d85e3c3d1..1cd5d0ba587c8ebaf49c876a086570be4cabd8c9 100644 (file)
@@ -276,6 +276,39 @@ static void hw_phymode_configure(struct ci_hdrc *ci)
        }
 }
 
+/**
+ * ci_usb_phy_init: initialize phy according to different phy type
+ * @ci: the controller
+  *
+ * This function returns an error code if usb_phy_init has failed
+ */
+static int ci_usb_phy_init(struct ci_hdrc *ci)
+{
+       int ret;
+
+       switch (ci->platdata->phy_mode) {
+       case USBPHY_INTERFACE_MODE_UTMI:
+       case USBPHY_INTERFACE_MODE_UTMIW:
+       case USBPHY_INTERFACE_MODE_HSIC:
+               ret = usb_phy_init(ci->transceiver);
+               if (ret)
+                       return ret;
+               hw_phymode_configure(ci);
+               break;
+       case USBPHY_INTERFACE_MODE_ULPI:
+       case USBPHY_INTERFACE_MODE_SERIAL:
+               hw_phymode_configure(ci);
+               ret = usb_phy_init(ci->transceiver);
+               if (ret)
+                       return ret;
+               break;
+       default:
+               ret = usb_phy_init(ci->transceiver);
+       }
+
+       return ret;
+}
+
 /**
  * hw_device_reset: resets chip (execute without interruption)
  * @ci: the controller
@@ -543,8 +576,6 @@ static int ci_hdrc_probe(struct platform_device *pdev)
                return -ENODEV;
        }
 
-       hw_phymode_configure(ci);
-
        if (ci->platdata->phy)
                ci->transceiver = ci->platdata->phy;
        else
@@ -564,7 +595,7 @@ static int ci_hdrc_probe(struct platform_device *pdev)
                return -EPROBE_DEFER;
        }
 
-       ret = usb_phy_init(ci->transceiver);
+       ret = ci_usb_phy_init(ci);
        if (ret) {
                dev_err(dev, "unable to init phy: %d\n", ret);
                return ret;
index 900f7ff805eef548f5b5d79ce16c5fe1f4663a09..904efb6035b06dc6c338a2af32c1732d2cad9074 100644 (file)
@@ -518,13 +518,16 @@ static int acm_port_activate(struct tty_port *port, struct tty_struct *tty)
        if (usb_submit_urb(acm->ctrlurb, GFP_KERNEL)) {
                dev_err(&acm->control->dev,
                        "%s - usb_submit_urb(ctrl irq) failed\n", __func__);
+               usb_autopm_put_interface(acm->control);
                goto error_submit_urb;
        }
 
        acm->ctrlout = ACM_CTRL_DTR | ACM_CTRL_RTS;
        if (acm_set_control(acm, acm->ctrlout) < 0 &&
-           (acm->ctrl_caps & USB_CDC_CAP_LINE))
+           (acm->ctrl_caps & USB_CDC_CAP_LINE)) {
+               usb_autopm_put_interface(acm->control);
                goto error_set_control;
+       }
 
        usb_autopm_put_interface(acm->control);
 
@@ -549,7 +552,6 @@ error_submit_read_urbs:
 error_set_control:
        usb_kill_urb(acm->ctrlurb);
 error_submit_urb:
-       usb_autopm_put_interface(acm->control);
 error_get_interface:
 disconnected:
        mutex_unlock(&acm->mutex);
@@ -1652,13 +1654,27 @@ static const struct usb_device_id acm_ids[] = {
        },
        /* Motorola H24 HSPA module: */
        { USB_DEVICE(0x22b8, 0x2d91) }, /* modem                                */
-       { USB_DEVICE(0x22b8, 0x2d92) }, /* modem           + diagnostics        */
-       { USB_DEVICE(0x22b8, 0x2d93) }, /* modem + AT port                      */
-       { USB_DEVICE(0x22b8, 0x2d95) }, /* modem + AT port + diagnostics        */
-       { USB_DEVICE(0x22b8, 0x2d96) }, /* modem                         + NMEA */
-       { USB_DEVICE(0x22b8, 0x2d97) }, /* modem           + diagnostics + NMEA */
-       { USB_DEVICE(0x22b8, 0x2d99) }, /* modem + AT port               + NMEA */
-       { USB_DEVICE(0x22b8, 0x2d9a) }, /* modem + AT port + diagnostics + NMEA */
+       { USB_DEVICE(0x22b8, 0x2d92),   /* modem           + diagnostics        */
+       .driver_info = NO_UNION_NORMAL, /* handle only modem interface          */
+       },
+       { USB_DEVICE(0x22b8, 0x2d93),   /* modem + AT port                      */
+       .driver_info = NO_UNION_NORMAL, /* handle only modem interface          */
+       },
+       { USB_DEVICE(0x22b8, 0x2d95),   /* modem + AT port + diagnostics        */
+       .driver_info = NO_UNION_NORMAL, /* handle only modem interface          */
+       },
+       { USB_DEVICE(0x22b8, 0x2d96),   /* modem                         + NMEA */
+       .driver_info = NO_UNION_NORMAL, /* handle only modem interface          */
+       },
+       { USB_DEVICE(0x22b8, 0x2d97),   /* modem           + diagnostics + NMEA */
+       .driver_info = NO_UNION_NORMAL, /* handle only modem interface          */
+       },
+       { USB_DEVICE(0x22b8, 0x2d99),   /* modem + AT port               + NMEA */
+       .driver_info = NO_UNION_NORMAL, /* handle only modem interface          */
+       },
+       { USB_DEVICE(0x22b8, 0x2d9a),   /* modem + AT port + diagnostics + NMEA */
+       .driver_info = NO_UNION_NORMAL, /* handle only modem interface          */
+       },
 
        { USB_DEVICE(0x0572, 0x1329), /* Hummingbird huc56s (Conexant) */
        .driver_info = NO_UNION_NORMAL, /* union descriptor misplaced on
index d59d99347d543b145e615c8854667f145bdd994f..1f02e65fe3056e609fc0b060f4878f4f5a372598 100644 (file)
@@ -75,7 +75,7 @@ static void for_each_companion(struct pci_dev *pdev, struct usb_hcd *hcd,
                                PCI_SLOT(companion->devfn) != slot)
                        continue;
                companion_hcd = pci_get_drvdata(companion);
-               if (!companion_hcd)
+               if (!companion_hcd || !companion_hcd->self.root_hub)
                        continue;
                fn(pdev, hcd, companion, companion_hcd);
        }
index d001417e8e370cd7f3e7fa2d9b9c2678271987dc..10aaaae9af25e8f6b797f063b5e5ba64ec37c847 100644 (file)
@@ -821,6 +821,7 @@ static void dwc3_complete(struct device *dev)
 
        spin_lock_irqsave(&dwc->lock, flags);
 
+       dwc3_event_buffers_setup(dwc);
        switch (dwc->dr_mode) {
        case USB_DR_MODE_PERIPHERAL:
        case USB_DR_MODE_OTG:
@@ -828,7 +829,6 @@ static void dwc3_complete(struct device *dev)
                /* FALLTHROUGH */
        case USB_DR_MODE_HOST:
        default:
-               dwc3_event_buffers_setup(dwc);
                break;
        }
 
index a740eac74d56d502675107f03ffbd324e85f1f63..70715eeededda3b4acfab6bff72f13531338a8b2 100644 (file)
@@ -187,15 +187,12 @@ int dwc3_gadget_resize_tx_fifos(struct dwc3 *dwc)
         * improve this algorithm so that we better use the internal
         * FIFO space
         */
-       for (num = 0; num < DWC3_ENDPOINTS_NUM; num++) {
-               struct dwc3_ep  *dep = dwc->eps[num];
-               int             fifo_number = dep->number >> 1;
+       for (num = 0; num < dwc->num_in_eps; num++) {
+               /* bit0 indicates direction; 1 means IN ep */
+               struct dwc3_ep  *dep = dwc->eps[(num << 1) | 1];
                int             mult = 1;
                int             tmp;
 
-               if (!(dep->number & 1))
-                       continue;
-
                if (!(dep->flags & DWC3_EP_ENABLED))
                        continue;
 
@@ -224,8 +221,7 @@ int dwc3_gadget_resize_tx_fifos(struct dwc3 *dwc)
                dev_vdbg(dwc->dev, "%s: Fifo Addr %04x Size %d\n",
                                dep->name, last_fifo_depth, fifo_size & 0xffff);
 
-               dwc3_writel(dwc->regs, DWC3_GTXFIFOSIZ(fifo_number),
-                               fifo_size);
+               dwc3_writel(dwc->regs, DWC3_GTXFIFOSIZ(num), fifo_size);
 
                last_fifo_depth += (fifo_size & 0xffff);
        }
index 2e164dca08e89fc29ea1887f0afe7b2a09e1a5af..1e12b3ee56fd837117a03266cf66205bb418b366 100644 (file)
@@ -745,6 +745,12 @@ static ssize_t ffs_epfile_io(struct file *file, struct ffs_io_data *io_data)
                 */
                struct usb_gadget *gadget = epfile->ffs->gadget;
 
+               spin_lock_irq(&epfile->ffs->eps_lock);
+               /* In the meantime, endpoint got disabled or changed. */
+               if (epfile->ep != ep) {
+                       spin_unlock_irq(&epfile->ffs->eps_lock);
+                       return -ESHUTDOWN;
+               }
                /*
                 * Controller may require buffer size to be aligned to
                 * maxpacketsize of an out endpoint.
@@ -752,6 +758,7 @@ static ssize_t ffs_epfile_io(struct file *file, struct ffs_io_data *io_data)
                data_len = io_data->read ?
                           usb_ep_align_maybe(gadget, ep->ep, io_data->len) :
                           io_data->len;
+               spin_unlock_irq(&epfile->ffs->eps_lock);
 
                data = kmalloc(data_len, GFP_KERNEL);
                if (unlikely(!data))
index c11761ce511302fbc386791937a4fecf8a98cfa0..9a4f49dc6ac4f879cfac9496c49951b21c18fe71 100644 (file)
@@ -377,7 +377,7 @@ static struct sk_buff *rndis_add_header(struct gether *port,
        if (skb2)
                rndis_add_hdr(skb2);
 
-       dev_kfree_skb_any(skb);
+       dev_kfree_skb(skb);
        return skb2;
 }
 
index 15960af0f67ea7805e22e9fea6671c2635e16153..a2f26cdb56fef07a0a15e8bb329c089413efab6a 100644 (file)
@@ -1219,6 +1219,10 @@ static int fsl_pullup(struct usb_gadget *gadget, int is_on)
        struct fsl_udc *udc;
 
        udc = container_of(gadget, struct fsl_udc, gadget);
+
+       if (!udc->vbus_active)
+               return -EOPNOTSUPP;
+
        udc->softconnect = (is_on != 0);
        if (can_pullup(udc))
                fsl_writel((fsl_readl(&dr_regs->usbcmd) | USB_CMD_RUN_STOP),
@@ -2532,8 +2536,8 @@ static int __exit fsl_udc_remove(struct platform_device *pdev)
        if (!udc_controller)
                return -ENODEV;
 
-       usb_del_gadget_udc(&udc_controller->gadget);
        udc_controller->done = &done;
+       usb_del_gadget_udc(&udc_controller->gadget);
 
        fsl_udc_clk_release();
 
index b5be6f0308c270f2a844db3f00e7884380e5c2e6..a925d0cbcd4199d777071408f8e335119932b3ab 100644 (file)
@@ -2043,6 +2043,7 @@ gadgetfs_fill_super (struct super_block *sb, void *opts, int silent)
                return -ESRCH;
 
        /* fake probe to determine $CHIP */
+       CHIP = NULL;
        usb_gadget_probe_driver(&probe_driver);
        if (!CHIP)
                return -ENODEV;
index d822d822efb34d38b1621d4d63478c82cd6ec9e3..7ed452d90f4d76c9d48c2bb3c2f55a8d40a0f5e9 100644 (file)
@@ -35,6 +35,7 @@
 #include <asm/byteorder.h>
 #include <asm/unaligned.h>
 
+#include "u_rndis.h"
 
 #undef VERBOSE_DEBUG
 
index 50d09c289137024271a480acab22ff1d8443d96e..b7d4f82872b700e14d4fc2469bcc1f936a94bf61 100644 (file)
@@ -48,8 +48,6 @@
 
 #define UETH__VERSION  "29-May-2008"
 
-#define GETHER_NAPI_WEIGHT     32
-
 struct eth_dev {
        /* lock is held while accessing port_usb
         */
@@ -74,7 +72,6 @@ struct eth_dev {
                                                struct sk_buff_head *list);
 
        struct work_struct      work;
-       struct napi_struct      rx_napi;
 
        unsigned long           todo;
 #define        WORK_RX_MEMORY          0
@@ -256,16 +253,18 @@ enomem:
                DBG(dev, "rx submit --> %d\n", retval);
                if (skb)
                        dev_kfree_skb_any(skb);
+               spin_lock_irqsave(&dev->req_lock, flags);
+               list_add(&req->list, &dev->rx_reqs);
+               spin_unlock_irqrestore(&dev->req_lock, flags);
        }
        return retval;
 }
 
 static void rx_complete(struct usb_ep *ep, struct usb_request *req)
 {
-       struct sk_buff  *skb = req->context;
+       struct sk_buff  *skb = req->context, *skb2;
        struct eth_dev  *dev = ep->driver_data;
        int             status = req->status;
-       bool            rx_queue = 0;
 
        switch (status) {
 
@@ -289,8 +288,30 @@ static void rx_complete(struct usb_ep *ep, struct usb_request *req)
                } else {
                        skb_queue_tail(&dev->rx_frames, skb);
                }
-               if (!status)
-                       rx_queue = 1;
+               skb = NULL;
+
+               skb2 = skb_dequeue(&dev->rx_frames);
+               while (skb2) {
+                       if (status < 0
+                                       || ETH_HLEN > skb2->len
+                                       || skb2->len > VLAN_ETH_FRAME_LEN) {
+                               dev->net->stats.rx_errors++;
+                               dev->net->stats.rx_length_errors++;
+                               DBG(dev, "rx length %d\n", skb2->len);
+                               dev_kfree_skb_any(skb2);
+                               goto next_frame;
+                       }
+                       skb2->protocol = eth_type_trans(skb2, dev->net);
+                       dev->net->stats.rx_packets++;
+                       dev->net->stats.rx_bytes += skb2->len;
+
+                       /* no buffer copies needed, unless hardware can't
+                        * use skb buffers.
+                        */
+                       status = netif_rx(skb2);
+next_frame:
+                       skb2 = skb_dequeue(&dev->rx_frames);
+               }
                break;
 
        /* software-driven interface shutdown */
@@ -313,20 +334,22 @@ quiesce:
                /* FALLTHROUGH */
 
        default:
-               rx_queue = 1;
-               dev_kfree_skb_any(skb);
                dev->net->stats.rx_errors++;
                DBG(dev, "rx status %d\n", status);
                break;
        }
 
+       if (skb)
+               dev_kfree_skb_any(skb);
+       if (!netif_running(dev->net)) {
 clean:
                spin_lock(&dev->req_lock);
                list_add(&req->list, &dev->rx_reqs);
                spin_unlock(&dev->req_lock);
-
-       if (rx_queue && likely(napi_schedule_prep(&dev->rx_napi)))
-               __napi_schedule(&dev->rx_napi);
+               req = NULL;
+       }
+       if (req)
+               rx_submit(dev, req, GFP_ATOMIC);
 }
 
 static int prealloc(struct list_head *list, struct usb_ep *ep, unsigned n)
@@ -391,24 +414,16 @@ static void rx_fill(struct eth_dev *dev, gfp_t gfp_flags)
 {
        struct usb_request      *req;
        unsigned long           flags;
-       int                     rx_counts = 0;
 
        /* fill unused rxq slots with some skb */
        spin_lock_irqsave(&dev->req_lock, flags);
        while (!list_empty(&dev->rx_reqs)) {
-
-               if (++rx_counts > qlen(dev->gadget, dev->qmult))
-                       break;
-
                req = container_of(dev->rx_reqs.next,
                                struct usb_request, list);
                list_del_init(&req->list);
                spin_unlock_irqrestore(&dev->req_lock, flags);
 
                if (rx_submit(dev, req, gfp_flags) < 0) {
-                       spin_lock_irqsave(&dev->req_lock, flags);
-                       list_add(&req->list, &dev->rx_reqs);
-                       spin_unlock_irqrestore(&dev->req_lock, flags);
                        defer_kevent(dev, WORK_RX_MEMORY);
                        return;
                }
@@ -418,41 +433,6 @@ static void rx_fill(struct eth_dev *dev, gfp_t gfp_flags)
        spin_unlock_irqrestore(&dev->req_lock, flags);
 }
 
-static int gether_poll(struct napi_struct *napi, int budget)
-{
-       struct eth_dev  *dev = container_of(napi, struct eth_dev, rx_napi);
-       struct sk_buff  *skb;
-       unsigned int    work_done = 0;
-       int             status = 0;
-
-       while ((skb = skb_dequeue(&dev->rx_frames))) {
-               if (status < 0
-                               || ETH_HLEN > skb->len
-                               || skb->len > VLAN_ETH_FRAME_LEN) {
-                       dev->net->stats.rx_errors++;
-                       dev->net->stats.rx_length_errors++;
-                       DBG(dev, "rx length %d\n", skb->len);
-                       dev_kfree_skb_any(skb);
-                       continue;
-               }
-               skb->protocol = eth_type_trans(skb, dev->net);
-               dev->net->stats.rx_packets++;
-               dev->net->stats.rx_bytes += skb->len;
-
-               status = netif_rx_ni(skb);
-       }
-
-       if (netif_running(dev->net)) {
-               rx_fill(dev, GFP_KERNEL);
-               work_done++;
-       }
-
-       if (work_done < budget)
-               napi_complete(&dev->rx_napi);
-
-       return work_done;
-}
-
 static void eth_work(struct work_struct *work)
 {
        struct eth_dev  *dev = container_of(work, struct eth_dev, work);
@@ -645,7 +625,6 @@ static void eth_start(struct eth_dev *dev, gfp_t gfp_flags)
        /* and open the tx floodgates */
        atomic_set(&dev->tx_qlen, 0);
        netif_wake_queue(dev->net);
-       napi_enable(&dev->rx_napi);
 }
 
 static int eth_open(struct net_device *net)
@@ -672,7 +651,6 @@ static int eth_stop(struct net_device *net)
        unsigned long   flags;
 
        VDBG(dev, "%s\n", __func__);
-       napi_disable(&dev->rx_napi);
        netif_stop_queue(net);
 
        DBG(dev, "stop stats: rx/tx %ld/%ld, errs %ld/%ld\n",
@@ -790,7 +768,6 @@ struct eth_dev *gether_setup_name(struct usb_gadget *g,
                return ERR_PTR(-ENOMEM);
 
        dev = netdev_priv(net);
-       netif_napi_add(net, &dev->rx_napi, gether_poll, GETHER_NAPI_WEIGHT);
        spin_lock_init(&dev->lock);
        spin_lock_init(&dev->req_lock);
        INIT_WORK(&dev->work, eth_work);
@@ -853,7 +830,6 @@ struct net_device *gether_setup_name_default(const char *netname)
                return ERR_PTR(-ENOMEM);
 
        dev = netdev_priv(net);
-       netif_napi_add(net, &dev->rx_napi, gether_poll, GETHER_NAPI_WEIGHT);
        spin_lock_init(&dev->lock);
        spin_lock_init(&dev->req_lock);
        INIT_WORK(&dev->work, eth_work);
@@ -1137,7 +1113,6 @@ void gether_disconnect(struct gether *link)
 {
        struct eth_dev          *dev = link->ioport;
        struct usb_request      *req;
-       struct sk_buff          *skb;
 
        WARN_ON(!dev);
        if (!dev)
@@ -1164,12 +1139,6 @@ void gether_disconnect(struct gether *link)
                spin_lock(&dev->req_lock);
        }
        spin_unlock(&dev->req_lock);
-
-       spin_lock(&dev->rx_frames.lock);
-       while ((skb = __skb_dequeue(&dev->rx_frames)))
-               dev_kfree_skb_any(skb);
-       spin_unlock(&dev->rx_frames.lock);
-
        link->in_ep->driver_data = NULL;
        link->in_ep->desc = NULL;
 
index 9f170c53e3d9a96d97c6978502ba6f4240189438..134f354ede62e1b9f35ff189b0feda75aad4ac92 100644 (file)
@@ -300,7 +300,7 @@ static int __init zero_bind(struct usb_composite_dev *cdev)
        ss_opts->isoc_interval = gzero_options.isoc_interval;
        ss_opts->isoc_maxpacket = gzero_options.isoc_maxpacket;
        ss_opts->isoc_mult = gzero_options.isoc_mult;
-       ss_opts->isoc_maxburst = gzero_options.isoc_maxpacket;
+       ss_opts->isoc_maxburst = gzero_options.isoc_maxburst;
        ss_opts->bulk_buflen = gzero_options.bulk_buflen;
 
        func_ss = usb_get_function(func_inst_ss);
index d1d8c47777c58935698d0959856d2ac9237f3274..7f425acd9be5e18d88833aab4775b11aa7976ff4 100644 (file)
@@ -212,6 +212,8 @@ static int exynos_ehci_suspend(struct device *dev)
        int rc;
 
        rc = ehci_suspend(hcd, do_wakeup);
+       if (rc)
+               return rc;
 
        if (exynos_ehci->otg)
                exynos_ehci->otg->set_host(exynos_ehci->otg, &hcd->self);
index b3a0e11073aae8a3ed873305cd1737a1d2a45beb..c7dd93aad20c59c4ace574a5e25a507bb267baa1 100644 (file)
@@ -303,6 +303,8 @@ static int ehci_platform_suspend(struct device *dev)
        int ret;
 
        ret = ehci_suspend(hcd, do_wakeup);
+       if (ret)
+               return ret;
 
        if (pdata->power_suspend)
                pdata->power_suspend(pdev);
index 27ac6ad53c3d9eda25c1f20c3ede43c46f3dd500..7ef00ecb0da10e2d13077f2467b10cd23e2b78ca 100644 (file)
@@ -509,8 +509,31 @@ static struct platform_driver tegra_ehci_driver = {
        }
 };
 
+static int tegra_ehci_reset(struct usb_hcd *hcd)
+{
+       struct ehci_hcd *ehci = hcd_to_ehci(hcd);
+       int retval;
+       int txfifothresh;
+
+       retval = ehci_setup(hcd);
+       if (retval)
+               return retval;
+
+       /*
+        * We should really pull this value out of tegra_ehci_soc_config, but
+        * to avoid needing access to it, make use of the fact that Tegra20 is
+        * the only one so far that needs a value of 10, and Tegra20 is the
+        * only one which doesn't set has_hostpc.
+        */
+       txfifothresh = ehci->has_hostpc ? 0x10 : 10;
+       ehci_writel(ehci, txfifothresh << 16, &ehci->regs->txfill_tuning);
+
+       return 0;
+}
+
 static const struct ehci_driver_overrides tegra_overrides __initconst = {
        .extra_priv_size        = sizeof(struct tegra_ehci_hcd),
+       .reset                  = tegra_ehci_reset,
 };
 
 static int __init ehci_tegra_init(void)
index af8dc1b92d7550fb558d22ae259c78e244bc15ee..c2c221a332eb481c907a0a4813b857f8162982d6 100644 (file)
@@ -82,14 +82,14 @@ static int ohci_jz4740_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
        u16 wIndex, char *buf, u16 wLength)
 {
        struct jz4740_ohci_hcd *jz4740_ohci = hcd_to_jz4740_hcd(hcd);
-       int ret;
+       int ret = 0;
 
        switch (typeReq) {
-       case SetHubFeature:
+       case SetPortFeature:
                if (wValue == USB_PORT_FEAT_POWER)
                        ret = ohci_jz4740_set_vbus_power(jz4740_ohci, true);
                break;
-       case ClearHubFeature:
+       case ClearPortFeature:
                if (wValue == USB_PORT_FEAT_POWER)
                        ret = ohci_jz4740_set_vbus_power(jz4740_ohci, false);
                break;
index 47390e369cd402f776c20bbb35b4c37223f04057..35d44778070786109262d96c95341758675a41e3 100644 (file)
@@ -134,6 +134,8 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
                 */
                if (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)
                        xhci->quirks |= XHCI_SPURIOUS_WAKEUP;
+
+               xhci->quirks |= XHCI_SPURIOUS_REBOOT;
        }
        if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
                        pdev->device == PCI_DEVICE_ID_ASROCK_P67) {
@@ -143,9 +145,7 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
                xhci->quirks |= XHCI_TRUST_TX_LENGTH;
        }
        if (pdev->vendor == PCI_VENDOR_ID_RENESAS &&
-                       pdev->device == 0x0015 &&
-                       pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG &&
-                       pdev->subsystem_device == 0xc0cd)
+                       pdev->device == 0x0015)
                xhci->quirks |= XHCI_RESET_ON_RESUME;
        if (pdev->vendor == PCI_VENDOR_ID_VIA)
                xhci->quirks |= XHCI_RESET_ON_RESUME;
index 5f926bea5ab1d87a54054ad68555ea31bd62cb63..7a0e3c720c005faed89e3caa55eeff73f1fd113c 100644 (file)
@@ -550,6 +550,7 @@ void xhci_find_new_dequeue_state(struct xhci_hcd *xhci,
        struct xhci_ring *ep_ring;
        struct xhci_generic_trb *trb;
        dma_addr_t addr;
+       u64 hw_dequeue;
 
        ep_ring = xhci_triad_to_transfer_ring(xhci, slot_id,
                        ep_index, stream_id);
@@ -559,16 +560,6 @@ void xhci_find_new_dequeue_state(struct xhci_hcd *xhci,
                                stream_id);
                return;
        }
-       state->new_cycle_state = 0;
-       xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
-                       "Finding segment containing stopped TRB.");
-       state->new_deq_seg = find_trb_seg(cur_td->start_seg,
-                       dev->eps[ep_index].stopped_trb,
-                       &state->new_cycle_state);
-       if (!state->new_deq_seg) {
-               WARN_ON(1);
-               return;
-       }
 
        /* Dig out the cycle state saved by the xHC during the stop ep cmd */
        xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
@@ -577,46 +568,57 @@ void xhci_find_new_dequeue_state(struct xhci_hcd *xhci,
        if (ep->ep_state & EP_HAS_STREAMS) {
                struct xhci_stream_ctx *ctx =
                        &ep->stream_info->stream_ctx_array[stream_id];
-               state->new_cycle_state = 0x1 & le64_to_cpu(ctx->stream_ring);
+               hw_dequeue = le64_to_cpu(ctx->stream_ring);
        } else {
                struct xhci_ep_ctx *ep_ctx
                        = xhci_get_ep_ctx(xhci, dev->out_ctx, ep_index);
-               state->new_cycle_state = 0x1 & le64_to_cpu(ep_ctx->deq);
+               hw_dequeue = le64_to_cpu(ep_ctx->deq);
        }
 
+       /* Find virtual address and segment of hardware dequeue pointer */
+       state->new_deq_seg = ep_ring->deq_seg;
+       state->new_deq_ptr = ep_ring->dequeue;
+       while (xhci_trb_virt_to_dma(state->new_deq_seg, state->new_deq_ptr)
+                       != (dma_addr_t)(hw_dequeue & ~0xf)) {
+               next_trb(xhci, ep_ring, &state->new_deq_seg,
+                                       &state->new_deq_ptr);
+               if (state->new_deq_ptr == ep_ring->dequeue) {
+                       WARN_ON(1);
+                       return;
+               }
+       }
+       /*
+        * Find cycle state for last_trb, starting at old cycle state of
+        * hw_dequeue. If there is only one segment ring, find_trb_seg() will
+        * return immediately and cannot toggle the cycle state if this search
+        * wraps around, so add one more toggle manually in that case.
+        */
+       state->new_cycle_state = hw_dequeue & 0x1;
+       if (ep_ring->first_seg == ep_ring->first_seg->next &&
+                       cur_td->last_trb < state->new_deq_ptr)
+               state->new_cycle_state ^= 0x1;
+
        state->new_deq_ptr = cur_td->last_trb;
        xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
                        "Finding segment containing last TRB in TD.");
        state->new_deq_seg = find_trb_seg(state->new_deq_seg,
-                       state->new_deq_ptr,
-                       &state->new_cycle_state);
+                       state->new_deq_ptr, &state->new_cycle_state);
        if (!state->new_deq_seg) {
                WARN_ON(1);
                return;
        }
 
+       /* Increment to find next TRB after last_trb. Cycle if appropriate. */
        trb = &state->new_deq_ptr->generic;
        if (TRB_TYPE_LINK_LE32(trb->field[3]) &&
            (trb->field[3] & cpu_to_le32(LINK_TOGGLE)))
                state->new_cycle_state ^= 0x1;
        next_trb(xhci, ep_ring, &state->new_deq_seg, &state->new_deq_ptr);
 
-       /*
-        * If there is only one segment in a ring, find_trb_seg()'s while loop
-        * will not run, and it will return before it has a chance to see if it
-        * needs to toggle the cycle bit.  It can't tell if the stalled transfer
-        * ended just before the link TRB on a one-segment ring, or if the TD
-        * wrapped around the top of the ring, because it doesn't have the TD in
-        * question.  Look for the one-segment case where stalled TRB's address
-        * is greater than the new dequeue pointer address.
-        */
-       if (ep_ring->first_seg == ep_ring->first_seg->next &&
-                       state->new_deq_ptr < dev->eps[ep_index].stopped_trb)
-               state->new_cycle_state ^= 0x1;
+       /* Don't update the ring cycle state for the producer (us). */
        xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
                        "Cycle state = 0x%x", state->new_cycle_state);
 
-       /* Don't update the ring cycle state for the producer (us). */
        xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
                        "New dequeue segment = %p (virtual)",
                        state->new_deq_seg);
@@ -799,7 +801,6 @@ static void xhci_handle_cmd_stop_ep(struct xhci_hcd *xhci, int slot_id,
        if (list_empty(&ep->cancelled_td_list)) {
                xhci_stop_watchdog_timer_in_irq(xhci, ep);
                ep->stopped_td = NULL;
-               ep->stopped_trb = NULL;
                ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
                return;
        }
@@ -867,11 +868,9 @@ remove_finished_td:
                ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
        }
 
-       /* Clear stopped_td and stopped_trb if endpoint is not halted */
-       if (!(ep->ep_state & EP_HALTED)) {
+       /* Clear stopped_td if endpoint is not halted */
+       if (!(ep->ep_state & EP_HALTED))
                ep->stopped_td = NULL;
-               ep->stopped_trb = NULL;
-       }
 
        /*
         * Drop the lock and complete the URBs in the cancelled TD list.
@@ -1941,14 +1940,12 @@ static void xhci_cleanup_halted_endpoint(struct xhci_hcd *xhci,
        struct xhci_virt_ep *ep = &xhci->devs[slot_id]->eps[ep_index];
        ep->ep_state |= EP_HALTED;
        ep->stopped_td = td;
-       ep->stopped_trb = event_trb;
        ep->stopped_stream = stream_id;
 
        xhci_queue_reset_ep(xhci, slot_id, ep_index);
        xhci_cleanup_stalled_ring(xhci, td->urb->dev, ep_index);
 
        ep->stopped_td = NULL;
-       ep->stopped_trb = NULL;
        ep->stopped_stream = 0;
 
        xhci_ring_cmd_db(xhci);
@@ -2030,7 +2027,6 @@ static int finish_td(struct xhci_hcd *xhci, struct xhci_td *td,
                 * the ring dequeue pointer or take this TD off any lists yet.
                 */
                ep->stopped_td = td;
-               ep->stopped_trb = event_trb;
                return 0;
        } else {
                if (trb_comp_code == COMP_STALL) {
@@ -2042,7 +2038,6 @@ static int finish_td(struct xhci_hcd *xhci, struct xhci_td *td,
                         * USB class driver clear the stall later.
                         */
                        ep->stopped_td = td;
-                       ep->stopped_trb = event_trb;
                        ep->stopped_stream = ep_ring->stream_id;
                } else if (xhci_requires_manual_halt_cleanup(xhci,
                                        ep_ctx, trb_comp_code)) {
index 8fe4e124ddd49f17fb3ac6d2088cedc15758d7b2..300836972faa41cb11b3c61bf4423f702e2d1d0c 100644 (file)
@@ -408,16 +408,16 @@ static int xhci_try_enable_msi(struct usb_hcd *hcd)
 
 #else
 
-static int xhci_try_enable_msi(struct usb_hcd *hcd)
+static inline int xhci_try_enable_msi(struct usb_hcd *hcd)
 {
        return 0;
 }
 
-static void xhci_cleanup_msix(struct xhci_hcd *xhci)
+static inline void xhci_cleanup_msix(struct xhci_hcd *xhci)
 {
 }
 
-static void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
+static inline void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
 {
 }
 
@@ -2954,7 +2954,6 @@ void xhci_endpoint_reset(struct usb_hcd *hcd,
                xhci_ring_cmd_db(xhci);
        }
        virt_ep->stopped_td = NULL;
-       virt_ep->stopped_trb = NULL;
        virt_ep->stopped_stream = 0;
        spin_unlock_irqrestore(&xhci->lock, flags);
 
index d280e9213d08614002030573afcb2b93a5bbe9c8..4746816aed3e7c42097d10986acfff09e19ac27b 100644 (file)
@@ -865,8 +865,6 @@ struct xhci_virt_ep {
 #define EP_GETTING_NO_STREAMS  (1 << 5)
        /* ----  Related to URB cancellation ---- */
        struct list_head        cancelled_td_list;
-       /* The TRB that was last reported in a stopped endpoint ring */
-       union xhci_trb          *stopped_trb;
        struct xhci_td          *stopped_td;
        unsigned int            stopped_stream;
        /* Watchdog timer for stop endpoint command to cancel URBs */
index 3372ded5def79853e75ac79ecc66b74d73c63542..e2fd263585de3fb2d8cb5cab3e782eff5675a198 100644 (file)
@@ -470,8 +470,9 @@ static int dsps_musb_exit(struct musb *musb)
        struct dsps_glue *glue = dev_get_drvdata(dev->parent);
 
        del_timer_sync(&glue->timer);
-
        usb_phy_shutdown(musb->xceiv);
+       debugfs_remove_recursive(glue->dbgfs_root);
+
        return 0;
 }
 
@@ -708,8 +709,6 @@ static int dsps_remove(struct platform_device *pdev)
        pm_runtime_put(&pdev->dev);
        pm_runtime_disable(&pdev->dev);
 
-       debugfs_remove_recursive(glue->dbgfs_root);
-
        return 0;
 }
 
index d341c149a2f90c1372201b9a78aff8a89d4f3e6f..d369bf1f3936cba910de97a4859c27174dbed8a5 100644 (file)
@@ -316,7 +316,13 @@ static void omap_musb_mailbox_work(struct work_struct *mailbox_work)
 {
        struct omap2430_glue *glue = container_of(mailbox_work,
                                struct omap2430_glue, omap_musb_mailbox_work);
+       struct musb *musb = glue_to_musb(glue);
+       struct device *dev = musb->controller;
+
+       pm_runtime_get_sync(dev);
        omap_musb_set_mailbox(glue);
+       pm_runtime_mark_last_busy(dev);
+       pm_runtime_put_autosuspend(dev);
 }
 
 static irqreturn_t omap2430_musb_interrupt(int irq, void *__hci)
@@ -416,6 +422,7 @@ static int omap2430_musb_init(struct musb *musb)
                omap_musb_set_mailbox(glue);
 
        phy_init(musb->phy);
+       phy_power_on(musb->phy);
 
        pm_runtime_put_noidle(musb->controller);
        return 0;
@@ -478,6 +485,7 @@ static int omap2430_musb_exit(struct musb *musb)
        del_timer_sync(&musb_idle_timer);
 
        omap2430_low_level_exit(musb);
+       phy_power_off(musb->phy);
        phy_exit(musb->phy);
 
        return 0;
index d75196ad5f2f6e7a13a76e16f283464ae875507e..35b6083b799949bc30f4f359ee62a55542959ca9 100644 (file)
@@ -3,6 +3,7 @@
 #include <linux/err.h>
 #include <linux/of.h>
 #include <linux/io.h>
+#include <linux/delay.h>
 #include "am35x-phy-control.h"
 
 struct am335x_control_usb {
@@ -86,6 +87,14 @@ static void am335x_phy_power(struct phy_control *phy_ctrl, u32 id, bool on)
        }
 
        writel(val, usb_ctrl->phy_reg + reg);
+
+       /*
+        * Give the PHY ~1ms to complete the power up operation.
+        * Tests have shown unstable behaviour if other USB PHY related
+        * registers are written too shortly after such a transition.
+        */
+       if (on)
+               mdelay(1);
 }
 
 static const struct phy_control ctrl_am335x = {
index 8afa813d690bc6f7aa15c9b9c7523cf96b24099a..36b6bce33b20c17df4583e5ce5e9b07298335842 100644 (file)
@@ -132,6 +132,9 @@ struct usb_phy *usb_get_phy(enum usb_phy_type type)
        if (IS_ERR(phy) || !try_module_get(phy->dev->driver->owner)) {
                pr_debug("PHY: unable to find transceiver of type %s\n",
                        usb_phy_type_string(type));
+               if (!IS_ERR(phy))
+                       phy = ERR_PTR(-ENODEV);
+
                goto err0;
        }
 
index 95fa1217afdd7e8184377ead839c37815229a640..762e4a5f5ae9dd645e8a3899fc77de6e498b5e07 100644 (file)
@@ -104,6 +104,7 @@ static const struct usb_device_id id_table[] = {
        { USB_DEVICE(0x10C4, 0x8218) }, /* Lipowsky Industrie Elektronik GmbH, HARP-1 */
        { USB_DEVICE(0x10C4, 0x822B) }, /* Modem EDGE(GSM) Comander 2 */
        { USB_DEVICE(0x10C4, 0x826B) }, /* Cygnal Integrated Products, Inc., Fasttrax GPS demonstration module */
+       { USB_DEVICE(0x10C4, 0x8281) }, /* Nanotec Plug & Drive */
        { USB_DEVICE(0x10C4, 0x8293) }, /* Telegesis ETRX2USB */
        { USB_DEVICE(0x10C4, 0x82F9) }, /* Procyon AVS */
        { USB_DEVICE(0x10C4, 0x8341) }, /* Siemens MC35PU GPRS Modem */
index 44ab1298680557f840d243056d7fc4812d7adc0d..7c6e1dedeb0684ddd22800777078e1232f3c1f83 100644 (file)
@@ -909,6 +909,39 @@ static const struct usb_device_id id_table_combined[] = {
        { USB_DEVICE(FTDI_VID, FTDI_Z3X_PID) },
        /* Cressi Devices */
        { USB_DEVICE(FTDI_VID, FTDI_CRESSI_PID) },
+       /* Brainboxes Devices */
+       { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_VX_001_PID) },
+       { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_VX_012_PID) },
+       { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_VX_023_PID) },
+       { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_VX_034_PID) },
+       { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_101_PID) },
+       { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_160_1_PID) },
+       { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_160_2_PID) },
+       { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_160_3_PID) },
+       { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_160_4_PID) },
+       { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_160_5_PID) },
+       { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_160_6_PID) },
+       { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_160_7_PID) },
+       { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_160_8_PID) },
+       { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_257_PID) },
+       { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_279_1_PID) },
+       { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_279_2_PID) },
+       { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_279_3_PID) },
+       { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_279_4_PID) },
+       { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_313_PID) },
+       { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_324_PID) },
+       { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_346_1_PID) },
+       { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_346_2_PID) },
+       { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_357_PID) },
+       { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_606_1_PID) },
+       { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_606_2_PID) },
+       { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_606_3_PID) },
+       { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_701_1_PID) },
+       { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_701_2_PID) },
+       { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_842_1_PID) },
+       { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_842_2_PID) },
+       { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_842_3_PID) },
+       { USB_DEVICE(BRAINBOXES_VID, BRAINBOXES_US_842_4_PID) },
        { }                                     /* Terminating entry */
 };
 
index e599fbfcde5f8fd5055f29f464fdaea13c130cb5..993c93df6874827e87bd06798dc8e8b370ef1b1e 100644 (file)
  * Manufacturer: Cressi
  */
 #define FTDI_CRESSI_PID                0x87d0
+
+/*
+ * Brainboxes devices
+ */
+#define BRAINBOXES_VID                 0x05d1
+#define BRAINBOXES_VX_001_PID          0x1001 /* VX-001 ExpressCard 1 Port RS232 */
+#define BRAINBOXES_VX_012_PID          0x1002 /* VX-012 ExpressCard 2 Port RS232 */
+#define BRAINBOXES_VX_023_PID          0x1003 /* VX-023 ExpressCard 1 Port RS422/485 */
+#define BRAINBOXES_VX_034_PID          0x1004 /* VX-034 ExpressCard 2 Port RS422/485 */
+#define BRAINBOXES_US_101_PID          0x1011 /* US-101 1xRS232 */
+#define BRAINBOXES_US_324_PID          0x1013 /* US-324 1xRS422/485 1Mbaud */
+#define BRAINBOXES_US_606_1_PID                0x2001 /* US-606 6 Port RS232 Serial Port 1 and 2 */
+#define BRAINBOXES_US_606_2_PID                0x2002 /* US-606 6 Port RS232 Serial Port 3 and 4 */
+#define BRAINBOXES_US_606_3_PID                0x2003 /* US-606 6 Port RS232 Serial Port 4 and 6 */
+#define BRAINBOXES_US_701_1_PID                0x2011 /* US-701 4xRS232 1Mbaud Port 1 and 2 */
+#define BRAINBOXES_US_701_2_PID                0x2012 /* US-701 4xRS422 1Mbaud Port 3 and 4 */
+#define BRAINBOXES_US_279_1_PID                0x2021 /* US-279 8xRS422 1Mbaud Port 1 and 2 */
+#define BRAINBOXES_US_279_2_PID                0x2022 /* US-279 8xRS422 1Mbaud Port 3 and 4 */
+#define BRAINBOXES_US_279_3_PID                0x2023 /* US-279 8xRS422 1Mbaud Port 5 and 6 */
+#define BRAINBOXES_US_279_4_PID                0x2024 /* US-279 8xRS422 1Mbaud Port 7 and 8 */
+#define BRAINBOXES_US_346_1_PID                0x3011 /* US-346 4xRS422/485 1Mbaud Port 1 and 2 */
+#define BRAINBOXES_US_346_2_PID                0x3012 /* US-346 4xRS422/485 1Mbaud Port 3 and 4 */
+#define BRAINBOXES_US_257_PID          0x5001 /* US-257 2xRS232 1Mbaud */
+#define BRAINBOXES_US_313_PID          0x6001 /* US-313 2xRS422/485 1Mbaud */
+#define BRAINBOXES_US_357_PID          0x7001 /* US_357 1xRS232/422/485 */
+#define BRAINBOXES_US_842_1_PID                0x8001 /* US-842 8xRS422/485 1Mbaud Port 1 and 2 */
+#define BRAINBOXES_US_842_2_PID                0x8002 /* US-842 8xRS422/485 1Mbaud Port 3 and 4 */
+#define BRAINBOXES_US_842_3_PID                0x8003 /* US-842 8xRS422/485 1Mbaud Port 5 and 6 */
+#define BRAINBOXES_US_842_4_PID                0x8004 /* US-842 8xRS422/485 1Mbaud Port 7 and 8 */
+#define BRAINBOXES_US_160_1_PID                0x9001 /* US-160 16xRS232 1Mbaud Port 1 and 2 */
+#define BRAINBOXES_US_160_2_PID                0x9002 /* US-160 16xRS232 1Mbaud Port 3 and 4 */
+#define BRAINBOXES_US_160_3_PID                0x9003 /* US-160 16xRS232 1Mbaud Port 5 and 6 */
+#define BRAINBOXES_US_160_4_PID                0x9004 /* US-160 16xRS232 1Mbaud Port 7 and 8 */
+#define BRAINBOXES_US_160_5_PID                0x9005 /* US-160 16xRS232 1Mbaud Port 9 and 10 */
+#define BRAINBOXES_US_160_6_PID                0x9006 /* US-160 16xRS232 1Mbaud Port 11 and 12 */
+#define BRAINBOXES_US_160_7_PID                0x9007 /* US-160 16xRS232 1Mbaud Port 13 and 14 */
+#define BRAINBOXES_US_160_8_PID                0x9008 /* US-160 16xRS232 1Mbaud Port 15 and 16 */
index a2db5be9c30534ceae25eb262bde00242a152e2d..df90dae53eb97cde7d9e1d6ebf47233c7b3bb149 100644 (file)
@@ -28,6 +28,7 @@
 #include <linux/spinlock.h>
 #include <linux/mutex.h>
 #include <linux/serial.h>
+#include <linux/swab.h>
 #include <linux/kfifo.h>
 #include <linux/ioctl.h>
 #include <linux/firmware.h>
@@ -280,7 +281,7 @@ static int read_download_mem(struct usb_device *dev, int start_address,
 {
        int status = 0;
        __u8 read_length;
-       __be16 be_start_address;
+       u16 be_start_address;
 
        dev_dbg(&dev->dev, "%s - @ %x for %d\n", __func__, start_address, length);
 
@@ -296,10 +297,14 @@ static int read_download_mem(struct usb_device *dev, int start_address,
                if (read_length > 1) {
                        dev_dbg(&dev->dev, "%s - @ %x for %d\n", __func__, start_address, read_length);
                }
-               be_start_address = cpu_to_be16(start_address);
+               /*
+                * NOTE: Must use swab as wIndex is sent in little-endian
+                *       byte order regardless of host byte order.
+                */
+               be_start_address = swab16((u16)start_address);
                status = ti_vread_sync(dev, UMPC_MEMORY_READ,
                                        (__u16)address_type,
-                                       (__force __u16)be_start_address,
+                                       be_start_address,
                                        buffer, read_length);
 
                if (status) {
@@ -394,7 +399,7 @@ static int write_i2c_mem(struct edgeport_serial *serial,
        struct device *dev = &serial->serial->dev->dev;
        int status = 0;
        int write_length;
-       __be16 be_start_address;
+       u16 be_start_address;
 
        /* We can only send a maximum of 1 aligned byte page at a time */
 
@@ -409,11 +414,16 @@ static int write_i2c_mem(struct edgeport_serial *serial,
                __func__, start_address, write_length);
        usb_serial_debug_data(dev, __func__, write_length, buffer);
 
-       /* Write first page */
-       be_start_address = cpu_to_be16(start_address);
+       /*
+        * Write first page.
+        *
+        * NOTE: Must use swab as wIndex is sent in little-endian byte order
+        *       regardless of host byte order.
+        */
+       be_start_address = swab16((u16)start_address);
        status = ti_vsend_sync(serial->serial->dev,
                                UMPC_MEMORY_WRITE, (__u16)address_type,
-                               (__force __u16)be_start_address,
+                               be_start_address,
                                buffer, write_length);
        if (status) {
                dev_dbg(dev, "%s - ERROR %d\n", __func__, status);
@@ -436,11 +446,16 @@ static int write_i2c_mem(struct edgeport_serial *serial,
                        __func__, start_address, write_length);
                usb_serial_debug_data(dev, __func__, write_length, buffer);
 
-               /* Write next page */
-               be_start_address = cpu_to_be16(start_address);
+               /*
+                * Write next page.
+                *
+                * NOTE: Must use swab as wIndex is sent in little-endian byte
+                *       order regardless of host byte order.
+                */
+               be_start_address = swab16((u16)start_address);
                status = ti_vsend_sync(serial->serial->dev, UMPC_MEMORY_WRITE,
                                (__u16)address_type,
-                               (__force __u16)be_start_address,
+                               be_start_address,
                                buffer, write_length);
                if (status) {
                        dev_err(dev, "%s - ERROR %d\n", __func__, status);
@@ -585,8 +600,8 @@ static int get_descriptor_addr(struct edgeport_serial *serial,
                if (rom_desc->Type == desc_type)
                        return start_address;
 
-               start_address = start_address + sizeof(struct ti_i2c_desc)
-                                                       + rom_desc->Size;
+               start_address = start_address + sizeof(struct ti_i2c_desc) +
+                                               le16_to_cpu(rom_desc->Size);
 
        } while ((start_address < TI_MAX_I2C_SIZE) && rom_desc->Type);
 
@@ -599,7 +614,7 @@ static int valid_csum(struct ti_i2c_desc *rom_desc, __u8 *buffer)
        __u16 i;
        __u8 cs = 0;
 
-       for (i = 0; i < rom_desc->Size; i++)
+       for (i = 0; i < le16_to_cpu(rom_desc->Size); i++)
                cs = (__u8)(cs + buffer[i]);
 
        if (cs != rom_desc->CheckSum) {
@@ -650,7 +665,7 @@ static int check_i2c_image(struct edgeport_serial *serial)
                        break;
 
                if ((start_address + sizeof(struct ti_i2c_desc) +
-                                       rom_desc->Size) > TI_MAX_I2C_SIZE) {
+                       le16_to_cpu(rom_desc->Size)) > TI_MAX_I2C_SIZE) {
                        status = -ENODEV;
                        dev_dbg(dev, "%s - structure too big, erroring out.\n", __func__);
                        break;
@@ -665,7 +680,8 @@ static int check_i2c_image(struct edgeport_serial *serial)
                        /* Read the descriptor data */
                        status = read_rom(serial, start_address +
                                                sizeof(struct ti_i2c_desc),
-                                               rom_desc->Size, buffer);
+                                               le16_to_cpu(rom_desc->Size),
+                                               buffer);
                        if (status)
                                break;
 
@@ -674,7 +690,7 @@ static int check_i2c_image(struct edgeport_serial *serial)
                                break;
                }
                start_address = start_address + sizeof(struct ti_i2c_desc) +
-                                                               rom_desc->Size;
+                                               le16_to_cpu(rom_desc->Size);
 
        } while ((rom_desc->Type != I2C_DESC_TYPE_ION) &&
                                (start_address < TI_MAX_I2C_SIZE));
@@ -712,7 +728,7 @@ static int get_manuf_info(struct edgeport_serial *serial, __u8 *buffer)
 
        /* Read the descriptor data */
        status = read_rom(serial, start_address+sizeof(struct ti_i2c_desc),
-                                               rom_desc->Size, buffer);
+                                       le16_to_cpu(rom_desc->Size), buffer);
        if (status)
                goto exit;
 
index 68fc9fe65936e712ba08e9f6825de4773b4cc9a9..f213ee97851650af87a0d22e5173b34a55e1b2de 100644 (file)
@@ -234,8 +234,31 @@ static void option_instat_callback(struct urb *urb);
 #define QUALCOMM_VENDOR_ID                     0x05C6
 
 #define CMOTECH_VENDOR_ID                      0x16d8
-#define CMOTECH_PRODUCT_6008                   0x6008
-#define CMOTECH_PRODUCT_6280                   0x6280
+#define CMOTECH_PRODUCT_6001                   0x6001
+#define CMOTECH_PRODUCT_CMU_300                        0x6002
+#define CMOTECH_PRODUCT_6003                   0x6003
+#define CMOTECH_PRODUCT_6004                   0x6004
+#define CMOTECH_PRODUCT_6005                   0x6005
+#define CMOTECH_PRODUCT_CGU_628A               0x6006
+#define CMOTECH_PRODUCT_CHE_628S               0x6007
+#define CMOTECH_PRODUCT_CMU_301                        0x6008
+#define CMOTECH_PRODUCT_CHU_628                        0x6280
+#define CMOTECH_PRODUCT_CHU_628S               0x6281
+#define CMOTECH_PRODUCT_CDU_680                        0x6803
+#define CMOTECH_PRODUCT_CDU_685A               0x6804
+#define CMOTECH_PRODUCT_CHU_720S               0x7001
+#define CMOTECH_PRODUCT_7002                   0x7002
+#define CMOTECH_PRODUCT_CHU_629K               0x7003
+#define CMOTECH_PRODUCT_7004                   0x7004
+#define CMOTECH_PRODUCT_7005                   0x7005
+#define CMOTECH_PRODUCT_CGU_629                        0x7006
+#define CMOTECH_PRODUCT_CHU_629S               0x700a
+#define CMOTECH_PRODUCT_CHU_720I               0x7211
+#define CMOTECH_PRODUCT_7212                   0x7212
+#define CMOTECH_PRODUCT_7213                   0x7213
+#define CMOTECH_PRODUCT_7251                   0x7251
+#define CMOTECH_PRODUCT_7252                   0x7252
+#define CMOTECH_PRODUCT_7253                   0x7253
 
 #define TELIT_VENDOR_ID                                0x1bc7
 #define TELIT_PRODUCT_UC864E                   0x1003
@@ -243,6 +266,7 @@ static void option_instat_callback(struct urb *urb);
 #define TELIT_PRODUCT_CC864_DUAL               0x1005
 #define TELIT_PRODUCT_CC864_SINGLE             0x1006
 #define TELIT_PRODUCT_DE910_DUAL               0x1010
+#define TELIT_PRODUCT_UE910_V2                 0x1012
 #define TELIT_PRODUCT_LE920                    0x1200
 
 /* ZTE PRODUCTS */
@@ -286,6 +310,7 @@ static void option_instat_callback(struct urb *urb);
 #define ALCATEL_PRODUCT_X060S_X200             0x0000
 #define ALCATEL_PRODUCT_X220_X500D             0x0017
 #define ALCATEL_PRODUCT_L100V                  0x011e
+#define ALCATEL_PRODUCT_L800MA                 0x0203
 
 #define PIRELLI_VENDOR_ID                      0x1266
 #define PIRELLI_PRODUCT_C100_1                 0x1002
@@ -348,6 +373,7 @@ static void option_instat_callback(struct urb *urb);
 #define OLIVETTI_PRODUCT_OLICARD100            0xc000
 #define OLIVETTI_PRODUCT_OLICARD145            0xc003
 #define OLIVETTI_PRODUCT_OLICARD200            0xc005
+#define OLIVETTI_PRODUCT_OLICARD500            0xc00b
 
 /* Celot products */
 #define CELOT_VENDOR_ID                                0x211f
@@ -501,6 +527,10 @@ static const struct option_blacklist_info huawei_cdc12_blacklist = {
        .reserved = BIT(1) | BIT(2),
 };
 
+static const struct option_blacklist_info net_intf0_blacklist = {
+       .reserved = BIT(0),
+};
+
 static const struct option_blacklist_info net_intf1_blacklist = {
        .reserved = BIT(1),
 };
@@ -1034,13 +1064,53 @@ static const struct usb_device_id option_ids[] = {
        { USB_DEVICE(QUALCOMM_VENDOR_ID, 0x6613)}, /* Onda H600/ZTE MF330 */
        { USB_DEVICE(QUALCOMM_VENDOR_ID, 0x0023)}, /* ONYX 3G device */
        { USB_DEVICE(QUALCOMM_VENDOR_ID, 0x9000)}, /* SIMCom SIM5218 */
-       { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_6280) }, /* BP3-USB & BP3-EXT HSDPA */
-       { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_6008) },
+       { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_6001) },
+       { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CMU_300) },
+       { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_6003),
+         .driver_info = (kernel_ulong_t)&net_intf0_blacklist },
+       { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_6004) },
+       { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_6005) },
+       { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CGU_628A) },
+       { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CHE_628S),
+         .driver_info = (kernel_ulong_t)&net_intf0_blacklist },
+       { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CMU_301),
+         .driver_info = (kernel_ulong_t)&net_intf0_blacklist },
+       { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CHU_628),
+         .driver_info = (kernel_ulong_t)&net_intf0_blacklist },
+       { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CHU_628S) },
+       { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CDU_680) },
+       { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CDU_685A) },
+       { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CHU_720S),
+         .driver_info = (kernel_ulong_t)&net_intf0_blacklist },
+       { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_7002),
+         .driver_info = (kernel_ulong_t)&net_intf0_blacklist },
+       { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CHU_629K),
+         .driver_info = (kernel_ulong_t)&net_intf4_blacklist },
+       { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_7004),
+         .driver_info = (kernel_ulong_t)&net_intf3_blacklist },
+       { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_7005) },
+       { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CGU_629),
+         .driver_info = (kernel_ulong_t)&net_intf5_blacklist },
+       { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CHU_629S),
+         .driver_info = (kernel_ulong_t)&net_intf4_blacklist },
+       { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CHU_720I),
+         .driver_info = (kernel_ulong_t)&net_intf0_blacklist },
+       { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_7212),
+         .driver_info = (kernel_ulong_t)&net_intf0_blacklist },
+       { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_7213),
+         .driver_info = (kernel_ulong_t)&net_intf0_blacklist },
+       { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_7251),
+         .driver_info = (kernel_ulong_t)&net_intf1_blacklist },
+       { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_7252),
+         .driver_info = (kernel_ulong_t)&net_intf1_blacklist },
+       { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_7253),
+         .driver_info = (kernel_ulong_t)&net_intf1_blacklist },
        { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_UC864E) },
        { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_UC864G) },
        { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_CC864_DUAL) },
        { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_CC864_SINGLE) },
        { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_DE910_DUAL) },
+       { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_UE910_V2) },
        { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_LE920),
                .driver_info = (kernel_ulong_t)&telit_le920_blacklist },
        { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, ZTE_PRODUCT_MF622, 0xff, 0xff, 0xff) }, /* ZTE WCDMA products */
@@ -1498,6 +1568,8 @@ static const struct usb_device_id option_ids[] = {
          .driver_info = (kernel_ulong_t)&net_intf5_blacklist },
        { USB_DEVICE(ALCATEL_VENDOR_ID, ALCATEL_PRODUCT_L100V),
          .driver_info = (kernel_ulong_t)&net_intf4_blacklist },
+       { USB_DEVICE(ALCATEL_VENDOR_ID, ALCATEL_PRODUCT_L800MA),
+         .driver_info = (kernel_ulong_t)&net_intf2_blacklist },
        { USB_DEVICE(AIRPLUS_VENDOR_ID, AIRPLUS_PRODUCT_MCD650) },
        { USB_DEVICE(TLAYTECH_VENDOR_ID, TLAYTECH_PRODUCT_TEU800) },
        { USB_DEVICE(LONGCHEER_VENDOR_ID, FOUR_G_SYSTEMS_PRODUCT_W14),
@@ -1543,6 +1615,9 @@ static const struct usb_device_id option_ids[] = {
        { USB_DEVICE(OLIVETTI_VENDOR_ID, OLIVETTI_PRODUCT_OLICARD200),
                .driver_info = (kernel_ulong_t)&net_intf6_blacklist
        },
+       { USB_DEVICE(OLIVETTI_VENDOR_ID, OLIVETTI_PRODUCT_OLICARD500),
+               .driver_info = (kernel_ulong_t)&net_intf4_blacklist
+       },
        { USB_DEVICE(CELOT_VENDOR_ID, CELOT_PRODUCT_CT680M) }, /* CT-650 CDMA 450 1xEVDO modem */
        { USB_DEVICE_AND_INTERFACE_INFO(SAMSUNG_VENDOR_ID, SAMSUNG_PRODUCT_GT_B3730, USB_CLASS_CDC_DATA, 0x00, 0x00) }, /* Samsung GT-B3730 LTE USB modem.*/
        { USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CEM600) },
index 2e22fc22c3822fdf7b499417a2742702147d1d3c..b3d5a35c0d4b2e09ee3b0aea7fda1763d510c6a4 100644 (file)
@@ -83,6 +83,9 @@ static const struct usb_device_id id_table[] = {
        { USB_DEVICE(YCCABLE_VENDOR_ID, YCCABLE_PRODUCT_ID) },
        { USB_DEVICE(SUPERIAL_VENDOR_ID, SUPERIAL_PRODUCT_ID) },
        { USB_DEVICE(HP_VENDOR_ID, HP_LD220_PRODUCT_ID) },
+       { USB_DEVICE(HP_VENDOR_ID, HP_LD960_PRODUCT_ID) },
+       { USB_DEVICE(HP_VENDOR_ID, HP_LCM220_PRODUCT_ID) },
+       { USB_DEVICE(HP_VENDOR_ID, HP_LCM960_PRODUCT_ID) },
        { USB_DEVICE(CRESSI_VENDOR_ID, CRESSI_EDY_PRODUCT_ID) },
        { USB_DEVICE(ZEAGLE_VENDOR_ID, ZEAGLE_N2ITION3_PRODUCT_ID) },
        { USB_DEVICE(SONY_VENDOR_ID, SONY_QN3USB_PRODUCT_ID) },
index c38b8c00c06fddd4c71f3508df13f592d2b4480b..42bc082896ac8e9d8f913168a0f209a7bebb673e 100644 (file)
 #define SUPERIAL_VENDOR_ID     0x5372
 #define SUPERIAL_PRODUCT_ID    0x2303
 
-/* Hewlett-Packard LD220-HP POS Pole Display */
+/* Hewlett-Packard POS Pole Displays */
 #define HP_VENDOR_ID           0x03f0
+#define HP_LD960_PRODUCT_ID    0x0b39
+#define HP_LCM220_PRODUCT_ID   0x3139
+#define HP_LCM960_PRODUCT_ID   0x3239
 #define HP_LD220_PRODUCT_ID    0x3524
 
 /* Cressi Edy (diving computer) PC interface */
index 968a40201e5f6e2f2fed8de8e1668977e3f47db4..7ed681a714a58864921bbd96edbfb1f02b92446c 100644 (file)
@@ -136,9 +136,18 @@ static const struct usb_device_id id_table[] = {
        {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x68a2, 0)},       /* Sierra Wireless MC7710 Device Management */
        {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x68a2, 2)},       /* Sierra Wireless MC7710 NMEA */
        {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x68a2, 3)},       /* Sierra Wireless MC7710 Modem */
+       {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x68c0, 0)},       /* Sierra Wireless MC73xx Device Management */
+       {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x68c0, 2)},       /* Sierra Wireless MC73xx NMEA */
+       {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x68c0, 3)},       /* Sierra Wireless MC73xx Modem */
        {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x901c, 0)},       /* Sierra Wireless EM7700 Device Management */
        {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x901c, 2)},       /* Sierra Wireless EM7700 NMEA */
        {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x901c, 3)},       /* Sierra Wireless EM7700 Modem */
+       {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x901f, 0)},       /* Sierra Wireless EM7355 Device Management */
+       {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x901f, 2)},       /* Sierra Wireless EM7355 NMEA */
+       {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x901f, 3)},       /* Sierra Wireless EM7355 Modem */
+       {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x9041, 0)},       /* Sierra Wireless MC7305/MC7355 Device Management */
+       {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x9041, 2)},       /* Sierra Wireless MC7305/MC7355 NMEA */
+       {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x9041, 3)},       /* Sierra Wireless MC7305/MC7355 Modem */
        {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x9051, 0)},       /* Netgear AirCard 340U Device Management */
        {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x9051, 2)},       /* Netgear AirCard 340U NMEA */
        {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x9051, 3)},       /* Netgear AirCard 340U Modem */
index a9eb6221a8155a0cd0882f2f5d50acab7c75c7f2..6b192e602ce0a9c8de8222f20888d9fb77b46139 100644 (file)
@@ -291,7 +291,6 @@ static const struct usb_device_id id_table[] = {
        { USB_DEVICE(0x0f3d, 0x68A3),   /* Airprime/Sierra Wireless Direct IP modems */
          .driver_info = (kernel_ulong_t)&direct_ip_interface_blacklist
        },
-       { USB_DEVICE(0x413C, 0x08133) }, /* Dell Computer Corp. Wireless 5720 VZW Mobile Broadband (EVDO Rev-A) Minicard GPS Port */
 
        { }
 };
index 81fc0dfcfdcf6a073dc408ae7203747b1cd6167b..6d40d56378d77d0a1e4c65f66a2b46cbd81fe396 100644 (file)
@@ -1347,10 +1347,12 @@ static int usb_serial_register(struct usb_serial_driver *driver)
 static void usb_serial_deregister(struct usb_serial_driver *device)
 {
        pr_info("USB Serial deregistering driver %s\n", device->description);
+
        mutex_lock(&table_lock);
        list_del(&device->driver_list);
-       usb_serial_bus_deregister(device);
        mutex_unlock(&table_lock);
+
+       usb_serial_bus_deregister(device);
 }
 
 /**
index 640fe0173236807c3178d53265da8588a01cb730..b078440e822f2b464b323232c4795500a6344582 100644 (file)
@@ -466,6 +466,9 @@ int usb_wwan_port_probe(struct usb_serial_port *port)
        int err;
        int i;
 
+       if (!port->bulk_in_size || !port->bulk_out_size)
+               return -ENODEV;
+
        portdata = kzalloc(sizeof(*portdata), GFP_KERNEL);
        if (!portdata)
                return -ENOMEM;
@@ -473,9 +476,6 @@ int usb_wwan_port_probe(struct usb_serial_port *port)
        init_usb_anchor(&portdata->delayed);
 
        for (i = 0; i < N_IN_URB; i++) {
-               if (!port->bulk_in_size)
-                       break;
-
                buffer = (u8 *)__get_free_page(GFP_KERNEL);
                if (!buffer)
                        goto bail_out_error;
@@ -489,9 +489,6 @@ int usb_wwan_port_probe(struct usb_serial_port *port)
        }
 
        for (i = 0; i < N_OUT_URB; i++) {
-               if (!port->bulk_out_size)
-                       break;
-
                buffer = kmalloc(OUT_BUFLEN, GFP_KERNEL);
                if (!buffer)
                        goto bail_out_error2;
index a7ac97cc59495f7a7eea8e304d432624185205a9..511b22953167bd99a611e7e5f7fc13b45e574e8c 100644 (file)
@@ -137,7 +137,7 @@ static void uas_do_work(struct work_struct *work)
                if (!(cmdinfo->state & IS_IN_WORK_LIST))
                        continue;
 
-               err = uas_submit_urbs(cmnd, cmnd->device->hostdata, GFP_NOIO);
+               err = uas_submit_urbs(cmnd, cmnd->device->hostdata, GFP_ATOMIC);
                if (!err)
                        cmdinfo->state &= ~IS_IN_WORK_LIST;
                else
@@ -803,7 +803,7 @@ static int uas_eh_task_mgmt(struct scsi_cmnd *cmnd,
 
        devinfo->running_task = 1;
        memset(&devinfo->response, 0, sizeof(devinfo->response));
-       sense_urb = uas_submit_sense_urb(cmnd, GFP_NOIO,
+       sense_urb = uas_submit_sense_urb(cmnd, GFP_ATOMIC,
                                         devinfo->use_streams ? tag : 0);
        if (!sense_urb) {
                shost_printk(KERN_INFO, shost,
@@ -813,7 +813,7 @@ static int uas_eh_task_mgmt(struct scsi_cmnd *cmnd,
                spin_unlock_irqrestore(&devinfo->lock, flags);
                return FAILED;
        }
-       if (uas_submit_task_urb(cmnd, GFP_NOIO, function, tag)) {
+       if (uas_submit_task_urb(cmnd, GFP_ATOMIC, function, tag)) {
                shost_printk(KERN_INFO, shost,
                             "%s: %s: submit task mgmt urb failed\n",
                             __func__, fname);
@@ -1030,7 +1030,7 @@ static int uas_configure_endpoints(struct uas_dev_info *devinfo)
                devinfo->use_streams = 0;
        } else {
                devinfo->qdepth = usb_alloc_streams(devinfo->intf, eps + 1,
-                                                   3, 256, GFP_KERNEL);
+                                                   3, 256, GFP_NOIO);
                if (devinfo->qdepth < 0)
                        return devinfo->qdepth;
                devinfo->use_streams = 1;
@@ -1047,7 +1047,7 @@ static void uas_free_streams(struct uas_dev_info *devinfo)
        eps[0] = usb_pipe_endpoint(udev, devinfo->status_pipe);
        eps[1] = usb_pipe_endpoint(udev, devinfo->data_in_pipe);
        eps[2] = usb_pipe_endpoint(udev, devinfo->data_out_pipe);
-       usb_free_streams(devinfo->intf, eps, 3, GFP_KERNEL);
+       usb_free_streams(devinfo->intf, eps, 3, GFP_NOIO);
 }
 
 static int uas_probe(struct usb_interface *intf, const struct usb_device_id *id)
@@ -1096,16 +1096,17 @@ static int uas_probe(struct usb_interface *intf, const struct usb_device_id *id)
        if (result)
                goto free_streams;
 
+       usb_set_intfdata(intf, shost);
        result = scsi_add_host(shost, &intf->dev);
        if (result)
                goto free_streams;
 
        scsi_scan_host(shost);
-       usb_set_intfdata(intf, shost);
        return result;
 
 free_streams:
        uas_free_streams(devinfo);
+       usb_set_intfdata(intf, NULL);
 set_alt0:
        usb_set_interface(udev, intf->altsetting[0].desc.bInterfaceNumber, 0);
        if (shost)
index d771870a819e52ff23220490c80de43697c508f2..6dfd30a863c797789b8c559cfcdc750f5bd18782 100644 (file)
@@ -69,7 +69,7 @@ const char *usb_state_string(enum usb_device_state state)
                [USB_STATE_RECONNECTING] = "reconnecting",
                [USB_STATE_UNAUTHENTICATED] = "unauthenticated",
                [USB_STATE_DEFAULT] = "default",
-               [USB_STATE_ADDRESS] = "addresssed",
+               [USB_STATE_ADDRESS] = "addressed",
                [USB_STATE_CONFIGURED] = "configured",
                [USB_STATE_SUSPENDED] = "suspended",
        };
index 44741267c917672149474fea1aef4efcd86d2210..3f485df9622643f1da5345d83a80c62078a80563 100644 (file)
@@ -301,7 +301,7 @@ int wusbhc_chid_set(struct wusbhc *wusbhc, const struct wusb_ckhdid *chid)
 
        if (chid)
                result = uwb_radio_start(&wusbhc->pal);
-       else
+       else if (wusbhc->uwb_rc)
                uwb_radio_stop(&wusbhc->pal);
 
        return result;
index c8e2a47d62a77eee093820f4eee1a3af613ed61a..3e2e4ed2015739bf9acd3cea2a7fd22fa8c3a1d8 100644 (file)
@@ -2390,10 +2390,10 @@ error_complete:
                done) {
 
                dev_info(dev, "Control EP stall.  Queue delayed work.\n");
-               spin_lock_irq(&wa->xfer_list_lock);
+               spin_lock(&wa->xfer_list_lock);
                /* move xfer from xfer_list to xfer_errored_list. */
                list_move_tail(&xfer->list_node, &wa->xfer_errored_list);
-               spin_unlock_irq(&wa->xfer_list_lock);
+               spin_unlock(&wa->xfer_list_lock);
                spin_unlock_irqrestore(&xfer->lock, flags);
                queue_work(wusbd, &wa->xfer_error_work);
        } else {
index 16ada8341c46dedb907df45392e669d42f967dec..468c89fb6a1689a60ff6d0ccc41d0d1fcb2bd1ef 100644 (file)
@@ -59,6 +59,7 @@ static void uwb_rc_set_drp_cmd_done(struct uwb_rc *rc, void *arg,
                                    struct uwb_rceb *reply, ssize_t reply_size)
 {
        struct uwb_rc_evt_set_drp_ie *r = (struct uwb_rc_evt_set_drp_ie *)reply;
+       unsigned long flags;
 
        if (r != NULL) {
                if (r->bResultCode != UWB_RC_RES_SUCCESS)
@@ -67,14 +68,14 @@ static void uwb_rc_set_drp_cmd_done(struct uwb_rc *rc, void *arg,
        } else
                dev_err(&rc->uwb_dev.dev, "SET-DRP-IE: timeout\n");
 
-       spin_lock_irq(&rc->rsvs_lock);
+       spin_lock_irqsave(&rc->rsvs_lock, flags);
        if (rc->set_drp_ie_pending > 1) {
                rc->set_drp_ie_pending = 0;
-               uwb_rsv_queue_update(rc);       
+               uwb_rsv_queue_update(rc);
        } else {
-               rc->set_drp_ie_pending = 0;     
+               rc->set_drp_ie_pending = 0;
        }
-       spin_unlock_irq(&rc->rsvs_lock);
+       spin_unlock_irqrestore(&rc->rsvs_lock, flags);
 }
 
 /**
@@ -599,8 +600,11 @@ static void uwb_drp_handle_alien_drp(struct uwb_rc *rc, struct uwb_ie_drp *drp_i
 
        /* alloc and initialize new uwb_cnflt_alien */
        cnflt = kzalloc(sizeof(struct uwb_cnflt_alien), GFP_KERNEL);
-       if (!cnflt)
+       if (!cnflt) {
                dev_err(dev, "failed to alloc uwb_cnflt_alien struct\n");
+               return;
+       }
+
        INIT_LIST_HEAD(&cnflt->rc_node);
        init_timer(&cnflt->timer);
        cnflt->timer.function = uwb_cnflt_timer;
index 6c793bc683d98c86f060c079579f365c2cdb1222..c7b4f0f927b1b710c8b8e95811743e76ed0ee977 100644 (file)
@@ -21,7 +21,15 @@ source "drivers/gpu/vga/Kconfig"
 
 source "drivers/gpu/host1x/Kconfig"
 
+menu "Direct Rendering Manager"
 source "drivers/gpu/drm/Kconfig"
+endmenu
+
+menu "Frame buffer Devices"
+source "drivers/video/fbdev/Kconfig"
+endmenu
+
+source "drivers/video/backlight/Kconfig"
 
 config VGASTATE
        tristate
@@ -33,2482 +41,14 @@ config VIDEOMODE_HELPERS
 config HDMI
        bool
 
-menuconfig FB
-       tristate "Support for frame buffer devices"
-       ---help---
-         The frame buffer device provides an abstraction for the graphics
-         hardware. It represents the frame buffer of some video hardware and
-         allows application software to access the graphics hardware through
-         a well-defined interface, so the software doesn't need to know
-         anything about the low-level (hardware register) stuff.
-
-         Frame buffer devices work identically across the different
-         architectures supported by Linux and make the implementation of
-         application programs easier and more portable; at this point, an X
-         server exists which uses the frame buffer device exclusively.
-         On several non-X86 architectures, the frame buffer device is the
-         only way to use the graphics hardware.
-
-         The device is accessed through special device nodes, usually located
-         in the /dev directory, i.e. /dev/fb*.
-
-         You need an utility program called fbset to make full use of frame
-         buffer devices. Please read <file:Documentation/fb/framebuffer.txt>
-         and the Framebuffer-HOWTO at
-         <http://www.munted.org.uk/programming/Framebuffer-HOWTO-1.3.html> for more
-         information.
-
-         Say Y here and to the driver for your graphics board below if you
-         are compiling a kernel for a non-x86 architecture.
-
-         If you are compiling for the x86 architecture, you can say Y if you
-         want to play with it, but it is not essential. Please note that
-         running graphical applications that directly touch the hardware
-         (e.g. an accelerated X server) and that are not frame buffer
-         device-aware may cause unexpected results. If unsure, say N.
-
-config FIRMWARE_EDID
-       bool "Enable firmware EDID"
-       depends on FB
-       default n
-       ---help---
-         This enables access to the EDID transferred from the firmware.
-        On the i386, this is from the Video BIOS. Enable this if DDC/I2C
-        transfers do not work for your driver and if you are using
-        nvidiafb, i810fb or savagefb.
-
-        In general, choosing Y for this option is safe.  If you
-        experience extremely long delays while booting before you get
-        something on your display, try setting this to N.  Matrox cards in
-        combination with certain motherboards and monitors are known to
-        suffer from this problem.
-
-config FB_DDC
-       tristate
-       depends on FB
-       select I2C_ALGOBIT
-       select I2C
-       default n
-
-config FB_BOOT_VESA_SUPPORT
-       bool
-       depends on FB
-       default n
-       ---help---
-         If true, at least one selected framebuffer driver can take advantage
-         of VESA video modes set at an early boot stage via the vga= parameter.
-
-config FB_CFB_FILLRECT
-       tristate
-       depends on FB
-       default n
-       ---help---
-         Include the cfb_fillrect function for generic software rectangle
-         filling. This is used by drivers that don't provide their own
-         (accelerated) version.
-
-config FB_CFB_COPYAREA
-       tristate
-       depends on FB
-       default n
-       ---help---
-         Include the cfb_copyarea function for generic software area copying.
-         This is used by drivers that don't provide their own (accelerated)
-         version.
-
-config FB_CFB_IMAGEBLIT
-       tristate
-       depends on FB
-       default n
-       ---help---
-         Include the cfb_imageblit function for generic software image
-         blitting. This is used by drivers that don't provide their own
-         (accelerated) version.
-
-config FB_CFB_REV_PIXELS_IN_BYTE
-       bool
-       depends on FB
-       default n
-       ---help---
-         Allow generic frame-buffer functions to work on displays with 1, 2
-         and 4 bits per pixel depths which has opposite order of pixels in
-         byte order to bytes in long order.
-
-config FB_SYS_FILLRECT
-       tristate
-       depends on FB
-       default n
-       ---help---
-         Include the sys_fillrect function for generic software rectangle
-         filling. This is used by drivers that don't provide their own
-         (accelerated) version and the framebuffer is in system RAM.
-
-config FB_SYS_COPYAREA
-       tristate
-       depends on FB
-       default n
-       ---help---
-         Include the sys_copyarea function for generic software area copying.
-         This is used by drivers that don't provide their own (accelerated)
-         version and the framebuffer is in system RAM.
-
-config FB_SYS_IMAGEBLIT
-       tristate
-       depends on FB
-       default n
-       ---help---
-         Include the sys_imageblit function for generic software image
-         blitting. This is used by drivers that don't provide their own
-         (accelerated) version and the framebuffer is in system RAM.
-
-menuconfig FB_FOREIGN_ENDIAN
-       bool "Framebuffer foreign endianness support"
-       depends on FB
-       ---help---
-         This menu will let you enable support for the framebuffers with
-         non-native endianness (e.g. Little-Endian framebuffer on a
-         Big-Endian machine). Most probably you don't have such hardware,
-         so it's safe to say "n" here.
-
-choice
-       prompt "Choice endianness support"
-       depends on FB_FOREIGN_ENDIAN
-
-config FB_BOTH_ENDIAN
-       bool "Support for Big- and Little-Endian framebuffers"
-
-config FB_BIG_ENDIAN
-       bool "Support for Big-Endian framebuffers only"
-
-config FB_LITTLE_ENDIAN
-       bool "Support for Little-Endian framebuffers only"
-
-endchoice
-
-config FB_SYS_FOPS
-       tristate
-       depends on FB
-       default n
-
-config FB_DEFERRED_IO
-       bool
-       depends on FB
-
-config FB_HECUBA
-       tristate
-       depends on FB
-       depends on FB_DEFERRED_IO
-
-config FB_SVGALIB
-       tristate
-       depends on FB
-       default n
-       ---help---
-         Common utility functions useful to fbdev drivers of VGA-based
-         cards.
-
-config FB_MACMODES
-       tristate
-       depends on FB
-       default n
-
-config FB_BACKLIGHT
-       bool
-       depends on FB
-       select BACKLIGHT_LCD_SUPPORT
-       select BACKLIGHT_CLASS_DEVICE
-       default n
-
-config FB_MODE_HELPERS
-        bool "Enable Video Mode Handling Helpers"
-        depends on FB
-       default n
-       ---help---
-         This enables functions for handling video modes using the
-         Generalized Timing Formula and the EDID parser. A few drivers rely
-          on this feature such as the radeonfb, rivafb, and the i810fb. If
-         your driver does not take advantage of this feature, choosing Y will
-         just increase the kernel size by about 5K.
-
-config FB_TILEBLITTING
-       bool "Enable Tile Blitting Support"
-       depends on FB
-       default n
-       ---help---
-         This enables tile blitting.  Tile blitting is a drawing technique
-        where the screen is divided into rectangular sections (tiles), whereas
-        the standard blitting divides the screen into pixels. Because the
-        default drawing element is a tile, drawing functions will be passed
-        parameters in terms of number of tiles instead of number of pixels.
-        For example, to draw a single character, instead of using bitmaps,
-        an index to an array of bitmaps will be used.  To clear or move a
-        rectangular section of a screen, the rectangle will be described in
-        terms of number of tiles in the x- and y-axis.
-
-        This is particularly important to one driver, matroxfb.  If
-        unsure, say N.
-
-comment "Frame buffer hardware drivers"
-       depends on FB
-
-config FB_GRVGA
-       tristate "Aeroflex Gaisler framebuffer support"
-       depends on FB && SPARC
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       ---help---
-       This enables support for the SVGACTRL framebuffer in the GRLIB IP library from Aeroflex Gaisler.
-
-config FB_CIRRUS
-       tristate "Cirrus Logic support"
-       depends on FB && (ZORRO || PCI)
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       ---help---
-         This enables support for Cirrus Logic GD542x/543x based boards on
-         Amiga: SD64, Piccolo, Picasso II/II+, Picasso IV, or EGS Spectrum.
-
-         If you have a PCI-based system, this enables support for these
-         chips: GD-543x, GD-544x, GD-5480.
-
-         Please read the file <file:Documentation/fb/cirrusfb.txt>.
-
-         Say N unless you have such a graphics board or plan to get one
-         before you next recompile the kernel.
-
-config FB_PM2
-       tristate "Permedia2 support"
-       depends on FB && ((AMIGA && BROKEN) || PCI)
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         This is the frame buffer device driver for cards based on
-         the 3D Labs Permedia, Permedia 2 and Permedia 2V chips.
-         The driver was tested on the following cards:
-               Diamond FireGL 1000 PRO AGP
-               ELSA Gloria Synergy PCI
-               Appian Jeronimo PRO (both heads) PCI
-               3DLabs Oxygen ACX aka EONtronics Picasso P2 PCI
-               Techsource Raptor GFX-8P (aka Sun PGX-32) on SPARC
-               ASK Graphic Blaster Exxtreme AGP
-
-         To compile this driver as a module, choose M here: the
-         module will be called pm2fb.
-
-config FB_PM2_FIFO_DISCONNECT
-       bool "enable FIFO disconnect feature"
-       depends on FB_PM2 && PCI
-       help
-         Support the Permedia2 FIFO disconnect feature.
-
-config FB_ARMCLCD
-       tristate "ARM PrimeCell PL110 support"
-       depends on ARM || ARM64 || COMPILE_TEST
-       depends on FB && ARM_AMBA
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         This framebuffer device driver is for the ARM PrimeCell PL110
-         Colour LCD controller.  ARM PrimeCells provide the building
-         blocks for System on a Chip devices.
-
-         If you want to compile this as a module (=code which can be
-         inserted into and removed from the running kernel), say M
-         here and read <file:Documentation/kbuild/modules.txt>.  The module
-         will be called amba-clcd.
-
-config FB_ACORN
-       bool "Acorn VIDC support"
-       depends on (FB = y) && ARM && ARCH_ACORN
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         This is the frame buffer device driver for the Acorn VIDC graphics
-         hardware found in Acorn RISC PCs and other ARM-based machines.  If
-         unsure, say N.
-
-config FB_CLPS711X
-       bool "CLPS711X LCD support"
-       depends on (FB = y) && ARM && ARCH_CLPS711X
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         Say Y to enable the Framebuffer driver for the CLPS7111 and
-         EP7212 processors.
-
-config FB_SA1100
-       bool "SA-1100 LCD support"
-       depends on (FB = y) && ARM && ARCH_SA1100
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         This is a framebuffer device for the SA-1100 LCD Controller.
-         See <http://www.linux-fbdev.org/> for information on framebuffer
-         devices.
-
-         If you plan to use the LCD display with your SA-1100 system, say
-         Y here.
-
-config FB_IMX
-       tristate "Freescale i.MX1/21/25/27 LCD support"
-       depends on FB && ARCH_MXC
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       select FB_MODE_HELPERS
-       select VIDEOMODE_HELPERS
-
-config FB_CYBER2000
-       tristate "CyberPro 2000/2010/5000 support"
-       depends on FB && PCI && (BROKEN || !SPARC64)
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         This enables support for the Integraphics CyberPro 20x0 and 5000
-         VGA chips used in the Rebel.com Netwinder and other machines.
-         Say Y if you have a NetWinder or a graphics card containing this
-         device, otherwise say N.
-
-config FB_CYBER2000_DDC
-       bool "DDC for CyberPro support"
-       depends on FB_CYBER2000
-       select FB_DDC
-       default y
-       help
-         Say Y here if you want DDC support for your CyberPro graphics
-         card. This is only I2C bus support, driver does not use EDID.
-
-config FB_CYBER2000_I2C
-       bool "CyberPro 2000/2010/5000 I2C support"
-       depends on FB_CYBER2000 && I2C && ARCH_NETWINDER
-       select I2C_ALGOBIT
-       help
-         Enable support for the I2C video decoder interface on the
-         Integraphics CyberPro 20x0 and 5000 VGA chips.  This is used
-         on the Netwinder machines for the SAA7111 video capture.
-
-config FB_APOLLO
-       bool
-       depends on (FB = y) && APOLLO
-       default y
-       select FB_CFB_FILLRECT
-       select FB_CFB_IMAGEBLIT
-
-config FB_Q40
-       bool
-       depends on (FB = y) && Q40
-       default y
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-
-config FB_AMIGA
-       tristate "Amiga native chipset support"
-       depends on FB && AMIGA
-       help
-         This is the frame buffer device driver for the builtin graphics
-         chipset found in Amigas.
-
-         To compile this driver as a module, choose M here: the
-         module will be called amifb.
-
-config FB_AMIGA_OCS
-       bool "Amiga OCS chipset support"
-       depends on FB_AMIGA
-       help
-         This enables support for the original Agnus and Denise video chips,
-         found in the Amiga 1000 and most A500's and A2000's. If you intend
-         to run Linux on any of these systems, say Y; otherwise say N.
-
-config FB_AMIGA_ECS
-       bool "Amiga ECS chipset support"
-       depends on FB_AMIGA
-       help
-         This enables support for the Enhanced Chip Set, found in later
-         A500's, later A2000's, the A600, the A3000, the A3000T and CDTV. If
-         you intend to run Linux on any of these systems, say Y; otherwise
-         say N.
-
-config FB_AMIGA_AGA
-       bool "Amiga AGA chipset support"
-       depends on FB_AMIGA
-       help
-         This enables support for the Advanced Graphics Architecture (also
-         known as the AGA or AA) Chip Set, found in the A1200, A4000, A4000T
-         and CD32. If you intend to run Linux on any of these systems, say Y;
-         otherwise say N.
-
-config FB_FM2
-       bool "Amiga FrameMaster II/Rainbow II support"
-       depends on (FB = y) && ZORRO
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         This is the frame buffer device driver for the Amiga FrameMaster
-         card from BSC (exhibited 1992 but not shipped as a CBM product).
-
-config FB_ARC
-       tristate "Arc Monochrome LCD board support"
-       depends on FB && X86
-       select FB_SYS_FILLRECT
-       select FB_SYS_COPYAREA
-       select FB_SYS_IMAGEBLIT
-       select FB_SYS_FOPS
-       help
-         This enables support for the Arc Monochrome LCD board. The board
-         is based on the KS-108 lcd controller and is typically a matrix
-         of 2*n chips. This driver was tested with a 128x64 panel. This
-         driver supports it for use with x86 SBCs through a 16 bit GPIO
-         interface (8 bit data, 8 bit control). If you anticipate using
-         this driver, say Y or M; otherwise say N. You must specify the
-         GPIO IO address to be used for setting control and data.
-
-config FB_ATARI
-       bool "Atari native chipset support"
-       depends on (FB = y) && ATARI
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         This is the frame buffer device driver for the builtin graphics
-         chipset found in Ataris.
-
-config FB_OF
-       bool "Open Firmware frame buffer device support"
-       depends on (FB = y) && (PPC64 || PPC_OF) && (!PPC_PSERIES || PCI)
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       select FB_MACMODES
-       help
-         Say Y if you want support with Open Firmware for your graphics
-         board.
-
-config FB_CONTROL
-       bool "Apple \"control\" display support"
-       depends on (FB = y) && PPC_PMAC && PPC32
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       select FB_MACMODES
-       help
-         This driver supports a frame buffer for the graphics adapter in the
-         Power Macintosh 7300 and others.
-
-config FB_PLATINUM
-       bool "Apple \"platinum\" display support"
-       depends on (FB = y) && PPC_PMAC && PPC32
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       select FB_MACMODES
-       help
-         This driver supports a frame buffer for the "platinum" graphics
-         adapter in some Power Macintoshes.
-
-config FB_VALKYRIE
-       bool "Apple \"valkyrie\" display support"
-       depends on (FB = y) && (MAC || (PPC_PMAC && PPC32))
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       select FB_MACMODES
-       help
-         This driver supports a frame buffer for the "valkyrie" graphics
-         adapter in some Power Macintoshes.
-
-config FB_CT65550
-       bool "Chips 65550 display support"
-       depends on (FB = y) && PPC32 && PCI
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         This is the frame buffer device driver for the Chips & Technologies
-         65550 graphics chip in PowerBooks.
-
-config FB_ASILIANT
-       bool "Asiliant (Chips) 69000 display support"
-       depends on (FB = y) && PCI
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         This is the frame buffer device driver for the Asiliant 69030 chipset
-
-config FB_IMSTT
-       bool "IMS Twin Turbo display support"
-       depends on (FB = y) && PCI
-       select FB_CFB_IMAGEBLIT
-       select FB_MACMODES if PPC
-       help
-         The IMS Twin Turbo is a PCI-based frame buffer card bundled with
-         many Macintosh and compatible computers.
-
-config FB_VGA16
-       tristate "VGA 16-color graphics support"
-       depends on FB && (X86 || PPC)
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       select VGASTATE
-       select FONT_8x16 if FRAMEBUFFER_CONSOLE
-       help
-         This is the frame buffer device driver for VGA 16 color graphic
-         cards. Say Y if you have such a card.
-
-         To compile this driver as a module, choose M here: the
-         module will be called vga16fb.
-
-config FB_BF54X_LQ043
-       tristate "SHARP LQ043 TFT LCD (BF548 EZKIT)"
-       depends on FB && (BF54x) && !BF542
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-        This is the framebuffer device driver for a SHARP LQ043T1DG01 TFT LCD
-
-config FB_BFIN_T350MCQB
-       tristate "Varitronix COG-T350MCQB TFT LCD display (BF527 EZKIT)"
-       depends on FB && BLACKFIN
-       select BFIN_GPTIMERS
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-        This is the framebuffer device driver for a Varitronix VL-PS-COG-T350MCQB-01 display TFT LCD
-        This display is a QVGA 320x240 24-bit RGB display interfaced by an 8-bit wide PPI
-        It uses PPI[0..7] PPI_FS1, PPI_FS2 and PPI_CLK.
-
-config FB_BFIN_LQ035Q1
-       tristate "SHARP LQ035Q1DH02 TFT LCD"
-       depends on FB && BLACKFIN && SPI
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       select BFIN_GPTIMERS
-       help
-         This is the framebuffer device driver for a SHARP LQ035Q1DH02 TFT display found on
-         the Blackfin Landscape LCD EZ-Extender Card.
-         This display is a QVGA 320x240 18-bit RGB display interfaced by an 16-bit wide PPI
-         It uses PPI[0..15] PPI_FS1, PPI_FS2 and PPI_CLK.
-
-         To compile this driver as a module, choose M here: the
-         module will be called bfin-lq035q1-fb.
-
-config FB_BF537_LQ035
-       tristate "SHARP LQ035 TFT LCD (BF537 STAMP)"
-       depends on FB && (BF534 || BF536 || BF537) && I2C_BLACKFIN_TWI
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       select BFIN_GPTIMERS
-       help
-         This is the framebuffer device for a SHARP LQ035Q7DB03 TFT LCD
-         attached to a BF537.
-
-         To compile this driver as a module, choose M here: the
-         module will be called bf537-lq035.
-
-config FB_BFIN_7393
-       tristate "Blackfin ADV7393 Video encoder"
-       depends on FB && BLACKFIN
-       select I2C
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         This is the framebuffer device for a ADV7393 video encoder
-         attached to a Blackfin on the PPI port.
-         If your Blackfin board has a ADV7393 select Y.
-
-         To compile this driver as a module, choose M here: the
-         module will be called bfin_adv7393fb.
-
-choice
-       prompt  "Video mode support"
-       depends on FB_BFIN_7393
-       default NTSC
-
-config NTSC
-       bool 'NTSC 720x480'
-
-config PAL
-       bool 'PAL 720x576'
-
-config NTSC_640x480
-       bool 'NTSC 640x480 (Experimental)'
-
-config PAL_640x480
-       bool 'PAL 640x480 (Experimental)'
-
-config NTSC_YCBCR
-       bool 'NTSC 720x480 YCbCR input'
-
-config PAL_YCBCR
-       bool 'PAL 720x576 YCbCR input'
-
-endchoice
-
-choice
-       prompt  "Size of ADV7393 frame buffer memory Single/Double Size"
-       depends on (FB_BFIN_7393)
-       default ADV7393_1XMEM
-
-config ADV7393_1XMEM
-       bool 'Single'
-
-config ADV7393_2XMEM
-       bool 'Double'
-endchoice
-
-config FB_STI
-       tristate "HP STI frame buffer device support"
-       depends on FB && PARISC
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       select STI_CONSOLE
-       select VT
-       default y
-       ---help---
-         STI refers to the HP "Standard Text Interface" which is a set of
-         BIOS routines contained in a ROM chip in HP PA-RISC based machines.
-         Enabling this option will implement the linux framebuffer device
-         using calls to the STI BIOS routines for initialisation.
-       
-         If you enable this option, you will get a planar framebuffer device
-         /dev/fb which will work on the most common HP graphic cards of the
-         NGLE family, including the artist chips (in the 7xx and Bxxx series),
-         HCRX, HCRX24, CRX, CRX24 and VisEG series.
-
-         It is safe to enable this option, so you should probably say "Y".
-
-config FB_MAC
-       bool "Generic Macintosh display support"
-       depends on (FB = y) && MAC
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       select FB_MACMODES
-
-config FB_HP300
-       bool
-       depends on (FB = y) && DIO
-       select FB_CFB_IMAGEBLIT
-       default y
-
-config FB_TGA
-       tristate "TGA/SFB+ framebuffer support"
-       depends on FB && (ALPHA || TC)
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       select BITREVERSE
-       ---help---
-         This is the frame buffer device driver for generic TGA and SFB+
-         graphic cards.  These include DEC ZLXp-E1, -E2 and -E3 PCI cards,
-         also known as PBXGA-A, -B and -C, and DEC ZLX-E1, -E2 and -E3
-         TURBOchannel cards, also known as PMAGD-A, -B and -C.
-
-         Due to hardware limitations ZLX-E2 and E3 cards are not supported
-         for DECstation 5000/200 systems.  Additionally due to firmware
-         limitations these cards may cause troubles with booting DECstation
-         5000/240 and /260 systems, but are fully supported under Linux if
-         you manage to get it going. ;-)
-
-         Say Y if you have one of those.
-
-config FB_UVESA
-       tristate "Userspace VESA VGA graphics support"
-       depends on FB && CONNECTOR
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       select FB_MODE_HELPERS
-       help
-         This is the frame buffer driver for generic VBE 2.0 compliant
-         graphic cards. It can also take advantage of VBE 3.0 features,
-         such as refresh rate adjustment.
-
-         This driver generally provides more features than vesafb but
-         requires a userspace helper application called 'v86d'. See
-         <file:Documentation/fb/uvesafb.txt> for more information.
-
-         If unsure, say N.
-
-config FB_VESA
-       bool "VESA VGA graphics support"
-       depends on (FB = y) && X86
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       select FB_BOOT_VESA_SUPPORT
-       help
-         This is the frame buffer device driver for generic VESA 2.0
-         compliant graphic cards. The older VESA 1.2 cards are not supported.
-         You will get a boot time penguin logo at no additional cost. Please
-         read <file:Documentation/fb/vesafb.txt>. If unsure, say Y.
-
-config FB_EFI
-       bool "EFI-based Framebuffer Support"
-       depends on (FB = y) && X86 && EFI
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         This is the EFI frame buffer device driver. If the firmware on
-         your platform is EFI 1.10 or UEFI 2.0, select Y to add support for
-         using the EFI framebuffer as your console.
-
-config FB_N411
-       tristate "N411 Apollo/Hecuba devkit support"
-       depends on FB && X86 && MMU
-       select FB_SYS_FILLRECT
-       select FB_SYS_COPYAREA
-       select FB_SYS_IMAGEBLIT
-       select FB_SYS_FOPS
-       select FB_DEFERRED_IO
-       select FB_HECUBA
-       help
-         This enables support for the Apollo display controller in its
-         Hecuba form using the n411 devkit.
-
-config FB_HGA
-       tristate "Hercules mono graphics support"
-       depends on FB && X86
-       help
-         Say Y here if you have a Hercules mono graphics card.
-
-         To compile this driver as a module, choose M here: the
-         module will be called hgafb.
-
-         As this card technology is at least 25 years old,
-         most people will answer N here.
-
-config FB_GBE
-       bool "SGI Graphics Backend frame buffer support"
-       depends on (FB = y) && SGI_IP32
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         This is the frame buffer device driver for SGI Graphics Backend.
-         This chip is used in SGI O2 and Visual Workstation 320/540.
-
-config FB_GBE_MEM
-       int "Video memory size in MB"
-       depends on FB_GBE
-       default 4
-       help
-         This is the amount of memory reserved for the framebuffer,
-         which can be any value between 1MB and 8MB.
-
-config FB_SBUS
-       bool "SBUS and UPA framebuffers"
-       depends on (FB = y) && SPARC
-       help
-         Say Y if you want support for SBUS or UPA based frame buffer device.
-
-config FB_BW2
-       bool "BWtwo support"
-       depends on (FB = y) && (SPARC && FB_SBUS)
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         This is the frame buffer device driver for the BWtwo frame buffer.
-
-config FB_CG3
-       bool "CGthree support"
-       depends on (FB = y) && (SPARC && FB_SBUS)
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         This is the frame buffer device driver for the CGthree frame buffer.
-
-config FB_CG6
-       bool "CGsix (GX,TurboGX) support"
-       depends on (FB = y) && (SPARC && FB_SBUS)
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         This is the frame buffer device driver for the CGsix (GX, TurboGX)
-         frame buffer.
-
-config FB_FFB
-       bool "Creator/Creator3D/Elite3D support"
-       depends on FB_SBUS && SPARC64
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         This is the frame buffer device driver for the Creator, Creator3D,
-         and Elite3D graphics boards.
-
-config FB_TCX
-       bool "TCX (SS4/SS5 only) support"
-       depends on FB_SBUS
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         This is the frame buffer device driver for the TCX 24/8bit frame
-         buffer.
-
-config FB_CG14
-       bool "CGfourteen (SX) support"
-       depends on FB_SBUS
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         This is the frame buffer device driver for the CGfourteen frame
-         buffer on Desktop SPARCsystems with the SX graphics option.
-
-config FB_P9100
-       bool "P9100 (Sparcbook 3 only) support"
-       depends on FB_SBUS
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         This is the frame buffer device driver for the P9100 card
-         supported on Sparcbook 3 machines.
-
-config FB_LEO
-       bool "Leo (ZX) support"
-       depends on FB_SBUS
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         This is the frame buffer device driver for the SBUS-based Sun ZX
-         (leo) frame buffer cards.
-
-config FB_IGA
-       bool "IGA 168x display support"
-       depends on (FB = y) && SPARC32
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         This is the framebuffer device for the INTERGRAPHICS 1680 and
-         successor frame buffer cards.
-
-config FB_XVR500
-       bool "Sun XVR-500 3DLABS Wildcat support"
-       depends on (FB = y) && PCI && SPARC64
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         This is the framebuffer device for the Sun XVR-500 and similar
-         graphics cards based upon the 3DLABS Wildcat chipset.  The driver
-         only works on sparc64 systems where the system firmware has
-         mostly initialized the card already.  It is treated as a
-         completely dumb framebuffer device.
-
-config FB_XVR2500
-       bool "Sun XVR-2500 3DLABS Wildcat support"
-       depends on (FB = y) && PCI && SPARC64
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         This is the framebuffer device for the Sun XVR-2500 and similar
-         graphics cards based upon the 3DLABS Wildcat chipset.  The driver
-         only works on sparc64 systems where the system firmware has
-         mostly initialized the card already.  It is treated as a
-         completely dumb framebuffer device.
-
-config FB_XVR1000
-       bool "Sun XVR-1000 support"
-       depends on (FB = y) && SPARC64
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         This is the framebuffer device for the Sun XVR-1000 and similar
-         graphics cards.  The driver only works on sparc64 systems where
-         the system firmware has mostly initialized the card already.  It
-         is treated as a completely dumb framebuffer device.
-
-config FB_PVR2
-       tristate "NEC PowerVR 2 display support"
-       depends on FB && SH_DREAMCAST
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       ---help---
-         Say Y here if you have a PowerVR 2 card in your box.  If you plan to
-         run linux on your Dreamcast, you will have to say Y here.
-         This driver may or may not work on other PowerVR 2 cards, but is
-         totally untested.  Use at your own risk.  If unsure, say N.
-
-         To compile this driver as a module, choose M here: the
-         module will be called pvr2fb.
-
-         You can pass several parameters to the driver at boot time or at
-         module load time.  The parameters look like "video=pvr2:XXX", where
-         the meaning of XXX can be found at the end of the main source file
-         (<file:drivers/video/pvr2fb.c>). Please see the file
-         <file:Documentation/fb/pvr2fb.txt>.
-
-config FB_OPENCORES
-       tristate "OpenCores VGA/LCD core 2.0 framebuffer support"
-       depends on FB && HAS_DMA
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         This enables support for the OpenCores VGA/LCD core.
-
-         The OpenCores VGA/LCD core is typically used together with
-         softcore CPUs (e.g. OpenRISC or Microblaze) or hard processor
-         systems (e.g. Altera socfpga or Xilinx Zynq) on FPGAs.
-
-         The source code and specification for the core is available at
-         <http://opencores.org/project,vga_lcd>
-
-config FB_S1D13XXX
-       tristate "Epson S1D13XXX framebuffer support"
-       depends on FB
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         Support for S1D13XXX framebuffer device family (currently only
-         working with S1D13806). Product specs at
-         <http://vdc.epson.com/>
-
-config FB_ATMEL
-       tristate "AT91/AT32 LCD Controller support"
-       depends on FB && HAVE_FB_ATMEL
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       select FB_MODE_HELPERS
-       select VIDEOMODE_HELPERS
-       help
-         This enables support for the AT91/AT32 LCD Controller.
-
-config FB_INTSRAM
-       bool "Frame Buffer in internal SRAM"
-       depends on FB_ATMEL && ARCH_AT91SAM9261
-       help
-         Say Y if you want to map Frame Buffer in internal SRAM. Say N if you want
-         to let frame buffer in external SDRAM.
-
-config FB_ATMEL_STN
-       bool "Use a STN display with AT91/AT32 LCD Controller"
-       depends on FB_ATMEL && (MACH_AT91SAM9261EK || MACH_AT91SAM9G10EK)
-       default n
-       help
-         Say Y if you want to connect a STN LCD display to the AT91/AT32 LCD
-         Controller. Say N if you want to connect a TFT.
-
-         If unsure, say N.
-
-config FB_NVIDIA
-       tristate "nVidia Framebuffer Support"
-       depends on FB && PCI
-       select FB_BACKLIGHT if FB_NVIDIA_BACKLIGHT
-       select FB_MODE_HELPERS
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       select BITREVERSE
-       select VGASTATE
-       help
-         This driver supports graphics boards with the nVidia chips, TNT
-         and newer. For very old chipsets, such as the RIVA128, then use
-         the rivafb.
-         Say Y if you have such a graphics board.
-
-         To compile this driver as a module, choose M here: the
-         module will be called nvidiafb.
-
-config FB_NVIDIA_I2C
-       bool "Enable DDC Support"
-       depends on FB_NVIDIA
-       select FB_DDC
-       help
-         This enables I2C support for nVidia Chipsets.  This is used
-         only for getting EDID information from the attached display
-         allowing for robust video mode handling and switching.
-
-         Because fbdev-2.6 requires that drivers must be able to
-         independently validate video mode parameters, you should say Y
-         here.
-
-config FB_NVIDIA_DEBUG
-       bool "Lots of debug output"
-       depends on FB_NVIDIA
-       default n
-       help
-         Say Y here if you want the nVidia driver to output all sorts
-         of debugging information to provide to the maintainer when
-         something goes wrong.
-
-config FB_NVIDIA_BACKLIGHT
-       bool "Support for backlight control"
-       depends on FB_NVIDIA
-       default y
-       help
-         Say Y here if you want to control the backlight of your display.
-
-config FB_RIVA
-       tristate "nVidia Riva support"
-       depends on FB && PCI
-       select FB_BACKLIGHT if FB_RIVA_BACKLIGHT
-       select FB_MODE_HELPERS
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       select BITREVERSE
-       select VGASTATE
-       help
-         This driver supports graphics boards with the nVidia Riva/Geforce
-         chips.
-         Say Y if you have such a graphics board.
-
-         To compile this driver as a module, choose M here: the
-         module will be called rivafb.
-
-config FB_RIVA_I2C
-       bool "Enable DDC Support"
-       depends on FB_RIVA
-       select FB_DDC
-       help
-         This enables I2C support for nVidia Chipsets.  This is used
-         only for getting EDID information from the attached display
-         allowing for robust video mode handling and switching.
-
-         Because fbdev-2.6 requires that drivers must be able to
-         independently validate video mode parameters, you should say Y
-         here.
-
-config FB_RIVA_DEBUG
-       bool "Lots of debug output"
-       depends on FB_RIVA
-       default n
-       help
-         Say Y here if you want the Riva driver to output all sorts
-         of debugging information to provide to the maintainer when
-         something goes wrong.
-
-config FB_RIVA_BACKLIGHT
-       bool "Support for backlight control"
-       depends on FB_RIVA
-       default y
-       help
-         Say Y here if you want to control the backlight of your display.
-
-config FB_I740
-       tristate "Intel740 support"
-       depends on FB && PCI
-       select FB_MODE_HELPERS
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       select VGASTATE
-       select FB_DDC
-       help
-         This driver supports graphics cards based on Intel740 chip.
-
-config FB_I810
-       tristate "Intel 810/815 support"
-       depends on FB && PCI && X86_32 && AGP_INTEL
-       select FB_MODE_HELPERS
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       select VGASTATE
-       help
-         This driver supports the on-board graphics built in to the Intel 810 
-          and 815 chipsets.  Say Y if you have and plan to use such a board.
-
-          To compile this driver as a module, choose M here: the
-         module will be called i810fb.
-
-          For more information, please read 
-         <file:Documentation/fb/intel810.txt>
-
-config FB_I810_GTF
-       bool "use VESA Generalized Timing Formula"
-       depends on FB_I810
-       help
-         If you say Y, then the VESA standard, Generalized Timing Formula 
-          or GTF, will be used to calculate the required video timing values
-         per video mode.  Since the GTF allows nondiscrete timings 
-          (nondiscrete being a range of values as opposed to discrete being a
-          set of values), you'll be able to use any combination of horizontal 
-         and vertical resolutions, and vertical refresh rates without having
-         to specify your own timing parameters.  This is especially useful
-         to maximize the performance of an aging display, or if you just 
-          have a display with nonstandard dimensions. A VESA compliant 
-         monitor is recommended, but can still work with non-compliant ones.
-         If you need or want this, then select this option. The timings may 
-         not be compliant with Intel's recommended values. Use at your own 
-         risk.
-
-          If you say N, the driver will revert to discrete video timings 
-         using a set recommended by Intel in their documentation.
-  
-          If unsure, say N.
-
-config FB_I810_I2C
-       bool "Enable DDC Support"
-       depends on FB_I810 && FB_I810_GTF
-       select FB_DDC
-       help
-
-config FB_LE80578
-       tristate "Intel LE80578 (Vermilion) support"
-       depends on FB && PCI && X86
-       select FB_MODE_HELPERS
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         This driver supports the LE80578 (Vermilion Range) chipset
-
-config FB_CARILLO_RANCH
-       tristate "Intel Carillo Ranch support"
-       depends on FB_LE80578 && FB && PCI && X86
-       help
-         This driver supports the LE80578 (Carillo Ranch) board
-
-config FB_INTEL
-       tristate "Intel 830M/845G/852GM/855GM/865G/915G/945G/945GM/965G/965GM support"
-       depends on FB && PCI && X86 && AGP_INTEL && EXPERT
-       select FB_MODE_HELPERS
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       select FB_BOOT_VESA_SUPPORT if FB_INTEL = y
-       depends on !DRM_I915
-       help
-         This driver supports the on-board graphics built in to the Intel
-          830M/845G/852GM/855GM/865G/915G/915GM/945G/945GM/965G/965GM chipsets.
-          Say Y if you have and plan to use such a board.
-
-         To make FB_INTELFB=Y work you need to say AGP_INTEL=y too.
-
-         To compile this driver as a module, choose M here: the
-         module will be called intelfb.
-
-         For more information, please read <file:Documentation/fb/intelfb.txt>
-
-config FB_INTEL_DEBUG
-       bool "Intel driver Debug Messages"
-       depends on FB_INTEL
-       ---help---
-         Say Y here if you want the Intel driver to output all sorts
-         of debugging information to provide to the maintainer when
-         something goes wrong.
-
-config FB_INTEL_I2C
-       bool "DDC/I2C for Intel framebuffer support"
-       depends on FB_INTEL
-       select FB_DDC
-       default y
-       help
-         Say Y here if you want DDC/I2C support for your on-board Intel graphics.
-
-config FB_MATROX
-       tristate "Matrox acceleration"
-       depends on FB && PCI
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       select FB_TILEBLITTING
-       select FB_MACMODES if PPC_PMAC
-       ---help---
-         Say Y here if you have a Matrox Millennium, Matrox Millennium II,
-         Matrox Mystique, Matrox Mystique 220, Matrox Productiva G100, Matrox
-         Mystique G200, Matrox Millennium G200, Matrox Marvel G200 video,
-         Matrox G400, G450 or G550 card in your box.
-
-         To compile this driver as a module, choose M here: the
-         module will be called matroxfb.
-
-         You can pass several parameters to the driver at boot time or at
-         module load time. The parameters look like "video=matroxfb:XXX", and
-         are described in <file:Documentation/fb/matroxfb.txt>.
-
-config FB_MATROX_MILLENIUM
-       bool "Millennium I/II support"
-       depends on FB_MATROX
-       help
-         Say Y here if you have a Matrox Millennium or Matrox Millennium II
-         video card. If you select "Advanced lowlevel driver options" below,
-         you should check 4 bpp packed pixel, 8 bpp packed pixel, 16 bpp
-         packed pixel, 24 bpp packed pixel and 32 bpp packed pixel. You can
-         also use font widths different from 8.
-
-config FB_MATROX_MYSTIQUE
-       bool "Mystique support"
-       depends on FB_MATROX
-       help
-         Say Y here if you have a Matrox Mystique or Matrox Mystique 220
-         video card. If you select "Advanced lowlevel driver options" below,
-         you should check 8 bpp packed pixel, 16 bpp packed pixel, 24 bpp
-         packed pixel and 32 bpp packed pixel. You can also use font widths
-         different from 8.
-
-config FB_MATROX_G
-       bool "G100/G200/G400/G450/G550 support"
-       depends on FB_MATROX
-       ---help---
-         Say Y here if you have a Matrox G100, G200, G400, G450 or G550 based
-         video card. If you select "Advanced lowlevel driver options", you
-         should check 8 bpp packed pixel, 16 bpp packed pixel, 24 bpp packed
-         pixel and 32 bpp packed pixel. You can also use font widths
-         different from 8.
-
-         If you need support for G400 secondary head, you must say Y to
-         "Matrox I2C support" and "G400 second head support" right below.
-         G450/G550 secondary head and digital output are supported without
-         additional modules.
-
-         The driver starts in monitor mode. You must use the matroxset tool 
-         (available at <ftp://platan.vc.cvut.cz/pub/linux/matrox-latest/>) to 
-         swap primary and secondary head outputs, or to change output mode.  
-         Secondary head driver always start in 640x480 resolution and you 
-         must use fbset to change it.
-
-         Do not forget that second head supports only 16 and 32 bpp
-         packed pixels, so it is a good idea to compile them into the kernel
-         too. You can use only some font widths, as the driver uses generic
-         painting procedures (the secondary head does not use acceleration
-         engine).
-
-         G450/G550 hardware can display TV picture only from secondary CRTC,
-         and it performs no scaling, so picture must have 525 or 625 lines.
-
-config FB_MATROX_I2C
-       tristate "Matrox I2C support"
-       depends on FB_MATROX
-       select FB_DDC
-       ---help---
-         This drivers creates I2C buses which are needed for accessing the
-         DDC (I2C) bus present on all Matroxes, an I2C bus which
-         interconnects Matrox optional devices, like MGA-TVO on G200 and
-         G400, and the secondary head DDC bus, present on G400 only.
-
-         You can say Y or M here if you want to experiment with monitor
-         detection code. You must say Y or M here if you want to use either
-         second head of G400 or MGA-TVO on G200 or G400.
-
-         If you compile it as module, it will create a module named
-         i2c-matroxfb.
-
-config FB_MATROX_MAVEN
-       tristate "G400 second head support"
-       depends on FB_MATROX_G && FB_MATROX_I2C
-       ---help---
-         WARNING !!! This support does not work with G450 !!!
-
-         Say Y or M here if you want to use a secondary head (meaning two
-         monitors in parallel) on G400 or MGA-TVO add-on on G200. Secondary
-         head is not compatible with accelerated XFree 3.3.x SVGA servers -
-         secondary head output is blanked while you are in X. With XFree
-         3.9.17 preview you can use both heads if you use SVGA over fbdev or
-         the fbdev driver on first head and the fbdev driver on second head.
-
-         If you compile it as module, two modules are created,
-         matroxfb_crtc2 and matroxfb_maven. Matroxfb_maven is needed for
-         both G200 and G400, matroxfb_crtc2 is needed only by G400. You must
-         also load i2c-matroxfb to get it to run.
-
-         The driver starts in monitor mode and you must use the matroxset
-         tool (available at
-         <ftp://platan.vc.cvut.cz/pub/linux/matrox-latest/>) to switch it to
-         PAL or NTSC or to swap primary and secondary head outputs.
-         Secondary head driver also always start in 640x480 resolution, you
-         must use fbset to change it.
-
-         Also do not forget that second head supports only 16 and 32 bpp
-         packed pixels, so it is a good idea to compile them into the kernel
-         too.  You can use only some font widths, as the driver uses generic
-         painting procedures (the secondary head does not use acceleration
-         engine).
-
-config FB_RADEON
-       tristate "ATI Radeon display support"
-       depends on FB && PCI
-       select FB_BACKLIGHT if FB_RADEON_BACKLIGHT
-       select FB_MODE_HELPERS
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       select FB_MACMODES if PPC_OF
-       help
-         Choose this option if you want to use an ATI Radeon graphics card as
-         a framebuffer device.  There are both PCI and AGP versions.  You
-         don't need to choose this to run the Radeon in plain VGA mode.
-
-         There is a product page at
-         http://products.amd.com/en-us/GraphicCardResult.aspx
-
-config FB_RADEON_I2C
-       bool "DDC/I2C for ATI Radeon support"
-       depends on FB_RADEON
-       select FB_DDC
-       default y
-       help
-         Say Y here if you want DDC/I2C support for your Radeon board. 
-
-config FB_RADEON_BACKLIGHT
-       bool "Support for backlight control"
-       depends on FB_RADEON
-       default y
-       help
-         Say Y here if you want to control the backlight of your display.
-
-config FB_RADEON_DEBUG
-       bool "Lots of debug output from Radeon driver"
-       depends on FB_RADEON
-       default n
-       help
-         Say Y here if you want the Radeon driver to output all sorts
-         of debugging information to provide to the maintainer when
-         something goes wrong.
-
-config FB_ATY128
-       tristate "ATI Rage128 display support"
-       depends on FB && PCI
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       select FB_BACKLIGHT if FB_ATY128_BACKLIGHT
-       select FB_MACMODES if PPC_PMAC
-       help
-         This driver supports graphics boards with the ATI Rage128 chips.
-         Say Y if you have such a graphics board and read
-         <file:Documentation/fb/aty128fb.txt>.
-
-         To compile this driver as a module, choose M here: the
-         module will be called aty128fb.
-
-config FB_ATY128_BACKLIGHT
-       bool "Support for backlight control"
-       depends on FB_ATY128
-       default y
-       help
-         Say Y here if you want to control the backlight of your display.
-
-config FB_ATY
-       tristate "ATI Mach64 display support" if PCI || ATARI
-       depends on FB && !SPARC32
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       select FB_BACKLIGHT if FB_ATY_BACKLIGHT
-       select FB_MACMODES if PPC
-       help
-         This driver supports graphics boards with the ATI Mach64 chips.
-         Say Y if you have such a graphics board.
-
-         To compile this driver as a module, choose M here: the
-         module will be called atyfb.
-
-config FB_ATY_CT
-       bool "Mach64 CT/VT/GT/LT (incl. 3D RAGE) support"
-       depends on PCI && FB_ATY
-       default y if SPARC64 && PCI
-       help
-         Say Y here to support use of ATI's 64-bit Rage boards (or other
-         boards based on the Mach64 CT, VT, GT, and LT chipsets) as a
-         framebuffer device.  The ATI product support page for these boards
-         is at <http://support.ati.com/products/pc/mach64/mach64.html>.
-
-config FB_ATY_GENERIC_LCD
-       bool "Mach64 generic LCD support"
-       depends on FB_ATY_CT
-       help
-         Say Y if you have a laptop with an ATI Rage LT PRO, Rage Mobility,
-         Rage XC, or Rage XL chipset.
-
-config FB_ATY_GX
-       bool "Mach64 GX support" if PCI
-       depends on FB_ATY
-       default y if ATARI
-       help
-         Say Y here to support use of the ATI Mach64 Graphics Expression
-         board (or other boards based on the Mach64 GX chipset) as a
-         framebuffer device.  The ATI product support page for these boards
-         is at
-         <http://support.ati.com/products/pc/mach64/graphics_xpression.html>.
-
-config FB_ATY_BACKLIGHT
-       bool "Support for backlight control"
-       depends on FB_ATY
-       default y
-       help
-         Say Y here if you want to control the backlight of your display.
-
-config FB_S3
-       tristate "S3 Trio/Virge support"
-       depends on FB && PCI
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       select FB_TILEBLITTING
-       select FB_SVGALIB
-       select VGASTATE
-       select FONT_8x16 if FRAMEBUFFER_CONSOLE
-       ---help---
-         Driver for graphics boards with S3 Trio / S3 Virge chip.
-
-config FB_S3_DDC
-       bool "DDC for S3 support"
-       depends on FB_S3
-       select FB_DDC
-       default y
-       help
-         Say Y here if you want DDC support for your S3 graphics card.
-
-config FB_SAVAGE
-       tristate "S3 Savage support"
-       depends on FB && PCI
-       select FB_MODE_HELPERS
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       select VGASTATE
-       help
-         This driver supports notebooks and computers with S3 Savage PCI/AGP
-         chips.
-
-         Say Y if you have such a graphics card.
-
-         To compile this driver as a module, choose M here; the module
-         will be called savagefb.
-
-config FB_SAVAGE_I2C
-       bool "Enable DDC2 Support"
-       depends on FB_SAVAGE
-       select FB_DDC
-       help
-         This enables I2C support for S3 Savage Chipsets.  This is used
-         only for getting EDID information from the attached display
-         allowing for robust video mode handling and switching.
-
-         Because fbdev-2.6 requires that drivers must be able to
-         independently validate video mode parameters, you should say Y
-         here.
-
-config FB_SAVAGE_ACCEL
-       bool "Enable Console Acceleration"
-       depends on FB_SAVAGE
-       default n
-       help
-          This option will compile in console acceleration support. If
-          the resulting framebuffer console has bothersome glitches, then
-          choose N here.
-
-config FB_SIS
-       tristate "SiS/XGI display support"
-       depends on FB && PCI
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       select FB_BOOT_VESA_SUPPORT if FB_SIS = y
-       help
-         This is the frame buffer device driver for the SiS 300, 315, 330
-         and 340 series as well as XGI V3XT, V5, V8, Z7 graphics chipsets.
-         Specs available at <http://www.sis.com> and <http://www.xgitech.com>.
-
-         To compile this driver as a module, choose M here; the module
-         will be called sisfb.
-
-config FB_SIS_300
-       bool "SiS 300 series support"
-       depends on FB_SIS
-       help
-         Say Y here to support use of the SiS 300/305, 540, 630 and 730.
-
-config FB_SIS_315
-       bool "SiS 315/330/340 series and XGI support"
-       depends on FB_SIS
-       help
-         Say Y here to support use of the SiS 315, 330 and 340 series
-         (315/H/PRO, 55x, 650, 651, 740, 330, 661, 741, 760, 761) as well
-         as XGI V3XT, V5, V8 and Z7.
-
-config FB_VIA
-       tristate "VIA UniChrome (Pro) and Chrome9 display support"
-       depends on FB && PCI && X86
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       select I2C_ALGOBIT
-       select I2C
-       select GPIOLIB
-       help
-         This is the frame buffer device driver for Graphics chips of VIA
-         UniChrome (Pro) Family (CLE266,PM800/CN400,P4M800CE/P4M800Pro/
-         CN700/VN800,CX700/VX700,P4M890) and Chrome9 Family (K8M890,CN896
-         /P4M900,VX800)
-         Say Y if you have a VIA UniChrome graphics board.
-
-         To compile this driver as a module, choose M here: the
-         module will be called viafb.
-
-if FB_VIA
-
-config FB_VIA_DIRECT_PROCFS
-       bool "direct hardware access via procfs (DEPRECATED)(DANGEROUS)"
-       depends on FB_VIA
-       default n
-       help
-         Allow direct hardware access to some output registers via procfs.
-         This is dangerous but may provide the only chance to get the
-         correct output device configuration.
-         Its use is strongly discouraged.
-
-config FB_VIA_X_COMPATIBILITY
-       bool "X server compatibility"
-       depends on FB_VIA
-       default n
-       help
-         This option reduces the functionality (power saving, ...) of the
-         framebuffer to avoid negative impact on the OpenChrome X server.
-         If you use any X server other than fbdev you should enable this
-         otherwise it should be safe to disable it and allow using all
-         features.
-
-endif
-
-config FB_NEOMAGIC
-       tristate "NeoMagic display support"
-       depends on FB && PCI
-       select FB_MODE_HELPERS
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       select VGASTATE
-       help
-         This driver supports notebooks with NeoMagic PCI chips.
-         Say Y if you have such a graphics card. 
-
-         To compile this driver as a module, choose M here: the
-         module will be called neofb.
-
-config FB_KYRO
-       tristate "IMG Kyro support"
-       depends on FB && PCI
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         Say Y here if you have a STG4000 / Kyro / PowerVR 3 based
-         graphics board.
-
-         To compile this driver as a module, choose M here: the
-         module will be called kyrofb.
-
-config FB_3DFX
-       tristate "3Dfx Banshee/Voodoo3/Voodoo5 display support"
-       depends on FB && PCI
-       select FB_CFB_IMAGEBLIT
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_MODE_HELPERS
-       help
-         This driver supports graphics boards with the 3Dfx Banshee,
-         Voodoo3 or VSA-100 (aka Voodoo4/5) chips. Say Y if you have
-         such a graphics board.
-
-         To compile this driver as a module, choose M here: the
-         module will be called tdfxfb.
-
-config FB_3DFX_ACCEL
-       bool "3Dfx Acceleration functions"
-       depends on FB_3DFX
-       ---help---
-       This will compile the 3Dfx Banshee/Voodoo3/VSA-100 frame buffer
-       device driver with acceleration functions.
-
-config FB_3DFX_I2C
-       bool "Enable DDC/I2C support"
-       depends on FB_3DFX
-       select FB_DDC
-       default y
-       help
-         Say Y here if you want DDC/I2C support for your 3dfx Voodoo3.
-
-config FB_VOODOO1
-       tristate "3Dfx Voodoo Graphics (sst1) support"
-       depends on FB && PCI
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       ---help---
-         Say Y here if you have a 3Dfx Voodoo Graphics (Voodoo1/sst1) or 
-         Voodoo2 (cvg) based graphics card.
-
-         To compile this driver as a module, choose M here: the
-         module will be called sstfb.
-
-         WARNING: Do not use any application that uses the 3D engine
-         (namely glide) while using this driver.
-         Please read the <file:Documentation/fb/sstfb.txt> for supported
-         options and other important info  support.
-
-config FB_VT8623
-       tristate "VIA VT8623 support"
-       depends on FB && PCI
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       select FB_TILEBLITTING
-       select FB_SVGALIB
-       select VGASTATE
-       select FONT_8x16 if FRAMEBUFFER_CONSOLE
-       ---help---
-         Driver for CastleRock integrated graphics core in the
-         VIA VT8623 [Apollo CLE266] chipset.
-
-config FB_TRIDENT
-       tristate "Trident/CyberXXX/CyberBlade support"
-       depends on FB && PCI
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       ---help---
-         This is the frame buffer device driver for Trident PCI/AGP chipsets.
-         Supported chipset families are TGUI 9440/96XX, 3DImage, Blade3D
-         and Blade XP.
-         There are also integrated versions of these chips called CyberXXXX,
-         CyberImage or CyberBlade. These chips are mostly found in laptops
-         but also on some motherboards including early VIA EPIA motherboards.
-         For more information, read <file:Documentation/fb/tridentfb.txt>
-
-         Say Y if you have such a graphics board.
-
-         To compile this driver as a module, choose M here: the
-         module will be called tridentfb.
-
-config FB_ARK
-       tristate "ARK 2000PV support"
-       depends on FB && PCI
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       select FB_TILEBLITTING
-       select FB_SVGALIB
-       select VGASTATE
-       select FONT_8x16 if FRAMEBUFFER_CONSOLE
-       ---help---
-         Driver for PCI graphics boards with ARK 2000PV chip
-         and ICS 5342 RAMDAC.
-
-config FB_PM3
-       tristate "Permedia3 support"
-       depends on FB && PCI
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         This is the frame buffer device driver for the 3DLabs Permedia3
-         chipset, used in Formac ProFormance III, 3DLabs Oxygen VX1 &
-         similar boards, 3DLabs Permedia3 Create!, Appian Jeronimo 2000
-         and maybe other boards.
-
-config FB_CARMINE
-       tristate "Fujitsu carmine frame buffer support"
-       depends on FB && PCI
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         This is the frame buffer device driver for the Fujitsu Carmine chip.
-         The driver provides two independent frame buffer devices.
-
-choice
-       depends on FB_CARMINE
-       prompt "DRAM timing"
-       default FB_CARMINE_DRAM_EVAL
-
-config FB_CARMINE_DRAM_EVAL
-       bool "Eval board timings"
-       help
-         Use timings which work on the eval card.
-
-config CARMINE_DRAM_CUSTOM
-       bool "Custom board timings"
-       help
-         Use custom board timings.
-endchoice
-
-config FB_AU1100
-       bool "Au1100 LCD Driver"
-       depends on (FB = y) && MIPS_ALCHEMY
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         This is the framebuffer driver for the AMD Au1100 SOC.  It can drive
-         various panels and CRTs by passing in kernel cmd line option
-         au1100fb:panel=<name>.
-
-config FB_AU1200
-       bool "Au1200/Au1300 LCD Driver"
-       depends on (FB = y) && MIPS_ALCHEMY
-       select FB_SYS_FILLRECT
-       select FB_SYS_COPYAREA
-       select FB_SYS_IMAGEBLIT
-       select FB_SYS_FOPS
-       help
-         This is the framebuffer driver for the Au1200/Au1300 SOCs.
-         It can drive various panels and CRTs by passing in kernel cmd line
-         option au1200fb:panel=<name>.
-
-config FB_VT8500
-       bool "VIA VT8500 framebuffer support"
-       depends on (FB = y) && ARM && ARCH_VT8500
-       select FB_SYS_FILLRECT if (!FB_WMT_GE_ROPS)
-       select FB_SYS_COPYAREA if (!FB_WMT_GE_ROPS)
-       select FB_SYS_IMAGEBLIT
-       select FB_MODE_HELPERS
-       select VIDEOMODE_HELPERS
-       help
-         This is the framebuffer driver for VIA VT8500 integrated LCD
-         controller.
-
-config FB_WM8505
-       bool "Wondermedia WM8xxx-series frame buffer support"
-       depends on (FB = y) && ARM && ARCH_VT8500
-       select FB_SYS_FILLRECT if (!FB_WMT_GE_ROPS)
-       select FB_SYS_COPYAREA if (!FB_WMT_GE_ROPS)
-       select FB_SYS_IMAGEBLIT
-       select FB_MODE_HELPERS
-       select VIDEOMODE_HELPERS
-       help
-         This is the framebuffer driver for WonderMedia WM8xxx-series
-         integrated LCD controller. This driver covers the WM8505, WM8650
-         and WM8850 SoCs.
-
-config FB_WMT_GE_ROPS
-       bool "VT8500/WM8xxx accelerated raster ops support"
-       depends on (FB = y) && (FB_VT8500 || FB_WM8505)
-       default n
-       help
-         This adds support for accelerated raster operations on the
-         VIA VT8500 and Wondermedia 85xx series SoCs.
-
-source "drivers/video/geode/Kconfig"
-
-config FB_HIT
-       tristate "HD64461 Frame Buffer support"
-       depends on FB && HD64461
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         This is the frame buffer device driver for the Hitachi HD64461 LCD
-         frame buffer card.
-
-config FB_PMAG_AA
-       bool "PMAG-AA TURBOchannel framebuffer support"
-       depends on (FB = y) && TC
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         Support for the PMAG-AA TURBOchannel framebuffer card (1280x1024x1)
-         used mainly in the MIPS-based DECstation series.
-
-config FB_PMAG_BA
-       tristate "PMAG-BA TURBOchannel framebuffer support"
-       depends on FB && TC
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         Support for the PMAG-BA TURBOchannel framebuffer card (1024x864x8)
-         used mainly in the MIPS-based DECstation series.
-
-config FB_PMAGB_B
-       tristate "PMAGB-B TURBOchannel framebuffer support"
-       depends on FB && TC
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         Support for the PMAGB-B TURBOchannel framebuffer card used mainly
-         in the MIPS-based DECstation series. The card is currently only
-         supported in 1280x1024x8 mode.
-
-config FB_MAXINE
-       bool "Maxine (Personal DECstation) onboard framebuffer support"
-       depends on (FB = y) && MACH_DECSTATION
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         Support for the onboard framebuffer (1024x768x8) in the Personal
-         DECstation series (Personal DECstation 5000/20, /25, /33, /50,
-         Codename "Maxine").
-
-config FB_G364
-       bool "G364 frame buffer support"
-       depends on (FB = y) && (MIPS_MAGNUM_4000 || OLIVETTI_M700)
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         The G364 driver is the framebuffer used in MIPS Magnum 4000 and
-         Olivetti M700-10 systems.
-
-config FB_68328
-       bool "Motorola 68328 native frame buffer support"
-       depends on (FB = y) && (M68328 || M68EZ328 || M68VZ328)
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         Say Y here if you want to support the built-in frame buffer of
-         the Motorola 68328 CPU family.
-
-config FB_PXA168
-       tristate "PXA168/910 LCD framebuffer support"
-       depends on FB && (CPU_PXA168 || CPU_PXA910)
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       ---help---
-         Frame buffer driver for the built-in LCD controller in the Marvell
-         MMP processor.
-
-config FB_PXA
-       tristate "PXA LCD framebuffer support"
-       depends on FB && ARCH_PXA
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       ---help---
-         Frame buffer driver for the built-in LCD controller in the Intel
-         PXA2x0 processor.
-
-         This driver is also available as a module ( = code which can be
-         inserted and removed from the running kernel whenever you want). The
-         module will be called pxafb. If you want to compile it as a module,
-         say M here and read <file:Documentation/kbuild/modules.txt>.
-
-         If unsure, say N.
-
-config FB_PXA_OVERLAY
-       bool "Support PXA27x/PXA3xx Overlay(s) as framebuffer"
-       default n
-       depends on FB_PXA && (PXA27x || PXA3xx)
-
-config FB_PXA_SMARTPANEL
-       bool "PXA Smartpanel LCD support"
-       default n
-       depends on FB_PXA
-
-config FB_PXA_PARAMETERS
-       bool "PXA LCD command line parameters"
-       default n
-       depends on FB_PXA
-       ---help---
-         Enable the use of kernel command line or module parameters
-         to configure the physical properties of the LCD panel when
-         using the PXA LCD driver.
-
-         This option allows you to override the panel parameters
-         supplied by the platform in order to support multiple
-         different models of flatpanel. If you will only be using a
-         single model of flatpanel then you can safely leave this
-         option disabled.
-
-         <file:Documentation/fb/pxafb.txt> describes the available parameters.
-
-config PXA3XX_GCU
-       tristate "PXA3xx 2D graphics accelerator driver"
-       depends on FB_PXA
-       help
-         Kernelspace driver for the 2D graphics controller unit (GCU)
-         found on PXA3xx processors. There is a counterpart driver in the
-         DirectFB suite, see http://www.directfb.org/
-
-         If you compile this as a module, it will be called pxa3xx_gcu.
-
-config FB_MBX
-       tristate "2700G LCD framebuffer support"
-       depends on FB && ARCH_PXA
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       ---help---
-         Framebuffer driver for the Intel 2700G (Marathon) Graphics
-         Accelerator
-
-config FB_MBX_DEBUG
-       bool "Enable debugging info via debugfs"
-       depends on FB_MBX && DEBUG_FS
-       default n
-       ---help---
-         Enable this if you want debugging information using the debug
-         filesystem (debugfs)
-
-         If unsure, say N.
-
-config FB_FSL_DIU
-       tristate "Freescale DIU framebuffer support"
-       depends on FB && FSL_SOC
-       select FB_MODE_HELPERS
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       select PPC_LIB_RHEAP
-       ---help---
-         Framebuffer driver for the Freescale SoC DIU
-
-config FB_W100
-       tristate "W100 frame buffer support"
-       depends on FB && ARCH_PXA
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       ---help---
-         Frame buffer driver for the w100 as found on the Sharp SL-Cxx series.
-         It can also drive the w3220 chip found on iPAQ hx4700.
-
-         This driver is also available as a module ( = code which can be
-         inserted and removed from the running kernel whenever you want). The
-         module will be called w100fb. If you want to compile it as a module,
-         say M here and read <file:Documentation/kbuild/modules.txt>.
-
-         If unsure, say N.
-
-config FB_SH_MOBILE_LCDC
-       tristate "SuperH Mobile LCDC framebuffer support"
-       depends on FB && (SUPERH || ARCH_SHMOBILE) && HAVE_CLK
-       select FB_SYS_FILLRECT
-       select FB_SYS_COPYAREA
-       select FB_SYS_IMAGEBLIT
-       select FB_SYS_FOPS
-       select FB_DEFERRED_IO
-       select FB_BACKLIGHT
-       select SH_MIPI_DSI if SH_LCD_MIPI_DSI
-       ---help---
-         Frame buffer driver for the on-chip SH-Mobile LCD controller.
-
-config FB_SH_MOBILE_HDMI
-       tristate "SuperH Mobile HDMI controller support"
-       depends on FB_SH_MOBILE_LCDC
-       select FB_MODE_HELPERS
-       select SOUND
-       select SND
-       select SND_SOC
-       ---help---
-         Driver for the on-chip SH-Mobile HDMI controller.
-
-config FB_TMIO
-       tristate "Toshiba Mobile IO FrameBuffer support"
-       depends on FB && MFD_CORE
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       ---help---
-         Frame buffer driver for the Toshiba Mobile IO integrated as found
-         on the Sharp SL-6000 series
-
-         This driver is also available as a module ( = code which can be
-         inserted and removed from the running kernel whenever you want). The
-         module will be called tmiofb. If you want to compile it as a module,
-         say M here and read <file:Documentation/kbuild/modules.txt>.
-
-         If unsure, say N.
-
-config FB_TMIO_ACCELL
-       bool "tmiofb acceleration"
-       depends on FB_TMIO
-       default y
-
-config FB_S3C
-       tristate "Samsung S3C framebuffer support"
-       depends on FB && (CPU_S3C2416 || ARCH_S3C64XX || ARCH_S5P64X0 || \
-               ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS)
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       ---help---
-         Frame buffer driver for the built-in FB controller in the Samsung
-         SoC line from the S3C2443 onwards, including the S3C2416, S3C2450,
-         and the S3C64XX series such as the S3C6400 and S3C6410.
-
-         These chips all have the same basic framebuffer design with the
-         actual capabilities depending on the chip. For instance the S3C6400
-         and S3C6410 support 4 hardware windows whereas the S3C24XX series
-         currently only have two.
-
-         Currently the support is only for the S3C6400 and S3C6410 SoCs.
-
-config FB_S3C_DEBUG_REGWRITE
-       bool "Debug register writes"
-       depends on FB_S3C
-       ---help---
-         Show all register writes via pr_debug()
-
-config FB_S3C2410
-       tristate "S3C2410 LCD framebuffer support"
-       depends on FB && ARCH_S3C24XX
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       ---help---
-         Frame buffer driver for the built-in LCD controller in the Samsung
-         S3C2410 processor.
-
-         This driver is also available as a module ( = code which can be
-         inserted and removed from the running kernel whenever you want). The
-         module will be called s3c2410fb. If you want to compile it as a module,
-         say M here and read <file:Documentation/kbuild/modules.txt>.
-
-         If unsure, say N.
-config FB_S3C2410_DEBUG
-       bool "S3C2410 lcd debug messages"
-       depends on FB_S3C2410
-       help
-         Turn on debugging messages. Note that you can set/unset at run time
-         through sysfs
-
-config FB_NUC900
-        bool "NUC900 LCD framebuffer support"
-        depends on FB && ARCH_W90X900
-        select FB_CFB_FILLRECT
-        select FB_CFB_COPYAREA
-        select FB_CFB_IMAGEBLIT
-        ---help---
-          Frame buffer driver for the built-in LCD controller in the Nuvoton
-          NUC900 processor
-
-config GPM1040A0_320X240
-        bool "Giantplus Technology GPM1040A0 320x240 Color TFT LCD"
-        depends on FB_NUC900
-
-config FB_SM501
-       tristate "Silicon Motion SM501 framebuffer support"
-       depends on FB && MFD_SM501
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       ---help---
-         Frame buffer driver for the CRT and LCD controllers in the Silicon
-         Motion SM501.
-
-         This driver is also available as a module ( = code which can be
-         inserted and removed from the running kernel whenever you want). The
-         module will be called sm501fb. If you want to compile it as a module,
-         say M here and read <file:Documentation/kbuild/modules.txt>.
-
-         If unsure, say N.
-
-config FB_SMSCUFX
-       tristate "SMSC UFX6000/7000 USB Framebuffer support"
-       depends on FB && USB
-       select FB_MODE_HELPERS
-       select FB_SYS_FILLRECT
-       select FB_SYS_COPYAREA
-       select FB_SYS_IMAGEBLIT
-       select FB_SYS_FOPS
-       select FB_DEFERRED_IO
-       ---help---
-         This is a kernel framebuffer driver for SMSC UFX USB devices.
-         Supports fbdev clients like xf86-video-fbdev, kdrive, fbi, and
-         mplayer -vo fbdev. Supports both UFX6000 (USB 2.0) and UFX7000
-         (USB 3.0) devices.
-         To compile as a module, choose M here: the module name is smscufx.
-
-config FB_UDL
-       tristate "Displaylink USB Framebuffer support"
-       depends on FB && USB
-       select FB_MODE_HELPERS
-       select FB_SYS_FILLRECT
-       select FB_SYS_COPYAREA
-       select FB_SYS_IMAGEBLIT
-       select FB_SYS_FOPS
-       select FB_DEFERRED_IO
-       ---help---
-         This is a kernel framebuffer driver for DisplayLink USB devices.
-         Supports fbdev clients like xf86-video-fbdev, kdrive, fbi, and
-         mplayer -vo fbdev. Supports all USB 2.0 era DisplayLink devices.
-         To compile as a module, choose M here: the module name is udlfb.
-
-config FB_IBM_GXT4500
-       tristate "Framebuffer support for IBM GXT4000P/4500P/6000P/6500P adaptors"
-       depends on FB && PPC
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       ---help---
-         Say Y here to enable support for the IBM GXT4000P/6000P and
-         GXT4500P/6500P display adaptor based on Raster Engine RC1000,
-         found on some IBM System P (pSeries) machines. This driver
-         doesn't use Geometry Engine GT1000.
-
-config FB_PS3
-       tristate "PS3 GPU framebuffer driver"
-       depends on FB && PS3_PS3AV
-       select FB_SYS_FILLRECT
-       select FB_SYS_COPYAREA
-       select FB_SYS_IMAGEBLIT
-       select FB_SYS_FOPS
-       select VT_HW_CONSOLE_BINDING if FRAMEBUFFER_CONSOLE
-       ---help---
-         Include support for the virtual frame buffer in the PS3 platform.
-
-config FB_PS3_DEFAULT_SIZE_M
-       int "PS3 default frame buffer size (in MiB)"
-       depends on FB_PS3
-       default 9
-       ---help---
-         This is the default size (in MiB) of the virtual frame buffer in
-         the PS3.
-         The default value can be overridden on the kernel command line
-         using the "ps3fb" option (e.g. "ps3fb=9M");
-
-config FB_XILINX
-       tristate "Xilinx frame buffer support"
-       depends on FB && (XILINX_VIRTEX || MICROBLAZE || ARCH_ZYNQ)
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       ---help---
-         Include support for the Xilinx ML300/ML403 reference design
-         framebuffer. ML300 carries a 640*480 LCD display on the board,
-         ML403 uses a standard DB15 VGA connector.
-
-config FB_GOLDFISH
-       tristate "Goldfish Framebuffer"
-       depends on FB && HAS_DMA
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       ---help---
-         Framebuffer driver for Goldfish Virtual Platform
-
-config FB_COBALT
-       tristate "Cobalt server LCD frame buffer support"
-       depends on FB && (MIPS_COBALT || MIPS_SEAD3)
-
-config FB_SH7760
-       bool "SH7760/SH7763/SH7720/SH7721 LCDC support"
-       depends on FB && (CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7763 \
-               || CPU_SUBTYPE_SH7720 || CPU_SUBTYPE_SH7721)
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       ---help---
-         Support for the SH7760/SH7763/SH7720/SH7721 integrated
-         (D)STN/TFT LCD Controller.
-         Supports display resolutions up to 1024x1024 pixel, grayscale and
-         color operation, with depths ranging from 1 bpp to 8 bpp monochrome
-         and 8, 15 or 16 bpp color; 90 degrees clockwise display rotation for
-         panels <= 320 pixel horizontal resolution.
-
-config FB_DA8XX
-       tristate "DA8xx/OMAP-L1xx/AM335x Framebuffer support"
-       depends on FB && (ARCH_DAVINCI_DA8XX || SOC_AM33XX)
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       select FB_CFB_REV_PIXELS_IN_BYTE
-       select FB_MODE_HELPERS
-       select VIDEOMODE_HELPERS
-       ---help---
-         This is the frame buffer device driver for the TI LCD controller
-         found on DA8xx/OMAP-L1xx/AM335x SoCs.
-         If unsure, say N.
-
-config FB_VIRTUAL
-       tristate "Virtual Frame Buffer support (ONLY FOR TESTING!)"
-       depends on FB
-       select FB_SYS_FILLRECT
-       select FB_SYS_COPYAREA
-       select FB_SYS_IMAGEBLIT
-       select FB_SYS_FOPS
-       ---help---
-         This is a `virtual' frame buffer device. It operates on a chunk of
-         unswappable kernel memory instead of on the memory of a graphics
-         board. This means you cannot see any output sent to this frame
-         buffer device, while it does consume precious memory. The main use
-         of this frame buffer device is testing and debugging the frame
-         buffer subsystem. Do NOT enable it for normal systems! To protect
-         the innocent, it has to be enabled explicitly at boot time using the
-         kernel option `video=vfb:'.
-
-         To compile this driver as a module, choose M here: the
-         module will be called vfb. In order to load it, you must use
-         the vfb_enable=1 option.
-
-         If unsure, say N.
-
-config XEN_FBDEV_FRONTEND
-       tristate "Xen virtual frame buffer support"
-       depends on FB && XEN
-       select FB_SYS_FILLRECT
-       select FB_SYS_COPYAREA
-       select FB_SYS_IMAGEBLIT
-       select FB_SYS_FOPS
-       select FB_DEFERRED_IO
-       select INPUT_XEN_KBDDEV_FRONTEND if INPUT_MISC
-       select XEN_XENBUS_FRONTEND
-       default y
-       help
-         This driver implements the front-end of the Xen virtual
-         frame buffer driver.  It communicates with a back-end
-         in another domain.
-
-config FB_METRONOME
-       tristate "E-Ink Metronome/8track controller support"
-       depends on FB
-       select FB_SYS_FILLRECT
-       select FB_SYS_COPYAREA
-       select FB_SYS_IMAGEBLIT
-       select FB_SYS_FOPS
-       select FB_DEFERRED_IO
-       help
-         This driver implements support for the E-Ink Metronome
-         controller. The pre-release name for this device was 8track
-         and could also have been called by some vendors as PVI-nnnn.
-
-config FB_MB862XX
-       tristate "Fujitsu MB862xx GDC support"
-       depends on FB
-       depends on PCI || (OF && PPC)
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       ---help---
-         Frame buffer driver for Fujitsu Carmine/Coral-P(A)/Lime controllers.
-
-choice
-       prompt "GDC variant"
-       depends on FB_MB862XX
-
-config FB_MB862XX_PCI_GDC
-       bool "Carmine/Coral-P(A) GDC"
-       depends on PCI
-       ---help---
-         This enables framebuffer support for Fujitsu Carmine/Coral-P(A)
-         PCI graphics controller devices.
-
-config FB_MB862XX_LIME
-       bool "Lime GDC"
-       depends on OF && PPC
-       select FB_FOREIGN_ENDIAN
-       select FB_LITTLE_ENDIAN
-       ---help---
-         Framebuffer support for Fujitsu Lime GDC on host CPU bus.
-
-endchoice
-
-config FB_MB862XX_I2C
-       bool "Support I2C bus on MB862XX GDC"
-       depends on FB_MB862XX && I2C
-       default y
-       help
-         Selecting this option adds Coral-P(A)/Lime GDC I2C bus adapter
-         driver to support accessing I2C devices on controller's I2C bus.
-         These are usually some video decoder chips.
-
-config FB_EP93XX
-       tristate "EP93XX frame buffer support"
-       depends on FB && ARCH_EP93XX
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       ---help---
-         Framebuffer driver for the Cirrus Logic EP93XX series of processors.
-         This driver is also available as a module. The module will be called
-         ep93xx-fb.
-
-config FB_PRE_INIT_FB
-       bool "Don't reinitialize, use bootloader's GDC/Display configuration"
-       depends on FB && FB_MB862XX_LIME
-       ---help---
-         Select this option if display contents should be inherited as set by
-         the bootloader.
-
-config FB_MSM
-       tristate "MSM Framebuffer support"
-       depends on FB && ARCH_MSM
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-
-config FB_MX3
-       tristate "MX3 Framebuffer support"
-       depends on FB && MX3_IPU
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       default y
-       help
-         This is a framebuffer device for the i.MX31 LCD Controller. So
-         far only synchronous displays are supported. If you plan to use
-         an LCD display with your i.MX31 system, say Y here.
-
-config FB_BROADSHEET
-       tristate "E-Ink Broadsheet/Epson S1D13521 controller support"
-       depends on FB
-       select FB_SYS_FILLRECT
-       select FB_SYS_COPYAREA
-       select FB_SYS_IMAGEBLIT
-       select FB_SYS_FOPS
-       select FB_DEFERRED_IO
-       help
-         This driver implements support for the E-Ink Broadsheet
-         controller. The release name for this device was Epson S1D13521
-         and could also have been called by other names when coupled with
-         a bridge adapter.
-
-config FB_AUO_K190X
-       tristate "AUO-K190X EPD controller support"
-       depends on FB
-       select FB_SYS_FILLRECT
-       select FB_SYS_COPYAREA
-       select FB_SYS_IMAGEBLIT
-       select FB_SYS_FOPS
-       select FB_DEFERRED_IO
-       help
-         Provides support for epaper controllers from the K190X series
-         of AUO. These controllers can be used to drive epaper displays
-         from Sipix.
-
-         This option enables the common support, shared by the individual
-         controller drivers. You will also have to enable the driver
-         for the controller type used in your device.
-
-config FB_AUO_K1900
-       tristate "AUO-K1900 EPD controller support"
-       depends on FB && FB_AUO_K190X
-       help
-         This driver implements support for the AUO K1900 epd-controller.
-         This controller can drive Sipix epaper displays but can only do
-         serial updates, reducing the number of possible frames per second.
-
-config FB_AUO_K1901
-       tristate "AUO-K1901 EPD controller support"
-       depends on FB && FB_AUO_K190X
-       help
-         This driver implements support for the AUO K1901 epd-controller.
-         This controller can drive Sipix epaper displays and supports
-         concurrent updates, making higher frames per second possible.
-
-config FB_JZ4740
-       tristate "JZ4740 LCD framebuffer support"
-       depends on FB && MACH_JZ4740
-       select FB_SYS_FILLRECT
-       select FB_SYS_COPYAREA
-       select FB_SYS_IMAGEBLIT
-       help
-         Framebuffer support for the JZ4740 SoC.
-
-config FB_MXS
-       tristate "MXS LCD framebuffer support"
-       depends on FB && ARCH_MXS
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       select FB_MODE_HELPERS
-       select VIDEOMODE_HELPERS
-       help
-         Framebuffer support for the MXS SoC.
-
-config FB_PUV3_UNIGFX
-       tristate "PKUnity v3 Unigfx framebuffer support"
-       depends on FB && UNICORE32 && ARCH_PUV3
-       select FB_SYS_FILLRECT
-       select FB_SYS_COPYAREA
-       select FB_SYS_IMAGEBLIT
-       select FB_SYS_FOPS
-       help
-         Choose this option if you want to use the Unigfx device as a
-         framebuffer device. Without the support of PCI & AGP.
-
-config FB_HYPERV
-       tristate "Microsoft Hyper-V Synthetic Video support"
-       depends on FB && HYPERV
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         This framebuffer driver supports Microsoft Hyper-V Synthetic Video.
-
-config FB_SIMPLE
-       bool "Simple framebuffer support"
-       depends on (FB = y)
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       help
-         Say Y if you want support for a simple frame-buffer.
-
-         This driver assumes that the display hardware has been initialized
-         before the kernel boots, and the kernel will simply render to the
-         pre-allocated frame buffer surface.
-
-         Configuration re: surface address, size, and format must be provided
-         through device tree, or plain old platform data.
-
-source "drivers/video/omap/Kconfig"
-source "drivers/video/omap2/Kconfig"
-source "drivers/video/exynos/Kconfig"
-source "drivers/video/mmp/Kconfig"
-source "drivers/video/backlight/Kconfig"
-
 if VT
        source "drivers/video/console/Kconfig"
 endif
 
 if FB || SGI_NEWPORT_CONSOLE
        source "drivers/video/logo/Kconfig"
-endif
 
-config FB_SH_MOBILE_MERAM
-       tristate "SuperH Mobile MERAM read ahead support"
-       depends on (SUPERH || ARCH_SHMOBILE)
-       select GENERIC_ALLOCATOR
-       ---help---
-         Enable MERAM support for the SuperH controller.
-
-         This will allow for caching of the framebuffer to provide more
-         reliable access under heavy main memory bus traffic situations.
-         Up to 4 memory channels can be configured, allowing 4 RGB or
-         2 YCbCr framebuffers to be configured.
+endif
 
-config FB_SSD1307
-       tristate "Solomon SSD1307 framebuffer support"
-       depends on FB && I2C
-       depends on OF
-       depends on GPIOLIB
-       select FB_SYS_FOPS
-       select FB_SYS_FILLRECT
-       select FB_SYS_COPYAREA
-       select FB_SYS_IMAGEBLIT
-       select FB_DEFERRED_IO
-       select PWM
-       help
-         This driver implements support for the Solomon SSD1307
-         OLED controller over I2C.
 
 endmenu
index 1be26fe10592e853e6ae2bac18059e0facad4fc0..9ad3c17d645689b79e56364377a71671eb4aac23 100644 (file)
-# Makefile for the Linux video drivers.
-# 5 Aug 1999, James Simmons, <mailto:jsimmons@users.sf.net>
-# Rewritten to use lists instead of if-statements.
-
-# Each configuration option enables a list of files.
-
 obj-$(CONFIG_VGASTATE)            += vgastate.o
 obj-$(CONFIG_HDMI)                += hdmi.o
-obj-y                             += fb_notify.o
-obj-$(CONFIG_FB)                  += fb.o
-fb-y                              := fbmem.o fbmon.o fbcmap.o fbsysfs.o \
-                                     modedb.o fbcvt.o
-fb-objs                           := $(fb-y)
 
 obj-$(CONFIG_VT)                 += console/
 obj-$(CONFIG_LOGO)               += logo/
 obj-y                            += backlight/
 
-obj-$(CONFIG_EXYNOS_VIDEO)     += exynos/
-
-obj-$(CONFIG_FB_CFB_FILLRECT)  += cfbfillrect.o
-obj-$(CONFIG_FB_CFB_COPYAREA)  += cfbcopyarea.o
-obj-$(CONFIG_FB_CFB_IMAGEBLIT) += cfbimgblt.o
-obj-$(CONFIG_FB_SYS_FILLRECT)  += sysfillrect.o
-obj-$(CONFIG_FB_SYS_COPYAREA)  += syscopyarea.o
-obj-$(CONFIG_FB_SYS_IMAGEBLIT) += sysimgblt.o
-obj-$(CONFIG_FB_SYS_FOPS)      += fb_sys_fops.o
-obj-$(CONFIG_FB_SVGALIB)       += svgalib.o
-obj-$(CONFIG_FB_MACMODES)      += macmodes.o
-obj-$(CONFIG_FB_DDC)           += fb_ddc.o
-obj-$(CONFIG_FB_DEFERRED_IO)   += fb_defio.o
-obj-$(CONFIG_FB_WMT_GE_ROPS)   += wmt_ge_rops.o
-
-# Hardware specific drivers go first
-obj-$(CONFIG_FB_AMIGA)            += amifb.o c2p_planar.o
-obj-$(CONFIG_FB_ARC)              += arcfb.o
-obj-$(CONFIG_FB_CLPS711X)         += clps711xfb.o
-obj-$(CONFIG_FB_CYBER2000)        += cyber2000fb.o
-obj-$(CONFIG_FB_GRVGA)            += grvga.o
-obj-$(CONFIG_FB_PM2)              += pm2fb.o
-obj-$(CONFIG_FB_PM3)             += pm3fb.o
-
-obj-$(CONFIG_FB_I740)            += i740fb.o
-obj-$(CONFIG_FB_MATROX)                  += matrox/
-obj-$(CONFIG_FB_RIVA)            += riva/
-obj-$(CONFIG_FB_NVIDIA)                  += nvidia/
-obj-$(CONFIG_FB_ATY)             += aty/ macmodes.o
-obj-$(CONFIG_FB_ATY128)                  += aty/ macmodes.o
-obj-$(CONFIG_FB_RADEON)                  += aty/
-obj-$(CONFIG_FB_SIS)             += sis/
-obj-$(CONFIG_FB_VIA)             += via/
-obj-$(CONFIG_FB_KYRO)             += kyro/
-obj-$(CONFIG_FB_SAVAGE)                  += savage/
-obj-$(CONFIG_FB_GEODE)           += geode/
-obj-$(CONFIG_FB_MBX)             += mbx/
-obj-$(CONFIG_FB_NEOMAGIC)         += neofb.o
-obj-$(CONFIG_FB_3DFX)             += tdfxfb.o
-obj-$(CONFIG_FB_CONTROL)          += controlfb.o
-obj-$(CONFIG_FB_PLATINUM)         += platinumfb.o
-obj-$(CONFIG_FB_VALKYRIE)         += valkyriefb.o
-obj-$(CONFIG_FB_CT65550)          += chipsfb.o
-obj-$(CONFIG_FB_IMSTT)            += imsttfb.o
-obj-$(CONFIG_FB_FM2)              += fm2fb.o
-obj-$(CONFIG_FB_VT8623)           += vt8623fb.o
-obj-$(CONFIG_FB_TRIDENT)          += tridentfb.o
-obj-$(CONFIG_FB_LE80578)          += vermilion/
-obj-$(CONFIG_FB_S3)               += s3fb.o
-obj-$(CONFIG_FB_ARK)              += arkfb.o
-obj-$(CONFIG_FB_STI)              += stifb.o
-obj-$(CONFIG_FB_FFB)              += ffb.o sbuslib.o
-obj-$(CONFIG_FB_CG6)              += cg6.o sbuslib.o
-obj-$(CONFIG_FB_CG3)              += cg3.o sbuslib.o
-obj-$(CONFIG_FB_BW2)              += bw2.o sbuslib.o
-obj-$(CONFIG_FB_CG14)             += cg14.o sbuslib.o
-obj-$(CONFIG_FB_P9100)            += p9100.o sbuslib.o
-obj-$(CONFIG_FB_TCX)              += tcx.o sbuslib.o
-obj-$(CONFIG_FB_LEO)              += leo.o sbuslib.o
-obj-$(CONFIG_FB_ACORN)            += acornfb.o
-obj-$(CONFIG_FB_ATARI)            += atafb.o c2p_iplan2.o atafb_mfb.o \
-                                     atafb_iplan2p2.o atafb_iplan2p4.o atafb_iplan2p8.o
-obj-$(CONFIG_FB_MAC)              += macfb.o
-obj-$(CONFIG_FB_HECUBA)           += hecubafb.o
-obj-$(CONFIG_FB_N411)             += n411.o
-obj-$(CONFIG_FB_HGA)              += hgafb.o
-obj-$(CONFIG_FB_XVR500)           += sunxvr500.o
-obj-$(CONFIG_FB_XVR2500)          += sunxvr2500.o
-obj-$(CONFIG_FB_XVR1000)          += sunxvr1000.o
-obj-$(CONFIG_FB_IGA)              += igafb.o
-obj-$(CONFIG_FB_APOLLO)           += dnfb.o
-obj-$(CONFIG_FB_Q40)              += q40fb.o
-obj-$(CONFIG_FB_TGA)              += tgafb.o
-obj-$(CONFIG_FB_HP300)            += hpfb.o
-obj-$(CONFIG_FB_G364)             += g364fb.o
-obj-$(CONFIG_FB_EP93XX)                  += ep93xx-fb.o
-obj-$(CONFIG_FB_SA1100)           += sa1100fb.o
-obj-$(CONFIG_FB_HIT)              += hitfb.o
-obj-$(CONFIG_FB_ATMEL)           += atmel_lcdfb.o
-obj-$(CONFIG_FB_PVR2)             += pvr2fb.o
-obj-$(CONFIG_FB_VOODOO1)          += sstfb.o
-obj-$(CONFIG_FB_ARMCLCD)         += amba-clcd.o
-obj-$(CONFIG_FB_GOLDFISH)         += goldfishfb.o
-obj-$(CONFIG_FB_68328)            += 68328fb.o
-obj-$(CONFIG_FB_GBE)              += gbefb.o
-obj-$(CONFIG_FB_CIRRUS)                  += cirrusfb.o
-obj-$(CONFIG_FB_ASILIANT)        += asiliantfb.o
-obj-$(CONFIG_FB_PXA)             += pxafb.o
-obj-$(CONFIG_FB_PXA168)                  += pxa168fb.o
-obj-$(CONFIG_PXA3XX_GCU)         += pxa3xx-gcu.o
-obj-$(CONFIG_MMP_DISP)           += mmp/
-obj-$(CONFIG_FB_W100)            += w100fb.o
-obj-$(CONFIG_FB_TMIO)            += tmiofb.o
-obj-$(CONFIG_FB_AU1100)                  += au1100fb.o
-obj-$(CONFIG_FB_AU1200)                  += au1200fb.o
-obj-$(CONFIG_FB_VT8500)                  += vt8500lcdfb.o
-obj-$(CONFIG_FB_WM8505)                  += wm8505fb.o
-obj-$(CONFIG_FB_PMAG_AA)         += pmag-aa-fb.o
-obj-$(CONFIG_FB_PMAG_BA)         += pmag-ba-fb.o
-obj-$(CONFIG_FB_PMAGB_B)         += pmagb-b-fb.o
-obj-$(CONFIG_FB_MAXINE)                  += maxinefb.o
-obj-$(CONFIG_FB_METRONOME)        += metronomefb.o
-obj-$(CONFIG_FB_BROADSHEET)       += broadsheetfb.o
-obj-$(CONFIG_FB_AUO_K190X)       += auo_k190x.o
-obj-$(CONFIG_FB_AUO_K1900)       += auo_k1900fb.o
-obj-$(CONFIG_FB_AUO_K1901)       += auo_k1901fb.o
-obj-$(CONFIG_FB_S1D13XXX)        += s1d13xxxfb.o
-obj-$(CONFIG_FB_SH7760)                  += sh7760fb.o
-obj-$(CONFIG_FB_IMX)              += imxfb.o
-obj-$(CONFIG_FB_S3C)             += s3c-fb.o
-obj-$(CONFIG_FB_S3C2410)         += s3c2410fb.o
-obj-$(CONFIG_FB_FSL_DIU)         += fsl-diu-fb.o
-obj-$(CONFIG_FB_COBALT)           += cobalt_lcdfb.o
-obj-$(CONFIG_FB_IBM_GXT4500)     += gxt4500.o
-obj-$(CONFIG_FB_PS3)             += ps3fb.o
-obj-$(CONFIG_FB_SM501)            += sm501fb.o
-obj-$(CONFIG_FB_UDL)             += udlfb.o
-obj-$(CONFIG_FB_SMSCUFX)         += smscufx.o
-obj-$(CONFIG_FB_XILINX)           += xilinxfb.o
-obj-$(CONFIG_SH_MIPI_DSI)        += sh_mipi_dsi.o
-obj-$(CONFIG_FB_SH_MOBILE_HDMI)          += sh_mobile_hdmi.o
-obj-$(CONFIG_FB_SH_MOBILE_MERAM)  += sh_mobile_meram.o
-obj-$(CONFIG_FB_SH_MOBILE_LCDC)          += sh_mobile_lcdcfb.o
-obj-$(CONFIG_FB_OMAP)             += omap/
-obj-y                             += omap2/
-obj-$(CONFIG_XEN_FBDEV_FRONTEND)  += xen-fbfront.o
-obj-$(CONFIG_FB_CARMINE)          += carminefb.o
-obj-$(CONFIG_FB_MB862XX)         += mb862xx/
-obj-$(CONFIG_FB_MSM)              += msm/
-obj-$(CONFIG_FB_NUC900)           += nuc900fb.o
-obj-$(CONFIG_FB_JZ4740)                  += jz4740_fb.o
-obj-$(CONFIG_FB_PUV3_UNIGFX)      += fb-puv3.o
-obj-$(CONFIG_FB_HYPERV)                  += hyperv_fb.o
-obj-$(CONFIG_FB_OPENCORES)       += ocfb.o
-
-# Platform or fallback drivers go here
-obj-$(CONFIG_FB_UVESA)            += uvesafb.o
-obj-$(CONFIG_FB_VESA)             += vesafb.o
-obj-$(CONFIG_FB_EFI)              += efifb.o
-obj-$(CONFIG_FB_VGA16)            += vga16fb.o
-obj-$(CONFIG_FB_OF)               += offb.o
-obj-$(CONFIG_FB_BF537_LQ035)      += bf537-lq035.o
-obj-$(CONFIG_FB_BF54X_LQ043)     += bf54x-lq043fb.o
-obj-$(CONFIG_FB_BFIN_LQ035Q1)     += bfin-lq035q1-fb.o
-obj-$(CONFIG_FB_BFIN_T350MCQB)   += bfin-t350mcqb-fb.o
-obj-$(CONFIG_FB_BFIN_7393)        += bfin_adv7393fb.o
-obj-$(CONFIG_FB_MX3)             += mx3fb.o
-obj-$(CONFIG_FB_DA8XX)           += da8xx-fb.o
-obj-$(CONFIG_FB_MXS)             += mxsfb.o
-obj-$(CONFIG_FB_SSD1307)         += ssd1307fb.o
-obj-$(CONFIG_FB_SIMPLE)           += simplefb.o
-
-# the test framebuffer is last
-obj-$(CONFIG_FB_VIRTUAL)          += vfb.o
+obj-y                            += fbdev/
 
 obj-$(CONFIG_VIDEOMODE_HELPERS) += display_timing.o videomode.o
 ifeq ($(CONFIG_OF),y)
index 5f65ca3d85645edabc1b4f051173ebdb1d4c3d35..026fd12159332c5bf936dbbea79335f58f8634c7 100644 (file)
@@ -46,7 +46,7 @@
 
 #include <asm/io.h>
 
-#include "../sticore.h"
+#include "../fbdev/sticore.h"
 
 /* switching to graphics mode */
 #define BLANK 0
index cecd3de01c2422e6960c0a8ac2b70273879cbf0d..7da1ad03acb57118392dad947ce46703c8abb2ff 100644 (file)
@@ -28,7 +28,7 @@
 #include <asm/cacheflush.h>
 #include <asm/grfioctl.h>
 
-#include "../sticore.h"
+#include "../fbdev/sticore.h"
 
 #define STI_DRIVERVERSION "Version 0.9b"
 
diff --git a/drivers/video/fbdev/Kconfig b/drivers/video/fbdev/Kconfig
new file mode 100644 (file)
index 0000000..e1f4727
--- /dev/null
@@ -0,0 +1,2474 @@
+#
+# fbdev configuration
+#
+
+menuconfig FB
+       tristate "Support for frame buffer devices"
+       ---help---
+         The frame buffer device provides an abstraction for the graphics
+         hardware. It represents the frame buffer of some video hardware and
+         allows application software to access the graphics hardware through
+         a well-defined interface, so the software doesn't need to know
+         anything about the low-level (hardware register) stuff.
+
+         Frame buffer devices work identically across the different
+         architectures supported by Linux and make the implementation of
+         application programs easier and more portable; at this point, an X
+         server exists which uses the frame buffer device exclusively.
+         On several non-X86 architectures, the frame buffer device is the
+         only way to use the graphics hardware.
+
+         The device is accessed through special device nodes, usually located
+         in the /dev directory, i.e. /dev/fb*.
+
+         You need an utility program called fbset to make full use of frame
+         buffer devices. Please read <file:Documentation/fb/framebuffer.txt>
+         and the Framebuffer-HOWTO at
+         <http://www.munted.org.uk/programming/Framebuffer-HOWTO-1.3.html> for more
+         information.
+
+         Say Y here and to the driver for your graphics board below if you
+         are compiling a kernel for a non-x86 architecture.
+
+         If you are compiling for the x86 architecture, you can say Y if you
+         want to play with it, but it is not essential. Please note that
+         running graphical applications that directly touch the hardware
+         (e.g. an accelerated X server) and that are not frame buffer
+         device-aware may cause unexpected results. If unsure, say N.
+
+config FIRMWARE_EDID
+       bool "Enable firmware EDID"
+       depends on FB
+       default n
+       ---help---
+         This enables access to the EDID transferred from the firmware.
+        On the i386, this is from the Video BIOS. Enable this if DDC/I2C
+        transfers do not work for your driver and if you are using
+        nvidiafb, i810fb or savagefb.
+
+        In general, choosing Y for this option is safe.  If you
+        experience extremely long delays while booting before you get
+        something on your display, try setting this to N.  Matrox cards in
+        combination with certain motherboards and monitors are known to
+        suffer from this problem.
+
+config FB_DDC
+       tristate
+       depends on FB
+       select I2C_ALGOBIT
+       select I2C
+       default n
+
+config FB_BOOT_VESA_SUPPORT
+       bool
+       depends on FB
+       default n
+       ---help---
+         If true, at least one selected framebuffer driver can take advantage
+         of VESA video modes set at an early boot stage via the vga= parameter.
+
+config FB_CFB_FILLRECT
+       tristate
+       depends on FB
+       default n
+       ---help---
+         Include the cfb_fillrect function for generic software rectangle
+         filling. This is used by drivers that don't provide their own
+         (accelerated) version.
+
+config FB_CFB_COPYAREA
+       tristate
+       depends on FB
+       default n
+       ---help---
+         Include the cfb_copyarea function for generic software area copying.
+         This is used by drivers that don't provide their own (accelerated)
+         version.
+
+config FB_CFB_IMAGEBLIT
+       tristate
+       depends on FB
+       default n
+       ---help---
+         Include the cfb_imageblit function for generic software image
+         blitting. This is used by drivers that don't provide their own
+         (accelerated) version.
+
+config FB_CFB_REV_PIXELS_IN_BYTE
+       bool
+       depends on FB
+       default n
+       ---help---
+         Allow generic frame-buffer functions to work on displays with 1, 2
+         and 4 bits per pixel depths which has opposite order of pixels in
+         byte order to bytes in long order.
+
+config FB_SYS_FILLRECT
+       tristate
+       depends on FB
+       default n
+       ---help---
+         Include the sys_fillrect function for generic software rectangle
+         filling. This is used by drivers that don't provide their own
+         (accelerated) version and the framebuffer is in system RAM.
+
+config FB_SYS_COPYAREA
+       tristate
+       depends on FB
+       default n
+       ---help---
+         Include the sys_copyarea function for generic software area copying.
+         This is used by drivers that don't provide their own (accelerated)
+         version and the framebuffer is in system RAM.
+
+config FB_SYS_IMAGEBLIT
+       tristate
+       depends on FB
+       default n
+       ---help---
+         Include the sys_imageblit function for generic software image
+         blitting. This is used by drivers that don't provide their own
+         (accelerated) version and the framebuffer is in system RAM.
+
+menuconfig FB_FOREIGN_ENDIAN
+       bool "Framebuffer foreign endianness support"
+       depends on FB
+       ---help---
+         This menu will let you enable support for the framebuffers with
+         non-native endianness (e.g. Little-Endian framebuffer on a
+         Big-Endian machine). Most probably you don't have such hardware,
+         so it's safe to say "n" here.
+
+choice
+       prompt "Choice endianness support"
+       depends on FB_FOREIGN_ENDIAN
+
+config FB_BOTH_ENDIAN
+       bool "Support for Big- and Little-Endian framebuffers"
+
+config FB_BIG_ENDIAN
+       bool "Support for Big-Endian framebuffers only"
+
+config FB_LITTLE_ENDIAN
+       bool "Support for Little-Endian framebuffers only"
+
+endchoice
+
+config FB_SYS_FOPS
+       tristate
+       depends on FB
+       default n
+
+config FB_DEFERRED_IO
+       bool
+       depends on FB
+
+config FB_HECUBA
+       tristate
+       depends on FB
+       depends on FB_DEFERRED_IO
+
+config FB_SVGALIB
+       tristate
+       depends on FB
+       default n
+       ---help---
+         Common utility functions useful to fbdev drivers of VGA-based
+         cards.
+
+config FB_MACMODES
+       tristate
+       depends on FB
+       default n
+
+config FB_BACKLIGHT
+       bool
+       depends on FB
+       select BACKLIGHT_LCD_SUPPORT
+       select BACKLIGHT_CLASS_DEVICE
+       default n
+
+config FB_MODE_HELPERS
+        bool "Enable Video Mode Handling Helpers"
+        depends on FB
+       default n
+       ---help---
+         This enables functions for handling video modes using the
+         Generalized Timing Formula and the EDID parser. A few drivers rely
+          on this feature such as the radeonfb, rivafb, and the i810fb. If
+         your driver does not take advantage of this feature, choosing Y will
+         just increase the kernel size by about 5K.
+
+config FB_TILEBLITTING
+       bool "Enable Tile Blitting Support"
+       depends on FB
+       default n
+       ---help---
+         This enables tile blitting.  Tile blitting is a drawing technique
+        where the screen is divided into rectangular sections (tiles), whereas
+        the standard blitting divides the screen into pixels. Because the
+        default drawing element is a tile, drawing functions will be passed
+        parameters in terms of number of tiles instead of number of pixels.
+        For example, to draw a single character, instead of using bitmaps,
+        an index to an array of bitmaps will be used.  To clear or move a
+        rectangular section of a screen, the rectangle will be described in
+        terms of number of tiles in the x- and y-axis.
+
+        This is particularly important to one driver, matroxfb.  If
+        unsure, say N.
+
+comment "Frame buffer hardware drivers"
+       depends on FB
+
+config FB_GRVGA
+       tristate "Aeroflex Gaisler framebuffer support"
+       depends on FB && SPARC
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       ---help---
+       This enables support for the SVGACTRL framebuffer in the GRLIB IP library from Aeroflex Gaisler.
+
+config FB_CIRRUS
+       tristate "Cirrus Logic support"
+       depends on FB && (ZORRO || PCI)
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       ---help---
+         This enables support for Cirrus Logic GD542x/543x based boards on
+         Amiga: SD64, Piccolo, Picasso II/II+, Picasso IV, or EGS Spectrum.
+
+         If you have a PCI-based system, this enables support for these
+         chips: GD-543x, GD-544x, GD-5480.
+
+         Please read the file <file:Documentation/fb/cirrusfb.txt>.
+
+         Say N unless you have such a graphics board or plan to get one
+         before you next recompile the kernel.
+
+config FB_PM2
+       tristate "Permedia2 support"
+       depends on FB && ((AMIGA && BROKEN) || PCI)
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         This is the frame buffer device driver for cards based on
+         the 3D Labs Permedia, Permedia 2 and Permedia 2V chips.
+         The driver was tested on the following cards:
+               Diamond FireGL 1000 PRO AGP
+               ELSA Gloria Synergy PCI
+               Appian Jeronimo PRO (both heads) PCI
+               3DLabs Oxygen ACX aka EONtronics Picasso P2 PCI
+               Techsource Raptor GFX-8P (aka Sun PGX-32) on SPARC
+               ASK Graphic Blaster Exxtreme AGP
+
+         To compile this driver as a module, choose M here: the
+         module will be called pm2fb.
+
+config FB_PM2_FIFO_DISCONNECT
+       bool "enable FIFO disconnect feature"
+       depends on FB_PM2 && PCI
+       help
+         Support the Permedia2 FIFO disconnect feature.
+
+config FB_ARMCLCD
+       tristate "ARM PrimeCell PL110 support"
+       depends on ARM || ARM64 || COMPILE_TEST
+       depends on FB && ARM_AMBA
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         This framebuffer device driver is for the ARM PrimeCell PL110
+         Colour LCD controller.  ARM PrimeCells provide the building
+         blocks for System on a Chip devices.
+
+         If you want to compile this as a module (=code which can be
+         inserted into and removed from the running kernel), say M
+         here and read <file:Documentation/kbuild/modules.txt>.  The module
+         will be called amba-clcd.
+
+config FB_ACORN
+       bool "Acorn VIDC support"
+       depends on (FB = y) && ARM && ARCH_ACORN
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         This is the frame buffer device driver for the Acorn VIDC graphics
+         hardware found in Acorn RISC PCs and other ARM-based machines.  If
+         unsure, say N.
+
+config FB_CLPS711X
+       bool "CLPS711X LCD support"
+       depends on (FB = y) && ARM && ARCH_CLPS711X
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         Say Y to enable the Framebuffer driver for the CLPS7111 and
+         EP7212 processors.
+
+config FB_SA1100
+       bool "SA-1100 LCD support"
+       depends on (FB = y) && ARM && ARCH_SA1100
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         This is a framebuffer device for the SA-1100 LCD Controller.
+         See <http://www.linux-fbdev.org/> for information on framebuffer
+         devices.
+
+         If you plan to use the LCD display with your SA-1100 system, say
+         Y here.
+
+config FB_IMX
+       tristate "Freescale i.MX1/21/25/27 LCD support"
+       depends on FB && ARCH_MXC
+       select BACKLIGHT_LCD_SUPPORT
+       select LCD_CLASS_DEVICE
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       select FB_MODE_HELPERS
+       select VIDEOMODE_HELPERS
+
+config FB_CYBER2000
+       tristate "CyberPro 2000/2010/5000 support"
+       depends on FB && PCI && (BROKEN || !SPARC64)
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         This enables support for the Integraphics CyberPro 20x0 and 5000
+         VGA chips used in the Rebel.com Netwinder and other machines.
+         Say Y if you have a NetWinder or a graphics card containing this
+         device, otherwise say N.
+
+config FB_CYBER2000_DDC
+       bool "DDC for CyberPro support"
+       depends on FB_CYBER2000
+       select FB_DDC
+       default y
+       help
+         Say Y here if you want DDC support for your CyberPro graphics
+         card. This is only I2C bus support, driver does not use EDID.
+
+config FB_CYBER2000_I2C
+       bool "CyberPro 2000/2010/5000 I2C support"
+       depends on FB_CYBER2000 && I2C && ARCH_NETWINDER
+       select I2C_ALGOBIT
+       help
+         Enable support for the I2C video decoder interface on the
+         Integraphics CyberPro 20x0 and 5000 VGA chips.  This is used
+         on the Netwinder machines for the SAA7111 video capture.
+
+config FB_APOLLO
+       bool
+       depends on (FB = y) && APOLLO
+       default y
+       select FB_CFB_FILLRECT
+       select FB_CFB_IMAGEBLIT
+
+config FB_Q40
+       bool
+       depends on (FB = y) && Q40
+       default y
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+
+config FB_AMIGA
+       tristate "Amiga native chipset support"
+       depends on FB && AMIGA
+       help
+         This is the frame buffer device driver for the builtin graphics
+         chipset found in Amigas.
+
+         To compile this driver as a module, choose M here: the
+         module will be called amifb.
+
+config FB_AMIGA_OCS
+       bool "Amiga OCS chipset support"
+       depends on FB_AMIGA
+       help
+         This enables support for the original Agnus and Denise video chips,
+         found in the Amiga 1000 and most A500's and A2000's. If you intend
+         to run Linux on any of these systems, say Y; otherwise say N.
+
+config FB_AMIGA_ECS
+       bool "Amiga ECS chipset support"
+       depends on FB_AMIGA
+       help
+         This enables support for the Enhanced Chip Set, found in later
+         A500's, later A2000's, the A600, the A3000, the A3000T and CDTV. If
+         you intend to run Linux on any of these systems, say Y; otherwise
+         say N.
+
+config FB_AMIGA_AGA
+       bool "Amiga AGA chipset support"
+       depends on FB_AMIGA
+       help
+         This enables support for the Advanced Graphics Architecture (also
+         known as the AGA or AA) Chip Set, found in the A1200, A4000, A4000T
+         and CD32. If you intend to run Linux on any of these systems, say Y;
+         otherwise say N.
+
+config FB_FM2
+       bool "Amiga FrameMaster II/Rainbow II support"
+       depends on (FB = y) && ZORRO
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         This is the frame buffer device driver for the Amiga FrameMaster
+         card from BSC (exhibited 1992 but not shipped as a CBM product).
+
+config FB_ARC
+       tristate "Arc Monochrome LCD board support"
+       depends on FB && X86
+       select FB_SYS_FILLRECT
+       select FB_SYS_COPYAREA
+       select FB_SYS_IMAGEBLIT
+       select FB_SYS_FOPS
+       help
+         This enables support for the Arc Monochrome LCD board. The board
+         is based on the KS-108 lcd controller and is typically a matrix
+         of 2*n chips. This driver was tested with a 128x64 panel. This
+         driver supports it for use with x86 SBCs through a 16 bit GPIO
+         interface (8 bit data, 8 bit control). If you anticipate using
+         this driver, say Y or M; otherwise say N. You must specify the
+         GPIO IO address to be used for setting control and data.
+
+config FB_ATARI
+       bool "Atari native chipset support"
+       depends on (FB = y) && ATARI
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         This is the frame buffer device driver for the builtin graphics
+         chipset found in Ataris.
+
+config FB_OF
+       bool "Open Firmware frame buffer device support"
+       depends on (FB = y) && (PPC64 || PPC_OF) && (!PPC_PSERIES || PCI)
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       select FB_MACMODES
+       help
+         Say Y if you want support with Open Firmware for your graphics
+         board.
+
+config FB_CONTROL
+       bool "Apple \"control\" display support"
+       depends on (FB = y) && PPC_PMAC && PPC32
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       select FB_MACMODES
+       help
+         This driver supports a frame buffer for the graphics adapter in the
+         Power Macintosh 7300 and others.
+
+config FB_PLATINUM
+       bool "Apple \"platinum\" display support"
+       depends on (FB = y) && PPC_PMAC && PPC32
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       select FB_MACMODES
+       help
+         This driver supports a frame buffer for the "platinum" graphics
+         adapter in some Power Macintoshes.
+
+config FB_VALKYRIE
+       bool "Apple \"valkyrie\" display support"
+       depends on (FB = y) && (MAC || (PPC_PMAC && PPC32))
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       select FB_MACMODES
+       help
+         This driver supports a frame buffer for the "valkyrie" graphics
+         adapter in some Power Macintoshes.
+
+config FB_CT65550
+       bool "Chips 65550 display support"
+       depends on (FB = y) && PPC32 && PCI
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         This is the frame buffer device driver for the Chips & Technologies
+         65550 graphics chip in PowerBooks.
+
+config FB_ASILIANT
+       bool "Asiliant (Chips) 69000 display support"
+       depends on (FB = y) && PCI
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         This is the frame buffer device driver for the Asiliant 69030 chipset
+
+config FB_IMSTT
+       bool "IMS Twin Turbo display support"
+       depends on (FB = y) && PCI
+       select FB_CFB_IMAGEBLIT
+       select FB_MACMODES if PPC
+       help
+         The IMS Twin Turbo is a PCI-based frame buffer card bundled with
+         many Macintosh and compatible computers.
+
+config FB_VGA16
+       tristate "VGA 16-color graphics support"
+       depends on FB && (X86 || PPC)
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       select VGASTATE
+       select FONT_8x16 if FRAMEBUFFER_CONSOLE
+       help
+         This is the frame buffer device driver for VGA 16 color graphic
+         cards. Say Y if you have such a card.
+
+         To compile this driver as a module, choose M here: the
+         module will be called vga16fb.
+
+config FB_BF54X_LQ043
+       tristate "SHARP LQ043 TFT LCD (BF548 EZKIT)"
+       depends on FB && (BF54x) && !BF542
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+        This is the framebuffer device driver for a SHARP LQ043T1DG01 TFT LCD
+
+config FB_BFIN_T350MCQB
+       tristate "Varitronix COG-T350MCQB TFT LCD display (BF527 EZKIT)"
+       depends on FB && BLACKFIN
+       select BFIN_GPTIMERS
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+        This is the framebuffer device driver for a Varitronix VL-PS-COG-T350MCQB-01 display TFT LCD
+        This display is a QVGA 320x240 24-bit RGB display interfaced by an 8-bit wide PPI
+        It uses PPI[0..7] PPI_FS1, PPI_FS2 and PPI_CLK.
+
+config FB_BFIN_LQ035Q1
+       tristate "SHARP LQ035Q1DH02 TFT LCD"
+       depends on FB && BLACKFIN && SPI
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       select BFIN_GPTIMERS
+       help
+         This is the framebuffer device driver for a SHARP LQ035Q1DH02 TFT display found on
+         the Blackfin Landscape LCD EZ-Extender Card.
+         This display is a QVGA 320x240 18-bit RGB display interfaced by an 16-bit wide PPI
+         It uses PPI[0..15] PPI_FS1, PPI_FS2 and PPI_CLK.
+
+         To compile this driver as a module, choose M here: the
+         module will be called bfin-lq035q1-fb.
+
+config FB_BF537_LQ035
+       tristate "SHARP LQ035 TFT LCD (BF537 STAMP)"
+       depends on FB && (BF534 || BF536 || BF537) && I2C_BLACKFIN_TWI
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       select BFIN_GPTIMERS
+       help
+         This is the framebuffer device for a SHARP LQ035Q7DB03 TFT LCD
+         attached to a BF537.
+
+         To compile this driver as a module, choose M here: the
+         module will be called bf537-lq035.
+
+config FB_BFIN_7393
+       tristate "Blackfin ADV7393 Video encoder"
+       depends on FB && BLACKFIN
+       select I2C
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         This is the framebuffer device for a ADV7393 video encoder
+         attached to a Blackfin on the PPI port.
+         If your Blackfin board has a ADV7393 select Y.
+
+         To compile this driver as a module, choose M here: the
+         module will be called bfin_adv7393fb.
+
+choice
+       prompt  "Video mode support"
+       depends on FB_BFIN_7393
+       default NTSC
+
+config NTSC
+       bool 'NTSC 720x480'
+
+config PAL
+       bool 'PAL 720x576'
+
+config NTSC_640x480
+       bool 'NTSC 640x480 (Experimental)'
+
+config PAL_640x480
+       bool 'PAL 640x480 (Experimental)'
+
+config NTSC_YCBCR
+       bool 'NTSC 720x480 YCbCR input'
+
+config PAL_YCBCR
+       bool 'PAL 720x576 YCbCR input'
+
+endchoice
+
+choice
+       prompt  "Size of ADV7393 frame buffer memory Single/Double Size"
+       depends on (FB_BFIN_7393)
+       default ADV7393_1XMEM
+
+config ADV7393_1XMEM
+       bool 'Single'
+
+config ADV7393_2XMEM
+       bool 'Double'
+endchoice
+
+config FB_STI
+       tristate "HP STI frame buffer device support"
+       depends on FB && PARISC
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       select STI_CONSOLE
+       select VT
+       default y
+       ---help---
+         STI refers to the HP "Standard Text Interface" which is a set of
+         BIOS routines contained in a ROM chip in HP PA-RISC based machines.
+         Enabling this option will implement the linux framebuffer device
+         using calls to the STI BIOS routines for initialisation.
+       
+         If you enable this option, you will get a planar framebuffer device
+         /dev/fb which will work on the most common HP graphic cards of the
+         NGLE family, including the artist chips (in the 7xx and Bxxx series),
+         HCRX, HCRX24, CRX, CRX24 and VisEG series.
+
+         It is safe to enable this option, so you should probably say "Y".
+
+config FB_MAC
+       bool "Generic Macintosh display support"
+       depends on (FB = y) && MAC
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       select FB_MACMODES
+
+config FB_HP300
+       bool
+       depends on (FB = y) && DIO
+       select FB_CFB_IMAGEBLIT
+       default y
+
+config FB_TGA
+       tristate "TGA/SFB+ framebuffer support"
+       depends on FB && (ALPHA || TC)
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       select BITREVERSE
+       ---help---
+         This is the frame buffer device driver for generic TGA and SFB+
+         graphic cards.  These include DEC ZLXp-E1, -E2 and -E3 PCI cards,
+         also known as PBXGA-A, -B and -C, and DEC ZLX-E1, -E2 and -E3
+         TURBOchannel cards, also known as PMAGD-A, -B and -C.
+
+         Due to hardware limitations ZLX-E2 and E3 cards are not supported
+         for DECstation 5000/200 systems.  Additionally due to firmware
+         limitations these cards may cause troubles with booting DECstation
+         5000/240 and /260 systems, but are fully supported under Linux if
+         you manage to get it going. ;-)
+
+         Say Y if you have one of those.
+
+config FB_UVESA
+       tristate "Userspace VESA VGA graphics support"
+       depends on FB && CONNECTOR
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       select FB_MODE_HELPERS
+       help
+         This is the frame buffer driver for generic VBE 2.0 compliant
+         graphic cards. It can also take advantage of VBE 3.0 features,
+         such as refresh rate adjustment.
+
+         This driver generally provides more features than vesafb but
+         requires a userspace helper application called 'v86d'. See
+         <file:Documentation/fb/uvesafb.txt> for more information.
+
+         If unsure, say N.
+
+config FB_VESA
+       bool "VESA VGA graphics support"
+       depends on (FB = y) && X86
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       select FB_BOOT_VESA_SUPPORT
+       help
+         This is the frame buffer device driver for generic VESA 2.0
+         compliant graphic cards. The older VESA 1.2 cards are not supported.
+         You will get a boot time penguin logo at no additional cost. Please
+         read <file:Documentation/fb/vesafb.txt>. If unsure, say Y.
+
+config FB_EFI
+       bool "EFI-based Framebuffer Support"
+       depends on (FB = y) && X86 && EFI
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         This is the EFI frame buffer device driver. If the firmware on
+         your platform is EFI 1.10 or UEFI 2.0, select Y to add support for
+         using the EFI framebuffer as your console.
+
+config FB_N411
+       tristate "N411 Apollo/Hecuba devkit support"
+       depends on FB && X86 && MMU
+       select FB_SYS_FILLRECT
+       select FB_SYS_COPYAREA
+       select FB_SYS_IMAGEBLIT
+       select FB_SYS_FOPS
+       select FB_DEFERRED_IO
+       select FB_HECUBA
+       help
+         This enables support for the Apollo display controller in its
+         Hecuba form using the n411 devkit.
+
+config FB_HGA
+       tristate "Hercules mono graphics support"
+       depends on FB && X86
+       help
+         Say Y here if you have a Hercules mono graphics card.
+
+         To compile this driver as a module, choose M here: the
+         module will be called hgafb.
+
+         As this card technology is at least 25 years old,
+         most people will answer N here.
+
+config FB_GBE
+       bool "SGI Graphics Backend frame buffer support"
+       depends on (FB = y) && SGI_IP32
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         This is the frame buffer device driver for SGI Graphics Backend.
+         This chip is used in SGI O2 and Visual Workstation 320/540.
+
+config FB_GBE_MEM
+       int "Video memory size in MB"
+       depends on FB_GBE
+       default 4
+       help
+         This is the amount of memory reserved for the framebuffer,
+         which can be any value between 1MB and 8MB.
+
+config FB_SBUS
+       bool "SBUS and UPA framebuffers"
+       depends on (FB = y) && SPARC
+       help
+         Say Y if you want support for SBUS or UPA based frame buffer device.
+
+config FB_BW2
+       bool "BWtwo support"
+       depends on (FB = y) && (SPARC && FB_SBUS)
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         This is the frame buffer device driver for the BWtwo frame buffer.
+
+config FB_CG3
+       bool "CGthree support"
+       depends on (FB = y) && (SPARC && FB_SBUS)
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         This is the frame buffer device driver for the CGthree frame buffer.
+
+config FB_CG6
+       bool "CGsix (GX,TurboGX) support"
+       depends on (FB = y) && (SPARC && FB_SBUS)
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         This is the frame buffer device driver for the CGsix (GX, TurboGX)
+         frame buffer.
+
+config FB_FFB
+       bool "Creator/Creator3D/Elite3D support"
+       depends on FB_SBUS && SPARC64
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         This is the frame buffer device driver for the Creator, Creator3D,
+         and Elite3D graphics boards.
+
+config FB_TCX
+       bool "TCX (SS4/SS5 only) support"
+       depends on FB_SBUS
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         This is the frame buffer device driver for the TCX 24/8bit frame
+         buffer.
+
+config FB_CG14
+       bool "CGfourteen (SX) support"
+       depends on FB_SBUS
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         This is the frame buffer device driver for the CGfourteen frame
+         buffer on Desktop SPARCsystems with the SX graphics option.
+
+config FB_P9100
+       bool "P9100 (Sparcbook 3 only) support"
+       depends on FB_SBUS
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         This is the frame buffer device driver for the P9100 card
+         supported on Sparcbook 3 machines.
+
+config FB_LEO
+       bool "Leo (ZX) support"
+       depends on FB_SBUS
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         This is the frame buffer device driver for the SBUS-based Sun ZX
+         (leo) frame buffer cards.
+
+config FB_IGA
+       bool "IGA 168x display support"
+       depends on (FB = y) && SPARC32
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         This is the framebuffer device for the INTERGRAPHICS 1680 and
+         successor frame buffer cards.
+
+config FB_XVR500
+       bool "Sun XVR-500 3DLABS Wildcat support"
+       depends on (FB = y) && PCI && SPARC64
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         This is the framebuffer device for the Sun XVR-500 and similar
+         graphics cards based upon the 3DLABS Wildcat chipset.  The driver
+         only works on sparc64 systems where the system firmware has
+         mostly initialized the card already.  It is treated as a
+         completely dumb framebuffer device.
+
+config FB_XVR2500
+       bool "Sun XVR-2500 3DLABS Wildcat support"
+       depends on (FB = y) && PCI && SPARC64
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         This is the framebuffer device for the Sun XVR-2500 and similar
+         graphics cards based upon the 3DLABS Wildcat chipset.  The driver
+         only works on sparc64 systems where the system firmware has
+         mostly initialized the card already.  It is treated as a
+         completely dumb framebuffer device.
+
+config FB_XVR1000
+       bool "Sun XVR-1000 support"
+       depends on (FB = y) && SPARC64
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         This is the framebuffer device for the Sun XVR-1000 and similar
+         graphics cards.  The driver only works on sparc64 systems where
+         the system firmware has mostly initialized the card already.  It
+         is treated as a completely dumb framebuffer device.
+
+config FB_PVR2
+       tristate "NEC PowerVR 2 display support"
+       depends on FB && SH_DREAMCAST
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       ---help---
+         Say Y here if you have a PowerVR 2 card in your box.  If you plan to
+         run linux on your Dreamcast, you will have to say Y here.
+         This driver may or may not work on other PowerVR 2 cards, but is
+         totally untested.  Use at your own risk.  If unsure, say N.
+
+         To compile this driver as a module, choose M here: the
+         module will be called pvr2fb.
+
+         You can pass several parameters to the driver at boot time or at
+         module load time.  The parameters look like "video=pvr2:XXX", where
+         the meaning of XXX can be found at the end of the main source file
+         (<file:drivers/video/pvr2fb.c>). Please see the file
+         <file:Documentation/fb/pvr2fb.txt>.
+
+config FB_OPENCORES
+       tristate "OpenCores VGA/LCD core 2.0 framebuffer support"
+       depends on FB && HAS_DMA
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         This enables support for the OpenCores VGA/LCD core.
+
+         The OpenCores VGA/LCD core is typically used together with
+         softcore CPUs (e.g. OpenRISC or Microblaze) or hard processor
+         systems (e.g. Altera socfpga or Xilinx Zynq) on FPGAs.
+
+         The source code and specification for the core is available at
+         <http://opencores.org/project,vga_lcd>
+
+config FB_S1D13XXX
+       tristate "Epson S1D13XXX framebuffer support"
+       depends on FB
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         Support for S1D13XXX framebuffer device family (currently only
+         working with S1D13806). Product specs at
+         <http://vdc.epson.com/>
+
+config FB_ATMEL
+       tristate "AT91/AT32 LCD Controller support"
+       depends on FB && HAVE_FB_ATMEL
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       select FB_MODE_HELPERS
+       select VIDEOMODE_HELPERS
+       help
+         This enables support for the AT91/AT32 LCD Controller.
+
+config FB_INTSRAM
+       bool "Frame Buffer in internal SRAM"
+       depends on FB_ATMEL && ARCH_AT91SAM9261
+       help
+         Say Y if you want to map Frame Buffer in internal SRAM. Say N if you want
+         to let frame buffer in external SDRAM.
+
+config FB_ATMEL_STN
+       bool "Use a STN display with AT91/AT32 LCD Controller"
+       depends on FB_ATMEL && (MACH_AT91SAM9261EK || MACH_AT91SAM9G10EK)
+       default n
+       help
+         Say Y if you want to connect a STN LCD display to the AT91/AT32 LCD
+         Controller. Say N if you want to connect a TFT.
+
+         If unsure, say N.
+
+config FB_NVIDIA
+       tristate "nVidia Framebuffer Support"
+       depends on FB && PCI
+       select FB_BACKLIGHT if FB_NVIDIA_BACKLIGHT
+       select FB_MODE_HELPERS
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       select BITREVERSE
+       select VGASTATE
+       help
+         This driver supports graphics boards with the nVidia chips, TNT
+         and newer. For very old chipsets, such as the RIVA128, then use
+         the rivafb.
+         Say Y if you have such a graphics board.
+
+         To compile this driver as a module, choose M here: the
+         module will be called nvidiafb.
+
+config FB_NVIDIA_I2C
+       bool "Enable DDC Support"
+       depends on FB_NVIDIA
+       select FB_DDC
+       help
+         This enables I2C support for nVidia Chipsets.  This is used
+         only for getting EDID information from the attached display
+         allowing for robust video mode handling and switching.
+
+         Because fbdev-2.6 requires that drivers must be able to
+         independently validate video mode parameters, you should say Y
+         here.
+
+config FB_NVIDIA_DEBUG
+       bool "Lots of debug output"
+       depends on FB_NVIDIA
+       default n
+       help
+         Say Y here if you want the nVidia driver to output all sorts
+         of debugging information to provide to the maintainer when
+         something goes wrong.
+
+config FB_NVIDIA_BACKLIGHT
+       bool "Support for backlight control"
+       depends on FB_NVIDIA
+       default y
+       help
+         Say Y here if you want to control the backlight of your display.
+
+config FB_RIVA
+       tristate "nVidia Riva support"
+       depends on FB && PCI
+       select FB_BACKLIGHT if FB_RIVA_BACKLIGHT
+       select FB_MODE_HELPERS
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       select BITREVERSE
+       select VGASTATE
+       help
+         This driver supports graphics boards with the nVidia Riva/Geforce
+         chips.
+         Say Y if you have such a graphics board.
+
+         To compile this driver as a module, choose M here: the
+         module will be called rivafb.
+
+config FB_RIVA_I2C
+       bool "Enable DDC Support"
+       depends on FB_RIVA
+       select FB_DDC
+       help
+         This enables I2C support for nVidia Chipsets.  This is used
+         only for getting EDID information from the attached display
+         allowing for robust video mode handling and switching.
+
+         Because fbdev-2.6 requires that drivers must be able to
+         independently validate video mode parameters, you should say Y
+         here.
+
+config FB_RIVA_DEBUG
+       bool "Lots of debug output"
+       depends on FB_RIVA
+       default n
+       help
+         Say Y here if you want the Riva driver to output all sorts
+         of debugging information to provide to the maintainer when
+         something goes wrong.
+
+config FB_RIVA_BACKLIGHT
+       bool "Support for backlight control"
+       depends on FB_RIVA
+       default y
+       help
+         Say Y here if you want to control the backlight of your display.
+
+config FB_I740
+       tristate "Intel740 support"
+       depends on FB && PCI
+       select FB_MODE_HELPERS
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       select VGASTATE
+       select FB_DDC
+       help
+         This driver supports graphics cards based on Intel740 chip.
+
+config FB_I810
+       tristate "Intel 810/815 support"
+       depends on FB && PCI && X86_32 && AGP_INTEL
+       select FB_MODE_HELPERS
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       select VGASTATE
+       help
+         This driver supports the on-board graphics built in to the Intel 810 
+          and 815 chipsets.  Say Y if you have and plan to use such a board.
+
+          To compile this driver as a module, choose M here: the
+         module will be called i810fb.
+
+          For more information, please read 
+         <file:Documentation/fb/intel810.txt>
+
+config FB_I810_GTF
+       bool "use VESA Generalized Timing Formula"
+       depends on FB_I810
+       help
+         If you say Y, then the VESA standard, Generalized Timing Formula 
+          or GTF, will be used to calculate the required video timing values
+         per video mode.  Since the GTF allows nondiscrete timings 
+          (nondiscrete being a range of values as opposed to discrete being a
+          set of values), you'll be able to use any combination of horizontal 
+         and vertical resolutions, and vertical refresh rates without having
+         to specify your own timing parameters.  This is especially useful
+         to maximize the performance of an aging display, or if you just 
+          have a display with nonstandard dimensions. A VESA compliant 
+         monitor is recommended, but can still work with non-compliant ones.
+         If you need or want this, then select this option. The timings may 
+         not be compliant with Intel's recommended values. Use at your own 
+         risk.
+
+          If you say N, the driver will revert to discrete video timings 
+         using a set recommended by Intel in their documentation.
+  
+          If unsure, say N.
+
+config FB_I810_I2C
+       bool "Enable DDC Support"
+       depends on FB_I810 && FB_I810_GTF
+       select FB_DDC
+       help
+
+config FB_LE80578
+       tristate "Intel LE80578 (Vermilion) support"
+       depends on FB && PCI && X86
+       select FB_MODE_HELPERS
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         This driver supports the LE80578 (Vermilion Range) chipset
+
+config FB_CARILLO_RANCH
+       tristate "Intel Carillo Ranch support"
+       depends on FB_LE80578 && FB && PCI && X86
+       help
+         This driver supports the LE80578 (Carillo Ranch) board
+
+config FB_INTEL
+       tristate "Intel 830M/845G/852GM/855GM/865G/915G/945G/945GM/965G/965GM support"
+       depends on FB && PCI && X86 && AGP_INTEL && EXPERT
+       select FB_MODE_HELPERS
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       select FB_BOOT_VESA_SUPPORT if FB_INTEL = y
+       depends on !DRM_I915
+       help
+         This driver supports the on-board graphics built in to the Intel
+          830M/845G/852GM/855GM/865G/915G/915GM/945G/945GM/965G/965GM chipsets.
+          Say Y if you have and plan to use such a board.
+
+         To make FB_INTELFB=Y work you need to say AGP_INTEL=y too.
+
+         To compile this driver as a module, choose M here: the
+         module will be called intelfb.
+
+         For more information, please read <file:Documentation/fb/intelfb.txt>
+
+config FB_INTEL_DEBUG
+       bool "Intel driver Debug Messages"
+       depends on FB_INTEL
+       ---help---
+         Say Y here if you want the Intel driver to output all sorts
+         of debugging information to provide to the maintainer when
+         something goes wrong.
+
+config FB_INTEL_I2C
+       bool "DDC/I2C for Intel framebuffer support"
+       depends on FB_INTEL
+       select FB_DDC
+       default y
+       help
+         Say Y here if you want DDC/I2C support for your on-board Intel graphics.
+
+config FB_MATROX
+       tristate "Matrox acceleration"
+       depends on FB && PCI
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       select FB_TILEBLITTING
+       select FB_MACMODES if PPC_PMAC
+       ---help---
+         Say Y here if you have a Matrox Millennium, Matrox Millennium II,
+         Matrox Mystique, Matrox Mystique 220, Matrox Productiva G100, Matrox
+         Mystique G200, Matrox Millennium G200, Matrox Marvel G200 video,
+         Matrox G400, G450 or G550 card in your box.
+
+         To compile this driver as a module, choose M here: the
+         module will be called matroxfb.
+
+         You can pass several parameters to the driver at boot time or at
+         module load time. The parameters look like "video=matroxfb:XXX", and
+         are described in <file:Documentation/fb/matroxfb.txt>.
+
+config FB_MATROX_MILLENIUM
+       bool "Millennium I/II support"
+       depends on FB_MATROX
+       help
+         Say Y here if you have a Matrox Millennium or Matrox Millennium II
+         video card. If you select "Advanced lowlevel driver options" below,
+         you should check 4 bpp packed pixel, 8 bpp packed pixel, 16 bpp
+         packed pixel, 24 bpp packed pixel and 32 bpp packed pixel. You can
+         also use font widths different from 8.
+
+config FB_MATROX_MYSTIQUE
+       bool "Mystique support"
+       depends on FB_MATROX
+       help
+         Say Y here if you have a Matrox Mystique or Matrox Mystique 220
+         video card. If you select "Advanced lowlevel driver options" below,
+         you should check 8 bpp packed pixel, 16 bpp packed pixel, 24 bpp
+         packed pixel and 32 bpp packed pixel. You can also use font widths
+         different from 8.
+
+config FB_MATROX_G
+       bool "G100/G200/G400/G450/G550 support"
+       depends on FB_MATROX
+       ---help---
+         Say Y here if you have a Matrox G100, G200, G400, G450 or G550 based
+         video card. If you select "Advanced lowlevel driver options", you
+         should check 8 bpp packed pixel, 16 bpp packed pixel, 24 bpp packed
+         pixel and 32 bpp packed pixel. You can also use font widths
+         different from 8.
+
+         If you need support for G400 secondary head, you must say Y to
+         "Matrox I2C support" and "G400 second head support" right below.
+         G450/G550 secondary head and digital output are supported without
+         additional modules.
+
+         The driver starts in monitor mode. You must use the matroxset tool 
+         (available at <ftp://platan.vc.cvut.cz/pub/linux/matrox-latest/>) to 
+         swap primary and secondary head outputs, or to change output mode.  
+         Secondary head driver always start in 640x480 resolution and you 
+         must use fbset to change it.
+
+         Do not forget that second head supports only 16 and 32 bpp
+         packed pixels, so it is a good idea to compile them into the kernel
+         too. You can use only some font widths, as the driver uses generic
+         painting procedures (the secondary head does not use acceleration
+         engine).
+
+         G450/G550 hardware can display TV picture only from secondary CRTC,
+         and it performs no scaling, so picture must have 525 or 625 lines.
+
+config FB_MATROX_I2C
+       tristate "Matrox I2C support"
+       depends on FB_MATROX
+       select FB_DDC
+       ---help---
+         This drivers creates I2C buses which are needed for accessing the
+         DDC (I2C) bus present on all Matroxes, an I2C bus which
+         interconnects Matrox optional devices, like MGA-TVO on G200 and
+         G400, and the secondary head DDC bus, present on G400 only.
+
+         You can say Y or M here if you want to experiment with monitor
+         detection code. You must say Y or M here if you want to use either
+         second head of G400 or MGA-TVO on G200 or G400.
+
+         If you compile it as module, it will create a module named
+         i2c-matroxfb.
+
+config FB_MATROX_MAVEN
+       tristate "G400 second head support"
+       depends on FB_MATROX_G && FB_MATROX_I2C
+       ---help---
+         WARNING !!! This support does not work with G450 !!!
+
+         Say Y or M here if you want to use a secondary head (meaning two
+         monitors in parallel) on G400 or MGA-TVO add-on on G200. Secondary
+         head is not compatible with accelerated XFree 3.3.x SVGA servers -
+         secondary head output is blanked while you are in X. With XFree
+         3.9.17 preview you can use both heads if you use SVGA over fbdev or
+         the fbdev driver on first head and the fbdev driver on second head.
+
+         If you compile it as module, two modules are created,
+         matroxfb_crtc2 and matroxfb_maven. Matroxfb_maven is needed for
+         both G200 and G400, matroxfb_crtc2 is needed only by G400. You must
+         also load i2c-matroxfb to get it to run.
+
+         The driver starts in monitor mode and you must use the matroxset
+         tool (available at
+         <ftp://platan.vc.cvut.cz/pub/linux/matrox-latest/>) to switch it to
+         PAL or NTSC or to swap primary and secondary head outputs.
+         Secondary head driver also always start in 640x480 resolution, you
+         must use fbset to change it.
+
+         Also do not forget that second head supports only 16 and 32 bpp
+         packed pixels, so it is a good idea to compile them into the kernel
+         too.  You can use only some font widths, as the driver uses generic
+         painting procedures (the secondary head does not use acceleration
+         engine).
+
+config FB_RADEON
+       tristate "ATI Radeon display support"
+       depends on FB && PCI
+       select FB_BACKLIGHT if FB_RADEON_BACKLIGHT
+       select FB_MODE_HELPERS
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       select FB_MACMODES if PPC_OF
+       help
+         Choose this option if you want to use an ATI Radeon graphics card as
+         a framebuffer device.  There are both PCI and AGP versions.  You
+         don't need to choose this to run the Radeon in plain VGA mode.
+
+         There is a product page at
+         http://products.amd.com/en-us/GraphicCardResult.aspx
+
+config FB_RADEON_I2C
+       bool "DDC/I2C for ATI Radeon support"
+       depends on FB_RADEON
+       select FB_DDC
+       default y
+       help
+         Say Y here if you want DDC/I2C support for your Radeon board. 
+
+config FB_RADEON_BACKLIGHT
+       bool "Support for backlight control"
+       depends on FB_RADEON
+       default y
+       help
+         Say Y here if you want to control the backlight of your display.
+
+config FB_RADEON_DEBUG
+       bool "Lots of debug output from Radeon driver"
+       depends on FB_RADEON
+       default n
+       help
+         Say Y here if you want the Radeon driver to output all sorts
+         of debugging information to provide to the maintainer when
+         something goes wrong.
+
+config FB_ATY128
+       tristate "ATI Rage128 display support"
+       depends on FB && PCI
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       select FB_BACKLIGHT if FB_ATY128_BACKLIGHT
+       select FB_MACMODES if PPC_PMAC
+       help
+         This driver supports graphics boards with the ATI Rage128 chips.
+         Say Y if you have such a graphics board and read
+         <file:Documentation/fb/aty128fb.txt>.
+
+         To compile this driver as a module, choose M here: the
+         module will be called aty128fb.
+
+config FB_ATY128_BACKLIGHT
+       bool "Support for backlight control"
+       depends on FB_ATY128
+       default y
+       help
+         Say Y here if you want to control the backlight of your display.
+
+config FB_ATY
+       tristate "ATI Mach64 display support" if PCI || ATARI
+       depends on FB && !SPARC32
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       select FB_BACKLIGHT if FB_ATY_BACKLIGHT
+       select FB_MACMODES if PPC
+       help
+         This driver supports graphics boards with the ATI Mach64 chips.
+         Say Y if you have such a graphics board.
+
+         To compile this driver as a module, choose M here: the
+         module will be called atyfb.
+
+config FB_ATY_CT
+       bool "Mach64 CT/VT/GT/LT (incl. 3D RAGE) support"
+       depends on PCI && FB_ATY
+       default y if SPARC64 && PCI
+       help
+         Say Y here to support use of ATI's 64-bit Rage boards (or other
+         boards based on the Mach64 CT, VT, GT, and LT chipsets) as a
+         framebuffer device.  The ATI product support page for these boards
+         is at <http://support.ati.com/products/pc/mach64/mach64.html>.
+
+config FB_ATY_GENERIC_LCD
+       bool "Mach64 generic LCD support"
+       depends on FB_ATY_CT
+       help
+         Say Y if you have a laptop with an ATI Rage LT PRO, Rage Mobility,
+         Rage XC, or Rage XL chipset.
+
+config FB_ATY_GX
+       bool "Mach64 GX support" if PCI
+       depends on FB_ATY
+       default y if ATARI
+       help
+         Say Y here to support use of the ATI Mach64 Graphics Expression
+         board (or other boards based on the Mach64 GX chipset) as a
+         framebuffer device.  The ATI product support page for these boards
+         is at
+         <http://support.ati.com/products/pc/mach64/graphics_xpression.html>.
+
+config FB_ATY_BACKLIGHT
+       bool "Support for backlight control"
+       depends on FB_ATY
+       default y
+       help
+         Say Y here if you want to control the backlight of your display.
+
+config FB_S3
+       tristate "S3 Trio/Virge support"
+       depends on FB && PCI
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       select FB_TILEBLITTING
+       select FB_SVGALIB
+       select VGASTATE
+       select FONT_8x16 if FRAMEBUFFER_CONSOLE
+       ---help---
+         Driver for graphics boards with S3 Trio / S3 Virge chip.
+
+config FB_S3_DDC
+       bool "DDC for S3 support"
+       depends on FB_S3
+       select FB_DDC
+       default y
+       help
+         Say Y here if you want DDC support for your S3 graphics card.
+
+config FB_SAVAGE
+       tristate "S3 Savage support"
+       depends on FB && PCI
+       select FB_MODE_HELPERS
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       select VGASTATE
+       help
+         This driver supports notebooks and computers with S3 Savage PCI/AGP
+         chips.
+
+         Say Y if you have such a graphics card.
+
+         To compile this driver as a module, choose M here; the module
+         will be called savagefb.
+
+config FB_SAVAGE_I2C
+       bool "Enable DDC2 Support"
+       depends on FB_SAVAGE
+       select FB_DDC
+       help
+         This enables I2C support for S3 Savage Chipsets.  This is used
+         only for getting EDID information from the attached display
+         allowing for robust video mode handling and switching.
+
+         Because fbdev-2.6 requires that drivers must be able to
+         independently validate video mode parameters, you should say Y
+         here.
+
+config FB_SAVAGE_ACCEL
+       bool "Enable Console Acceleration"
+       depends on FB_SAVAGE
+       default n
+       help
+          This option will compile in console acceleration support. If
+          the resulting framebuffer console has bothersome glitches, then
+          choose N here.
+
+config FB_SIS
+       tristate "SiS/XGI display support"
+       depends on FB && PCI
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       select FB_BOOT_VESA_SUPPORT if FB_SIS = y
+       help
+         This is the frame buffer device driver for the SiS 300, 315, 330
+         and 340 series as well as XGI V3XT, V5, V8, Z7 graphics chipsets.
+         Specs available at <http://www.sis.com> and <http://www.xgitech.com>.
+
+         To compile this driver as a module, choose M here; the module
+         will be called sisfb.
+
+config FB_SIS_300
+       bool "SiS 300 series support"
+       depends on FB_SIS
+       help
+         Say Y here to support use of the SiS 300/305, 540, 630 and 730.
+
+config FB_SIS_315
+       bool "SiS 315/330/340 series and XGI support"
+       depends on FB_SIS
+       help
+         Say Y here to support use of the SiS 315, 330 and 340 series
+         (315/H/PRO, 55x, 650, 651, 740, 330, 661, 741, 760, 761) as well
+         as XGI V3XT, V5, V8 and Z7.
+
+config FB_VIA
+       tristate "VIA UniChrome (Pro) and Chrome9 display support"
+       depends on FB && PCI && X86
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       select I2C_ALGOBIT
+       select I2C
+       select GPIOLIB
+       help
+         This is the frame buffer device driver for Graphics chips of VIA
+         UniChrome (Pro) Family (CLE266,PM800/CN400,P4M800CE/P4M800Pro/
+         CN700/VN800,CX700/VX700,P4M890) and Chrome9 Family (K8M890,CN896
+         /P4M900,VX800)
+         Say Y if you have a VIA UniChrome graphics board.
+
+         To compile this driver as a module, choose M here: the
+         module will be called viafb.
+
+if FB_VIA
+
+config FB_VIA_DIRECT_PROCFS
+       bool "direct hardware access via procfs (DEPRECATED)(DANGEROUS)"
+       depends on FB_VIA
+       default n
+       help
+         Allow direct hardware access to some output registers via procfs.
+         This is dangerous but may provide the only chance to get the
+         correct output device configuration.
+         Its use is strongly discouraged.
+
+config FB_VIA_X_COMPATIBILITY
+       bool "X server compatibility"
+       depends on FB_VIA
+       default n
+       help
+         This option reduces the functionality (power saving, ...) of the
+         framebuffer to avoid negative impact on the OpenChrome X server.
+         If you use any X server other than fbdev you should enable this
+         otherwise it should be safe to disable it and allow using all
+         features.
+
+endif
+
+config FB_NEOMAGIC
+       tristate "NeoMagic display support"
+       depends on FB && PCI
+       select FB_MODE_HELPERS
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       select VGASTATE
+       help
+         This driver supports notebooks with NeoMagic PCI chips.
+         Say Y if you have such a graphics card. 
+
+         To compile this driver as a module, choose M here: the
+         module will be called neofb.
+
+config FB_KYRO
+       tristate "IMG Kyro support"
+       depends on FB && PCI
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         Say Y here if you have a STG4000 / Kyro / PowerVR 3 based
+         graphics board.
+
+         To compile this driver as a module, choose M here: the
+         module will be called kyrofb.
+
+config FB_3DFX
+       tristate "3Dfx Banshee/Voodoo3/Voodoo5 display support"
+       depends on FB && PCI
+       select FB_CFB_IMAGEBLIT
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_MODE_HELPERS
+       help
+         This driver supports graphics boards with the 3Dfx Banshee,
+         Voodoo3 or VSA-100 (aka Voodoo4/5) chips. Say Y if you have
+         such a graphics board.
+
+         To compile this driver as a module, choose M here: the
+         module will be called tdfxfb.
+
+config FB_3DFX_ACCEL
+       bool "3Dfx Acceleration functions"
+       depends on FB_3DFX
+       ---help---
+       This will compile the 3Dfx Banshee/Voodoo3/VSA-100 frame buffer
+       device driver with acceleration functions.
+
+config FB_3DFX_I2C
+       bool "Enable DDC/I2C support"
+       depends on FB_3DFX
+       select FB_DDC
+       default y
+       help
+         Say Y here if you want DDC/I2C support for your 3dfx Voodoo3.
+
+config FB_VOODOO1
+       tristate "3Dfx Voodoo Graphics (sst1) support"
+       depends on FB && PCI
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       ---help---
+         Say Y here if you have a 3Dfx Voodoo Graphics (Voodoo1/sst1) or 
+         Voodoo2 (cvg) based graphics card.
+
+         To compile this driver as a module, choose M here: the
+         module will be called sstfb.
+
+         WARNING: Do not use any application that uses the 3D engine
+         (namely glide) while using this driver.
+         Please read the <file:Documentation/fb/sstfb.txt> for supported
+         options and other important info  support.
+
+config FB_VT8623
+       tristate "VIA VT8623 support"
+       depends on FB && PCI
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       select FB_TILEBLITTING
+       select FB_SVGALIB
+       select VGASTATE
+       select FONT_8x16 if FRAMEBUFFER_CONSOLE
+       ---help---
+         Driver for CastleRock integrated graphics core in the
+         VIA VT8623 [Apollo CLE266] chipset.
+
+config FB_TRIDENT
+       tristate "Trident/CyberXXX/CyberBlade support"
+       depends on FB && PCI
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       ---help---
+         This is the frame buffer device driver for Trident PCI/AGP chipsets.
+         Supported chipset families are TGUI 9440/96XX, 3DImage, Blade3D
+         and Blade XP.
+         There are also integrated versions of these chips called CyberXXXX,
+         CyberImage or CyberBlade. These chips are mostly found in laptops
+         but also on some motherboards including early VIA EPIA motherboards.
+         For more information, read <file:Documentation/fb/tridentfb.txt>
+
+         Say Y if you have such a graphics board.
+
+         To compile this driver as a module, choose M here: the
+         module will be called tridentfb.
+
+config FB_ARK
+       tristate "ARK 2000PV support"
+       depends on FB && PCI
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       select FB_TILEBLITTING
+       select FB_SVGALIB
+       select VGASTATE
+       select FONT_8x16 if FRAMEBUFFER_CONSOLE
+       ---help---
+         Driver for PCI graphics boards with ARK 2000PV chip
+         and ICS 5342 RAMDAC.
+
+config FB_PM3
+       tristate "Permedia3 support"
+       depends on FB && PCI
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         This is the frame buffer device driver for the 3DLabs Permedia3
+         chipset, used in Formac ProFormance III, 3DLabs Oxygen VX1 &
+         similar boards, 3DLabs Permedia3 Create!, Appian Jeronimo 2000
+         and maybe other boards.
+
+config FB_CARMINE
+       tristate "Fujitsu carmine frame buffer support"
+       depends on FB && PCI
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         This is the frame buffer device driver for the Fujitsu Carmine chip.
+         The driver provides two independent frame buffer devices.
+
+choice
+       depends on FB_CARMINE
+       prompt "DRAM timing"
+       default FB_CARMINE_DRAM_EVAL
+
+config FB_CARMINE_DRAM_EVAL
+       bool "Eval board timings"
+       help
+         Use timings which work on the eval card.
+
+config CARMINE_DRAM_CUSTOM
+       bool "Custom board timings"
+       help
+         Use custom board timings.
+endchoice
+
+config FB_AU1100
+       bool "Au1100 LCD Driver"
+       depends on (FB = y) && MIPS_ALCHEMY
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         This is the framebuffer driver for the AMD Au1100 SOC.  It can drive
+         various panels and CRTs by passing in kernel cmd line option
+         au1100fb:panel=<name>.
+
+config FB_AU1200
+       bool "Au1200/Au1300 LCD Driver"
+       depends on (FB = y) && MIPS_ALCHEMY
+       select FB_SYS_FILLRECT
+       select FB_SYS_COPYAREA
+       select FB_SYS_IMAGEBLIT
+       select FB_SYS_FOPS
+       help
+         This is the framebuffer driver for the Au1200/Au1300 SOCs.
+         It can drive various panels and CRTs by passing in kernel cmd line
+         option au1200fb:panel=<name>.
+
+config FB_VT8500
+       bool "VIA VT8500 framebuffer support"
+       depends on (FB = y) && ARM && ARCH_VT8500
+       select FB_SYS_FILLRECT if (!FB_WMT_GE_ROPS)
+       select FB_SYS_COPYAREA if (!FB_WMT_GE_ROPS)
+       select FB_SYS_IMAGEBLIT
+       select FB_MODE_HELPERS
+       select VIDEOMODE_HELPERS
+       help
+         This is the framebuffer driver for VIA VT8500 integrated LCD
+         controller.
+
+config FB_WM8505
+       bool "Wondermedia WM8xxx-series frame buffer support"
+       depends on (FB = y) && ARM && ARCH_VT8500
+       select FB_SYS_FILLRECT if (!FB_WMT_GE_ROPS)
+       select FB_SYS_COPYAREA if (!FB_WMT_GE_ROPS)
+       select FB_SYS_IMAGEBLIT
+       select FB_MODE_HELPERS
+       select VIDEOMODE_HELPERS
+       help
+         This is the framebuffer driver for WonderMedia WM8xxx-series
+         integrated LCD controller. This driver covers the WM8505, WM8650
+         and WM8850 SoCs.
+
+config FB_WMT_GE_ROPS
+       bool "VT8500/WM8xxx accelerated raster ops support"
+       depends on (FB = y) && (FB_VT8500 || FB_WM8505)
+       default n
+       help
+         This adds support for accelerated raster operations on the
+         VIA VT8500 and Wondermedia 85xx series SoCs.
+
+source "drivers/video/fbdev/geode/Kconfig"
+
+config FB_HIT
+       tristate "HD64461 Frame Buffer support"
+       depends on FB && HD64461
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         This is the frame buffer device driver for the Hitachi HD64461 LCD
+         frame buffer card.
+
+config FB_PMAG_AA
+       bool "PMAG-AA TURBOchannel framebuffer support"
+       depends on (FB = y) && TC
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         Support for the PMAG-AA TURBOchannel framebuffer card (1280x1024x1)
+         used mainly in the MIPS-based DECstation series.
+
+config FB_PMAG_BA
+       tristate "PMAG-BA TURBOchannel framebuffer support"
+       depends on FB && TC
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         Support for the PMAG-BA TURBOchannel framebuffer card (1024x864x8)
+         used mainly in the MIPS-based DECstation series.
+
+config FB_PMAGB_B
+       tristate "PMAGB-B TURBOchannel framebuffer support"
+       depends on FB && TC
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         Support for the PMAGB-B TURBOchannel framebuffer card used mainly
+         in the MIPS-based DECstation series. The card is currently only
+         supported in 1280x1024x8 mode.
+
+config FB_MAXINE
+       bool "Maxine (Personal DECstation) onboard framebuffer support"
+       depends on (FB = y) && MACH_DECSTATION
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         Support for the onboard framebuffer (1024x768x8) in the Personal
+         DECstation series (Personal DECstation 5000/20, /25, /33, /50,
+         Codename "Maxine").
+
+config FB_G364
+       bool "G364 frame buffer support"
+       depends on (FB = y) && (MIPS_MAGNUM_4000 || OLIVETTI_M700)
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         The G364 driver is the framebuffer used in MIPS Magnum 4000 and
+         Olivetti M700-10 systems.
+
+config FB_68328
+       bool "Motorola 68328 native frame buffer support"
+       depends on (FB = y) && (M68328 || M68EZ328 || M68VZ328)
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         Say Y here if you want to support the built-in frame buffer of
+         the Motorola 68328 CPU family.
+
+config FB_PXA168
+       tristate "PXA168/910 LCD framebuffer support"
+       depends on FB && (CPU_PXA168 || CPU_PXA910)
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       ---help---
+         Frame buffer driver for the built-in LCD controller in the Marvell
+         MMP processor.
+
+config FB_PXA
+       tristate "PXA LCD framebuffer support"
+       depends on FB && ARCH_PXA
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       ---help---
+         Frame buffer driver for the built-in LCD controller in the Intel
+         PXA2x0 processor.
+
+         This driver is also available as a module ( = code which can be
+         inserted and removed from the running kernel whenever you want). The
+         module will be called pxafb. If you want to compile it as a module,
+         say M here and read <file:Documentation/kbuild/modules.txt>.
+
+         If unsure, say N.
+
+config FB_PXA_OVERLAY
+       bool "Support PXA27x/PXA3xx Overlay(s) as framebuffer"
+       default n
+       depends on FB_PXA && (PXA27x || PXA3xx)
+
+config FB_PXA_SMARTPANEL
+       bool "PXA Smartpanel LCD support"
+       default n
+       depends on FB_PXA
+
+config FB_PXA_PARAMETERS
+       bool "PXA LCD command line parameters"
+       default n
+       depends on FB_PXA
+       ---help---
+         Enable the use of kernel command line or module parameters
+         to configure the physical properties of the LCD panel when
+         using the PXA LCD driver.
+
+         This option allows you to override the panel parameters
+         supplied by the platform in order to support multiple
+         different models of flatpanel. If you will only be using a
+         single model of flatpanel then you can safely leave this
+         option disabled.
+
+         <file:Documentation/fb/pxafb.txt> describes the available parameters.
+
+config PXA3XX_GCU
+       tristate "PXA3xx 2D graphics accelerator driver"
+       depends on FB_PXA
+       help
+         Kernelspace driver for the 2D graphics controller unit (GCU)
+         found on PXA3xx processors. There is a counterpart driver in the
+         DirectFB suite, see http://www.directfb.org/
+
+         If you compile this as a module, it will be called pxa3xx_gcu.
+
+config FB_MBX
+       tristate "2700G LCD framebuffer support"
+       depends on FB && ARCH_PXA
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       ---help---
+         Framebuffer driver for the Intel 2700G (Marathon) Graphics
+         Accelerator
+
+config FB_MBX_DEBUG
+       bool "Enable debugging info via debugfs"
+       depends on FB_MBX && DEBUG_FS
+       default n
+       ---help---
+         Enable this if you want debugging information using the debug
+         filesystem (debugfs)
+
+         If unsure, say N.
+
+config FB_FSL_DIU
+       tristate "Freescale DIU framebuffer support"
+       depends on FB && FSL_SOC
+       select FB_MODE_HELPERS
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       select PPC_LIB_RHEAP
+       ---help---
+         Framebuffer driver for the Freescale SoC DIU
+
+config FB_W100
+       tristate "W100 frame buffer support"
+       depends on FB && ARCH_PXA
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       ---help---
+         Frame buffer driver for the w100 as found on the Sharp SL-Cxx series.
+         It can also drive the w3220 chip found on iPAQ hx4700.
+
+         This driver is also available as a module ( = code which can be
+         inserted and removed from the running kernel whenever you want). The
+         module will be called w100fb. If you want to compile it as a module,
+         say M here and read <file:Documentation/kbuild/modules.txt>.
+
+         If unsure, say N.
+
+config FB_SH_MOBILE_LCDC
+       tristate "SuperH Mobile LCDC framebuffer support"
+       depends on FB && (SUPERH || ARCH_SHMOBILE) && HAVE_CLK
+       select FB_SYS_FILLRECT
+       select FB_SYS_COPYAREA
+       select FB_SYS_IMAGEBLIT
+       select FB_SYS_FOPS
+       select FB_DEFERRED_IO
+       select FB_BACKLIGHT
+       select SH_MIPI_DSI if SH_LCD_MIPI_DSI
+       ---help---
+         Frame buffer driver for the on-chip SH-Mobile LCD controller.
+
+config FB_SH_MOBILE_HDMI
+       tristate "SuperH Mobile HDMI controller support"
+       depends on FB_SH_MOBILE_LCDC
+       select FB_MODE_HELPERS
+       select SOUND
+       select SND
+       select SND_SOC
+       ---help---
+         Driver for the on-chip SH-Mobile HDMI controller.
+
+config FB_TMIO
+       tristate "Toshiba Mobile IO FrameBuffer support"
+       depends on FB && MFD_CORE
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       ---help---
+         Frame buffer driver for the Toshiba Mobile IO integrated as found
+         on the Sharp SL-6000 series
+
+         This driver is also available as a module ( = code which can be
+         inserted and removed from the running kernel whenever you want). The
+         module will be called tmiofb. If you want to compile it as a module,
+         say M here and read <file:Documentation/kbuild/modules.txt>.
+
+         If unsure, say N.
+
+config FB_TMIO_ACCELL
+       bool "tmiofb acceleration"
+       depends on FB_TMIO
+       default y
+
+config FB_S3C
+       tristate "Samsung S3C framebuffer support"
+       depends on FB && (CPU_S3C2416 || ARCH_S3C64XX || ARCH_S5P64X0 || \
+               ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS)
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       ---help---
+         Frame buffer driver for the built-in FB controller in the Samsung
+         SoC line from the S3C2443 onwards, including the S3C2416, S3C2450,
+         and the S3C64XX series such as the S3C6400 and S3C6410.
+
+         These chips all have the same basic framebuffer design with the
+         actual capabilities depending on the chip. For instance the S3C6400
+         and S3C6410 support 4 hardware windows whereas the S3C24XX series
+         currently only have two.
+
+         Currently the support is only for the S3C6400 and S3C6410 SoCs.
+
+config FB_S3C_DEBUG_REGWRITE
+       bool "Debug register writes"
+       depends on FB_S3C
+       ---help---
+         Show all register writes via pr_debug()
+
+config FB_S3C2410
+       tristate "S3C2410 LCD framebuffer support"
+       depends on FB && ARCH_S3C24XX
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       ---help---
+         Frame buffer driver for the built-in LCD controller in the Samsung
+         S3C2410 processor.
+
+         This driver is also available as a module ( = code which can be
+         inserted and removed from the running kernel whenever you want). The
+         module will be called s3c2410fb. If you want to compile it as a module,
+         say M here and read <file:Documentation/kbuild/modules.txt>.
+
+         If unsure, say N.
+config FB_S3C2410_DEBUG
+       bool "S3C2410 lcd debug messages"
+       depends on FB_S3C2410
+       help
+         Turn on debugging messages. Note that you can set/unset at run time
+         through sysfs
+
+config FB_NUC900
+        bool "NUC900 LCD framebuffer support"
+        depends on FB && ARCH_W90X900
+        select FB_CFB_FILLRECT
+        select FB_CFB_COPYAREA
+        select FB_CFB_IMAGEBLIT
+        ---help---
+          Frame buffer driver for the built-in LCD controller in the Nuvoton
+          NUC900 processor
+
+config GPM1040A0_320X240
+        bool "Giantplus Technology GPM1040A0 320x240 Color TFT LCD"
+        depends on FB_NUC900
+
+config FB_SM501
+       tristate "Silicon Motion SM501 framebuffer support"
+       depends on FB && MFD_SM501
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       ---help---
+         Frame buffer driver for the CRT and LCD controllers in the Silicon
+         Motion SM501.
+
+         This driver is also available as a module ( = code which can be
+         inserted and removed from the running kernel whenever you want). The
+         module will be called sm501fb. If you want to compile it as a module,
+         say M here and read <file:Documentation/kbuild/modules.txt>.
+
+         If unsure, say N.
+
+config FB_SMSCUFX
+       tristate "SMSC UFX6000/7000 USB Framebuffer support"
+       depends on FB && USB
+       select FB_MODE_HELPERS
+       select FB_SYS_FILLRECT
+       select FB_SYS_COPYAREA
+       select FB_SYS_IMAGEBLIT
+       select FB_SYS_FOPS
+       select FB_DEFERRED_IO
+       ---help---
+         This is a kernel framebuffer driver for SMSC UFX USB devices.
+         Supports fbdev clients like xf86-video-fbdev, kdrive, fbi, and
+         mplayer -vo fbdev. Supports both UFX6000 (USB 2.0) and UFX7000
+         (USB 3.0) devices.
+         To compile as a module, choose M here: the module name is smscufx.
+
+config FB_UDL
+       tristate "Displaylink USB Framebuffer support"
+       depends on FB && USB
+       select FB_MODE_HELPERS
+       select FB_SYS_FILLRECT
+       select FB_SYS_COPYAREA
+       select FB_SYS_IMAGEBLIT
+       select FB_SYS_FOPS
+       select FB_DEFERRED_IO
+       ---help---
+         This is a kernel framebuffer driver for DisplayLink USB devices.
+         Supports fbdev clients like xf86-video-fbdev, kdrive, fbi, and
+         mplayer -vo fbdev. Supports all USB 2.0 era DisplayLink devices.
+         To compile as a module, choose M here: the module name is udlfb.
+
+config FB_IBM_GXT4500
+       tristate "Framebuffer support for IBM GXT4000P/4500P/6000P/6500P adaptors"
+       depends on FB && PPC
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       ---help---
+         Say Y here to enable support for the IBM GXT4000P/6000P and
+         GXT4500P/6500P display adaptor based on Raster Engine RC1000,
+         found on some IBM System P (pSeries) machines. This driver
+         doesn't use Geometry Engine GT1000.
+
+config FB_PS3
+       tristate "PS3 GPU framebuffer driver"
+       depends on FB && PS3_PS3AV
+       select FB_SYS_FILLRECT
+       select FB_SYS_COPYAREA
+       select FB_SYS_IMAGEBLIT
+       select FB_SYS_FOPS
+       select VT_HW_CONSOLE_BINDING if FRAMEBUFFER_CONSOLE
+       ---help---
+         Include support for the virtual frame buffer in the PS3 platform.
+
+config FB_PS3_DEFAULT_SIZE_M
+       int "PS3 default frame buffer size (in MiB)"
+       depends on FB_PS3
+       default 9
+       ---help---
+         This is the default size (in MiB) of the virtual frame buffer in
+         the PS3.
+         The default value can be overridden on the kernel command line
+         using the "ps3fb" option (e.g. "ps3fb=9M");
+
+config FB_XILINX
+       tristate "Xilinx frame buffer support"
+       depends on FB && (XILINX_VIRTEX || MICROBLAZE || ARCH_ZYNQ)
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       ---help---
+         Include support for the Xilinx ML300/ML403 reference design
+         framebuffer. ML300 carries a 640*480 LCD display on the board,
+         ML403 uses a standard DB15 VGA connector.
+
+config FB_GOLDFISH
+       tristate "Goldfish Framebuffer"
+       depends on FB && HAS_DMA
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       ---help---
+         Framebuffer driver for Goldfish Virtual Platform
+
+config FB_COBALT
+       tristate "Cobalt server LCD frame buffer support"
+       depends on FB && (MIPS_COBALT || MIPS_SEAD3)
+
+config FB_SH7760
+       bool "SH7760/SH7763/SH7720/SH7721 LCDC support"
+       depends on FB && (CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7763 \
+               || CPU_SUBTYPE_SH7720 || CPU_SUBTYPE_SH7721)
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       ---help---
+         Support for the SH7760/SH7763/SH7720/SH7721 integrated
+         (D)STN/TFT LCD Controller.
+         Supports display resolutions up to 1024x1024 pixel, grayscale and
+         color operation, with depths ranging from 1 bpp to 8 bpp monochrome
+         and 8, 15 or 16 bpp color; 90 degrees clockwise display rotation for
+         panels <= 320 pixel horizontal resolution.
+
+config FB_DA8XX
+       tristate "DA8xx/OMAP-L1xx/AM335x Framebuffer support"
+       depends on FB && (ARCH_DAVINCI_DA8XX || SOC_AM33XX)
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       select FB_CFB_REV_PIXELS_IN_BYTE
+       select FB_MODE_HELPERS
+       select VIDEOMODE_HELPERS
+       ---help---
+         This is the frame buffer device driver for the TI LCD controller
+         found on DA8xx/OMAP-L1xx/AM335x SoCs.
+         If unsure, say N.
+
+config FB_VIRTUAL
+       tristate "Virtual Frame Buffer support (ONLY FOR TESTING!)"
+       depends on FB
+       select FB_SYS_FILLRECT
+       select FB_SYS_COPYAREA
+       select FB_SYS_IMAGEBLIT
+       select FB_SYS_FOPS
+       ---help---
+         This is a `virtual' frame buffer device. It operates on a chunk of
+         unswappable kernel memory instead of on the memory of a graphics
+         board. This means you cannot see any output sent to this frame
+         buffer device, while it does consume precious memory. The main use
+         of this frame buffer device is testing and debugging the frame
+         buffer subsystem. Do NOT enable it for normal systems! To protect
+         the innocent, it has to be enabled explicitly at boot time using the
+         kernel option `video=vfb:'.
+
+         To compile this driver as a module, choose M here: the
+         module will be called vfb. In order to load it, you must use
+         the vfb_enable=1 option.
+
+         If unsure, say N.
+
+config XEN_FBDEV_FRONTEND
+       tristate "Xen virtual frame buffer support"
+       depends on FB && XEN
+       select FB_SYS_FILLRECT
+       select FB_SYS_COPYAREA
+       select FB_SYS_IMAGEBLIT
+       select FB_SYS_FOPS
+       select FB_DEFERRED_IO
+       select INPUT_XEN_KBDDEV_FRONTEND if INPUT_MISC
+       select XEN_XENBUS_FRONTEND
+       default y
+       help
+         This driver implements the front-end of the Xen virtual
+         frame buffer driver.  It communicates with a back-end
+         in another domain.
+
+config FB_METRONOME
+       tristate "E-Ink Metronome/8track controller support"
+       depends on FB
+       select FB_SYS_FILLRECT
+       select FB_SYS_COPYAREA
+       select FB_SYS_IMAGEBLIT
+       select FB_SYS_FOPS
+       select FB_DEFERRED_IO
+       help
+         This driver implements support for the E-Ink Metronome
+         controller. The pre-release name for this device was 8track
+         and could also have been called by some vendors as PVI-nnnn.
+
+config FB_MB862XX
+       tristate "Fujitsu MB862xx GDC support"
+       depends on FB
+       depends on PCI || (OF && PPC)
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       ---help---
+         Frame buffer driver for Fujitsu Carmine/Coral-P(A)/Lime controllers.
+
+choice
+       prompt "GDC variant"
+       depends on FB_MB862XX
+
+config FB_MB862XX_PCI_GDC
+       bool "Carmine/Coral-P(A) GDC"
+       depends on PCI
+       ---help---
+         This enables framebuffer support for Fujitsu Carmine/Coral-P(A)
+         PCI graphics controller devices.
+
+config FB_MB862XX_LIME
+       bool "Lime GDC"
+       depends on OF && PPC
+       select FB_FOREIGN_ENDIAN
+       select FB_LITTLE_ENDIAN
+       ---help---
+         Framebuffer support for Fujitsu Lime GDC on host CPU bus.
+
+endchoice
+
+config FB_MB862XX_I2C
+       bool "Support I2C bus on MB862XX GDC"
+       depends on FB_MB862XX && I2C
+       default y
+       help
+         Selecting this option adds Coral-P(A)/Lime GDC I2C bus adapter
+         driver to support accessing I2C devices on controller's I2C bus.
+         These are usually some video decoder chips.
+
+config FB_EP93XX
+       tristate "EP93XX frame buffer support"
+       depends on FB && ARCH_EP93XX
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       ---help---
+         Framebuffer driver for the Cirrus Logic EP93XX series of processors.
+         This driver is also available as a module. The module will be called
+         ep93xx-fb.
+
+config FB_PRE_INIT_FB
+       bool "Don't reinitialize, use bootloader's GDC/Display configuration"
+       depends on FB && FB_MB862XX_LIME
+       ---help---
+         Select this option if display contents should be inherited as set by
+         the bootloader.
+
+config FB_MSM
+       tristate "MSM Framebuffer support"
+       depends on FB && ARCH_MSM
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+
+config FB_MX3
+       tristate "MX3 Framebuffer support"
+       depends on FB && MX3_IPU
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       default y
+       help
+         This is a framebuffer device for the i.MX31 LCD Controller. So
+         far only synchronous displays are supported. If you plan to use
+         an LCD display with your i.MX31 system, say Y here.
+
+config FB_BROADSHEET
+       tristate "E-Ink Broadsheet/Epson S1D13521 controller support"
+       depends on FB
+       select FB_SYS_FILLRECT
+       select FB_SYS_COPYAREA
+       select FB_SYS_IMAGEBLIT
+       select FB_SYS_FOPS
+       select FB_DEFERRED_IO
+       help
+         This driver implements support for the E-Ink Broadsheet
+         controller. The release name for this device was Epson S1D13521
+         and could also have been called by other names when coupled with
+         a bridge adapter.
+
+config FB_AUO_K190X
+       tristate "AUO-K190X EPD controller support"
+       depends on FB
+       select FB_SYS_FILLRECT
+       select FB_SYS_COPYAREA
+       select FB_SYS_IMAGEBLIT
+       select FB_SYS_FOPS
+       select FB_DEFERRED_IO
+       help
+         Provides support for epaper controllers from the K190X series
+         of AUO. These controllers can be used to drive epaper displays
+         from Sipix.
+
+         This option enables the common support, shared by the individual
+         controller drivers. You will also have to enable the driver
+         for the controller type used in your device.
+
+config FB_AUO_K1900
+       tristate "AUO-K1900 EPD controller support"
+       depends on FB && FB_AUO_K190X
+       help
+         This driver implements support for the AUO K1900 epd-controller.
+         This controller can drive Sipix epaper displays but can only do
+         serial updates, reducing the number of possible frames per second.
+
+config FB_AUO_K1901
+       tristate "AUO-K1901 EPD controller support"
+       depends on FB && FB_AUO_K190X
+       help
+         This driver implements support for the AUO K1901 epd-controller.
+         This controller can drive Sipix epaper displays and supports
+         concurrent updates, making higher frames per second possible.
+
+config FB_JZ4740
+       tristate "JZ4740 LCD framebuffer support"
+       depends on FB && MACH_JZ4740
+       select FB_SYS_FILLRECT
+       select FB_SYS_COPYAREA
+       select FB_SYS_IMAGEBLIT
+       help
+         Framebuffer support for the JZ4740 SoC.
+
+config FB_MXS
+       tristate "MXS LCD framebuffer support"
+       depends on FB && ARCH_MXS
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       select FB_MODE_HELPERS
+       select VIDEOMODE_HELPERS
+       help
+         Framebuffer support for the MXS SoC.
+
+config FB_PUV3_UNIGFX
+       tristate "PKUnity v3 Unigfx framebuffer support"
+       depends on FB && UNICORE32 && ARCH_PUV3
+       select FB_SYS_FILLRECT
+       select FB_SYS_COPYAREA
+       select FB_SYS_IMAGEBLIT
+       select FB_SYS_FOPS
+       help
+         Choose this option if you want to use the Unigfx device as a
+         framebuffer device. Without the support of PCI & AGP.
+
+config FB_HYPERV
+       tristate "Microsoft Hyper-V Synthetic Video support"
+       depends on FB && HYPERV
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         This framebuffer driver supports Microsoft Hyper-V Synthetic Video.
+
+config FB_SIMPLE
+       bool "Simple framebuffer support"
+       depends on (FB = y)
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       help
+         Say Y if you want support for a simple frame-buffer.
+
+         This driver assumes that the display hardware has been initialized
+         before the kernel boots, and the kernel will simply render to the
+         pre-allocated frame buffer surface.
+
+         Configuration re: surface address, size, and format must be provided
+         through device tree, or plain old platform data.
+
+source "drivers/video/fbdev/omap/Kconfig"
+source "drivers/video/fbdev/omap2/Kconfig"
+source "drivers/video/fbdev/exynos/Kconfig"
+source "drivers/video/fbdev/mmp/Kconfig"
+
+config FB_SH_MOBILE_MERAM
+       tristate "SuperH Mobile MERAM read ahead support"
+       depends on (SUPERH || ARCH_SHMOBILE)
+       select GENERIC_ALLOCATOR
+       ---help---
+         Enable MERAM support for the SuperH controller.
+
+         This will allow for caching of the framebuffer to provide more
+         reliable access under heavy main memory bus traffic situations.
+         Up to 4 memory channels can be configured, allowing 4 RGB or
+         2 YCbCr framebuffers to be configured.
+
+config FB_SSD1307
+       tristate "Solomon SSD1307 framebuffer support"
+       depends on FB && I2C
+       depends on OF
+       depends on GPIOLIB
+       select FB_SYS_FOPS
+       select FB_SYS_FILLRECT
+       select FB_SYS_COPYAREA
+       select FB_SYS_IMAGEBLIT
+       select FB_DEFERRED_IO
+       select PWM
+       help
+         This driver implements support for the Solomon SSD1307
+         OLED controller over I2C.
diff --git a/drivers/video/fbdev/Makefile b/drivers/video/fbdev/Makefile
new file mode 100644 (file)
index 0000000..0284f2a
--- /dev/null
@@ -0,0 +1,152 @@
+# Makefile for the Linux video drivers.
+# 5 Aug 1999, James Simmons, <mailto:jsimmons@users.sf.net>
+# Rewritten to use lists instead of if-statements.
+
+# Each configuration option enables a list of files.
+
+obj-y                          += core/
+
+obj-$(CONFIG_EXYNOS_VIDEO)     += exynos/
+
+obj-$(CONFIG_FB_MACMODES)      += macmodes.o
+obj-$(CONFIG_FB_WMT_GE_ROPS)   += wmt_ge_rops.o
+
+# Hardware specific drivers go first
+obj-$(CONFIG_FB_AMIGA)            += amifb.o c2p_planar.o
+obj-$(CONFIG_FB_ARC)              += arcfb.o
+obj-$(CONFIG_FB_CLPS711X)         += clps711xfb.o
+obj-$(CONFIG_FB_CYBER2000)        += cyber2000fb.o
+obj-$(CONFIG_FB_GRVGA)            += grvga.o
+obj-$(CONFIG_FB_PM2)              += pm2fb.o
+obj-$(CONFIG_FB_PM3)             += pm3fb.o
+
+obj-$(CONFIG_FB_I740)            += i740fb.o
+obj-$(CONFIG_FB_MATROX)                  += matrox/
+obj-$(CONFIG_FB_RIVA)            += riva/
+obj-$(CONFIG_FB_NVIDIA)                  += nvidia/
+obj-$(CONFIG_FB_ATY)             += aty/ macmodes.o
+obj-$(CONFIG_FB_ATY128)                  += aty/ macmodes.o
+obj-$(CONFIG_FB_RADEON)                  += aty/
+obj-$(CONFIG_FB_SIS)             += sis/
+obj-$(CONFIG_FB_VIA)             += via/
+obj-$(CONFIG_FB_KYRO)             += kyro/
+obj-$(CONFIG_FB_SAVAGE)                  += savage/
+obj-$(CONFIG_FB_GEODE)           += geode/
+obj-$(CONFIG_FB_MBX)             += mbx/
+obj-$(CONFIG_FB_NEOMAGIC)         += neofb.o
+obj-$(CONFIG_FB_3DFX)             += tdfxfb.o
+obj-$(CONFIG_FB_CONTROL)          += controlfb.o
+obj-$(CONFIG_FB_PLATINUM)         += platinumfb.o
+obj-$(CONFIG_FB_VALKYRIE)         += valkyriefb.o
+obj-$(CONFIG_FB_CT65550)          += chipsfb.o
+obj-$(CONFIG_FB_IMSTT)            += imsttfb.o
+obj-$(CONFIG_FB_FM2)              += fm2fb.o
+obj-$(CONFIG_FB_VT8623)           += vt8623fb.o
+obj-$(CONFIG_FB_TRIDENT)          += tridentfb.o
+obj-$(CONFIG_FB_LE80578)          += vermilion/
+obj-$(CONFIG_FB_S3)               += s3fb.o
+obj-$(CONFIG_FB_ARK)              += arkfb.o
+obj-$(CONFIG_FB_STI)              += stifb.o
+obj-$(CONFIG_FB_FFB)              += ffb.o sbuslib.o
+obj-$(CONFIG_FB_CG6)              += cg6.o sbuslib.o
+obj-$(CONFIG_FB_CG3)              += cg3.o sbuslib.o
+obj-$(CONFIG_FB_BW2)              += bw2.o sbuslib.o
+obj-$(CONFIG_FB_CG14)             += cg14.o sbuslib.o
+obj-$(CONFIG_FB_P9100)            += p9100.o sbuslib.o
+obj-$(CONFIG_FB_TCX)              += tcx.o sbuslib.o
+obj-$(CONFIG_FB_LEO)              += leo.o sbuslib.o
+obj-$(CONFIG_FB_ACORN)            += acornfb.o
+obj-$(CONFIG_FB_ATARI)            += atafb.o c2p_iplan2.o atafb_mfb.o \
+                                     atafb_iplan2p2.o atafb_iplan2p4.o atafb_iplan2p8.o
+obj-$(CONFIG_FB_MAC)              += macfb.o
+obj-$(CONFIG_FB_HECUBA)           += hecubafb.o
+obj-$(CONFIG_FB_N411)             += n411.o
+obj-$(CONFIG_FB_HGA)              += hgafb.o
+obj-$(CONFIG_FB_XVR500)           += sunxvr500.o
+obj-$(CONFIG_FB_XVR2500)          += sunxvr2500.o
+obj-$(CONFIG_FB_XVR1000)          += sunxvr1000.o
+obj-$(CONFIG_FB_IGA)              += igafb.o
+obj-$(CONFIG_FB_APOLLO)           += dnfb.o
+obj-$(CONFIG_FB_Q40)              += q40fb.o
+obj-$(CONFIG_FB_TGA)              += tgafb.o
+obj-$(CONFIG_FB_HP300)            += hpfb.o
+obj-$(CONFIG_FB_G364)             += g364fb.o
+obj-$(CONFIG_FB_EP93XX)                  += ep93xx-fb.o
+obj-$(CONFIG_FB_SA1100)           += sa1100fb.o
+obj-$(CONFIG_FB_HIT)              += hitfb.o
+obj-$(CONFIG_FB_ATMEL)           += atmel_lcdfb.o
+obj-$(CONFIG_FB_PVR2)             += pvr2fb.o
+obj-$(CONFIG_FB_VOODOO1)          += sstfb.o
+obj-$(CONFIG_FB_ARMCLCD)         += amba-clcd.o
+obj-$(CONFIG_FB_GOLDFISH)         += goldfishfb.o
+obj-$(CONFIG_FB_68328)            += 68328fb.o
+obj-$(CONFIG_FB_GBE)              += gbefb.o
+obj-$(CONFIG_FB_CIRRUS)                  += cirrusfb.o
+obj-$(CONFIG_FB_ASILIANT)        += asiliantfb.o
+obj-$(CONFIG_FB_PXA)             += pxafb.o
+obj-$(CONFIG_FB_PXA168)                  += pxa168fb.o
+obj-$(CONFIG_PXA3XX_GCU)         += pxa3xx-gcu.o
+obj-$(CONFIG_MMP_DISP)           += mmp/
+obj-$(CONFIG_FB_W100)            += w100fb.o
+obj-$(CONFIG_FB_TMIO)            += tmiofb.o
+obj-$(CONFIG_FB_AU1100)                  += au1100fb.o
+obj-$(CONFIG_FB_AU1200)                  += au1200fb.o
+obj-$(CONFIG_FB_VT8500)                  += vt8500lcdfb.o
+obj-$(CONFIG_FB_WM8505)                  += wm8505fb.o
+obj-$(CONFIG_FB_PMAG_AA)         += pmag-aa-fb.o
+obj-$(CONFIG_FB_PMAG_BA)         += pmag-ba-fb.o
+obj-$(CONFIG_FB_PMAGB_B)         += pmagb-b-fb.o
+obj-$(CONFIG_FB_MAXINE)                  += maxinefb.o
+obj-$(CONFIG_FB_METRONOME)        += metronomefb.o
+obj-$(CONFIG_FB_BROADSHEET)       += broadsheetfb.o
+obj-$(CONFIG_FB_AUO_K190X)       += auo_k190x.o
+obj-$(CONFIG_FB_AUO_K1900)       += auo_k1900fb.o
+obj-$(CONFIG_FB_AUO_K1901)       += auo_k1901fb.o
+obj-$(CONFIG_FB_S1D13XXX)        += s1d13xxxfb.o
+obj-$(CONFIG_FB_SH7760)                  += sh7760fb.o
+obj-$(CONFIG_FB_IMX)              += imxfb.o
+obj-$(CONFIG_FB_S3C)             += s3c-fb.o
+obj-$(CONFIG_FB_S3C2410)         += s3c2410fb.o
+obj-$(CONFIG_FB_FSL_DIU)         += fsl-diu-fb.o
+obj-$(CONFIG_FB_COBALT)           += cobalt_lcdfb.o
+obj-$(CONFIG_FB_IBM_GXT4500)     += gxt4500.o
+obj-$(CONFIG_FB_PS3)             += ps3fb.o
+obj-$(CONFIG_FB_SM501)            += sm501fb.o
+obj-$(CONFIG_FB_UDL)             += udlfb.o
+obj-$(CONFIG_FB_SMSCUFX)         += smscufx.o
+obj-$(CONFIG_FB_XILINX)           += xilinxfb.o
+obj-$(CONFIG_SH_MIPI_DSI)        += sh_mipi_dsi.o
+obj-$(CONFIG_FB_SH_MOBILE_HDMI)          += sh_mobile_hdmi.o
+obj-$(CONFIG_FB_SH_MOBILE_MERAM)  += sh_mobile_meram.o
+obj-$(CONFIG_FB_SH_MOBILE_LCDC)          += sh_mobile_lcdcfb.o
+obj-$(CONFIG_FB_OMAP)             += omap/
+obj-y                             += omap2/
+obj-$(CONFIG_XEN_FBDEV_FRONTEND)  += xen-fbfront.o
+obj-$(CONFIG_FB_CARMINE)          += carminefb.o
+obj-$(CONFIG_FB_MB862XX)         += mb862xx/
+obj-$(CONFIG_FB_MSM)              += msm/
+obj-$(CONFIG_FB_NUC900)           += nuc900fb.o
+obj-$(CONFIG_FB_JZ4740)                  += jz4740_fb.o
+obj-$(CONFIG_FB_PUV3_UNIGFX)      += fb-puv3.o
+obj-$(CONFIG_FB_HYPERV)                  += hyperv_fb.o
+obj-$(CONFIG_FB_OPENCORES)       += ocfb.o
+
+# Platform or fallback drivers go here
+obj-$(CONFIG_FB_UVESA)            += uvesafb.o
+obj-$(CONFIG_FB_VESA)             += vesafb.o
+obj-$(CONFIG_FB_EFI)              += efifb.o
+obj-$(CONFIG_FB_VGA16)            += vga16fb.o
+obj-$(CONFIG_FB_OF)               += offb.o
+obj-$(CONFIG_FB_BF537_LQ035)      += bf537-lq035.o
+obj-$(CONFIG_FB_BF54X_LQ043)     += bf54x-lq043fb.o
+obj-$(CONFIG_FB_BFIN_LQ035Q1)     += bfin-lq035q1-fb.o
+obj-$(CONFIG_FB_BFIN_T350MCQB)   += bfin-t350mcqb-fb.o
+obj-$(CONFIG_FB_BFIN_7393)        += bfin_adv7393fb.o
+obj-$(CONFIG_FB_MX3)             += mx3fb.o
+obj-$(CONFIG_FB_DA8XX)           += da8xx-fb.o
+obj-$(CONFIG_FB_MXS)             += mxsfb.o
+obj-$(CONFIG_FB_SSD1307)         += ssd1307fb.o
+obj-$(CONFIG_FB_SIMPLE)           += simplefb.o
+
+# the test framebuffer is last
+obj-$(CONFIG_FB_VIRTUAL)          += vfb.o
similarity index 99%
rename from drivers/video/aty/mach64_cursor.c
rename to drivers/video/fbdev/aty/mach64_cursor.c
index 0fe02e22d9a436e46cbc46fc7053e5afa83e3b2d..2fa0317ab3c7d1a89c2cf0b91ee3ef047fe2e10e 100644 (file)
@@ -5,7 +5,7 @@
 #include <linux/fb.h>
 #include <linux/init.h>
 #include <linux/string.h>
-#include "../fb_draw.h"
+#include "../core/fb_draw.h"
 
 #include <asm/io.h>
 
similarity index 99%
rename from drivers/video/bf54x-lq043fb.c
rename to drivers/video/fbdev/bf54x-lq043fb.c
index 42b8f9d1101834d3f5fe09dde3b44e23a2e97b74..e2c42ad8515add8c59d3c29d3276abd40a12f1f0 100644 (file)
 #include <linux/spinlock.h>
 #include <linux/dma-mapping.h>
 #include <linux/platform_device.h>
+#include <linux/gpio.h>
 
 #include <asm/blackfin.h>
 #include <asm/irq.h>
 #include <asm/dpmc.h>
 #include <asm/dma-mapping.h>
 #include <asm/dma.h>
-#include <asm/gpio.h>
 #include <asm/portmux.h>
 
 #include <mach/bf54x-lq043.h>
diff --git a/drivers/video/fbdev/core/Makefile b/drivers/video/fbdev/core/Makefile
new file mode 100644 (file)
index 0000000..fa30653
--- /dev/null
@@ -0,0 +1,16 @@
+obj-y                             += fb_notify.o
+obj-$(CONFIG_FB)                  += fb.o
+fb-y                              := fbmem.o fbmon.o fbcmap.o fbsysfs.o \
+                                     modedb.o fbcvt.o
+fb-objs                           := $(fb-y)
+
+obj-$(CONFIG_FB_CFB_FILLRECT)  += cfbfillrect.o
+obj-$(CONFIG_FB_CFB_COPYAREA)  += cfbcopyarea.o
+obj-$(CONFIG_FB_CFB_IMAGEBLIT) += cfbimgblt.o
+obj-$(CONFIG_FB_SYS_FILLRECT)  += sysfillrect.o
+obj-$(CONFIG_FB_SYS_COPYAREA)  += syscopyarea.o
+obj-$(CONFIG_FB_SYS_IMAGEBLIT) += sysimgblt.o
+obj-$(CONFIG_FB_SYS_FOPS)      += fb_sys_fops.o
+obj-$(CONFIG_FB_SVGALIB)       += svgalib.o
+obj-$(CONFIG_FB_DDC)           += fb_ddc.o
+obj-$(CONFIG_FB_DEFERRED_IO)   += fb_defio.o
similarity index 99%
rename from drivers/video/fb_ddc.c
rename to drivers/video/fbdev/core/fb_ddc.c
index 2b106f046fdee80b3b49ba43977bfa7ce09697f6..94322ccfeddecb9178028bfe8cee96a071a75445 100644 (file)
@@ -15,7 +15,7 @@
 #include <linux/i2c-algo-bit.h>
 #include <linux/slab.h>
 
-#include "edid.h"
+#include "../edid.h"
 
 #define DDC_ADDR       0x50
 
similarity index 99%
rename from drivers/video/fbmon.c
rename to drivers/video/fbdev/core/fbmon.c
index 6103fa6fb54f08137f0b36a7ecb54f3e7b0ebf77..c204ebe6187e9f021740e38dcb082a1f07a8caf5 100644 (file)
@@ -37,7 +37,7 @@
 #include <asm/prom.h>
 #include <asm/pci-bridge.h>
 #endif
-#include "edid.h"
+#include "../edid.h"
 
 /*
  * EDID parser
similarity index 99%
rename from drivers/video/da8xx-fb.c
rename to drivers/video/fbdev/da8xx-fb.c
index 0c0ba920ea481f2adfbf8204a64f8b32b6f80b03..6b23508ff0a5f539b2adc5513c36b25245faef2c 100644 (file)
@@ -663,15 +663,7 @@ static int fb_setcolreg(unsigned regno, unsigned red, unsigned green,
                        (green << info->var.green.offset) |
                        (blue << info->var.blue.offset);
 
-               switch (info->var.bits_per_pixel) {
-               case 16:
-                       ((u16 *) (info->pseudo_palette))[regno] = v;
-                       break;
-               case 24:
-               case 32:
-                       ((u32 *) (info->pseudo_palette))[regno] = v;
-                       break;
-               }
+               ((u32 *) (info->pseudo_palette))[regno] = v;
                if (palette[0] != 0x4000) {
                        update_hw = 1;
                        palette[0] = 0x4000;
similarity index 61%
rename from drivers/video/mmp/Kconfig
rename to drivers/video/fbdev/mmp/Kconfig
index e9ea39e1372283513485cbef19de7a38ac5a97c8..d4a4ffc24749e18b0509b8886471130a038de6f7 100644 (file)
@@ -5,7 +5,7 @@ menuconfig MMP_DISP
          Marvell Display Subsystem support.
 
 if MMP_DISP
-source "drivers/video/mmp/hw/Kconfig"
-source "drivers/video/mmp/panel/Kconfig"
-source "drivers/video/mmp/fb/Kconfig"
+source "drivers/video/fbdev/mmp/hw/Kconfig"
+source "drivers/video/fbdev/mmp/panel/Kconfig"
+source "drivers/video/fbdev/mmp/fb/Kconfig"
 endif
diff --git a/drivers/video/fbdev/omap2/Kconfig b/drivers/video/fbdev/omap2/Kconfig
new file mode 100644 (file)
index 0000000..c22955d
--- /dev/null
@@ -0,0 +1,10 @@
+config OMAP2_VRFB
+       bool
+
+if ARCH_OMAP2PLUS
+
+source "drivers/video/fbdev/omap2/dss/Kconfig"
+source "drivers/video/fbdev/omap2/omapfb/Kconfig"
+source "drivers/video/fbdev/omap2/displays-new/Kconfig"
+
+endif
similarity index 98%
rename from drivers/video/omap2/dss/dispc.c
rename to drivers/video/fbdev/omap2/dss/dispc.c
index 2bbdb7ff7daf3111104fef6c87f518e0c8187d38..f18397c33e8fed7e948f085d25862e95ecf02548 100644 (file)
@@ -101,6 +101,8 @@ static struct {
        void __iomem    *base;
 
        int irq;
+       irq_handler_t user_handler;
+       void *user_data;
 
        unsigned long core_clk_rate;
        unsigned long tv_pclk_rate;
@@ -113,6 +115,8 @@ static struct {
        u32             ctx[DISPC_SZ_REGS / sizeof(u32)];
 
        const struct dispc_features *feat;
+
+       bool is_enabled;
 } dispc;
 
 enum omap_color_component {
@@ -141,12 +145,18 @@ enum mgr_reg_fields {
        DISPC_MGR_FLD_NUM,
 };
 
+struct dispc_reg_field {
+       u16 reg;
+       u8 high;
+       u8 low;
+};
+
 static const struct {
        const char *name;
        u32 vsync_irq;
        u32 framedone_irq;
        u32 sync_lost_irq;
-       struct reg_field reg_desc[DISPC_MGR_FLD_NUM];
+       struct dispc_reg_field reg_desc[DISPC_MGR_FLD_NUM];
 } mgr_desc[] = {
        [OMAP_DSS_CHANNEL_LCD] = {
                .name           = "LCD",
@@ -238,13 +248,13 @@ static inline u32 dispc_read_reg(const u16 idx)
 
 static u32 mgr_fld_read(enum omap_channel channel, enum mgr_reg_fields regfld)
 {
-       const struct reg_field rfld = mgr_desc[channel].reg_desc[regfld];
+       const struct dispc_reg_field rfld = mgr_desc[channel].reg_desc[regfld];
        return REG_GET(rfld.reg, rfld.high, rfld.low);
 }
 
 static void mgr_fld_write(enum omap_channel channel,
                                        enum mgr_reg_fields regfld, int val) {
-       const struct reg_field rfld = mgr_desc[channel].reg_desc[regfld];
+       const struct dispc_reg_field rfld = mgr_desc[channel].reg_desc[regfld];
        REG_FLD_MOD(rfld.reg, val, rfld.high, rfld.low);
 }
 
@@ -3669,16 +3679,44 @@ static int __init dispc_init_features(struct platform_device *pdev)
        return 0;
 }
 
+static irqreturn_t dispc_irq_handler(int irq, void *arg)
+{
+       if (!dispc.is_enabled)
+               return IRQ_NONE;
+
+       return dispc.user_handler(irq, dispc.user_data);
+}
+
 int dispc_request_irq(irq_handler_t handler, void *dev_id)
 {
-       return devm_request_irq(&dispc.pdev->dev, dispc.irq, handler,
-                            IRQF_SHARED, "OMAP DISPC", dev_id);
+       int r;
+
+       if (dispc.user_handler != NULL)
+               return -EBUSY;
+
+       dispc.user_handler = handler;
+       dispc.user_data = dev_id;
+
+       /* ensure the dispc_irq_handler sees the values above */
+       smp_wmb();
+
+       r = devm_request_irq(&dispc.pdev->dev, dispc.irq, dispc_irq_handler,
+                            IRQF_SHARED, "OMAP DISPC", &dispc);
+       if (r) {
+               dispc.user_handler = NULL;
+               dispc.user_data = NULL;
+       }
+
+       return r;
 }
 EXPORT_SYMBOL(dispc_request_irq);
 
 void dispc_free_irq(void *dev_id)
 {
-       devm_free_irq(&dispc.pdev->dev, dispc.irq, dev_id);
+       devm_free_irq(&dispc.pdev->dev, dispc.irq, &dispc);
+
+       dispc.user_handler = NULL;
+       dispc.user_data = NULL;
 }
 EXPORT_SYMBOL(dispc_free_irq);
 
@@ -3750,6 +3788,12 @@ static int __exit omap_dispchw_remove(struct platform_device *pdev)
 
 static int dispc_runtime_suspend(struct device *dev)
 {
+       dispc.is_enabled = false;
+       /* ensure the dispc_irq_handler sees the is_enabled value */
+       smp_wmb();
+       /* wait for current handler to finish before turning the DISPC off */
+       synchronize_irq(dispc.irq);
+
        dispc_save_context();
 
        return 0;
@@ -3763,12 +3807,15 @@ static int dispc_runtime_resume(struct device *dev)
         * _omap_dispc_initial_config(). We can thus use it to detect if
         * we have lost register context.
         */
-       if (REG_GET(DISPC_CONFIG, 2, 1) == OMAP_DSS_LOAD_FRAME_ONLY)
-               return 0;
+       if (REG_GET(DISPC_CONFIG, 2, 1) != OMAP_DSS_LOAD_FRAME_ONLY) {
+               _omap_dispc_initial_config();
 
-       _omap_dispc_initial_config();
+               dispc_restore_context();
+       }
 
-       dispc_restore_context();
+       dispc.is_enabled = true;
+       /* ensure the dispc_irq_handler sees the is_enabled value */
+       smp_wmb();
 
        return 0;
 }
similarity index 99%
rename from drivers/video/omap2/dss/dsi.c
rename to drivers/video/fbdev/omap2/dss/dsi.c
index 121d1049d0bc3d6a7cc383e0dcd9fc0e39e490bb..8be9b04d88492c0a63e20df12b8b98c57ef8b8d6 100644 (file)
@@ -297,6 +297,8 @@ struct dsi_data {
 
        int irq;
 
+       bool is_enabled;
+
        struct clk *dss_clk;
        struct clk *sys_clk;
 
@@ -795,6 +797,9 @@ static irqreturn_t omap_dsi_irq_handler(int irq, void *arg)
        dsidev = (struct platform_device *) arg;
        dsi = dsi_get_dsidrv_data(dsidev);
 
+       if (!dsi->is_enabled)
+               return IRQ_NONE;
+
        spin_lock(&dsi->irq_lock);
 
        irqstatus = dsi_read_reg(dsidev, DSI_IRQSTATUS);
@@ -5671,6 +5676,15 @@ static int __exit omap_dsihw_remove(struct platform_device *dsidev)
 
 static int dsi_runtime_suspend(struct device *dev)
 {
+       struct platform_device *pdev = to_platform_device(dev);
+       struct dsi_data *dsi = dsi_get_dsidrv_data(pdev);
+
+       dsi->is_enabled = false;
+       /* ensure the irq handler sees the is_enabled value */
+       smp_wmb();
+       /* wait for current handler to finish before turning the DSI off */
+       synchronize_irq(dsi->irq);
+
        dispc_runtime_put();
 
        return 0;
@@ -5678,12 +5692,18 @@ static int dsi_runtime_suspend(struct device *dev)
 
 static int dsi_runtime_resume(struct device *dev)
 {
+       struct platform_device *pdev = to_platform_device(dev);
+       struct dsi_data *dsi = dsi_get_dsidrv_data(pdev);
        int r;
 
        r = dispc_runtime_get();
        if (r)
                return r;
 
+       dsi->is_enabled = true;
+       /* ensure the irq handler sees the is_enabled value */
+       smp_wmb();
+
        return 0;
 }
 
similarity index 99%
rename from drivers/video/omap2/dss/dss.c
rename to drivers/video/fbdev/omap2/dss/dss.c
index 825c019ddee7680238f65848d73dd872985c0f93..d55266c0e02982d3fea4a986dae789a5a27242af 100644 (file)
@@ -457,7 +457,7 @@ bool dss_div_calc(unsigned long pck, unsigned long fck_min,
        fckd_stop = max(DIV_ROUND_UP(prate * m, fck_hw_max), 1ul);
 
        for (fckd = fckd_start; fckd >= fckd_stop; --fckd) {
-               fck = prate / fckd * m;
+               fck = DIV_ROUND_UP(prate, fckd) * m;
 
                if (func(fck, data))
                        return true;
@@ -506,7 +506,7 @@ static int dss_setup_default_clock(void)
 
                fck_div = DIV_ROUND_UP(prate * dss.feat->dss_fck_multiplier,
                                max_dss_fck);
-               fck = prate / fck_div * dss.feat->dss_fck_multiplier;
+               fck = DIV_ROUND_UP(prate, fck_div) * dss.feat->dss_fck_multiplier;
        }
 
        r = dss_set_fck_rate(fck);
similarity index 99%
rename from drivers/video/omap2/dss/dss.h
rename to drivers/video/fbdev/omap2/dss/dss.h
index 918fec18242496ef7eff156aa6be0f9c59964f5b..560078fcb198b92812ae8091fe7a6d8608b6b522 100644 (file)
@@ -131,12 +131,6 @@ struct dsi_clock_info {
        u16 lp_clk_div;
 };
 
-struct reg_field {
-       u16 reg;
-       u8 high;
-       u8 low;
-};
-
 struct dss_lcd_mgr_config {
        enum dss_io_pad_mode io_pad_mode;
 
similarity index 98%
rename from drivers/video/omap2/dss/hdmi_common.c
rename to drivers/video/fbdev/omap2/dss/hdmi_common.c
index b11afac8e068033a1248282899c63e76c0406326..0b12a3f62fe1802492b615bb9f2bda02c4bf4de5 100644 (file)
@@ -347,17 +347,17 @@ int hdmi_compute_acr(u32 pclk, u32 sample_freq, u32 *n, u32 *cts)
        case 96000:
        case 192000:
                if (deep_color == 125)
-                       if (pclk == 27027 || pclk == 74250)
+                       if (pclk == 27027000 || pclk == 74250000)
                                deep_color_correct = true;
                if (deep_color == 150)
-                       if (pclk == 27027)
+                       if (pclk == 27027000)
                                deep_color_correct = true;
                break;
        case 44100:
        case 88200:
        case 176400:
                if (deep_color == 125)
-                       if (pclk == 27027)
+                       if (pclk == 27027000)
                                deep_color_correct = true;
                break;
        default:
@@ -418,7 +418,7 @@ int hdmi_compute_acr(u32 pclk, u32 sample_freq, u32 *n, u32 *cts)
                }
        }
        /* Calculate CTS. See HDMI 1.3a or 1.4a specifications */
-       *cts = pclk * (*n / 128) * deep_color / (sample_freq / 10);
+       *cts = (pclk/1000) * (*n / 128) * deep_color / (sample_freq / 10);
 
        return 0;
 }
similarity index 99%
rename from drivers/video/wmt_ge_rops.c
rename to drivers/video/fbdev/wmt_ge_rops.c
index b0a9f34b2e01b7b45b1a0d86e25889e3f52fc434..9df6fe78a44b283c00929e0cf021dc1a3676be8e 100644 (file)
@@ -18,7 +18,7 @@
 #include <linux/module.h>
 #include <linux/fb.h>
 #include <linux/platform_device.h>
-#include "fb_draw.h"
+#include "core/fb_draw.h"
 
 #define GE_COMMAND_OFF         0x00
 #define GE_DEPTH_OFF           0x04
diff --git a/drivers/video/omap2/Kconfig b/drivers/video/omap2/Kconfig
deleted file mode 100644 (file)
index 63b23f8..0000000
+++ /dev/null
@@ -1,10 +0,0 @@
-config OMAP2_VRFB
-       bool
-
-if ARCH_OMAP2PLUS
-
-source "drivers/video/omap2/dss/Kconfig"
-source "drivers/video/omap2/omapfb/Kconfig"
-source "drivers/video/omap2/displays-new/Kconfig"
-
-endif
index 06990c6a1a698c4d89c391848b185885b80767bb..61e706c0e00c6f6435d89ad5a23d9d887bd23bec 100644 (file)
@@ -320,7 +320,7 @@ static int tsi148_irq_init(struct vme_bridge *tsi148_bridge)
        struct pci_dev *pdev;
        struct tsi148_driver *bridge;
 
-       pdev = container_of(tsi148_bridge->parent, struct pci_dev, dev);
+       pdev = to_pci_dev(tsi148_bridge->parent);
 
        bridge = tsi148_bridge->driver_priv;
 
@@ -433,9 +433,7 @@ static void tsi148_irq_set(struct vme_bridge *tsi148_bridge, int level,
                iowrite32be(tmp, bridge->base + TSI148_LCSR_INTEO);
 
                if (sync != 0) {
-                       pdev = container_of(tsi148_bridge->parent,
-                               struct pci_dev, dev);
-
+                       pdev = to_pci_dev(tsi148_bridge->parent);
                        synchronize_irq(pdev->irq);
                }
        } else {
@@ -741,7 +739,7 @@ static int tsi148_slave_get(struct vme_slave_resource *image, int *enabled,
        reg_join(vme_bound_high, vme_bound_low, &vme_bound);
        reg_join(pci_offset_high, pci_offset_low, &pci_offset);
 
-       *pci_base = (dma_addr_t)vme_base + pci_offset;
+       *pci_base = (dma_addr_t)(*vme_base + pci_offset);
 
        *enabled = 0;
        *aspace = 0;
@@ -814,7 +812,7 @@ static int tsi148_alloc_resource(struct vme_master_resource *image,
 
        tsi148_bridge = image->parent;
 
-       pdev = container_of(tsi148_bridge->parent, struct pci_dev, dev);
+       pdev = to_pci_dev(tsi148_bridge->parent);
 
        existing_size = (unsigned long long)(image->bus_resource.end -
                image->bus_resource.start);
@@ -910,11 +908,15 @@ static int tsi148_master_set(struct vme_master_resource *image, int enabled,
        unsigned long long pci_bound, vme_offset, pci_base;
        struct vme_bridge *tsi148_bridge;
        struct tsi148_driver *bridge;
+       struct pci_bus_region region;
+       struct pci_dev *pdev;
 
        tsi148_bridge = image->parent;
 
        bridge = tsi148_bridge->driver_priv;
 
+       pdev = to_pci_dev(tsi148_bridge->parent);
+
        /* Verify input data */
        if (vme_base & 0xFFFF) {
                dev_err(tsi148_bridge->parent, "Invalid VME Window "
@@ -949,7 +951,9 @@ static int tsi148_master_set(struct vme_master_resource *image, int enabled,
                pci_bound = 0;
                vme_offset = 0;
        } else {
-               pci_base = (unsigned long long)image->bus_resource.start;
+               pcibios_resource_to_bus(pdev->bus, &region,
+                                       &image->bus_resource);
+               pci_base = region.start;
 
                /*
                 * Bound address is a valid address for the window, adjust
@@ -2232,7 +2236,7 @@ static void *tsi148_alloc_consistent(struct device *parent, size_t size,
        struct pci_dev *pdev;
 
        /* Find pci_dev container of dev */
-       pdev = container_of(parent, struct pci_dev, dev);
+       pdev = to_pci_dev(parent);
 
        return pci_alloc_consistent(pdev, size, dma);
 }
@@ -2243,7 +2247,7 @@ static void tsi148_free_consistent(struct device *parent, size_t size,
        struct pci_dev *pdev;
 
        /* Find pci_dev container of dev */
-       pdev = container_of(parent, struct pci_dev, dev);
+       pdev = to_pci_dev(parent);
 
        pci_free_consistent(pdev, size, vaddr, dma);
 }
index b96f61b15dc65e866564a075686072eddc49f905..ff52618cafbecab99224143424ad57887de789f1 100644 (file)
@@ -614,27 +614,11 @@ end:
        return err;
 }
 
-/*
- * Handle sysfs file creation and removal here, before userspace is told that
- * the device is added / removed from the system
- */
-static int w1_bus_notify(struct notifier_block *nb, unsigned long action,
-                        void *data)
+static int w1_family_notify(unsigned long action, struct w1_slave *sl)
 {
-       struct device *dev = data;
-       struct w1_slave *sl;
        struct w1_family_ops *fops;
        int err;
 
-       /*
-        * Only care about slave devices at the moment.  Yes, we should use a
-        * separate "type" for this, but for now, look at the release function
-        * to know which type it is...
-        */
-       if (dev->release != w1_slave_release)
-               return 0;
-
-       sl = dev_to_w1_slave(dev);
        fops = sl->family->fops;
 
        if (!fops)
@@ -673,10 +657,6 @@ static int w1_bus_notify(struct notifier_block *nb, unsigned long action,
        return 0;
 }
 
-static struct notifier_block w1_bus_nb = {
-       .notifier_call = w1_bus_notify,
-};
-
 static int __w1_attach_slave_device(struct w1_slave *sl)
 {
        int err;
@@ -698,6 +678,9 @@ static int __w1_attach_slave_device(struct w1_slave *sl)
        dev_dbg(&sl->dev, "%s: registering %s as %p.\n", __func__,
                dev_name(&sl->dev), sl);
 
+       /* suppress for w1_family_notify before sending KOBJ_ADD */
+       dev_set_uevent_suppress(&sl->dev, true);
+
        err = device_register(&sl->dev);
        if (err < 0) {
                dev_err(&sl->dev,
@@ -705,7 +688,7 @@ static int __w1_attach_slave_device(struct w1_slave *sl)
                        dev_name(&sl->dev), err);
                return err;
        }
-
+       w1_family_notify(BUS_NOTIFY_ADD_DEVICE, sl);
 
        dev_set_uevent_suppress(&sl->dev, false);
        kobject_uevent(&sl->dev.kobj, KOBJ_ADD);
@@ -799,6 +782,7 @@ int w1_unref_slave(struct w1_slave *sl)
                msg.type = W1_SLAVE_REMOVE;
                w1_netlink_send(sl->master, &msg);
 
+               w1_family_notify(BUS_NOTIFY_DEL_DEVICE, sl);
                device_unregister(&sl->dev);
                #ifdef DEBUG
                memset(sl, 0, sizeof(*sl));
@@ -1186,10 +1170,6 @@ static int __init w1_init(void)
                goto err_out_exit_init;
        }
 
-       retval = bus_register_notifier(&w1_bus_type, &w1_bus_nb);
-       if (retval)
-               goto err_out_bus_unregister;
-
        retval = driver_register(&w1_master_driver);
        if (retval) {
                printk(KERN_ERR
index 5234964fe001e95935b8170d56d6eae7a8181a3b..a02704a593213e0f2b8a678bc84bd10e32db72ea 100644 (file)
@@ -300,12 +300,6 @@ static int w1_process_command_root(struct cn_msg *msg,
        struct w1_netlink_msg *w;
        u32 *id;
 
-       if (mcmd->type != W1_LIST_MASTERS) {
-               printk(KERN_NOTICE "%s: msg: %x.%x, wrong type: %u, len: %u.\n",
-                       __func__, msg->id.idx, msg->id.val, mcmd->type, mcmd->len);
-               return -EPROTO;
-       }
-
        cn = kmalloc(PAGE_SIZE, GFP_KERNEL);
        if (!cn)
                return -ENOMEM;
@@ -441,6 +435,9 @@ static void w1_process_cb(struct w1_master *dev, struct w1_async_cmd *async_cmd)
                w1_netlink_send_error(&node->block->msg, node->m, cmd,
                        node->block->portid, err);
 
+       /* ref taken in w1_search_slave or w1_search_master_id when building
+        * the block
+        */
        if (sl)
                w1_unref_slave(sl);
        else
@@ -503,30 +500,42 @@ static void w1_cn_callback(struct cn_msg *msg, struct netlink_skb_parms *nsp)
 
        msg_len = msg->len;
        while (msg_len && !err) {
-               struct w1_reg_num id;
-               u16 mlen = m->len;
 
                dev = NULL;
                sl = NULL;
 
-               memcpy(&id, m->id.id, sizeof(id));
-#if 0
-               printk("%s: %02x.%012llx.%02x: type=%02x, len=%u.\n",
-                               __func__, id.family, (unsigned long long)id.id, id.crc, m->type, m->len);
-#endif
                if (m->len + sizeof(struct w1_netlink_msg) > msg_len) {
                        err = -E2BIG;
                        break;
                }
 
+               /* execute on this thread, no need to process later */
+               if (m->type == W1_LIST_MASTERS) {
+                       err = w1_process_command_root(msg, m, nsp->portid);
+                       goto out_cont;
+               }
+
+               /* All following message types require additional data,
+                * check here before references are taken.
+                */
+               if (!m->len) {
+                       err = -EPROTO;
+                       goto out_cont;
+               }
+
+               /* both search calls take reference counts */
                if (m->type == W1_MASTER_CMD) {
                        dev = w1_search_master_id(m->id.mst.id);
                } else if (m->type == W1_SLAVE_CMD) {
-                       sl = w1_search_slave(&id);
+                       sl = w1_search_slave((struct w1_reg_num *)m->id.id);
                        if (sl)
                                dev = sl->master;
                } else {
-                       err = w1_process_command_root(msg, m, nsp->portid);
+                       printk(KERN_NOTICE
+                               "%s: msg: %x.%x, wrong type: %u, len: %u.\n",
+                               __func__, msg->id.idx, msg->id.val,
+                               m->type, m->len);
+                       err = -EPROTO;
                        goto out_cont;
                }
 
@@ -536,8 +545,6 @@ static void w1_cn_callback(struct cn_msg *msg, struct netlink_skb_parms *nsp)
                }
 
                err = 0;
-               if (!mlen)
-                       goto out_cont;
 
                atomic_inc(&block->refcnt);
                node->async.cb = w1_process_cb;
@@ -557,7 +564,8 @@ out_cont:
                if (err)
                        w1_netlink_send_error(msg, m, NULL, nsp->portid, err);
                msg_len -= sizeof(struct w1_netlink_msg) + m->len;
-               m = (struct w1_netlink_msg *)(((u8 *)m) + sizeof(struct w1_netlink_msg) + m->len);
+               m = (struct w1_netlink_msg *)(((u8 *)m) +
+                       sizeof(struct w1_netlink_msg) + m->len);
 
                /*
                 * Let's allow requests for nonexisting devices.
index fc6c94c0b436f53c8d49b1849096d2f7ad441fbe..32f9236c959fd30d2ca505fe0478f806d7940e40 100644 (file)
@@ -198,10 +198,32 @@ struct shutdown_handler {
        void (*cb)(void);
 };
 
+static int poweroff_nb(struct notifier_block *cb, unsigned long code, void *unused)
+{
+       switch (code) {
+       case SYS_DOWN:
+       case SYS_HALT:
+       case SYS_POWER_OFF:
+               shutting_down = SHUTDOWN_POWEROFF;
+       default:
+               break;
+       }
+       return NOTIFY_DONE;
+}
 static void do_poweroff(void)
 {
-       shutting_down = SHUTDOWN_POWEROFF;
-       orderly_poweroff(false);
+       switch (system_state) {
+       case SYSTEM_BOOTING:
+               orderly_poweroff(true);
+               break;
+       case SYSTEM_RUNNING:
+               orderly_poweroff(false);
+               break;
+       default:
+               /* Don't do it when we are halting/rebooting. */
+               pr_info("Ignoring Xen toolstack shutdown.\n");
+               break;
+       }
 }
 
 static void do_reboot(void)
@@ -307,6 +329,10 @@ static struct xenbus_watch shutdown_watch = {
        .callback = shutdown_handler
 };
 
+static struct notifier_block xen_reboot_nb = {
+       .notifier_call = poweroff_nb,
+};
+
 static int setup_shutdown_watcher(void)
 {
        int err;
@@ -317,6 +343,7 @@ static int setup_shutdown_watcher(void)
                return err;
        }
 
+
 #ifdef CONFIG_MAGIC_SYSRQ
        err = register_xenbus_watch(&sysrq_watch);
        if (err) {
@@ -345,6 +372,7 @@ int xen_setup_shutdown_event(void)
        if (!xen_domain())
                return -ENODEV;
        register_xenstore_notifier(&xenstore_notifier);
+       register_reboot_notifier(&xen_reboot_nb);
 
        return 0;
 }
index 929dd46bb40c5a85fd1df9a47087896011ec0d86..607e41460c0d7ef0dcea4e8702eab0ec3e1cdf8a 100644 (file)
@@ -217,7 +217,7 @@ int xen_pcibk_enable_msix(struct xen_pcibk_device *pdev,
        if (result == 0) {
                for (i = 0; i < op->value; i++) {
                        op->msix_entries[i].entry = entries[i].entry;
-                       if (entries[i].vector)
+                       if (entries[i].vector) {
                                op->msix_entries[i].vector =
                                        xen_pirq_from_irq(entries[i].vector);
                                if (unlikely(verbose_request))
@@ -225,6 +225,7 @@ int xen_pcibk_enable_msix(struct xen_pcibk_device *pdev,
                                                "MSI-X[%d]: %d\n",
                                                pci_name(dev), i,
                                                op->msix_entries[i].vector);
+                       }
                }
        } else
                pr_warn_ratelimited("%s: error enabling MSI-X for guest %u: err %d!\n",
index 3165ce361b0012e8fafdc4f1c6be8492b7afe739..51afff96c515c05b6722937188a8fd317639217f 100644 (file)
@@ -137,6 +137,8 @@ unlock:
        /* Publish this device. */
        if (!err)
                err = publish_cb(pdev, 0, 0, PCI_DEVFN(slot, func), devid);
+       else
+               kfree(dev_entry);
 
 out:
        return err;
index b6d5fff43d16b90993b49ac2a91d14f64b791664..ba804f3d8278d945934fd2750f2f6345302fd5cc 100644 (file)
@@ -50,6 +50,7 @@
 #include <xen/xenbus.h>
 #include <xen/xen.h>
 #include "xenbus_comms.h"
+#include "xenbus_probe.h"
 
 struct xs_stored_msg {
        struct list_head list;
@@ -139,6 +140,29 @@ static int get_error(const char *errorstring)
        return xsd_errors[i].errnum;
 }
 
+static bool xenbus_ok(void)
+{
+       switch (xen_store_domain_type) {
+       case XS_LOCAL:
+               switch (system_state) {
+               case SYSTEM_POWER_OFF:
+               case SYSTEM_RESTART:
+               case SYSTEM_HALT:
+                       return false;
+               default:
+                       break;
+               }
+               return true;
+       case XS_PV:
+       case XS_HVM:
+               /* FIXME: Could check that the remote domain is alive,
+                * but it is normally initial domain. */
+               return true;
+       default:
+               break;
+       }
+       return false;
+}
 static void *read_reply(enum xsd_sockmsg_type *type, unsigned int *len)
 {
        struct xs_stored_msg *msg;
@@ -148,9 +172,20 @@ static void *read_reply(enum xsd_sockmsg_type *type, unsigned int *len)
 
        while (list_empty(&xs_state.reply_list)) {
                spin_unlock(&xs_state.reply_lock);
-               /* XXX FIXME: Avoid synchronous wait for response here. */
-               wait_event(xs_state.reply_waitq,
-                          !list_empty(&xs_state.reply_list));
+               if (xenbus_ok())
+                       /* XXX FIXME: Avoid synchronous wait for response here. */
+                       wait_event_timeout(xs_state.reply_waitq,
+                                          !list_empty(&xs_state.reply_list),
+                                          msecs_to_jiffies(500));
+               else {
+                       /*
+                        * If we are in the process of being shut-down there is
+                        * no point of trying to contact XenBus - it is either
+                        * killed (xenstored application) or the other domain
+                        * has been killed or is unreachable.
+                        */
+                       return ERR_PTR(-EIO);
+               }
                spin_lock(&xs_state.reply_lock);
        }
 
@@ -215,6 +250,9 @@ void *xenbus_dev_request_and_reply(struct xsd_sockmsg *msg)
 
        mutex_unlock(&xs_state.request_mutex);
 
+       if (IS_ERR(ret))
+               return ret;
+
        if ((msg->type == XS_TRANSACTION_END) ||
            ((req_msg.type == XS_TRANSACTION_START) &&
             (msg->type == XS_ERROR)))
index 8388f02de2bde4f3c97ec0184a834e40228e5ce9..0c4d96dee9b632a3833b0a83787b83954001e6e2 100644 (file)
@@ -273,16 +273,6 @@ Converted from Intel HEX files, used in our binary representation of ihex.
 
 --------------------------------------------------------------------------
 
-Driver: ip2 -- Computone IntelliPort Plus serial device
-
-File: intelliport2.bin
-
-Licence: Unknown
-
-Found in hex form in kernel source.
-
---------------------------------------------------------------------------
-
 Driver: CPiA2 -- cameras based on Vision's CPiA2
 
 File: cpia2/stv0672_vp4.bin
index 12a3de0ee6dacbdea873ec9ea28bdd88d1ea999d..a0ed6c7d2cd2a3e91a5d12e48af705d75afe315a 100644 (file)
--- a/fs/aio.c
+++ b/fs/aio.c
@@ -112,6 +112,11 @@ struct kioctx {
 
        struct work_struct      free_work;
 
+       /*
+        * signals when all in-flight requests are done
+        */
+       struct completion *requests_done;
+
        struct {
                /*
                 * This counts the number of available slots in the ringbuffer,
@@ -508,6 +513,10 @@ static void free_ioctx_reqs(struct percpu_ref *ref)
 {
        struct kioctx *ctx = container_of(ref, struct kioctx, reqs);
 
+       /* At this point we know that there are no any in-flight requests */
+       if (ctx->requests_done)
+               complete(ctx->requests_done);
+
        INIT_WORK(&ctx->free_work, free_ioctx);
        schedule_work(&ctx->free_work);
 }
@@ -718,7 +727,8 @@ err:
  *     when the processes owning a context have all exited to encourage
  *     the rapid destruction of the kioctx.
  */
-static void kill_ioctx(struct mm_struct *mm, struct kioctx *ctx)
+static void kill_ioctx(struct mm_struct *mm, struct kioctx *ctx,
+               struct completion *requests_done)
 {
        if (!atomic_xchg(&ctx->dead, 1)) {
                struct kioctx_table *table;
@@ -747,7 +757,11 @@ static void kill_ioctx(struct mm_struct *mm, struct kioctx *ctx)
                if (ctx->mmap_size)
                        vm_munmap(ctx->mmap_base, ctx->mmap_size);
 
+               ctx->requests_done = requests_done;
                percpu_ref_kill(&ctx->users);
+       } else {
+               if (requests_done)
+                       complete(requests_done);
        }
 }
 
@@ -809,7 +823,7 @@ void exit_aio(struct mm_struct *mm)
                 */
                ctx->mmap_size = 0;
 
-               kill_ioctx(mm, ctx);
+               kill_ioctx(mm, ctx, NULL);
        }
 }
 
@@ -1185,7 +1199,7 @@ SYSCALL_DEFINE2(io_setup, unsigned, nr_events, aio_context_t __user *, ctxp)
        if (!IS_ERR(ioctx)) {
                ret = put_user(ioctx->user_id, ctxp);
                if (ret)
-                       kill_ioctx(current->mm, ioctx);
+                       kill_ioctx(current->mm, ioctx, NULL);
                percpu_ref_put(&ioctx->users);
        }
 
@@ -1203,8 +1217,22 @@ SYSCALL_DEFINE1(io_destroy, aio_context_t, ctx)
 {
        struct kioctx *ioctx = lookup_ioctx(ctx);
        if (likely(NULL != ioctx)) {
-               kill_ioctx(current->mm, ioctx);
+               struct completion requests_done =
+                       COMPLETION_INITIALIZER_ONSTACK(requests_done);
+
+               /* Pass requests_done to kill_ioctx() where it can be set
+                * in a thread-safe way. If we try to set it here then we have
+                * a race condition if two io_destroy() called simultaneously.
+                */
+               kill_ioctx(current->mm, ioctx, &requests_done);
                percpu_ref_put(&ioctx->users);
+
+               /* Wait until all IO for the context are done. Otherwise kernel
+                * keep using user-space buffers even if user thinks the context
+                * is destroyed.
+                */
+               wait_for_completion(&requests_done);
+
                return 0;
        }
        pr_debug("EINVAL: io_destroy: invalid context id\n");
@@ -1299,10 +1327,8 @@ rw_common:
                                                &iovec, compat)
                        : aio_setup_single_vector(req, rw, buf, &nr_segs,
                                                  iovec);
-               if (ret)
-                       return ret;
-
-               ret = rw_verify_area(rw, file, &req->ki_pos, req->ki_nbytes);
+               if (!ret)
+                       ret = rw_verify_area(rw, file, &req->ki_pos, req->ki_nbytes);
                if (ret < 0) {
                        if (iovec != &inline_vec)
                                kfree(iovec);
index 4c48df572bd65d74636df643c77acda204af5418..ba6b88528dc7eb28b9fe282cc2370f43fa7ea7d4 100644 (file)
@@ -2058,6 +2058,20 @@ struct btrfs_ioctl_defrag_range_args {
 #define btrfs_raw_test_opt(o, opt)     ((o) & BTRFS_MOUNT_##opt)
 #define btrfs_test_opt(root, opt)      ((root)->fs_info->mount_opt & \
                                         BTRFS_MOUNT_##opt)
+#define btrfs_set_and_info(root, opt, fmt, args...)                    \
+{                                                                      \
+       if (!btrfs_test_opt(root, opt))                                 \
+               btrfs_info(root->fs_info, fmt, ##args);                 \
+       btrfs_set_opt(root->fs_info->mount_opt, opt);                   \
+}
+
+#define btrfs_clear_and_info(root, opt, fmt, args...)                  \
+{                                                                      \
+       if (btrfs_test_opt(root, opt))                                  \
+               btrfs_info(root->fs_info, fmt, ##args);                 \
+       btrfs_clear_opt(root->fs_info->mount_opt, opt);                 \
+}
+
 /*
  * Inode flags
  */
index 029d46c2e17048a20a02e7cb34955d22ff80e752..983314932af3cc51260753b8acf807a98ce0988a 100644 (file)
@@ -2861,7 +2861,7 @@ retry_root_backup:
                        printk(KERN_ERR "BTRFS: failed to read log tree\n");
                        free_extent_buffer(log_tree_root->node);
                        kfree(log_tree_root);
-                       goto fail_trans_kthread;
+                       goto fail_qgroup;
                }
                /* returns with log_tree_root freed on success */
                ret = btrfs_recover_log_trees(log_tree_root);
@@ -2870,24 +2870,24 @@ retry_root_backup:
                                    "Failed to recover log tree");
                        free_extent_buffer(log_tree_root->node);
                        kfree(log_tree_root);
-                       goto fail_trans_kthread;
+                       goto fail_qgroup;
                }
 
                if (sb->s_flags & MS_RDONLY) {
                        ret = btrfs_commit_super(tree_root);
                        if (ret)
-                               goto fail_trans_kthread;
+                               goto fail_qgroup;
                }
        }
 
        ret = btrfs_find_orphan_roots(tree_root);
        if (ret)
-               goto fail_trans_kthread;
+               goto fail_qgroup;
 
        if (!(sb->s_flags & MS_RDONLY)) {
                ret = btrfs_cleanup_fs_roots(fs_info);
                if (ret)
-                       goto fail_trans_kthread;
+                       goto fail_qgroup;
 
                ret = btrfs_recover_relocation(tree_root);
                if (ret < 0) {
index 1306487c82cf6a05c8c528f8851fbe70d84c1f80..5590af92094bb67ea61c8ae397cc393b58b75ae6 100644 (file)
@@ -1542,6 +1542,7 @@ again:
                                ret = 0;
                }
                if (ret) {
+                       key.objectid = bytenr;
                        key.type = BTRFS_EXTENT_ITEM_KEY;
                        key.offset = num_bytes;
                        btrfs_release_path(path);
@@ -3542,11 +3543,13 @@ static u64 btrfs_reduce_alloc_profile(struct btrfs_root *root, u64 flags)
        return extended_to_chunk(flags | tmp);
 }
 
-static u64 get_alloc_profile(struct btrfs_root *root, u64 flags)
+static u64 get_alloc_profile(struct btrfs_root *root, u64 orig_flags)
 {
        unsigned seq;
+       u64 flags;
 
        do {
+               flags = orig_flags;
                seq = read_seqbegin(&root->fs_info->profiles_lock);
 
                if (flags & BTRFS_BLOCK_GROUP_DATA)
@@ -5719,6 +5722,7 @@ static int __btrfs_free_extent(struct btrfs_trans_handle *trans,
 
                        if (ret > 0 && skinny_metadata) {
                                skinny_metadata = false;
+                               key.objectid = bytenr;
                                key.type = BTRFS_EXTENT_ITEM_KEY;
                                key.offset = num_bytes;
                                btrfs_release_path(path);
index eb742c07e7a41aacdb595b0252a12b3584bbee83..ae6af072b635e195e26f3199c3aabd427964881f 100644 (file)
@@ -800,7 +800,7 @@ next_slot:
                if (start > key.offset && end < extent_end) {
                        BUG_ON(del_nr > 0);
                        if (extent_type == BTRFS_FILE_EXTENT_INLINE) {
-                               ret = -EINVAL;
+                               ret = -EOPNOTSUPP;
                                break;
                        }
 
@@ -846,7 +846,7 @@ next_slot:
                 */
                if (start <= key.offset && end < extent_end) {
                        if (extent_type == BTRFS_FILE_EXTENT_INLINE) {
-                               ret = -EINVAL;
+                               ret = -EOPNOTSUPP;
                                break;
                        }
 
@@ -872,7 +872,7 @@ next_slot:
                if (start > key.offset && end >= extent_end) {
                        BUG_ON(del_nr > 0);
                        if (extent_type == BTRFS_FILE_EXTENT_INLINE) {
-                               ret = -EINVAL;
+                               ret = -EOPNOTSUPP;
                                break;
                        }
 
@@ -1777,7 +1777,7 @@ static ssize_t btrfs_file_aio_write(struct kiocb *iocb,
        start_pos = round_down(pos, root->sectorsize);
        if (start_pos > i_size_read(inode)) {
                /* Expand hole size to cover write data, preventing empty gap */
-               end_pos = round_up(pos + iov->iov_len, root->sectorsize);
+               end_pos = round_up(pos + count, root->sectorsize);
                err = btrfs_cont_expand(inode, i_size_read(inode), end_pos);
                if (err) {
                        mutex_unlock(&inode->i_mutex);
index cc8ca193d830f62ec5202933f49d9867b1427969..86935f5ae29162b0b3dec1ed30c34df4c93db921 100644 (file)
@@ -176,7 +176,11 @@ static void start_caching(struct btrfs_root *root)
 
        tsk = kthread_run(caching_kthread, root, "btrfs-ino-cache-%llu\n",
                          root->root_key.objectid);
-       BUG_ON(IS_ERR(tsk)); /* -ENOMEM */
+       if (IS_ERR(tsk)) {
+               btrfs_warn(root->fs_info, "failed to start inode caching task");
+               btrfs_clear_and_info(root, CHANGE_INODE_CACHE,
+                               "disabling inode map caching");
+       }
 }
 
 int btrfs_find_free_ino(struct btrfs_root *root, u64 *objectid)
@@ -205,24 +209,14 @@ again:
 
 void btrfs_return_ino(struct btrfs_root *root, u64 objectid)
 {
-       struct btrfs_free_space_ctl *ctl = root->free_ino_ctl;
        struct btrfs_free_space_ctl *pinned = root->free_ino_pinned;
 
        if (!btrfs_test_opt(root, INODE_MAP_CACHE))
                return;
-
 again:
        if (root->cached == BTRFS_CACHE_FINISHED) {
-               __btrfs_add_free_space(ctl, objectid, 1);
+               __btrfs_add_free_space(pinned, objectid, 1);
        } else {
-               /*
-                * If we are in the process of caching free ino chunks,
-                * to avoid adding the same inode number to the free_ino
-                * tree twice due to cross transaction, we'll leave it
-                * in the pinned tree until a transaction is committed
-                * or the caching work is done.
-                */
-
                down_write(&root->fs_info->commit_root_sem);
                spin_lock(&root->cache_lock);
                if (root->cached == BTRFS_CACHE_FINISHED) {
@@ -234,11 +228,7 @@ again:
 
                start_caching(root);
 
-               if (objectid <= root->cache_progress ||
-                   objectid >= root->highest_objectid)
-                       __btrfs_add_free_space(ctl, objectid, 1);
-               else
-                       __btrfs_add_free_space(pinned, objectid, 1);
+               __btrfs_add_free_space(pinned, objectid, 1);
 
                up_write(&root->fs_info->commit_root_sem);
        }
index e79ff6b90cb71bb131426b97838c369ae0e6f48c..2ad7de94efef71e58af4e747cd05d3cb3aeeba40 100644 (file)
@@ -3066,7 +3066,7 @@ process_slot:
                                                         new_key.offset + datal,
                                                         1);
                                if (ret) {
-                                       if (ret != -EINVAL)
+                                       if (ret != -EOPNOTSUPP)
                                                btrfs_abort_transaction(trans,
                                                                root, ret);
                                        btrfs_end_transaction(trans, root);
@@ -3141,7 +3141,7 @@ process_slot:
                                                         new_key.offset + datal,
                                                         1);
                                if (ret) {
-                                       if (ret != -EINVAL)
+                                       if (ret != -EOPNOTSUPP)
                                                btrfs_abort_transaction(trans,
                                                        root, ret);
                                        btrfs_end_transaction(trans, root);
index 1ac3ca98c4294ae54781f97931278386e8bb4bcc..eb6537a08c1bf4438f0bc90df319977cb964bee7 100644 (file)
@@ -349,6 +349,11 @@ static int fs_path_ensure_buf(struct fs_path *p, int len)
        if (p->buf_len >= len)
                return 0;
 
+       if (len > PATH_MAX) {
+               WARN_ON(1);
+               return -ENOMEM;
+       }
+
        path_len = p->end - p->start;
        old_buf_len = p->buf_len;
 
index 5011aadacab8e4cf1ac291f061f3c6ada24f8b9a..9601d25a46075eaa44c0151ba890213efae8ec29 100644 (file)
@@ -385,20 +385,6 @@ static match_table_t tokens = {
        {Opt_err, NULL},
 };
 
-#define btrfs_set_and_info(root, opt, fmt, args...)                    \
-{                                                                      \
-       if (!btrfs_test_opt(root, opt))                                 \
-               btrfs_info(root->fs_info, fmt, ##args);                 \
-       btrfs_set_opt(root->fs_info->mount_opt, opt);                   \
-}
-
-#define btrfs_clear_and_info(root, opt, fmt, args...)                  \
-{                                                                      \
-       if (btrfs_test_opt(root, opt))                                  \
-               btrfs_info(root->fs_info, fmt, ##args);                 \
-       btrfs_clear_opt(root->fs_info->mount_opt, opt);                 \
-}
-
 /*
  * Regular mount options parser.  Everything that is needed only when
  * reading in a new superblock is parsed here.
@@ -1186,7 +1172,6 @@ static struct dentry *mount_subvol(const char *subvol_name, int flags,
                return ERR_PTR(-ENOMEM);
        mnt = vfs_kern_mount(&btrfs_fs_type, flags, device_name,
                             newargs);
-       kfree(newargs);
 
        if (PTR_RET(mnt) == -EBUSY) {
                if (flags & MS_RDONLY) {
@@ -1196,17 +1181,22 @@ static struct dentry *mount_subvol(const char *subvol_name, int flags,
                        int r;
                        mnt = vfs_kern_mount(&btrfs_fs_type, flags | MS_RDONLY, device_name,
                                             newargs);
-                       if (IS_ERR(mnt))
+                       if (IS_ERR(mnt)) {
+                               kfree(newargs);
                                return ERR_CAST(mnt);
+                       }
 
                        r = btrfs_remount(mnt->mnt_sb, &flags, NULL);
                        if (r < 0) {
                                /* FIXME: release vfsmount mnt ??*/
+                               kfree(newargs);
                                return ERR_PTR(r);
                        }
                }
        }
 
+       kfree(newargs);
+
        if (IS_ERR(mnt))
                return ERR_CAST(mnt);
 
index 39da1c2efa5030216d18bc6bb3020a78afb4c5f6..88a6df4cbe6d8a52bd083a756ac452b798c33708 100644 (file)
@@ -1221,9 +1221,6 @@ static long ceph_fallocate(struct file *file, int mode,
        if (!S_ISREG(inode->i_mode))
                return -EOPNOTSUPP;
 
-       if (IS_SWAPFILE(inode))
-               return -ETXTBSY;
-
        mutex_lock(&inode->i_mutex);
 
        if (ceph_snap(inode) != CEPH_NOSNAP) {
index df9c9141c0998383522b181664b9d57256bc99fa..5be1f997ecdeffe74f4d4e6e6fb3903a73f6c13d 100644 (file)
@@ -253,6 +253,11 @@ cifs_alloc_inode(struct super_block *sb)
        cifs_set_oplock_level(cifs_inode, 0);
        cifs_inode->delete_pending = false;
        cifs_inode->invalid_mapping = false;
+       clear_bit(CIFS_INODE_PENDING_OPLOCK_BREAK, &cifs_inode->flags);
+       clear_bit(CIFS_INODE_PENDING_WRITERS, &cifs_inode->flags);
+       clear_bit(CIFS_INODE_DOWNGRADE_OPLOCK_TO_L2, &cifs_inode->flags);
+       spin_lock_init(&cifs_inode->writers_lock);
+       cifs_inode->writers = 0;
        cifs_inode->vfs_inode.i_blkbits = 14;  /* 2**14 = CIFS_MAX_MSGSIZE */
        cifs_inode->server_eof = 0;
        cifs_inode->uniqueid = 0;
@@ -732,19 +737,26 @@ static ssize_t cifs_file_aio_write(struct kiocb *iocb, const struct iovec *iov,
                                   unsigned long nr_segs, loff_t pos)
 {
        struct inode *inode = file_inode(iocb->ki_filp);
+       struct cifsInodeInfo *cinode = CIFS_I(inode);
        ssize_t written;
        int rc;
 
+       written = cifs_get_writer(cinode);
+       if (written)
+               return written;
+
        written = generic_file_aio_write(iocb, iov, nr_segs, pos);
 
        if (CIFS_CACHE_WRITE(CIFS_I(inode)))
-               return written;
+               goto out;
 
        rc = filemap_fdatawrite(inode->i_mapping);
        if (rc)
                cifs_dbg(FYI, "cifs_file_aio_write: %d rc on %p inode\n",
                         rc, inode);
 
+out:
+       cifs_put_writer(cinode);
        return written;
 }
 
index c0f3718b77a83e7e0e010b089e436356e83a1eb7..30f6e9251a4aed13c5b38b34640124fb8b49e665 100644 (file)
@@ -228,6 +228,8 @@ struct smb_version_operations {
        /* verify the message */
        int (*check_message)(char *, unsigned int);
        bool (*is_oplock_break)(char *, struct TCP_Server_Info *);
+       void (*downgrade_oplock)(struct TCP_Server_Info *,
+                                       struct cifsInodeInfo *, bool);
        /* process transaction2 response */
        bool (*check_trans2)(struct mid_q_entry *, struct TCP_Server_Info *,
                             char *, int);
@@ -1113,6 +1115,12 @@ struct cifsInodeInfo {
        unsigned int epoch;             /* used to track lease state changes */
        bool delete_pending;            /* DELETE_ON_CLOSE is set */
        bool invalid_mapping;           /* pagecache is invalid */
+       unsigned long flags;
+#define CIFS_INODE_PENDING_OPLOCK_BREAK   (0) /* oplock break in progress */
+#define CIFS_INODE_PENDING_WRITERS       (1) /* Writes in progress */
+#define CIFS_INODE_DOWNGRADE_OPLOCK_TO_L2 (2) /* Downgrade oplock to L2 */
+       spinlock_t writers_lock;
+       unsigned int writers;           /* Number of writers on this inode */
        unsigned long time;             /* jiffies of last update of inode */
        u64  server_eof;                /* current file size on server -- protected by i_lock */
        u64  uniqueid;                  /* server inode number */
index acc4ee8ed0759a7e786709ea61d5077970b3ef3e..ca7980a1e303b85d4ef85d2f615645371c1934f7 100644 (file)
@@ -127,6 +127,9 @@ extern u64 cifs_UnixTimeToNT(struct timespec);
 extern struct timespec cnvrtDosUnixTm(__le16 le_date, __le16 le_time,
                                      int offset);
 extern void cifs_set_oplock_level(struct cifsInodeInfo *cinode, __u32 oplock);
+extern int cifs_get_writer(struct cifsInodeInfo *cinode);
+extern void cifs_put_writer(struct cifsInodeInfo *cinode);
+extern void cifs_done_oplock_break(struct cifsInodeInfo *cinode);
 extern int cifs_unlock_range(struct cifsFileInfo *cfile,
                             struct file_lock *flock, const unsigned int xid);
 extern int cifs_push_mandatory_locks(struct cifsFileInfo *cfile);
index f3264bd7a83d9427a158130a7d4a842443bd8b53..6ce4e0954b986ac1dd40bfb6dd9a8a851bef68d1 100644 (file)
@@ -6197,6 +6197,9 @@ QAllEAsRetry:
        cifs_dbg(FYI, "ea length %d\n", list_len);
        if (list_len <= 8) {
                cifs_dbg(FYI, "empty EA list returned from server\n");
+               /* didn't find the named attribute */
+               if (ea_name)
+                       rc = -ENODATA;
                goto QAllEAsOut;
        }
 
index 8add25538a3b83135f1145fca58f77c51fff1ef9..5ed03e0b8b40e28b10aa46630d973b47e229c194 100644 (file)
@@ -2599,7 +2599,7 @@ cifs_writev(struct kiocb *iocb, const struct iovec *iov,
                        ssize_t err;
 
                        err = generic_write_sync(file, iocb->ki_pos - rc, rc);
-                       if (rc < 0)
+                       if (err < 0)
                                rc = err;
                }
        } else {
@@ -2621,12 +2621,20 @@ cifs_strict_writev(struct kiocb *iocb, const struct iovec *iov,
        struct cifs_tcon *tcon = tlink_tcon(cfile->tlink);
        ssize_t written;
 
+       written = cifs_get_writer(cinode);
+       if (written)
+               return written;
+
        if (CIFS_CACHE_WRITE(cinode)) {
                if (cap_unix(tcon->ses) &&
                (CIFS_UNIX_FCNTL_CAP & le64_to_cpu(tcon->fsUnixInfo.Capability))
-                   && ((cifs_sb->mnt_cifs_flags & CIFS_MOUNT_NOPOSIXBRL) == 0))
-                       return generic_file_aio_write(iocb, iov, nr_segs, pos);
-               return cifs_writev(iocb, iov, nr_segs, pos);
+                 && ((cifs_sb->mnt_cifs_flags & CIFS_MOUNT_NOPOSIXBRL) == 0)) {
+                       written = generic_file_aio_write(
+                                       iocb, iov, nr_segs, pos);
+                       goto out;
+               }
+               written = cifs_writev(iocb, iov, nr_segs, pos);
+               goto out;
        }
        /*
         * For non-oplocked files in strict cache mode we need to write the data
@@ -2646,6 +2654,8 @@ cifs_strict_writev(struct kiocb *iocb, const struct iovec *iov,
                         inode);
                cinode->oplock = 0;
        }
+out:
+       cifs_put_writer(cinode);
        return written;
 }
 
@@ -2872,7 +2882,7 @@ ssize_t cifs_user_readv(struct kiocb *iocb, const struct iovec *iov,
                                            cifs_uncached_readv_complete);
                if (!rdata) {
                        rc = -ENOMEM;
-                       goto error;
+                       break;
                }
 
                rc = cifs_read_allocate_pages(rdata, npages);
@@ -3621,6 +3631,13 @@ static int cifs_launder_page(struct page *page)
        return rc;
 }
 
+static int
+cifs_pending_writers_wait(void *unused)
+{
+       schedule();
+       return 0;
+}
+
 void cifs_oplock_break(struct work_struct *work)
 {
        struct cifsFileInfo *cfile = container_of(work, struct cifsFileInfo,
@@ -3628,8 +3645,15 @@ void cifs_oplock_break(struct work_struct *work)
        struct inode *inode = cfile->dentry->d_inode;
        struct cifsInodeInfo *cinode = CIFS_I(inode);
        struct cifs_tcon *tcon = tlink_tcon(cfile->tlink);
+       struct TCP_Server_Info *server = tcon->ses->server;
        int rc = 0;
 
+       wait_on_bit(&cinode->flags, CIFS_INODE_PENDING_WRITERS,
+                       cifs_pending_writers_wait, TASK_UNINTERRUPTIBLE);
+
+       server->ops->downgrade_oplock(server, cinode,
+               test_bit(CIFS_INODE_DOWNGRADE_OPLOCK_TO_L2, &cinode->flags));
+
        if (!CIFS_CACHE_WRITE(cinode) && CIFS_CACHE_READ(cinode) &&
                                                cifs_has_mand_locks(cinode)) {
                cifs_dbg(FYI, "Reset oplock to None for inode=%p due to mand locks\n",
@@ -3666,6 +3690,7 @@ void cifs_oplock_break(struct work_struct *work)
                                                             cinode);
                cifs_dbg(FYI, "Oplock release rc = %d\n", rc);
        }
+       cifs_done_oplock_break(cinode);
 }
 
 /*
index 2f9f3790679d9137cddc89d141b0be434716a42a..3b0c62e622da80b55d4e290c94ed1ec564699eed 100644 (file)
@@ -466,8 +466,22 @@ is_valid_oplock_break(char *buffer, struct TCP_Server_Info *srv)
                                cifs_dbg(FYI, "file id match, oplock break\n");
                                pCifsInode = CIFS_I(netfile->dentry->d_inode);
 
-                               cifs_set_oplock_level(pCifsInode,
-                                       pSMB->OplockLevel ? OPLOCK_READ : 0);
+                               set_bit(CIFS_INODE_PENDING_OPLOCK_BREAK,
+                                       &pCifsInode->flags);
+
+                               /*
+                                * Set flag if the server downgrades the oplock
+                                * to L2 else clear.
+                                */
+                               if (pSMB->OplockLevel)
+                                       set_bit(
+                                          CIFS_INODE_DOWNGRADE_OPLOCK_TO_L2,
+                                          &pCifsInode->flags);
+                               else
+                                       clear_bit(
+                                          CIFS_INODE_DOWNGRADE_OPLOCK_TO_L2,
+                                          &pCifsInode->flags);
+
                                queue_work(cifsiod_wq,
                                           &netfile->oplock_break);
                                netfile->oplock_break_cancelled = false;
@@ -551,6 +565,62 @@ void cifs_set_oplock_level(struct cifsInodeInfo *cinode, __u32 oplock)
                cinode->oplock = 0;
 }
 
+static int
+cifs_oplock_break_wait(void *unused)
+{
+       schedule();
+       return signal_pending(current) ? -ERESTARTSYS : 0;
+}
+
+/*
+ * We wait for oplock breaks to be processed before we attempt to perform
+ * writes.
+ */
+int cifs_get_writer(struct cifsInodeInfo *cinode)
+{
+       int rc;
+
+start:
+       rc = wait_on_bit(&cinode->flags, CIFS_INODE_PENDING_OPLOCK_BREAK,
+                                  cifs_oplock_break_wait, TASK_KILLABLE);
+       if (rc)
+               return rc;
+
+       spin_lock(&cinode->writers_lock);
+       if (!cinode->writers)
+               set_bit(CIFS_INODE_PENDING_WRITERS, &cinode->flags);
+       cinode->writers++;
+       /* Check to see if we have started servicing an oplock break */
+       if (test_bit(CIFS_INODE_PENDING_OPLOCK_BREAK, &cinode->flags)) {
+               cinode->writers--;
+               if (cinode->writers == 0) {
+                       clear_bit(CIFS_INODE_PENDING_WRITERS, &cinode->flags);
+                       wake_up_bit(&cinode->flags, CIFS_INODE_PENDING_WRITERS);
+               }
+               spin_unlock(&cinode->writers_lock);
+               goto start;
+       }
+       spin_unlock(&cinode->writers_lock);
+       return 0;
+}
+
+void cifs_put_writer(struct cifsInodeInfo *cinode)
+{
+       spin_lock(&cinode->writers_lock);
+       cinode->writers--;
+       if (cinode->writers == 0) {
+               clear_bit(CIFS_INODE_PENDING_WRITERS, &cinode->flags);
+               wake_up_bit(&cinode->flags, CIFS_INODE_PENDING_WRITERS);
+       }
+       spin_unlock(&cinode->writers_lock);
+}
+
+void cifs_done_oplock_break(struct cifsInodeInfo *cinode)
+{
+       clear_bit(CIFS_INODE_PENDING_OPLOCK_BREAK, &cinode->flags);
+       wake_up_bit(&cinode->flags, CIFS_INODE_PENDING_OPLOCK_BREAK);
+}
+
 bool
 backup_cred(struct cifs_sb_info *cifs_sb)
 {
index 526fb89f92305b9e85d1f62f65a6e48c04555e83..d1fdfa848703d322f1f31cae5abb9ab5441625fb 100644 (file)
@@ -372,6 +372,16 @@ coalesce_t2(char *second_buf, struct smb_hdr *target_hdr)
        return 0;
 }
 
+static void
+cifs_downgrade_oplock(struct TCP_Server_Info *server,
+                       struct cifsInodeInfo *cinode, bool set_level2)
+{
+       if (set_level2)
+               cifs_set_oplock_level(cinode, OPLOCK_READ);
+       else
+               cifs_set_oplock_level(cinode, 0);
+}
+
 static bool
 cifs_check_trans2(struct mid_q_entry *mid, struct TCP_Server_Info *server,
                  char *buf, int malformed)
@@ -1019,6 +1029,7 @@ struct smb_version_operations smb1_operations = {
        .clear_stats = cifs_clear_stats,
        .print_stats = cifs_print_stats,
        .is_oplock_break = is_valid_oplock_break,
+       .downgrade_oplock = cifs_downgrade_oplock,
        .check_trans2 = cifs_check_trans2,
        .need_neg = cifs_need_neg,
        .negotiate = cifs_negotiate,
index fb3966265b6ef6b1e40095ad8008e647d3569939..b8021fde987dbbe65dbb6c09fd98e715521187c0 100644 (file)
@@ -575,9 +575,21 @@ smb2_is_valid_oplock_break(char *buffer, struct TCP_Server_Info *server)
                                else
                                        cfile->oplock_break_cancelled = false;
 
-                               server->ops->set_oplock_level(cinode,
-                                 rsp->OplockLevel ? SMB2_OPLOCK_LEVEL_II : 0,
-                                 0, NULL);
+                               set_bit(CIFS_INODE_PENDING_OPLOCK_BREAK,
+                                       &cinode->flags);
+
+                               /*
+                                * Set flag if the server downgrades the oplock
+                                * to L2 else clear.
+                                */
+                               if (rsp->OplockLevel)
+                                       set_bit(
+                                          CIFS_INODE_DOWNGRADE_OPLOCK_TO_L2,
+                                          &cinode->flags);
+                               else
+                                       clear_bit(
+                                          CIFS_INODE_DOWNGRADE_OPLOCK_TO_L2,
+                                          &cinode->flags);
 
                                queue_work(cifsiod_wq, &cfile->oplock_break);
 
index 192f51a12cf1c63fb6eee3359b2350747343a76c..35ddc3ed119d3be13fb5e2c9a725bda616de5c9c 100644 (file)
@@ -904,6 +904,17 @@ smb2_query_symlink(const unsigned int xid, struct cifs_tcon *tcon,
        return rc;
 }
 
+static void
+smb2_downgrade_oplock(struct TCP_Server_Info *server,
+                       struct cifsInodeInfo *cinode, bool set_level2)
+{
+       if (set_level2)
+               server->ops->set_oplock_level(cinode, SMB2_OPLOCK_LEVEL_II,
+                                               0, NULL);
+       else
+               server->ops->set_oplock_level(cinode, 0, 0, NULL);
+}
+
 static void
 smb2_set_oplock_level(struct cifsInodeInfo *cinode, __u32 oplock,
                      unsigned int epoch, bool *purge_cache)
@@ -1110,6 +1121,7 @@ struct smb_version_operations smb20_operations = {
        .clear_stats = smb2_clear_stats,
        .print_stats = smb2_print_stats,
        .is_oplock_break = smb2_is_valid_oplock_break,
+       .downgrade_oplock = smb2_downgrade_oplock,
        .need_neg = smb2_need_neg,
        .negotiate = smb2_negotiate,
        .negotiate_wsize = smb2_negotiate_wsize,
@@ -1184,6 +1196,7 @@ struct smb_version_operations smb21_operations = {
        .clear_stats = smb2_clear_stats,
        .print_stats = smb2_print_stats,
        .is_oplock_break = smb2_is_valid_oplock_break,
+       .downgrade_oplock = smb2_downgrade_oplock,
        .need_neg = smb2_need_neg,
        .negotiate = smb2_negotiate,
        .negotiate_wsize = smb2_negotiate_wsize,
@@ -1259,6 +1272,7 @@ struct smb_version_operations smb30_operations = {
        .print_stats = smb2_print_stats,
        .dump_share_caps = smb2_dump_share_caps,
        .is_oplock_break = smb2_is_valid_oplock_break,
+       .downgrade_oplock = smb2_downgrade_oplock,
        .need_neg = smb2_need_neg,
        .negotiate = smb2_negotiate,
        .negotiate_wsize = smb2_negotiate_wsize,
index 860344701067f49169e20a8a41df55145fa5f023..3802f8c94accdba8e9d62622155a523a2c39b4d4 100644 (file)
@@ -1352,7 +1352,6 @@ SMB2_set_compression(const unsigned int xid, struct cifs_tcon *tcon,
                     u64 persistent_fid, u64 volatile_fid)
 {
        int rc;
-       char *res_key = NULL;
        struct  compress_ioctl fsctl_input;
        char *ret_data = NULL;
 
@@ -1365,7 +1364,6 @@ SMB2_set_compression(const unsigned int xid, struct cifs_tcon *tcon,
                        2 /* in data len */, &ret_data /* out data */, NULL);
 
        cifs_dbg(FYI, "set compression rc %d\n", rc);
-       kfree(res_key);
 
        return rc;
 }
index ca926ad0430cf715af12ebc3f0fa86d8c273d492..66d3d3c6b4b248878af6d751178d055310224c3d 100644 (file)
@@ -457,9 +457,9 @@ COMPAT_SYSCALL_DEFINE3(fcntl64, unsigned int, fd, unsigned int, cmd,
        case F_GETLK64:
        case F_SETLK64:
        case F_SETLKW64:
-       case F_GETLKP:
-       case F_SETLKP:
-       case F_SETLKPW:
+       case F_OFD_GETLK:
+       case F_OFD_SETLK:
+       case F_OFD_SETLKW:
                ret = get_compat_flock64(&f, compat_ptr(arg));
                if (ret != 0)
                        break;
@@ -468,7 +468,7 @@ COMPAT_SYSCALL_DEFINE3(fcntl64, unsigned int, fd, unsigned int, cmd,
                conv_cmd = convert_fcntl_cmd(cmd);
                ret = sys_fcntl(fd, conv_cmd, (unsigned long)&f);
                set_fs(old_fs);
-               if ((conv_cmd == F_GETLK || conv_cmd == F_GETLKP) && ret == 0) {
+               if ((conv_cmd == F_GETLK || conv_cmd == F_OFD_GETLK) && ret == 0) {
                        /* need to return lock information - see above for commentary */
                        if (f.l_start > COMPAT_LOFF_T_MAX)
                                ret = -EOVERFLOW;
@@ -493,9 +493,9 @@ COMPAT_SYSCALL_DEFINE3(fcntl, unsigned int, fd, unsigned int, cmd,
        case F_GETLK64:
        case F_SETLK64:
        case F_SETLKW64:
-       case F_GETLKP:
-       case F_SETLKP:
-       case F_SETLKPW:
+       case F_OFD_GETLK:
+       case F_OFD_SETLK:
+       case F_OFD_SETLKW:
                return -EINVAL;
        }
        return compat_sys_fcntl64(fd, cmd, arg);
index e3ad709a4232f414b91fe1ed18989a07d0f7aaa3..0b2528fb640e77e4a38a351c51f8a01f12102c14 100644 (file)
@@ -73,10 +73,15 @@ static int expand_corename(struct core_name *cn, int size)
 static int cn_vprintf(struct core_name *cn, const char *fmt, va_list arg)
 {
        int free, need;
+       va_list arg_copy;
 
 again:
        free = cn->size - cn->used;
-       need = vsnprintf(cn->corename + cn->used, free, fmt, arg);
+
+       va_copy(arg_copy, arg);
+       need = vsnprintf(cn->corename + cn->used, free, fmt, arg_copy);
+       va_end(arg_copy);
+
        if (need < free) {
                cn->used += need;
                return 0;
index 6ea7b1436bbc201e872d6ee18f7321b2e099f156..5c56785007e0e36fec78e6535aa210e09247a983 100644 (file)
@@ -667,7 +667,7 @@ ext4_fsblk_t ext4_count_free_clusters(struct super_block *sb)
                        continue;
 
                x = ext4_count_free(bitmap_bh->b_data,
-                                   EXT4_BLOCKS_PER_GROUP(sb) / 8);
+                                   EXT4_CLUSTERS_PER_GROUP(sb) / 8);
                printk(KERN_DEBUG "group %u: stored = %d, counted = %u\n",
                        i, ext4_free_group_clusters(sb, gdp), x);
                bitmap_count += x;
index f1c65dc7cc0ad268a9fccc7b6f1aeaf078d84a0a..66946aa621270716c580a2617bceecbcadb6bda7 100644 (file)
@@ -2466,23 +2466,6 @@ static inline void ext4_update_i_disksize(struct inode *inode, loff_t newsize)
        up_write(&EXT4_I(inode)->i_data_sem);
 }
 
-/*
- * Update i_disksize after writeback has been started. Races with truncate
- * are avoided by checking i_size under i_data_sem.
- */
-static inline void ext4_wb_update_i_disksize(struct inode *inode, loff_t newsize)
-{
-       loff_t i_size;
-
-       down_write(&EXT4_I(inode)->i_data_sem);
-       i_size = i_size_read(inode);
-       if (newsize > i_size)
-               newsize = i_size;
-       if (newsize > EXT4_I(inode)->i_disksize)
-               EXT4_I(inode)->i_disksize = newsize;
-       up_write(&EXT4_I(inode)->i_data_sem);
-}
-
 struct ext4_group_info {
        unsigned long   bb_state;
        struct rb_root  bb_free_root;
index 82df3ce9874ab7f3a65abc10e2bd2238b1ae2af3..01b0c208f62507e12f50ddd4fd3669972797f823 100644 (file)
@@ -3313,6 +3313,11 @@ static int ext4_split_extent(handle_t *handle,
                return PTR_ERR(path);
        depth = ext_depth(inode);
        ex = path[depth].p_ext;
+       if (!ex) {
+               EXT4_ERROR_INODE(inode, "unexpected hole at %lu",
+                                (unsigned long) map->m_lblk);
+               return -EIO;
+       }
        uninitialized = ext4_ext_is_uninitialized(ex);
        split_flag1 = 0;
 
@@ -3694,6 +3699,12 @@ static int ext4_convert_initialized_extents(handle_t *handle,
                }
                depth = ext_depth(inode);
                ex = path[depth].p_ext;
+               if (!ex) {
+                       EXT4_ERROR_INODE(inode, "unexpected hole at %lu",
+                                        (unsigned long) map->m_lblk);
+                       err = -EIO;
+                       goto out;
+               }
        }
 
        err = ext4_ext_get_access(handle, inode, path + depth);
@@ -4730,6 +4741,9 @@ static long ext4_zero_range(struct file *file, loff_t offset,
 
        trace_ext4_zero_range(inode, offset, len, mode);
 
+       if (!S_ISREG(inode->i_mode))
+               return -EINVAL;
+
        /*
         * Write out all dirty pages to avoid race conditions
         * Then release them.
@@ -4878,9 +4892,6 @@ long ext4_fallocate(struct file *file, int mode, loff_t offset, loff_t len)
        if (mode & FALLOC_FL_PUNCH_HOLE)
                return ext4_punch_hole(inode, offset, len);
 
-       if (mode & FALLOC_FL_COLLAPSE_RANGE)
-               return ext4_collapse_range(inode, offset, len);
-
        ret = ext4_convert_inline_data(inode);
        if (ret)
                return ret;
@@ -4892,6 +4903,9 @@ long ext4_fallocate(struct file *file, int mode, loff_t offset, loff_t len)
        if (!(ext4_test_inode_flag(inode, EXT4_INODE_EXTENTS)))
                return -EOPNOTSUPP;
 
+       if (mode & FALLOC_FL_COLLAPSE_RANGE)
+               return ext4_collapse_range(inode, offset, len);
+
        if (mode & FALLOC_FL_ZERO_RANGE)
                return ext4_zero_range(file, offset, len, mode);
 
@@ -5229,18 +5243,19 @@ ext4_ext_shift_path_extents(struct ext4_ext_path *path, ext4_lblk_t shift,
                        if (ex_start == EXT_FIRST_EXTENT(path[depth].p_hdr))
                                update = 1;
 
-                       *start = ex_last->ee_block +
+                       *start = le32_to_cpu(ex_last->ee_block) +
                                ext4_ext_get_actual_len(ex_last);
 
                        while (ex_start <= ex_last) {
-                               ex_start->ee_block -= shift;
-                               if (ex_start >
-                                       EXT_FIRST_EXTENT(path[depth].p_hdr)) {
-                                       if (ext4_ext_try_to_merge_right(inode,
-                                               path, ex_start - 1))
-                                               ex_last--;
-                               }
-                               ex_start++;
+                               le32_add_cpu(&ex_start->ee_block, -shift);
+                               /* Try to merge to the left. */
+                               if ((ex_start >
+                                    EXT_FIRST_EXTENT(path[depth].p_hdr)) &&
+                                   ext4_ext_try_to_merge_right(inode,
+                                                       path, ex_start - 1))
+                                       ex_last--;
+                               else
+                                       ex_start++;
                        }
                        err = ext4_ext_dirty(handle, inode, path + depth);
                        if (err)
@@ -5255,7 +5270,7 @@ ext4_ext_shift_path_extents(struct ext4_ext_path *path, ext4_lblk_t shift,
                if (err)
                        goto out;
 
-               path[depth].p_idx->ei_block -= shift;
+               le32_add_cpu(&path[depth].p_idx->ei_block, -shift);
                err = ext4_ext_dirty(handle, inode, path + depth);
                if (err)
                        goto out;
@@ -5300,7 +5315,8 @@ ext4_ext_shift_extents(struct inode *inode, handle_t *handle,
                return ret;
        }
 
-       stop_block = extent->ee_block + ext4_ext_get_actual_len(extent);
+       stop_block = le32_to_cpu(extent->ee_block) +
+                       ext4_ext_get_actual_len(extent);
        ext4_ext_drop_refs(path);
        kfree(path);
 
@@ -5313,10 +5329,18 @@ ext4_ext_shift_extents(struct inode *inode, handle_t *handle,
         * enough to accomodate the shift.
         */
        path = ext4_ext_find_extent(inode, start - 1, NULL, 0);
+       if (IS_ERR(path))
+               return PTR_ERR(path);
        depth = path->p_depth;
        extent =  path[depth].p_ext;
-       ex_start = extent->ee_block;
-       ex_end = extent->ee_block + ext4_ext_get_actual_len(extent);
+       if (extent) {
+               ex_start = le32_to_cpu(extent->ee_block);
+               ex_end = le32_to_cpu(extent->ee_block) +
+                       ext4_ext_get_actual_len(extent);
+       } else {
+               ex_start = 0;
+               ex_end = 0;
+       }
        ext4_ext_drop_refs(path);
        kfree(path);
 
@@ -5331,7 +5355,13 @@ ext4_ext_shift_extents(struct inode *inode, handle_t *handle,
                        return PTR_ERR(path);
                depth = path->p_depth;
                extent = path[depth].p_ext;
-               current_block = extent->ee_block;
+               if (!extent) {
+                       EXT4_ERROR_INODE(inode, "unexpected hole at %lu",
+                                        (unsigned long) start);
+                       return -EIO;
+               }
+
+               current_block = le32_to_cpu(extent->ee_block);
                if (start > current_block) {
                        /* Hole, move to the next extent */
                        ret = mext_next_extent(inode, path, &extent);
@@ -5365,17 +5395,18 @@ int ext4_collapse_range(struct inode *inode, loff_t offset, loff_t len)
        ext4_lblk_t punch_start, punch_stop;
        handle_t *handle;
        unsigned int credits;
-       loff_t new_size;
+       loff_t new_size, ioffset;
        int ret;
 
-       BUG_ON(offset + len > i_size_read(inode));
-
        /* Collapse range works only on fs block size aligned offsets. */
        if (offset & (EXT4_BLOCK_SIZE(sb) - 1) ||
            len & (EXT4_BLOCK_SIZE(sb) - 1))
                return -EINVAL;
 
        if (!S_ISREG(inode->i_mode))
+               return -EINVAL;
+
+       if (EXT4_SB(inode->i_sb)->s_cluster_ratio > 1)
                return -EOPNOTSUPP;
 
        trace_ext4_collapse_range(inode, offset, len);
@@ -5383,22 +5414,34 @@ int ext4_collapse_range(struct inode *inode, loff_t offset, loff_t len)
        punch_start = offset >> EXT4_BLOCK_SIZE_BITS(sb);
        punch_stop = (offset + len) >> EXT4_BLOCK_SIZE_BITS(sb);
 
+       /* Call ext4_force_commit to flush all data in case of data=journal. */
+       if (ext4_should_journal_data(inode)) {
+               ret = ext4_force_commit(inode->i_sb);
+               if (ret)
+                       return ret;
+       }
+
+       /*
+        * Need to round down offset to be aligned with page size boundary
+        * for page size > block size.
+        */
+       ioffset = round_down(offset, PAGE_SIZE);
+
        /* Write out all dirty pages */
-       ret = filemap_write_and_wait_range(inode->i_mapping, offset, -1);
+       ret = filemap_write_and_wait_range(inode->i_mapping, ioffset,
+                                          LLONG_MAX);
        if (ret)
                return ret;
 
        /* Take mutex lock */
        mutex_lock(&inode->i_mutex);
 
-       /* It's not possible punch hole on append only file */
-       if (IS_APPEND(inode) || IS_IMMUTABLE(inode)) {
-               ret = -EPERM;
-               goto out_mutex;
-       }
-
-       if (IS_SWAPFILE(inode)) {
-               ret = -ETXTBSY;
+       /*
+        * There is no need to overlap collapse range with EOF, in which case
+        * it is effectively a truncate operation
+        */
+       if (offset + len >= i_size_read(inode)) {
+               ret = -EINVAL;
                goto out_mutex;
        }
 
@@ -5408,7 +5451,7 @@ int ext4_collapse_range(struct inode *inode, loff_t offset, loff_t len)
                goto out_mutex;
        }
 
-       truncate_pagecache_range(inode, offset, -1);
+       truncate_pagecache(inode, ioffset);
 
        /* Wait for existing dio to complete */
        ext4_inode_block_unlocked_dio(inode);
@@ -5425,7 +5468,7 @@ int ext4_collapse_range(struct inode *inode, loff_t offset, loff_t len)
        ext4_discard_preallocations(inode);
 
        ret = ext4_es_remove_extent(inode, punch_start,
-                                   EXT_MAX_BLOCKS - punch_start - 1);
+                                   EXT_MAX_BLOCKS - punch_start);
        if (ret) {
                up_write(&EXT4_I(inode)->i_data_sem);
                goto out_stop;
@@ -5436,6 +5479,7 @@ int ext4_collapse_range(struct inode *inode, loff_t offset, loff_t len)
                up_write(&EXT4_I(inode)->i_data_sem);
                goto out_stop;
        }
+       ext4_discard_preallocations(inode);
 
        ret = ext4_ext_shift_extents(inode, handle, punch_stop,
                                     punch_stop - punch_start);
@@ -5445,10 +5489,9 @@ int ext4_collapse_range(struct inode *inode, loff_t offset, loff_t len)
        }
 
        new_size = i_size_read(inode) - len;
-       truncate_setsize(inode, new_size);
+       i_size_write(inode, new_size);
        EXT4_I(inode)->i_disksize = new_size;
 
-       ext4_discard_preallocations(inode);
        up_write(&EXT4_I(inode)->i_data_sem);
        if (IS_SYNC(inode))
                ext4_handle_sync(handle);
index 0a014a7194b28cac95e56f21b59f3776fcf8c9fc..0ebc21204b5184841405f890fa11dd5ae11ef54c 100644 (file)
@@ -810,7 +810,7 @@ retry:
 
                        newes.es_lblk = end + 1;
                        newes.es_len = len2;
-                       block = 0x7FDEADBEEF;
+                       block = 0x7FDEADBEEFULL;
                        if (ext4_es_is_written(&orig_es) ||
                            ext4_es_is_unwritten(&orig_es))
                                block = ext4_es_pblock(&orig_es) +
index ca7502d89fdee07b96585c768854375b207daaf6..063fc1538355972d912553ad6c8e419390f057de 100644 (file)
@@ -82,7 +82,7 @@ ext4_unaligned_aio(struct inode *inode, const struct iovec *iov,
        size_t count = iov_length(iov, nr_segs);
        loff_t final_size = pos + count;
 
-       if (pos >= inode->i_size)
+       if (pos >= i_size_read(inode))
                return 0;
 
        if ((pos & blockmask) || (final_size & blockmask))
index 5b0d2c7d54080dea4080909fe8ec6a74ecf19b56..d7b7462a0e13e11e7131f2b148d1323a3de5c996 100644 (file)
@@ -522,6 +522,10 @@ int ext4_map_blocks(handle_t *handle, struct inode *inode,
        if (unlikely(map->m_len > INT_MAX))
                map->m_len = INT_MAX;
 
+       /* We can handle the block number less than EXT_MAX_BLOCKS */
+       if (unlikely(map->m_lblk >= EXT_MAX_BLOCKS))
+               return -EIO;
+
        /* Lookup extent status tree firstly */
        if (ext4_es_lookup_extent(inode, map->m_lblk, &es)) {
                ext4_es_lru_add(inode);
@@ -2243,13 +2247,23 @@ static int mpage_map_and_submit_extent(handle_t *handle,
                        return err;
        } while (map->m_len);
 
-       /* Update on-disk size after IO is submitted */
+       /*
+        * Update on-disk size after IO is submitted.  Races with
+        * truncate are avoided by checking i_size under i_data_sem.
+        */
        disksize = ((loff_t)mpd->first_page) << PAGE_CACHE_SHIFT;
        if (disksize > EXT4_I(inode)->i_disksize) {
                int err2;
-
-               ext4_wb_update_i_disksize(inode, disksize);
+               loff_t i_size;
+
+               down_write(&EXT4_I(inode)->i_data_sem);
+               i_size = i_size_read(inode);
+               if (disksize > i_size)
+                       disksize = i_size;
+               if (disksize > EXT4_I(inode)->i_disksize)
+                       EXT4_I(inode)->i_disksize = disksize;
                err2 = ext4_mark_inode_dirty(handle, inode);
+               up_write(&EXT4_I(inode)->i_data_sem);
                if (err2)
                        ext4_error(inode->i_sb,
                                   "Failed to mark inode %lu dirty",
@@ -3527,15 +3541,6 @@ int ext4_punch_hole(struct inode *inode, loff_t offset, loff_t length)
        }
 
        mutex_lock(&inode->i_mutex);
-       /* It's not possible punch hole on append only file */
-       if (IS_APPEND(inode) || IS_IMMUTABLE(inode)) {
-               ret = -EPERM;
-               goto out_mutex;
-       }
-       if (IS_SWAPFILE(inode)) {
-               ret = -ETXTBSY;
-               goto out_mutex;
-       }
 
        /* No need to punch hole beyond i_size */
        if (offset >= inode->i_size)
@@ -3616,7 +3621,6 @@ int ext4_punch_hole(struct inode *inode, loff_t offset, loff_t length)
                ret = ext4_free_hole_blocks(handle, inode, first_block,
                                            stop_block);
 
-       ext4_discard_preallocations(inode);
        up_write(&EXT4_I(inode)->i_data_sem);
        if (IS_SYNC(inode))
                ext4_handle_sync(handle);
@@ -4423,21 +4427,20 @@ out_brelse:
  *
  * We are called from a few places:
  *
- * - Within generic_file_write() for O_SYNC files.
+ * - Within generic_file_aio_write() -> generic_write_sync() for O_SYNC files.
  *   Here, there will be no transaction running. We wait for any running
  *   transaction to commit.
  *
- * - Within sys_sync(), kupdate and such.
- *   We wait on commit, if tol to.
+ * - Within flush work (sys_sync(), kupdate and such).
+ *   We wait on commit, if told to.
  *
- * - Within prune_icache() (PF_MEMALLOC == true)
- *   Here we simply return.  We can't afford to block kswapd on the
- *   journal commit.
+ * - Within iput_final() -> write_inode_now()
+ *   We wait on commit, if told to.
  *
  * In all cases it is actually safe for us to return without doing anything,
  * because the inode has been copied into a raw inode buffer in
- * ext4_mark_inode_dirty().  This is a correctness thing for O_SYNC and for
- * knfsd.
+ * ext4_mark_inode_dirty().  This is a correctness thing for WB_SYNC_ALL
+ * writeback.
  *
  * Note that we are absolutely dependent upon all inode dirtiers doing the
  * right thing: they *must* call mark_inode_dirty() after dirtying info in
@@ -4449,15 +4452,15 @@ out_brelse:
  *     stuff();
  *     inode->i_size = expr;
  *
- * is in error because a kswapd-driven write_inode() could occur while
- * `stuff()' is running, and the new i_size will be lost.  Plus the inode
- * will no longer be on the superblock's dirty inode list.
+ * is in error because write_inode() could occur while `stuff()' is running,
+ * and the new i_size will be lost.  Plus the inode will no longer be on the
+ * superblock's dirty inode list.
  */
 int ext4_write_inode(struct inode *inode, struct writeback_control *wbc)
 {
        int err;
 
-       if (current->flags & PF_MEMALLOC)
+       if (WARN_ON_ONCE(current->flags & PF_MEMALLOC))
                return 0;
 
        if (EXT4_SB(inode->i_sb)->s_journal) {
index a888cac76e9c55c34002f930a7bc8a8df53376bf..c8238a26818cd9ef7567d0552a60a461bfd1f76e 100644 (file)
@@ -989,7 +989,7 @@ static int ext4_mb_get_buddy_page_lock(struct super_block *sb,
        poff = block % blocks_per_page;
        page = find_or_create_page(inode->i_mapping, pnum, GFP_NOFS);
        if (!page)
-               return -EIO;
+               return -ENOMEM;
        BUG_ON(page->mapping != inode->i_mapping);
        e4b->bd_bitmap_page = page;
        e4b->bd_bitmap = page_address(page) + (poff * sb->s_blocksize);
@@ -1003,7 +1003,7 @@ static int ext4_mb_get_buddy_page_lock(struct super_block *sb,
        pnum = block / blocks_per_page;
        page = find_or_create_page(inode->i_mapping, pnum, GFP_NOFS);
        if (!page)
-               return -EIO;
+               return -ENOMEM;
        BUG_ON(page->mapping != inode->i_mapping);
        e4b->bd_buddy_page = page;
        return 0;
@@ -1168,7 +1168,11 @@ ext4_mb_load_buddy(struct super_block *sb, ext4_group_t group,
                        unlock_page(page);
                }
        }
-       if (page == NULL || !PageUptodate(page)) {
+       if (page == NULL) {
+               ret = -ENOMEM;
+               goto err;
+       }
+       if (!PageUptodate(page)) {
                ret = -EIO;
                goto err;
        }
@@ -1197,7 +1201,11 @@ ext4_mb_load_buddy(struct super_block *sb, ext4_group_t group,
                        unlock_page(page);
                }
        }
-       if (page == NULL || !PageUptodate(page)) {
+       if (page == NULL) {
+               ret = -ENOMEM;
+               goto err;
+       }
+       if (!PageUptodate(page)) {
                ret = -EIO;
                goto err;
        }
@@ -5008,6 +5016,8 @@ error_return:
  */
 static int ext4_trim_extent(struct super_block *sb, int start, int count,
                             ext4_group_t group, struct ext4_buddy *e4b)
+__releases(bitlock)
+__acquires(bitlock)
 {
        struct ext4_free_extent ex;
        int ret = 0;
index ab95508e3d4018eab92647c6d2308e98524080d1..c18d95b5054081c75e0c7a2fab975976838f9b02 100644 (file)
@@ -308,13 +308,14 @@ static void ext4_end_bio(struct bio *bio, int error)
        if (error) {
                struct inode *inode = io_end->inode;
 
-               ext4_warning(inode->i_sb, "I/O error writing to inode %lu "
+               ext4_warning(inode->i_sb, "I/O error %d writing to inode %lu "
                             "(offset %llu size %ld starting block %llu)",
-                            inode->i_ino,
+                            error, inode->i_ino,
                             (unsigned long long) io_end->offset,
                             (long) io_end->size,
                             (unsigned long long)
                             bi_sector >> (inode->i_blkbits - 9));
+               mapping_set_error(inode->i_mapping, error);
        }
 
        if (io_end->flag & EXT4_IO_END_UNWRITTEN) {
index f3c667091618d8b26e09964dafe2f673a4c6cbd3..6f9e6fadac04e1c8af1d4a98d6258cdbc2f45dea 100644 (file)
@@ -3869,19 +3869,38 @@ static int ext4_fill_super(struct super_block *sb, void *data, int silent)
                        goto failed_mount2;
                }
        }
+
+       /*
+        * set up enough so that it can read an inode,
+        * and create new inode for buddy allocator
+        */
+       sbi->s_gdb_count = db_count;
+       if (!test_opt(sb, NOLOAD) &&
+           EXT4_HAS_COMPAT_FEATURE(sb, EXT4_FEATURE_COMPAT_HAS_JOURNAL))
+               sb->s_op = &ext4_sops;
+       else
+               sb->s_op = &ext4_nojournal_sops;
+
+       ext4_ext_init(sb);
+       err = ext4_mb_init(sb);
+       if (err) {
+               ext4_msg(sb, KERN_ERR, "failed to initialize mballoc (%d)",
+                        err);
+               goto failed_mount2;
+       }
+
        if (!ext4_check_descriptors(sb, &first_not_zeroed)) {
                ext4_msg(sb, KERN_ERR, "group descriptors corrupted!");
-               goto failed_mount2;
+               goto failed_mount2a;
        }
        if (EXT4_HAS_INCOMPAT_FEATURE(sb, EXT4_FEATURE_INCOMPAT_FLEX_BG))
                if (!ext4_fill_flex_info(sb)) {
                        ext4_msg(sb, KERN_ERR,
                               "unable to initialize "
                               "flex_bg meta info!");
-                       goto failed_mount2;
+                       goto failed_mount2a;
                }
 
-       sbi->s_gdb_count = db_count;
        get_random_bytes(&sbi->s_next_generation, sizeof(u32));
        spin_lock_init(&sbi->s_next_gen_lock);
 
@@ -3916,14 +3935,6 @@ static int ext4_fill_super(struct super_block *sb, void *data, int silent)
        sbi->s_stripe = ext4_get_stripe_size(sbi);
        sbi->s_extent_max_zeroout_kb = 32;
 
-       /*
-        * set up enough so that it can read an inode
-        */
-       if (!test_opt(sb, NOLOAD) &&
-           EXT4_HAS_COMPAT_FEATURE(sb, EXT4_FEATURE_COMPAT_HAS_JOURNAL))
-               sb->s_op = &ext4_sops;
-       else
-               sb->s_op = &ext4_nojournal_sops;
        sb->s_export_op = &ext4_export_ops;
        sb->s_xattr = ext4_xattr_handlers;
 #ifdef CONFIG_QUOTA
@@ -4113,21 +4124,13 @@ no_journal:
        if (err) {
                ext4_msg(sb, KERN_ERR, "failed to reserve %llu clusters for "
                         "reserved pool", ext4_calculate_resv_clusters(sb));
-               goto failed_mount4a;
+               goto failed_mount5;
        }
 
        err = ext4_setup_system_zone(sb);
        if (err) {
                ext4_msg(sb, KERN_ERR, "failed to initialize system "
                         "zone (%d)", err);
-               goto failed_mount4a;
-       }
-
-       ext4_ext_init(sb);
-       err = ext4_mb_init(sb);
-       if (err) {
-               ext4_msg(sb, KERN_ERR, "failed to initialize mballoc (%d)",
-                        err);
                goto failed_mount5;
        }
 
@@ -4204,11 +4207,8 @@ failed_mount8:
 failed_mount7:
        ext4_unregister_li_request(sb);
 failed_mount6:
-       ext4_mb_release(sb);
-failed_mount5:
-       ext4_ext_release(sb);
        ext4_release_system_zone(sb);
-failed_mount4a:
+failed_mount5:
        dput(sb->s_root);
        sb->s_root = NULL;
 failed_mount4:
@@ -4232,11 +4232,14 @@ failed_mount3:
        percpu_counter_destroy(&sbi->s_extent_cache_cnt);
        if (sbi->s_mmp_tsk)
                kthread_stop(sbi->s_mmp_tsk);
+failed_mount2a:
+       ext4_mb_release(sb);
 failed_mount2:
        for (i = 0; i < db_count; i++)
                brelse(sbi->s_group_desc[i]);
        ext4_kvfree(sbi->s_group_desc);
 failed_mount:
+       ext4_ext_release(sb);
        if (sbi->s_chksum_driver)
                crypto_free_shash(sbi->s_chksum_driver);
        if (sbi->s_proc) {
index 1f5cf5880718d28c8ca7893f7165807f78101c6b..4eec399ec807bc6733d1a90b8c3d0d205eb795c1 100644 (file)
@@ -520,8 +520,8 @@ static void ext4_xattr_update_super_block(handle_t *handle,
 }
 
 /*
- * Release the xattr block BH: If the reference count is > 1, decrement
- * it; otherwise free the block.
+ * Release the xattr block BH: If the reference count is > 1, decrement it;
+ * otherwise free the block.
  */
 static void
 ext4_xattr_release_block(handle_t *handle, struct inode *inode,
@@ -542,16 +542,31 @@ ext4_xattr_release_block(handle_t *handle, struct inode *inode,
                if (ce)
                        mb_cache_entry_free(ce);
                get_bh(bh);
+               unlock_buffer(bh);
                ext4_free_blocks(handle, inode, bh, 0, 1,
                                 EXT4_FREE_BLOCKS_METADATA |
                                 EXT4_FREE_BLOCKS_FORGET);
-               unlock_buffer(bh);
        } else {
                le32_add_cpu(&BHDR(bh)->h_refcount, -1);
                if (ce)
                        mb_cache_entry_release(ce);
+               /*
+                * Beware of this ugliness: Releasing of xattr block references
+                * from different inodes can race and so we have to protect
+                * from a race where someone else frees the block (and releases
+                * its journal_head) before we are done dirtying the buffer. In
+                * nojournal mode this race is harmless and we actually cannot
+                * call ext4_handle_dirty_xattr_block() with locked buffer as
+                * that function can call sync_dirty_buffer() so for that case
+                * we handle the dirtying after unlocking the buffer.
+                */
+               if (ext4_handle_valid(handle))
+                       error = ext4_handle_dirty_xattr_block(handle, inode,
+                                                             bh);
                unlock_buffer(bh);
-               error = ext4_handle_dirty_xattr_block(handle, inode, bh);
+               if (!ext4_handle_valid(handle))
+                       error = ext4_handle_dirty_xattr_block(handle, inode,
+                                                             bh);
                if (IS_SYNC(inode))
                        ext4_handle_sync(handle);
                dquot_free_block(inode, EXT4_C2B(EXT4_SB(inode->i_sb), 1));
index 9ead1596399a12ef66ecf5f087b59463424ccf5d..72c82f69b01b28594e56bb9518df6f211f0d51a9 100644 (file)
@@ -274,15 +274,15 @@ static long do_fcntl(int fd, unsigned int cmd, unsigned long arg,
                break;
 #if BITS_PER_LONG != 32
        /* 32-bit arches must use fcntl64() */
-       case F_GETLKP:
+       case F_OFD_GETLK:
 #endif
        case F_GETLK:
                err = fcntl_getlk(filp, cmd, (struct flock __user *) arg);
                break;
 #if BITS_PER_LONG != 32
        /* 32-bit arches must use fcntl64() */
-       case F_SETLKP:
-       case F_SETLKPW:
+       case F_OFD_SETLK:
+       case F_OFD_SETLKW:
 #endif
                /* Fallthrough */
        case F_SETLK:
@@ -399,13 +399,13 @@ SYSCALL_DEFINE3(fcntl64, unsigned int, fd, unsigned int, cmd,
        
        switch (cmd) {
        case F_GETLK64:
-       case F_GETLKP:
+       case F_OFD_GETLK:
                err = fcntl_getlk64(f.file, cmd, (struct flock64 __user *) arg);
                break;
        case F_SETLK64:
        case F_SETLKW64:
-       case F_SETLKP:
-       case F_SETLKPW:
+       case F_OFD_SETLK:
+       case F_OFD_SETLKW:
                err = fcntl_setlk64(fd, f.file, cmd,
                                (struct flock64 __user *) arg);
                break;
index 78f3403300afd5d825ab833964a443953d58f995..ac127cd008bfeb268c5be789e339b03538d2597c 100644 (file)
@@ -232,9 +232,6 @@ static int kernfs_link_sibling(struct kernfs_node *kn)
        struct rb_node **node = &kn->parent->dir.children.rb_node;
        struct rb_node *parent = NULL;
 
-       if (kernfs_type(kn) == KERNFS_DIR)
-               kn->parent->dir.subdirs++;
-
        while (*node) {
                struct kernfs_node *pos;
                int result;
@@ -249,9 +246,15 @@ static int kernfs_link_sibling(struct kernfs_node *kn)
                else
                        return -EEXIST;
        }
+
        /* add new node and rebalance the tree */
        rb_link_node(&kn->rb, parent, node);
        rb_insert_color(&kn->rb, &kn->parent->dir.children);
+
+       /* successfully added, account subdir number */
+       if (kernfs_type(kn) == KERNFS_DIR)
+               kn->parent->dir.subdirs++;
+
        return 0;
 }
 
index 8034706a7af87523bfc40e8660f21cc54238563f..e01ea4a14a014b3123dddf6d2ad1ecb9a6381736 100644 (file)
@@ -484,6 +484,8 @@ static int kernfs_fop_mmap(struct file *file, struct vm_area_struct *vma)
 
        ops = kernfs_ops(of->kn);
        rc = ops->mmap(of, vma);
+       if (rc)
+               goto out_put;
 
        /*
         * PowerPC's pci_mmap of legacy_mem uses shmem_zero_setup()
index abb0f1f53d933c7286527719e9644c47152408b6..985217626e663f360afd6db67ae13ffdf2cad9ca 100644 (file)
@@ -48,14 +48,18 @@ void __init kernfs_inode_init(void)
 
 static struct kernfs_iattrs *kernfs_iattrs(struct kernfs_node *kn)
 {
+       static DEFINE_MUTEX(iattr_mutex);
+       struct kernfs_iattrs *ret;
        struct iattr *iattrs;
 
+       mutex_lock(&iattr_mutex);
+
        if (kn->iattr)
-               return kn->iattr;
+               goto out_unlock;
 
        kn->iattr = kzalloc(sizeof(struct kernfs_iattrs), GFP_KERNEL);
        if (!kn->iattr)
-               return NULL;
+               goto out_unlock;
        iattrs = &kn->iattr->ia_iattr;
 
        /* assign default attributes */
@@ -65,8 +69,10 @@ static struct kernfs_iattrs *kernfs_iattrs(struct kernfs_node *kn)
        iattrs->ia_atime = iattrs->ia_mtime = iattrs->ia_ctime = CURRENT_TIME;
 
        simple_xattrs_init(&kn->iattr->xattrs);
-
-       return kn->iattr;
+out_unlock:
+       ret = kn->iattr;
+       mutex_unlock(&iattr_mutex);
+       return ret;
 }
 
 static int __kernfs_setattr(struct kernfs_node *kn, const struct iattr *iattr)
index 13fc7a6d380ae6648945c8956cc53901de2d0ccc..e663aeac579e5d8aaa2596a177114b17f262bd6c 100644 (file)
 #define IS_POSIX(fl)   (fl->fl_flags & FL_POSIX)
 #define IS_FLOCK(fl)   (fl->fl_flags & FL_FLOCK)
 #define IS_LEASE(fl)   (fl->fl_flags & (FL_LEASE|FL_DELEG))
-#define IS_FILE_PVT(fl)        (fl->fl_flags & FL_FILE_PVT)
+#define IS_OFDLCK(fl)  (fl->fl_flags & FL_OFDLCK)
 
 static bool lease_breaking(struct file_lock *fl)
 {
@@ -564,7 +564,7 @@ static void __locks_insert_block(struct file_lock *blocker,
        BUG_ON(!list_empty(&waiter->fl_block));
        waiter->fl_next = blocker;
        list_add_tail(&waiter->fl_block, &blocker->fl_block);
-       if (IS_POSIX(blocker) && !IS_FILE_PVT(blocker))
+       if (IS_POSIX(blocker) && !IS_OFDLCK(blocker))
                locks_insert_global_blocked(waiter);
 }
 
@@ -759,12 +759,12 @@ EXPORT_SYMBOL(posix_test_lock);
  * of tasks (such as posix threads) sharing the same open file table.
  * To handle those cases, we just bail out after a few iterations.
  *
- * For FL_FILE_PVT locks, the owner is the filp, not the files_struct.
+ * For FL_OFDLCK locks, the owner is the filp, not the files_struct.
  * Because the owner is not even nominally tied to a thread of
  * execution, the deadlock detection below can't reasonably work well. Just
  * skip it for those.
  *
- * In principle, we could do a more limited deadlock detection on FL_FILE_PVT
+ * In principle, we could do a more limited deadlock detection on FL_OFDLCK
  * locks that just checks for the case where two tasks are attempting to
  * upgrade from read to write locks on the same inode.
  */
@@ -791,9 +791,9 @@ static int posix_locks_deadlock(struct file_lock *caller_fl,
 
        /*
         * This deadlock detector can't reasonably detect deadlocks with
-        * FL_FILE_PVT locks, since they aren't owned by a process, per-se.
+        * FL_OFDLCK locks, since they aren't owned by a process, per-se.
         */
-       if (IS_FILE_PVT(caller_fl))
+       if (IS_OFDLCK(caller_fl))
                return 0;
 
        while ((block_fl = what_owner_is_waiting_for(block_fl))) {
@@ -1391,11 +1391,10 @@ int __break_lease(struct inode *inode, unsigned int mode, unsigned int type)
 
 restart:
        break_time = flock->fl_break_time;
-       if (break_time != 0) {
+       if (break_time != 0)
                break_time -= jiffies;
-               if (break_time == 0)
-                       break_time++;
-       }
+       if (break_time == 0)
+               break_time++;
        locks_insert_block(flock, new_fl);
        spin_unlock(&inode->i_lock);
        error = wait_event_interruptible_timeout(new_fl->fl_wait,
@@ -1891,7 +1890,7 @@ EXPORT_SYMBOL_GPL(vfs_test_lock);
 
 static int posix_lock_to_flock(struct flock *flock, struct file_lock *fl)
 {
-       flock->l_pid = IS_FILE_PVT(fl) ? -1 : fl->fl_pid;
+       flock->l_pid = IS_OFDLCK(fl) ? -1 : fl->fl_pid;
 #if BITS_PER_LONG == 32
        /*
         * Make sure we can represent the posix lock via
@@ -1913,7 +1912,7 @@ static int posix_lock_to_flock(struct flock *flock, struct file_lock *fl)
 #if BITS_PER_LONG == 32
 static void posix_lock_to_flock64(struct flock64 *flock, struct file_lock *fl)
 {
-       flock->l_pid = IS_FILE_PVT(fl) ? -1 : fl->fl_pid;
+       flock->l_pid = IS_OFDLCK(fl) ? -1 : fl->fl_pid;
        flock->l_start = fl->fl_start;
        flock->l_len = fl->fl_end == OFFSET_MAX ? 0 :
                fl->fl_end - fl->fl_start + 1;
@@ -1942,13 +1941,13 @@ int fcntl_getlk(struct file *filp, unsigned int cmd, struct flock __user *l)
        if (error)
                goto out;
 
-       if (cmd == F_GETLKP) {
+       if (cmd == F_OFD_GETLK) {
                error = -EINVAL;
                if (flock.l_pid != 0)
                        goto out;
 
                cmd = F_GETLK;
-               file_lock.fl_flags |= FL_FILE_PVT;
+               file_lock.fl_flags |= FL_OFDLCK;
                file_lock.fl_owner = (fl_owner_t)filp;
        }
 
@@ -2074,25 +2073,25 @@ again:
 
        /*
         * If the cmd is requesting file-private locks, then set the
-        * FL_FILE_PVT flag and override the owner.
+        * FL_OFDLCK flag and override the owner.
         */
        switch (cmd) {
-       case F_SETLKP:
+       case F_OFD_SETLK:
                error = -EINVAL;
                if (flock.l_pid != 0)
                        goto out;
 
                cmd = F_SETLK;
-               file_lock->fl_flags |= FL_FILE_PVT;
+               file_lock->fl_flags |= FL_OFDLCK;
                file_lock->fl_owner = (fl_owner_t)filp;
                break;
-       case F_SETLKPW:
+       case F_OFD_SETLKW:
                error = -EINVAL;
                if (flock.l_pid != 0)
                        goto out;
 
                cmd = F_SETLKW;
-               file_lock->fl_flags |= FL_FILE_PVT;
+               file_lock->fl_flags |= FL_OFDLCK;
                file_lock->fl_owner = (fl_owner_t)filp;
                /* Fallthrough */
        case F_SETLKW:
@@ -2144,13 +2143,13 @@ int fcntl_getlk64(struct file *filp, unsigned int cmd, struct flock64 __user *l)
        if (error)
                goto out;
 
-       if (cmd == F_GETLKP) {
+       if (cmd == F_OFD_GETLK) {
                error = -EINVAL;
                if (flock.l_pid != 0)
                        goto out;
 
                cmd = F_GETLK64;
-               file_lock.fl_flags |= FL_FILE_PVT;
+               file_lock.fl_flags |= FL_OFDLCK;
                file_lock.fl_owner = (fl_owner_t)filp;
        }
 
@@ -2209,25 +2208,25 @@ again:
 
        /*
         * If the cmd is requesting file-private locks, then set the
-        * FL_FILE_PVT flag and override the owner.
+        * FL_OFDLCK flag and override the owner.
         */
        switch (cmd) {
-       case F_SETLKP:
+       case F_OFD_SETLK:
                error = -EINVAL;
                if (flock.l_pid != 0)
                        goto out;
 
                cmd = F_SETLK64;
-               file_lock->fl_flags |= FL_FILE_PVT;
+               file_lock->fl_flags |= FL_OFDLCK;
                file_lock->fl_owner = (fl_owner_t)filp;
                break;
-       case F_SETLKPW:
+       case F_OFD_SETLKW:
                error = -EINVAL;
                if (flock.l_pid != 0)
                        goto out;
 
                cmd = F_SETLKW64;
-               file_lock->fl_flags |= FL_FILE_PVT;
+               file_lock->fl_flags |= FL_OFDLCK;
                file_lock->fl_owner = (fl_owner_t)filp;
                /* Fallthrough */
        case F_SETLKW64:
@@ -2413,8 +2412,8 @@ static void lock_get_status(struct seq_file *f, struct file_lock *fl,
        if (IS_POSIX(fl)) {
                if (fl->fl_flags & FL_ACCESS)
                        seq_printf(f, "ACCESS");
-               else if (IS_FILE_PVT(fl))
-                       seq_printf(f, "FLPVT ");
+               else if (IS_OFDLCK(fl))
+                       seq_printf(f, "OFDLCK");
                else
                        seq_printf(f, "POSIX ");
 
index 39c8ef875f91b5a93b57c8886b56569d679296a3..2c73cae9899d25007818373e11eaec1c8fdb9436 100644 (file)
@@ -654,9 +654,11 @@ static struct rpc_clnt *create_backchannel_client(struct rpc_create_args *args)
 
 static int setup_callback_client(struct nfs4_client *clp, struct nfs4_cb_conn *conn, struct nfsd4_session *ses)
 {
+       int maxtime = max_cb_time(clp->net);
        struct rpc_timeout      timeparms = {
-               .to_initval     = max_cb_time(clp->net),
+               .to_initval     = maxtime,
                .to_retries     = 0,
+               .to_maxval      = maxtime,
        };
        struct rpc_create_args args = {
                .net            = clp->net,
index 2723c1badd01276f9c1802d6cac210aa40f8f0a3..18881f34737ad89e8259042fd33ee5d6a9c26edc 100644 (file)
@@ -3627,14 +3627,6 @@ nfsd4_encode_operation(struct nfsd4_compoundres *resp, struct nfsd4_op *op)
        /* nfsd4_check_resp_size guarantees enough room for error status */
        if (!op->status)
                op->status = nfsd4_check_resp_size(resp, 0);
-       if (op->status == nfserr_resource && nfsd4_has_session(&resp->cstate)) {
-               struct nfsd4_slot *slot = resp->cstate.slot;
-
-               if (slot->sl_flags & NFSD4_SLOT_CACHETHIS)
-                       op->status = nfserr_rep_too_big_to_cache;
-               else
-                       op->status = nfserr_rep_too_big;
-       }
        if (so) {
                so->so_replay.rp_status = op->status;
                so->so_replay.rp_buflen = (char *)resp->p - (char *)(statp+1);
index 3d30eb1fc95e383e50e91605d3526161bcfdebde..9d64679cec73b00fc4685e23d69374ca122fed09 100644 (file)
--- a/fs/open.c
+++ b/fs/open.c
@@ -254,16 +254,21 @@ int do_fallocate(struct file *file, int mode, loff_t offset, loff_t len)
                return -EBADF;
 
        /*
-        * It's not possible to punch hole or perform collapse range
-        * on append only file
+        * We can only allow pure fallocate on append only files
         */
-       if (mode & (FALLOC_FL_PUNCH_HOLE | FALLOC_FL_COLLAPSE_RANGE)
-           && IS_APPEND(inode))
+       if ((mode & ~FALLOC_FL_KEEP_SIZE) && IS_APPEND(inode))
                return -EPERM;
 
        if (IS_IMMUTABLE(inode))
                return -EPERM;
 
+       /*
+        * We can not allow to do any fallocate operation on an active
+        * swapfile
+        */
+       if (IS_SWAPFILE(inode))
+               ret = -ETXTBSY;
+
        /*
         * Revalidate the write permissions, in case security policy has
         * changed since the files were opened.
@@ -286,14 +291,6 @@ int do_fallocate(struct file *file, int mode, loff_t offset, loff_t len)
        if (((offset + len) > inode->i_sb->s_maxbytes) || ((offset + len) < 0))
                return -EFBIG;
 
-       /*
-        * There is no need to overlap collapse range with EOF, in which case
-        * it is effectively a truncate operation
-        */
-       if ((mode & FALLOC_FL_COLLAPSE_RANGE) &&
-           (offset + len >= i_size_read(inode)))
-               return -EINVAL;
-
        if (!file->f_op->fallocate)
                return -EOPNOTSUPP;
 
index e9dc3c3fe159cc2e59bfb27f0beb8bd30e92188b..48377f7463c0d3af6e9a7f521517e3d59fec7409 100644 (file)
@@ -800,7 +800,10 @@ void emergency_remount(void)
 
 static DEFINE_IDA(unnamed_dev_ida);
 static DEFINE_SPINLOCK(unnamed_dev_lock);/* protects the above */
-static int unnamed_dev_start = 0; /* don't bother trying below it */
+/* Many userspace utilities consider an FSID of 0 invalid.
+ * Always return at least 1 from get_anon_bdev.
+ */
+static int unnamed_dev_start = 1;
 
 int get_anon_bdev(dev_t *p)
 {
index 1b8b91b67fdb7a4b192b9568ad1d85defdcd863a..28cc1acd5439bf8caeb6d93e8bf68804ad738b1b 100644 (file)
@@ -453,95 +453,3 @@ void sysfs_remove_bin_file(struct kobject *kobj,
        kernfs_remove_by_name(kobj->sd, attr->attr.name);
 }
 EXPORT_SYMBOL_GPL(sysfs_remove_bin_file);
-
-struct sysfs_schedule_callback_struct {
-       struct list_head        workq_list;
-       struct kobject          *kobj;
-       void                    (*func)(void *);
-       void                    *data;
-       struct module           *owner;
-       struct work_struct      work;
-};
-
-static struct workqueue_struct *sysfs_workqueue;
-static DEFINE_MUTEX(sysfs_workq_mutex);
-static LIST_HEAD(sysfs_workq);
-static void sysfs_schedule_callback_work(struct work_struct *work)
-{
-       struct sysfs_schedule_callback_struct *ss = container_of(work,
-                       struct sysfs_schedule_callback_struct, work);
-
-       (ss->func)(ss->data);
-       kobject_put(ss->kobj);
-       module_put(ss->owner);
-       mutex_lock(&sysfs_workq_mutex);
-       list_del(&ss->workq_list);
-       mutex_unlock(&sysfs_workq_mutex);
-       kfree(ss);
-}
-
-/**
- * sysfs_schedule_callback - helper to schedule a callback for a kobject
- * @kobj: object we're acting for.
- * @func: callback function to invoke later.
- * @data: argument to pass to @func.
- * @owner: module owning the callback code
- *
- * sysfs attribute methods must not unregister themselves or their parent
- * kobject (which would amount to the same thing).  Attempts to do so will
- * deadlock, since unregistration is mutually exclusive with driver
- * callbacks.
- *
- * Instead methods can call this routine, which will attempt to allocate
- * and schedule a workqueue request to call back @func with @data as its
- * argument in the workqueue's process context.  @kobj will be pinned
- * until @func returns.
- *
- * Returns 0 if the request was submitted, -ENOMEM if storage could not
- * be allocated, -ENODEV if a reference to @owner isn't available,
- * -EAGAIN if a callback has already been scheduled for @kobj.
- */
-int sysfs_schedule_callback(struct kobject *kobj, void (*func)(void *),
-               void *data, struct module *owner)
-{
-       struct sysfs_schedule_callback_struct *ss, *tmp;
-
-       if (!try_module_get(owner))
-               return -ENODEV;
-
-       mutex_lock(&sysfs_workq_mutex);
-       list_for_each_entry_safe(ss, tmp, &sysfs_workq, workq_list)
-               if (ss->kobj == kobj) {
-                       module_put(owner);
-                       mutex_unlock(&sysfs_workq_mutex);
-                       return -EAGAIN;
-               }
-       mutex_unlock(&sysfs_workq_mutex);
-
-       if (sysfs_workqueue == NULL) {
-               sysfs_workqueue = create_singlethread_workqueue("sysfsd");
-               if (sysfs_workqueue == NULL) {
-                       module_put(owner);
-                       return -ENOMEM;
-               }
-       }
-
-       ss = kmalloc(sizeof(*ss), GFP_KERNEL);
-       if (!ss) {
-               module_put(owner);
-               return -ENOMEM;
-       }
-       kobject_get(kobj);
-       ss->kobj = kobj;
-       ss->func = func;
-       ss->data = data;
-       ss->owner = owner;
-       INIT_WORK(&ss->work, sysfs_schedule_callback_work);
-       INIT_LIST_HEAD(&ss->workq_list);
-       mutex_lock(&sysfs_workq_mutex);
-       list_add_tail(&ss->workq_list, &sysfs_workq);
-       mutex_unlock(&sysfs_workq_mutex);
-       queue_work(sysfs_workqueue, &ss->work);
-       return 0;
-}
-EXPORT_SYMBOL_GPL(sysfs_schedule_callback);
index 75df77d09f757d4786c889679c35c5cac2ca00b3..0479c32c5eb1703ba0081f21af9b380e5a3c95cb 100644 (file)
@@ -1344,6 +1344,14 @@ __xfs_get_blocks(
        /*
         * If this is O_DIRECT or the mpage code calling tell them how large
         * the mapping is, so that we can avoid repeated get_blocks calls.
+        *
+        * If the mapping spans EOF, then we have to break the mapping up as the
+        * mapping for blocks beyond EOF must be marked new so that sub block
+        * regions can be correctly zeroed. We can't do this for mappings within
+        * EOF unless the mapping was just allocated or is unwritten, otherwise
+        * the callers would overwrite existing data with zeros. Hence we have
+        * to split the mapping into a range up to and including EOF, and a
+        * second mapping for beyond EOF.
         */
        if (direct || size > (1 << inode->i_blkbits)) {
                xfs_off_t               mapping_size;
@@ -1354,6 +1362,12 @@ __xfs_get_blocks(
                ASSERT(mapping_size > 0);
                if (mapping_size > size)
                        mapping_size = size;
+               if (offset < i_size_read(inode) &&
+                   offset + mapping_size >= i_size_read(inode)) {
+                       /* limit mapping to block that spans EOF */
+                       mapping_size = roundup_64(i_size_read(inode) - offset,
+                                                 1 << inode->i_blkbits);
+               }
                if (mapping_size > LONG_MAX)
                        mapping_size = LONG_MAX;
 
@@ -1566,6 +1580,16 @@ xfs_vm_write_failed(
 
                xfs_vm_kill_delalloc_range(inode, block_offset,
                                           block_offset + bh->b_size);
+
+               /*
+                * This buffer does not contain data anymore. make sure anyone
+                * who finds it knows that for certain.
+                */
+               clear_buffer_delay(bh);
+               clear_buffer_uptodate(bh);
+               clear_buffer_mapped(bh);
+               clear_buffer_new(bh);
+               clear_buffer_dirty(bh);
        }
 
 }
@@ -1599,12 +1623,21 @@ xfs_vm_write_begin(
        status = __block_write_begin(page, pos, len, xfs_get_blocks);
        if (unlikely(status)) {
                struct inode    *inode = mapping->host;
+               size_t          isize = i_size_read(inode);
 
                xfs_vm_write_failed(inode, page, pos, len);
                unlock_page(page);
 
-               if (pos + len > i_size_read(inode))
-                       truncate_pagecache(inode, i_size_read(inode));
+               /*
+                * If the write is beyond EOF, we only want to kill blocks
+                * allocated in this write, not blocks that were previously
+                * written successfully.
+                */
+               if (pos + len > isize) {
+                       ssize_t start = max_t(ssize_t, pos, isize);
+
+                       truncate_pagecache_range(inode, start, pos + len);
+               }
 
                page_cache_release(page);
                page = NULL;
@@ -1615,9 +1648,12 @@ xfs_vm_write_begin(
 }
 
 /*
- * On failure, we only need to kill delalloc blocks beyond EOF because they
- * will never be written. For blocks within EOF, generic_write_end() zeros them
- * so they are safe to leave alone and be written with all the other valid data.
+ * On failure, we only need to kill delalloc blocks beyond EOF in the range of
+ * this specific write because they will never be written. Previous writes
+ * beyond EOF where block allocation succeeded do not need to be trashed, so
+ * only new blocks from this write should be trashed. For blocks within
+ * EOF, generic_write_end() zeros them so they are safe to leave alone and be
+ * written with all the other valid data.
  */
 STATIC int
 xfs_vm_write_end(
@@ -1640,8 +1676,11 @@ xfs_vm_write_end(
                loff_t          to = pos + len;
 
                if (to > isize) {
-                       truncate_pagecache(inode, isize);
+                       /* only kill blocks in this write beyond EOF */
+                       if (pos > isize)
+                               isize = pos;
                        xfs_vm_kill_delalloc_range(inode, isize, to);
+                       truncate_pagecache_range(inode, isize, to);
                }
        }
        return ret;
index 5b6092ef51efa9eb6e02c980980c6aa99e486170..f0efc7e970ef10658e01be3def9f4b55de0ac6ab 100644 (file)
@@ -5413,6 +5413,7 @@ xfs_bmap_shift_extents(
        int                             whichfork = XFS_DATA_FORK;
        int                             logflags;
        xfs_filblks_t                   blockcount = 0;
+       int                             total_extents;
 
        if (unlikely(XFS_TEST_ERROR(
            (XFS_IFORK_FORMAT(ip, whichfork) != XFS_DINODE_FMT_EXTENTS &&
@@ -5429,7 +5430,6 @@ xfs_bmap_shift_extents(
        ASSERT(current_ext != NULL);
 
        ifp = XFS_IFORK_PTR(ip, whichfork);
-
        if (!(ifp->if_flags & XFS_IFEXTENTS)) {
                /* Read in all the extents */
                error = xfs_iread_extents(tp, ip, whichfork);
@@ -5456,7 +5456,6 @@ xfs_bmap_shift_extents(
 
        /* We are going to change core inode */
        logflags = XFS_ILOG_CORE;
-
        if (ifp->if_flags & XFS_IFBROOT) {
                cur = xfs_bmbt_init_cursor(mp, tp, ip, whichfork);
                cur->bc_private.b.firstblock = *firstblock;
@@ -5467,8 +5466,14 @@ xfs_bmap_shift_extents(
                logflags |= XFS_ILOG_DEXT;
        }
 
-       while (nexts++ < num_exts &&
-              *current_ext <  XFS_IFORK_NEXTENTS(ip, whichfork)) {
+       /*
+        * There may be delalloc extents in the data fork before the range we
+        * are collapsing out, so we cannot
+        * use the count of real extents here. Instead we have to calculate it
+        * from the incore fork.
+        */
+       total_extents = ifp->if_bytes / sizeof(xfs_bmbt_rec_t);
+       while (nexts++ < num_exts && *current_ext < total_extents) {
 
                gotp = xfs_iext_get_ext(ifp, *current_ext);
                xfs_bmbt_get_all(gotp, &got);
@@ -5556,10 +5561,11 @@ xfs_bmap_shift_extents(
                }
 
                (*current_ext)++;
+               total_extents = ifp->if_bytes / sizeof(xfs_bmbt_rec_t);
        }
 
        /* Check if we are done */
-       if (*current_ext ==  XFS_IFORK_NEXTENTS(ip, whichfork))
+       if (*current_ext == total_extents)
                *done = 1;
 
 del_cursor:
@@ -5568,6 +5574,5 @@ del_cursor:
                        error ? XFS_BTREE_ERROR : XFS_BTREE_NOERROR);
 
        xfs_trans_log_inode(tp, ip, logflags);
-
        return error;
 }
index 01f6a646caa121895265cfe33a7d97860f786a18..296160b8e78c694c811e4e4391a06ced33bb3eef 100644 (file)
@@ -1418,6 +1418,8 @@ xfs_zero_file_space(
        xfs_off_t               end_boundary;
        int                     error;
 
+       trace_xfs_zero_file_space(ip);
+
        granularity = max_t(uint, 1 << mp->m_sb.sb_blocklog, PAGE_CACHE_SIZE);
 
        /*
@@ -1432,9 +1434,18 @@ xfs_zero_file_space(
        ASSERT(end_boundary <= offset + len);
 
        if (start_boundary < end_boundary - 1) {
-               /* punch out the page cache over the conversion range */
+               /*
+                * punch out delayed allocation blocks and the page cache over
+                * the conversion range
+                */
+               xfs_ilock(ip, XFS_ILOCK_EXCL);
+               error = xfs_bmap_punch_delalloc_range(ip,
+                               XFS_B_TO_FSBT(mp, start_boundary),
+                               XFS_B_TO_FSB(mp, end_boundary - start_boundary));
+               xfs_iunlock(ip, XFS_ILOCK_EXCL);
                truncate_pagecache_range(VFS_I(ip), start_boundary,
                                         end_boundary - 1);
+
                /* convert the blocks */
                error = xfs_alloc_file_space(ip, start_boundary,
                                        end_boundary - start_boundary - 1,
index 107f2fdfe41fb9ef0e6941bd60542ee12a0510e3..cb10a0aaab3aa7b55f9a6735cf70500d509843f3 100644 (file)
@@ -1372,21 +1372,29 @@ xfs_buf_iorequest(
                xfs_buf_wait_unpin(bp);
        xfs_buf_hold(bp);
 
-       /* Set the count to 1 initially, this will stop an I/O
+       /*
+        * Set the count to 1 initially, this will stop an I/O
         * completion callout which happens before we have started
         * all the I/O from calling xfs_buf_ioend too early.
         */
        atomic_set(&bp->b_io_remaining, 1);
        _xfs_buf_ioapply(bp);
-       _xfs_buf_ioend(bp, 1);
+       /*
+        * If _xfs_buf_ioapply failed, we'll get back here with
+        * only the reference we took above.  _xfs_buf_ioend will
+        * drop it to zero, so we'd better not queue it for later,
+        * or we'll free it before it's done.
+        */
+       _xfs_buf_ioend(bp, bp->b_error ? 0 : 1);
 
        xfs_buf_rele(bp);
 }
 
 /*
  * Waits for I/O to complete on the buffer supplied.  It returns immediately if
- * no I/O is pending or there is already a pending error on the buffer.  It
- * returns the I/O error code, if any, or 0 if there was no error.
+ * no I/O is pending or there is already a pending error on the buffer, in which
+ * case nothing will ever complete.  It returns the I/O error code, if any, or
+ * 0 if there was no error.
  */
 int
 xfs_buf_iowait(
index 79e96ce987331cad3aab2d0a7513ce19cad2fcb4..951a2321ee010f35c1d3395c09d0830d74197cfd 100644 (file)
@@ -679,7 +679,7 @@ xfs_file_dio_aio_write(
                goto out;
 
        if (mapping->nrpages) {
-               ret = -filemap_write_and_wait_range(VFS_I(ip)->i_mapping,
+               ret = filemap_write_and_wait_range(VFS_I(ip)->i_mapping,
                                                    pos, -1);
                if (ret)
                        goto out;
@@ -841,7 +841,15 @@ xfs_file_fallocate(
                        goto out_unlock;
                }
 
-               ASSERT(offset + len < i_size_read(inode));
+               /*
+                * There is no need to overlap collapse range with EOF,
+                * in which case it is effectively a truncate operation
+                */
+               if (offset + len >= i_size_read(inode)) {
+                       error = -EINVAL;
+                       goto out_unlock;
+               }
+
                new_size = i_size_read(inode) - len;
 
                error = xfs_collapse_file_space(ip, offset, len);
index 5e7a38fa6ee6bd82e43c05f66cdc6d4b8404225e..768087bedbac58f9dea71b8f534c303e65972b42 100644 (file)
@@ -1334,7 +1334,8 @@ int
 xfs_create_tmpfile(
        struct xfs_inode        *dp,
        struct dentry           *dentry,
-       umode_t                 mode)
+       umode_t                 mode,
+       struct xfs_inode        **ipp)
 {
        struct xfs_mount        *mp = dp->i_mount;
        struct xfs_inode        *ip = NULL;
@@ -1402,7 +1403,6 @@ xfs_create_tmpfile(
        xfs_qm_vop_create_dqattach(tp, ip, udqp, gdqp, pdqp);
 
        ip->i_d.di_nlink--;
-       d_tmpfile(dentry, VFS_I(ip));
        error = xfs_iunlink(tp, ip);
        if (error)
                goto out_trans_abort;
@@ -1415,6 +1415,7 @@ xfs_create_tmpfile(
        xfs_qm_dqrele(gdqp);
        xfs_qm_dqrele(pdqp);
 
+       *ipp = ip;
        return 0;
 
  out_trans_abort:
index 396cc1fafd0d5e358c5ea8ccc21d3525d2396bfa..f2fcde52b66db98c26286682796e341bca751b33 100644 (file)
@@ -334,7 +334,7 @@ int         xfs_lookup(struct xfs_inode *dp, struct xfs_name *name,
 int            xfs_create(struct xfs_inode *dp, struct xfs_name *name,
                           umode_t mode, xfs_dev_t rdev, struct xfs_inode **ipp);
 int            xfs_create_tmpfile(struct xfs_inode *dp, struct dentry *dentry,
-                          umode_t mode);
+                          umode_t mode, struct xfs_inode **ipp);
 int            xfs_remove(struct xfs_inode *dp, struct xfs_name *name,
                           struct xfs_inode *ip);
 int            xfs_link(struct xfs_inode *tdp, struct xfs_inode *sip,
index 89b07e43ca28811349db39aa1ab2534de220fd87..ef1ca010f417713358c0d0f3869189121e2f0ff0 100644 (file)
@@ -1053,11 +1053,25 @@ xfs_vn_tmpfile(
        struct dentry   *dentry,
        umode_t         mode)
 {
-       int             error;
+       int                     error;
+       struct xfs_inode        *ip;
+       struct inode            *inode;
 
-       error = xfs_create_tmpfile(XFS_I(dir), dentry, mode);
+       error = xfs_create_tmpfile(XFS_I(dir), dentry, mode, &ip);
+       if (unlikely(error))
+               return -error;
 
-       return -error;
+       inode = VFS_I(ip);
+
+       error = xfs_init_security(inode, dir, &dentry->d_name);
+       if (unlikely(error)) {
+               iput(inode);
+               return -error;
+       }
+
+       d_tmpfile(dentry, inode);
+
+       return 0;
 }
 
 static const struct inode_operations xfs_inode_operations = {
index 8497a00e399d0ba5960117c977376ae4a23cbbb3..08624dc67317185b1e044fd7d67ef4573d941ef6 100644 (file)
@@ -1181,11 +1181,14 @@ xlog_iodone(xfs_buf_t *bp)
        /* log I/O is always issued ASYNC */
        ASSERT(XFS_BUF_ISASYNC(bp));
        xlog_state_done_syncing(iclog, aborted);
+
        /*
-        * do not reference the buffer (bp) here as we could race
-        * with it being freed after writing the unmount record to the
-        * log.
+        * drop the buffer lock now that we are done. Nothing references
+        * the buffer after this, so an unmount waiting on this lock can now
+        * tear it down safely. As such, it is unsafe to reference the buffer
+        * (bp) after the unlock as we could race with it being freed.
         */
+       xfs_buf_unlock(bp);
 }
 
 /*
@@ -1368,8 +1371,16 @@ xlog_alloc_log(
        bp = xfs_buf_alloc(mp->m_logdev_targp, 0, BTOBB(log->l_iclog_size), 0);
        if (!bp)
                goto out_free_log;
-       bp->b_iodone = xlog_iodone;
+
+       /*
+        * The iclogbuf buffer locks are held over IO but we are not going to do
+        * IO yet.  Hence unlock the buffer so that the log IO path can grab it
+        * when appropriately.
+        */
        ASSERT(xfs_buf_islocked(bp));
+       xfs_buf_unlock(bp);
+
+       bp->b_iodone = xlog_iodone;
        log->l_xbuf = bp;
 
        spin_lock_init(&log->l_icloglock);
@@ -1398,6 +1409,9 @@ xlog_alloc_log(
                if (!bp)
                        goto out_free_iclog;
 
+               ASSERT(xfs_buf_islocked(bp));
+               xfs_buf_unlock(bp);
+
                bp->b_iodone = xlog_iodone;
                iclog->ic_bp = bp;
                iclog->ic_data = bp->b_addr;
@@ -1422,7 +1436,6 @@ xlog_alloc_log(
                iclog->ic_callback_tail = &(iclog->ic_callback);
                iclog->ic_datap = (char *)iclog->ic_data + log->l_iclog_hsize;
 
-               ASSERT(xfs_buf_islocked(iclog->ic_bp));
                init_waitqueue_head(&iclog->ic_force_wait);
                init_waitqueue_head(&iclog->ic_write_wait);
 
@@ -1631,6 +1644,12 @@ xlog_cksum(
  * we transition the iclogs to IOERROR state *after* flushing all existing
  * iclogs to disk. This is because we don't want anymore new transactions to be
  * started or completed afterwards.
+ *
+ * We lock the iclogbufs here so that we can serialise against IO completion
+ * during unmount. We might be processing a shutdown triggered during unmount,
+ * and that can occur asynchronously to the unmount thread, and hence we need to
+ * ensure that completes before tearing down the iclogbufs. Hence we need to
+ * hold the buffer lock across the log IO to acheive that.
  */
 STATIC int
 xlog_bdstrat(
@@ -1638,6 +1657,7 @@ xlog_bdstrat(
 {
        struct xlog_in_core     *iclog = bp->b_fspriv;
 
+       xfs_buf_lock(bp);
        if (iclog->ic_state & XLOG_STATE_IOERROR) {
                xfs_buf_ioerror(bp, EIO);
                xfs_buf_stale(bp);
@@ -1645,7 +1665,8 @@ xlog_bdstrat(
                /*
                 * It would seem logical to return EIO here, but we rely on
                 * the log state machine to propagate I/O errors instead of
-                * doing it here.
+                * doing it here. Similarly, IO completion will unlock the
+                * buffer, so we don't do it here.
                 */
                return 0;
        }
@@ -1847,14 +1868,28 @@ xlog_dealloc_log(
        xlog_cil_destroy(log);
 
        /*
-        * always need to ensure that the extra buffer does not point to memory
-        * owned by another log buffer before we free it.
+        * Cycle all the iclogbuf locks to make sure all log IO completion
+        * is done before we tear down these buffers.
         */
+       iclog = log->l_iclog;
+       for (i = 0; i < log->l_iclog_bufs; i++) {
+               xfs_buf_lock(iclog->ic_bp);
+               xfs_buf_unlock(iclog->ic_bp);
+               iclog = iclog->ic_next;
+       }
+
+       /*
+        * Always need to ensure that the extra buffer does not point to memory
+        * owned by another log buffer before we free it. Also, cycle the lock
+        * first to ensure we've completed IO on it.
+        */
+       xfs_buf_lock(log->l_xbuf);
+       xfs_buf_unlock(log->l_xbuf);
        xfs_buf_set_empty(log->l_xbuf, BTOBB(log->l_iclog_size));
        xfs_buf_free(log->l_xbuf);
 
        iclog = log->l_iclog;
-       for (i=0; i<log->l_iclog_bufs; i++) {
+       for (i = 0; i < log->l_iclog_bufs; i++) {
                xfs_buf_free(iclog->ic_bp);
                next_iclog = iclog->ic_next;
                kmem_free(iclog);
index a4ae41c179a8a66a5772914a61642b8a53be1c4b..65d8c793a25cb10c5ded9bfb89fcfda725c58b5f 100644 (file)
@@ -603,6 +603,7 @@ DEFINE_INODE_EVENT(xfs_readlink);
 DEFINE_INODE_EVENT(xfs_inactive_symlink);
 DEFINE_INODE_EVENT(xfs_alloc_file_space);
 DEFINE_INODE_EVENT(xfs_free_file_space);
+DEFINE_INODE_EVENT(xfs_zero_file_space);
 DEFINE_INODE_EVENT(xfs_collapse_file_space);
 DEFINE_INODE_EVENT(xfs_readdir);
 #ifdef CONFIG_XFS_POSIX_ACL
index 5a64ca4621f3f650e3c6718137a8ea549198d171..f23174fb9ec4340378df59b5cc89b43ecf342bec 100644 (file)
@@ -93,5 +93,8 @@ static inline unsigned long virt_to_fix(const unsigned long vaddr)
 #define set_fixmap_io(idx, phys) \
        __set_fixmap(idx, phys, FIXMAP_PAGE_IO)
 
+#define set_fixmap_offset_io(idx, phys) \
+       __set_fixmap_offset(idx, phys, FIXMAP_PAGE_IO)
+
 #endif /* __ASSEMBLY__ */
 #endif /* __ASM_GENERIC_FIXMAP_H */
index 1ec08c198b66a8ed7203b63d4cec3af7dc6424df..a8015a7a55bbd5544d9c81f3c0edad0152c933a5 100644 (file)
@@ -693,24 +693,35 @@ static inline int pmd_numa(pmd_t pmd)
 #ifndef pte_mknonnuma
 static inline pte_t pte_mknonnuma(pte_t pte)
 {
-       pte = pte_clear_flags(pte, _PAGE_NUMA);
-       return pte_set_flags(pte, _PAGE_PRESENT|_PAGE_ACCESSED);
+       pteval_t val = pte_val(pte);
+
+       val &= ~_PAGE_NUMA;
+       val |= (_PAGE_PRESENT|_PAGE_ACCESSED);
+       return __pte(val);
 }
 #endif
 
 #ifndef pmd_mknonnuma
 static inline pmd_t pmd_mknonnuma(pmd_t pmd)
 {
-       pmd = pmd_clear_flags(pmd, _PAGE_NUMA);
-       return pmd_set_flags(pmd, _PAGE_PRESENT|_PAGE_ACCESSED);
+       pmdval_t val = pmd_val(pmd);
+
+       val &= ~_PAGE_NUMA;
+       val |= (_PAGE_PRESENT|_PAGE_ACCESSED);
+
+       return __pmd(val);
 }
 #endif
 
 #ifndef pte_mknuma
 static inline pte_t pte_mknuma(pte_t pte)
 {
-       pte = pte_set_flags(pte, _PAGE_NUMA);
-       return pte_clear_flags(pte, _PAGE_PRESENT);
+       pteval_t val = pte_val(pte);
+
+       val &= ~_PAGE_PRESENT;
+       val |= _PAGE_NUMA;
+
+       return __pte(val);
 }
 #endif
 
@@ -729,8 +740,12 @@ static inline void ptep_set_numa(struct mm_struct *mm, unsigned long addr,
 #ifndef pmd_mknuma
 static inline pmd_t pmd_mknuma(pmd_t pmd)
 {
-       pmd = pmd_set_flags(pmd, _PAGE_NUMA);
-       return pmd_clear_flags(pmd, _PAGE_PRESENT);
+       pmdval_t val = pmd_val(pmd);
+
+       val &= ~_PAGE_PRESENT;
+       val |= _PAGE_NUMA;
+
+       return __pmd(val);
 }
 #endif
 
index d3909effd7256ee1334910f72ab57becccff93f9..94f9ea8abcae35af8ca36560403fbd25facb7c65 100644 (file)
@@ -50,11 +50,7 @@ static inline bool has_zero(unsigned long val, unsigned long *data, const struct
 }
 
 #ifndef zero_bytemask
-#ifdef CONFIG_64BIT
-#define zero_bytemask(mask)    (~0ul << fls64(mask))
-#else
-#define zero_bytemask(mask)    (~0ul << fls(mask))
-#endif /* CONFIG_64BIT */
-#endif /* zero_bytemask */
+#define zero_bytemask(mask) (~1ul << __fls(mask))
+#endif
 
 #endif /* _ASM_WORD_AT_A_TIME_H */
index 0bb34ca2ad2be8983d21ff7ee7e67965fc6292c7..36a5febac2a600927d6915642baf62179ff9266c 100644 (file)
@@ -125,7 +125,6 @@ struct drm_connector_helper_funcs {
        struct drm_encoder *(*best_encoder)(struct drm_connector *connector);
 };
 
-extern int drm_helper_probe_single_connector_modes(struct drm_connector *connector, uint32_t maxX, uint32_t maxY);
 extern void drm_helper_disable_unused_functions(struct drm_device *dev);
 extern int drm_crtc_helper_set_config(struct drm_mode_set *set);
 extern bool drm_crtc_helper_set_mode(struct drm_crtc *crtc,
@@ -161,6 +160,11 @@ static inline void drm_connector_helper_add(struct drm_connector *connector,
 }
 
 extern void drm_helper_resume_force_mode(struct drm_device *dev);
+
+/* drm_probe_helper.c */
+extern int drm_helper_probe_single_connector_modes(struct drm_connector
+                                                  *connector, uint32_t maxX,
+                                                  uint32_t maxY);
 extern void drm_kms_helper_poll_init(struct drm_device *dev);
 extern void drm_kms_helper_poll_fini(struct drm_device *dev);
 extern bool drm_helper_hpd_irq_event(struct drm_device *dev);
index b4f58914bf7d9374342c938ecada9ba52a7c82ae..cfcacec5b89db818efb8346eb1dfd89b16fa2838 100644 (file)
@@ -456,6 +456,10 @@ struct drm_dp_aux_msg {
  * transactions. The drm_dp_aux_register_i2c_bus() function registers an
  * I2C adapter that can be passed to drm_probe_ddc(). Upon removal, drivers
  * should call drm_dp_aux_unregister_i2c_bus() to remove the I2C adapter.
+ *
+ * Note that the aux helper code assumes that the .transfer() function
+ * only modifies the reply field of the drm_dp_aux_msg structure.  The
+ * retry logic and i2c helpers assume this is the case.
  */
 struct drm_dp_aux {
        const char *name;
index 6548a5fbcf4a4854ec3afec3c8d1be5cf19952a1..4d3e935b3f1bc523ac29e685b55c0530ce54f603 100644 (file)
@@ -50,6 +50,7 @@
 #define R8A7790_CLK_SYS_DMAC0          19
 
 /* MSTP3 */
+#define R8A7790_CLK_IIC2               0
 #define R8A7790_CLK_TPU0               4
 #define R8A7790_CLK_MMCIF1             5
 #define R8A7790_CLK_SDHI3              11
@@ -57,6 +58,8 @@
 #define R8A7790_CLK_SDHI1              13
 #define R8A7790_CLK_SDHI0              14
 #define R8A7790_CLK_MMCIF0             15
+#define R8A7790_CLK_IIC0               18
+#define R8A7790_CLK_IIC1               23
 #define R8A7790_CLK_SSUSB              28
 #define R8A7790_CLK_CMT1               29
 #define R8A7790_CLK_USBDMAC0           30
index 30f82f286e295df3423dd6729ef48918c80683c2..602354365819611fc0f8c7982c9398e8067274f0 100644 (file)
@@ -51,6 +51,8 @@
 #define R8A7791_CLK_SDHI1              12
 #define R8A7791_CLK_SDHI0              14
 #define R8A7791_CLK_MMCIF0             15
+#define R8A7791_CLK_IIC0               18
+#define R8A7791_CLK_IIC1               23
 #define R8A7791_CLK_SSUSB              28
 #define R8A7791_CLK_CMT1               29
 #define R8A7791_CLK_USBDMAC0           30
@@ -61,6 +63,7 @@
 #define R8A7791_CLK_PWM                        23
 
 /* MSTP7 */
+#define R8A7791_CLK_EHCI               3
 #define R8A7791_CLK_HSUSB              4
 #define R8A7791_CLK_HSCIF2             13
 #define R8A7791_CLK_SCIF5              14
diff --git a/include/dt-bindings/clock/stih415-clks.h b/include/dt-bindings/clock/stih415-clks.h
new file mode 100644 (file)
index 0000000..0d2c739
--- /dev/null
@@ -0,0 +1,15 @@
+/*
+ * This header provides constants clk index STMicroelectronics
+ * STiH415 SoC.
+ */
+#ifndef _CLK_STIH415
+#define _CLK_STIH415
+
+/* CLOCKGEN A0 */
+#define CLK_ICN_REG            0
+#define CLK_ETH1_PHY           4
+
+/* CLOCKGEN A1 */
+#define CLK_GMAC0_PHY          3
+
+#endif
diff --git a/include/dt-bindings/clock/stih416-clks.h b/include/dt-bindings/clock/stih416-clks.h
new file mode 100644 (file)
index 0000000..552c779
--- /dev/null
@@ -0,0 +1,15 @@
+/*
+ * This header provides constants clk index STMicroelectronics
+ * STiH416 SoC.
+ */
+#ifndef _CLK_STIH416
+#define _CLK_STIH416
+
+/* CLOCKGEN A0 */
+#define CLK_ICN_REG            0
+#define CLK_ETH1_PHY           4
+
+/* CLOCKGEN A1 */
+#define CLK_GMAC0_PHY          3
+
+#endif
index 8c1603b10665d141a2b0cb67e2643c0db7452146..433528ab51611ad684b546f6d9fccaf15de970ca 100644 (file)
@@ -29,7 +29,7 @@
 /* 10 (register bit affects spdif_in and spdif_out) */
 #define TEGRA124_CLK_I2S1 11
 #define TEGRA124_CLK_I2C1 12
-#define TEGRA124_CLK_NDFLASH 13
+/* 13 */
 #define TEGRA124_CLK_SDMMC1 14
 #define TEGRA124_CLK_SDMMC4 15
 /* 16 */
@@ -83,7 +83,7 @@
 
 /* 64 */
 #define TEGRA124_CLK_UARTD 65
-#define TEGRA124_CLK_UARTE 66
+/* 66 */
 #define TEGRA124_CLK_I2C3 67
 #define TEGRA124_CLK_SBC4 68
 #define TEGRA124_CLK_SDMMC3 69
@@ -97,7 +97,7 @@
 #define TEGRA124_CLK_TRACE 77
 #define TEGRA124_CLK_SOC_THERM 78
 #define TEGRA124_CLK_DTV 79
-#define TEGRA124_CLK_NDSPEED 80
+/* 80 */
 #define TEGRA124_CLK_I2CSLOW 81
 #define TEGRA124_CLK_DSIB 82
 #define TEGRA124_CLK_TSEC 83
index c2f8a66913c529995291752ebae773987bbbefad..c2329fe29cf6e0c9e455cb593d96d5444db0bbef 100644 (file)
@@ -22,5 +22,6 @@
 #define STIH415_USB0_SOFTRESET         3
 #define STIH415_USB1_SOFTRESET         4
 #define STIH415_USB2_SOFTRESET         5
+#define STIH415_KEYSCAN_SOFTRESET      6
 
 #endif /* _DT_BINDINGS_RESET_CONTROLLER_STIH415 */
index 2127743f23e371c5b52d47b09da6c59f5c299921..fcf9af1ac0b2ab9420d3b5bdf9d3e50a18058bea 100644 (file)
@@ -46,5 +46,6 @@
 #define STIH416_COMPO_A_SOFTRESET      25
 #define STIH416_VP8_DEC_SOFTRESET      26
 #define STIH416_VTG_MAIN_SOFTRESET     27
+#define STIH416_KEYSCAN_SOFTRESET      28
 
 #endif /* _DT_BINDINGS_RESET_CONTROLLER_STIH416 */
diff --git a/include/dt-bindings/reset/altr,rst-mgr.h b/include/dt-bindings/reset/altr,rst-mgr.h
new file mode 100644 (file)
index 0000000..3f04908
--- /dev/null
@@ -0,0 +1,90 @@
+/*
+ * Copyright (c) 2014, Steffen Trumtrar <s.trumtrar@pengutronix.de>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _DT_BINDINGS_RESET_ALTR_RST_MGR_H
+#define _DT_BINDINGS_RESET_ALTR_RST_MGR_H
+
+/* MPUMODRST */
+#define CPU0_RESET             0
+#define CPU1_RESET             1
+#define WDS_RESET              2
+#define SCUPER_RESET           3
+#define L2_RESET               4
+
+/* PERMODRST */
+#define EMAC0_RESET            32
+#define EMAC1_RESET            33
+#define USB0_RESET             34
+#define USB1_RESET             35
+#define NAND_RESET             36
+#define QSPI_RESET             37
+#define L4WD0_RESET            38
+#define L4WD1_RESET            39
+#define OSC1TIMER0_RESET       40
+#define OSC1TIMER1_RESET       41
+#define SPTIMER0_RESET         42
+#define SPTIMER1_RESET         43
+#define I2C0_RESET             44
+#define I2C1_RESET             45
+#define I2C2_RESET             46
+#define I2C3_RESET             47
+#define UART0_RESET            48
+#define UART1_RESET            49
+#define SPIM0_RESET            50
+#define SPIM1_RESET            51
+#define SPIS0_RESET            52
+#define SPIS1_RESET            53
+#define SDMMC_RESET            54
+#define CAN0_RESET             55
+#define CAN1_RESET             56
+#define GPIO0_RESET            57
+#define GPIO1_RESET            58
+#define GPIO2_RESET            59
+#define DMA_RESET              60
+#define SDR_RESET              61
+
+/* PER2MODRST */
+#define DMAIF0_RESET           64
+#define DMAIF1_RESET           65
+#define DMAIF2_RESET           66
+#define DMAIF3_RESET           67
+#define DMAIF4_RESET           68
+#define DMAIF5_RESET           69
+#define DMAIF6_RESET           70
+#define DMAIF7_RESET           71
+
+/* BRGMODRST */
+#define HPS2FPGA_RESET         96
+#define LWHPS2FPGA_RESET       97
+#define FPGA2HPS_RESET         98
+
+/* MISCMODRST*/
+#define ROM_RESET              128
+#define OCRAM_RESET            129
+#define SYSMGR_RESET           130
+#define SYSMGRCOLD_RESET       131
+#define FPGAMGR_RESET          132
+#define ACPIDMAP_RESET         133
+#define S2F_RESET              134
+#define S2FCOLD_RESET          135
+#define NRSTPIN_RESET          136
+#define TIMESTAMPCOLD_RESET    137
+#define CLKMGRCOLD_RESET       138
+#define SCANMGR_RESET          139
+#define FRZCTRLCOLD_RESET      140
+#define SYSDBG_RESET           141
+#define DBG_RESET              142
+#define TAPCOLD_RESET          143
+#define SDRCOLD_RESET          144
+
+#endif
index a6911ebbd02a024f3dffd028dc3d67fc13c0ef58..de4268d4987acb9ec2c6a4f985845c209d6c5c9c 100644 (file)
@@ -155,6 +155,7 @@ extern void __iomem *at91_pmc_base;
 #define                AT91_PMC_LOCKB          (1 <<  2)               /* PLLB Lock */
 #define                AT91_PMC_MCKRDY         (1 <<  3)               /* Master Clock */
 #define                AT91_PMC_LOCKU          (1 <<  6)               /* UPLL Lock [some SAM9] */
+#define                AT91_PMC_OSCSEL         (1 <<  7)               /* Slow Oscillator Selection [some SAM9] */
 #define                AT91_PMC_PCK0RDY        (1 <<  8)               /* Programmable Clock 0 */
 #define                AT91_PMC_PCK1RDY        (1 <<  9)               /* Programmable Clock 1 */
 #define                AT91_PMC_PCK2RDY        (1 << 10)               /* Programmable Clock 2 */
index 233bbbeb768d6f8c5a6aa32411675a14b3401272..d1d1c055b48e2efa8bbdc692b185eaa16f9619cf 100644 (file)
@@ -566,12 +566,6 @@ extern int __must_check device_create_bin_file(struct device *dev,
                                        const struct bin_attribute *attr);
 extern void device_remove_bin_file(struct device *dev,
                                   const struct bin_attribute *attr);
-extern int device_schedule_callback_owner(struct device *dev,
-               void (*func)(struct device *dev), struct module *owner);
-
-/* This is a macro to avoid include problems with THIS_MODULE */
-#define device_schedule_callback(dev, func)                    \
-       device_schedule_callback_owner(dev, func, THIS_MODULE)
 
 /* device resource management */
 typedef void (*dr_release_t)(struct device *dev, void *res);
@@ -932,10 +926,7 @@ extern int device_online(struct device *dev);
 extern struct device *__root_device_register(const char *name,
                                             struct module *owner);
 
-/*
- * This is a macro to avoid include problems with THIS_MODULE,
- * just as per what is done for device_schedule_callback() above.
- */
+/* This is a macro to avoid include problems with THIS_MODULE */
 #define root_device_register(name) \
        __root_device_register(name, THIS_MODULE)
 
index 262dcbb75ffe3b343ae1513d715e2eae5fd1d902..024fd03e5d182d5670ee2c60005cbea43f8a83e8 100644 (file)
@@ -220,7 +220,6 @@ enum {
        BPF_S_ANC_RXHASH,
        BPF_S_ANC_CPU,
        BPF_S_ANC_ALU_XOR_X,
-       BPF_S_ANC_SECCOMP_LD_W,
        BPF_S_ANC_VLAN_TAG,
        BPF_S_ANC_VLAN_TAG_PRESENT,
        BPF_S_ANC_PAY_OFFSET,
index 7a9c5bca2b7694f5496dbcf793eea2920fd37af9..878031227c57a0b41be7cde3070ee90f1921b570 100644 (file)
@@ -815,7 +815,7 @@ static inline struct file *get_file(struct file *f)
 #define FL_SLEEP       128     /* A blocking lock */
 #define FL_DOWNGRADE_PENDING   256 /* Lease is being downgraded */
 #define FL_UNLOCK_PENDING      512 /* Lease is being broken */
-#define FL_FILE_PVT    1024    /* lock is private to the file */
+#define FL_OFDLCK      1024    /* lock is "owned" by struct file */
 
 /*
  * Special return value from posix_lock_file() and vfs_lock_file() for
index 9212b017bc7236cfc63afe5c268cc741995a1af4..ae9504b4b67d3026cd9c1c1fcd30a8cfc928c984 100644 (file)
@@ -535,6 +535,7 @@ static inline int ftrace_modify_call(struct dyn_ftrace *rec, unsigned long old_a
 extern int ftrace_arch_read_dyn_info(char *buf, int size);
 
 extern int skip_trace(unsigned long ip);
+extern void ftrace_module_init(struct module *mod);
 
 extern void ftrace_disable_daemon(void);
 extern void ftrace_enable_daemon(void);
@@ -544,6 +545,7 @@ static inline int ftrace_force_update(void) { return 0; }
 static inline void ftrace_disable_daemon(void) { }
 static inline void ftrace_enable_daemon(void) { }
 static inline void ftrace_release_mod(struct module *mod) {}
+static inline void ftrace_module_init(struct module *mod) {}
 static inline __init int register_ftrace_command(struct ftrace_func_command *cmd)
 {
        return -EINVAL;
index ab7359fde9879fe5b70b3f4e170d4b5da0f86565..2d7b4f139c32fa31bfbf19baafb3cb9e6bf6e954 100644 (file)
@@ -147,15 +147,17 @@ hv_get_ringbuffer_availbytes(struct hv_ring_buffer_info *rbi,
  * 0 . 13 (Windows Server 2008)
  * 1 . 1  (Windows 7)
  * 2 . 4  (Windows 8)
+ * 3 . 0  (Windows 8 R2)
  */
 
 #define VERSION_WS2008  ((0 << 16) | (13))
 #define VERSION_WIN7    ((1 << 16) | (1))
 #define VERSION_WIN8    ((2 << 16) | (4))
+#define VERSION_WIN8_1    ((3 << 16) | (0))
 
 #define VERSION_INVAL -1
 
-#define VERSION_CURRENT VERSION_WIN8
+#define VERSION_CURRENT VERSION_WIN8_1
 
 /* Make maximum size of pipe payload of 16K */
 #define MAX_PIPE_DATA_PAYLOAD          (sizeof(u8) * 16384)
index c7bfac1c4a7b8f6c82742b4d9f97c058131ae4fc..97ac926c78a707fb6bf45293d00e8f4d86515f43 100644 (file)
@@ -203,7 +203,40 @@ static inline int check_wakeup_irqs(void) { return 0; }
 
 extern cpumask_var_t irq_default_affinity;
 
-extern int irq_set_affinity(unsigned int irq, const struct cpumask *cpumask);
+/* Internal implementation. Use the helpers below */
+extern int __irq_set_affinity(unsigned int irq, const struct cpumask *cpumask,
+                             bool force);
+
+/**
+ * irq_set_affinity - Set the irq affinity of a given irq
+ * @irq:       Interrupt to set affinity
+ * @cpumask:   cpumask
+ *
+ * Fails if cpumask does not contain an online CPU
+ */
+static inline int
+irq_set_affinity(unsigned int irq, const struct cpumask *cpumask)
+{
+       return __irq_set_affinity(irq, cpumask, false);
+}
+
+/**
+ * irq_force_affinity - Force the irq affinity of a given irq
+ * @irq:       Interrupt to set affinity
+ * @cpumask:   cpumask
+ *
+ * Same as irq_set_affinity, but without checking the mask against
+ * online cpus.
+ *
+ * Solely for low level cpu hotplug code, where we need to make per
+ * cpu interrupts affine before the cpu becomes online.
+ */
+static inline int
+irq_force_affinity(unsigned int irq, const struct cpumask *cpumask)
+{
+       return __irq_set_affinity(irq, cpumask, true);
+}
+
 extern int irq_can_set_affinity(unsigned int irq);
 extern int irq_select_affinity(unsigned int irq);
 
index 1f9f56e2885131b1320f6ef1a24e29b45f353dda..76d2acbfa7c69ec1a459d695880d158de75f1ca9 100644 (file)
@@ -237,7 +237,7 @@ int ipmi_set_maintenance_mode(ipmi_user_t user, int mode);
  * The first user that sets this to TRUE will receive all events that
  * have been queued while no one was waiting for events.
  */
-int ipmi_set_gets_events(ipmi_user_t user, int val);
+int ipmi_set_gets_events(ipmi_user_t user, bool val);
 
 /*
  * Called when a new SMI is registered.  This will also be called on
index 8ea3fe0b97598428723615c13a042145685adb99..bd349240d50ecbc5e4b7a116e6c7882933696baf 100644 (file)
@@ -109,12 +109,19 @@ struct ipmi_smi_handlers {
           events from the BMC we are attached to. */
        void (*request_events)(void *send_info);
 
+       /* Called by the upper layer when some user requires that the
+          interface watch for events, received messages, watchdog
+          pretimeouts, or not.  Used by the SMI to know if it should
+          watch for these.  This may be NULL if the SMI does not
+          implement it. */
+       void (*set_need_watch)(void *send_info, bool enable);
+
        /* Called when the interface should go into "run to
           completion" mode.  If this call sets the value to true, the
           interface should make sure that all messages are flushed
           out and that none are pending, and any new requests are run
           to completion immediately. */
-       void (*set_run_to_completion)(void *send_info, int run_to_completion);
+       void (*set_run_to_completion)(void *send_info, bool run_to_completion);
 
        /* Called to poll for work to do.  This is so upper layers can
           poll for operations during things like crash dumps. */
@@ -125,7 +132,7 @@ struct ipmi_smi_handlers {
           setting.  The message handler does the mode handling.  Note
           that this is called from interrupt context, so it cannot
           block. */
-       void (*set_maintenance_mode)(void *send_info, int enable);
+       void (*set_maintenance_mode)(void *send_info, bool enable);
 
        /* Tell the handler that we are using it/not using it.  The
           message handler get the modules that this handler belongs
index d278838908cbc3f1cdac08ae3f3714934f01f188..5c57efb863d08e5937a36e06778efa8047060156 100644 (file)
@@ -394,7 +394,8 @@ extern void remove_percpu_irq(unsigned int irq, struct irqaction *act);
 
 extern void irq_cpu_online(void);
 extern void irq_cpu_offline(void);
-extern int __irq_set_affinity_locked(struct irq_data *data,  const struct cpumask *cpumask);
+extern int irq_set_affinity_locked(struct irq_data *data,
+                                  const struct cpumask *cpumask, bool force);
 
 #if defined(CONFIG_SMP) && defined(CONFIG_GENERIC_PENDING_IRQ)
 void irq_move_irq(struct irq_data *data);
@@ -602,6 +603,8 @@ static inline u32 irq_get_trigger_type(unsigned int irq)
        return d ? irqd_get_trigger_type(d) : 0;
 }
 
+unsigned int arch_dynirq_lower_bound(unsigned int from);
+
 int __irq_alloc_descs(int irq, unsigned int from, unsigned int cnt, int node,
                struct module *owner);
 
index 1de36be64df4d1516a2a451901733d36fd32ec4e..5ab4e3a76721760e4d5a70f88de282a687858990 100644 (file)
@@ -822,6 +822,7 @@ struct ata_port {
        unsigned long           qc_allocated;
        unsigned int            qc_active;
        int                     nr_active_links; /* #links with active qcs */
+       unsigned int            last_tag;       /* track next tag hw expects */
 
        struct ata_link         link;           /* host default link */
        struct ata_link         *slave_link;    /* see ata_slave_link_init() */
index 7c9fe3c2be73a771d53fbf4208832203032cfa07..66c30a763b108c7fe096009b344320fc1c282325 100644 (file)
@@ -17,6 +17,11 @@ struct mdio_gpio_platform_data {
        /* GPIO numbers for bus pins */
        unsigned int mdc;
        unsigned int mdio;
+       unsigned int mdo;
+
+       bool mdc_active_low;
+       bool mdio_active_low;
+       bool mdo_active_low;
 
        unsigned int phy_mask;
        int irqs[PHY_MAX_ADDR];
index 407bdb67fd4f809ac1cc53d5db0de47b901d2424..3406cfb1267a9bbf5bd9cb2294309535e5d74eee 100644 (file)
@@ -179,6 +179,7 @@ enum {
        MLX5_DEV_CAP_FLAG_BAD_QKEY_CNTR = 1LL <<  9,
        MLX5_DEV_CAP_FLAG_APM           = 1LL << 17,
        MLX5_DEV_CAP_FLAG_ATOMIC        = 1LL << 18,
+       MLX5_DEV_CAP_FLAG_BLOCK_MCAST   = 1LL << 23,
        MLX5_DEV_CAP_FLAG_ON_DMND_PG    = 1LL << 24,
        MLX5_DEV_CAP_FLAG_CQ_MODER      = 1LL << 29,
        MLX5_DEV_CAP_FLAG_RESIZE_CQ     = 1LL << 30,
index f829ad80ff28fc38883025c4e06c4247ba908edd..9709b30e2d690da604336a48f96d3757bb7d25c5 100644 (file)
@@ -146,6 +146,7 @@ enum {
 
 enum {
        MLX5_QP_LAT_SENSITIVE   = 1 << 28,
+       MLX5_QP_BLOCK_MCAST     = 1 << 30,
        MLX5_QP_ENABLE_SIG      = 1 << 31,
 };
 
index 8ae1726044c3e90838ea698e026441b44758287d..581603ac127769c5fe87d0b1e5d36eeaab3135f6 100644 (file)
@@ -1,6 +1,6 @@
 /*
  * Copyright © 2010 ST Microelectronics
- * Shiraz Hashim <shiraz.hashim@st.com>
+ * Shiraz Hashim <shiraz.linux.kernel@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
index ec2ffaf418c8e8d31e1cca95fea02a85aa48089f..df78dc2b5524245c68489a8f1d3995ed99379899 100644 (file)
@@ -87,7 +87,6 @@ int nf_ct_gre_keymap_add(struct nf_conn *ct, enum ip_conntrack_dir dir,
 /* delete keymap entries */
 void nf_ct_gre_keymap_destroy(struct nf_conn *ct);
 
-void nf_ct_gre_keymap_flush(struct net *net);
 void nf_nat_need_gre(void);
 
 #endif /* __KERNEL__ */
index 919bf211877db7f4a7212a49700f7a973a2733eb..3bad8d106e0ea01b2ae7524e216c83b4e654ced3 100644 (file)
@@ -374,6 +374,11 @@ static inline struct device_node *of_find_matching_node_and_match(
        return NULL;
 }
 
+static inline struct device_node *of_find_node_by_path(const char *path)
+{
+       return NULL;
+}
+
 static inline struct device_node *of_get_parent(const struct device_node *node)
 {
        return NULL;
index 3f23b4472c3150990237a566ba2d46acb1d1aa82..6404253d810d7482a64fa9e959e99c8bad05c912 100644 (file)
@@ -44,11 +44,16 @@ extern void of_irq_init(const struct of_device_id *matches);
 
 #ifdef CONFIG_OF_IRQ
 extern int of_irq_count(struct device_node *dev);
+extern int of_irq_get(struct device_node *dev, int index);
 #else
 static inline int of_irq_count(struct device_node *dev)
 {
        return 0;
 }
+static inline int of_irq_get(struct device_node *dev, int index)
+{
+       return 0;
+}
 #endif
 
 #if defined(CONFIG_OF)
index 24126c4b27b58e443fe3569fa7143e256466ce84..4d0221fd0688df5d572072d8b9f871a5637ff460 100644 (file)
@@ -75,6 +75,7 @@ typedef enum {
        PHY_INTERFACE_MODE_SMII,
        PHY_INTERFACE_MODE_XGMII,
        PHY_INTERFACE_MODE_MOCA,
+       PHY_INTERFACE_MODE_QSGMII,
        PHY_INTERFACE_MODE_MAX,
 } phy_interface_t;
 
@@ -116,6 +117,8 @@ static inline const char *phy_modes(phy_interface_t interface)
                return "xgmii";
        case PHY_INTERFACE_MODE_MOCA:
                return "moca";
+       case PHY_INTERFACE_MODE_QSGMII:
+               return "qsgmii";
        default:
                return "unknown";
        }
index e2f5ca96cddc521fcc62a868039c8361f4e48997..2760744cb2a75ff59e3d172a6dd864ef42b32106 100644 (file)
@@ -174,21 +174,29 @@ void devm_of_phy_provider_unregister(struct device *dev,
 #else
 static inline int phy_pm_runtime_get(struct phy *phy)
 {
+       if (!phy)
+               return 0;
        return -ENOSYS;
 }
 
 static inline int phy_pm_runtime_get_sync(struct phy *phy)
 {
+       if (!phy)
+               return 0;
        return -ENOSYS;
 }
 
 static inline int phy_pm_runtime_put(struct phy *phy)
 {
+       if (!phy)
+               return 0;
        return -ENOSYS;
 }
 
 static inline int phy_pm_runtime_put_sync(struct phy *phy)
 {
+       if (!phy)
+               return 0;
        return -ENOSYS;
 }
 
@@ -204,21 +212,29 @@ static inline void phy_pm_runtime_forbid(struct phy *phy)
 
 static inline int phy_init(struct phy *phy)
 {
+       if (!phy)
+               return 0;
        return -ENOSYS;
 }
 
 static inline int phy_exit(struct phy *phy)
 {
+       if (!phy)
+               return 0;
        return -ENOSYS;
 }
 
 static inline int phy_power_on(struct phy *phy)
 {
+       if (!phy)
+               return 0;
        return -ENOSYS;
 }
 
 static inline int phy_power_off(struct phy *phy)
 {
+       if (!phy)
+               return 0;
        return -ENOSYS;
 }
 
index b3ca1e94e0c88f1108ddd0065e32b93924531ee3..7819fc787731814bda7c7374cafb657972049030 100644 (file)
@@ -7,23 +7,10 @@
 #ifndef _AT91_ADC_H_
 #define _AT91_ADC_H_
 
-/**
- * struct at91_adc_reg_desc - Various informations relative to registers
- * @channel_base:      Base offset for the channel data registers
- * @drdy_mask:         Mask of the DRDY field in the relevant registers
-                       (Interruptions registers mostly)
- * @status_register:   Offset of the Interrupt Status Register
- * @trigger_register:  Offset of the Trigger setup register
- * @mr_prescal_mask:   Mask of the PRESCAL field in the adc MR register
- * @mr_startup_mask:   Mask of the STARTUP field in the adc MR register
- */
-struct at91_adc_reg_desc {
-       u8      channel_base;
-       u32     drdy_mask;
-       u8      status_register;
-       u8      trigger_register;
-       u32     mr_prescal_mask;
-       u32     mr_startup_mask;
+enum atmel_adc_ts_type {
+       ATMEL_ADC_TOUCHSCREEN_NONE = 0,
+       ATMEL_ADC_TOUCHSCREEN_4WIRE = 4,
+       ATMEL_ADC_TOUCHSCREEN_5WIRE = 5,
 };
 
 /**
@@ -42,23 +29,21 @@ struct at91_adc_trigger {
 /**
  * struct at91_adc_data - platform data for ADC driver
  * @channels_used:             channels in use on the board as a bitmask
- * @num_channels:              global number of channels available on the board
- * @registers:                 Registers definition on the board
  * @startup_time:              startup time of the ADC in microseconds
  * @trigger_list:              Triggers available in the ADC
  * @trigger_number:            Number of triggers available in the ADC
  * @use_external_triggers:     does the board has external triggers availables
  * @vref:                      Reference voltage for the ADC in millivolts
+ * @touchscreen_type:          If a touchscreen is connected, its type (4 or 5 wires)
  */
 struct at91_adc_data {
        unsigned long                   channels_used;
-       u8                              num_channels;
-       struct at91_adc_reg_desc        *registers;
        u8                              startup_time;
        struct at91_adc_trigger         *trigger_list;
        u8                              trigger_number;
        bool                            use_external_triggers;
        u16                             vref;
+       enum atmel_adc_ts_type          touchscreen_type;
 };
 
 extern void __init at91_add_device_adc(struct at91_adc_data *data);
index e26b0c14edea9c0864e6ebc4178537dc7a8eee75..1466443797d74a96214e803b95dc397f86319fc4 100644 (file)
@@ -87,13 +87,6 @@ struct atmel_uart_data {
        int                     rts_gpio;       /* optional RTS GPIO */
 };
 
- /* Touchscreen Controller */
-struct at91_tsadcc_data {
-       unsigned int    adc_clock;
-       u8              pendet_debounce;
-       u8              ts_sample_hold_time;
-};
-
 /* CAN */
 struct at91_can_data {
        void (*transceiver_switch)(int on);
index 9e7db9e73cc13ffc04d05b02c9c5ea0d877be7e9..48bf152761c7a3f27647609c6f83072989888c4b 100644 (file)
@@ -20,13 +20,13 @@ enum reboot_mode {
 extern enum reboot_mode reboot_mode;
 
 enum reboot_type {
-       BOOT_TRIPLE = 't',
-       BOOT_KBD = 'k',
-       BOOT_BIOS = 'b',
-       BOOT_ACPI = 'a',
-       BOOT_EFI = 'e',
-       BOOT_CF9 = 'p',
-       BOOT_CF9_COND = 'q',
+       BOOT_TRIPLE     = 't',
+       BOOT_KBD        = 'k',
+       BOOT_BIOS       = 'b',
+       BOOT_ACPI       = 'a',
+       BOOT_EFI        = 'e',
+       BOOT_CF9_FORCE  = 'p',
+       BOOT_CF9_SAFE   = 'q',
 };
 extern enum reboot_type reboot_type;
 
index e530681bea7049cfa818e66acea0bf863952d281..1a4a8c157b31a7eb8cf3e9c1bedba8ab64354542 100644 (file)
@@ -258,14 +258,14 @@ regulator_get_exclusive(struct device *dev, const char *id)
 static inline struct regulator *__must_check
 regulator_get_optional(struct device *dev, const char *id)
 {
-       return NULL;
+       return ERR_PTR(-ENODEV);
 }
 
 
 static inline struct regulator *__must_check
 devm_regulator_get_optional(struct device *dev, const char *id)
 {
-       return NULL;
+       return ERR_PTR(-ENODEV);
 }
 
 static inline void regulator_put(struct regulator *regulator)
index 36aac733840afc1b71deee284cfaf78b973aa673..9f779c7a2da467c7945cff496e7609a3a16bd71a 100644 (file)
@@ -23,6 +23,7 @@ struct serio {
 
        char name[32];
        char phys[32];
+       char firmware_id[128];
 
        bool manual_bind;
 
index 084354b0e81451c651120afebdc75dfbaaec02f8..5ffaa3443712823a3f24acce437a328e24e86fa9 100644 (file)
@@ -179,9 +179,6 @@ struct sysfs_ops {
 
 #ifdef CONFIG_SYSFS
 
-int sysfs_schedule_callback(struct kobject *kobj, void (*func)(void *),
-                           void *data, struct module *owner);
-
 int __must_check sysfs_create_dir_ns(struct kobject *kobj, const void *ns);
 void sysfs_remove_dir(struct kobject *kobj);
 int __must_check sysfs_rename_dir_ns(struct kobject *kobj, const char *new_name,
@@ -255,12 +252,6 @@ static inline void sysfs_enable_ns(struct kernfs_node *kn)
 
 #else /* CONFIG_SYSFS */
 
-static inline int sysfs_schedule_callback(struct kobject *kobj,
-               void (*func)(void *), void *data, struct module *owner)
-{
-       return -ENOSYS;
-}
-
 static inline int sysfs_create_dir_ns(struct kobject *kobj, const void *ns)
 {
        return 0;
index 1c3316a47d7e0386d1ede163c4f795275efc8130..036cccd80d9ffa0c6c1a356fff4a53418643b7ae 100644 (file)
@@ -61,6 +61,7 @@ struct tty_bufhead {
        struct tty_buffer *head;        /* Queue head */
        struct work_struct work;
        struct mutex       lock;
+       spinlock_t         flush_lock;
        atomic_t           priority;
        struct tty_buffer sentinel;
        struct llist_head free;         /* Free queue head */
index e7d9d9ed14f56252e5efe0a529e80f4dd050e1ab..bd68819f081592b57a4a2fc74ce62c3af7df3b13 100644 (file)
@@ -191,11 +191,23 @@ wait_queue_head_t *bit_waitqueue(void *, int);
        (!__builtin_constant_p(state) ||                                \
                state == TASK_INTERRUPTIBLE || state == TASK_KILLABLE)  \
 
+/*
+ * The below macro ___wait_event() has an explicit shadow of the __ret
+ * variable when used from the wait_event_*() macros.
+ *
+ * This is so that both can use the ___wait_cond_timeout() construct
+ * to wrap the condition.
+ *
+ * The type inconsistency of the wait_event_*() __ret variable is also
+ * on purpose; we use long where we can return timeout values and int
+ * otherwise.
+ */
+
 #define ___wait_event(wq, condition, state, exclusive, ret, cmd)       \
 ({                                                                     \
        __label__ __out;                                                \
        wait_queue_t __wait;                                            \
-       long __ret = ret;                                               \
+       long __ret = ret;       /* explicit shadow */                   \
                                                                        \
        INIT_LIST_HEAD(&__wait.task_list);                              \
        if (exclusive)                                                  \
index 46ed958e0c6ef2ffc7142a3739c985382f9a97cf..71c60f42be486b71d3f01d7e128a77101ada6432 100644 (file)
@@ -45,7 +45,7 @@ struct dst_entry {
        void                    *__pad1;
 #endif
        int                     (*input)(struct sk_buff *);
-       int                     (*output)(struct sk_buff *);
+       int                     (*output)(struct sock *sk, struct sk_buff *skb);
 
        unsigned short          flags;
 #define DST_HOST               0x0001
@@ -367,7 +367,11 @@ static inline struct dst_entry *skb_dst_pop(struct sk_buff *skb)
        return child;
 }
 
-int dst_discard(struct sk_buff *skb);
+int dst_discard_sk(struct sock *sk, struct sk_buff *skb);
+static inline int dst_discard(struct sk_buff *skb)
+{
+       return dst_discard_sk(skb->sk, skb);
+}
 void *dst_alloc(struct dst_ops *ops, struct net_device *dev, int initial_ref,
                int initial_obsolete, unsigned short flags);
 void __dst_free(struct dst_entry *dst);
@@ -449,9 +453,13 @@ static inline void dst_set_expires(struct dst_entry *dst, int timeout)
 }
 
 /* Output packet to network from transport.  */
+static inline int dst_output_sk(struct sock *sk, struct sk_buff *skb)
+{
+       return skb_dst(skb)->output(sk, skb);
+}
 static inline int dst_output(struct sk_buff *skb)
 {
-       return skb_dst(skb)->output(skb);
+       return dst_output_sk(skb->sk, skb);
 }
 
 /* Input packet from network to transport.  */
index 64fd24836650b7ea14a5c6ba8278066bbb21bf0d..8109a159d1b3ba5ced3aa6d2bc10b9f01d274520 100644 (file)
 #include <linux/in6.h>
 #include <linux/atomic.h>
 
+/*
+ * ifindex generation is per-net namespace, and loopback is
+ * always the 1st device in ns (see net_dev_init), thus any
+ * loopback device should get ifindex 1
+ */
+
+#define LOOPBACK_IFINDEX       1
+
 struct flowi_common {
        int     flowic_oif;
        int     flowic_iif;
@@ -80,7 +88,7 @@ static inline void flowi4_init_output(struct flowi4 *fl4, int oif,
                                      __be16 dport, __be16 sport)
 {
        fl4->flowi4_oif = oif;
-       fl4->flowi4_iif = 0;
+       fl4->flowi4_iif = LOOPBACK_IFINDEX;
        fl4->flowi4_mark = mark;
        fl4->flowi4_tos = tos;
        fl4->flowi4_scope = scope;
index f981ba7adeed4c5dbaba8d5e662768d3503bfec7..74af137304bea4e8aec720d69f7f6ca2c64b0b94 100644 (file)
@@ -40,7 +40,7 @@ void inet6_csk_reqsk_queue_hash_add(struct sock *sk, struct request_sock *req,
 
 void inet6_csk_addr2sockaddr(struct sock *sk, struct sockaddr *uaddr);
 
-int inet6_csk_xmit(struct sk_buff *skb, struct flowi *fl);
+int inet6_csk_xmit(struct sock *sk, struct sk_buff *skb, struct flowi *fl);
 
 struct dst_entry *inet6_csk_update_pmtu(struct sock *sk, u32 mtu);
 #endif /* _INET6_CONNECTION_SOCK_H */
index c55aeed41acea4ce12b49b2d77862a4cf609363a..7a4313887568796546e5382581fa8bca773c1f27 100644 (file)
@@ -36,7 +36,7 @@ struct tcp_congestion_ops;
  * (i.e. things that depend on the address family)
  */
 struct inet_connection_sock_af_ops {
-       int         (*queue_xmit)(struct sk_buff *skb, struct flowi *fl);
+       int         (*queue_xmit)(struct sock *sk, struct sk_buff *skb, struct flowi *fl);
        void        (*send_check)(struct sock *sk, struct sk_buff *skb);
        int         (*rebuild_header)(struct sock *sk);
        void        (*sk_rx_dst_set)(struct sock *sk, const struct sk_buff *skb);
index 25064c28e059e2e42d46dcaf3209a2ff517a7a82..3ec2b0fb9d8395384373917691f49c433262a8db 100644 (file)
@@ -104,14 +104,19 @@ int ip_rcv(struct sk_buff *skb, struct net_device *dev, struct packet_type *pt,
           struct net_device *orig_dev);
 int ip_local_deliver(struct sk_buff *skb);
 int ip_mr_input(struct sk_buff *skb);
-int ip_output(struct sk_buff *skb);
-int ip_mc_output(struct sk_buff *skb);
+int ip_output(struct sock *sk, struct sk_buff *skb);
+int ip_mc_output(struct sock *sk, struct sk_buff *skb);
 int ip_fragment(struct sk_buff *skb, int (*output)(struct sk_buff *));
 int ip_do_nat(struct sk_buff *skb);
 void ip_send_check(struct iphdr *ip);
 int __ip_local_out(struct sk_buff *skb);
-int ip_local_out(struct sk_buff *skb);
-int ip_queue_xmit(struct sk_buff *skb, struct flowi *fl);
+int ip_local_out_sk(struct sock *sk, struct sk_buff *skb);
+static inline int ip_local_out(struct sk_buff *skb)
+{
+       return ip_local_out_sk(skb->sk, skb);
+}
+
+int ip_queue_xmit(struct sock *sk, struct sk_buff *skb, struct flowi *fl);
 void ip_init(void);
 int ip_append_data(struct sock *sk, struct flowi4 *fl4,
                   int getfrag(void *from, char *to, int offset, int len,
index 3c3bb184eb8f154b61c9f93fd5ea37ffefadeba8..6c4f5eac98e7be133af4b868507f0d217ac05c1b 100644 (file)
@@ -32,6 +32,11 @@ struct route_info {
 #define RT6_LOOKUP_F_SRCPREF_PUBLIC    0x00000010
 #define RT6_LOOKUP_F_SRCPREF_COA       0x00000020
 
+/* We do not (yet ?) support IPv6 jumbograms (RFC 2675)
+ * Unlike IPv4, hdr->seg_len doesn't include the IPv6 header
+ */
+#define IP6_MAX_MTU (0xFFFF + sizeof(struct ipv6hdr))
+
 /*
  * rt6_srcprefs2flags() and rt6_flags2srcprefs() translate
  * between IPV6_ADDR_PREFERENCES socket option values
index e77c10405d515da16071461fe9f7385d8ac08556..a4daf9eb856285a2b7c831ee04d4e75a39957142 100644 (file)
@@ -153,7 +153,7 @@ static inline u8 ip_tunnel_ecn_encap(u8 tos, const struct iphdr *iph,
 }
 
 int iptunnel_pull_header(struct sk_buff *skb, int hdr_len, __be16 inner_proto);
-int iptunnel_xmit(struct rtable *rt, struct sk_buff *skb,
+int iptunnel_xmit(struct sock *sk, struct rtable *rt, struct sk_buff *skb,
                  __be32 src, __be32 dst, __u8 proto,
                  __u8 tos, __u8 ttl, __be16 df, bool xnet);
 
index 4f541f11ce632004ceaf9d461aeca80ece03dc9d..d640925bc4543bdfb30bf15d164bececbda7e798 100644 (file)
@@ -731,7 +731,7 @@ struct dst_entry *ip6_blackhole_route(struct net *net,
  *     skb processing functions
  */
 
-int ip6_output(struct sk_buff *skb);
+int ip6_output(struct sock *sk, struct sk_buff *skb);
 int ip6_forward(struct sk_buff *skb);
 int ip6_input(struct sk_buff *skb);
 int ip6_mc_input(struct sk_buff *skb);
index 79387f73f87585101ff44f548c5db299ae0b574c..5f9eb260990f6507d61f42d2463d45455346e812 100644 (file)
@@ -9,6 +9,7 @@
 #include <linux/list.h>
 #include <linux/sysctl.h>
 
+#include <net/flow.h>
 #include <net/netns/core.h>
 #include <net/netns/mib.h>
 #include <net/netns/unix.h>
@@ -131,14 +132,6 @@ struct net {
        atomic_t                fnhe_genid;
 };
 
-/*
- * ifindex generation is per-net namespace, and loopback is
- * always the 1st device in ns (see net_dev_init), thus any
- * loopback device should get ifindex 1
- */
-
-#define LOOPBACK_IFINDEX       1
-
 #include <linux/seq_file_net.h>
 
 /* Init's network namespace */
index cf2b7ae2b9d82b11cfa7a810130187e2c763881a..a75fc8e27cd698483232a3f3a379efc76308a905 100644 (file)
@@ -13,6 +13,16 @@ struct nft_cmp_fast_expr {
        u8                      len;
 };
 
+/* Calculate the mask for the nft_cmp_fast expression. On big endian the
+ * mask needs to include the *upper* bytes when interpreting that data as
+ * something smaller than the full u32, therefore a cpu_to_le32 is done.
+ */
+static inline u32 nft_cmp_fast_mask(unsigned int len)
+{
+       return cpu_to_le32(~0U >> (FIELD_SIZEOF(struct nft_cmp_fast_expr,
+                                               data) * BITS_PER_BYTE - len));
+}
+
 extern const struct nft_expr_ops nft_cmp_fast_ops;
 
 int nft_cmp_module_init(void);
index 6ee76c804893fc9f291a469550b2356fe1b93c39..0dfcc92600e86cd3263a7378b613d8a3e81ff767 100644 (file)
@@ -1241,6 +1241,7 @@ struct sctp_endpoint {
        /* SCTP-AUTH: endpoint shared keys */
        struct list_head endpoint_shared_keys;
        __u16 active_key_id;
+       __u8  auth_enable;
 };
 
 /* Recover the outter endpoint structure. */
@@ -1269,7 +1270,8 @@ struct sctp_endpoint *sctp_endpoint_is_match(struct sctp_endpoint *,
 int sctp_has_association(struct net *net, const union sctp_addr *laddr,
                         const union sctp_addr *paddr);
 
-int sctp_verify_init(struct net *net, const struct sctp_association *asoc,
+int sctp_verify_init(struct net *net, const struct sctp_endpoint *ep,
+                    const struct sctp_association *asoc,
                     sctp_cid_t, sctp_init_chunk_t *peer_init,
                     struct sctp_chunk *chunk, struct sctp_chunk **err_chunk);
 int sctp_process_init(struct sctp_association *, struct sctp_chunk *chunk,
@@ -1653,6 +1655,17 @@ struct sctp_association {
        /* This is the last advertised value of rwnd over a SACK chunk. */
        __u32 a_rwnd;
 
+       /* Number of bytes by which the rwnd has slopped.  The rwnd is allowed
+        * to slop over a maximum of the association's frag_point.
+        */
+       __u32 rwnd_over;
+
+       /* Keeps treack of rwnd pressure.  This happens when we have
+        * a window, but not recevie buffer (i.e small packets).  This one
+        * is releases slowly (1 PMTU at a time ).
+        */
+       __u32 rwnd_press;
+
        /* This is the sndbuf size in use for the association.
         * This corresponds to the sndbuf size for the association,
         * as specified in the sk->sndbuf.
@@ -1881,7 +1894,8 @@ void sctp_assoc_update(struct sctp_association *old,
 __u32 sctp_association_get_next_tsn(struct sctp_association *);
 
 void sctp_assoc_sync_pmtu(struct sock *, struct sctp_association *);
-void sctp_assoc_rwnd_update(struct sctp_association *, bool);
+void sctp_assoc_rwnd_increase(struct sctp_association *, unsigned int);
+void sctp_assoc_rwnd_decrease(struct sctp_association *, unsigned int);
 void sctp_assoc_set_primary(struct sctp_association *,
                            struct sctp_transport *);
 void sctp_assoc_del_nonprimary_peers(struct sctp_association *,
index 32682ae47b3fe6d88e7750120089efc791b38894..116e9c7e19cbbe00272bbf4adc6de7681b0c27ee 100644 (file)
@@ -333,7 +333,7 @@ struct xfrm_state_afinfo {
                                                const xfrm_address_t *saddr);
        int                     (*tmpl_sort)(struct xfrm_tmpl **dst, struct xfrm_tmpl **src, int n);
        int                     (*state_sort)(struct xfrm_state **dst, struct xfrm_state **src, int n);
-       int                     (*output)(struct sk_buff *skb);
+       int                     (*output)(struct sock *sk, struct sk_buff *skb);
        int                     (*output_finish)(struct sk_buff *skb);
        int                     (*extract_input)(struct xfrm_state *x,
                                                 struct sk_buff *skb);
@@ -1540,7 +1540,7 @@ static inline int xfrm4_rcv_spi(struct sk_buff *skb, int nexthdr, __be32 spi)
 
 int xfrm4_extract_output(struct xfrm_state *x, struct sk_buff *skb);
 int xfrm4_prepare_output(struct xfrm_state *x, struct sk_buff *skb);
-int xfrm4_output(struct sk_buff *skb);
+int xfrm4_output(struct sock *sk, struct sk_buff *skb);
 int xfrm4_output_finish(struct sk_buff *skb);
 int xfrm4_rcv_cb(struct sk_buff *skb, u8 protocol, int err);
 int xfrm4_protocol_register(struct xfrm4_protocol *handler, unsigned char protocol);
@@ -1565,7 +1565,7 @@ __be32 xfrm6_tunnel_alloc_spi(struct net *net, xfrm_address_t *saddr);
 __be32 xfrm6_tunnel_spi_lookup(struct net *net, const xfrm_address_t *saddr);
 int xfrm6_extract_output(struct xfrm_state *x, struct sk_buff *skb);
 int xfrm6_prepare_output(struct xfrm_state *x, struct sk_buff *skb);
-int xfrm6_output(struct sk_buff *skb);
+int xfrm6_output(struct sock *sk, struct sk_buff *skb);
 int xfrm6_output_finish(struct sk_buff *skb);
 int xfrm6_find_1stfragopt(struct xfrm_state *x, struct sk_buff *skb,
                          u8 **prevhdr);
index 010ea89eeb0e407a85a052e6b8905dedb6ac5991..6a1a0245474feee8f32fe040e56f0044f53a20f4 100644 (file)
@@ -16,15 +16,6 @@ struct mpage_da_data;
 struct ext4_map_blocks;
 struct extent_status;
 
-/* shim until we merge in the xfs_collapse_range branch */
-#ifndef FALLOC_FL_COLLAPSE_RANGE
-#define FALLOC_FL_COLLAPSE_RANGE       0x08
-#endif
-
-#ifndef FALLOC_FL_ZERO_RANGE
-#define FALLOC_FL_ZERO_RANGE           0x10
-#endif
-
 #define EXT4_I(inode) (container_of(inode, struct ext4_inode_info, vfs_inode))
 
 #define show_mballoc_flags(flags) __print_flags(flags, "|",    \
index 11fd51b413de25a6a2415c1724dee458d3314ddc..ed0b2c599a64f7d701117bf54ba6a4dcd56edb31 100644 (file)
@@ -25,7 +25,7 @@ struct module;
        { (1UL << TAINT_OOT_MODULE),            "O" },          \
        { (1UL << TAINT_FORCED_MODULE),         "F" },          \
        { (1UL << TAINT_CRAP),                  "C" },          \
-       { (1UL << TAINT_UNSIGNED_MODULE),       "X" })
+       { (1UL << TAINT_UNSIGNED_MODULE),       "E" })
 
 TRACE_EVENT(module_load,
 
index a9b13f8b3595107579ca6ea20421d53a9dd15017..7543b3e51331fcb38574e3f309713b3a6a2d31c0 100644 (file)
 #endif
 
 /*
- * fd "private" POSIX locks.
+ * Open File Description Locks
  *
- * Usually POSIX locks held by a process are released on *any* close and are
+ * Usually record locks held by a process are released on *any* close and are
  * not inherited across a fork().
  *
- * These cmd values will set locks that conflict with normal POSIX locks, but
- * are "owned" by the opened file, not the process. This means that they are
- * inherited across fork() like BSD (flock) locks, and they are only released
- * automatically when the last reference to the the open file against which
- * they were acquired is put.
+ * These cmd values will set locks that conflict with process-associated
+ * record  locks, but are "owned" by the open file description, not the
+ * process. This means that they are inherited across fork() like BSD (flock)
+ * locks, and they are only released automatically when the last reference to
+ * the the open file against which they were acquired is put.
  */
-#define F_GETLKP       36
-#define F_SETLKP       37
-#define F_SETLKPW      38
+#define F_OFD_GETLK    36
+#define F_OFD_SETLK    37
+#define F_OFD_SETLKW   38
 
 #define F_OWNER_TID    0
 #define F_OWNER_PID    1
index b042b48495d9a679dd0857d33e7d2bd377f7c5b1..b75482112428afa8eaab6cd266f3221d8decab28 100644 (file)
@@ -120,7 +120,6 @@ struct drm_tegra_submit {
        __u32 num_waitchks;
        __u32 waitchk_mask;
        __u32 timeout;
-       __u32 pad;
        __u64 syncpts;
        __u64 cmdbufs;
        __u64 relocs;
index 9beb7c991638ad90d235a0221e6d30d3b7fc2292..78e4a86030dd2d295a1abba8ad6249668fdf7fef 100644 (file)
@@ -305,6 +305,7 @@ enum hv_kvp_exchg_pool {
 #define HV_ERROR_DEVICE_NOT_CONNECTED  0x8007048F
 #define HV_INVALIDARG                  0x80070057
 #define HV_GUID_NOTFOUND               0x80041002
+#define HV_ERROR_ALREADY_EXISTS                0x80070050
 
 #define ADDR_FAMILY_NONE       0x00
 #define ADDR_FAMILY_IPV4       0x01
index bd24470d24a2c7a3145af21094e03f67b7ce0761..f4849525519c7a301f4202f68a8eea9fb0e9d296 100644 (file)
@@ -164,6 +164,7 @@ struct input_keymap_entry {
 #define INPUT_PROP_DIRECT              0x01    /* direct input devices */
 #define INPUT_PROP_BUTTONPAD           0x02    /* has button(s) under pad */
 #define INPUT_PROP_SEMI_MT             0x03    /* touch rectangle only */
+#define INPUT_PROP_TOPBUTTONPAD                0x04    /* softbuttons at top of pad */
 
 #define INPUT_PROP_MAX                 0x1f
 #define INPUT_PROP_CNT                 (INPUT_PROP_MAX + 1)
index 765018c24cf9b0964fc3d21aa7e92fce6e5fdd10..9d3585bb2a7a3cbb58234d24761f597b0af95c7c 100644 (file)
@@ -1646,6 +1646,18 @@ config MMAP_ALLOW_UNINITIALIZED
 
          See Documentation/nommu-mmap.txt for more information.
 
+config SYSTEM_TRUSTED_KEYRING
+       bool "Provide system-wide ring of trusted keys"
+       depends on KEYS
+       help
+         Provide a system keyring to which trusted keys can be added.  Keys in
+         the keyring are considered to be trusted.  Keys may be added at will
+         by the kernel from compiled-in data and from hardware key stores, but
+         userspace may only add extra keys if those keys can be verified by
+         keys already in the keyring.
+
+         Keys in this keyring are used by module signature checking.
+
 config PROFILING
        bool "Profiling support"
        help
@@ -1681,18 +1693,6 @@ config BASE_SMALL
        default 0 if BASE_FULL
        default 1 if !BASE_FULL
 
-config SYSTEM_TRUSTED_KEYRING
-       bool "Provide system-wide ring of trusted keys"
-       depends on KEYS
-       help
-         Provide a system keyring to which trusted keys can be added.  Keys in
-         the keyring are considered to be trusted.  Keys may be added at will
-         by the kernel from compiled-in data and from hardware key stores, but
-         userspace may only add extra keys if those keys can be verified by
-         keys already in the keyring.
-
-         Keys in this keyring are used by module signature checking.
-
 menuconfig MODULES
        bool "Enable loadable module support"
        option modules
index d55092ceee2975c204bcb90e856f9b6504d577ac..6b715c0af1b117b5b61bd32629a00845f0313557 100644 (file)
@@ -234,6 +234,11 @@ again:
                        goto again;
                }
                timer->base = new_base;
+       } else {
+               if (cpu != this_cpu && hrtimer_check_target(timer, new_base)) {
+                       cpu = this_cpu;
+                       goto again;
+               }
        }
        return new_base;
 }
@@ -569,6 +574,23 @@ hrtimer_force_reprogram(struct hrtimer_cpu_base *cpu_base, int skip_equal)
 
        cpu_base->expires_next.tv64 = expires_next.tv64;
 
+       /*
+        * If a hang was detected in the last timer interrupt then we
+        * leave the hang delay active in the hardware. We want the
+        * system to make progress. That also prevents the following
+        * scenario:
+        * T1 expires 50ms from now
+        * T2 expires 5s from now
+        *
+        * T1 is removed, so this code is called and would reprogram
+        * the hardware to 5s from now. Any hrtimer_start after that
+        * will not reprogram the hardware due to hang_detected being
+        * set. So we'd effectivly block all timers until the T2 event
+        * fires.
+        */
+       if (cpu_base->hang_detected)
+               return;
+
        if (cpu_base->expires_next.tv64 != KTIME_MAX)
                tick_program_event(cpu_base->expires_next, 1);
 }
index a7174617616ba6b8f404a1c3f01cf8b7dd90cb4d..bb07f2928f4b9c2ca33803f712c8889ca5823907 100644 (file)
@@ -363,6 +363,13 @@ __irq_alloc_descs(int irq, unsigned int from, unsigned int cnt, int node,
                if (from > irq)
                        return -EINVAL;
                from = irq;
+       } else {
+               /*
+                * For interrupts which are freely allocated the
+                * architecture can force a lower bound to the @from
+                * argument. x86 uses this to exclude the GSI space.
+                */
+               from = arch_dynirq_lower_bound(from);
        }
 
        mutex_lock(&sparse_irq_lock);
index 2486a4c1a710ba057c7f884faae19bff1fc6d31c..d34131ca372baee79aa17ca2670cde5ff32a2cc8 100644 (file)
@@ -180,7 +180,7 @@ int irq_do_set_affinity(struct irq_data *data, const struct cpumask *mask,
        struct irq_chip *chip = irq_data_get_irq_chip(data);
        int ret;
 
-       ret = chip->irq_set_affinity(data, mask, false);
+       ret = chip->irq_set_affinity(data, mask, force);
        switch (ret) {
        case IRQ_SET_MASK_OK:
                cpumask_copy(data->affinity, mask);
@@ -192,7 +192,8 @@ int irq_do_set_affinity(struct irq_data *data, const struct cpumask *mask,
        return ret;
 }
 
-int __irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask)
+int irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask,
+                           bool force)
 {
        struct irq_chip *chip = irq_data_get_irq_chip(data);
        struct irq_desc *desc = irq_data_to_desc(data);
@@ -202,7 +203,7 @@ int __irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask)
                return -EINVAL;
 
        if (irq_can_move_pcntxt(data)) {
-               ret = irq_do_set_affinity(data, mask, false);
+               ret = irq_do_set_affinity(data, mask, force);
        } else {
                irqd_set_move_pending(data);
                irq_copy_pending(desc, mask);
@@ -217,13 +218,7 @@ int __irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask)
        return ret;
 }
 
-/**
- *     irq_set_affinity - Set the irq affinity of a given irq
- *     @irq:           Interrupt to set affinity
- *     @mask:          cpumask
- *
- */
-int irq_set_affinity(unsigned int irq, const struct cpumask *mask)
+int __irq_set_affinity(unsigned int irq, const struct cpumask *mask, bool force)
 {
        struct irq_desc *desc = irq_to_desc(irq);
        unsigned long flags;
@@ -233,7 +228,7 @@ int irq_set_affinity(unsigned int irq, const struct cpumask *mask)
                return -EINVAL;
 
        raw_spin_lock_irqsave(&desc->lock, flags);
-       ret =  __irq_set_affinity_locked(irq_desc_get_irq_data(desc), mask);
+       ret = irq_set_affinity_locked(irq_desc_get_irq_data(desc), mask, force);
        raw_spin_unlock_irqrestore(&desc->lock, flags);
        return ret;
 }
index e1191c996c59cbe3b3d2aecb7b54fd570cef17b6..5cf6731b98e9ecf1ffffa754371701613cc64bcb 100644 (file)
@@ -71,18 +71,17 @@ void mutex_remove_waiter(struct mutex *lock, struct mutex_waiter *waiter,
 
 void debug_mutex_unlock(struct mutex *lock)
 {
-       if (unlikely(!debug_locks))
-               return;
+       if (likely(debug_locks)) {
+               DEBUG_LOCKS_WARN_ON(lock->magic != lock);
 
-       DEBUG_LOCKS_WARN_ON(lock->magic != lock);
+               if (!lock->owner)
+                       DEBUG_LOCKS_WARN_ON(!lock->owner);
+               else
+                       DEBUG_LOCKS_WARN_ON(lock->owner != current);
 
-       if (!lock->owner)
-               DEBUG_LOCKS_WARN_ON(!lock->owner);
-       else
-               DEBUG_LOCKS_WARN_ON(lock->owner != current);
-
-       DEBUG_LOCKS_WARN_ON(!lock->wait_list.prev && !lock->wait_list.next);
-       mutex_clear_owner(lock);
+               DEBUG_LOCKS_WARN_ON(!lock->wait_list.prev && !lock->wait_list.next);
+               mutex_clear_owner(lock);
+       }
 
        /*
         * __mutex_slowpath_needs_to_unlock() is explicitly 0 for debug
index 11869408f79b86abe33e5194d0f5c705b44e9d81..079c4615607d6ed266330a5416529bfcc37e4db0 100644 (file)
@@ -815,9 +815,6 @@ SYSCALL_DEFINE2(delete_module, const char __user *, name_user,
                return -EFAULT;
        name[MODULE_NAME_LEN-1] = '\0';
 
-       if (!(flags & O_NONBLOCK))
-               pr_warn("waiting module removal not supported: please upgrade\n");
-
        if (mutex_lock_interruptible(&module_mutex) != 0)
                return -EINTR;
 
@@ -3271,6 +3268,9 @@ static int load_module(struct load_info *info, const char __user *uargs,
 
        dynamic_debug_setup(info->debug, info->num_debug);
 
+       /* Ftrace init must be called in the MODULE_STATE_UNFORMED state */
+       ftrace_module_init(mod);
+
        /* Finally it's fully formed, ready to start executing. */
        err = complete_formation(mod, info);
        if (err)
index c3ad9cafe930e550a6400dc1994f8ee86570d885..8233cd4047d776c311ef71800479f1e2b637e5da 100644 (file)
@@ -14,6 +14,7 @@
 #include <linux/init.h>
 #include <linux/console.h>
 #include <linux/cpu.h>
+#include <linux/cpuidle.h>
 #include <linux/syscalls.h>
 #include <linux/gfp.h>
 #include <linux/io.h>
@@ -53,7 +54,9 @@ static void freeze_begin(void)
 
 static void freeze_enter(void)
 {
+       cpuidle_resume();
        wait_event(suspend_freeze_wait_head, suspend_freeze_wake);
+       cpuidle_pause();
 }
 
 void freeze_wake(void)
index 27ef409255253367d35fd598ddb01550612df040..b08095786cb8fff0c96773eb5f6a582da503bcb8 100644 (file)
@@ -1021,8 +1021,17 @@ struct task_struct *pick_next_task_dl(struct rq *rq, struct task_struct *prev)
 
        dl_rq = &rq->dl;
 
-       if (need_pull_dl_task(rq, prev))
+       if (need_pull_dl_task(rq, prev)) {
                pull_dl_task(rq);
+               /*
+                * pull_rt_task() can drop (and re-acquire) rq->lock; this
+                * means a stop task can slip in, in which case we need to
+                * re-start task selection.
+                */
+               if (rq->stop && rq->stop->on_rq)
+                       return RETRY_TASK;
+       }
+
        /*
         * When prev is DL, we may throttle it in put_prev_task().
         * So, we update time before we check for dl_nr_running.
index 7e9bd0b1fa9ef1aa16880a5a10601374c7bb618b..7570dd969c2838e9aab12ba9cb2c24cb87e21855 100644 (file)
@@ -1497,7 +1497,7 @@ static void task_numa_placement(struct task_struct *p)
        /* If the task is part of a group prevent parallel updates to group stats */
        if (p->numa_group) {
                group_lock = &p->numa_group->lock;
-               spin_lock(group_lock);
+               spin_lock_irq(group_lock);
        }
 
        /* Find the node with the highest number of faults */
@@ -1572,7 +1572,7 @@ static void task_numa_placement(struct task_struct *p)
                        }
                }
 
-               spin_unlock(group_lock);
+               spin_unlock_irq(group_lock);
        }
 
        /* Preferred node as the node with the most faults */
@@ -1677,7 +1677,8 @@ static void task_numa_group(struct task_struct *p, int cpupid, int flags,
        if (!join)
                return;
 
-       double_lock(&my_grp->lock, &grp->lock);
+       BUG_ON(irqs_disabled());
+       double_lock_irq(&my_grp->lock, &grp->lock);
 
        for (i = 0; i < NR_NUMA_HINT_FAULT_STATS * nr_node_ids; i++) {
                my_grp->faults[i] -= p->numa_faults_memory[i];
@@ -1691,7 +1692,7 @@ static void task_numa_group(struct task_struct *p, int cpupid, int flags,
        grp->nr_tasks++;
 
        spin_unlock(&my_grp->lock);
-       spin_unlock(&grp->lock);
+       spin_unlock_irq(&grp->lock);
 
        rcu_assign_pointer(p->numa_group, grp);
 
@@ -1710,14 +1711,14 @@ void task_numa_free(struct task_struct *p)
        void *numa_faults = p->numa_faults_memory;
 
        if (grp) {
-               spin_lock(&grp->lock);
+               spin_lock_irq(&grp->lock);
                for (i = 0; i < NR_NUMA_HINT_FAULT_STATS * nr_node_ids; i++)
                        grp->faults[i] -= p->numa_faults_memory[i];
                grp->total_faults -= p->total_numa_faults;
 
                list_del(&p->numa_entry);
                grp->nr_tasks--;
-               spin_unlock(&grp->lock);
+               spin_unlock_irq(&grp->lock);
                rcu_assign_pointer(p->numa_group, NULL);
                put_numa_group(grp);
        }
@@ -6727,7 +6728,8 @@ static int idle_balance(struct rq *this_rq)
 out:
        /* Is there a task of a high priority class? */
        if (this_rq->nr_running != this_rq->cfs.h_nr_running &&
-           (this_rq->dl.dl_nr_running ||
+           ((this_rq->stop && this_rq->stop->on_rq) ||
+            this_rq->dl.dl_nr_running ||
             (this_rq->rt.rt_nr_running && !rt_rq_throttled(&this_rq->rt))))
                pulled_task = -1;
 
index d8cdf1618551c80143e0f5fd38de556d089eb1f6..bd2267ad404fa78de092b8bc8f228cfea2dca87b 100644 (file)
@@ -1362,10 +1362,11 @@ pick_next_task_rt(struct rq *rq, struct task_struct *prev)
                pull_rt_task(rq);
                /*
                 * pull_rt_task() can drop (and re-acquire) rq->lock; this
-                * means a dl task can slip in, in which case we need to
-                * re-start task selection.
+                * means a dl or stop task can slip in, in which case we need
+                * to re-start task selection.
                 */
-               if (unlikely(rq->dl.dl_nr_running))
+               if (unlikely((rq->stop && rq->stop->on_rq) ||
+                            rq->dl.dl_nr_running))
                        return RETRY_TASK;
        }
 
index c9007f28d3a222ca97b5fb98210b2ecc1e756b7a..456e492a3dca37c13d7cb7b57a51965bfa18d6b3 100644 (file)
@@ -1385,6 +1385,15 @@ static inline void double_lock(spinlock_t *l1, spinlock_t *l2)
        spin_lock_nested(l2, SINGLE_DEPTH_NESTING);
 }
 
+static inline void double_lock_irq(spinlock_t *l1, spinlock_t *l2)
+{
+       if (l1 > l2)
+               swap(l1, l2);
+
+       spin_lock_irq(l1);
+       spin_lock_nested(l2, SINGLE_DEPTH_NESTING);
+}
+
 static inline void double_raw_lock(raw_spinlock_t *l1, raw_spinlock_t *l2)
 {
        if (l1 > l2)
index d8d046c0726a4fede10cdca96910fd5125f5d52e..b35c21503a36d6e63160f7f46a2eb7bf59d371ce 100644 (file)
@@ -69,18 +69,17 @@ static void populate_seccomp_data(struct seccomp_data *sd)
 {
        struct task_struct *task = current;
        struct pt_regs *regs = task_pt_regs(task);
+       unsigned long args[6];
 
        sd->nr = syscall_get_nr(task, regs);
        sd->arch = syscall_get_arch();
-
-       /* Unroll syscall_get_args to help gcc on arm. */
-       syscall_get_arguments(task, regs, 0, 1, (unsigned long *) &sd->args[0]);
-       syscall_get_arguments(task, regs, 1, 1, (unsigned long *) &sd->args[1]);
-       syscall_get_arguments(task, regs, 2, 1, (unsigned long *) &sd->args[2]);
-       syscall_get_arguments(task, regs, 3, 1, (unsigned long *) &sd->args[3]);
-       syscall_get_arguments(task, regs, 4, 1, (unsigned long *) &sd->args[4]);
-       syscall_get_arguments(task, regs, 5, 1, (unsigned long *) &sd->args[5]);
-
+       syscall_get_arguments(task, regs, 0, 6, args);
+       sd->args[0] = args[0];
+       sd->args[1] = args[1];
+       sd->args[2] = args[2];
+       sd->args[3] = args[3];
+       sd->args[4] = args[4];
+       sd->args[5] = args[5];
        sd->instruction_pointer = KSTK_EIP(task);
 }
 
@@ -256,6 +255,7 @@ static long seccomp_attach_filter(struct sock_fprog *fprog)
                goto free_prog;
 
        /* Allocate a new seccomp_filter */
+       ret = -ENOMEM;
        filter = kzalloc(sizeof(struct seccomp_filter) +
                         sizeof(struct sock_filter_int) * new_len,
                         GFP_KERNEL|__GFP_NOWARN);
@@ -265,6 +265,7 @@ static long seccomp_attach_filter(struct sock_fprog *fprog)
        ret = sk_convert_filter(fp, fprog->len, filter->insnsi, &new_len);
        if (ret)
                goto free_filter;
+       kfree(fp);
 
        atomic_set(&filter->usage, 1);
        filter->len = new_len;
index b50990a5bea0220df9034f0bcc71d92e452edc78..33e4648ae0e7cd908671ef1a8ab60bbb562c097c 100644 (file)
@@ -779,3 +779,8 @@ int __init __weak arch_early_irq_init(void)
 {
        return 0;
 }
+
+unsigned int __weak arch_dynirq_lower_bound(unsigned int from)
+{
+       return from;
+}
index 015661279b682fea4fcbc3a393d9e24760bf8b34..0a0608edeb2665e88d2cb1c917b4cf4f112a4e8e 100644 (file)
@@ -276,7 +276,7 @@ static bool tick_check_preferred(struct clock_event_device *curdev,
 bool tick_check_replacement(struct clock_event_device *curdev,
                            struct clock_event_device *newdev)
 {
-       if (tick_check_percpu(curdev, newdev, smp_processor_id()))
+       if (!tick_check_percpu(curdev, newdev, smp_processor_id()))
                return false;
 
        return tick_check_preferred(curdev, newdev);
index 9f8af69c67ecb27d54e5a59741e78c625eda703a..6558b7ac112d2e1293886721a22d020ea78a3e4d 100644 (file)
@@ -84,6 +84,9 @@ static void tick_do_update_jiffies64(ktime_t now)
 
                /* Keep the tick_next_period variable up to date */
                tick_next_period = ktime_add(last_jiffies_update, tick_period);
+       } else {
+               write_sequnlock(&jiffies_lock);
+               return;
        }
        write_sequnlock(&jiffies_lock);
        update_wall_time();
@@ -967,7 +970,7 @@ static void tick_nohz_switch_to_nohz(void)
        struct tick_sched *ts = &__get_cpu_var(tick_cpu_sched);
        ktime_t next;
 
-       if (!tick_nohz_active)
+       if (!tick_nohz_enabled)
                return;
 
        local_irq_disable();
index 87bd529879c23bb12705fa0144cff354064f91dc..3bb01a323b2a3e0ae9291271f4dc0322f01bfd80 100644 (file)
@@ -838,7 +838,7 @@ unsigned long apply_slack(struct timer_list *timer, unsigned long expires)
 
        bit = find_last_bit(&mask, BITS_PER_LONG);
 
-       mask = (1 << bit) - 1;
+       mask = (1UL << bit) - 1;
 
        expires_limit = expires_limit & ~(mask);
 
index 1fd4b9479210183762293944be777abb5435f8e3..4a54a25afa2fe67165cb6f65cd0b63c42eb724eb 100644 (file)
@@ -4330,16 +4330,11 @@ static void ftrace_init_module(struct module *mod,
        ftrace_process_locs(mod, start, end);
 }
 
-static int ftrace_module_notify_enter(struct notifier_block *self,
-                                     unsigned long val, void *data)
+void ftrace_module_init(struct module *mod)
 {
-       struct module *mod = data;
-
-       if (val == MODULE_STATE_COMING)
-               ftrace_init_module(mod, mod->ftrace_callsites,
-                                  mod->ftrace_callsites +
-                                  mod->num_ftrace_callsites);
-       return 0;
+       ftrace_init_module(mod, mod->ftrace_callsites,
+                          mod->ftrace_callsites +
+                          mod->num_ftrace_callsites);
 }
 
 static int ftrace_module_notify_exit(struct notifier_block *self,
@@ -4353,11 +4348,6 @@ static int ftrace_module_notify_exit(struct notifier_block *self,
        return 0;
 }
 #else
-static int ftrace_module_notify_enter(struct notifier_block *self,
-                                     unsigned long val, void *data)
-{
-       return 0;
-}
 static int ftrace_module_notify_exit(struct notifier_block *self,
                                     unsigned long val, void *data)
 {
@@ -4365,11 +4355,6 @@ static int ftrace_module_notify_exit(struct notifier_block *self,
 }
 #endif /* CONFIG_MODULES */
 
-struct notifier_block ftrace_module_enter_nb = {
-       .notifier_call = ftrace_module_notify_enter,
-       .priority = INT_MAX,    /* Run before anything that can use kprobes */
-};
-
 struct notifier_block ftrace_module_exit_nb = {
        .notifier_call = ftrace_module_notify_exit,
        .priority = INT_MIN,    /* Run after anything that can remove kprobes */
@@ -4403,10 +4388,6 @@ void __init ftrace_init(void)
                                  __start_mcount_loc,
                                  __stop_mcount_loc);
 
-       ret = register_module_notifier(&ftrace_module_enter_nb);
-       if (ret)
-               pr_warning("Failed to register trace ftrace module enter notifier\n");
-
        ret = register_module_notifier(&ftrace_module_exit_nb);
        if (ret)
                pr_warning("Failed to register trace ftrace module exit notifier\n");
index 925f537f07d17db7caae363dd39a20bd2296d2ee..4747b476a0300bc3c08ad82f97d6a7a10fb638c4 100644 (file)
@@ -77,7 +77,7 @@ event_triggers_call(struct ftrace_event_file *file, void *rec)
                        data->ops->func(data);
                        continue;
                }
-               filter = rcu_dereference(data->filter);
+               filter = rcu_dereference_sched(data->filter);
                if (filter && !filter_match_preds(filter, rec))
                        continue;
                if (data->cmd_ops->post_trigger) {
index 5b781d2be383f7631a41238dca2b6cc4cc6878f2..ffd56351b5217ddf3ed9cd0657d3f186452b7860 100644 (file)
@@ -58,12 +58,16 @@ int ftrace_create_function_files(struct trace_array *tr,
 {
        int ret;
 
-       /* The top level array uses the "global_ops". */
-       if (!(tr->flags & TRACE_ARRAY_FL_GLOBAL)) {
-               ret = allocate_ftrace_ops(tr);
-               if (ret)
-                       return ret;
-       }
+       /*
+        * The top level array uses the "global_ops", and the files are
+        * created on boot up.
+        */
+       if (tr->flags & TRACE_ARRAY_FL_GLOBAL)
+               return 0;
+
+       ret = allocate_ftrace_ops(tr);
+       if (ret)
+               return ret;
 
        ftrace_create_filter_files(tr->ops, parent);
 
index 930e51462dc871cf7bf038be265cc7ca281aad1c..c082a74413455da972d2c9c115001b58fe55e5a7 100644 (file)
@@ -732,9 +732,15 @@ static int uprobe_buffer_enable(void)
 
 static void uprobe_buffer_disable(void)
 {
+       int cpu;
+
        BUG_ON(!mutex_is_locked(&event_mutex));
 
        if (--uprobe_buffer_refcnt == 0) {
+               for_each_possible_cpu(cpu)
+                       free_page((unsigned long)per_cpu_ptr(uprobe_cpu_buffer,
+                                                            cpu)->buf);
+
                free_percpu(uprobe_cpu_buffer);
                uprobe_cpu_buffer = NULL;
        }
index 0d8f6023fd8dc16e615bd4c1f7e5bf43fe8eec78..bf71b4b2d632eee281b5bdb517b22281c7649343 100644 (file)
@@ -152,7 +152,7 @@ static u32 map_id_range_down(struct uid_gid_map *map, u32 id, u32 count)
 
        /* Find the matching extent */
        extents = map->nr_extents;
-       smp_read_barrier_depends();
+       smp_rmb();
        for (idx = 0; idx < extents; idx++) {
                first = map->extent[idx].first;
                last = first + map->extent[idx].count - 1;
@@ -176,7 +176,7 @@ static u32 map_id_down(struct uid_gid_map *map, u32 id)
 
        /* Find the matching extent */
        extents = map->nr_extents;
-       smp_read_barrier_depends();
+       smp_rmb();
        for (idx = 0; idx < extents; idx++) {
                first = map->extent[idx].first;
                last = first + map->extent[idx].count - 1;
@@ -199,7 +199,7 @@ static u32 map_id_up(struct uid_gid_map *map, u32 id)
 
        /* Find the matching extent */
        extents = map->nr_extents;
-       smp_read_barrier_depends();
+       smp_rmb();
        for (idx = 0; idx < extents; idx++) {
                first = map->extent[idx].lower_first;
                last = first + map->extent[idx].count - 1;
@@ -615,9 +615,8 @@ static ssize_t map_write(struct file *file, const char __user *buf,
         * were written before the count of the extents.
         *
         * To achieve this smp_wmb() is used on guarantee the write
-        * order and smp_read_barrier_depends() is guaranteed that we
-        * don't have crazy architectures returning stale data.
-        *
+        * order and smp_rmb() is guaranteed that we don't have crazy
+        * architectures returning stale data.
         */
        mutex_lock(&id_map_mutex);
 
index e90089fd78e003130e7ab788e409b3de62fd0c38..516203e665fcbddc8eb7f55fa7b5a2dd5634cfc5 100644 (file)
@@ -138,7 +138,11 @@ static void __touch_watchdog(void)
 
 void touch_softlockup_watchdog(void)
 {
-       __this_cpu_write(watchdog_touch_ts, 0);
+       /*
+        * Preemption can be enabled.  It doesn't matter which CPU's timestamp
+        * gets zeroed here, so use the raw_ operation.
+        */
+       raw_cpu_write(watchdog_touch_ts, 0);
 }
 EXPORT_SYMBOL(touch_softlockup_watchdog);
 
index 140b66a874c1d5e9a069eade2fa6aebc6d65013d..819ac51202c01006e105f91355d492db6bdd6eb6 100644 (file)
@@ -505,8 +505,7 @@ config DEBUG_VM_RB
        bool "Debug VM red-black trees"
        depends on DEBUG_VM
        help
-         Enable this to turn on more extended checks in the virtual-memory
-         system that may impact performance.
+         Enable VM red-black tree debugging information and extra validations.
 
          If unsure, say N.
 
index a82fbe4c9e8e1c1d5a3eed5e2649ec87a7bfd16d..5020b280a771a4929bee7dbf0c5aee3fab1dea8b 100644 (file)
@@ -2581,7 +2581,6 @@ EXPORT_SYMBOL(generic_perform_write);
  * @iocb:      IO state structure (file, offset, etc.)
  * @iov:       vector with data to write
  * @nr_segs:   number of segments in the vector
- * @ppos:      position where to write
  *
  * This function does all the work needed for actually writing data to a
  * file. It does all basic checks, removes SUID from the file, updates
index 64635f5278ff2d41525fe1ca3ebcf5314c95e3e4..b4b1feba64724234dee1b66a482c79a0cd3c0f95 100644 (file)
@@ -1536,16 +1536,23 @@ pmd_t *page_check_address_pmd(struct page *page,
                              enum page_check_address_pmd_flag flag,
                              spinlock_t **ptl)
 {
+       pgd_t *pgd;
+       pud_t *pud;
        pmd_t *pmd;
 
        if (address & ~HPAGE_PMD_MASK)
                return NULL;
 
-       pmd = mm_find_pmd(mm, address);
-       if (!pmd)
+       pgd = pgd_offset(mm, address);
+       if (!pgd_present(*pgd))
                return NULL;
+       pud = pud_offset(pgd, address);
+       if (!pud_present(*pud))
+               return NULL;
+       pmd = pmd_offset(pud, address);
+
        *ptl = pmd_lock(mm, pmd);
-       if (pmd_none(*pmd))
+       if (!pmd_present(*pmd))
                goto unlock;
        if (pmd_page(*pmd) != page)
                goto unlock;
index dd30f22b35e0c904b0fe9cfd4f550b810e1e7c22..246192929a2d5c4c4aa424e15c6a7b88e929e785 100644 (file)
@@ -1172,6 +1172,7 @@ static void return_unused_surplus_pages(struct hstate *h,
        while (nr_pages--) {
                if (!free_pool_huge_page(h, &node_states[N_MEMORY], 1))
                        break;
+               cond_resched_lock(&hugetlb_lock);
        }
 }
 
index d0f0bef3be488af9eb9406cc5d28272093abb5a6..037b812a953141f3dc77b1f7402b29bb54cd9e44 100644 (file)
@@ -232,17 +232,18 @@ void tlb_gather_mmu(struct mmu_gather *tlb, struct mm_struct *mm, unsigned long
 #endif
 }
 
-void tlb_flush_mmu(struct mmu_gather *tlb)
+static void tlb_flush_mmu_tlbonly(struct mmu_gather *tlb)
 {
-       struct mmu_gather_batch *batch;
-
-       if (!tlb->need_flush)
-               return;
        tlb->need_flush = 0;
        tlb_flush(tlb);
 #ifdef CONFIG_HAVE_RCU_TABLE_FREE
        tlb_table_flush(tlb);
 #endif
+}
+
+static void tlb_flush_mmu_free(struct mmu_gather *tlb)
+{
+       struct mmu_gather_batch *batch;
 
        for (batch = &tlb->local; batch; batch = batch->next) {
                free_pages_and_swap_cache(batch->pages, batch->nr);
@@ -251,6 +252,14 @@ void tlb_flush_mmu(struct mmu_gather *tlb)
        tlb->active = &tlb->local;
 }
 
+void tlb_flush_mmu(struct mmu_gather *tlb)
+{
+       if (!tlb->need_flush)
+               return;
+       tlb_flush_mmu_tlbonly(tlb);
+       tlb_flush_mmu_free(tlb);
+}
+
 /* tlb_finish_mmu
  *     Called at the end of the shootdown operation to free up any resources
  *     that were required.
@@ -1127,8 +1136,10 @@ again:
                        if (PageAnon(page))
                                rss[MM_ANONPAGES]--;
                        else {
-                               if (pte_dirty(ptent))
+                               if (pte_dirty(ptent)) {
+                                       force_flush = 1;
                                        set_page_dirty(page);
+                               }
                                if (pte_young(ptent) &&
                                    likely(!(vma->vm_flags & VM_SEQ_READ)))
                                        mark_page_accessed(page);
@@ -1137,9 +1148,10 @@ again:
                        page_remove_rmap(page);
                        if (unlikely(page_mapcount(page) < 0))
                                print_bad_pte(vma, addr, ptent, page);
-                       force_flush = !__tlb_remove_page(tlb, page);
-                       if (force_flush)
+                       if (unlikely(!__tlb_remove_page(tlb, page))) {
+                               force_flush = 1;
                                break;
+                       }
                        continue;
                }
                /*
@@ -1174,18 +1186,11 @@ again:
 
        add_mm_rss_vec(mm, rss);
        arch_leave_lazy_mmu_mode();
-       pte_unmap_unlock(start_pte, ptl);
 
-       /*
-        * mmu_gather ran out of room to batch pages, we break out of
-        * the PTE lock to avoid doing the potential expensive TLB invalidate
-        * and page-free while holding it.
-        */
+       /* Do the actual TLB flush before dropping ptl */
        if (force_flush) {
                unsigned long old_end;
 
-               force_flush = 0;
-
                /*
                 * Flush the TLB just for the previous segment,
                 * then update the range to be the remaining
@@ -1193,11 +1198,21 @@ again:
                 */
                old_end = tlb->end;
                tlb->end = addr;
-
-               tlb_flush_mmu(tlb);
-
+               tlb_flush_mmu_tlbonly(tlb);
                tlb->start = addr;
                tlb->end = old_end;
+       }
+       pte_unmap_unlock(start_pte, ptl);
+
+       /*
+        * If we forced a TLB flush (either due to running out of
+        * batch buffers or because we needed to flush dirty TLB
+        * entries before releasing the ptl), free the batched
+        * memory too. Restart if we didn't do everything.
+        */
+       if (force_flush) {
+               force_flush = 0;
+               tlb_flush_mmu_free(tlb);
 
                if (addr != end)
                        goto again;
@@ -1955,12 +1970,17 @@ int fixup_user_fault(struct task_struct *tsk, struct mm_struct *mm,
                     unsigned long address, unsigned int fault_flags)
 {
        struct vm_area_struct *vma;
+       vm_flags_t vm_flags;
        int ret;
 
        vma = find_extend_vma(mm, address);
        if (!vma || address < vma->vm_start)
                return -EFAULT;
 
+       vm_flags = (fault_flags & FAULT_FLAG_WRITE) ? VM_WRITE : VM_READ;
+       if (!(vm_flags & vma->vm_flags))
+               return -EFAULT;
+
        ret = handle_mm_fault(mm, vma, address, fault_flags);
        if (ret & VM_FAULT_ERROR) {
                if (ret & VM_FAULT_OOM)
index d4224b397c0e4e4492fa135c3c5ee9b224872c07..1037a3bab50529f84c9d81c383df07dbfbbda081 100644 (file)
@@ -81,10 +81,12 @@ struct vm_area_struct *vmacache_find(struct mm_struct *mm, unsigned long addr)
        for (i = 0; i < VMACACHE_SIZE; i++) {
                struct vm_area_struct *vma = current->vmacache[i];
 
-               if (vma && vma->vm_start <= addr && vma->vm_end > addr) {
-                       BUG_ON(vma->vm_mm != mm);
+               if (!vma)
+                       continue;
+               if (WARN_ON_ONCE(vma->vm_mm != mm))
+                       break;
+               if (vma->vm_start <= addr && vma->vm_end > addr)
                        return vma;
-               }
        }
 
        return NULL;
index 9b6497eda8067857d7008787868e365882820db3..3f56c8deb3c05f0904917b87113e188dbeff9ef0 100644 (file)
@@ -1158,7 +1158,7 @@ unsigned long reclaim_clean_pages_from_list(struct zone *zone,
                        TTU_UNMAP|TTU_IGNORE_ACCESS,
                        &dummy1, &dummy2, &dummy3, &dummy4, &dummy5, true);
        list_splice(&clean_pages, page_list);
-       __mod_zone_page_state(zone, NR_ISOLATED_FILE, -ret);
+       mod_zone_page_state(zone, NR_ISOLATED_FILE, -ret);
        return ret;
 }
 
index 6f142f03716d04effac77f0e2210879eff3daddb..733ec283ed1b9e85f9181f67116052f88bb49951 100644 (file)
@@ -493,10 +493,48 @@ static void vlan_dev_change_rx_flags(struct net_device *dev, int change)
        }
 }
 
+static int vlan_calculate_locking_subclass(struct net_device *real_dev)
+{
+       int subclass = 0;
+
+       while (is_vlan_dev(real_dev)) {
+               subclass++;
+               real_dev = vlan_dev_priv(real_dev)->real_dev;
+       }
+
+       return subclass;
+}
+
+static void vlan_dev_mc_sync(struct net_device *to, struct net_device *from)
+{
+       int err = 0, subclass;
+
+       subclass = vlan_calculate_locking_subclass(to);
+
+       spin_lock_nested(&to->addr_list_lock, subclass);
+       err = __hw_addr_sync(&to->mc, &from->mc, to->addr_len);
+       if (!err)
+               __dev_set_rx_mode(to);
+       spin_unlock(&to->addr_list_lock);
+}
+
+static void vlan_dev_uc_sync(struct net_device *to, struct net_device *from)
+{
+       int err = 0, subclass;
+
+       subclass = vlan_calculate_locking_subclass(to);
+
+       spin_lock_nested(&to->addr_list_lock, subclass);
+       err = __hw_addr_sync(&to->uc, &from->uc, to->addr_len);
+       if (!err)
+               __dev_set_rx_mode(to);
+       spin_unlock(&to->addr_list_lock);
+}
+
 static void vlan_dev_set_rx_mode(struct net_device *vlan_dev)
 {
-       dev_mc_sync(vlan_dev_priv(vlan_dev)->real_dev, vlan_dev);
-       dev_uc_sync(vlan_dev_priv(vlan_dev)->real_dev, vlan_dev);
+       vlan_dev_mc_sync(vlan_dev_priv(vlan_dev)->real_dev, vlan_dev);
+       vlan_dev_uc_sync(vlan_dev_priv(vlan_dev)->real_dev, vlan_dev);
 }
 
 /*
@@ -608,9 +646,7 @@ static int vlan_dev_init(struct net_device *dev)
 
        SET_NETDEV_DEVTYPE(dev, &vlan_type);
 
-       if (is_vlan_dev(real_dev))
-               subclass = 1;
-
+       subclass = vlan_calculate_locking_subclass(dev);
        vlan_dev_set_lockdep_class(dev, subclass);
 
        vlan_dev_priv(dev)->vlan_pcpu_stats = netdev_alloc_pcpu_stats(struct vlan_pcpu_stats);
index 14dac0654f28c273d8ebd7df001adb9d86934443..d2c8a06b3a9883b618c55a8cddf0929a4bcd049f 100644 (file)
@@ -2284,7 +2284,7 @@ EXPORT_SYMBOL(skb_checksum_help);
 __be16 skb_network_protocol(struct sk_buff *skb, int *depth)
 {
        __be16 type = skb->protocol;
-       int vlan_depth = ETH_HLEN;
+       int vlan_depth = skb->mac_len;
 
        /* Tunnel gso handlers can set protocol to ethernet. */
        if (type == htons(ETH_P_TEB)) {
@@ -5238,6 +5238,7 @@ void __dev_set_rx_mode(struct net_device *dev)
        if (ops->ndo_set_rx_mode)
                ops->ndo_set_rx_mode(dev);
 }
+EXPORT_SYMBOL(__dev_set_rx_mode);
 
 void dev_set_rx_mode(struct net_device *dev)
 {
index ca4231ec734787be93c9ebc1e6c69d4a30bf24a5..80d6286c8b625075ad84f8c7bec9265db284760a 100644 (file)
@@ -142,12 +142,12 @@ loop:
        mutex_unlock(&dst_gc_mutex);
 }
 
-int dst_discard(struct sk_buff *skb)
+int dst_discard_sk(struct sock *sk, struct sk_buff *skb)
 {
        kfree_skb(skb);
        return 0;
 }
-EXPORT_SYMBOL(dst_discard);
+EXPORT_SYMBOL(dst_discard_sk);
 
 const u32 dst_default_metrics[RTAX_MAX + 1] = {
        /* This initializer is needed to force linker to place this variable
@@ -184,7 +184,7 @@ void *dst_alloc(struct dst_ops *ops, struct net_device *dev,
        dst->xfrm = NULL;
 #endif
        dst->input = dst_discard;
-       dst->output = dst_discard;
+       dst->output = dst_discard_sk;
        dst->error = 0;
        dst->obsolete = initial_obsolete;
        dst->header_len = 0;
@@ -209,8 +209,10 @@ static void ___dst_free(struct dst_entry *dst)
        /* The first case (dev==NULL) is required, when
           protocol module is unloaded.
         */
-       if (dst->dev == NULL || !(dst->dev->flags&IFF_UP))
-               dst->input = dst->output = dst_discard;
+       if (dst->dev == NULL || !(dst->dev->flags&IFF_UP)) {
+               dst->input = dst_discard;
+               dst->output = dst_discard_sk;
+       }
        dst->obsolete = DST_OBSOLETE_DEAD;
 }
 
@@ -361,7 +363,8 @@ static void dst_ifdown(struct dst_entry *dst, struct net_device *dev,
                return;
 
        if (!unregister) {
-               dst->input = dst->output = dst_discard;
+               dst->input = dst_discard;
+               dst->output = dst_discard_sk;
        } else {
                dst->dev = dev_net(dst->dev)->loopback_dev;
                dev_hold(dst->dev);
index e08b3822c72a8bb67eeb4e8c3f139aebdb7b9d5a..cd58614660cf54e1431392c5045bbdc9478336e6 100644 (file)
@@ -600,6 +600,9 @@ static u64 __skb_get_nlattr(u64 ctx, u64 A, u64 X, u64 r4, u64 r5)
        if (skb_is_nonlinear(skb))
                return 0;
 
+       if (skb->len < sizeof(struct nlattr))
+               return 0;
+
        if (A > skb->len - sizeof(struct nlattr))
                return 0;
 
@@ -618,11 +621,14 @@ static u64 __skb_get_nlattr_nest(u64 ctx, u64 A, u64 X, u64 r4, u64 r5)
        if (skb_is_nonlinear(skb))
                return 0;
 
+       if (skb->len < sizeof(struct nlattr))
+               return 0;
+
        if (A > skb->len - sizeof(struct nlattr))
                return 0;
 
        nla = (struct nlattr *) &skb->data[A];
-       if (nla->nla_len > A - skb->len)
+       if (nla->nla_len > skb->len - A)
                return 0;
 
        nla = nla_find_nested(nla, X);
@@ -1737,7 +1743,6 @@ void sk_decode_filter(struct sock_filter *filt, struct sock_filter *to)
                [BPF_S_ANC_RXHASH]      = BPF_LD|BPF_B|BPF_ABS,
                [BPF_S_ANC_CPU]         = BPF_LD|BPF_B|BPF_ABS,
                [BPF_S_ANC_ALU_XOR_X]   = BPF_LD|BPF_B|BPF_ABS,
-               [BPF_S_ANC_SECCOMP_LD_W] = BPF_LD|BPF_B|BPF_ABS,
                [BPF_S_ANC_VLAN_TAG]    = BPF_LD|BPF_B|BPF_ABS,
                [BPF_S_ANC_VLAN_TAG_PRESENT] = BPF_LD|BPF_B|BPF_ABS,
                [BPF_S_ANC_PAY_OFFSET]  = BPF_LD|BPF_B|BPF_ABS,
index 8876078859dac20ef543043ae5b98ec42f8731cd..0248e8a3460c829bf8da8b47b8b7a525f0b85473 100644 (file)
@@ -138,7 +138,7 @@ static int dccp_transmit_skb(struct sock *sk, struct sk_buff *skb)
 
                DCCP_INC_STATS(DCCP_MIB_OUTSEGS);
 
-               err = icsk->icsk_af_ops->queue_xmit(skb, &inet->cork.fl);
+               err = icsk->icsk_af_ops->queue_xmit(sk, skb, &inet->cork.fl);
                return net_xmit_eval(err);
        }
        return -ENOBUFS;
index ce0cbbfe0f43e4b9b7d0539fd40fd50be97e54b2..daccc4a36d80ea9df6e986d53b83fc95b807b8b8 100644 (file)
@@ -752,7 +752,7 @@ static int dn_to_neigh_output(struct sk_buff *skb)
        return n->output(n, skb);
 }
 
-static int dn_output(struct sk_buff *skb)
+static int dn_output(struct sock *sk, struct sk_buff *skb)
 {
        struct dst_entry *dst = skb_dst(skb);
        struct dn_route *rt = (struct dn_route *)dst;
@@ -838,6 +838,18 @@ drop:
  * Used to catch bugs. This should never normally get
  * called.
  */
+static int dn_rt_bug_sk(struct sock *sk, struct sk_buff *skb)
+{
+       struct dn_skb_cb *cb = DN_SKB_CB(skb);
+
+       net_dbg_ratelimited("dn_rt_bug: skb from:%04x to:%04x\n",
+                           le16_to_cpu(cb->src), le16_to_cpu(cb->dst));
+
+       kfree_skb(skb);
+
+       return NET_RX_DROP;
+}
+
 static int dn_rt_bug(struct sk_buff *skb)
 {
        struct dn_skb_cb *cb = DN_SKB_CB(skb);
@@ -1463,7 +1475,7 @@ make_route:
 
        rt->n = neigh;
        rt->dst.lastuse = jiffies;
-       rt->dst.output = dn_rt_bug;
+       rt->dst.output = dn_rt_bug_sk;
        switch (res.type) {
        case RTN_UNICAST:
                rt->dst.input = dn_forward;
index 1a629f870274de3c1b70910ec5285f7baae139eb..255aa9946fe785a2577fbdb23560288599c1ba0a 100644 (file)
@@ -250,7 +250,7 @@ static int __fib_validate_source(struct sk_buff *skb, __be32 src, __be32 dst,
        bool dev_match;
 
        fl4.flowi4_oif = 0;
-       fl4.flowi4_iif = oif;
+       fl4.flowi4_iif = oif ? : LOOPBACK_IFINDEX;
        fl4.daddr = src;
        fl4.saddr = dst;
        fl4.flowi4_tos = tos;
index b53f0bf84dcaba3fd2767dd734add99d05db9fa6..8a043f03c88ecbb418b5466953abefd54c50b1d0 100644 (file)
@@ -631,6 +631,7 @@ static int fib_check_nh(struct fib_config *cfg, struct fib_info *fi,
                                .daddr = nh->nh_gw,
                                .flowi4_scope = cfg->fc_scope + 1,
                                .flowi4_oif = nh->nh_oif,
+                               .flowi4_iif = LOOPBACK_IFINDEX,
                        };
 
                        /* It is not necessary, but requires a bit of thinking */
index 1a0755fea4914c20f95d036f30638ea2677b764f..1cbeba5edff90fa1ac891d4dd23cfb65464878a4 100644 (file)
@@ -101,17 +101,17 @@ int __ip_local_out(struct sk_buff *skb)
                       skb_dst(skb)->dev, dst_output);
 }
 
-int ip_local_out(struct sk_buff *skb)
+int ip_local_out_sk(struct sock *sk, struct sk_buff *skb)
 {
        int err;
 
        err = __ip_local_out(skb);
        if (likely(err == 1))
-               err = dst_output(skb);
+               err = dst_output_sk(sk, skb);
 
        return err;
 }
-EXPORT_SYMBOL_GPL(ip_local_out);
+EXPORT_SYMBOL_GPL(ip_local_out_sk);
 
 static inline int ip_select_ttl(struct inet_sock *inet, struct dst_entry *dst)
 {
@@ -226,9 +226,8 @@ static int ip_finish_output(struct sk_buff *skb)
                return ip_finish_output2(skb);
 }
 
-int ip_mc_output(struct sk_buff *skb)
+int ip_mc_output(struct sock *sk, struct sk_buff *skb)
 {
-       struct sock *sk = skb->sk;
        struct rtable *rt = skb_rtable(skb);
        struct net_device *dev = rt->dst.dev;
 
@@ -287,7 +286,7 @@ int ip_mc_output(struct sk_buff *skb)
                            !(IPCB(skb)->flags & IPSKB_REROUTED));
 }
 
-int ip_output(struct sk_buff *skb)
+int ip_output(struct sock *sk, struct sk_buff *skb)
 {
        struct net_device *dev = skb_dst(skb)->dev;
 
@@ -315,9 +314,9 @@ static void ip_copy_addrs(struct iphdr *iph, const struct flowi4 *fl4)
               sizeof(fl4->saddr) + sizeof(fl4->daddr));
 }
 
-int ip_queue_xmit(struct sk_buff *skb, struct flowi *fl)
+/* Note: skb->sk can be different from sk, in case of tunnels */
+int ip_queue_xmit(struct sock *sk, struct sk_buff *skb, struct flowi *fl)
 {
-       struct sock *sk = skb->sk;
        struct inet_sock *inet = inet_sk(sk);
        struct ip_options_rcu *inet_opt;
        struct flowi4 *fl4;
@@ -389,6 +388,7 @@ packet_routed:
        ip_select_ident_more(skb, &rt->dst, sk,
                             (skb_shinfo(skb)->gso_segs ?: 1) - 1);
 
+       /* TODO : should we use skb->sk here instead of sk ? */
        skb->priority = sk->sk_priority;
        skb->mark = sk->sk_mark;
 
index e77381d1df9a044ff6a8d01e051b8f885776cf43..fa5b7519765f10c61b8855c6646b79915384062f 100644 (file)
@@ -670,7 +670,7 @@ void ip_tunnel_xmit(struct sk_buff *skb, struct net_device *dev,
                return;
        }
 
-       err = iptunnel_xmit(rt, skb, fl4.saddr, fl4.daddr, protocol,
+       err = iptunnel_xmit(skb->sk, rt, skb, fl4.saddr, fl4.daddr, protocol,
                            tos, ttl, df, !net_eq(tunnel->net, dev_net(dev)));
        iptunnel_xmit_stats(err, &dev->stats, dev->tstats);
 
@@ -722,19 +722,18 @@ static void ip_tunnel_update(struct ip_tunnel_net *itn,
 int ip_tunnel_ioctl(struct net_device *dev, struct ip_tunnel_parm *p, int cmd)
 {
        int err = 0;
-       struct ip_tunnel *t;
-       struct net *net = dev_net(dev);
-       struct ip_tunnel *tunnel = netdev_priv(dev);
-       struct ip_tunnel_net *itn = net_generic(net, tunnel->ip_tnl_net_id);
+       struct ip_tunnel *t = netdev_priv(dev);
+       struct net *net = t->net;
+       struct ip_tunnel_net *itn = net_generic(net, t->ip_tnl_net_id);
 
        BUG_ON(!itn->fb_tunnel_dev);
        switch (cmd) {
        case SIOCGETTUNNEL:
-               t = NULL;
-               if (dev == itn->fb_tunnel_dev)
+               if (dev == itn->fb_tunnel_dev) {
                        t = ip_tunnel_find(itn, p, itn->fb_tunnel_dev->type);
-               if (t == NULL)
-                       t = netdev_priv(dev);
+                       if (t == NULL)
+                               t = netdev_priv(dev);
+               }
                memcpy(p, &t->parms, sizeof(*p));
                break;
 
index e0c2b1d2ea4eb825aa76c15199b366bc600f841a..bcf206c79005de251e3c71e387d17e0f928e4aef 100644 (file)
@@ -46,7 +46,7 @@
 #include <net/netns/generic.h>
 #include <net/rtnetlink.h>
 
-int iptunnel_xmit(struct rtable *rt, struct sk_buff *skb,
+int iptunnel_xmit(struct sock *sk, struct rtable *rt, struct sk_buff *skb,
                  __be32 src, __be32 dst, __u8 proto,
                  __u8 tos, __u8 ttl, __be16 df, bool xnet)
 {
@@ -76,7 +76,7 @@ int iptunnel_xmit(struct rtable *rt, struct sk_buff *skb,
        iph->ttl        =       ttl;
        __ip_select_ident(iph, &rt->dst, (skb_shinfo(skb)->gso_segs ?: 1) - 1);
 
-       err = ip_local_out(skb);
+       err = ip_local_out_sk(sk, skb);
        if (unlikely(net_xmit_eval(err)))
                pkt_len = 0;
        return pkt_len;
index 28863570dd60557ca27d8c73c7590b926c7dcf57..d84dc8d4c916e7f50260a2b29df5d79f4adb4c1e 100644 (file)
@@ -455,7 +455,7 @@ static netdev_tx_t reg_vif_xmit(struct sk_buff *skb, struct net_device *dev)
        struct mr_table *mrt;
        struct flowi4 fl4 = {
                .flowi4_oif     = dev->ifindex,
-               .flowi4_iif     = skb->skb_iif,
+               .flowi4_iif     = skb->skb_iif ? : LOOPBACK_IFINDEX,
                .flowi4_mark    = skb->mark,
        };
        int err;
index c49dcd0284a06c6bb4b4e6787af5888289ba50f3..4bfaedf9b34e5248aa6f8133e2c3bb0e555062e9 100644 (file)
@@ -89,11 +89,8 @@ static bool rpfilter_mt(const struct sk_buff *skb, struct xt_action_param *par)
        if (ipv4_is_multicast(iph->daddr)) {
                if (ipv4_is_zeronet(iph->saddr))
                        return ipv4_is_local_multicast(iph->daddr) ^ invert;
-               flow.flowi4_iif = 0;
-       } else {
-               flow.flowi4_iif = LOOPBACK_IFINDEX;
        }
-
+       flow.flowi4_iif = LOOPBACK_IFINDEX;
        flow.daddr = iph->saddr;
        flow.saddr = rpfilter_get_saddr(iph->daddr);
        flow.flowi4_oif = 0;
index f4b19e5dde54c4b2971610db527202a640b40f09..8210964a9f19bedf17d6f3266c1fd0775f3de144 100644 (file)
@@ -252,26 +252,33 @@ int ping_init_sock(struct sock *sk)
 {
        struct net *net = sock_net(sk);
        kgid_t group = current_egid();
-       struct group_info *group_info = get_current_groups();
-       int i, j, count = group_info->ngroups;
+       struct group_info *group_info;
+       int i, j, count;
        kgid_t low, high;
+       int ret = 0;
 
        inet_get_ping_group_range_net(net, &low, &high);
        if (gid_lte(low, group) && gid_lte(group, high))
                return 0;
 
+       group_info = get_current_groups();
+       count = group_info->ngroups;
        for (i = 0; i < group_info->nblocks; i++) {
                int cp_count = min_t(int, NGROUPS_PER_BLOCK, count);
                for (j = 0; j < cp_count; j++) {
                        kgid_t gid = group_info->blocks[i][j];
                        if (gid_lte(low, gid) && gid_lte(gid, high))
-                               return 0;
+                               goto out_release_group;
                }
 
                count -= cp_count;
        }
 
-       return -EACCES;
+       ret = -EACCES;
+
+out_release_group:
+       put_group_info(group_info);
+       return ret;
 }
 EXPORT_SYMBOL_GPL(ping_init_sock);
 
index 34d094cadb11a3ef9b8351140e9c0ae4d60a4d1e..db1e0da871f40a2284d67bd48c0f21d772b923f3 100644 (file)
@@ -1129,7 +1129,7 @@ static void ipv4_link_failure(struct sk_buff *skb)
                dst_set_expires(&rt->dst, 0);
 }
 
-static int ip_rt_bug(struct sk_buff *skb)
+static int ip_rt_bug(struct sock *sk, struct sk_buff *skb)
 {
        pr_debug("%s: %pI4 -> %pI4, %s\n",
                 __func__, &ip_hdr(skb)->saddr, &ip_hdr(skb)->daddr,
@@ -1700,8 +1700,7 @@ static int ip_route_input_slow(struct sk_buff *skb, __be32 daddr, __be32 saddr,
 
        if (res.type == RTN_LOCAL) {
                err = fib_validate_source(skb, saddr, daddr, tos,
-                                         LOOPBACK_IFINDEX,
-                                         dev, in_dev, &itag);
+                                         0, dev, in_dev, &itag);
                if (err < 0)
                        goto martian_source_keep_err;
                goto local_input;
@@ -2218,7 +2217,7 @@ struct dst_entry *ipv4_blackhole_route(struct net *net, struct dst_entry *dst_or
 
                new->__use = 1;
                new->input = dst_discard;
-               new->output = dst_discard;
+               new->output = dst_discard_sk;
 
                new->dev = ort->dst.dev;
                if (new->dev)
@@ -2357,7 +2356,7 @@ static int rt_fill_info(struct net *net,  __be32 dst, __be32 src,
                        }
                } else
 #endif
-                       if (nla_put_u32(skb, RTA_IIF, rt->rt_iif))
+                       if (nla_put_u32(skb, RTA_IIF, skb->dev->ifindex))
                                goto nla_put_failure;
        }
 
index 699fb102e9710694f342951cf194facd153f7d37..025e25093984bacaca7a5cdaa26074d436f29cf1 100644 (file)
@@ -981,7 +981,7 @@ static int tcp_transmit_skb(struct sock *sk, struct sk_buff *skb, int clone_it,
                TCP_ADD_STATS(sock_net(sk), TCP_MIB_OUTSEGS,
                              tcp_skb_pcount(skb));
 
-       err = icsk->icsk_af_ops->queue_xmit(skb, &inet->cork.fl);
+       err = icsk->icsk_af_ops->queue_xmit(sk, skb, &inet->cork.fl);
        if (likely(err <= 0))
                return err;
 
index baa0f63731fdff4edf1790884869023730c9c946..40e701f2e1e0324af6f0af781ac6715866ad88d3 100644 (file)
@@ -86,7 +86,7 @@ int xfrm4_output_finish(struct sk_buff *skb)
        return xfrm_output(skb);
 }
 
-int xfrm4_output(struct sk_buff *skb)
+int xfrm4_output(struct sock *sk, struct sk_buff *skb)
 {
        struct dst_entry *dst = skb_dst(skb);
        struct xfrm_state *x = dst->xfrm;
index c9138189415a91c994d658bbbc9d59bd95d8b815..d4ade34ab37566d8cca9e164f5fde5fb5a762fe6 100644 (file)
@@ -224,9 +224,8 @@ static struct dst_entry *inet6_csk_route_socket(struct sock *sk,
        return dst;
 }
 
-int inet6_csk_xmit(struct sk_buff *skb, struct flowi *fl_unused)
+int inet6_csk_xmit(struct sock *sk, struct sk_buff *skb, struct flowi *fl_unused)
 {
-       struct sock *sk = skb->sk;
        struct ipv6_pinfo *np = inet6_sk(sk);
        struct flowi6 fl6;
        struct dst_entry *dst;
index c98338b81d30779f9410ea413eb359d72a7dd76e..9d921462b57f293f9f49f6ec78936c84a3f756a0 100644 (file)
@@ -1559,6 +1559,15 @@ static int ip6gre_changelink(struct net_device *dev, struct nlattr *tb[],
        return 0;
 }
 
+static void ip6gre_dellink(struct net_device *dev, struct list_head *head)
+{
+       struct net *net = dev_net(dev);
+       struct ip6gre_net *ign = net_generic(net, ip6gre_net_id);
+
+       if (dev != ign->fb_tunnel_dev)
+               unregister_netdevice_queue(dev, head);
+}
+
 static size_t ip6gre_get_size(const struct net_device *dev)
 {
        return
@@ -1636,6 +1645,7 @@ static struct rtnl_link_ops ip6gre_link_ops __read_mostly = {
        .validate       = ip6gre_tunnel_validate,
        .newlink        = ip6gre_newlink,
        .changelink     = ip6gre_changelink,
+       .dellink        = ip6gre_dellink,
        .get_size       = ip6gre_get_size,
        .fill_info      = ip6gre_fill_info,
 };
index 3284d61577c0f06e9231585fc7a3e93117e40b45..40e7581374f7006c6f8c436ed686919ac93c2b19 100644 (file)
@@ -132,7 +132,7 @@ static int ip6_finish_output(struct sk_buff *skb)
                return ip6_finish_output2(skb);
 }
 
-int ip6_output(struct sk_buff *skb)
+int ip6_output(struct sock *sk, struct sk_buff *skb)
 {
        struct net_device *dev = skb_dst(skb)->dev;
        struct inet6_dev *idev = ip6_dst_idev(skb_dst(skb));
index e1df691d78befcb2bb041244ed3370b44667b40d..b05b609f69d1cd3e58bd525cb0b5e8b11d429b80 100644 (file)
@@ -1340,8 +1340,8 @@ ip6_tnl_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
        int err = 0;
        struct ip6_tnl_parm p;
        struct __ip6_tnl_parm p1;
-       struct ip6_tnl *t = NULL;
-       struct net *net = dev_net(dev);
+       struct ip6_tnl *t = netdev_priv(dev);
+       struct net *net = t->net;
        struct ip6_tnl_net *ip6n = net_generic(net, ip6_tnl_net_id);
 
        switch (cmd) {
@@ -1353,11 +1353,11 @@ ip6_tnl_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
                        }
                        ip6_tnl_parm_from_user(&p1, &p);
                        t = ip6_tnl_locate(net, &p1, 0);
+                       if (t == NULL)
+                               t = netdev_priv(dev);
                } else {
                        memset(&p, 0, sizeof(p));
                }
-               if (t == NULL)
-                       t = netdev_priv(dev);
                ip6_tnl_parm_to_user(&p, &t->parms);
                if (copy_to_user(ifr->ifr_ifru.ifru_data, &p, sizeof (p))) {
                        err = -EFAULT;
index 8737400af0a095cac6666112cb8dcd4d60518823..8659067da28e8a8557af6f4109fc52056ccdee1b 100644 (file)
@@ -700,7 +700,7 @@ static netdev_tx_t reg_vif_xmit(struct sk_buff *skb,
        struct mr6_table *mrt;
        struct flowi6 fl6 = {
                .flowi6_oif     = dev->ifindex,
-               .flowi6_iif     = skb->skb_iif,
+               .flowi6_iif     = skb->skb_iif ? : LOOPBACK_IFINDEX,
                .flowi6_mark    = skb->mark,
        };
        int err;
index 5015c50a5ba7db02b9a8cc842bd0e28b7f3e8782..4011617cca688850c4d530f2e35d9890203dedaf 100644 (file)
@@ -84,9 +84,9 @@ static void           ip6_dst_ifdown(struct dst_entry *,
 static int              ip6_dst_gc(struct dst_ops *ops);
 
 static int             ip6_pkt_discard(struct sk_buff *skb);
-static int             ip6_pkt_discard_out(struct sk_buff *skb);
+static int             ip6_pkt_discard_out(struct sock *sk, struct sk_buff *skb);
 static int             ip6_pkt_prohibit(struct sk_buff *skb);
-static int             ip6_pkt_prohibit_out(struct sk_buff *skb);
+static int             ip6_pkt_prohibit_out(struct sock *sk, struct sk_buff *skb);
 static void            ip6_link_failure(struct sk_buff *skb);
 static void            ip6_rt_update_pmtu(struct dst_entry *dst, struct sock *sk,
                                           struct sk_buff *skb, u32 mtu);
@@ -290,7 +290,7 @@ static const struct rt6_info ip6_blk_hole_entry_template = {
                .obsolete       = DST_OBSOLETE_FORCE_CHK,
                .error          = -EINVAL,
                .input          = dst_discard,
-               .output         = dst_discard,
+               .output         = dst_discard_sk,
        },
        .rt6i_flags     = (RTF_REJECT | RTF_NONEXTHOP),
        .rt6i_protocol  = RTPROT_KERNEL,
@@ -1058,7 +1058,7 @@ struct dst_entry *ip6_blackhole_route(struct net *net, struct dst_entry *dst_ori
 
                new->__use = 1;
                new->input = dst_discard;
-               new->output = dst_discard;
+               new->output = dst_discard_sk;
 
                if (dst_metrics_read_only(&ort->dst))
                        new->_metrics = ort->dst._metrics;
@@ -1338,7 +1338,7 @@ static unsigned int ip6_mtu(const struct dst_entry *dst)
        unsigned int mtu = dst_metric_raw(dst, RTAX_MTU);
 
        if (mtu)
-               return mtu;
+               goto out;
 
        mtu = IPV6_MIN_MTU;
 
@@ -1348,7 +1348,8 @@ static unsigned int ip6_mtu(const struct dst_entry *dst)
                mtu = idev->cnf.mtu6;
        rcu_read_unlock();
 
-       return mtu;
+out:
+       return min_t(unsigned int, mtu, IP6_MAX_MTU);
 }
 
 static struct dst_entry *icmp6_dst_gc_list;
@@ -1576,7 +1577,7 @@ int ip6_route_add(struct fib6_config *cfg)
                switch (cfg->fc_type) {
                case RTN_BLACKHOLE:
                        rt->dst.error = -EINVAL;
-                       rt->dst.output = dst_discard;
+                       rt->dst.output = dst_discard_sk;
                        rt->dst.input = dst_discard;
                        break;
                case RTN_PROHIBIT:
@@ -2128,7 +2129,7 @@ static int ip6_pkt_discard(struct sk_buff *skb)
        return ip6_pkt_drop(skb, ICMPV6_NOROUTE, IPSTATS_MIB_INNOROUTES);
 }
 
-static int ip6_pkt_discard_out(struct sk_buff *skb)
+static int ip6_pkt_discard_out(struct sock *sk, struct sk_buff *skb)
 {
        skb->dev = skb_dst(skb)->dev;
        return ip6_pkt_drop(skb, ICMPV6_NOROUTE, IPSTATS_MIB_OUTNOROUTES);
@@ -2139,7 +2140,7 @@ static int ip6_pkt_prohibit(struct sk_buff *skb)
        return ip6_pkt_drop(skb, ICMPV6_ADM_PROHIBITED, IPSTATS_MIB_INNOROUTES);
 }
 
-static int ip6_pkt_prohibit_out(struct sk_buff *skb)
+static int ip6_pkt_prohibit_out(struct sock *sk, struct sk_buff *skb)
 {
        skb->dev = skb_dst(skb)->dev;
        return ip6_pkt_drop(skb, ICMPV6_ADM_PROHIBITED, IPSTATS_MIB_OUTNOROUTES);
index 1693c8d885f081e153e115bec78cb2f29a79a6ff..e5a453ca302e1e55e4d8e6ca7069f97fbb2b6347 100644 (file)
@@ -974,8 +974,9 @@ static netdev_tx_t ipip6_tunnel_xmit(struct sk_buff *skb,
                goto out;
        }
 
-       err = iptunnel_xmit(rt, skb, fl4.saddr, fl4.daddr, IPPROTO_IPV6, tos,
-                           ttl, df, !net_eq(tunnel->net, dev_net(dev)));
+       err = iptunnel_xmit(skb->sk, rt, skb, fl4.saddr, fl4.daddr,
+                           IPPROTO_IPV6, tos, ttl, df,
+                           !net_eq(tunnel->net, dev_net(dev)));
        iptunnel_xmit_stats(err, &dev->stats, dev->tstats);
        return NETDEV_TX_OK;
 
@@ -1126,8 +1127,8 @@ ipip6_tunnel_ioctl (struct net_device *dev, struct ifreq *ifr, int cmd)
        int err = 0;
        struct ip_tunnel_parm p;
        struct ip_tunnel_prl prl;
-       struct ip_tunnel *t;
-       struct net *net = dev_net(dev);
+       struct ip_tunnel *t = netdev_priv(dev);
+       struct net *net = t->net;
        struct sit_net *sitn = net_generic(net, sit_net_id);
 #ifdef CONFIG_IPV6_SIT_6RD
        struct ip_tunnel_6rd ip6rd;
@@ -1138,16 +1139,15 @@ ipip6_tunnel_ioctl (struct net_device *dev, struct ifreq *ifr, int cmd)
 #ifdef CONFIG_IPV6_SIT_6RD
        case SIOCGET6RD:
 #endif
-               t = NULL;
                if (dev == sitn->fb_tunnel_dev) {
                        if (copy_from_user(&p, ifr->ifr_ifru.ifru_data, sizeof(p))) {
                                err = -EFAULT;
                                break;
                        }
                        t = ipip6_tunnel_locate(net, &p, 0);
+                       if (t == NULL)
+                               t = netdev_priv(dev);
                }
-               if (t == NULL)
-                       t = netdev_priv(dev);
 
                err = -EFAULT;
                if (cmd == SIOCGETTUNNEL) {
@@ -1243,9 +1243,6 @@ ipip6_tunnel_ioctl (struct net_device *dev, struct ifreq *ifr, int cmd)
                err = -EINVAL;
                if (dev == sitn->fb_tunnel_dev)
                        goto done;
-               err = -ENOENT;
-               if (!(t = netdev_priv(dev)))
-                       goto done;
                err = ipip6_tunnel_get_prl(t, ifr->ifr_ifru.ifru_data);
                break;
 
@@ -1261,9 +1258,6 @@ ipip6_tunnel_ioctl (struct net_device *dev, struct ifreq *ifr, int cmd)
                err = -EFAULT;
                if (copy_from_user(&prl, ifr->ifr_ifru.ifru_data, sizeof(prl)))
                        goto done;
-               err = -ENOENT;
-               if (!(t = netdev_priv(dev)))
-                       goto done;
 
                switch (cmd) {
                case SIOCDELPRL:
@@ -1291,8 +1285,6 @@ ipip6_tunnel_ioctl (struct net_device *dev, struct ifreq *ifr, int cmd)
                                   sizeof(ip6rd)))
                        goto done;
 
-               t = netdev_priv(dev);
-
                if (cmd != SIOCDEL6RD) {
                        err = ipip6_tunnel_update_6rd(t, &ip6rd);
                        if (err < 0)
index 6cd625e3770611e546628d126602bcde9e0d2b4a..19ef329bdbf8e7418fa1d352bb6c90218935831e 100644 (file)
@@ -163,7 +163,7 @@ static int __xfrm6_output(struct sk_buff *skb)
        return x->outer_mode->afinfo->output_finish(skb);
 }
 
-int xfrm6_output(struct sk_buff *skb)
+int xfrm6_output(struct sock *sk, struct sk_buff *skb)
 {
        return NF_HOOK(NFPROTO_IPV6, NF_INET_POST_ROUTING, skb, NULL,
                       skb_dst(skb)->dev, __xfrm6_output);
index 47f7a549055591b3015ceea709ac06fb1056d53e..a4e37d7158dcca42455a04eaf0460a48e39242fd 100644 (file)
@@ -1131,10 +1131,10 @@ static int l2tp_xmit_core(struct l2tp_session *session, struct sk_buff *skb,
        skb->local_df = 1;
 #if IS_ENABLED(CONFIG_IPV6)
        if (tunnel->sock->sk_family == PF_INET6 && !tunnel->v4mapped)
-               error = inet6_csk_xmit(skb, NULL);
+               error = inet6_csk_xmit(tunnel->sock, skb, NULL);
        else
 #endif
-               error = ip_queue_xmit(skb, fl);
+               error = ip_queue_xmit(tunnel->sock, skb, fl);
 
        /* Update stats */
        if (error >= 0) {
index 0b44d855269c0320403bd52d07d15c0043247ac3..3397fe6897c0326d3efb2277a2824f5c2038d3c4 100644 (file)
@@ -487,7 +487,7 @@ static int l2tp_ip_sendmsg(struct kiocb *iocb, struct sock *sk, struct msghdr *m
 
 xmit:
        /* Queue the packet to IP for output */
-       rc = ip_queue_xmit(skb, &inet->cork.fl);
+       rc = ip_queue_xmit(sk, skb, &inet->cork.fl);
        rcu_read_unlock();
 
 error:
index bd1fd8ea5105fead274e09b7bcd093ba97081a97..75b5dd2c9267f10e8cb0e5680c3aa11c94a5dbe4 100644 (file)
@@ -249,7 +249,7 @@ ieee80211_new_chanctx(struct ieee80211_local *local,
 
        if (!local->use_chanctx) {
                local->_oper_chandef = *chandef;
-               ieee80211_hw_config(local, 0);
+               ieee80211_hw_config(local, IEEE80211_CONF_CHANGE_CHANNEL);
        } else {
                err = drv_add_chanctx(local, ctx);
                if (err) {
@@ -286,7 +286,7 @@ static void ieee80211_free_chanctx(struct ieee80211_local *local,
                        check_single_channel = true;
                local->hw.conf.radar_enabled = false;
 
-               ieee80211_hw_config(local, 0);
+               ieee80211_hw_config(local, IEEE80211_CONF_CHANGE_CHANNEL);
        } else {
                drv_remove_chanctx(local, ctx);
        }
@@ -492,6 +492,13 @@ void ieee80211_recalc_smps_chanctx(struct ieee80211_local *local,
                rx_chains_static = max(rx_chains_static, needed_static);
                rx_chains_dynamic = max(rx_chains_dynamic, needed_dynamic);
        }
+
+       /* Disable SMPS for the monitor interface */
+       sdata = rcu_dereference(local->monitor_sdata);
+       if (sdata &&
+           rcu_access_pointer(sdata->vif.chanctx_conf) == &chanctx->conf)
+               rx_chains_dynamic = rx_chains_static = local->rx_chains;
+
        rcu_read_unlock();
 
        if (!local->use_chanctx) {
index b055f6a55c68e231c5bc73393a7817309a0ed10d..4c1bf61bc778683dc352ebb32a585d45649168a6 100644 (file)
@@ -148,6 +148,8 @@ static u32 ieee80211_hw_conf_chan(struct ieee80211_local *local)
        list_for_each_entry_rcu(sdata, &local->interfaces, list) {
                if (!rcu_access_pointer(sdata->vif.chanctx_conf))
                        continue;
+               if (sdata->vif.type == NL80211_IFTYPE_AP_VLAN)
+                       continue;
                power = min(power, sdata->vif.bss_conf.txpower);
        }
        rcu_read_unlock();
@@ -199,7 +201,7 @@ void ieee80211_bss_info_change_notify(struct ieee80211_sub_if_data *sdata,
 {
        struct ieee80211_local *local = sdata->local;
 
-       if (!changed)
+       if (!changed || sdata->vif.type == NL80211_IFTYPE_AP_VLAN)
                return;
 
        drv_bss_info_changed(local, sdata, &sdata->vif.bss_conf, changed);
index 0c2a29484c07cdaaaf716b1f5ba0184d1047ee68..6fb38558a5e6c79d81fc6ba4a4b03ff4313a701a 100644 (file)
@@ -355,6 +355,7 @@ void ieee80211_sw_roc_work(struct work_struct *work)
                struct ieee80211_roc_work *dep;
 
                /* start this ROC */
+               ieee80211_offchannel_stop_vifs(local);
 
                /* switch channel etc */
                ieee80211_recalc_idle(local);
index e6e574a307c8f3fd552329379919aaf9d071245d..00ba90b02ab2ab79c01d58dc5ba25785993f8dd6 100644 (file)
@@ -618,6 +618,7 @@ void ieee80211_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb)
                                        sta, true, acked);
 
                if ((local->hw.flags & IEEE80211_HW_HAS_RATE_CONTROL) &&
+                   (ieee80211_is_data(hdr->frame_control)) &&
                    (rates_idx != -1))
                        sta->last_tx_rate = info->status.rates[rates_idx];
 
index 6dba48efe01e83bebda511e56410b403a8d4b968..75421f2ba8bee3d3bcf6b02e8feb6858052d8b85 100644 (file)
@@ -1795,6 +1795,7 @@ int nf_conntrack_init_net(struct net *net)
        int cpu;
 
        atomic_set(&net->ct.count, 0);
+       seqcount_init(&net->ct.generation);
 
        net->ct.pcpu_lists = alloc_percpu(struct ct_pcpu);
        if (!net->ct.pcpu_lists)
index 7bd03decd36cef207bc418e80361ed5341b349bc..825c3e3f83053582dba71c0128d706cb516c943a 100644 (file)
@@ -605,32 +605,14 @@ static struct nf_conntrack_helper pptp __read_mostly = {
        .expect_policy          = &pptp_exp_policy,
 };
 
-static void nf_conntrack_pptp_net_exit(struct net *net)
-{
-       nf_ct_gre_keymap_flush(net);
-}
-
-static struct pernet_operations nf_conntrack_pptp_net_ops = {
-       .exit = nf_conntrack_pptp_net_exit,
-};
-
 static int __init nf_conntrack_pptp_init(void)
 {
-       int rv;
-
-       rv = nf_conntrack_helper_register(&pptp);
-       if (rv < 0)
-               return rv;
-       rv = register_pernet_subsys(&nf_conntrack_pptp_net_ops);
-       if (rv < 0)
-               nf_conntrack_helper_unregister(&pptp);
-       return rv;
+       return nf_conntrack_helper_register(&pptp);
 }
 
 static void __exit nf_conntrack_pptp_fini(void)
 {
        nf_conntrack_helper_unregister(&pptp);
-       unregister_pernet_subsys(&nf_conntrack_pptp_net_ops);
 }
 
 module_init(nf_conntrack_pptp_init);
index 9d9c0dade602542bfe82b81aafef050baf5d4d21..d5665739e3b1442516b3d0bede07eb945381d2ae 100644 (file)
@@ -66,7 +66,7 @@ static inline struct netns_proto_gre *gre_pernet(struct net *net)
        return net_generic(net, proto_gre_net_id);
 }
 
-void nf_ct_gre_keymap_flush(struct net *net)
+static void nf_ct_gre_keymap_flush(struct net *net)
 {
        struct netns_proto_gre *net_gre = gre_pernet(net);
        struct nf_ct_gre_keymap *km, *tmp;
@@ -78,7 +78,6 @@ void nf_ct_gre_keymap_flush(struct net *net)
        }
        write_unlock_bh(&net_gre->keymap_lock);
 }
-EXPORT_SYMBOL(nf_ct_gre_keymap_flush);
 
 static inline int gre_key_cmpfn(const struct nf_ct_gre_keymap *km,
                                const struct nf_conntrack_tuple *t)
index 90998a6ff8b9c1f10712e07d9b753e7d7d1bb2fd..804105391b9a903354ae9517d602c8c4638a8879 100644 (file)
@@ -25,9 +25,8 @@ static void nft_cmp_fast_eval(const struct nft_expr *expr,
                              struct nft_data data[NFT_REG_MAX + 1])
 {
        const struct nft_cmp_fast_expr *priv = nft_expr_priv(expr);
-       u32 mask;
+       u32 mask = nft_cmp_fast_mask(priv->len);
 
-       mask = ~0U >> (sizeof(priv->data) * BITS_PER_BYTE - priv->len);
        if ((data[priv->sreg].data[0] & mask) == priv->data)
                return;
        data[NFT_REG_VERDICT].verdict = NFT_BREAK;
index 954925db414da8f973ecef119baab67dec229c12..e2b3f51c81f1df0289d75142689fcd109c351d0b 100644 (file)
@@ -128,7 +128,7 @@ static int nft_cmp_fast_init(const struct nft_ctx *ctx,
        BUG_ON(err < 0);
        desc.len *= BITS_PER_BYTE;
 
-       mask = ~0U >> (sizeof(priv->data) * BITS_PER_BYTE - desc.len);
+       mask = nft_cmp_fast_mask(desc.len);
        priv->data = data.data[0] & mask;
        priv->len  = desc.len;
        return 0;
index a3d6951602db59c58e6086862d8db2f3a0cd306d..ebb6e2442554c89fa2b02f1f8f06b0a3b8acf39e 100644 (file)
@@ -174,7 +174,7 @@ static int gre_tnl_send(struct vport *vport, struct sk_buff *skb)
 
        skb->local_df = 1;
 
-       return iptunnel_xmit(rt, skb, fl.saddr,
+       return iptunnel_xmit(skb->sk, rt, skb, fl.saddr,
                             OVS_CB(skb)->tun_key->ipv4_dst, IPPROTO_GRE,
                             OVS_CB(skb)->tun_key->ipv4_tos,
                             OVS_CB(skb)->tun_key->ipv4_ttl, df, false);
index 4f6d6f9d127474b457cf274a1a0977bb75c6e8dc..39579c3e0d14c12f165e420be064d7fbf248c0ad 100644 (file)
@@ -1395,35 +1395,44 @@ static inline bool sctp_peer_needs_update(struct sctp_association *asoc)
        return false;
 }
 
-/* Update asoc's rwnd for the approximated state in the buffer,
- * and check whether SACK needs to be sent.
- */
-void sctp_assoc_rwnd_update(struct sctp_association *asoc, bool update_peer)
+/* Increase asoc's rwnd by len and send any window update SACK if needed. */
+void sctp_assoc_rwnd_increase(struct sctp_association *asoc, unsigned int len)
 {
-       int rx_count;
        struct sctp_chunk *sack;
        struct timer_list *timer;
 
-       if (asoc->ep->rcvbuf_policy)
-               rx_count = atomic_read(&asoc->rmem_alloc);
-       else
-               rx_count = atomic_read(&asoc->base.sk->sk_rmem_alloc);
+       if (asoc->rwnd_over) {
+               if (asoc->rwnd_over >= len) {
+                       asoc->rwnd_over -= len;
+               } else {
+                       asoc->rwnd += (len - asoc->rwnd_over);
+                       asoc->rwnd_over = 0;
+               }
+       } else {
+               asoc->rwnd += len;
+       }
 
-       if ((asoc->base.sk->sk_rcvbuf - rx_count) > 0)
-               asoc->rwnd = (asoc->base.sk->sk_rcvbuf - rx_count) >> 1;
-       else
-               asoc->rwnd = 0;
+       /* If we had window pressure, start recovering it
+        * once our rwnd had reached the accumulated pressure
+        * threshold.  The idea is to recover slowly, but up
+        * to the initial advertised window.
+        */
+       if (asoc->rwnd_press && asoc->rwnd >= asoc->rwnd_press) {
+               int change = min(asoc->pathmtu, asoc->rwnd_press);
+               asoc->rwnd += change;
+               asoc->rwnd_press -= change;
+       }
 
-       pr_debug("%s: asoc:%p rwnd=%u, rx_count=%d, sk_rcvbuf=%d\n",
-                __func__, asoc, asoc->rwnd, rx_count,
-                asoc->base.sk->sk_rcvbuf);
+       pr_debug("%s: asoc:%p rwnd increased by %d to (%u, %u) - %u\n",
+                __func__, asoc, len, asoc->rwnd, asoc->rwnd_over,
+                asoc->a_rwnd);
 
        /* Send a window update SACK if the rwnd has increased by at least the
         * minimum of the association's PMTU and half of the receive buffer.
         * The algorithm used is similar to the one described in
         * Section 4.2.3.3 of RFC 1122.
         */
-       if (update_peer && sctp_peer_needs_update(asoc)) {
+       if (sctp_peer_needs_update(asoc)) {
                asoc->a_rwnd = asoc->rwnd;
 
                pr_debug("%s: sending window update SACK- asoc:%p rwnd:%u "
@@ -1445,6 +1454,45 @@ void sctp_assoc_rwnd_update(struct sctp_association *asoc, bool update_peer)
        }
 }
 
+/* Decrease asoc's rwnd by len. */
+void sctp_assoc_rwnd_decrease(struct sctp_association *asoc, unsigned int len)
+{
+       int rx_count;
+       int over = 0;
+
+       if (unlikely(!asoc->rwnd || asoc->rwnd_over))
+               pr_debug("%s: association:%p has asoc->rwnd:%u, "
+                        "asoc->rwnd_over:%u!\n", __func__, asoc,
+                        asoc->rwnd, asoc->rwnd_over);
+
+       if (asoc->ep->rcvbuf_policy)
+               rx_count = atomic_read(&asoc->rmem_alloc);
+       else
+               rx_count = atomic_read(&asoc->base.sk->sk_rmem_alloc);
+
+       /* If we've reached or overflowed our receive buffer, announce
+        * a 0 rwnd if rwnd would still be positive.  Store the
+        * the potential pressure overflow so that the window can be restored
+        * back to original value.
+        */
+       if (rx_count >= asoc->base.sk->sk_rcvbuf)
+               over = 1;
+
+       if (asoc->rwnd >= len) {
+               asoc->rwnd -= len;
+               if (over) {
+                       asoc->rwnd_press += asoc->rwnd;
+                       asoc->rwnd = 0;
+               }
+       } else {
+               asoc->rwnd_over = len - asoc->rwnd;
+               asoc->rwnd = 0;
+       }
+
+       pr_debug("%s: asoc:%p rwnd decreased by %d to (%u, %u, %u)\n",
+                __func__, asoc, len, asoc->rwnd, asoc->rwnd_over,
+                asoc->rwnd_press);
+}
 
 /* Build the bind address list for the association based on info from the
  * local endpoint and the remote peer.
index 683c7d1b13060adb328b683b3b3d608d9dde5834..0e8529113dc5a009c89bab8be3c87ce0ddbcce49 100644 (file)
@@ -386,14 +386,13 @@ nomem:
  */
 int sctp_auth_asoc_init_active_key(struct sctp_association *asoc, gfp_t gfp)
 {
-       struct net *net = sock_net(asoc->base.sk);
        struct sctp_auth_bytes  *secret;
        struct sctp_shared_key *ep_key;
 
        /* If we don't support AUTH, or peer is not capable
         * we don't need to do anything.
         */
-       if (!net->sctp.auth_enable || !asoc->peer.auth_capable)
+       if (!asoc->ep->auth_enable || !asoc->peer.auth_capable)
                return 0;
 
        /* If the key_id is non-zero and we couldn't find an
@@ -440,16 +439,16 @@ struct sctp_shared_key *sctp_auth_get_shkey(
  */
 int sctp_auth_init_hmacs(struct sctp_endpoint *ep, gfp_t gfp)
 {
-       struct net *net = sock_net(ep->base.sk);
        struct crypto_hash *tfm = NULL;
        __u16   id;
 
-       /* if the transforms are already allocted, we are done */
-       if (!net->sctp.auth_enable) {
+       /* If AUTH extension is disabled, we are done */
+       if (!ep->auth_enable) {
                ep->auth_hmacs = NULL;
                return 0;
        }
 
+       /* If the transforms are already allocated, we are done */
        if (ep->auth_hmacs)
                return 0;
 
@@ -665,12 +664,10 @@ static int __sctp_auth_cid(sctp_cid_t chunk, struct sctp_chunks_param *param)
 /* Check if peer requested that this chunk is authenticated */
 int sctp_auth_send_cid(sctp_cid_t chunk, const struct sctp_association *asoc)
 {
-       struct net  *net;
        if (!asoc)
                return 0;
 
-       net = sock_net(asoc->base.sk);
-       if (!net->sctp.auth_enable || !asoc->peer.auth_capable)
+       if (!asoc->ep->auth_enable || !asoc->peer.auth_capable)
                return 0;
 
        return __sctp_auth_cid(chunk, asoc->peer.peer_chunks);
@@ -679,12 +676,10 @@ int sctp_auth_send_cid(sctp_cid_t chunk, const struct sctp_association *asoc)
 /* Check if we requested that peer authenticate this chunk. */
 int sctp_auth_recv_cid(sctp_cid_t chunk, const struct sctp_association *asoc)
 {
-       struct net *net;
        if (!asoc)
                return 0;
 
-       net = sock_net(asoc->base.sk);
-       if (!net->sctp.auth_enable)
+       if (!asoc->ep->auth_enable)
                return 0;
 
        return __sctp_auth_cid(chunk,
index 8e5fdea05216b85137dd912563f26212f817d931..3d9f429858dca24f6262996bbec03ca59491b0c0 100644 (file)
@@ -68,7 +68,8 @@ static struct sctp_endpoint *sctp_endpoint_init(struct sctp_endpoint *ep,
        if (!ep->digest)
                return NULL;
 
-       if (net->sctp.auth_enable) {
+       ep->auth_enable = net->sctp.auth_enable;
+       if (ep->auth_enable) {
                /* Allocate space for HMACS and CHUNKS authentication
                 * variables.  There are arrays that we encode directly
                 * into parameters to make the rest of the operations easier.
index 4e1d0fcb028efa3001a0b1b69eaf80836765b49c..c09757fbf8039e76c935c1dbf33ab2b19be228b1 100644 (file)
@@ -957,7 +957,7 @@ static inline int sctp_v4_xmit(struct sk_buff *skb,
 
        SCTP_INC_STATS(sock_net(&inet->sk), SCTP_MIB_OUTSCTPPACKS);
 
-       return ip_queue_xmit(skb, &transport->fl);
+       return ip_queue_xmit(&inet->sk, skb, &transport->fl);
 }
 
 static struct sctp_af sctp_af_inet;
index 3a1767ef3201a6a1870f641ef29e3683ea6dcff7..fee5552ddf929e40f702e1d0b86ead2cb0630f97 100644 (file)
@@ -219,6 +219,7 @@ struct sctp_chunk *sctp_make_init(const struct sctp_association *asoc,
                             gfp_t gfp, int vparam_len)
 {
        struct net *net = sock_net(asoc->base.sk);
+       struct sctp_endpoint *ep = asoc->ep;
        sctp_inithdr_t init;
        union sctp_params addrs;
        size_t chunksize;
@@ -278,7 +279,7 @@ struct sctp_chunk *sctp_make_init(const struct sctp_association *asoc,
        chunksize += vparam_len;
 
        /* Account for AUTH related parameters */
-       if (net->sctp.auth_enable) {
+       if (ep->auth_enable) {
                /* Add random parameter length*/
                chunksize += sizeof(asoc->c.auth_random);
 
@@ -363,7 +364,7 @@ struct sctp_chunk *sctp_make_init(const struct sctp_association *asoc,
        }
 
        /* Add SCTP-AUTH chunks to the parameter list */
-       if (net->sctp.auth_enable) {
+       if (ep->auth_enable) {
                sctp_addto_chunk(retval, sizeof(asoc->c.auth_random),
                                 asoc->c.auth_random);
                if (auth_hmacs)
@@ -2010,7 +2011,7 @@ static void sctp_process_ext_param(struct sctp_association *asoc,
                        /* if the peer reports AUTH, assume that he
                         * supports AUTH.
                         */
-                       if (net->sctp.auth_enable)
+                       if (asoc->ep->auth_enable)
                                asoc->peer.auth_capable = 1;
                        break;
                case SCTP_CID_ASCONF:
@@ -2102,6 +2103,7 @@ static sctp_ierror_t sctp_process_unk_param(const struct sctp_association *asoc,
  *     SCTP_IERROR_NO_ERROR - continue with the chunk
  */
 static sctp_ierror_t sctp_verify_param(struct net *net,
+                                       const struct sctp_endpoint *ep,
                                        const struct sctp_association *asoc,
                                        union sctp_params param,
                                        sctp_cid_t cid,
@@ -2152,7 +2154,7 @@ static sctp_ierror_t sctp_verify_param(struct net *net,
                goto fallthrough;
 
        case SCTP_PARAM_RANDOM:
-               if (!net->sctp.auth_enable)
+               if (!ep->auth_enable)
                        goto fallthrough;
 
                /* SCTP-AUTH: Secion 6.1
@@ -2169,7 +2171,7 @@ static sctp_ierror_t sctp_verify_param(struct net *net,
                break;
 
        case SCTP_PARAM_CHUNKS:
-               if (!net->sctp.auth_enable)
+               if (!ep->auth_enable)
                        goto fallthrough;
 
                /* SCTP-AUTH: Section 3.2
@@ -2185,7 +2187,7 @@ static sctp_ierror_t sctp_verify_param(struct net *net,
                break;
 
        case SCTP_PARAM_HMAC_ALGO:
-               if (!net->sctp.auth_enable)
+               if (!ep->auth_enable)
                        goto fallthrough;
 
                hmacs = (struct sctp_hmac_algo_param *)param.p;
@@ -2220,10 +2222,9 @@ fallthrough:
 }
 
 /* Verify the INIT packet before we process it.  */
-int sctp_verify_init(struct net *net, const struct sctp_association *asoc,
-                    sctp_cid_t cid,
-                    sctp_init_chunk_t *peer_init,
-                    struct sctp_chunk *chunk,
+int sctp_verify_init(struct net *net, const struct sctp_endpoint *ep,
+                    const struct sctp_association *asoc, sctp_cid_t cid,
+                    sctp_init_chunk_t *peer_init, struct sctp_chunk *chunk,
                     struct sctp_chunk **errp)
 {
        union sctp_params param;
@@ -2264,8 +2265,8 @@ int sctp_verify_init(struct net *net, const struct sctp_association *asoc,
 
        /* Verify all the variable length parameters */
        sctp_walk_params(param, peer_init, init_hdr.params) {
-
-               result = sctp_verify_param(net, asoc, param, cid, chunk, errp);
+               result = sctp_verify_param(net, ep, asoc, param, cid,
+                                          chunk, errp);
                switch (result) {
                case SCTP_IERROR_ABORT:
                case SCTP_IERROR_NOMEM:
@@ -2497,6 +2498,7 @@ static int sctp_process_param(struct sctp_association *asoc,
        struct sctp_af *af;
        union sctp_addr_param *addr_param;
        struct sctp_transport *t;
+       struct sctp_endpoint *ep = asoc->ep;
 
        /* We maintain all INIT parameters in network byte order all the
         * time.  This allows us to not worry about whether the parameters
@@ -2636,7 +2638,7 @@ do_addr_param:
                goto fall_through;
 
        case SCTP_PARAM_RANDOM:
-               if (!net->sctp.auth_enable)
+               if (!ep->auth_enable)
                        goto fall_through;
 
                /* Save peer's random parameter */
@@ -2649,7 +2651,7 @@ do_addr_param:
                break;
 
        case SCTP_PARAM_HMAC_ALGO:
-               if (!net->sctp.auth_enable)
+               if (!ep->auth_enable)
                        goto fall_through;
 
                /* Save peer's HMAC list */
@@ -2665,7 +2667,7 @@ do_addr_param:
                break;
 
        case SCTP_PARAM_CHUNKS:
-               if (!net->sctp.auth_enable)
+               if (!ep->auth_enable)
                        goto fall_through;
 
                asoc->peer.peer_chunks = kmemdup(param.p,
index 01e002430c858c293cdda11bd2962c3340043fb9..5170a1ff95a1dba56ffafc30a9a4fdadf25ce1d4 100644 (file)
@@ -357,7 +357,7 @@ sctp_disposition_t sctp_sf_do_5_1B_init(struct net *net,
 
        /* Verify the INIT chunk before processing it. */
        err_chunk = NULL;
-       if (!sctp_verify_init(net, asoc, chunk->chunk_hdr->type,
+       if (!sctp_verify_init(net, ep, asoc, chunk->chunk_hdr->type,
                              (sctp_init_chunk_t *)chunk->chunk_hdr, chunk,
                              &err_chunk)) {
                /* This chunk contains fatal error. It is to be discarded.
@@ -524,7 +524,7 @@ sctp_disposition_t sctp_sf_do_5_1C_ack(struct net *net,
 
        /* Verify the INIT chunk before processing it. */
        err_chunk = NULL;
-       if (!sctp_verify_init(net, asoc, chunk->chunk_hdr->type,
+       if (!sctp_verify_init(net, ep, asoc, chunk->chunk_hdr->type,
                              (sctp_init_chunk_t *)chunk->chunk_hdr, chunk,
                              &err_chunk)) {
 
@@ -1430,7 +1430,7 @@ static sctp_disposition_t sctp_sf_do_unexpected_init(
 
        /* Verify the INIT chunk before processing it. */
        err_chunk = NULL;
-       if (!sctp_verify_init(net, asoc, chunk->chunk_hdr->type,
+       if (!sctp_verify_init(net, ep, asoc, chunk->chunk_hdr->type,
                              (sctp_init_chunk_t *)chunk->chunk_hdr, chunk,
                              &err_chunk)) {
                /* This chunk contains fatal error. It is to be discarded.
@@ -6178,7 +6178,7 @@ static int sctp_eat_data(const struct sctp_association *asoc,
         * PMTU.  In cases, such as loopback, this might be a rather
         * large spill over.
         */
-       if ((!chunk->data_accepted) && (!asoc->rwnd ||
+       if ((!chunk->data_accepted) && (!asoc->rwnd || asoc->rwnd_over ||
            (datalen > asoc->rwnd + asoc->frag_point))) {
 
                /* If this is the next TSN, consider reneging to make
index e13519e9df80679a618f4e058dce88443b8add6c..fee06b99a4da8dab4d2b094196af08e23d1f22d4 100644 (file)
@@ -2115,6 +2115,12 @@ static int sctp_recvmsg(struct kiocb *iocb, struct sock *sk,
                sctp_skb_pull(skb, copied);
                skb_queue_head(&sk->sk_receive_queue, skb);
 
+               /* When only partial message is copied to the user, increase
+                * rwnd by that amount. If all the data in the skb is read,
+                * rwnd is updated when the event is freed.
+                */
+               if (!sctp_ulpevent_is_notification(event))
+                       sctp_assoc_rwnd_increase(event->asoc, copied);
                goto out;
        } else if ((event->msg_flags & MSG_NOTIFICATION) ||
                   (event->msg_flags & MSG_EOR))
@@ -3315,10 +3321,10 @@ static int sctp_setsockopt_auth_chunk(struct sock *sk,
                                      char __user *optval,
                                      unsigned int optlen)
 {
-       struct net *net = sock_net(sk);
+       struct sctp_endpoint *ep = sctp_sk(sk)->ep;
        struct sctp_authchunk val;
 
-       if (!net->sctp.auth_enable)
+       if (!ep->auth_enable)
                return -EACCES;
 
        if (optlen != sizeof(struct sctp_authchunk))
@@ -3335,7 +3341,7 @@ static int sctp_setsockopt_auth_chunk(struct sock *sk,
        }
 
        /* add this chunk id to the endpoint */
-       return sctp_auth_ep_add_chunkid(sctp_sk(sk)->ep, val.sauth_chunk);
+       return sctp_auth_ep_add_chunkid(ep, val.sauth_chunk);
 }
 
 /*
@@ -3348,12 +3354,12 @@ static int sctp_setsockopt_hmac_ident(struct sock *sk,
                                      char __user *optval,
                                      unsigned int optlen)
 {
-       struct net *net = sock_net(sk);
+       struct sctp_endpoint *ep = sctp_sk(sk)->ep;
        struct sctp_hmacalgo *hmacs;
        u32 idents;
        int err;
 
-       if (!net->sctp.auth_enable)
+       if (!ep->auth_enable)
                return -EACCES;
 
        if (optlen < sizeof(struct sctp_hmacalgo))
@@ -3370,7 +3376,7 @@ static int sctp_setsockopt_hmac_ident(struct sock *sk,
                goto out;
        }
 
-       err = sctp_auth_ep_set_hmacs(sctp_sk(sk)->ep, hmacs);
+       err = sctp_auth_ep_set_hmacs(ep, hmacs);
 out:
        kfree(hmacs);
        return err;
@@ -3386,12 +3392,12 @@ static int sctp_setsockopt_auth_key(struct sock *sk,
                                    char __user *optval,
                                    unsigned int optlen)
 {
-       struct net *net = sock_net(sk);
+       struct sctp_endpoint *ep = sctp_sk(sk)->ep;
        struct sctp_authkey *authkey;
        struct sctp_association *asoc;
        int ret;
 
-       if (!net->sctp.auth_enable)
+       if (!ep->auth_enable)
                return -EACCES;
 
        if (optlen <= sizeof(struct sctp_authkey))
@@ -3412,7 +3418,7 @@ static int sctp_setsockopt_auth_key(struct sock *sk,
                goto out;
        }
 
-       ret = sctp_auth_set_key(sctp_sk(sk)->ep, asoc, authkey);
+       ret = sctp_auth_set_key(ep, asoc, authkey);
 out:
        kzfree(authkey);
        return ret;
@@ -3428,11 +3434,11 @@ static int sctp_setsockopt_active_key(struct sock *sk,
                                      char __user *optval,
                                      unsigned int optlen)
 {
-       struct net *net = sock_net(sk);
+       struct sctp_endpoint *ep = sctp_sk(sk)->ep;
        struct sctp_authkeyid val;
        struct sctp_association *asoc;
 
-       if (!net->sctp.auth_enable)
+       if (!ep->auth_enable)
                return -EACCES;
 
        if (optlen != sizeof(struct sctp_authkeyid))
@@ -3444,8 +3450,7 @@ static int sctp_setsockopt_active_key(struct sock *sk,
        if (!asoc && val.scact_assoc_id && sctp_style(sk, UDP))
                return -EINVAL;
 
-       return sctp_auth_set_active_key(sctp_sk(sk)->ep, asoc,
-                                       val.scact_keynumber);
+       return sctp_auth_set_active_key(ep, asoc, val.scact_keynumber);
 }
 
 /*
@@ -3457,11 +3462,11 @@ static int sctp_setsockopt_del_key(struct sock *sk,
                                   char __user *optval,
                                   unsigned int optlen)
 {
-       struct net *net = sock_net(sk);
+       struct sctp_endpoint *ep = sctp_sk(sk)->ep;
        struct sctp_authkeyid val;
        struct sctp_association *asoc;
 
-       if (!net->sctp.auth_enable)
+       if (!ep->auth_enable)
                return -EACCES;
 
        if (optlen != sizeof(struct sctp_authkeyid))
@@ -3473,8 +3478,7 @@ static int sctp_setsockopt_del_key(struct sock *sk,
        if (!asoc && val.scact_assoc_id && sctp_style(sk, UDP))
                return -EINVAL;
 
-       return sctp_auth_del_key_id(sctp_sk(sk)->ep, asoc,
-                                   val.scact_keynumber);
+       return sctp_auth_del_key_id(ep, asoc, val.scact_keynumber);
 
 }
 
@@ -5381,16 +5385,16 @@ static int sctp_getsockopt_maxburst(struct sock *sk, int len,
 static int sctp_getsockopt_hmac_ident(struct sock *sk, int len,
                                    char __user *optval, int __user *optlen)
 {
-       struct net *net = sock_net(sk);
+       struct sctp_endpoint *ep = sctp_sk(sk)->ep;
        struct sctp_hmacalgo  __user *p = (void __user *)optval;
        struct sctp_hmac_algo_param *hmacs;
        __u16 data_len = 0;
        u32 num_idents;
 
-       if (!net->sctp.auth_enable)
+       if (!ep->auth_enable)
                return -EACCES;
 
-       hmacs = sctp_sk(sk)->ep->auth_hmacs_list;
+       hmacs = ep->auth_hmacs_list;
        data_len = ntohs(hmacs->param_hdr.length) - sizeof(sctp_paramhdr_t);
 
        if (len < sizeof(struct sctp_hmacalgo) + data_len)
@@ -5411,11 +5415,11 @@ static int sctp_getsockopt_hmac_ident(struct sock *sk, int len,
 static int sctp_getsockopt_active_key(struct sock *sk, int len,
                                    char __user *optval, int __user *optlen)
 {
-       struct net *net = sock_net(sk);
+       struct sctp_endpoint *ep = sctp_sk(sk)->ep;
        struct sctp_authkeyid val;
        struct sctp_association *asoc;
 
-       if (!net->sctp.auth_enable)
+       if (!ep->auth_enable)
                return -EACCES;
 
        if (len < sizeof(struct sctp_authkeyid))
@@ -5430,7 +5434,7 @@ static int sctp_getsockopt_active_key(struct sock *sk, int len,
        if (asoc)
                val.scact_keynumber = asoc->active_key_id;
        else
-               val.scact_keynumber = sctp_sk(sk)->ep->active_key_id;
+               val.scact_keynumber = ep->active_key_id;
 
        len = sizeof(struct sctp_authkeyid);
        if (put_user(len, optlen))
@@ -5444,7 +5448,7 @@ static int sctp_getsockopt_active_key(struct sock *sk, int len,
 static int sctp_getsockopt_peer_auth_chunks(struct sock *sk, int len,
                                    char __user *optval, int __user *optlen)
 {
-       struct net *net = sock_net(sk);
+       struct sctp_endpoint *ep = sctp_sk(sk)->ep;
        struct sctp_authchunks __user *p = (void __user *)optval;
        struct sctp_authchunks val;
        struct sctp_association *asoc;
@@ -5452,7 +5456,7 @@ static int sctp_getsockopt_peer_auth_chunks(struct sock *sk, int len,
        u32    num_chunks = 0;
        char __user *to;
 
-       if (!net->sctp.auth_enable)
+       if (!ep->auth_enable)
                return -EACCES;
 
        if (len < sizeof(struct sctp_authchunks))
@@ -5489,7 +5493,7 @@ num:
 static int sctp_getsockopt_local_auth_chunks(struct sock *sk, int len,
                                    char __user *optval, int __user *optlen)
 {
-       struct net *net = sock_net(sk);
+       struct sctp_endpoint *ep = sctp_sk(sk)->ep;
        struct sctp_authchunks __user *p = (void __user *)optval;
        struct sctp_authchunks val;
        struct sctp_association *asoc;
@@ -5497,7 +5501,7 @@ static int sctp_getsockopt_local_auth_chunks(struct sock *sk, int len,
        u32    num_chunks = 0;
        char __user *to;
 
-       if (!net->sctp.auth_enable)
+       if (!ep->auth_enable)
                return -EACCES;
 
        if (len < sizeof(struct sctp_authchunks))
@@ -5514,7 +5518,7 @@ static int sctp_getsockopt_local_auth_chunks(struct sock *sk, int len,
        if (asoc)
                ch = (struct sctp_chunks_param *)asoc->c.auth_chunks;
        else
-               ch = sctp_sk(sk)->ep->auth_chunk_list;
+               ch = ep->auth_chunk_list;
 
        if (!ch)
                goto num;
index 35c8923b5554aa33549eb872c8d2aaa292b34db1..c82fdc1eab7c359dbee3812db3f3707fa5c65560 100644 (file)
@@ -64,6 +64,9 @@ static int proc_sctp_do_rto_min(struct ctl_table *ctl, int write,
 static int proc_sctp_do_rto_max(struct ctl_table *ctl, int write,
                                void __user *buffer, size_t *lenp,
                                loff_t *ppos);
+static int proc_sctp_do_auth(struct ctl_table *ctl, int write,
+                            void __user *buffer, size_t *lenp,
+                            loff_t *ppos);
 
 static struct ctl_table sctp_table[] = {
        {
@@ -266,7 +269,7 @@ static struct ctl_table sctp_net_table[] = {
                .data           = &init_net.sctp.auth_enable,
                .maxlen         = sizeof(int),
                .mode           = 0644,
-               .proc_handler   = proc_dointvec,
+               .proc_handler   = proc_sctp_do_auth,
        },
        {
                .procname       = "addr_scope_policy",
@@ -400,6 +403,37 @@ static int proc_sctp_do_rto_max(struct ctl_table *ctl, int write,
        return ret;
 }
 
+static int proc_sctp_do_auth(struct ctl_table *ctl, int write,
+                            void __user *buffer, size_t *lenp,
+                            loff_t *ppos)
+{
+       struct net *net = current->nsproxy->net_ns;
+       struct ctl_table tbl;
+       int new_value, ret;
+
+       memset(&tbl, 0, sizeof(struct ctl_table));
+       tbl.maxlen = sizeof(unsigned int);
+
+       if (write)
+               tbl.data = &new_value;
+       else
+               tbl.data = &net->sctp.auth_enable;
+
+       ret = proc_dointvec(&tbl, write, buffer, lenp, ppos);
+
+       if (write) {
+               struct sock *sk = net->sctp.ctl_sock;
+
+               net->sctp.auth_enable = new_value;
+               /* Update the value in the control socket */
+               lock_sock(sk);
+               sctp_sk(sk)->ep->auth_enable = new_value;
+               release_sock(sk);
+       }
+
+       return ret;
+}
+
 int sctp_sysctl_net_register(struct net *net)
 {
        struct ctl_table *table = sctp_net_table;
index 8d198ae0360634d25d3e4cff8a56cf73e389bd2d..85c64658bd0b183df5c7a7fd8394df757cb0b4b0 100644 (file)
@@ -989,7 +989,7 @@ static void sctp_ulpevent_receive_data(struct sctp_ulpevent *event,
        skb = sctp_event2skb(event);
        /* Set the owner and charge rwnd for bytes received.  */
        sctp_ulpevent_set_owner(event, asoc);
-       sctp_assoc_rwnd_update(asoc, false);
+       sctp_assoc_rwnd_decrease(asoc, skb_headlen(skb));
 
        if (!skb->data_len)
                return;
@@ -1011,7 +1011,6 @@ static void sctp_ulpevent_release_data(struct sctp_ulpevent *event)
 {
        struct sk_buff *skb, *frag;
        unsigned int    len;
-       struct sctp_association *asoc;
 
        /* Current stack structures assume that the rcv buffer is
         * per socket.   For UDP style sockets this is not true as
@@ -1036,11 +1035,8 @@ static void sctp_ulpevent_release_data(struct sctp_ulpevent *event)
        }
 
 done:
-       asoc = event->asoc;
-       sctp_association_hold(asoc);
+       sctp_assoc_rwnd_increase(event->asoc, len);
        sctp_ulpevent_release_owner(event);
-       sctp_assoc_rwnd_update(asoc, true);
-       sctp_association_put(asoc);
 }
 
 static void sctp_ulpevent_release_frag_data(struct sctp_ulpevent *event)
index 1b1e7e6a960faae2bf7e4aa2625a2cebc2d49a20..abf56b2a14f9bc0a9f7c83fbcabaa2e97b3eca37 100644 (file)
@@ -1880,8 +1880,8 @@ out:
  *     Receive a datagram from a socket.
  */
 
-asmlinkage long sys_recv(int fd, void __user *ubuf, size_t size,
-                        unsigned int flags)
+SYSCALL_DEFINE4(recv, int, fd, void __user *, ubuf, size_t, size,
+               unsigned int, flags)
 {
        return sys_recvfrom(fd, ubuf, size, flags, NULL, NULL);
 }
index f02f511b710741e1779d389ac69bfc75a17ab42f..c08fbd11ceff52ee145316a33758feb30667f02d 100644 (file)
@@ -1842,7 +1842,7 @@ purge_queue:
        xfrm_pol_put(pol);
 }
 
-static int xdst_queue_output(struct sk_buff *skb)
+static int xdst_queue_output(struct sock *sk, struct sk_buff *skb)
 {
        unsigned long sched_next;
        struct dst_entry *dst = skb_dst(skb);
index b4beb77967b17949daf46623a822cb7e960e8829..2c7341dbc5d68d1948ad0efa713ad3a85307608e 100644 (file)
@@ -3317,9 +3317,9 @@ static int selinux_file_fcntl(struct file *file, unsigned int cmd,
        case F_GETLK:
        case F_SETLK:
        case F_SETLKW:
-       case F_GETLKP:
-       case F_SETLKP:
-       case F_SETLKPW:
+       case F_OFD_GETLK:
+       case F_OFD_SETLK:
+       case F_OFD_SETLKW:
 #if BITS_PER_LONG == 32
        case F_GETLK64:
        case F_SETLK64:
index 1c16830af3d8cf73bfd3ff4042d070f556e53d25..6faaac60161a8b629002d55f025ffd750e01da27 100644 (file)
@@ -520,7 +520,7 @@ static int snd_es18xx_playback1_trigger(struct snd_es18xx *chip,
                        snd_es18xx_mixer_write(chip, 0x78, 0x93);
 #ifdef AVOID_POPS
                /* Avoid pops */
-                udelay(100000);
+               mdelay(100);
                if (chip->caps & ES18XX_PCM2)
                        /* Restore Audio 2 volume */
                        snd_es18xx_mixer_write(chip, 0x7C, chip->audio2_vol);
@@ -537,7 +537,7 @@ static int snd_es18xx_playback1_trigger(struct snd_es18xx *chip,
                 /* Stop DMA */
                 snd_es18xx_mixer_write(chip, 0x78, 0x00);
 #ifdef AVOID_POPS
-                udelay(25000);
+               mdelay(25);
                if (chip->caps & ES18XX_PCM2)
                        /* Set Audio 2 volume to 0 */
                        snd_es18xx_mixer_write(chip, 0x7C, 0);
@@ -596,7 +596,7 @@ static int snd_es18xx_capture_prepare(struct snd_pcm_substream *substream)
        snd_es18xx_write(chip, 0xA5, count >> 8);
 
 #ifdef AVOID_POPS
-       udelay(100000);
+       mdelay(100);
 #endif
 
         /* Set format */
@@ -691,7 +691,7 @@ static int snd_es18xx_playback2_trigger(struct snd_es18xx *chip,
                 snd_es18xx_write(chip, 0xB8, 0x05);
 #ifdef AVOID_POPS
                /* Avoid pops */
-                udelay(100000);
+               mdelay(100);
                 /* Enable Audio 1 */
                 snd_es18xx_dsp_command(chip, 0xD1);
 #endif
@@ -705,7 +705,7 @@ static int snd_es18xx_playback2_trigger(struct snd_es18xx *chip,
                 snd_es18xx_write(chip, 0xB8, 0x00);
 #ifdef AVOID_POPS
                /* Avoid pops */
-                udelay(25000);
+               mdelay(25);
                 /* Disable Audio 1 */
                 snd_es18xx_dsp_command(chip, 0xD3);
 #endif
index 248b90abb8825a62e9530a0629cbf432898898d3..480bbddbd801bf002e4cc43fb8c7c0f762ec40c8 100644 (file)
@@ -1059,24 +1059,26 @@ static void azx_init_cmd_io(struct azx *chip)
 
        /* reset the corb hw read pointer */
        azx_writew(chip, CORBRP, ICH6_CORBRP_RST);
-       for (timeout = 1000; timeout > 0; timeout--) {
-               if ((azx_readw(chip, CORBRP) & ICH6_CORBRP_RST) == ICH6_CORBRP_RST)
-                       break;
-               udelay(1);
-       }
-       if (timeout <= 0)
-               dev_err(chip->card->dev, "CORB reset timeout#1, CORBRP = %d\n",
-                       azx_readw(chip, CORBRP));
+       if (!(chip->driver_caps & AZX_DCAPS_CORBRP_SELF_CLEAR)) {
+               for (timeout = 1000; timeout > 0; timeout--) {
+                       if ((azx_readw(chip, CORBRP) & ICH6_CORBRP_RST) == ICH6_CORBRP_RST)
+                               break;
+                       udelay(1);
+               }
+               if (timeout <= 0)
+                       dev_err(chip->card->dev, "CORB reset timeout#1, CORBRP = %d\n",
+                               azx_readw(chip, CORBRP));
 
-       azx_writew(chip, CORBRP, 0);
-       for (timeout = 1000; timeout > 0; timeout--) {
-               if (azx_readw(chip, CORBRP) == 0)
-                       break;
-               udelay(1);
+               azx_writew(chip, CORBRP, 0);
+               for (timeout = 1000; timeout > 0; timeout--) {
+                       if (azx_readw(chip, CORBRP) == 0)
+                               break;
+                       udelay(1);
+               }
+               if (timeout <= 0)
+                       dev_err(chip->card->dev, "CORB reset timeout#2, CORBRP = %d\n",
+                               azx_readw(chip, CORBRP));
        }
-       if (timeout <= 0)
-               dev_err(chip->card->dev, "CORB reset timeout#2, CORBRP = %d\n",
-                       azx_readw(chip, CORBRP));
 
        /* enable corb dma */
        azx_writeb(chip, CORBCTL, ICH6_CORBCTL_RUN);
index d6bca62ef387b92b499dcf5954d5c783543055d1..b540ad71eb0d733ab217550a66ac40eb35e22da6 100644 (file)
@@ -249,7 +249,8 @@ enum {
 /* quirks for Nvidia */
 #define AZX_DCAPS_PRESET_NVIDIA \
        (AZX_DCAPS_NVIDIA_SNOOP | AZX_DCAPS_RIRB_DELAY | AZX_DCAPS_NO_MSI |\
-        AZX_DCAPS_ALIGN_BUFSIZE | AZX_DCAPS_NO_64BIT)
+        AZX_DCAPS_ALIGN_BUFSIZE | AZX_DCAPS_NO_64BIT |\
+        AZX_DCAPS_CORBRP_SELF_CLEAR)
 
 #define AZX_DCAPS_PRESET_CTHDA \
        (AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_4K_BDLE_BOUNDARY)
index ba38b819f9847de7522de9171c1a7794aecc7a8f..4a7cb01fa91226b2cfd3a4a582d02d9899ffa6e0 100644 (file)
@@ -189,6 +189,7 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 };
 #define AZX_DCAPS_COUNT_LPIB_DELAY  (1 << 25)  /* Take LPIB as delay */
 #define AZX_DCAPS_PM_RUNTIME   (1 << 26)       /* runtime PM support */
 #define AZX_DCAPS_I915_POWERWELL (1 << 27)     /* HSW i915 powerwell support */
+#define AZX_DCAPS_CORBRP_SELF_CLEAR (1 << 28)  /* CORBRP clears itself after reset */
 
 /* position fix mode */
 enum {
index 14ae979a92eac7a68185a1ed08882eedf6af735e..c1952c9103398953ba0e05078f2f1a21763c8e90 100644 (file)
@@ -4621,6 +4621,8 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = {
        SND_PCI_QUIRK(0x1028, 0x0667, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE),
        SND_PCI_QUIRK(0x1028, 0x0668, "Dell", ALC255_FIXUP_DELL2_MIC_NO_PRESENCE),
        SND_PCI_QUIRK(0x1028, 0x0669, "Dell", ALC255_FIXUP_DELL2_MIC_NO_PRESENCE),
+       SND_PCI_QUIRK(0x1028, 0x0674, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE),
+       SND_PCI_QUIRK(0x1028, 0x067f, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE),
        SND_PCI_QUIRK(0x1028, 0x15cc, "Dell X5 Precision", ALC269_FIXUP_DELL2_MIC_NO_PRESENCE),
        SND_PCI_QUIRK(0x1028, 0x15cd, "Dell X5 Precision", ALC269_FIXUP_DELL2_MIC_NO_PRESENCE),
        SND_PCI_QUIRK(0x103c, 0x1586, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC2),
@@ -4912,6 +4914,7 @@ static int patch_alc269(struct hda_codec *codec)
                spec->codec_variant = ALC269_TYPE_ALC285;
                break;
        case 0x10ec0286:
+       case 0x10ec0288:
                spec->codec_variant = ALC269_TYPE_ALC286;
                break;
        case 0x10ec0255:
@@ -5539,6 +5542,8 @@ static const struct snd_pci_quirk alc662_fixup_tbl[] = {
        SND_PCI_QUIRK(0x1028, 0x0626, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE),
        SND_PCI_QUIRK(0x1028, 0x0628, "Dell", ALC668_FIXUP_AUTO_MUTE),
        SND_PCI_QUIRK(0x1028, 0x064e, "Dell", ALC668_FIXUP_AUTO_MUTE),
+       SND_PCI_QUIRK(0x1028, 0x0696, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE),
+       SND_PCI_QUIRK(0x1028, 0x0698, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE),
        SND_PCI_QUIRK(0x103c, 0x1632, "HP RP5800", ALC662_FIXUP_HP_RP5800),
        SND_PCI_QUIRK(0x1043, 0x11cd, "Asus N550", ALC662_FIXUP_BASS_1A),
        SND_PCI_QUIRK(0x1043, 0x1477, "ASUS N56VZ", ALC662_FIXUP_BASS_MODE4_CHMAP),
@@ -5781,6 +5786,7 @@ static const struct hda_codec_preset snd_hda_preset_realtek[] = {
        { .id = 0x10ec0284, .name = "ALC284", .patch = patch_alc269 },
        { .id = 0x10ec0285, .name = "ALC285", .patch = patch_alc269 },
        { .id = 0x10ec0286, .name = "ALC286", .patch = patch_alc269 },
+       { .id = 0x10ec0288, .name = "ALC288", .patch = patch_alc269 },
        { .id = 0x10ec0290, .name = "ALC290", .patch = patch_alc269 },
        { .id = 0x10ec0292, .name = "ALC292", .patch = patch_alc269 },
        { .id = 0x10ec0293, .name = "ALC293", .patch = patch_alc269 },
index 174bd546c08b0814bf45a999b307aa9b67e69ad4..bb1149126c544d585cf9d2eba6d98b183ea07fea 100644 (file)
@@ -48,7 +48,6 @@
 
 #include <asm/mach-types.h>
 #include <mach/hardware.h>
-#include <mach/gpio.h>
 
 #include "../codecs/wm8731.h"
 #include "atmel-pcm.h"
index f500905e9373510d2bcfdb583b0569cec5994708..2acf82f4a08a8bed4db26c6c444a0eabec688412 100644 (file)
@@ -1018,13 +1018,13 @@ static int alc5623_i2c_probe(struct i2c_client *client,
                dev_err(&client->dev, "failed to read vendor ID1: %d\n", ret);
                return ret;
        }
-       vid1 = ((vid1 & 0xff) << 8) | (vid1 >> 8);
 
        ret = regmap_read(alc5623->regmap, ALC5623_VENDOR_ID2, &vid2);
        if (ret < 0) {
                dev_err(&client->dev, "failed to read vendor ID2: %d\n", ret);
                return ret;
        }
+       vid2 >>= 8;
 
        if ((vid1 != 0x10ec) || (vid2 != id->driver_data)) {
                dev_err(&client->dev, "unknown or wrong codec\n");
index 460d35547a683d226521591333ce06fe1c5de634..2213a037c893107bcfa584701d58e0541bd59e13 100644 (file)
@@ -1229,8 +1229,10 @@ static int cs42l52_i2c_probe(struct i2c_client *i2c_client,
        }
 
        if (cs42l52->pdata.reset_gpio) {
-               ret = gpio_request_one(cs42l52->pdata.reset_gpio,
-                                      GPIOF_OUT_INIT_HIGH, "CS42L52 /RST");
+               ret = devm_gpio_request_one(&i2c_client->dev,
+                                           cs42l52->pdata.reset_gpio,
+                                           GPIOF_OUT_INIT_HIGH,
+                                           "CS42L52 /RST");
                if (ret < 0) {
                        dev_err(&i2c_client->dev, "Failed to request /RST %d: %d\n",
                                cs42l52->pdata.reset_gpio, ret);
index 0ee60a19a26334dcae0484244fcf9d374965fc88..ae3717992d568fb2ba533634a25e306a9e8fd05b 100644 (file)
@@ -1443,8 +1443,10 @@ static int cs42l73_i2c_probe(struct i2c_client *i2c_client,
        i2c_set_clientdata(i2c_client, cs42l73);
 
        if (cs42l73->pdata.reset_gpio) {
-               ret = gpio_request_one(cs42l73->pdata.reset_gpio,
-                                      GPIOF_OUT_INIT_HIGH, "CS42L73 /RST");
+               ret = devm_gpio_request_one(&i2c_client->dev,
+                                           cs42l73->pdata.reset_gpio,
+                                           GPIOF_OUT_INIT_HIGH,
+                                           "CS42L73 /RST");
                if (ret < 0) {
                        dev_err(&i2c_client->dev, "Failed to request /RST %d: %d\n",
                                cs42l73->pdata.reset_gpio, ret);
index b1835103e9b4002ab44429d40bb16da8372f65aa..d7349bc89ad3085430b57eb0b67a14ea8b3886e6 100644 (file)
@@ -1399,7 +1399,6 @@ static int aic3x_probe(struct snd_soc_codec *codec)
        }
 
        aic3x_add_widgets(codec);
-       list_add(&aic3x->list, &reset_list);
 
        return 0;
 
@@ -1569,7 +1568,13 @@ static int aic3x_i2c_probe(struct i2c_client *i2c,
 
        ret = snd_soc_register_codec(&i2c->dev,
                        &soc_codec_dev_aic3x, &aic3x_dai, 1);
-       return ret;
+
+       if (ret != 0)
+               goto err_gpio;
+
+       list_add(&aic3x->list, &reset_list);
+
+       return 0;
 
 err_gpio:
        if (gpio_is_valid(aic3x->gpio_reset) &&
index b1266790d1174a74497e81d1848436300894b5ea..605a10b2112b3808e8d5a95e282e51daf69eec62 100644 (file)
@@ -144,8 +144,8 @@ enum spdif_gainsel {
 
 /* SPDIF Clock register */
 #define STC_SYSCLK_DIV_OFFSET          11
-#define STC_SYSCLK_DIV_MASK            (0x1ff << STC_TXCLK_SRC_OFFSET)
-#define STC_SYSCLK_DIV(x)              ((((x) - 1) << STC_TXCLK_DIV_OFFSET) & STC_SYSCLK_DIV_MASK)
+#define STC_SYSCLK_DIV_MASK            (0x1ff << STC_SYSCLK_DIV_OFFSET)
+#define STC_SYSCLK_DIV(x)              ((((x) - 1) << STC_SYSCLK_DIV_OFFSET) & STC_SYSCLK_DIV_MASK)
 #define STC_TXCLK_SRC_OFFSET           8
 #define STC_TXCLK_SRC_MASK             (0x7 << STC_TXCLK_SRC_OFFSET)
 #define STC_TXCLK_SRC_SET(x)           ((x << STC_TXCLK_SRC_OFFSET) & STC_TXCLK_SRC_MASK)
index fe8e81aad6461faf545b179f6d1a912369872e6a..30ca14a6a83595d5acf4e644d7f8d50827a99a98 100644 (file)
@@ -136,7 +136,7 @@ struct sst_module_data {
        enum sst_data_type data_type;   /* type of module data */
 
        u32 size;               /* size in bytes */
-       u32 offset;             /* offset in FW file */
+       int32_t offset;         /* offset in FW file */
        u32 data_offset;        /* offset in ADSP memory space */
        void *data;             /* module data */
 };
index f46bb4ddde6fc7550573e5fdd0235afda429044a..50e4246d4b57a2df8c9ad0c54deabb4e346ca572 100644 (file)
@@ -617,7 +617,7 @@ static void hsw_notification_work(struct work_struct *work)
        case IPC_POSITION_CHANGED:
                trace_ipc_notification("DSP stream position changed for",
                        stream->reply.stream_hw_id);
-               sst_dsp_inbox_read(hsw->dsp, pos, sizeof(pos));
+               sst_dsp_inbox_read(hsw->dsp, pos, sizeof(*pos));
 
                if (stream->notify_position)
                        stream->notify_position(stream, stream->pdata);
@@ -991,7 +991,8 @@ int sst_hsw_stream_get_volume(struct sst_hsw *hsw, struct sst_hsw_stream *stream
                return -EINVAL;
 
        sst_dsp_read(hsw->dsp, volume,
-               stream->reply.volume_register_address[channel], sizeof(volume));
+               stream->reply.volume_register_address[channel],
+               sizeof(*volume));
 
        return 0;
 }
@@ -1609,7 +1610,7 @@ int sst_hsw_dx_set_state(struct sst_hsw *hsw,
        trace_ipc_request("PM enter Dx state", state);
 
        ret = ipc_tx_message_wait(hsw, header, &state_, sizeof(state_),
-               dx, sizeof(dx));
+               dx, sizeof(*dx));
        if (ret < 0) {
                dev_err(hsw->dev, "ipc: error set dx state %d failed\n", state);
                return ret;
index be873c1b0c204f4f902bfc7e2edad8c10d623e15..d32c540555c41b6c3f9b8f5817a5baa09b5ca47b 100644 (file)
@@ -1,10 +1,8 @@
 #
 # Jz4740 Platform Support
 #
-snd-soc-jz4740-objs := jz4740-pcm.o
 snd-soc-jz4740-i2s-objs := jz4740-i2s.o
 
-obj-$(CONFIG_SND_JZ4740_SOC) += snd-soc-jz4740.o
 obj-$(CONFIG_SND_JZ4740_SOC_I2S) += snd-soc-jz4740-i2s.o
 
 # Jz4740 Machine Support
index 6232b7d307aab2c553bad3c7b6a19f7f69ac997e..4d0720ed5a906d86315971a869028011c3c3a7af 100644 (file)
@@ -258,7 +258,7 @@ static int rsnd_src_init(struct rsnd_mod *mod,
 {
        struct rsnd_src *src = rsnd_mod_to_src(mod);
 
-       clk_enable(src->clk);
+       clk_prepare_enable(src->clk);
 
        return 0;
 }
@@ -269,7 +269,7 @@ static int rsnd_src_quit(struct rsnd_mod *mod,
 {
        struct rsnd_src *src = rsnd_mod_to_src(mod);
 
-       clk_disable(src->clk);
+       clk_disable_unprepare(src->clk);
 
        return 0;
 }
index 4b7e20603dd7be8032198291ee08ed9b95de88dd..1d8387c25bd85f5b312db49e42109fdfd064815f 100644 (file)
@@ -171,7 +171,7 @@ static void rsnd_ssi_hw_start(struct rsnd_ssi *ssi,
        u32 cr;
 
        if (0 == ssi->usrcnt) {
-               clk_enable(ssi->clk);
+               clk_prepare_enable(ssi->clk);
 
                if (rsnd_dai_is_clk_master(rdai)) {
                        if (rsnd_ssi_clk_from_parent(ssi))
@@ -230,7 +230,7 @@ static void rsnd_ssi_hw_stop(struct rsnd_ssi *ssi,
                                rsnd_ssi_master_clk_stop(ssi);
                }
 
-               clk_disable(ssi->clk);
+               clk_disable_unprepare(ssi->clk);
        }
 
        dev_dbg(dev, "ssi%d hw stopped\n", rsnd_mod_id(&ssi->mod));
index c8a780d0d057f43b08e74fc7c6d57f414e8aecde..7769b0a2bc5a5287f932d20524216f7c390fd4c7 100644 (file)
@@ -254,7 +254,6 @@ static int dapm_kcontrol_data_alloc(struct snd_soc_dapm_widget *widget,
 static void dapm_kcontrol_free(struct snd_kcontrol *kctl)
 {
        struct dapm_kcontrol_data *data = snd_kcontrol_chip(kctl);
-       kfree(data->widget);
        kfree(data->wlist);
        kfree(data);
 }
index 4ecc4fd0bc1bd9f21effb6b3792f8029c808a91b..fba1c75aa484f6923ac562f5402f3bad4b2f1a0d 100644 (file)
@@ -82,8 +82,10 @@ static int hv_start_fcopy(struct hv_start_fcopy *smsg)
 
        if (!access(target_fname, F_OK)) {
                syslog(LOG_INFO, "File: %s exists", target_fname);
-               if (!smsg->copy_flags & OVER_WRITE)
+               if (!(smsg->copy_flags & OVER_WRITE)) {
+                       error = HV_ERROR_ALREADY_EXISTS;
                        goto done;
+               }
        }
 
        target_fd = open(target_fname, O_RDWR | O_CREAT | O_CLOEXEC, 0744);
index 7c43479623537af4f0d4179f4cce195cbea3e9b1..a74fba6d774353d33fac7f04b71abdd241e0218e 100644 (file)
@@ -12,8 +12,8 @@
 char debugfs_mountpoint[PATH_MAX + 1] = "/sys/kernel/debug";
 
 static const char * const debugfs_known_mountpoints[] = {
-       "/sys/kernel/debug/",
-       "/debug/",
+       "/sys/kernel/debug",
+       "/debug",
        0,
 };
 
index 07b0b7542511e9912e830b11885e1212bbf63a76..cb09d3ff8f5856dab489130133ec9c2e2ba73db8 100644 (file)
@@ -1,13 +1,8 @@
-# liblockdep version
-LL_VERSION = 0
-LL_PATCHLEVEL = 0
-LL_EXTRAVERSION = 1
-
 # file format version
 FILE_VERSION = 1
 
 MAKEFLAGS += --no-print-directory
-
+LIBLOCKDEP_VERSION=$(shell make -sC ../../.. kernelversion)
 
 # Makefiles suck: This macro sets a default value of $(2) for the
 # variable named by $(1), unless the variable has been set by
@@ -98,7 +93,7 @@ export prefix libdir bindir src obj
 libdir_SQ = $(subst ','\'',$(libdir))
 bindir_SQ = $(subst ','\'',$(bindir))
 
-LIB_FILE = liblockdep.a liblockdep.so
+LIB_FILE = liblockdep.a liblockdep.so.$(LIBLOCKDEP_VERSION)
 BIN_FILE = lockdep
 
 CONFIG_INCLUDES =
@@ -110,8 +105,6 @@ N           =
 
 export Q VERBOSE
 
-LIBLOCKDEP_VERSION = $(LL_VERSION).$(LL_PATCHLEVEL).$(LL_EXTRAVERSION)
-
 INCLUDES = -I. -I/usr/local/include -I./uinclude -I./include $(CONFIG_INCLUDES)
 
 # Set compile option CFLAGS if not set elsewhere
@@ -146,7 +139,7 @@ do_app_build =                                              \
 
 do_compile_shared_library =                    \
        ($(print_shared_lib_compile)            \
-       $(CC) --shared $^ -o $@ -lpthread -ldl)
+       $(CC) --shared $^ -o $@ -lpthread -ldl -Wl,-soname='"$@"';$(shell ln -s $@ liblockdep.so))
 
 do_build_static_lib =                          \
        ($(print_static_lib_build)              \
@@ -177,7 +170,7 @@ all: all_cmd
 
 all_cmd: $(CMD_TARGETS)
 
-liblockdep.so: $(PEVENT_LIB_OBJS)
+liblockdep.so.$(LIBLOCKDEP_VERSION): $(PEVENT_LIB_OBJS)
        $(Q)$(do_compile_shared_library)
 
 liblockdep.a: $(PEVENT_LIB_OBJS)
index d0f5d6e502147fba407cdcb8acb94b8db5bffcd4..c1552c28507e472159ebd3fecee88811e51ff263 100644 (file)
@@ -10,6 +10,9 @@
 
 #define MAX_LOCK_DEPTH 2000UL
 
+#define asmlinkage
+#define __visible
+
 #include "../../../include/linux/lockdep.h"
 
 struct task_struct {
index 1587ea392ad6d83acb0de14b1701db12fa4fc95c..b83184f2d484f59f3a888648fd3f548c0dc37d12 100644 (file)
@@ -50,6 +50,18 @@ static int show_warning = 1;
                        warning(fmt, ##__VA_ARGS__);    \
        } while (0)
 
+#define do_warning_event(event, fmt, ...)                      \
+       do {                                                    \
+               if (!show_warning)                              \
+                       continue;                               \
+                                                               \
+               if (event)                                      \
+                       warning("[%s:%s] " fmt, event->system,  \
+                               event->name, ##__VA_ARGS__);    \
+               else                                            \
+                       warning(fmt, ##__VA_ARGS__);            \
+       } while (0)
+
 static void init_input_buf(const char *buf, unsigned long long size)
 {
        input_buf = buf;
@@ -1355,7 +1367,7 @@ static int event_read_fields(struct event_format *event, struct format_field **f
                }
 
                if (!field->type) {
-                       do_warning("%s: no type found", __func__);
+                       do_warning_event(event, "%s: no type found", __func__);
                        goto fail;
                }
                field->name = last_token;
@@ -1402,7 +1414,7 @@ static int event_read_fields(struct event_format *event, struct format_field **f
                                free_token(token);
                                type = read_token(&token);
                                if (type == EVENT_NONE) {
-                                       do_warning("failed to find token");
+                                       do_warning_event(event, "failed to find token");
                                        goto fail;
                                }
                        }
@@ -1636,7 +1648,7 @@ process_cond(struct event_format *event, struct print_arg *top, char **tok)
        right = alloc_arg();
 
        if (!arg || !left || !right) {
-               do_warning("%s: not enough memory!", __func__);
+               do_warning_event(event, "%s: not enough memory!", __func__);
                /* arg will be freed at out_free */
                free_arg(left);
                free_arg(right);
@@ -1686,7 +1698,7 @@ process_array(struct event_format *event, struct print_arg *top, char **tok)
 
        arg = alloc_arg();
        if (!arg) {
-               do_warning("%s: not enough memory!", __func__);
+               do_warning_event(event, "%s: not enough memory!", __func__);
                /* '*tok' is set to top->op.op.  No need to free. */
                *tok = NULL;
                return EVENT_ERROR;
@@ -1792,7 +1804,7 @@ process_op(struct event_format *event, struct print_arg *arg, char **tok)
        if (arg->type == PRINT_OP && !arg->op.left) {
                /* handle single op */
                if (token[1]) {
-                       do_warning("bad op token %s", token);
+                       do_warning_event(event, "bad op token %s", token);
                        goto out_free;
                }
                switch (token[0]) {
@@ -1802,7 +1814,7 @@ process_op(struct event_format *event, struct print_arg *arg, char **tok)
                case '-':
                        break;
                default:
-                       do_warning("bad op token %s", token);
+                       do_warning_event(event, "bad op token %s", token);
                        goto out_free;
 
                }
@@ -1888,7 +1900,7 @@ process_op(struct event_format *event, struct print_arg *arg, char **tok)
                        char *new_atom;
 
                        if (left->type != PRINT_ATOM) {
-                               do_warning("bad pointer type");
+                               do_warning_event(event, "bad pointer type");
                                goto out_free;
                        }
                        new_atom = realloc(left->atom.atom,
@@ -1930,7 +1942,7 @@ process_op(struct event_format *event, struct print_arg *arg, char **tok)
                type = process_array(event, arg, tok);
 
        } else {
-               do_warning("unknown op '%s'", token);
+               do_warning_event(event, "unknown op '%s'", token);
                event->flags |= EVENT_FL_FAILED;
                /* the arg is now the left side */
                goto out_free;
@@ -1951,7 +1963,7 @@ process_op(struct event_format *event, struct print_arg *arg, char **tok)
        return type;
 
 out_warn_free:
-       do_warning("%s: not enough memory!", __func__);
+       do_warning_event(event, "%s: not enough memory!", __func__);
 out_free:
        free_token(token);
        *tok = NULL;
@@ -2385,7 +2397,7 @@ process_flags(struct event_format *event, struct print_arg *arg, char **tok)
 
        field = alloc_arg();
        if (!field) {
-               do_warning("%s: not enough memory!", __func__);
+               do_warning_event(event, "%s: not enough memory!", __func__);
                goto out_free;
        }
 
@@ -2438,7 +2450,7 @@ process_symbols(struct event_format *event, struct print_arg *arg, char **tok)
 
        field = alloc_arg();
        if (!field) {
-               do_warning("%s: not enough memory!", __func__);
+               do_warning_event(event, "%s: not enough memory!", __func__);
                goto out_free;
        }
 
@@ -2477,7 +2489,7 @@ process_hex(struct event_format *event, struct print_arg *arg, char **tok)
 
        field = alloc_arg();
        if (!field) {
-               do_warning("%s: not enough memory!", __func__);
+               do_warning_event(event, "%s: not enough memory!", __func__);
                goto out_free;
        }
 
@@ -2492,7 +2504,7 @@ process_hex(struct event_format *event, struct print_arg *arg, char **tok)
 
        field = alloc_arg();
        if (!field) {
-               do_warning("%s: not enough memory!", __func__);
+               do_warning_event(event, "%s: not enough memory!", __func__);
                *tok = NULL;
                return EVENT_ERROR;
        }
@@ -2555,7 +2567,7 @@ process_dynamic_array(struct event_format *event, struct print_arg *arg, char **
        free_token(token);
        arg = alloc_arg();
        if (!arg) {
-               do_warning("%s: not enough memory!", __func__);
+               do_warning_event(event, "%s: not enough memory!", __func__);
                *tok = NULL;
                return EVENT_ERROR;
        }
@@ -2614,13 +2626,14 @@ process_paren(struct event_format *event, struct print_arg *arg, char **tok)
 
                /* prevous must be an atom */
                if (arg->type != PRINT_ATOM) {
-                       do_warning("previous needed to be PRINT_ATOM");
+                       do_warning_event(event, "previous needed to be PRINT_ATOM");
                        goto out_free;
                }
 
                item_arg = alloc_arg();
                if (!item_arg) {
-                       do_warning("%s: not enough memory!", __func__);
+                       do_warning_event(event, "%s: not enough memory!",
+                                        __func__);
                        goto out_free;
                }
 
@@ -2721,21 +2734,24 @@ process_func_handler(struct event_format *event, struct pevent_function_handler
        for (i = 0; i < func->nr_args; i++) {
                farg = alloc_arg();
                if (!farg) {
-                       do_warning("%s: not enough memory!", __func__);
+                       do_warning_event(event, "%s: not enough memory!",
+                                        __func__);
                        return EVENT_ERROR;
                }
 
                type = process_arg(event, farg, &token);
                if (i < (func->nr_args - 1)) {
                        if (type != EVENT_DELIM || strcmp(token, ",") != 0) {
-                               warning("Error: function '%s()' expects %d arguments but event %s only uses %d",
+                               do_warning_event(event,
+                                       "Error: function '%s()' expects %d arguments but event %s only uses %d",
                                        func->name, func->nr_args,
                                        event->name, i + 1);
                                goto err;
                        }
                } else {
                        if (type != EVENT_DELIM || strcmp(token, ")") != 0) {
-                               warning("Error: function '%s()' only expects %d arguments but event %s has more",
+                               do_warning_event(event,
+                                       "Error: function '%s()' only expects %d arguments but event %s has more",
                                        func->name, func->nr_args, event->name);
                                goto err;
                        }
@@ -2792,7 +2808,7 @@ process_function(struct event_format *event, struct print_arg *arg,
                return process_func_handler(event, func, arg, tok);
        }
 
-       do_warning("function %s not defined", token);
+       do_warning_event(event, "function %s not defined", token);
        free_token(token);
        return EVENT_ERROR;
 }
@@ -2878,7 +2894,7 @@ process_arg_token(struct event_format *event, struct print_arg *arg,
 
        case EVENT_ERROR ... EVENT_NEWLINE:
        default:
-               do_warning("unexpected type %d", type);
+               do_warning_event(event, "unexpected type %d", type);
                return EVENT_ERROR;
        }
        *tok = token;
@@ -2901,7 +2917,8 @@ static int event_read_print_args(struct event_format *event, struct print_arg **
 
                arg = alloc_arg();
                if (!arg) {
-                       do_warning("%s: not enough memory!", __func__);
+                       do_warning_event(event, "%s: not enough memory!",
+                                        __func__);
                        return -1;
                }
 
@@ -3481,11 +3498,12 @@ eval_num_arg(void *data, int size, struct event_format *event, struct print_arg
        return val;
 
 out_warning_op:
-       do_warning("%s: unknown op '%s'", __func__, arg->op.op);
+       do_warning_event(event, "%s: unknown op '%s'", __func__, arg->op.op);
        return 0;
 
 out_warning_field:
-       do_warning("%s: field %s not found", __func__, arg->field.name);
+       do_warning_event(event, "%s: field %s not found",
+                        __func__, arg->field.name);
        return 0;
 }
 
@@ -3591,7 +3609,8 @@ static void print_str_arg(struct trace_seq *s, void *data, int size,
                }
                str = malloc(len + 1);
                if (!str) {
-                       do_warning("%s: not enough memory!", __func__);
+                       do_warning_event(event, "%s: not enough memory!",
+                                        __func__);
                        return;
                }
                memcpy(str, data + field->offset, len);
@@ -3697,7 +3716,8 @@ static void print_str_arg(struct trace_seq *s, void *data, int size,
        return;
 
 out_warning_field:
-       do_warning("%s: field %s not found", __func__, arg->field.name);
+       do_warning_event(event, "%s: field %s not found",
+                        __func__, arg->field.name);
 }
 
 static unsigned long long
@@ -3742,14 +3762,16 @@ process_defined_func(struct trace_seq *s, void *data, int size,
                        trace_seq_terminate(&str);
                        string = malloc(sizeof(*string));
                        if (!string) {
-                               do_warning("%s(%d): malloc str", __func__, __LINE__);
+                               do_warning_event(event, "%s(%d): malloc str",
+                                                __func__, __LINE__);
                                goto out_free;
                        }
                        string->next = strings;
                        string->str = strdup(str.buffer);
                        if (!string->str) {
                                free(string);
-                               do_warning("%s(%d): malloc str", __func__, __LINE__);
+                               do_warning_event(event, "%s(%d): malloc str",
+                                                __func__, __LINE__);
                                goto out_free;
                        }
                        args[i] = (uintptr_t)string->str;
@@ -3761,7 +3783,7 @@ process_defined_func(struct trace_seq *s, void *data, int size,
                         * Something went totally wrong, this is not
                         * an input error, something in this code broke.
                         */
-                       do_warning("Unexpected end of arguments\n");
+                       do_warning_event(event, "Unexpected end of arguments\n");
                        goto out_free;
                }
                farg = farg->next;
@@ -3811,12 +3833,12 @@ static struct print_arg *make_bprint_args(char *fmt, void *data, int size, struc
        if (!field) {
                field = pevent_find_field(event, "buf");
                if (!field) {
-                       do_warning("can't find buffer field for binary printk");
+                       do_warning_event(event, "can't find buffer field for binary printk");
                        return NULL;
                }
                ip_field = pevent_find_field(event, "ip");
                if (!ip_field) {
-                       do_warning("can't find ip field for binary printk");
+                       do_warning_event(event, "can't find ip field for binary printk");
                        return NULL;
                }
                pevent->bprint_buf_field = field;
@@ -3830,7 +3852,8 @@ static struct print_arg *make_bprint_args(char *fmt, void *data, int size, struc
         */
        args = alloc_arg();
        if (!args) {
-               do_warning("%s(%d): not enough memory!", __func__, __LINE__);
+               do_warning_event(event, "%s(%d): not enough memory!",
+                                __func__, __LINE__);
                return NULL;
        }
        arg = args;
@@ -3896,7 +3919,7 @@ static struct print_arg *make_bprint_args(char *fmt, void *data, int size, struc
                                bptr += vsize;
                                arg = alloc_arg();
                                if (!arg) {
-                                       do_warning("%s(%d): not enough memory!",
+                                       do_warning_event(event, "%s(%d): not enough memory!",
                                                   __func__, __LINE__);
                                        goto out_free;
                                }
@@ -3919,7 +3942,7 @@ static struct print_arg *make_bprint_args(char *fmt, void *data, int size, struc
                        case 's':
                                arg = alloc_arg();
                                if (!arg) {
-                                       do_warning("%s(%d): not enough memory!",
+                                       do_warning_event(event, "%s(%d): not enough memory!",
                                                   __func__, __LINE__);
                                        goto out_free;
                                }
@@ -3959,7 +3982,7 @@ get_bprint_format(void *data, int size __maybe_unused,
        if (!field) {
                field = pevent_find_field(event, "fmt");
                if (!field) {
-                       do_warning("can't find format field for binary printk");
+                       do_warning_event(event, "can't find format field for binary printk");
                        return NULL;
                }
                pevent->bprint_fmt_field = field;
@@ -4003,8 +4026,8 @@ static void print_mac_arg(struct trace_seq *s, int mac, void *data, int size,
                arg->field.field =
                        pevent_find_any_field(event, arg->field.name);
                if (!arg->field.field) {
-                       do_warning("%s: field %s not found",
-                                  __func__, arg->field.name);
+                       do_warning_event(event, "%s: field %s not found",
+                                        __func__, arg->field.name);
                        return;
                }
        }
@@ -4176,7 +4199,7 @@ static void pretty_print(struct trace_seq *s, void *data, int size, struct event
                        case '*':
                                /* The argument is the length. */
                                if (!arg) {
-                                       do_warning("no argument match");
+                                       do_warning_event(event, "no argument match");
                                        event->flags |= EVENT_FL_FAILED;
                                        goto out_failed;
                                }
@@ -4213,7 +4236,7 @@ static void pretty_print(struct trace_seq *s, void *data, int size, struct event
                        case 'X':
                        case 'u':
                                if (!arg) {
-                                       do_warning("no argument match");
+                                       do_warning_event(event, "no argument match");
                                        event->flags |= EVENT_FL_FAILED;
                                        goto out_failed;
                                }
@@ -4223,7 +4246,7 @@ static void pretty_print(struct trace_seq *s, void *data, int size, struct event
 
                                /* should never happen */
                                if (len > 31) {
-                                       do_warning("bad format!");
+                                       do_warning_event(event, "bad format!");
                                        event->flags |= EVENT_FL_FAILED;
                                        len = 31;
                                }
@@ -4290,13 +4313,13 @@ static void pretty_print(struct trace_seq *s, void *data, int size, struct event
                                                trace_seq_printf(s, format, (long long)val);
                                        break;
                                default:
-                                       do_warning("bad count (%d)", ls);
+                                       do_warning_event(event, "bad count (%d)", ls);
                                        event->flags |= EVENT_FL_FAILED;
                                }
                                break;
                        case 's':
                                if (!arg) {
-                                       do_warning("no matching argument");
+                                       do_warning_event(event, "no matching argument");
                                        event->flags |= EVENT_FL_FAILED;
                                        goto out_failed;
                                }
@@ -4306,7 +4329,7 @@ static void pretty_print(struct trace_seq *s, void *data, int size, struct event
 
                                /* should never happen */
                                if (len > 31) {
-                                       do_warning("bad format!");
+                                       do_warning_event(event, "bad format!");
                                        event->flags |= EVENT_FL_FAILED;
                                        len = 31;
                                }
@@ -4321,6 +4344,7 @@ static void pretty_print(struct trace_seq *s, void *data, int size, struct event
                                              format, len_arg, arg);
                                trace_seq_terminate(&p);
                                trace_seq_puts(s, p.buffer);
+                               trace_seq_destroy(&p);
                                arg = arg->next;
                                break;
                        default:
index 791c539374c726b7e4d3ad8f6f75aad575692787..feab942816343aba5023d1b6ab588322e7d45506 100644 (file)
@@ -876,8 +876,8 @@ struct event_filter {
 struct event_filter *pevent_filter_alloc(struct pevent *pevent);
 
 /* for backward compatibility */
-#define FILTER_NONE            PEVENT_ERRNO__FILTER_NOT_FOUND
-#define FILTER_NOEXIST         PEVENT_ERRNO__NO_FILTER
+#define FILTER_NONE            PEVENT_ERRNO__NO_FILTER
+#define FILTER_NOEXIST         PEVENT_ERRNO__FILTER_NOT_FOUND
 #define FILTER_MISS            PEVENT_ERRNO__FILTER_MISS
 #define FILTER_MATCH           PEVENT_ERRNO__FILTER_MATCH
 
index 7065cd6fbdfc576a28d588f778354d15771a2ad1..4464ad770d51257e392dfa801c64adcba72e76d7 100644 (file)
@@ -48,6 +48,12 @@ SUBSYSTEM
 'mem'::
        Memory access performance.
 
+'numa'::
+       NUMA scheduling and MM benchmarks.
+
+'futex'::
+       Futex stressing benchmarks.
+
 'all'::
        All benchmark subsystems.
 
@@ -187,6 +193,22 @@ Show only the result with page faults before memset.
 --no-prefault::
 Show only the result without page faults before memset.
 
+SUITES FOR 'numa'
+~~~~~~~~~~~~~~~~~
+*mem*::
+Suite for evaluating NUMA workloads.
+
+SUITES FOR 'futex'
+~~~~~~~~~~~~~~~~~~
+*hash*::
+Suite for evaluating hash tables.
+
+*wake*::
+Suite for evaluating wake calls.
+
+*requeue*::
+Suite for evaluating requeue calls.
+
 SEE ALSO
 --------
 linkperf:perf[1]
index cdd8d4946dba8f85b6ef6f56062067dd1b2dd622..976b00c6cdb15d56209366d815212e4f5e89290b 100644 (file)
@@ -87,7 +87,6 @@ Default is to monitor all CPUS.
 --realtime=<priority>::
        Collect data with this RT SCHED_FIFO priority.
 
--s <symbol>::
 --sym-annotate=<symbol>::
         Annotate this symbol.
 
index 50d875d970c4331f82dccfa35b6ebd980b1e3ea4..895edd32930ce7283cbda2df8914ba44462fc7ef 100644 (file)
@@ -192,13 +192,13 @@ endif
 export PERL_PATH
 
 $(OUTPUT)util/parse-events-flex.c: util/parse-events.l $(OUTPUT)util/parse-events-bison.c
-       $(QUIET_FLEX)$(FLEX) --header-file=$(OUTPUT)util/parse-events-flex.h $(PARSER_DEBUG_FLEX) -t util/parse-events.l > $(OUTPUT)util/parse-events-flex.c
+       $(QUIET_FLEX)$(FLEX) -o $@ --header-file=$(OUTPUT)util/parse-events-flex.h $(PARSER_DEBUG_FLEX) util/parse-events.l
 
 $(OUTPUT)util/parse-events-bison.c: util/parse-events.y
        $(QUIET_BISON)$(BISON) -v util/parse-events.y -d $(PARSER_DEBUG_BISON) -o $(OUTPUT)util/parse-events-bison.c -p parse_events_
 
 $(OUTPUT)util/pmu-flex.c: util/pmu.l $(OUTPUT)util/pmu-bison.c
-       $(QUIET_FLEX)$(FLEX) --header-file=$(OUTPUT)util/pmu-flex.h -t util/pmu.l > $(OUTPUT)util/pmu-flex.c
+       $(QUIET_FLEX)$(FLEX) -o $@ --header-file=$(OUTPUT)util/pmu-flex.h util/pmu.l
 
 $(OUTPUT)util/pmu-bison.c: util/pmu.y
        $(QUIET_BISON)$(BISON) -v util/pmu.y -d -o $(OUTPUT)util/pmu-bison.c -p perf_pmu_
@@ -589,7 +589,7 @@ $(GTK_OBJS): $(OUTPUT)%.o: %.c $(LIB_H)
        $(QUIET_CC)$(CC) -o $@ -c -fPIC $(CFLAGS) $(GTK_CFLAGS) $<
 
 $(OUTPUT)libperf-gtk.so: $(GTK_OBJS) $(PERFLIBS)
-       $(QUIET_LINK)$(CC) -o $@ -shared $(ALL_LDFLAGS) $(filter %.o,$^) $(GTK_LIBS)
+       $(QUIET_LINK)$(CC) -o $@ -shared $(LDFLAGS) $(filter %.o,$^) $(GTK_LIBS)
 
 $(OUTPUT)builtin-help.o: builtin-help.c $(OUTPUT)common-cmds.h $(OUTPUT)PERF-CFLAGS
        $(QUIET_CC)$(CC) -o $@ -c $(CFLAGS) \
index b602ad93ce630ae3f611ee74f0bb6277c367a09b..83bc2385e6d3c2820958b279f77c4d08342b1e06 100644 (file)
@@ -23,9 +23,10 @@ static int sample_ustack(struct perf_sample *sample,
 
        sp = (unsigned long) regs[PERF_REG_X86_SP];
 
-       map = map_groups__find(&thread->mg, MAP__FUNCTION, (u64) sp);
+       map = map_groups__find(&thread->mg, MAP__VARIABLE, (u64) sp);
        if (!map) {
                pr_debug("failed to get stack map\n");
+               free(buf);
                return -1;
        }
 
index 99167bf644eaa8b376060b6b6d42977e9cd09425..60875d5c556c217d3433487d65cf66382a78d25b 100644 (file)
@@ -1,4 +1,3 @@
-
 #include <linux/linkage.h>
 
 #define AX      0
@@ -90,3 +89,10 @@ ENTRY(perf_regs_load)
        ret
 ENDPROC(perf_regs_load)
 #endif
+
+/*
+ * We need to provide note.GNU-stack section, saying that we want
+ * NOT executable stack. Otherwise the final linking will assume that
+ * the ELF stack should not be restricted at all and set it RWX.
+ */
+.section .note.GNU-stack,"",@progbits
index 97d86d828190950af7f133c1b8be72550070d3d1..ebfa163b80b568af4d2708b1ff3b1980ea16e2b6 100644 (file)
@@ -1593,6 +1593,10 @@ static void init_params(struct params *p, const char *name, int argc, const char
        p->data_rand_walk               = true;
        p->nr_loops                     = -1;
        p->init_random                  = true;
+       p->mb_global_str                = "1";
+       p->nr_proc                      = 1;
+       p->nr_threads                   = 1;
+       p->nr_secs                      = 5;
        p->run_all                      = argc == 1;
 }
 
index 21c164b8f9db2a70a9467e1341fbb6a49a3536a1..0f1e5a2f6ad71651ad1be15fb98a6174ed53646a 100644 (file)
@@ -404,6 +404,7 @@ static struct kvm_event *kvm_alloc_init_event(struct event_key *key)
        }
 
        event->key = *key;
+       init_stats(&event->total.stats);
        return event;
 }
 
index eb524f91bffe5d9098d582e07050734a1c3e5343..8ce62ef7f6c387e3e23a18c51b9ec1cf82e2a189 100644 (file)
@@ -374,7 +374,7 @@ static int __cmd_record(struct record *rec, int argc, const char **argv)
 
        session = perf_session__new(file, false, NULL);
        if (session == NULL) {
-               pr_err("Not enough memory for reading perf file header\n");
+               pr_err("Perf session creation failed.\n");
                return -1;
        }
 
index 8b0e1c9234d9c65798873cf84306c8d16fecfb5d..65a151e360679bca4fbbd346adb550de5e0d5653 100644 (file)
@@ -174,13 +174,20 @@ static inline int perf_evsel__nr_cpus(struct perf_evsel *evsel)
 
 static void perf_evsel__reset_stat_priv(struct perf_evsel *evsel)
 {
-       memset(evsel->priv, 0, sizeof(struct perf_stat));
+       int i;
+       struct perf_stat *ps = evsel->priv;
+
+       for (i = 0; i < 3; i++)
+               init_stats(&ps->res_stats[i]);
 }
 
 static int perf_evsel__alloc_stat_priv(struct perf_evsel *evsel)
 {
        evsel->priv = zalloc(sizeof(struct perf_stat));
-       return evsel->priv == NULL ? -ENOMEM : 0;
+       if (evsel == NULL)
+               return -ENOMEM;
+       perf_evsel__reset_stat_priv(evsel);
+       return 0;
 }
 
 static void perf_evsel__free_stat_priv(struct perf_evsel *evsel)
index c23418225c2c806086012b982faf7769f64efd98..802cf544202b7b06720afc9abb1c9580cf362892 100644 (file)
@@ -34,6 +34,14 @@ ifeq ($(ARCH),arm)
   LIBUNWIND_LIBS = -lunwind -lunwind-arm
 endif
 
+# So far there's only x86 libdw unwind support merged in perf.
+# Disable it on all other architectures in case libdw unwind
+# support is detected in system. Add supported architectures
+# to the check.
+ifneq ($(ARCH),x86)
+  NO_LIBDW_DWARF_UNWIND := 1
+endif
+
 ifeq ($(LIBUNWIND_LIBS),)
   NO_LIBUNWIND := 1
 else
@@ -65,10 +73,9 @@ ifndef NO_LIBELF
   ifdef LIBDW_DIR
     LIBDW_CFLAGS  := -I$(LIBDW_DIR)/include
     LIBDW_LDFLAGS := -L$(LIBDW_DIR)/lib
-
-    FEATURE_CHECK_CFLAGS-libdw-dwarf-unwind := $(LIBDW_CFLAGS)
-    FEATURE_CHECK_LDFLAGS-libdw-dwarf-unwind := $(LIBDW_LDFLAGS) -ldw
   endif
+  FEATURE_CHECK_CFLAGS-libdw-dwarf-unwind := $(LIBDW_CFLAGS)
+  FEATURE_CHECK_LDFLAGS-libdw-dwarf-unwind := $(LIBDW_LDFLAGS) -ldw
 endif
 
 # include ARCH specific config
@@ -110,6 +117,10 @@ CFLAGS += -Wall
 CFLAGS += -Wextra
 CFLAGS += -std=gnu99
 
+# Enforce a non-executable stack, as we may regress (again) in the future by
+# adding assembler files missing the .GNU-stack linker note.
+LDFLAGS += -Wl,-z,noexecstack
+
 EXTLIBS = -lelf -lpthread -lrt -lm -ldl
 
 ifneq ($(OUTPUT),)
@@ -187,7 +198,10 @@ VF_FEATURE_TESTS =                 \
        stackprotector-all              \
        timerfd                         \
        libunwind-debug-frame           \
-       bionic
+       bionic                          \
+       liberty                         \
+       liberty-z                       \
+       cplus-demangle
 
 # Set FEATURE_CHECK_(C|LD)FLAGS-all for all CORE_FEATURE_TESTS features.
 # If in the future we need per-feature checks/flags for features not
@@ -278,6 +292,8 @@ else
       NO_LIBELF := 1
       NO_DWARF := 1
       NO_DEMANGLE := 1
+      NO_LIBUNWIND := 1
+      NO_LIBDW_DWARF_UNWIND := 1
     else
       msg := $(error No gnu/libc-version.h found, please install glibc-dev[el]/glibc-static);
     endif
@@ -503,7 +519,21 @@ else
 endif
 
 ifeq ($(feature-libbfd), 1)
-  EXTLIBS += -lbfd -lz -liberty
+  EXTLIBS += -lbfd
+
+  # call all detections now so we get correct
+  # status in VF output
+  $(call feature_check,liberty)
+  $(call feature_check,liberty-z)
+  $(call feature_check,cplus-demangle)
+
+  ifeq ($(feature-liberty), 1)
+    EXTLIBS += -liberty
+  else
+    ifeq ($(feature-liberty-z), 1)
+      EXTLIBS += -liberty -lz
+    endif
+  endif
 endif
 
 ifdef NO_DEMANGLE
@@ -514,15 +544,10 @@ else
     CFLAGS += -DHAVE_CPLUS_DEMANGLE_SUPPORT
   else
     ifneq ($(feature-libbfd), 1)
-      $(call feature_check,liberty)
-      ifeq ($(feature-liberty), 1)
-        EXTLIBS += -lbfd -liberty
-      else
-        $(call feature_check,liberty-z)
-        ifeq ($(feature-liberty-z), 1)
-          EXTLIBS += -lbfd -liberty -lz
-        else
-          $(call feature_check,cplus-demangle)
+      ifneq ($(feature-liberty), 1)
+        ifneq ($(feature-liberty-z), 1)
+          # we dont have neither HAVE_CPLUS_DEMANGLE_SUPPORT
+          # or any of 'bfd iberty z' trinity
           ifeq ($(feature-cplus-demangle), 1)
             EXTLIBS += -liberty
             CFLAGS += -DHAVE_CPLUS_DEMANGLE_SUPPORT
index 653a8fe2db951d0509d41c26aa11e82550207231..bfb186900ac0427ea5feff590f8055514c6652fa 100644 (file)
@@ -504,6 +504,7 @@ static int do_test_code_reading(bool try_kcore)
                if (ret < 0) {
                        if (!excl_kernel) {
                                excl_kernel = true;
+                               perf_evlist__set_maps(evlist, NULL, NULL);
                                perf_evlist__delete(evlist);
                                evlist = NULL;
                                continue;
index 5daeae1cb4c01b3a87f4c54ee4018199c12aeeb6..2f92d6e7ee007bea58636fe8509757c4f626d77d 100644 (file)
@@ -46,6 +46,7 @@ make_install_man    := install-man
 make_install_html   := install-html
 make_install_info   := install-info
 make_install_pdf    := install-pdf
+make_static         := LDFLAGS=-static
 
 # all the NO_* variable combined
 make_minimal        := NO_LIBPERL=1 NO_LIBPYTHON=1 NO_NEWT=1 NO_GTK2=1
@@ -87,6 +88,7 @@ run += make_install_bin
 # run += make_install_info
 # run += make_install_pdf
 run += make_minimal
+run += make_static
 
 ifneq ($(call has,ctags),)
 run += make_tags
index 1fbcd8bdc11b8b387c4f9f2f1a57ae6807e9e92c..55de44ecebefb5aa74365eb0b04294cfb186585a 100644 (file)
@@ -86,10 +86,17 @@ static int open_file_read(struct perf_data_file *file)
 
 static int open_file_write(struct perf_data_file *file)
 {
+       int fd;
+
        if (check_backup(file))
                return -1;
 
-       return open(file->path, O_CREAT|O_RDWR|O_TRUNC, S_IRUSR|S_IWUSR);
+       fd = open(file->path, O_CREAT|O_RDWR|O_TRUNC, S_IRUSR|S_IWUSR);
+
+       if (fd < 0)
+               pr_err("failed to open %s : %s\n", file->path, strerror(errno));
+
+       return fd;
 }
 
 static int open_file(struct perf_data_file *file)
index a53cd0b8c151cdb898d3711c36e5081846813a15..27c2a5efe4504945bf9c8492b62b8256abc0be33 100644 (file)
@@ -717,7 +717,7 @@ static char *get_kernel_version(const char *root_dir)
 }
 
 static int map_groups__set_modules_path_dir(struct map_groups *mg,
-                               const char *dir_name)
+                               const char *dir_name, int depth)
 {
        struct dirent *dent;
        DIR *dir = opendir(dir_name);
@@ -742,7 +742,15 @@ static int map_groups__set_modules_path_dir(struct map_groups *mg,
                            !strcmp(dent->d_name, ".."))
                                continue;
 
-                       ret = map_groups__set_modules_path_dir(mg, path);
+                       /* Do not follow top-level source and build symlinks */
+                       if (depth == 0) {
+                               if (!strcmp(dent->d_name, "source") ||
+                                   !strcmp(dent->d_name, "build"))
+                                       continue;
+                       }
+
+                       ret = map_groups__set_modules_path_dir(mg, path,
+                                                              depth + 1);
                        if (ret < 0)
                                goto out;
                } else {
@@ -786,11 +794,11 @@ static int machine__set_modules_path(struct machine *machine)
        if (!version)
                return -1;
 
-       snprintf(modules_path, sizeof(modules_path), "%s/lib/modules/%s/kernel",
+       snprintf(modules_path, sizeof(modules_path), "%s/lib/modules/%s",
                 machine->root_dir, version);
        free(version);
 
-       return map_groups__set_modules_path_dir(&machine->kmaps, modules_path);
+       return map_groups__set_modules_path_dir(&machine->kmaps, modules_path, 0);
 }
 
 static int machine__create_module(void *arg, const char *name, u64 start)
index df0238654698d8967120f538a68b6aec5da18426..562762117639de758c775123ba4339c77c6dd944 100644 (file)
@@ -985,7 +985,7 @@ static int debuginfo__find_probes(struct debuginfo *dbg,
 
 #if _ELFUTILS_PREREQ(0, 142)
        /* Get the call frame information from this dwarf */
-       pf->cfi = dwarf_getcfi(dbg->dbg);
+       pf->cfi = dwarf_getcfi_elf(dwarf_getelf(dbg->dbg));
 #endif
 
        off = 0;
@@ -1441,13 +1441,15 @@ static int line_range_walk_cb(const char *fname, int lineno,
                              void *data)
 {
        struct line_finder *lf = data;
+       int err;
 
        if ((strtailcmp(fname, lf->fname) != 0) ||
            (lf->lno_s > lineno || lf->lno_e < lineno))
                return 0;
 
-       if (line_range_add_line(fname, lineno, lf->lr) < 0)
-               return -EINVAL;
+       err = line_range_add_line(fname, lineno, lf->lr);
+       if (err < 0 && err != -EEXIST)
+               return err;
 
        return 0;
 }
@@ -1473,14 +1475,15 @@ static int find_line_range_by_line(Dwarf_Die *sp_die, struct line_finder *lf)
 
 static int line_range_inline_cb(Dwarf_Die *in_die, void *data)
 {
-       find_line_range_by_line(in_die, data);
+       int ret = find_line_range_by_line(in_die, data);
 
        /*
         * We have to check all instances of inlined function, because
         * some execution paths can be optimized out depends on the
-        * function argument of instances
+        * function argument of instances. However, if an error occurs,
+        * it should be handled by the caller.
         */
-       return 0;
+       return ret < 0 ? ret : 0;
 }
 
 /* Search function definition from function name */
index 3b7dbf51d4a93bd425fc41363d98a47acd7288ff..6864661a79dd03a6543d54320f470543304bdb1b 100644 (file)
@@ -6,6 +6,7 @@
 #include <inttypes.h>
 
 #include "symbol.h"
+#include "vdso.h"
 #include <symbol/kallsyms.h>
 #include "debug.h"
 
@@ -618,6 +619,7 @@ int symsrc__init(struct symsrc *ss, struct dso *dso, const char *name,
                GElf_Shdr shdr;
                ss->adjust_symbols = (ehdr.e_type == ET_EXEC ||
                                ehdr.e_type == ET_REL ||
+                               is_vdso_map(dso->short_name) ||
                                elf_section_by_name(elf, &ehdr, &shdr,
                                                     ".gnu.prelink_undo",
                                                     NULL) != NULL);
index d9186a2fdf0696f1a319ba6cac0377a66c1fe112..c2c0f20067a5028ebf304ca4758c830b80ffbe35 100644 (file)
@@ -89,15 +89,6 @@ else
        STRIPCMD = $(STRIP) -s --remove-section=.note --remove-section=.comment
 endif
 
-# if DEBUG is enabled, then we do not strip or optimize
-ifeq ($(strip $(DEBUG)),true)
-       CFLAGS += -O1 -g -DDEBUG
-       STRIPCMD = /bin/true -Since_we_are_debugging
-else
-       CFLAGS += $(OPTIMIZATION) -fomit-frame-pointer
-       STRIPCMD = $(STRIP) -s --remove-section=.note --remove-section=.comment
-endif
-
 # --- ACPIDUMP BEGIN ---
 
 vpath %.c \
@@ -128,7 +119,7 @@ clean:
        -rm -f $(OUTPUT)acpidump
 
 install-tools:
-       $(INSTALL) -d $(DESTDIR)${bindir}
+       $(INSTALL) -d $(DESTDIR)${sbindir}
        $(INSTALL_PROGRAM) $(OUTPUT)acpidump $(DESTDIR)${sbindir}
 
 install-man:
index 47b29834a6b61def09f6340013cc9b2927c03cd9..56ff9bebb577df935200aacfc1e8251ae0800bcc 100644 (file)
@@ -548,11 +548,10 @@ static bool handle_mmio_cfg_reg(struct kvm_vcpu *vcpu,
        u32 val;
        u32 *reg;
 
-       offset >>= 1;
        reg = vgic_bitmap_get_reg(&vcpu->kvm->arch.vgic.irq_cfg,
-                                 vcpu->vcpu_id, offset);
+                                 vcpu->vcpu_id, offset >> 1);
 
-       if (offset & 2)
+       if (offset & 4)
                val = *reg >> 16;
        else
                val = *reg & 0xffff;
@@ -561,13 +560,13 @@ static bool handle_mmio_cfg_reg(struct kvm_vcpu *vcpu,
        vgic_reg_access(mmio, &val, offset,
                        ACCESS_READ_VALUE | ACCESS_WRITE_VALUE);
        if (mmio->is_write) {
-               if (offset < 4) {
+               if (offset < 8) {
                        *reg = ~0U; /* Force PPIs/SGIs to 1 */
                        return false;
                }
 
                val = vgic_cfg_compress(val);
-               if (offset & 2) {
+               if (offset & 4) {
                        *reg &= 0xffff;
                        *reg |= val << 16;
                } else {
@@ -916,6 +915,7 @@ static void vgic_dispatch_sgi(struct kvm_vcpu *vcpu, u32 reg)
        case 0:
                if (!target_cpus)
                        return;
+               break;
 
        case 1:
                target_cpus = ((1 << nrcpus) - 1) & ~(1 << vcpu_id) & 0xff;
@@ -1667,10 +1667,11 @@ static int vgic_ioaddr_assign(struct kvm *kvm, phys_addr_t *ioaddr,
        if (addr + size < addr)
                return -EINVAL;
 
+       *ioaddr = addr;
        ret = vgic_ioaddr_overlap(kvm);
        if (ret)
-               return ret;
-       *ioaddr = addr;
+               *ioaddr = VGIC_ADDR_UNDEF;
+
        return ret;
 }
 
index 8db43701016f30cebeb37ab7e4d581166606b86f..bf06577fea51c22ab944edb9560e56f01aae2f94 100644 (file)
@@ -395,7 +395,8 @@ static int assigned_device_enable_host_msix(struct kvm *kvm,
        if (dev->entries_nr == 0)
                return r;
 
-       r = pci_enable_msix(dev->dev, dev->host_msix_entries, dev->entries_nr);
+       r = pci_enable_msix_exact(dev->dev,
+                                 dev->host_msix_entries, dev->entries_nr);
        if (r)
                return r;
 
index 10df100c4514e856d1ca5509f87f118e37726f57..06e6401d6ef45326edcbce4c8ff96e13286d2940 100644 (file)
@@ -101,7 +101,7 @@ static void async_pf_execute(struct work_struct *work)
        if (waitqueue_active(&vcpu->wq))
                wake_up_interruptible(&vcpu->wq);
 
-       mmdrop(mm);
+       mmput(mm);
        kvm_put_kvm(vcpu->kvm);
 }
 
@@ -118,7 +118,7 @@ void kvm_clear_async_pf_completion_queue(struct kvm_vcpu *vcpu)
                flush_work(&work->work);
 #else
                if (cancel_work_sync(&work->work)) {
-                       mmdrop(work->mm);
+                       mmput(work->mm);
                        kvm_put_kvm(vcpu->kvm); /* == work->vcpu->kvm */
                        kmem_cache_free(async_pf_cache, work);
                }
@@ -183,7 +183,7 @@ int kvm_setup_async_pf(struct kvm_vcpu *vcpu, gva_t gva, unsigned long hva,
        work->addr = hva;
        work->arch = *arch;
        work->mm = current->mm;
-       atomic_inc(&work->mm->mm_count);
+       atomic_inc(&work->mm->mm_users);
        kvm_get_kvm(work->vcpu->kvm);
 
        /* this can't really happen otherwise gfn_to_pfn_async
@@ -201,7 +201,7 @@ int kvm_setup_async_pf(struct kvm_vcpu *vcpu, gva_t gva, unsigned long hva,
        return 1;
 retry_sync:
        kvm_put_kvm(work->vcpu->kvm);
-       mmdrop(work->mm);
+       mmput(work->mm);
        kmem_cache_free(async_pf_cache, work);
        return 0;
 }
index d4b601547f1f13c8f336b2352b46d087bb94e7d6..2458a1dc2ba9f2a84491eca30542b3b247482f27 100644 (file)
@@ -97,6 +97,14 @@ static void rtc_irq_eoi_tracking_reset(struct kvm_ioapic *ioapic)
        bitmap_zero(ioapic->rtc_status.dest_map, KVM_MAX_VCPUS);
 }
 
+static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic);
+
+static void rtc_status_pending_eoi_check_valid(struct kvm_ioapic *ioapic)
+{
+       if (WARN_ON(ioapic->rtc_status.pending_eoi < 0))
+               kvm_rtc_eoi_tracking_restore_all(ioapic);
+}
+
 static void __rtc_irq_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
 {
        bool new_val, old_val;
@@ -120,9 +128,8 @@ static void __rtc_irq_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
        } else {
                __clear_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map);
                ioapic->rtc_status.pending_eoi--;
+               rtc_status_pending_eoi_check_valid(ioapic);
        }
-
-       WARN_ON(ioapic->rtc_status.pending_eoi < 0);
 }
 
 void kvm_rtc_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
@@ -149,10 +156,10 @@ static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic)
 
 static void rtc_irq_eoi(struct kvm_ioapic *ioapic, struct kvm_vcpu *vcpu)
 {
-       if (test_and_clear_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map))
+       if (test_and_clear_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map)) {
                --ioapic->rtc_status.pending_eoi;
-
-       WARN_ON(ioapic->rtc_status.pending_eoi < 0);
+               rtc_status_pending_eoi_check_valid(ioapic);
+       }
 }
 
 static bool rtc_irq_check_coalesced(struct kvm_ioapic *ioapic)
@@ -353,10 +360,16 @@ static int ioapic_service(struct kvm_ioapic *ioapic, int irq, bool line_status)
                ioapic->irr &= ~(1 << irq);
 
        if (irq == RTC_GSI && line_status) {
+               /*
+                * pending_eoi cannot ever become negative (see
+                * rtc_status_pending_eoi_check_valid) and the caller
+                * ensures that it is only called if it is >= zero, namely
+                * if rtc_irq_check_coalesced returns false).
+                */
                BUG_ON(ioapic->rtc_status.pending_eoi != 0);
                ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe,
                                ioapic->rtc_status.dest_map);
-               ioapic->rtc_status.pending_eoi = ret;
+               ioapic->rtc_status.pending_eoi = (ret < 0 ? 0 : ret);
        } else
                ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe, NULL);