static int xilly_obtain_idt(struct xilly_endpoint *endpoint)
{
- int rc = 0;
struct xilly_channel *channel;
unsigned char *version;
if (endpoint->fatal_error)
return -EIO;
- rc = -ENODEV;
- return rc;
+ return -ENODEV;
}
endpoint->ephw->hw_sync_sgl_for_cpu(
dev_err(endpoint->dev,
"IDT length mismatch (%d != %d). Aborting.\n",
channel->wr_buffers[0]->end_offset, endpoint->idtlen);
- rc = -ENODEV;
- return rc;
+ return -ENODEV;
}
if (crc32_le(~0, channel->wr_buffers[0]->addr,
endpoint->idtlen+1) != 0) {
dev_err(endpoint->dev, "IDT failed CRC check. Aborting.\n");
- rc = -ENODEV;
- return rc;
+ return -ENODEV;
}
version = channel->wr_buffers[0]->addr;
dev_err(endpoint->dev,
"No support for IDT version 0x%02x. Maybe the xillybus driver needs an upgarde. Aborting.\n",
(int) *version);
- rc = -ENODEV;
- return rc;
+ return -ENODEV;
}
return 0; /* Success */
deadline = jiffies + 1 + XILLY_RX_TIMEOUT;
rc = mutex_lock_interruptible(&channel->wr_mutex);
-
if (rc)
return rc;
- rc = 0; /* Just to be clear about it. Compiler optimizes this out */
-
while (1) { /* Note that we may drop mutex within this loop */
int bytes_to_do = count - bytes_done;
static int xillybus_myflush(struct xilly_channel *channel, long timeout)
{
- int rc = 0;
+ int rc;
unsigned long flags;
int end_offset_plus1;
if (channel->endpoint->fatal_error)
return -EIO;
rc = mutex_lock_interruptible(&channel->rd_mutex);
-
if (rc)
return rc;
* If bufidx == channel->rd_fpga_buf_idx we're either empty or full.
*/
- rc = 0;
-
while (1) { /* Loop waiting for draining of buffers */
spin_lock_irqsave(&channel->rd_spinlock, flags);
return -EIO;
rc = mutex_lock_interruptible(&channel->rd_mutex);
-
if (rc)
return rc;
- rc = 0; /* Just to be clear about it. Compiler optimizes this out */
-
while (1) {
int bytes_to_do = count - bytes_done;
rc = alloc_chrdev_region(&dev, 0, /* minor start */
endpoint->num_channels,
xillyname);
-
if (rc) {
dev_warn(endpoint->dev, "Failed to obtain major/minors");
return rc;
int xillybus_endpoint_discovery(struct xilly_endpoint *endpoint)
{
- int rc = 0;
+ int rc;
void *bootstrap_resources;
int idtbuffersize = (1 << PAGE_SHIFT);
endpoint->num_channels = 0;
rc = xilly_setupchannels(endpoint, bogus_idt, 1);
-
if (rc)
return rc;
xillybus_wq = alloc_workqueue(xillyname, 0, 0);
if (!xillybus_wq) {
class_destroy(xillybus_class);
- rc = -ENOMEM;
+ return -ENOMEM;
}
- return rc;
+ return 0;
}
static void __exit xillybus_exit(void)
int pci_direction;
dma_addr_t addr;
struct xilly_mapping *this;
- int rc = 0;
+ int rc;
this = kzalloc(sizeof(*this), GFP_KERNEL);
if (!this)
*ret_dma_handle = addr;
rc = devm_add_action(ep->dev, xilly_pci_unmap, this);
-
if (rc) {
pci_unmap_single(ep->pdev, addr, size, pci_direction);
kfree(this);
+ return rc;
}
- return rc;
+ return 0;
}
static struct xilly_endpoint_hardware pci_hw = {
const struct pci_device_id *ent)
{
struct xilly_endpoint *endpoint;
- int rc = 0;
+ int rc;
endpoint = xillybus_init_endpoint(pdev, &pdev->dev, &pci_hw);
pci_set_drvdata(pdev, endpoint);
rc = pcim_enable_device(pdev);
-
if (rc) {
dev_err(endpoint->dev,
"pcim_enable_device() failed. Aborting.\n");
}
rc = devm_request_irq(&pdev->dev, pdev->irq, xillybus_isr, 0,
xillyname, endpoint);
-
if (rc) {
dev_err(endpoint->dev,
"Failed to register MSI handler. Aborting.\n");