#
# Common support
-obj-y := clock.o gpio.o time.o devices.o cpu.o system.o irq-common.o usb_common.o usb_wakeup.o
+obj-y := clock.o gpio.o time.o devices.o cpu.o system.o irq-common.o usb_common.o usb_wakeup.o fuse.o
# MX51 uses the TZIC interrupt controller, older platforms use AVIC
obj-$(CONFIG_MXC_TZIC) += tzic.o
/*
- * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
},
};
+ if (!fuse_dev_is_available(MXC_DEV_SATA))
+ return ERR_PTR(-ENODEV);
+
return imx_add_platform_device_dmamask("ahci", 0 /* -1? */,
res, ARRAY_SIZE(res),
pdata, sizeof(*pdata), DMA_BIT_MASK(32));
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*
- * Copyright (C) 2011-2012 Freescale Semiconductor, Inc.
+ * Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
*/
#include <linux/dma-mapping.h>
#include <asm/sizes.h>
},
};
+ if (!fuse_dev_is_available(MXC_DEV_ENET))
+ return ERR_PTR(-ENODEV);
+
return imx_add_platform_device_dmamask(data->devid, 0,
res, ARRAY_SIZE(res),
pdata, sizeof(*pdata), DMA_BIT_MASK(32));
/*
- * Copyright (C) 2011-2012 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
},
};
+ if (!fuse_dev_is_available(MXC_DEV_EPDC))
+ return ERR_PTR(-ENODEV);
+
return imx_add_platform_device_dmamask("imx_epdc_fb", -1,
res, ARRAY_SIZE(res), pdata, sizeof(*pdata), DMA_BIT_MASK(32));
}
/*
- * Copyright (C) 2011 Freescale Semiconductor, Inc.
+ * Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
*/
/*
},
};
+ if (!fuse_dev_is_available(MXC_DEV_HDMI))
+ return ERR_PTR(-ENODEV);
+
return imx_add_platform_device("imx-hdmi-soc-dai", 0,
res, ARRAY_SIZE(res), NULL, 0);
}
/*
- * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
#include <mach/devices-common.h>
struct platform_device *__init imx_add_hdmi_soc(void)
-{ return imx_add_platform_device("mxc_hdmi_soc", 0,
+{
+
+ if (!fuse_dev_is_available(MXC_DEV_HDMI))
+ return ERR_PTR(-ENODEV);
+
+ return imx_add_platform_device("mxc_hdmi_soc", 0,
NULL, 0, NULL, 0);
}
/*
- * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2012-2013 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
},
};
+ if (!fuse_dev_is_available(MXC_DEV_PCIE))
+ return ERR_PTR(-ENODEV);
+
return imx_add_platform_device("imx-pcie", -1,
res, ARRAY_SIZE(res),
pdata, sizeof(*pdata));
/*
- * Copyright (C) 2011-2012 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
},
};
+ if (!fuse_dev_is_available(MXC_DEV_PXP))
+ return ERR_PTR(-ENODEV);
+
return imx_add_platform_device_dmamask("imx-pxp", -1,
res, ARRAY_SIZE(res), NULL, 0, DMA_BIT_MASK(32));
}
struct platform_device *__init imx_add_imx_pxp_client()
{
- return imx_add_platform_device("imx-pxp-client", -1,
+ if (!fuse_dev_is_available(MXC_DEV_PXP))
+ return ERR_PTR(-ENODEV);
+
+ return imx_add_platform_device("imx-pxp-client", -1,
NULL, 0, NULL, 0);
}
struct platform_device *__init imx_add_imx_pxp_v4l2()
{
- return imx_add_platform_device_dmamask("pxp-v4l2", -1,
+ if (!fuse_dev_is_available(MXC_DEV_PXP))
+ return ERR_PTR(-ENODEV);
+
+ return imx_add_platform_device_dmamask("pxp-v4l2", -1,
NULL, 0, NULL, 0, DMA_BIT_MASK(32));
}
/*
- * Copyright (C) 2011-2012 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
* Jason Chen <jason.chen@freescale.com>
*
* This program is free software; you can redistribute it and/or modify it under
pdata.iram_enable = data->iram_enable;
pdata.iram_size = data->iram_size;
-#ifdef CONFIG_SOC_IMX6Q
- if (cpu_is_mx6dl() || cpu_is_mx6q()) {
- #define HW_OCOTP_CFGn(n) (0x00000410 + (n) * 0x10)
- unsigned int vpu_disable;
- vpu_disable = readl(MX6_IO_ADDRESS(OCOTP_BASE_ADDR) + HW_OCOTP_CFGn(3));
- if (vpu_disable & 0x00008000)
- return ERR_PTR(-ENODEV);
- }
-#endif
+ if (!fuse_dev_is_available(MXC_DEV_VPU))
+ return ERR_PTR(-ENODEV);
+
if (cpu_is_mx6dl())
pdata.iram_enable = false;
/*
- * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
},
};
+ if (!fuse_dev_is_available(MXC_DEV_HDMI))
+ return ERR_PTR(-ENODEV);
+
return imx_add_platform_device_dmamask("mxc_hdmi_core", -1,
res, ARRAY_SIZE(res), pdata, sizeof(*pdata), DMA_BIT_MASK(32));
}
/*
- * Copyright (C) 2011-2012 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
.flags = IORESOURCE_IRQ,
},
};
+
+ if (!fuse_dev_is_available(MXC_DEV_HDMI))
+ return ERR_PTR(-ENODEV);
+
imx_add_platform_device("mxc_hdmi_cec", 0,
res, ARRAY_SIZE(res), NULL, 0);
return imx_add_platform_device_dmamask("mxc_hdmi", -1,
/*
- * Copyright (C) 2011-2012 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
struct platform_device *__init imx_add_mlb(
const struct mxc_mlb_platform_data *pdata)
{
-#define HW_OCOTP_CFGn(n) (0x00000410 + (n) * 0x10)
- unsigned int mlb_disable = 0;
struct resource res[] = {
{
.start = MLB_BASE_ADDR,
},
};
- mlb_disable = readl(MX6_IO_ADDRESS(OCOTP_BASE_ADDR) + HW_OCOTP_CFGn(2));
- if (mlb_disable & 0x04000000)
+ if (!fuse_dev_is_available(MXC_DEV_MLB))
return ERR_PTR(-ENODEV);
+
return imx_add_platform_device("mxc_mlb150", 0,
res, ARRAY_SIZE(res), pdata, sizeof(*pdata));
}
--- /dev/null
+/*
+ * Copyright (C) 2013 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <mach/hardware.h>
+
+#define HW_OCOTP_CFGn(n) (0x00000410 + (n) * 0x10)
+
+/* Note: the names oder is the same as device enum order defined in mxc.h */
+static char *names[] = {
+ "pxp", "ovg", "dsi_csi2", "enet", "mlb",
+ "epdc", "hdmi", "pcie", "sata", "dtcp",
+ "2d", "3d", "vpu", "divx3", "rv",
+ "sorensen",
+};
+
+int fuse_dev_is_available(enum mxc_dev_type dev)
+{
+ u32 uninitialized_var(reg);
+ u32 uninitialized_var(mask);
+ int ret;
+
+ if (!cpu_is_mx6())
+ return 1;
+
+ /* mx6sl is still not supported */
+ if (cpu_is_mx6sl())
+ return 1;
+
+ switch (dev) {
+ case MXC_DEV_PXP:
+ if (cpu_is_mx6q())
+ return 0;
+
+ if (cpu_is_mx6dl()) {
+ reg = HW_OCOTP_CFGn(2);
+ mask = 0x80000000;
+ }
+ break;
+ case MXC_DEV_OVG:
+ if (cpu_is_mx6dl())
+ return 0;
+
+ if (cpu_is_mx6q()) {
+ reg = HW_OCOTP_CFGn(2);
+ mask = 0x40000000;
+ }
+ break;
+ case MXC_DEV_DSI_CSI2:
+ if (cpu_is_mx6dl() || cpu_is_mx6q()) {
+ reg = HW_OCOTP_CFGn(2);
+ mask = 0x10000000;
+ }
+ break;
+ case MXC_DEV_ENET:
+ if (cpu_is_mx6dl() || cpu_is_mx6q()) {
+ reg = HW_OCOTP_CFGn(2);
+ mask = 0x08000000;
+ }
+ break;
+ case MXC_DEV_MLB:
+ if (cpu_is_mx6dl() || cpu_is_mx6q()) {
+ reg = HW_OCOTP_CFGn(2);
+ mask = 0x04000000;
+ }
+ break;
+ case MXC_DEV_EPDC:
+ if (cpu_is_mx6q())
+ return 0;
+
+ if (cpu_is_mx6dl()) {
+ reg = HW_OCOTP_CFGn(2);
+ mask = 0x02000000;
+ }
+ break;
+ case MXC_DEV_HDMI:
+ if (cpu_is_mx6dl() || cpu_is_mx6q()) {
+ reg = HW_OCOTP_CFGn(3);
+ mask = 0x00000080;
+ }
+ break;
+ case MXC_DEV_PCIE:
+ if (cpu_is_mx6dl() || cpu_is_mx6q()) {
+ reg = HW_OCOTP_CFGn(3);
+ mask = 0x00000040;
+ }
+ break;
+ case MXC_DEV_SATA:
+ if (cpu_is_mx6dl())
+ return 0;
+
+ if (cpu_is_mx6q()) {
+ reg = HW_OCOTP_CFGn(3);
+ mask = 0x00000020;
+ }
+ break;
+ case MXC_DEV_DTCP:
+ if (cpu_is_mx6dl() || cpu_is_mx6q()) {
+ reg = HW_OCOTP_CFGn(3);
+ mask = 0x00000010;
+ }
+ break;
+ case MXC_DEV_2D:
+ if (cpu_is_mx6dl() || cpu_is_mx6q()) {
+ reg = HW_OCOTP_CFGn(3);
+ mask = 0x00000008;
+ }
+ break;
+ case MXC_DEV_3D:
+ if (cpu_is_mx6dl() || cpu_is_mx6q()) {
+ reg = HW_OCOTP_CFGn(3);
+ mask = 0x00000004;
+ }
+ break;
+ case MXC_DEV_VPU:
+ if (cpu_is_mx6dl() || cpu_is_mx6q()) {
+ reg = HW_OCOTP_CFGn(3);
+ mask = 0x00008000;
+ }
+ break;
+ case MXC_DEV_DIVX3:
+ if (cpu_is_mx6dl() || cpu_is_mx6q()) {
+ reg = HW_OCOTP_CFGn(3);
+ mask = 0x00000400;
+ }
+ break;
+ case MXC_DEV_RV:
+ if (cpu_is_mx6dl() || cpu_is_mx6q()) {
+ reg = HW_OCOTP_CFGn(3);
+ mask = 0x00000200;
+ }
+ break;
+ case MXC_DEV_SORENSEN:
+ if (cpu_is_mx6dl() || cpu_is_mx6q()) {
+ reg = HW_OCOTP_CFGn(3);
+ mask = 0x00000100;
+ }
+ break;
+ default:
+ /* we treat the unkown device is avaiable by default */
+ return 1;
+ }
+
+ ret = readl(MX6_IO_ADDRESS(OCOTP_BASE_ADDR) + reg) & mask;
+ pr_debug("fuse_check: %s is %s\n", names[dev], ret ?
+ "unavailable" : "available");
+
+ return !ret;
+}
/*
- * Copyright 2004-2007, 2011-2012 Freescale Semiconductor, Inc.
+ * Copyright 2004-2007, 2011-2013 Freescale Semiconductor, Inc.
* Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
*
* This program is free software; you can redistribute it and/or
extern void mxc_cpu_lp_set(enum mxc_cpu_pwr_mode mode);
extern int tzic_enable_wake(int is_idle);
+
+/* available disableable devices in fuse */
+enum mxc_dev_type {
+ MXC_DEV_PXP,
+ MXC_DEV_OVG,
+ MXC_DEV_DSI_CSI2,
+ MXC_DEV_ENET,
+ MXC_DEV_MLB,
+ MXC_DEV_EPDC,
+ MXC_DEV_HDMI,
+ MXC_DEV_PCIE,
+ MXC_DEV_SATA,
+ MXC_DEV_DTCP,
+ MXC_DEV_2D,
+ MXC_DEV_3D,
+ MXC_DEV_VPU,
+ MXC_DEV_DIVX3,
+ MXC_DEV_RV,
+ MXC_DEV_SORENSEN,
+};
+extern int fuse_dev_is_available(enum mxc_dev_type dev);
+
#endif
#if defined(CONFIG_ARCH_MX3) || defined(CONFIG_ARCH_MX2)