Merge branch 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux...

This is bigger because it regenerates the internal firmwares after a fix.

* 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6:
  drm/nouveau/doc: update the thermal documentation
  drm/nouveau/pwr: fix typo in fifo wrap handling
  drm/nv50/disp: fix a potential oops in supervisor handling
  drm/nouveau/disp/dp: don't touch link config after success
  drm/nouveau/kms: reference vblank for crtc during pageflip.
  drm/gk104/fb/ram: fixups from an earlier search+replace
  drm/nv50/gr: remove an unneeded write while initialising PGRAPH
  drm/nv50/gr: fix overlap while zeroing zcull regions
  drm/gf100-/gr: report class data to host on fwmthd failure
  drm/gk104/ibus: increase various random timeouts
  drm/gk104/clk: only touch divider for mode we'll be using

diff --git a/Documentation/thermal/nouveau_thermal b/Documentation/thermal/nouveau_thermal
index efceb7828f54106464f40d74c0e1584a76034230..60bc29357ac3537e507a38a1decc92da20b27d2b 100644 (file)
--- a/Documentation/thermal/nouveau_thermal
+++ b/Documentation/thermal/nouveau_thermal
@@ -4,7 +4,7 @@ Kernel driver nouveau
 Supported chips:
 * NV43+
 
-Authors: Martin Peres (mupuf) <martin.peres@labri.fr>
+Authors: Martin Peres (mupuf) <martin.peres@free.fr>
 
 Description
 ---------
@@ -68,8 +68,9 @@ Your fan can be driven in different modes:
 
 NOTE: Be sure to use the manual mode if you want to drive the fan speed manually
 
-NOTE2: Not all fan management modes may be supported on all chipsets. We are
-working on it.
+NOTE2: When operating in manual mode outside the vbios-defined
+[PWM_min, PWM_max] range, the reported fan speed (RPM) may not be accurate
+depending on your hardware.
 
 Bug reports
 ---------

diff --git a/drivers/gpu/drm/nouveau/core/engine/disp/dport.c b/drivers/gpu/drm/nouveau/core/engine/disp/dport.c
index 39562d48101dcfd4b02be892ea568ad20f87bf73..5a5b59b21130e24f2ed0e1f09cf228b3ed7f2f7c 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/engine/disp/dport.c
+++ b/drivers/gpu/drm/nouveau/core/engine/disp/dport.c
@@ -241,7 +241,9 @@ dp_link_train_eq(struct dp_state *dp)
                dp_set_training_pattern(dp, 2);
 
        do {
-               if (dp_link_train_update(dp, dp->pc2, 400))
+               if ((tries &&
+                   dp_link_train_commit(dp, dp->pc2)) ||
+                   dp_link_train_update(dp, dp->pc2, 400))
                        break;
 
                eq_done = !!(dp->stat[2] & DPCD_LS04_INTERLANE_ALIGN_DONE);
@@ -253,9 +255,6 @@ dp_link_train_eq(struct dp_state *dp)
                            !(lane & DPCD_LS02_LANE0_SYMBOL_LOCKED))
                                eq_done = false;
                }
-
-               if (dp_link_train_commit(dp, dp->pc2))
-                       break;
        } while (!eq_done && cr_done && ++tries <= 5);
 
        return eq_done ? 0 : -1;

diff --git a/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c b/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c
index 1e85f36c705f34faba1c93d94af337b1e4d90abc..26e962b7e702a07fabf713cbcd2ca00ac6527ae5 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c
+++ b/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c
@@ -1270,7 +1270,7 @@ exec_clkcmp(struct nv50_disp_priv *priv, int head, int id, u32 pclk, u32 *conf)
        i--;
 
        outp = exec_lookup(priv, head, i, ctrl, &data, &ver, &hdr, &cnt, &len, &info1);
-       if (!data)
+       if (!outp)
                return NULL;
 
        if (outp->info.location == 0) {

diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpc.fuc b/drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpc.fuc
index 2f7345f7fe074a3854309a9909d4741d9cd30a8c..7445f12b1d9e16cf305695140deadd3caf067a4b 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpc.fuc
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpc.fuc
@@ -54,7 +54,7 @@ mmio_list_base:
 #ifdef INCLUDE_CODE
 // reports an exception to the host
 //
-// In: $r15 error code (see nvc0.fuc)
+// In: $r15 error code (see os.h)
 //
 error:
        push $r14

diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/fuc/hub.fuc b/drivers/gpu/drm/nouveau/core/engine/graph/fuc/hub.fuc
index c8ddb8d71b915c668c7b116f1b7f9cf9547289b3..b4ad18bf5a260c6e103dba5642482bbc36100c5b 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/engine/graph/fuc/hub.fuc
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/fuc/hub.fuc
@@ -49,7 +49,7 @@ hub_mmio_list_next:
 #ifdef INCLUDE_CODE
 // reports an exception to the host
 //
-// In: $r15 error code (see nvc0.fuc)
+// In: $r15 error code (see os.h)
 //
 error:
        nv_iowr(NV_PGRAPH_FECS_CC_SCRATCH_VAL(5), 0, $r15)
@@ -343,13 +343,25 @@ ih:
        ih_no_ctxsw:
        and $r11 $r10 NV_PGRAPH_FECS_INTR_FWMTHD
        bra e #ih_no_fwmthd
-               // none we handle, ack, and fall-through to unhandled
+               // none we handle; report to host and ack
+               nv_rd32($r15, NV_PGRAPH_TRAPPED_DATA_LO)
+               nv_iowr(NV_PGRAPH_FECS_CC_SCRATCH_VAL(4), 0, $r15)
+               nv_rd32($r15, NV_PGRAPH_TRAPPED_ADDR)
+               nv_iowr(NV_PGRAPH_FECS_CC_SCRATCH_VAL(3), 0, $r15)
+               extr $r14 $r15 16:18
+               shl b32 $r14 $r14 2
+               imm32($r15, NV_PGRAPH_FE_OBJECT_TABLE(0))
+               add b32 $r14 $r15
+               call(nv_rd32)
+               nv_iowr(NV_PGRAPH_FECS_CC_SCRATCH_VAL(2), 0, $r15)
+               mov $r15 E_BAD_FWMTHD
+               call(error)
                mov $r11 0x100
                nv_wr32(0x400144, $r11)
 
        // anything we didn't handle, bring it to the host's attention
        ih_no_fwmthd:
-       mov $r11 0x104 // FIFO | CHSW
+       mov $r11 0x504 // FIFO | CHSW | FWMTHD
        not b32 $r11
        and $r11 $r10 $r11
        bra e #ih_no_other

diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubgm107.fuc5.h b/drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubgm107.fuc5.h
index 214dd16ec566a8d56a623a682923cd960441f241..5f953c5c20b7426cadf33fc0946bb3d8ec356e33 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubgm107.fuc5.h
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubgm107.fuc5.h
@@ -478,10 +478,10 @@ uint32_t gm107_grhub_code[] = {
        0x01040080,
        0xbd0001f6,
        0x01004104,
-       0x627e020f,
-       0x717e0006,
+       0xa87e020f,
+       0xb77e0006,
        0x100f0006,
-       0x0006b37e,
+       0x0006f97e,
        0x98000e98,
        0x207e010f,
        0x14950001,
@@ -523,8 +523,8 @@ uint32_t gm107_grhub_code[] = {
        0x800040b7,
        0xf40132b6,
        0x000fb41b,
-       0x0006b37e,
-       0x627e000f,
+       0x0006f97e,
+       0xa87e000f,
        0x00800006,
        0x01f60201,
        0xbd04bd00,
@@ -554,7 +554,7 @@ uint32_t gm107_grhub_code[] = {
        0x0009f602,
        0x32f404bd,
        0x0231f401,
-       0x0008367e,
+       0x00087c7e,
        0x99f094bd,
        0x17008007,
        0x0009f602,
@@ -563,7 +563,7 @@ uint32_t gm107_grhub_code[] = {
        0x37008006,
        0x0009f602,
        0x31f404bd,
-       0x08367e01,
+       0x087c7e01,
        0xf094bd00,
        0x00800699,
        0x09f60217,
@@ -572,7 +572,7 @@ uint32_t gm107_grhub_code[] = {
        0x20f92f0e,
        0x32f412b2,
        0x0232f401,
-       0x0008367e,
+       0x00087c7e,
        0x008020fc,
        0x02f602c0,
        0xf404bd00,
@@ -580,7 +580,7 @@ uint32_t gm107_grhub_code[] = {
        0x23c8130e,
        0x0d0bf41f,
        0xf40131f4,
-       0x367e0232,
+       0x7c7e0232,
 /* 0x054e: chsw_done */
        0x01020008,
        0x02c30080,
@@ -593,7 +593,7 @@ uint32_t gm107_grhub_code[] = {
        0xb0ff2a0e,
        0x1bf401e4,
        0x7ef2b20c,
-       0xf40007d6,
+       0xf400081c,
 /* 0x057a: main_not_ctx_chan */
        0xe4b0400e,
        0x2c1bf402,
@@ -602,7 +602,7 @@ uint32_t gm107_grhub_code[] = {
        0x0009f602,
        0x32f404bd,
        0x0232f401,
-       0x0008367e,
+       0x00087c7e,
        0x99f094bd,
        0x17008007,
        0x0009f602,
@@ -642,238 +642,238 @@ uint32_t gm107_grhub_code[] = {
 /* 0x061a: ih_no_ctxsw */
        0xabe40000,
        0x0bf40400,
-       0x01004b10,
-       0x448ebfb2,
-       0x8f7e4001,
-/* 0x062e: ih_no_fwmthd */
-       0x044b0000,
-       0xffb0bd01,
-       0x0bf4b4ab,
-       0x0700800c,
-       0x000bf603,
-/* 0x0642: ih_no_other */
-       0x004004bd,
-       0x000af601,
-       0xf0fc04bd,
-       0xd0fce0fc,
-       0xa0fcb0fc,
-       0x80fc90fc,
-       0xfc0088fe,
-       0x0032f480,
-/* 0x0662: ctx_4170s */
-       0xf5f001f8,
-       0x8effb210,
-       0x7e404170,
-       0xf800008f,
-/* 0x0671: ctx_4170w */
-       0x41708e00,
+       0x07088e56,
        0x00657e40,
-       0xf0ffb200,
-       0x1bf410f4,
-/* 0x0683: ctx_redswitch */
-       0x4e00f8f3,
-       0xe5f00200,
-       0x20e5f040,
-       0x8010e5f0,
-       0xf6018500,
-       0x04bd000e,
-/* 0x069a: ctx_redswitch_delay */
-       0xf2b6080f,
-       0xfd1bf401,
-       0x0400e5f1,
-       0x0100e5f1,
-       0x01850080,
-       0xbd000ef6,
-/* 0x06b3: ctx_86c */
-       0x8000f804,
-       0xf6022300,
+       0x80ffb200,
+       0xf6020400,
        0x04bd000f,
-       0x148effb2,
-       0x8f7e408a,
-       0xffb20000,
-       0x41a88c8e,
+       0x4007048e,
+       0x0000657e,
+       0x0080ffb2,
+       0x0ff60203,
+       0xc704bd00,
+       0xee9450fe,
+       0x07008f02,
+       0x00efbb40,
+       0x0000657e,
+       0x02020080,
+       0xbd000ff6,
+       0x7e030f04,
+       0x4b0002f8,
+       0xbfb20100,
+       0x4001448e,
        0x00008f7e,
-/* 0x06d2: ctx_mem */
-       0x008000f8,
-       0x0ff60284,
-/* 0x06db: ctx_mem_wait */
-       0x8f04bd00,
-       0xcf028400,
-       0xfffd00ff,
-       0xf61bf405,
-/* 0x06ea: ctx_load */
-       0x94bd00f8,
-       0x800599f0,
-       0xf6023700,
-       0x04bd0009,
-       0xb87e0c0a,
-       0xf4bd0000,
-       0x02890080,
+/* 0x0674: ih_no_fwmthd */
+       0xbd05044b,
+       0xb4abffb0,
+       0x800c0bf4,
+       0xf6030700,
+       0x04bd000b,
+/* 0x0688: ih_no_other */
+       0xf6010040,
+       0x04bd000a,
+       0xe0fcf0fc,
+       0xb0fcd0fc,
+       0x90fca0fc,
+       0x88fe80fc,
+       0xf480fc00,
+       0x01f80032,
+/* 0x06a8: ctx_4170s */
+       0xb210f5f0,
+       0x41708eff,
+       0x008f7e40,
+/* 0x06b7: ctx_4170w */
+       0x8e00f800,
+       0x7e404170,
+       0xb2000065,
+       0x10f4f0ff,
+       0xf8f31bf4,
+/* 0x06c9: ctx_redswitch */
+       0x02004e00,
+       0xf040e5f0,
+       0xe5f020e5,
+       0x85008010,
+       0x000ef601,
+       0x080f04bd,
+/* 0x06e0: ctx_redswitch_delay */
+       0xf401f2b6,
+       0xe5f1fd1b,
+       0xe5f10400,
+       0x00800100,
+       0x0ef60185,
+       0xf804bd00,
+/* 0x06f9: ctx_86c */
+       0x23008000,
+       0x000ff602,
+       0xffb204bd,
+       0x408a148e,
+       0x00008f7e,
+       0x8c8effb2,
+       0x8f7e41a8,
+       0x00f80000,
+/* 0x0718: ctx_mem */
+       0x02840080,
        0xbd000ff6,
-       0xc1008004,
-       0x0002f602,
-       0x008004bd,
-       0x02f60283,
-       0x0f04bd00,
-       0x06d27e07,
-       0xc0008000,
-       0x0002f602,
-       0x0bfe04bd,
-       0x1f2af000,
-       0xb60424b6,
-       0x94bd0220,
-       0x800899f0,
-       0xf6023700,
-       0x04bd0009,
-       0x02810080,
-       0xbd0002f6,
-       0x0000d204,
-       0x25f08000,
-       0x88008002,
-       0x0002f602,
-       0x100104bd,
-       0xf0020042,
-       0x12fa0223,
-       0xbd03f805,
-       0x0899f094,
-       0x02170080,
-       0xbd0009f6,
-       0x81019804,
-       0x981814b6,
-       0x25b68002,
-       0x0512fd08,
-       0xbd1601b5,
-       0x0999f094,
-       0x02370080,
-       0xbd0009f6,
-       0x81008004,
-       0x0001f602,
-       0x010204bd,
-       0x02880080,
+/* 0x0721: ctx_mem_wait */
+       0x84008f04,
+       0x00ffcf02,
+       0xf405fffd,
+       0x00f8f61b,
+/* 0x0730: ctx_load */
+       0x99f094bd,
+       0x37008005,
+       0x0009f602,
+       0x0c0a04bd,
+       0x0000b87e,
+       0x0080f4bd,
+       0x0ff60289,
+       0x8004bd00,
+       0xf602c100,
+       0x04bd0002,
+       0x02830080,
        0xbd0002f6,
-       0x01004104,
-       0xfa0613f0,
-       0x03f80501,
+       0x7e070f04,
+       0x80000718,
+       0xf602c000,
+       0x04bd0002,
+       0xf0000bfe,
+       0x24b61f2a,
+       0x0220b604,
        0x99f094bd,
-       0x17008009,
+       0x37008008,
        0x0009f602,
-       0x94bd04bd,
-       0x800599f0,
+       0x008004bd,
+       0x02f60281,
+       0xd204bd00,
+       0x80000000,
+       0x800225f0,
+       0xf6028800,
+       0x04bd0002,
+       0x00421001,
+       0x0223f002,
+       0xf80512fa,
+       0xf094bd03,
+       0x00800899,
+       0x09f60217,
+       0x9804bd00,
+       0x14b68101,
+       0x80029818,
+       0xfd0825b6,
+       0x01b50512,
+       0xf094bd16,
+       0x00800999,
+       0x09f60237,
+       0x8004bd00,
+       0xf6028100,
+       0x04bd0001,
+       0x00800102,
+       0x02f60288,
+       0x4104bd00,
+       0x13f00100,
+       0x0501fa06,
+       0x94bd03f8,
+       0x800999f0,
        0xf6021700,
        0x04bd0009,
-/* 0x07d6: ctx_chan */
-       0xea7e00f8,
-       0x0c0a0006,
-       0x0000b87e,
-       0xd27e050f,
-       0x00f80006,
-/* 0x07e8: ctx_mmio_exec */
-       0x80410398,
+       0x99f094bd,
+       0x17008005,
+       0x0009f602,
+       0x00f804bd,
+/* 0x081c: ctx_chan */
+       0x0007307e,
+       0xb87e0c0a,
+       0x050f0000,
+       0x0007187e,
+/* 0x082e: ctx_mmio_exec */
+       0x039800f8,
+       0x81008041,
+       0x0003f602,
+       0x34bd04bd,
+/* 0x083c: ctx_mmio_loop */
+       0xf4ff34c4,
+       0x00450e1b,
+       0x0653f002,
+       0xf80535fa,
+/* 0x084d: ctx_mmio_pull */
+       0x804e9803,
+       0x7e814f98,
+       0xb600008f,
+       0x12b60830,
+       0xdf1bf401,
+/* 0x0860: ctx_mmio_done */
+       0x80160398,
        0xf6028100,
        0x04bd0003,
-/* 0x07f6: ctx_mmio_loop */
-       0x34c434bd,
-       0x0e1bf4ff,
-       0xf0020045,
-       0x35fa0653,
-/* 0x0807: ctx_mmio_pull */
-       0x9803f805,
-       0x4f98804e,
-       0x008f7e81,
-       0x0830b600,
-       0xf40112b6,
-/* 0x081a: ctx_mmio_done */
-       0x0398df1b,
-       0x81008016,
-       0x0003f602,
-       0x00b504bd,
-       0x01004140,
-       0xfa0613f0,
-       0x03f80601,
-/* 0x0836: ctx_xfer */
-       0x040e00f8,
-       0x03020080,
-       0xbd000ef6,
-/* 0x0841: ctx_xfer_idle */
-       0x00008e04,
-       0x00eecf03,
-       0x2000e4f1,
-       0xf4f51bf4,
-       0x02f40611,
-/* 0x0855: ctx_xfer_pre */
-       0x7e100f0c,
-       0xf40006b3,
-/* 0x085e: ctx_xfer_pre_load */
-       0x020f1b11,
-       0x0006627e,
-       0x0006717e,
-       0x0006837e,
-       0x627ef4bd,
-       0xea7e0006,
-/* 0x0876: ctx_xfer_exec */
-       0x01980006,
-       0x8024bd16,
-       0xf6010500,
-       0x04bd0002,
-       0x008e1fb2,
-       0x8f7e41a5,
-       0xfcf00000,
-       0x022cf001,
-       0xfd0124b6,
-       0xffb205f2,
-       0x41a5048e,
+       0x414000b5,
+       0x13f00100,
+       0x0601fa06,
+       0x00f803f8,
+/* 0x087c: ctx_xfer */
+       0x0080040e,
+       0x0ef60302,
+/* 0x0887: ctx_xfer_idle */
+       0x8e04bd00,
+       0xcf030000,
+       0xe4f100ee,
+       0x1bf42000,
+       0x0611f4f5,
+/* 0x089b: ctx_xfer_pre */
+       0x0f0c02f4,
+       0x06f97e10,
+       0x1b11f400,
+/* 0x08a4: ctx_xfer_pre_load */
+       0xa87e020f,
+       0xb77e0006,
+       0xc97e0006,
+       0xf4bd0006,
+       0x0006a87e,
+       0x0007307e,
+/* 0x08bc: ctx_xfer_exec */
+       0xbd160198,
+       0x05008024,
+       0x0002f601,
+       0x1fb204bd,
+       0x41a5008e,
        0x00008f7e,
-       0x0002167e,
-       0xfc8024bd,
-       0x02f60247,
-       0xf004bd00,
-       0x20b6012c,
-       0x4afc8003,
-       0x0002f602,
-       0xacf004bd,
-       0x06a5f001,
-       0x0c98000b,
-       0x010d9800,
-       0x3d7e000e,
-       0x080a0001,
-       0x0000ec7e,
-       0x00020a7e,
-       0x0a1201f4,
-       0x00b87e0c,
-       0x7e050f00,
-       0xf40006d2,
-/* 0x08f2: ctx_xfer_post */
-       0x020f2d02,
-       0x0006627e,
-       0xb37ef4bd,
-       0x277e0006,
-       0x717e0002,
+       0xf001fcf0,
+       0x24b6022c,
+       0x05f2fd01,
+       0x048effb2,
+       0x8f7e41a5,
+       0x167e0000,
+       0x24bd0002,
+       0x0247fc80,
+       0xbd0002f6,
+       0x012cf004,
+       0x800320b6,
+       0xf6024afc,
+       0x04bd0002,
+       0xf001acf0,
+       0x000b06a5,
+       0x98000c98,
+       0x000e010d,
+       0x00013d7e,
+       0xec7e080a,
+       0x0a7e0000,
+       0x01f40002,
+       0x7e0c0a12,
+       0x0f0000b8,
+       0x07187e05,
+       0x2d02f400,
+/* 0x0938: ctx_xfer_post */
+       0xa87e020f,
        0xf4bd0006,
-       0x0006627e,
-       0x981011f4,
-       0x11fd4001,
-       0x070bf405,
-       0x0007e87e,
-/* 0x091c: ctx_xfer_no_post_mmio */
-/* 0x091c: ctx_xfer_done */
-       0x000000f8,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
+       0x0006f97e,
+       0x0002277e,
+       0x0006b77e,
+       0xa87ef4bd,
+       0x11f40006,
+       0x40019810,
+       0xf40511fd,
+       0x2e7e070b,
+/* 0x0962: ctx_xfer_no_post_mmio */
+/* 0x0962: ctx_xfer_done */
+       0x00f80008,
        0x00000000,
        0x00000000,
        0x00000000,

diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnv108.fuc5.h b/drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnv108.fuc5.h
index 64dfd75192bfff1f92a1f9df37c396eaca7c55e6..e49b5a877ae440e4863bba2e473230886940f6ab 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnv108.fuc5.h
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnv108.fuc5.h
@@ -478,10 +478,10 @@ uint32_t nv108_grhub_code[] = {
        0x01040080,
        0xbd0001f6,
        0x01004104,
-       0x627e020f,
-       0x717e0006,
+       0xa87e020f,
+       0xb77e0006,
        0x100f0006,
-       0x0006b37e,
+       0x0006f97e,
        0x98000e98,
        0x207e010f,
        0x14950001,
@@ -523,8 +523,8 @@ uint32_t nv108_grhub_code[] = {
        0x800040b7,
        0xf40132b6,
        0x000fb41b,
-       0x0006b37e,
-       0x627e000f,
+       0x0006f97e,
+       0xa87e000f,
        0x00800006,
        0x01f60201,
        0xbd04bd00,
@@ -554,7 +554,7 @@ uint32_t nv108_grhub_code[] = {
        0x0009f602,
        0x32f404bd,
        0x0231f401,
-       0x0008367e,
+       0x00087c7e,
        0x99f094bd,
        0x17008007,
        0x0009f602,
@@ -563,7 +563,7 @@ uint32_t nv108_grhub_code[] = {
        0x37008006,
        0x0009f602,
        0x31f404bd,
-       0x08367e01,
+       0x087c7e01,
        0xf094bd00,
        0x00800699,
        0x09f60217,
@@ -572,7 +572,7 @@ uint32_t nv108_grhub_code[] = {
        0x20f92f0e,
        0x32f412b2,
        0x0232f401,
-       0x0008367e,
+       0x00087c7e,
        0x008020fc,
        0x02f602c0,
        0xf404bd00,
@@ -580,7 +580,7 @@ uint32_t nv108_grhub_code[] = {
        0x23c8130e,
        0x0d0bf41f,
        0xf40131f4,
-       0x367e0232,
+       0x7c7e0232,
 /* 0x054e: chsw_done */
        0x01020008,
        0x02c30080,
@@ -593,7 +593,7 @@ uint32_t nv108_grhub_code[] = {
        0xb0ff2a0e,
        0x1bf401e4,
        0x7ef2b20c,
-       0xf40007d6,
+       0xf400081c,
 /* 0x057a: main_not_ctx_chan */
        0xe4b0400e,
        0x2c1bf402,
@@ -602,7 +602,7 @@ uint32_t nv108_grhub_code[] = {
        0x0009f602,
        0x32f404bd,
        0x0232f401,
-       0x0008367e,
+       0x00087c7e,
        0x99f094bd,
        0x17008007,
        0x0009f602,
@@ -642,238 +642,238 @@ uint32_t nv108_grhub_code[] = {
 /* 0x061a: ih_no_ctxsw */
        0xabe40000,
        0x0bf40400,
-       0x01004b10,
-       0x448ebfb2,
-       0x8f7e4001,
-/* 0x062e: ih_no_fwmthd */
-       0x044b0000,
-       0xffb0bd01,
-       0x0bf4b4ab,
-       0x0700800c,
-       0x000bf603,
-/* 0x0642: ih_no_other */
-       0x004004bd,
-       0x000af601,
-       0xf0fc04bd,
-       0xd0fce0fc,
-       0xa0fcb0fc,
-       0x80fc90fc,
-       0xfc0088fe,
-       0x0032f480,
-/* 0x0662: ctx_4170s */
-       0xf5f001f8,
-       0x8effb210,
-       0x7e404170,
-       0xf800008f,
-/* 0x0671: ctx_4170w */
-       0x41708e00,
+       0x07088e56,
        0x00657e40,
-       0xf0ffb200,
-       0x1bf410f4,
-/* 0x0683: ctx_redswitch */
-       0x4e00f8f3,
-       0xe5f00200,
-       0x20e5f040,
-       0x8010e5f0,
-       0xf6018500,
-       0x04bd000e,
-/* 0x069a: ctx_redswitch_delay */
-       0xf2b6080f,
-       0xfd1bf401,
-       0x0400e5f1,
-       0x0100e5f1,
-       0x01850080,
-       0xbd000ef6,
-/* 0x06b3: ctx_86c */
-       0x8000f804,
-       0xf6022300,
+       0x80ffb200,
+       0xf6020400,
        0x04bd000f,
-       0x148effb2,
-       0x8f7e408a,
-       0xffb20000,
-       0x41a88c8e,
+       0x4007048e,
+       0x0000657e,
+       0x0080ffb2,
+       0x0ff60203,
+       0xc704bd00,
+       0xee9450fe,
+       0x07008f02,
+       0x00efbb40,
+       0x0000657e,
+       0x02020080,
+       0xbd000ff6,
+       0x7e030f04,
+       0x4b0002f8,
+       0xbfb20100,
+       0x4001448e,
        0x00008f7e,
-/* 0x06d2: ctx_mem */
-       0x008000f8,
-       0x0ff60284,
-/* 0x06db: ctx_mem_wait */
-       0x8f04bd00,
-       0xcf028400,
-       0xfffd00ff,
-       0xf61bf405,
-/* 0x06ea: ctx_load */
-       0x94bd00f8,
-       0x800599f0,
-       0xf6023700,
-       0x04bd0009,
-       0xb87e0c0a,
-       0xf4bd0000,
-       0x02890080,
+/* 0x0674: ih_no_fwmthd */
+       0xbd05044b,
+       0xb4abffb0,
+       0x800c0bf4,
+       0xf6030700,
+       0x04bd000b,
+/* 0x0688: ih_no_other */
+       0xf6010040,
+       0x04bd000a,
+       0xe0fcf0fc,
+       0xb0fcd0fc,
+       0x90fca0fc,
+       0x88fe80fc,
+       0xf480fc00,
+       0x01f80032,
+/* 0x06a8: ctx_4170s */
+       0xb210f5f0,
+       0x41708eff,
+       0x008f7e40,
+/* 0x06b7: ctx_4170w */
+       0x8e00f800,
+       0x7e404170,
+       0xb2000065,
+       0x10f4f0ff,
+       0xf8f31bf4,
+/* 0x06c9: ctx_redswitch */
+       0x02004e00,
+       0xf040e5f0,
+       0xe5f020e5,
+       0x85008010,
+       0x000ef601,
+       0x080f04bd,
+/* 0x06e0: ctx_redswitch_delay */
+       0xf401f2b6,
+       0xe5f1fd1b,
+       0xe5f10400,
+       0x00800100,
+       0x0ef60185,
+       0xf804bd00,
+/* 0x06f9: ctx_86c */
+       0x23008000,
+       0x000ff602,
+       0xffb204bd,
+       0x408a148e,
+       0x00008f7e,
+       0x8c8effb2,
+       0x8f7e41a8,
+       0x00f80000,
+/* 0x0718: ctx_mem */
+       0x02840080,
        0xbd000ff6,
-       0xc1008004,
-       0x0002f602,
-       0x008004bd,
-       0x02f60283,
-       0x0f04bd00,
-       0x06d27e07,
-       0xc0008000,
-       0x0002f602,
-       0x0bfe04bd,
-       0x1f2af000,
-       0xb60424b6,
-       0x94bd0220,
-       0x800899f0,
-       0xf6023700,
-       0x04bd0009,
-       0x02810080,
-       0xbd0002f6,
-       0x0000d204,
-       0x25f08000,
-       0x88008002,
-       0x0002f602,
-       0x100104bd,
-       0xf0020042,
-       0x12fa0223,
-       0xbd03f805,
-       0x0899f094,
-       0x02170080,
-       0xbd0009f6,
-       0x81019804,
-       0x981814b6,
-       0x25b68002,
-       0x0512fd08,
-       0xbd1601b5,
-       0x0999f094,
-       0x02370080,
-       0xbd0009f6,
-       0x81008004,
-       0x0001f602,
-       0x010204bd,
-       0x02880080,
+/* 0x0721: ctx_mem_wait */
+       0x84008f04,
+       0x00ffcf02,
+       0xf405fffd,
+       0x00f8f61b,
+/* 0x0730: ctx_load */
+       0x99f094bd,
+       0x37008005,
+       0x0009f602,
+       0x0c0a04bd,
+       0x0000b87e,
+       0x0080f4bd,
+       0x0ff60289,
+       0x8004bd00,
+       0xf602c100,
+       0x04bd0002,
+       0x02830080,
        0xbd0002f6,
-       0x01004104,
-       0xfa0613f0,
-       0x03f80501,
+       0x7e070f04,
+       0x80000718,
+       0xf602c000,
+       0x04bd0002,
+       0xf0000bfe,
+       0x24b61f2a,
+       0x0220b604,
        0x99f094bd,
-       0x17008009,
+       0x37008008,
        0x0009f602,
-       0x94bd04bd,
-       0x800599f0,
+       0x008004bd,
+       0x02f60281,
+       0xd204bd00,
+       0x80000000,
+       0x800225f0,
+       0xf6028800,
+       0x04bd0002,
+       0x00421001,
+       0x0223f002,
+       0xf80512fa,
+       0xf094bd03,
+       0x00800899,
+       0x09f60217,
+       0x9804bd00,
+       0x14b68101,
+       0x80029818,
+       0xfd0825b6,
+       0x01b50512,
+       0xf094bd16,
+       0x00800999,
+       0x09f60237,
+       0x8004bd00,
+       0xf6028100,
+       0x04bd0001,
+       0x00800102,
+       0x02f60288,
+       0x4104bd00,
+       0x13f00100,
+       0x0501fa06,
+       0x94bd03f8,
+       0x800999f0,
        0xf6021700,
        0x04bd0009,
-/* 0x07d6: ctx_chan */
-       0xea7e00f8,
-       0x0c0a0006,
-       0x0000b87e,
-       0xd27e050f,
-       0x00f80006,
-/* 0x07e8: ctx_mmio_exec */
-       0x80410398,
+       0x99f094bd,
+       0x17008005,
+       0x0009f602,
+       0x00f804bd,
+/* 0x081c: ctx_chan */
+       0x0007307e,
+       0xb87e0c0a,
+       0x050f0000,
+       0x0007187e,
+/* 0x082e: ctx_mmio_exec */
+       0x039800f8,
+       0x81008041,
+       0x0003f602,
+       0x34bd04bd,
+/* 0x083c: ctx_mmio_loop */
+       0xf4ff34c4,
+       0x00450e1b,
+       0x0653f002,
+       0xf80535fa,
+/* 0x084d: ctx_mmio_pull */
+       0x804e9803,
+       0x7e814f98,
+       0xb600008f,
+       0x12b60830,
+       0xdf1bf401,
+/* 0x0860: ctx_mmio_done */
+       0x80160398,
        0xf6028100,
        0x04bd0003,
-/* 0x07f6: ctx_mmio_loop */
-       0x34c434bd,
-       0x0e1bf4ff,
-       0xf0020045,
-       0x35fa0653,
-/* 0x0807: ctx_mmio_pull */
-       0x9803f805,
-       0x4f98804e,
-       0x008f7e81,
-       0x0830b600,
-       0xf40112b6,
-/* 0x081a: ctx_mmio_done */
-       0x0398df1b,
-       0x81008016,
-       0x0003f602,
-       0x00b504bd,
-       0x01004140,
-       0xfa0613f0,
-       0x03f80601,
-/* 0x0836: ctx_xfer */
-       0x040e00f8,
-       0x03020080,
-       0xbd000ef6,
-/* 0x0841: ctx_xfer_idle */
-       0x00008e04,
-       0x00eecf03,
-       0x2000e4f1,
-       0xf4f51bf4,
-       0x02f40611,
-/* 0x0855: ctx_xfer_pre */
-       0x7e100f0c,
-       0xf40006b3,
-/* 0x085e: ctx_xfer_pre_load */
-       0x020f1b11,
-       0x0006627e,
-       0x0006717e,
-       0x0006837e,
-       0x627ef4bd,
-       0xea7e0006,
-/* 0x0876: ctx_xfer_exec */
-       0x01980006,
-       0x8024bd16,
-       0xf6010500,
-       0x04bd0002,
-       0x008e1fb2,
-       0x8f7e41a5,
-       0xfcf00000,
-       0x022cf001,
-       0xfd0124b6,
-       0xffb205f2,
-       0x41a5048e,
+       0x414000b5,
+       0x13f00100,
+       0x0601fa06,
+       0x00f803f8,
+/* 0x087c: ctx_xfer */
+       0x0080040e,
+       0x0ef60302,
+/* 0x0887: ctx_xfer_idle */
+       0x8e04bd00,
+       0xcf030000,
+       0xe4f100ee,
+       0x1bf42000,
+       0x0611f4f5,
+/* 0x089b: ctx_xfer_pre */
+       0x0f0c02f4,
+       0x06f97e10,
+       0x1b11f400,
+/* 0x08a4: ctx_xfer_pre_load */
+       0xa87e020f,
+       0xb77e0006,
+       0xc97e0006,
+       0xf4bd0006,
+       0x0006a87e,
+       0x0007307e,
+/* 0x08bc: ctx_xfer_exec */
+       0xbd160198,
+       0x05008024,
+       0x0002f601,
+       0x1fb204bd,
+       0x41a5008e,
        0x00008f7e,
-       0x0002167e,
-       0xfc8024bd,
-       0x02f60247,
-       0xf004bd00,
-       0x20b6012c,
-       0x4afc8003,
-       0x0002f602,
-       0xacf004bd,
-       0x06a5f001,
-       0x0c98000b,
-       0x010d9800,
-       0x3d7e000e,
-       0x080a0001,
-       0x0000ec7e,
-       0x00020a7e,
-       0x0a1201f4,
-       0x00b87e0c,
-       0x7e050f00,
-       0xf40006d2,
-/* 0x08f2: ctx_xfer_post */
-       0x020f2d02,
-       0x0006627e,
-       0xb37ef4bd,
-       0x277e0006,
-       0x717e0002,
+       0xf001fcf0,
+       0x24b6022c,
+       0x05f2fd01,
+       0x048effb2,
+       0x8f7e41a5,
+       0x167e0000,
+       0x24bd0002,
+       0x0247fc80,
+       0xbd0002f6,
+       0x012cf004,
+       0x800320b6,
+       0xf6024afc,
+       0x04bd0002,
+       0xf001acf0,
+       0x000b06a5,
+       0x98000c98,
+       0x000e010d,
+       0x00013d7e,
+       0xec7e080a,
+       0x0a7e0000,
+       0x01f40002,
+       0x7e0c0a12,
+       0x0f0000b8,
+       0x07187e05,
+       0x2d02f400,
+/* 0x0938: ctx_xfer_post */
+       0xa87e020f,
        0xf4bd0006,
-       0x0006627e,
-       0x981011f4,
-       0x11fd4001,
-       0x070bf405,
-       0x0007e87e,
-/* 0x091c: ctx_xfer_no_post_mmio */
-/* 0x091c: ctx_xfer_done */
-       0x000000f8,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
-       0x00000000,
+       0x0006f97e,
+       0x0002277e,
+       0x0006b77e,
+       0xa87ef4bd,
+       0x11f40006,
+       0x40019810,
+       0xf40511fd,
+       0x2e7e070b,
+/* 0x0962: ctx_xfer_no_post_mmio */
+/* 0x0962: ctx_xfer_done */
+       0x00f80008,
        0x00000000,
        0x00000000,
        0x00000000,

diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnvc0.fuc.h b/drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnvc0.fuc.h
index f8f7b278a13fcd181dd6e275ce40cc8a85fe3724..92dfe6a4ac87d9d19ef4922f1f7cad86f26176e3 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnvc0.fuc.h
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnvc0.fuc.h
@@ -528,10 +528,10 @@ uint32_t nvc0_grhub_code[] = {
        0x0001d001,
        0x17f104bd,
        0xf7f00100,
-       0xb521f502,
-       0xc721f507,
-       0x10f7f007,
-       0x081421f5,
+       0x0d21f502,
+       0x1f21f508,
+       0x10f7f008,
+       0x086c21f5,
        0x98000e98,
        0x21f5010f,
        0x14950150,
@@ -574,9 +574,9 @@ uint32_t nvc0_grhub_code[] = {
        0xb6800040,
        0x1bf40132,
        0x00f7f0be,
-       0x081421f5,
+       0x086c21f5,
        0xf500f7f0,
-       0xf107b521,
+       0xf1080d21,
        0xf0010007,
        0x01d00203,
        0xbd04bd00,
@@ -610,8 +610,8 @@ uint32_t nvc0_grhub_code[] = {
        0x09d00203,
        0xf404bd00,
        0x31f40132,
-       0xe821f502,
-       0xf094bd09,
+       0x4021f502,
+       0xf094bd0a,
        0x07f10799,
        0x03f01700,
        0x0009d002,
@@ -621,7 +621,7 @@ uint32_t nvc0_grhub_code[] = {
        0x0203f00f,
        0xbd0009d0,
        0x0131f404,
-       0x09e821f5,
+       0x0a4021f5,
        0x99f094bd,
        0x0007f106,
        0x0203f017,
@@ -631,7 +631,7 @@ uint32_t nvc0_grhub_code[] = {
        0x12b920f9,
        0x0132f402,
        0xf50232f4,
-       0xfc09e821,
+       0xfc0a4021,
        0x0007f120,
        0x0203f0c0,
        0xbd0002d0,
@@ -640,7 +640,7 @@ uint32_t nvc0_grhub_code[] = {
        0xf41f23c8,
        0x31f40d0b,
        0x0232f401,
-       0x09e821f5,
+       0x0a4021f5,
 /* 0x063c: chsw_done */
        0xf10127f0,
        0xf0c30007,
@@ -654,7 +654,7 @@ uint32_t nvc0_grhub_code[] = {
 /* 0x0660: main_not_ctx_switch */
        0xf401e4b0,
        0xf2b90d1b,
-       0x7821f502,
+       0xd021f502,
        0x460ef409,
 /* 0x0670: main_not_ctx_chan */
        0xf402e4b0,
@@ -664,8 +664,8 @@ uint32_t nvc0_grhub_code[] = {
        0x09d00203,
        0xf404bd00,
        0x32f40132,
-       0xe821f502,
-       0xf094bd09,
+       0x4021f502,
+       0xf094bd0a,
        0x07f10799,
        0x03f01700,
        0x0009d002,
@@ -710,18 +710,40 @@ uint32_t nvc0_grhub_code[] = {
 /* 0x072b: ih_no_ctxsw */
        0xe40421f4,
        0xf40400ab,
-       0xb7f1140b,
+       0xe7f16c0b,
+       0xe3f00708,
+       0x6821f440,
+       0xf102ffb9,
+       0xf0040007,
+       0x0fd00203,
+       0xf104bd00,
+       0xf00704e7,
+       0x21f440e3,
+       0x02ffb968,
+       0x030007f1,
+       0xd00203f0,
+       0x04bd000f,
+       0x9450fec7,
+       0xf7f102ee,
+       0xf3f00700,
+       0x00efbb40,
+       0xf16821f4,
+       0xf0020007,
+       0x0fd00203,
+       0xf004bd00,
+       0x21f503f7,
+       0xb7f1037e,
        0xbfb90100,
        0x44e7f102,
        0x40e3f001,
-/* 0x0743: ih_no_fwmthd */
+/* 0x079b: ih_no_fwmthd */
        0xf19d21f4,
-       0xbd0104b7,
+       0xbd0504b7,
        0xb4abffb0,
        0xf10f0bf4,
        0xf0070007,
        0x0bd00303,
-/* 0x075b: ih_no_other */
+/* 0x07b3: ih_no_other */
        0xf104bd00,
        0xf0010007,
        0x0ad00003,
@@ -731,36 +753,36 @@ uint32_t nvc0_grhub_code[] = {
        0xfc90fca0,
        0x0088fe80,
        0x32f480fc,
-/* 0x077f: ctx_4160s */
+/* 0x07d7: ctx_4160s */
        0xf001f800,
        0xffb901f7,
        0x60e7f102,
        0x40e3f041,
-/* 0x078f: ctx_4160s_wait */
+/* 0x07e7: ctx_4160s_wait */
        0xf19d21f4,
        0xf04160e7,
        0x21f440e3,
        0x02ffb968,
        0xf404ffc8,
        0x00f8f00b,
-/* 0x07a4: ctx_4160c */
+/* 0x07fc: ctx_4160c */
        0xffb9f4bd,
        0x60e7f102,
        0x40e3f041,
        0xf89d21f4,
-/* 0x07b5: ctx_4170s */
+/* 0x080d: ctx_4170s */
        0x10f5f000,
        0xf102ffb9,
        0xf04170e7,
        0x21f440e3,
-/* 0x07c7: ctx_4170w */
+/* 0x081f: ctx_4170w */
        0xf100f89d,
        0xf04170e7,
        0x21f440e3,
        0x02ffb968,
        0xf410f4f0,
        0x00f8f01b,
-/* 0x07dc: ctx_redswitch */
+/* 0x0834: ctx_redswitch */
        0x0200e7f1,
        0xf040e5f0,
        0xe5f020e5,
@@ -768,7 +790,7 @@ uint32_t nvc0_grhub_code[] = {
        0x0103f085,
        0xbd000ed0,
        0x08f7f004,
-/* 0x07f8: ctx_redswitch_delay */
+/* 0x0850: ctx_redswitch_delay */
        0xf401f2b6,
        0xe5f1fd1b,
        0xe5f10400,
@@ -776,7 +798,7 @@ uint32_t nvc0_grhub_code[] = {
        0x03f08500,
        0x000ed001,
        0x00f804bd,
-/* 0x0814: ctx_86c */
+/* 0x086c: ctx_86c */
        0x1b0007f1,
        0xd00203f0,
        0x04bd000f,
@@ -787,16 +809,16 @@ uint32_t nvc0_grhub_code[] = {
        0xa86ce7f1,
        0xf441e3f0,
        0x00f89d21,
-/* 0x083c: ctx_mem */
+/* 0x0894: ctx_mem */
        0x840007f1,
        0xd00203f0,
        0x04bd000f,
-/* 0x0848: ctx_mem_wait */
+/* 0x08a0: ctx_mem_wait */
        0x8400f7f1,
        0xcf02f3f0,
        0xfffd00ff,
        0xf31bf405,
-/* 0x085a: ctx_load */
+/* 0x08b2: ctx_load */
        0x94bd00f8,
        0xf10599f0,
        0xf00f0007,
@@ -814,7 +836,7 @@ uint32_t nvc0_grhub_code[] = {
        0x02d00203,
        0xf004bd00,
        0x21f507f7,
-       0x07f1083c,
+       0x07f10894,
        0x03f0c000,
        0x0002d002,
        0x0bfe04bd,
@@ -869,31 +891,31 @@ uint32_t nvc0_grhub_code[] = {
        0x03f01700,
        0x0009d002,
        0x00f804bd,
-/* 0x0978: ctx_chan */
-       0x077f21f5,
-       0x085a21f5,
+/* 0x09d0: ctx_chan */
+       0x07d721f5,
+       0x08b221f5,
        0xf40ca7f0,
        0xf7f0d021,
-       0x3c21f505,
-       0xa421f508,
-/* 0x0993: ctx_mmio_exec */
+       0x9421f505,
+       0xfc21f508,
+/* 0x09eb: ctx_mmio_exec */
        0x9800f807,
        0x07f14103,
        0x03f08100,
        0x0003d002,
        0x34bd04bd,
-/* 0x09a4: ctx_mmio_loop */
+/* 0x09fc: ctx_mmio_loop */
        0xf4ff34c4,
        0x57f10f1b,
        0x53f00200,
        0x0535fa06,
-/* 0x09b6: ctx_mmio_pull */
+/* 0x0a0e: ctx_mmio_pull */
        0x4e9803f8,
        0x814f9880,
        0xb69d21f4,
        0x12b60830,
        0xdf1bf401,
-/* 0x09c8: ctx_mmio_done */
+/* 0x0a20: ctx_mmio_done */
        0xf1160398,
        0xf0810007,
        0x03d00203,
@@ -902,30 +924,30 @@ uint32_t nvc0_grhub_code[] = {
        0x13f00100,
        0x0601fa06,
        0x00f803f8,
-/* 0x09e8: ctx_xfer */
+/* 0x0a40: ctx_xfer */
        0xf104e7f0,
        0xf0020007,
        0x0ed00303,
-/* 0x09f7: ctx_xfer_idle */
+/* 0x0a4f: ctx_xfer_idle */
        0xf104bd00,
        0xf00000e7,
        0xeecf03e3,
        0x00e4f100,
        0xf21bf420,
        0xf40611f4,
-/* 0x0a0e: ctx_xfer_pre */
+/* 0x0a66: ctx_xfer_pre */
        0xf7f01102,
-       0x1421f510,
-       0x7f21f508,
+       0x6c21f510,
+       0xd721f508,
        0x1c11f407,
-/* 0x0a1c: ctx_xfer_pre_load */
+/* 0x0a74: ctx_xfer_pre_load */
        0xf502f7f0,
-       0xf507b521,
-       0xf507c721,
-       0xbd07dc21,
-       0xb521f5f4,
-       0x5a21f507,
-/* 0x0a35: ctx_xfer_exec */
+       0xf5080d21,
+       0xf5081f21,
+       0xbd083421,
+       0x0d21f5f4,
+       0xb221f508,
+/* 0x0a8d: ctx_xfer_exec */
        0x16019808,
        0x07f124bd,
        0x03f00500,
@@ -960,23 +982,65 @@ uint32_t nvc0_grhub_code[] = {
        0x1301f402,
        0xf40ca7f0,
        0xf7f0d021,
-       0x3c21f505,
+       0x9421f505,
        0x3202f408,
-/* 0x0ac4: ctx_xfer_post */
+/* 0x0b1c: ctx_xfer_post */
        0xf502f7f0,
-       0xbd07b521,
-       0x1421f5f4,
+       0xbd080d21,
+       0x6c21f5f4,
        0x7f21f508,
-       0xc721f502,
-       0xf5f4bd07,
-       0xf407b521,
+       0x1f21f502,
+       0xf5f4bd08,
+       0xf4080d21,
        0x01981011,
        0x0511fd40,
        0xf5070bf4,
-/* 0x0aef: ctx_xfer_no_post_mmio */
-       0xf5099321,
-/* 0x0af3: ctx_xfer_done */
-       0xf807a421,
+/* 0x0b47: ctx_xfer_no_post_mmio */
+       0xf509eb21,
+/* 0x0b4b: ctx_xfer_done */
+       0xf807fc21,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
        0x00000000,
        0x00000000,
        0x00000000,

diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnvd7.fuc.h b/drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnvd7.fuc.h
index 624215a005b02be92d803d377a58e65ce1e284b4..62b0c7601d8bba9f1d65f58e0efd650e57aa03bc 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnvd7.fuc.h
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnvd7.fuc.h
@@ -528,10 +528,10 @@ uint32_t nvd7_grhub_code[] = {
        0x0001d001,
        0x17f104bd,
        0xf7f00100,
-       0xb521f502,
-       0xc721f507,
-       0x10f7f007,
-       0x081421f5,
+       0x0d21f502,
+       0x1f21f508,
+       0x10f7f008,
+       0x086c21f5,
        0x98000e98,
        0x21f5010f,
        0x14950150,
@@ -574,9 +574,9 @@ uint32_t nvd7_grhub_code[] = {
        0xb6800040,
        0x1bf40132,
        0x00f7f0be,
-       0x081421f5,
+       0x086c21f5,
        0xf500f7f0,
-       0xf107b521,
+       0xf1080d21,
        0xf0010007,
        0x01d00203,
        0xbd04bd00,
@@ -610,8 +610,8 @@ uint32_t nvd7_grhub_code[] = {
        0x09d00203,
        0xf404bd00,
        0x31f40132,
-       0xe821f502,
-       0xf094bd09,
+       0x4021f502,
+       0xf094bd0a,
        0x07f10799,
        0x03f01700,
        0x0009d002,
@@ -621,7 +621,7 @@ uint32_t nvd7_grhub_code[] = {
        0x0203f00f,
        0xbd0009d0,
        0x0131f404,
-       0x09e821f5,
+       0x0a4021f5,
        0x99f094bd,
        0x0007f106,
        0x0203f017,
@@ -631,7 +631,7 @@ uint32_t nvd7_grhub_code[] = {
        0x12b920f9,
        0x0132f402,
        0xf50232f4,
-       0xfc09e821,
+       0xfc0a4021,
        0x0007f120,
        0x0203f0c0,
        0xbd0002d0,
@@ -640,7 +640,7 @@ uint32_t nvd7_grhub_code[] = {
        0xf41f23c8,
        0x31f40d0b,
        0x0232f401,
-       0x09e821f5,
+       0x0a4021f5,
 /* 0x063c: chsw_done */
        0xf10127f0,
        0xf0c30007,
@@ -654,7 +654,7 @@ uint32_t nvd7_grhub_code[] = {
 /* 0x0660: main_not_ctx_switch */
        0xf401e4b0,
        0xf2b90d1b,
-       0x7821f502,
+       0xd021f502,
        0x460ef409,
 /* 0x0670: main_not_ctx_chan */
        0xf402e4b0,
@@ -664,8 +664,8 @@ uint32_t nvd7_grhub_code[] = {
        0x09d00203,
        0xf404bd00,
        0x32f40132,
-       0xe821f502,
-       0xf094bd09,
+       0x4021f502,
+       0xf094bd0a,
        0x07f10799,
        0x03f01700,
        0x0009d002,
@@ -710,18 +710,40 @@ uint32_t nvd7_grhub_code[] = {
 /* 0x072b: ih_no_ctxsw */
        0xe40421f4,
        0xf40400ab,
-       0xb7f1140b,
+       0xe7f16c0b,
+       0xe3f00708,
+       0x6821f440,
+       0xf102ffb9,
+       0xf0040007,
+       0x0fd00203,
+       0xf104bd00,
+       0xf00704e7,
+       0x21f440e3,
+       0x02ffb968,
+       0x030007f1,
+       0xd00203f0,
+       0x04bd000f,
+       0x9450fec7,
+       0xf7f102ee,
+       0xf3f00700,
+       0x00efbb40,
+       0xf16821f4,
+       0xf0020007,
+       0x0fd00203,
+       0xf004bd00,
+       0x21f503f7,
+       0xb7f1037e,
        0xbfb90100,
        0x44e7f102,
        0x40e3f001,
-/* 0x0743: ih_no_fwmthd */
+/* 0x079b: ih_no_fwmthd */
        0xf19d21f4,
-       0xbd0104b7,
+       0xbd0504b7,
        0xb4abffb0,
        0xf10f0bf4,
        0xf0070007,
        0x0bd00303,
-/* 0x075b: ih_no_other */
+/* 0x07b3: ih_no_other */
        0xf104bd00,
        0xf0010007,
        0x0ad00003,
@@ -731,36 +753,36 @@ uint32_t nvd7_grhub_code[] = {
        0xfc90fca0,
        0x0088fe80,
        0x32f480fc,
-/* 0x077f: ctx_4160s */
+/* 0x07d7: ctx_4160s */
        0xf001f800,
        0xffb901f7,
        0x60e7f102,
        0x40e3f041,
-/* 0x078f: ctx_4160s_wait */
+/* 0x07e7: ctx_4160s_wait */
        0xf19d21f4,
        0xf04160e7,
        0x21f440e3,
        0x02ffb968,
        0xf404ffc8,
        0x00f8f00b,
-/* 0x07a4: ctx_4160c */
+/* 0x07fc: ctx_4160c */
        0xffb9f4bd,
        0x60e7f102,
        0x40e3f041,
        0xf89d21f4,
-/* 0x07b5: ctx_4170s */
+/* 0x080d: ctx_4170s */
        0x10f5f000,
        0xf102ffb9,
        0xf04170e7,
        0x21f440e3,
-/* 0x07c7: ctx_4170w */
+/* 0x081f: ctx_4170w */
        0xf100f89d,
        0xf04170e7,
        0x21f440e3,
        0x02ffb968,
        0xf410f4f0,
        0x00f8f01b,
-/* 0x07dc: ctx_redswitch */
+/* 0x0834: ctx_redswitch */
        0x0200e7f1,
        0xf040e5f0,
        0xe5f020e5,
@@ -768,7 +790,7 @@ uint32_t nvd7_grhub_code[] = {
        0x0103f085,
        0xbd000ed0,
        0x08f7f004,
-/* 0x07f8: ctx_redswitch_delay */
+/* 0x0850: ctx_redswitch_delay */
        0xf401f2b6,
        0xe5f1fd1b,
        0xe5f10400,
@@ -776,7 +798,7 @@ uint32_t nvd7_grhub_code[] = {
        0x03f08500,
        0x000ed001,
        0x00f804bd,
-/* 0x0814: ctx_86c */
+/* 0x086c: ctx_86c */
        0x1b0007f1,
        0xd00203f0,
        0x04bd000f,
@@ -787,16 +809,16 @@ uint32_t nvd7_grhub_code[] = {
        0xa86ce7f1,
        0xf441e3f0,
        0x00f89d21,
-/* 0x083c: ctx_mem */
+/* 0x0894: ctx_mem */
        0x840007f1,
        0xd00203f0,
        0x04bd000f,
-/* 0x0848: ctx_mem_wait */
+/* 0x08a0: ctx_mem_wait */
        0x8400f7f1,
        0xcf02f3f0,
        0xfffd00ff,
        0xf31bf405,
-/* 0x085a: ctx_load */
+/* 0x08b2: ctx_load */
        0x94bd00f8,
        0xf10599f0,
        0xf00f0007,
@@ -814,7 +836,7 @@ uint32_t nvd7_grhub_code[] = {
        0x02d00203,
        0xf004bd00,
        0x21f507f7,
-       0x07f1083c,
+       0x07f10894,
        0x03f0c000,
        0x0002d002,
        0x0bfe04bd,
@@ -869,31 +891,31 @@ uint32_t nvd7_grhub_code[] = {
        0x03f01700,
        0x0009d002,
        0x00f804bd,
-/* 0x0978: ctx_chan */
-       0x077f21f5,
-       0x085a21f5,
+/* 0x09d0: ctx_chan */
+       0x07d721f5,
+       0x08b221f5,
        0xf40ca7f0,
        0xf7f0d021,
-       0x3c21f505,
-       0xa421f508,
-/* 0x0993: ctx_mmio_exec */
+       0x9421f505,
+       0xfc21f508,
+/* 0x09eb: ctx_mmio_exec */
        0x9800f807,
        0x07f14103,
        0x03f08100,
        0x0003d002,
        0x34bd04bd,
-/* 0x09a4: ctx_mmio_loop */
+/* 0x09fc: ctx_mmio_loop */
        0xf4ff34c4,
        0x57f10f1b,
        0x53f00200,
        0x0535fa06,
-/* 0x09b6: ctx_mmio_pull */
+/* 0x0a0e: ctx_mmio_pull */
        0x4e9803f8,
        0x814f9880,
        0xb69d21f4,
        0x12b60830,
        0xdf1bf401,
-/* 0x09c8: ctx_mmio_done */
+/* 0x0a20: ctx_mmio_done */
        0xf1160398,
        0xf0810007,
        0x03d00203,
@@ -902,30 +924,30 @@ uint32_t nvd7_grhub_code[] = {
        0x13f00100,
        0x0601fa06,
        0x00f803f8,
-/* 0x09e8: ctx_xfer */
+/* 0x0a40: ctx_xfer */
        0xf104e7f0,
        0xf0020007,
        0x0ed00303,
-/* 0x09f7: ctx_xfer_idle */
+/* 0x0a4f: ctx_xfer_idle */
        0xf104bd00,
        0xf00000e7,
        0xeecf03e3,
        0x00e4f100,
        0xf21bf420,
        0xf40611f4,
-/* 0x0a0e: ctx_xfer_pre */
+/* 0x0a66: ctx_xfer_pre */
        0xf7f01102,
-       0x1421f510,
-       0x7f21f508,
+       0x6c21f510,
+       0xd721f508,
        0x1c11f407,
-/* 0x0a1c: ctx_xfer_pre_load */
+/* 0x0a74: ctx_xfer_pre_load */
        0xf502f7f0,
-       0xf507b521,
-       0xf507c721,
-       0xbd07dc21,
-       0xb521f5f4,
-       0x5a21f507,
-/* 0x0a35: ctx_xfer_exec */
+       0xf5080d21,
+       0xf5081f21,
+       0xbd083421,
+       0x0d21f5f4,
+       0xb221f508,
+/* 0x0a8d: ctx_xfer_exec */
        0x16019808,
        0x07f124bd,
        0x03f00500,
@@ -960,23 +982,65 @@ uint32_t nvd7_grhub_code[] = {
        0x1301f402,
        0xf40ca7f0,
        0xf7f0d021,
-       0x3c21f505,
+       0x9421f505,
        0x3202f408,
-/* 0x0ac4: ctx_xfer_post */
+/* 0x0b1c: ctx_xfer_post */
        0xf502f7f0,
-       0xbd07b521,
-       0x1421f5f4,
+       0xbd080d21,
+       0x6c21f5f4,
        0x7f21f508,
-       0xc721f502,
-       0xf5f4bd07,
-       0xf407b521,
+       0x1f21f502,
+       0xf5f4bd08,
+       0xf4080d21,
        0x01981011,
        0x0511fd40,
        0xf5070bf4,
-/* 0x0aef: ctx_xfer_no_post_mmio */
-       0xf5099321,
-/* 0x0af3: ctx_xfer_done */
-       0xf807a421,
+/* 0x0b47: ctx_xfer_no_post_mmio */
+       0xf509eb21,
+/* 0x0b4b: ctx_xfer_done */
+       0xf807fc21,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
        0x00000000,
        0x00000000,
        0x00000000,

diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnve0.fuc.h b/drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnve0.fuc.h
index 6547b3dfc7ed09bac0b67b7b307f6b270936ff7b..51c3797d85373293f6c0965c908c429eab71269e 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnve0.fuc.h
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnve0.fuc.h
@@ -528,10 +528,10 @@ uint32_t nve0_grhub_code[] = {
        0x0001d001,
        0x17f104bd,
        0xf7f00100,
-       0x7f21f502,
-       0x9121f507,
+       0xd721f502,
+       0xe921f507,
        0x10f7f007,
-       0x07de21f5,
+       0x083621f5,
        0x98000e98,
        0x21f5010f,
        0x14950150,
@@ -574,9 +574,9 @@ uint32_t nve0_grhub_code[] = {
        0xb6800040,
        0x1bf40132,
        0x00f7f0be,
-       0x07de21f5,
+       0x083621f5,
        0xf500f7f0,
-       0xf1077f21,
+       0xf107d721,
        0xf0010007,
        0x01d00203,
        0xbd04bd00,
@@ -610,8 +610,8 @@ uint32_t nve0_grhub_code[] = {
        0x09d00203,
        0xf404bd00,
        0x31f40132,
-       0xaa21f502,
-       0xf094bd09,
+       0x0221f502,
+       0xf094bd0a,
        0x07f10799,
        0x03f01700,
        0x0009d002,
@@ -621,7 +621,7 @@ uint32_t nve0_grhub_code[] = {
        0x0203f00f,
        0xbd0009d0,
        0x0131f404,
-       0x09aa21f5,
+       0x0a0221f5,
        0x99f094bd,
        0x0007f106,
        0x0203f017,
@@ -631,7 +631,7 @@ uint32_t nve0_grhub_code[] = {
        0x12b920f9,
        0x0132f402,
        0xf50232f4,
-       0xfc09aa21,
+       0xfc0a0221,
        0x0007f120,
        0x0203f0c0,
        0xbd0002d0,
@@ -640,7 +640,7 @@ uint32_t nve0_grhub_code[] = {
        0xf41f23c8,
        0x31f40d0b,
        0x0232f401,
-       0x09aa21f5,
+       0x0a0221f5,
 /* 0x063c: chsw_done */
        0xf10127f0,
        0xf0c30007,
@@ -654,7 +654,7 @@ uint32_t nve0_grhub_code[] = {
 /* 0x0660: main_not_ctx_switch */
        0xf401e4b0,
        0xf2b90d1b,
-       0x4221f502,
+       0x9a21f502,
        0x460ef409,
 /* 0x0670: main_not_ctx_chan */
        0xf402e4b0,
@@ -664,8 +664,8 @@ uint32_t nve0_grhub_code[] = {
        0x09d00203,
        0xf404bd00,
        0x32f40132,
-       0xaa21f502,
-       0xf094bd09,
+       0x0221f502,
+       0xf094bd0a,
        0x07f10799,
        0x03f01700,
        0x0009d002,
@@ -710,18 +710,40 @@ uint32_t nve0_grhub_code[] = {
 /* 0x072b: ih_no_ctxsw */
        0xe40421f4,
        0xf40400ab,
-       0xb7f1140b,
+       0xe7f16c0b,
+       0xe3f00708,
+       0x6821f440,
+       0xf102ffb9,
+       0xf0040007,
+       0x0fd00203,
+       0xf104bd00,
+       0xf00704e7,
+       0x21f440e3,
+       0x02ffb968,
+       0x030007f1,
+       0xd00203f0,
+       0x04bd000f,
+       0x9450fec7,
+       0xf7f102ee,
+       0xf3f00700,
+       0x00efbb40,
+       0xf16821f4,
+       0xf0020007,
+       0x0fd00203,
+       0xf004bd00,
+       0x21f503f7,
+       0xb7f1037e,
        0xbfb90100,
        0x44e7f102,
        0x40e3f001,
-/* 0x0743: ih_no_fwmthd */
+/* 0x079b: ih_no_fwmthd */
        0xf19d21f4,
-       0xbd0104b7,
+       0xbd0504b7,
        0xb4abffb0,
        0xf10f0bf4,
        0xf0070007,
        0x0bd00303,
-/* 0x075b: ih_no_other */
+/* 0x07b3: ih_no_other */
        0xf104bd00,
        0xf0010007,
        0x0ad00003,
@@ -731,19 +753,19 @@ uint32_t nve0_grhub_code[] = {
        0xfc90fca0,
        0x0088fe80,
        0x32f480fc,
-/* 0x077f: ctx_4170s */
+/* 0x07d7: ctx_4170s */
        0xf001f800,
        0xffb910f5,
        0x70e7f102,
        0x40e3f041,
        0xf89d21f4,
-/* 0x0791: ctx_4170w */
+/* 0x07e9: ctx_4170w */
        0x70e7f100,
        0x40e3f041,
        0xb96821f4,
        0xf4f002ff,
        0xf01bf410,
-/* 0x07a6: ctx_redswitch */
+/* 0x07fe: ctx_redswitch */
        0xe7f100f8,
        0xe5f00200,
        0x20e5f040,
@@ -751,7 +773,7 @@ uint32_t nve0_grhub_code[] = {
        0xf0850007,
        0x0ed00103,
        0xf004bd00,
-/* 0x07c2: ctx_redswitch_delay */
+/* 0x081a: ctx_redswitch_delay */
        0xf2b608f7,
        0xfd1bf401,
        0x0400e5f1,
@@ -759,7 +781,7 @@ uint32_t nve0_grhub_code[] = {
        0x850007f1,
        0xd00103f0,
        0x04bd000e,
-/* 0x07de: ctx_86c */
+/* 0x0836: ctx_86c */
        0x07f100f8,
        0x03f01b00,
        0x000fd002,
@@ -770,17 +792,17 @@ uint32_t nve0_grhub_code[] = {
        0xe7f102ff,
        0xe3f0a86c,
        0x9d21f441,
-/* 0x0806: ctx_mem */
+/* 0x085e: ctx_mem */
        0x07f100f8,
        0x03f08400,
        0x000fd002,
-/* 0x0812: ctx_mem_wait */
+/* 0x086a: ctx_mem_wait */
        0xf7f104bd,
        0xf3f08400,
        0x00ffcf02,
        0xf405fffd,
        0x00f8f31b,
-/* 0x0824: ctx_load */
+/* 0x087c: ctx_load */
        0x99f094bd,
        0x0007f105,
        0x0203f00f,
@@ -797,7 +819,7 @@ uint32_t nve0_grhub_code[] = {
        0x0203f083,
        0xbd0002d0,
        0x07f7f004,
-       0x080621f5,
+       0x085e21f5,
        0xc00007f1,
        0xd00203f0,
        0x04bd0002,
@@ -852,29 +874,29 @@ uint32_t nve0_grhub_code[] = {
        0x170007f1,
        0xd00203f0,
        0x04bd0009,
-/* 0x0942: ctx_chan */
+/* 0x099a: ctx_chan */
        0x21f500f8,
-       0xa7f00824,
+       0xa7f0087c,
        0xd021f40c,
        0xf505f7f0,
-       0xf8080621,
-/* 0x0955: ctx_mmio_exec */
+       0xf8085e21,
+/* 0x09ad: ctx_mmio_exec */
        0x41039800,
        0x810007f1,
        0xd00203f0,
        0x04bd0003,
-/* 0x0966: ctx_mmio_loop */
+/* 0x09be: ctx_mmio_loop */
        0x34c434bd,
        0x0f1bf4ff,
        0x020057f1,
        0xfa0653f0,
        0x03f80535,
-/* 0x0978: ctx_mmio_pull */
+/* 0x09d0: ctx_mmio_pull */
        0x98804e98,
        0x21f4814f,
        0x0830b69d,
        0xf40112b6,
-/* 0x098a: ctx_mmio_done */
+/* 0x09e2: ctx_mmio_done */
        0x0398df1b,
        0x0007f116,
        0x0203f081,
@@ -883,30 +905,30 @@ uint32_t nve0_grhub_code[] = {
        0x010017f1,
        0xfa0613f0,
        0x03f80601,
-/* 0x09aa: ctx_xfer */
+/* 0x0a02: ctx_xfer */
        0xe7f000f8,
        0x0007f104,
        0x0303f002,
        0xbd000ed0,
-/* 0x09b9: ctx_xfer_idle */
+/* 0x0a11: ctx_xfer_idle */
        0x00e7f104,
        0x03e3f000,
        0xf100eecf,
        0xf42000e4,
        0x11f4f21b,
        0x0d02f406,
-/* 0x09d0: ctx_xfer_pre */
+/* 0x0a28: ctx_xfer_pre */
        0xf510f7f0,
-       0xf407de21,
-/* 0x09da: ctx_xfer_pre_load */
+       0xf4083621,
+/* 0x0a32: ctx_xfer_pre_load */
        0xf7f01c11,
-       0x7f21f502,
-       0x9121f507,
-       0xa621f507,
+       0xd721f502,
+       0xe921f507,
+       0xfe21f507,
        0xf5f4bd07,
-       0xf5077f21,
-/* 0x09f3: ctx_xfer_exec */
-       0x98082421,
+       0xf507d721,
+/* 0x0a4b: ctx_xfer_exec */
+       0x98087c21,
        0x24bd1601,
        0x050007f1,
        0xd00103f0,
@@ -941,21 +963,21 @@ uint32_t nve0_grhub_code[] = {
        0xa7f01301,
        0xd021f40c,
        0xf505f7f0,
-       0xf4080621,
-/* 0x0a82: ctx_xfer_post */
+       0xf4085e21,
+/* 0x0ada: ctx_xfer_post */
        0xf7f02e02,
-       0x7f21f502,
+       0xd721f502,
        0xf5f4bd07,
-       0xf507de21,
+       0xf5083621,
        0xf5027f21,
-       0xbd079121,
-       0x7f21f5f4,
+       0xbd07e921,
+       0xd721f5f4,
        0x1011f407,
        0xfd400198,
        0x0bf40511,
-       0x5521f507,
-/* 0x0aad: ctx_xfer_no_post_mmio */
-/* 0x0aad: ctx_xfer_done */
+       0xad21f507,
+/* 0x0b05: ctx_xfer_no_post_mmio */
+/* 0x0b05: ctx_xfer_done */
        0x0000f809,
        0x00000000,
        0x00000000,
@@ -977,4 +999,46 @@ uint32_t nve0_grhub_code[] = {
        0x00000000,
        0x00000000,
        0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
 };

diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnvf0.fuc.h b/drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnvf0.fuc.h
index a5aee5a4302f59b1f76b484d25b84cfea2e6ca50..a0af4b703a8e171346cc8448a48c0f8b63451867 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnvf0.fuc.h
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnvf0.fuc.h
@@ -528,10 +528,10 @@ uint32_t nvf0_grhub_code[] = {
        0x0001d001,
        0x17f104bd,
        0xf7f00100,
-       0x7f21f502,
-       0x9121f507,
+       0xd721f502,
+       0xe921f507,
        0x10f7f007,
-       0x07de21f5,
+       0x083621f5,
        0x98000e98,
        0x21f5010f,
        0x14950150,
@@ -574,9 +574,9 @@ uint32_t nvf0_grhub_code[] = {
        0xb6800040,
        0x1bf40132,
        0x00f7f0be,
-       0x07de21f5,
+       0x083621f5,
        0xf500f7f0,
-       0xf1077f21,
+       0xf107d721,
        0xf0010007,
        0x01d00203,
        0xbd04bd00,
@@ -610,8 +610,8 @@ uint32_t nvf0_grhub_code[] = {
        0x09d00203,
        0xf404bd00,
        0x31f40132,
-       0xaa21f502,
-       0xf094bd09,
+       0x0221f502,
+       0xf094bd0a,
        0x07f10799,
        0x03f01700,
        0x0009d002,
@@ -621,7 +621,7 @@ uint32_t nvf0_grhub_code[] = {
        0x0203f037,
        0xbd0009d0,
        0x0131f404,
-       0x09aa21f5,
+       0x0a0221f5,
        0x99f094bd,
        0x0007f106,
        0x0203f017,
@@ -631,7 +631,7 @@ uint32_t nvf0_grhub_code[] = {
        0x12b920f9,
        0x0132f402,
        0xf50232f4,
-       0xfc09aa21,
+       0xfc0a0221,
        0x0007f120,
        0x0203f0c0,
        0xbd0002d0,
@@ -640,7 +640,7 @@ uint32_t nvf0_grhub_code[] = {
        0xf41f23c8,
        0x31f40d0b,
        0x0232f401,
-       0x09aa21f5,
+       0x0a0221f5,
 /* 0x063c: chsw_done */
        0xf10127f0,
        0xf0c30007,
@@ -654,7 +654,7 @@ uint32_t nvf0_grhub_code[] = {
 /* 0x0660: main_not_ctx_switch */
        0xf401e4b0,
        0xf2b90d1b,
-       0x4221f502,
+       0x9a21f502,
        0x460ef409,
 /* 0x0670: main_not_ctx_chan */
        0xf402e4b0,
@@ -664,8 +664,8 @@ uint32_t nvf0_grhub_code[] = {
        0x09d00203,
        0xf404bd00,
        0x32f40132,
-       0xaa21f502,
-       0xf094bd09,
+       0x0221f502,
+       0xf094bd0a,
        0x07f10799,
        0x03f01700,
        0x0009d002,
@@ -710,18 +710,40 @@ uint32_t nvf0_grhub_code[] = {
 /* 0x072b: ih_no_ctxsw */
        0xe40421f4,
        0xf40400ab,
-       0xb7f1140b,
+       0xe7f16c0b,
+       0xe3f00708,
+       0x6821f440,
+       0xf102ffb9,
+       0xf0040007,
+       0x0fd00203,
+       0xf104bd00,
+       0xf00704e7,
+       0x21f440e3,
+       0x02ffb968,
+       0x030007f1,
+       0xd00203f0,
+       0x04bd000f,
+       0x9450fec7,
+       0xf7f102ee,
+       0xf3f00700,
+       0x00efbb40,
+       0xf16821f4,
+       0xf0020007,
+       0x0fd00203,
+       0xf004bd00,
+       0x21f503f7,
+       0xb7f1037e,
        0xbfb90100,
        0x44e7f102,
        0x40e3f001,
-/* 0x0743: ih_no_fwmthd */
+/* 0x079b: ih_no_fwmthd */
        0xf19d21f4,
-       0xbd0104b7,
+       0xbd0504b7,
        0xb4abffb0,
        0xf10f0bf4,
        0xf0070007,
        0x0bd00303,
-/* 0x075b: ih_no_other */
+/* 0x07b3: ih_no_other */
        0xf104bd00,
        0xf0010007,
        0x0ad00003,
@@ -731,19 +753,19 @@ uint32_t nvf0_grhub_code[] = {
        0xfc90fca0,
        0x0088fe80,
        0x32f480fc,
-/* 0x077f: ctx_4170s */
+/* 0x07d7: ctx_4170s */
        0xf001f800,
        0xffb910f5,
        0x70e7f102,
        0x40e3f041,
        0xf89d21f4,
-/* 0x0791: ctx_4170w */
+/* 0x07e9: ctx_4170w */
        0x70e7f100,
        0x40e3f041,
        0xb96821f4,
        0xf4f002ff,
        0xf01bf410,
-/* 0x07a6: ctx_redswitch */
+/* 0x07fe: ctx_redswitch */
        0xe7f100f8,
        0xe5f00200,
        0x20e5f040,
@@ -751,7 +773,7 @@ uint32_t nvf0_grhub_code[] = {
        0xf0850007,
        0x0ed00103,
        0xf004bd00,
-/* 0x07c2: ctx_redswitch_delay */
+/* 0x081a: ctx_redswitch_delay */
        0xf2b608f7,
        0xfd1bf401,
        0x0400e5f1,
@@ -759,7 +781,7 @@ uint32_t nvf0_grhub_code[] = {
        0x850007f1,
        0xd00103f0,
        0x04bd000e,
-/* 0x07de: ctx_86c */
+/* 0x0836: ctx_86c */
        0x07f100f8,
        0x03f02300,
        0x000fd002,
@@ -770,17 +792,17 @@ uint32_t nvf0_grhub_code[] = {
        0xe7f102ff,
        0xe3f0a88c,
        0x9d21f441,
-/* 0x0806: ctx_mem */
+/* 0x085e: ctx_mem */
        0x07f100f8,
        0x03f08400,
        0x000fd002,
-/* 0x0812: ctx_mem_wait */
+/* 0x086a: ctx_mem_wait */
        0xf7f104bd,
        0xf3f08400,
        0x00ffcf02,
        0xf405fffd,
        0x00f8f31b,
-/* 0x0824: ctx_load */
+/* 0x087c: ctx_load */
        0x99f094bd,
        0x0007f105,
        0x0203f037,
@@ -797,7 +819,7 @@ uint32_t nvf0_grhub_code[] = {
        0x0203f083,
        0xbd0002d0,
        0x07f7f004,
-       0x080621f5,
+       0x085e21f5,
        0xc00007f1,
        0xd00203f0,
        0x04bd0002,
@@ -852,29 +874,29 @@ uint32_t nvf0_grhub_code[] = {
        0x170007f1,
        0xd00203f0,
        0x04bd0009,
-/* 0x0942: ctx_chan */
+/* 0x099a: ctx_chan */
        0x21f500f8,
-       0xa7f00824,
+       0xa7f0087c,
        0xd021f40c,
        0xf505f7f0,
-       0xf8080621,
-/* 0x0955: ctx_mmio_exec */
+       0xf8085e21,
+/* 0x09ad: ctx_mmio_exec */
        0x41039800,
        0x810007f1,
        0xd00203f0,
        0x04bd0003,
-/* 0x0966: ctx_mmio_loop */
+/* 0x09be: ctx_mmio_loop */
        0x34c434bd,
        0x0f1bf4ff,
        0x020057f1,
        0xfa0653f0,
        0x03f80535,
-/* 0x0978: ctx_mmio_pull */
+/* 0x09d0: ctx_mmio_pull */
        0x98804e98,
        0x21f4814f,
        0x0830b69d,
        0xf40112b6,
-/* 0x098a: ctx_mmio_done */
+/* 0x09e2: ctx_mmio_done */
        0x0398df1b,
        0x0007f116,
        0x0203f081,
@@ -883,30 +905,30 @@ uint32_t nvf0_grhub_code[] = {
        0x010017f1,
        0xfa0613f0,
        0x03f80601,
-/* 0x09aa: ctx_xfer */
+/* 0x0a02: ctx_xfer */
        0xe7f000f8,
        0x0007f104,
        0x0303f002,
        0xbd000ed0,
-/* 0x09b9: ctx_xfer_idle */
+/* 0x0a11: ctx_xfer_idle */
        0x00e7f104,
        0x03e3f000,
        0xf100eecf,
        0xf42000e4,
        0x11f4f21b,
        0x0d02f406,
-/* 0x09d0: ctx_xfer_pre */
+/* 0x0a28: ctx_xfer_pre */
        0xf510f7f0,
-       0xf407de21,
-/* 0x09da: ctx_xfer_pre_load */
+       0xf4083621,
+/* 0x0a32: ctx_xfer_pre_load */
        0xf7f01c11,
-       0x7f21f502,
-       0x9121f507,
-       0xa621f507,
+       0xd721f502,
+       0xe921f507,
+       0xfe21f507,
        0xf5f4bd07,
-       0xf5077f21,
-/* 0x09f3: ctx_xfer_exec */
-       0x98082421,
+       0xf507d721,
+/* 0x0a4b: ctx_xfer_exec */
+       0x98087c21,
        0x24bd1601,
        0x050007f1,
        0xd00103f0,
@@ -941,21 +963,21 @@ uint32_t nvf0_grhub_code[] = {
        0xa7f01301,
        0xd021f40c,
        0xf505f7f0,
-       0xf4080621,
-/* 0x0a82: ctx_xfer_post */
+       0xf4085e21,
+/* 0x0ada: ctx_xfer_post */
        0xf7f02e02,
-       0x7f21f502,
+       0xd721f502,
        0xf5f4bd07,
-       0xf507de21,
+       0xf5083621,
        0xf5027f21,
-       0xbd079121,
-       0x7f21f5f4,
+       0xbd07e921,
+       0xd721f5f4,
        0x1011f407,
        0xfd400198,
        0x0bf40511,
-       0x5521f507,
-/* 0x0aad: ctx_xfer_no_post_mmio */
-/* 0x0aad: ctx_xfer_done */
+       0xad21f507,
+/* 0x0b05: ctx_xfer_no_post_mmio */
+/* 0x0b05: ctx_xfer_done */
        0x0000f809,
        0x00000000,
        0x00000000,
@@ -977,4 +999,46 @@ uint32_t nvf0_grhub_code[] = {
        0x00000000,
        0x00000000,
        0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
 };

diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/fuc/macros.fuc b/drivers/gpu/drm/nouveau/core/engine/graph/fuc/macros.fuc
index a47d49db5232ed8a06f1911bb1d646b709cc8869..2a0b0f84429928260a3238963a30965abed03f48 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/engine/graph/fuc/macros.fuc
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/fuc/macros.fuc
@@ -30,6 +30,12 @@
 #define GK110 0xf0
 #define GK208 0x108
 
+#define NV_PGRAPH_TRAPPED_ADDR                                         0x400704
+#define NV_PGRAPH_TRAPPED_DATA_LO                                      0x400708
+#define NV_PGRAPH_TRAPPED_DATA_HI                                      0x40070c
+
+#define NV_PGRAPH_FE_OBJECT_TABLE(n)                        ((n) * 4 + 0x400700)
+
 #define NV_PGRAPH_FECS_INTR_ACK                                        0x409004
 #define NV_PGRAPH_FECS_INTR                                            0x409008
 #define NV_PGRAPH_FECS_INTR_FWMTHD                                   0x00000400

diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/fuc/os.h b/drivers/gpu/drm/nouveau/core/engine/graph/fuc/os.h
index fd1d380de094c1b47f013973d3c34f9f040ede63..1718ae4e82243e1e4ffc54906d8af932840bf89b 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/engine/graph/fuc/os.h
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/fuc/os.h
@@ -3,5 +3,6 @@
 
 #define E_BAD_COMMAND  0x00000001
 #define E_CMD_OVERFLOW 0x00000002
+#define E_BAD_FWMTHD   0x00000003
 
 #endif

diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c b/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c
index 1a2d56493cf6a5ce00612430d6b7aa5429c7bdf1..20665c21d80e2fc6c4b243882c2e246590f6492a 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c
@@ -976,7 +976,6 @@ nv50_graph_init(struct nouveau_object *object)
                break;
        case 0xa0:
        default:
-               nv_wr32(priv, 0x402cc0, 0x00000000);
                if (nv_device(priv)->chipset == 0xa0 ||
                    nv_device(priv)->chipset == 0xaa ||
                    nv_device(priv)->chipset == 0xac) {
@@ -991,10 +990,10 @@ nv50_graph_init(struct nouveau_object *object)
 
        /* zero out zcull regions */
        for (i = 0; i < 8; i++) {
-               nv_wr32(priv, 0x402c20 + (i * 8), 0x00000000);
-               nv_wr32(priv, 0x402c24 + (i * 8), 0x00000000);
-               nv_wr32(priv, 0x402c28 + (i * 8), 0x00000000);
-               nv_wr32(priv, 0x402c2c + (i * 8), 0x00000000);
+               nv_wr32(priv, 0x402c20 + (i * 0x10), 0x00000000);
+               nv_wr32(priv, 0x402c24 + (i * 0x10), 0x00000000);
+               nv_wr32(priv, 0x402c28 + (i * 0x10), 0x00000000);
+               nv_wr32(priv, 0x402c2c + (i * 0x10), 0x00000000);
        }
        return 0;
 }

diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c b/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c
index bf7bdb1f291efd9e7a2f5c92db554be638f62e4a..aa08389163540819c769db5ebae8852e09419191 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c
@@ -789,17 +789,40 @@ nvc0_graph_ctxctl_debug(struct nvc0_graph_priv *priv)
 static void
 nvc0_graph_ctxctl_isr(struct nvc0_graph_priv *priv)
 {
-       u32 ustat = nv_rd32(priv, 0x409c18);
+       u32 stat = nv_rd32(priv, 0x409c18);
 
-       if (ustat & 0x00000001)
-               nv_error(priv, "CTXCTL ucode error\n");
-       if (ustat & 0x00080000)
-               nv_error(priv, "CTXCTL watchdog timeout\n");
-       if (ustat & ~0x00080001)
-               nv_error(priv, "CTXCTL 0x%08x\n", ustat);
+       if (stat & 0x00000001) {
+               u32 code = nv_rd32(priv, 0x409814);
+               if (code == E_BAD_FWMTHD) {
+                       u32 class = nv_rd32(priv, 0x409808);
+                       u32  addr = nv_rd32(priv, 0x40980c);
+                       u32  subc = (addr & 0x00070000) >> 16;
+                       u32  mthd = (addr & 0x00003ffc);
+                       u32  data = nv_rd32(priv, 0x409810);
+
+                       nv_error(priv, "FECS MTHD subc %d class 0x%04x "
+                                      "mthd 0x%04x data 0x%08x\n",
+                                subc, class, mthd, data);
 
-       nvc0_graph_ctxctl_debug(priv);
-       nv_wr32(priv, 0x409c20, ustat);
+                       nv_wr32(priv, 0x409c20, 0x00000001);
+                       stat &= ~0x00000001;
+               } else {
+                       nv_error(priv, "FECS ucode error %d\n", code);
+               }
+       }
+
+       if (stat & 0x00080000) {
+               nv_error(priv, "FECS watchdog timeout\n");
+               nvc0_graph_ctxctl_debug(priv);
+               nv_wr32(priv, 0x409c20, 0x00080000);
+               stat &= ~0x00080000;
+       }
+
+       if (stat) {
+               nv_error(priv, "FECS 0x%08x\n", stat);
+               nvc0_graph_ctxctl_debug(priv);
+               nv_wr32(priv, 0x409c20, stat);
+       }
 }
 
 static void

diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.h b/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.h
index 75203a99d9021e7f18d1d7b721f6e10b2f5dba3a..ffc289198dd8d6da24f94e2ce8a1210a82c9ed7c 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.h
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.h
@@ -38,6 +38,8 @@
 #include <engine/fifo.h>
 #include <engine/graph.h>
 
+#include "fuc/os.h"
+
 #define GPC_MAX 32
 #define TPC_MAX (GPC_MAX * 8)
 

diff --git a/drivers/gpu/drm/nouveau/core/subdev/clock/nve0.c b/drivers/gpu/drm/nouveau/core/subdev/clock/nve0.c
index 4ac1aa30ea11f156adc347cc87839ae72ef7ebd1..0e62a324014404f0dc4e4f30c84f7c370c614585 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/subdev/clock/nve0.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/clock/nve0.c
@@ -307,7 +307,6 @@ calc_clk(struct nve0_clock_priv *priv,
                info->dsrc = src0;
                if (div0) {
                        info->ddiv |= 0x80000000;
-                       info->ddiv |= div0 << 8;
                        info->ddiv |= div0;
                }
                if (div1D) {
@@ -352,7 +351,7 @@ nve0_clock_prog_0(struct nve0_clock_priv *priv, int clk)
 {
        struct nve0_clock_info *info = &priv->eng[clk];
        if (!info->ssel) {
-               nv_mask(priv, 0x1371d0 + (clk * 0x04), 0x80003f3f, info->ddiv);
+               nv_mask(priv, 0x1371d0 + (clk * 0x04), 0x8000003f, info->ddiv);
                nv_wr32(priv, 0x137160 + (clk * 0x04), info->dsrc);
        }
 }
@@ -389,7 +388,10 @@ static void
 nve0_clock_prog_3(struct nve0_clock_priv *priv, int clk)
 {
        struct nve0_clock_info *info = &priv->eng[clk];
-       nv_mask(priv, 0x137250 + (clk * 0x04), 0x00003f3f, info->mdiv);
+       if (info->ssel)
+               nv_mask(priv, 0x137250 + (clk * 0x04), 0x00003f00, info->mdiv);
+       else
+               nv_mask(priv, 0x137250 + (clk * 0x04), 0x0000003f, info->mdiv);
 }
 
 static void

diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/ramnve0.c b/drivers/gpu/drm/nouveau/core/subdev/fb/ramnve0.c
index 84c7efbc4f38bc1e72ca9530bdfb966ecd0805b3..1ad3ea503133f838bf6365c6ef28a41f9bb23e48 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/subdev/fb/ramnve0.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/fb/ramnve0.c
@@ -262,8 +262,8 @@ nve0_ram_calc_gddr5(struct nouveau_fb *pfb, u32 freq)
        struct nve0_ram *ram = (void *)pfb->ram;
        struct nve0_ramfuc *fuc = &ram->fuc;
        struct nouveau_ram_data *next = ram->base.next;
-       int vc = !(next->bios.ramcfg_11_02_08);
-       int mv = !(next->bios.ramcfg_11_02_04);
+       int vc = !next->bios.ramcfg_11_02_08;
+       int mv = !next->bios.ramcfg_11_02_04;
        u32 mask, data;
 
        ram_mask(fuc, 0x10f808, 0x40000000, 0x40000000);
@@ -370,8 +370,8 @@ nve0_ram_calc_gddr5(struct nouveau_fb *pfb, u32 freq)
                }
        }
 
-       if ( (next->bios.ramcfg_11_02_40) ||
-            (next->bios.ramcfg_11_07_10)) {
+       if (next->bios.ramcfg_11_02_40 ||
+           next->bios.ramcfg_11_07_10) {
                ram_mask(fuc, 0x132040, 0x00010000, 0x00010000);
                ram_nsec(fuc, 20000);
        }
@@ -417,7 +417,7 @@ nve0_ram_calc_gddr5(struct nouveau_fb *pfb, u32 freq)
                ram_mask(fuc, 0x10f694, 0xff00ff00, data);
        }
 
-       if (ram->mode == 2 && (next->bios.ramcfg_11_08_10))
+       if (ram->mode == 2 && next->bios.ramcfg_11_08_10)
                data = 0x00000080;
        else
                data = 0x00000000;
@@ -425,13 +425,13 @@ nve0_ram_calc_gddr5(struct nouveau_fb *pfb, u32 freq)
 
        mask = 0x00070000;
        data = 0x00000000;
-       if (!(next->bios.ramcfg_11_02_80))
+       if (!next->bios.ramcfg_11_02_80)
                data |= 0x03000000;
-       if (!(next->bios.ramcfg_11_02_40))
+       if (!next->bios.ramcfg_11_02_40)
                data |= 0x00002000;
-       if (!(next->bios.ramcfg_11_07_10))
+       if (!next->bios.ramcfg_11_07_10)
                data |= 0x00004000;
-       if (!(next->bios.ramcfg_11_07_08))
+       if (!next->bios.ramcfg_11_07_08)
                data |= 0x00000003;
        else
                data |= 0x74000000;
@@ -486,7 +486,7 @@ nve0_ram_calc_gddr5(struct nouveau_fb *pfb, u32 freq)
 
        data = mask = 0x00000000;
        if (NOTE00(ramcfg_02_03 != 0)) {
-               data |= (next->bios.ramcfg_11_02_03) << 8;
+               data |= next->bios.ramcfg_11_02_03 << 8;
                mask |= 0x00000300;
        }
        if (NOTE00(ramcfg_01_10)) {
@@ -498,7 +498,7 @@ nve0_ram_calc_gddr5(struct nouveau_fb *pfb, u32 freq)
 
        data = mask = 0x00000000;
        if (NOTE00(timing_30_07 != 0)) {
-               data |= (next->bios.timing_20_30_07) << 28;
+               data |= next->bios.timing_20_30_07 << 28;
                mask |= 0x70000000;
        }
        if (NOTE00(ramcfg_01_01)) {
@@ -510,7 +510,7 @@ nve0_ram_calc_gddr5(struct nouveau_fb *pfb, u32 freq)
 
        data = mask = 0x00000000;
        if (NOTE00(timing_30_07 != 0)) {
-               data |= (next->bios.timing_20_30_07) << 28;
+               data |= next->bios.timing_20_30_07 << 28;
                mask |= 0x70000000;
        }
        if (NOTE00(ramcfg_01_02)) {
@@ -522,16 +522,16 @@ nve0_ram_calc_gddr5(struct nouveau_fb *pfb, u32 freq)
 
        mask = 0x33f00000;
        data = 0x00000000;
-       if (!(next->bios.ramcfg_11_01_04))
+       if (!next->bios.ramcfg_11_01_04)
                data |= 0x20200000;
-       if (!(next->bios.ramcfg_11_07_80))
+       if (!next->bios.ramcfg_11_07_80)
                data |= 0x12800000;
        /*XXX: see note above about there probably being some condition
         *     for the 10f824 stuff that uses ramcfg 3...
         */
-       if ( (next->bios.ramcfg_11_03_f0)) {
+       if (next->bios.ramcfg_11_03_f0) {
                if (next->bios.rammap_11_08_0c) {
-                       if (!(next->bios.ramcfg_11_07_80))
+                       if (!next->bios.ramcfg_11_07_80)
                                mask |= 0x00000020;
                        else
                                data |= 0x00000020;
@@ -563,7 +563,7 @@ nve0_ram_calc_gddr5(struct nouveau_fb *pfb, u32 freq)
                ram_wait(fuc, 0x100710, 0x80000000, 0x80000000, 200000);
        }
 
-       data = (next->bios.timing_20_30_07) << 8;
+       data = next->bios.timing_20_30_07 << 8;
        if (next->bios.ramcfg_11_01_01)
                data |= 0x80000000;
        ram_mask(fuc, 0x100778, 0x00000700, data);
@@ -588,7 +588,7 @@ nve0_ram_calc_gddr5(struct nouveau_fb *pfb, u32 freq)
        ram_wr32(fuc, 0x10f310, 0x00000001); /* REFRESH */
        ram_wr32(fuc, 0x10f210, 0x80000000); /* REFRESH_AUTO = 1 */
 
-       if ((next->bios.ramcfg_11_08_10) && (ram->mode == 2) /*XXX*/) {
+       if (next->bios.ramcfg_11_08_10 && (ram->mode == 2) /*XXX*/) {
                u32 temp = ram_mask(fuc, 0x10f294, 0xff000000, 0x24000000);
                nve0_ram_train(fuc, 0xbc0e0000, 0xa4010000); /*XXX*/
                ram_nsec(fuc, 1000);
@@ -621,8 +621,8 @@ nve0_ram_calc_gddr5(struct nouveau_fb *pfb, u32 freq)
        data  = ram_rd32(fuc, 0x10f978);
        data &= ~0x00046144;
        data |=  0x0000000b;
-       if (!(next->bios.ramcfg_11_07_08)) {
-               if (!(next->bios.ramcfg_11_07_04))
+       if (!next->bios.ramcfg_11_07_08) {
+               if (!next->bios.ramcfg_11_07_04)
                        data |= 0x0000200c;
                else
                        data |= 0x00000000;
@@ -636,11 +636,11 @@ nve0_ram_calc_gddr5(struct nouveau_fb *pfb, u32 freq)
                ram_wr32(fuc, 0x10f830, data);
        }
 
-       if (!(next->bios.ramcfg_11_07_08)) {
+       if (!next->bios.ramcfg_11_07_08) {
                data = 0x88020000;
-               if ( (next->bios.ramcfg_11_07_04))
+               if ( next->bios.ramcfg_11_07_04)
                        data |= 0x10000000;
-               if (!(next->bios.rammap_11_08_10))
+               if (!next->bios.rammap_11_08_10)
                        data |= 0x00080000;
        } else {
                data = 0xa40e0000;
@@ -689,8 +689,8 @@ nve0_ram_calc_sddr3(struct nouveau_fb *pfb, u32 freq)
        const u32 runk0 = ram->fN1 << 16;
        const u32 runk1 = ram->fN1;
        struct nouveau_ram_data *next = ram->base.next;
-       int vc = !(next->bios.ramcfg_11_02_08);
-       int mv = !(next->bios.ramcfg_11_02_04);
+       int vc = !next->bios.ramcfg_11_02_08;
+       int mv = !next->bios.ramcfg_11_02_04;
        u32 mask, data;
 
        ram_mask(fuc, 0x10f808, 0x40000000, 0x40000000);
@@ -705,7 +705,7 @@ nve0_ram_calc_sddr3(struct nouveau_fb *pfb, u32 freq)
        }
 
        ram_mask(fuc, 0x10f200, 0x00000800, 0x00000000);
-       if ((next->bios.ramcfg_11_03_f0))
+       if (next->bios.ramcfg_11_03_f0)
                ram_mask(fuc, 0x10f808, 0x04000000, 0x04000000);
 
        ram_wr32(fuc, 0x10f314, 0x00000001); /* PRECHARGE */
@@ -761,7 +761,7 @@ nve0_ram_calc_sddr3(struct nouveau_fb *pfb, u32 freq)
 
        ram_mask(fuc, 0x1373f4, 0x00000000, 0x00010010);
        data  = ram_rd32(fuc, 0x1373ec) & ~0x00030000;
-       data |= (next->bios.ramcfg_11_03_30) << 12;
+       data |= next->bios.ramcfg_11_03_30 << 16;
        ram_wr32(fuc, 0x1373ec, data);
        ram_mask(fuc, 0x1373f4, 0x00000003, 0x00000000);
        ram_mask(fuc, 0x1373f4, 0x00000010, 0x00000000);
@@ -793,8 +793,8 @@ nve0_ram_calc_sddr3(struct nouveau_fb *pfb, u32 freq)
                }
        }
 
-       if ( (next->bios.ramcfg_11_02_40) ||
-            (next->bios.ramcfg_11_07_10)) {
+       if (next->bios.ramcfg_11_02_40 ||
+           next->bios.ramcfg_11_07_10) {
                ram_mask(fuc, 0x132040, 0x00010000, 0x00010000);
                ram_nsec(fuc, 20000);
        }
@@ -810,13 +810,13 @@ nve0_ram_calc_sddr3(struct nouveau_fb *pfb, u32 freq)
 
        mask = 0x00010000;
        data = 0x00000000;
-       if (!(next->bios.ramcfg_11_02_80))
+       if (!next->bios.ramcfg_11_02_80)
                data |= 0x03000000;
-       if (!(next->bios.ramcfg_11_02_40))
+       if (!next->bios.ramcfg_11_02_40)
                data |= 0x00002000;
-       if (!(next->bios.ramcfg_11_07_10))
+       if (!next->bios.ramcfg_11_07_10)
                data |= 0x00004000;
-       if (!(next->bios.ramcfg_11_07_08))
+       if (!next->bios.ramcfg_11_07_08)
                data |= 0x00000003;
        else
                data |= 0x14000000;
@@ -844,16 +844,16 @@ nve0_ram_calc_sddr3(struct nouveau_fb *pfb, u32 freq)
 
        mask = 0x33f00000;
        data = 0x00000000;
-       if (!(next->bios.ramcfg_11_01_04))
+       if (!next->bios.ramcfg_11_01_04)
                data |= 0x20200000;
-       if (!(next->bios.ramcfg_11_07_80))
+       if (!next->bios.ramcfg_11_07_80)
                data |= 0x12800000;
        /*XXX: see note above about there probably being some condition
         *     for the 10f824 stuff that uses ramcfg 3...
         */
-       if ( (next->bios.ramcfg_11_03_f0)) {
+       if (next->bios.ramcfg_11_03_f0) {
                if (next->bios.rammap_11_08_0c) {
-                       if (!(next->bios.ramcfg_11_07_80))
+                       if (!next->bios.ramcfg_11_07_80)
                                mask |= 0x00000020;
                        else
                                data |= 0x00000020;
@@ -876,7 +876,7 @@ nve0_ram_calc_sddr3(struct nouveau_fb *pfb, u32 freq)
                data = next->bios.timing_20_2c_1fc0;
        ram_mask(fuc, 0x10f24c, 0x7f000000, data << 24);
 
-       ram_mask(fuc, 0x10f224, 0x001f0000, next->bios.timing_20_30_f8);
+       ram_mask(fuc, 0x10f224, 0x001f0000, next->bios.timing_20_30_f8 << 16);
 
        ram_wr32(fuc, 0x10f090, 0x4000007f);
        ram_nsec(fuc, 1000);

diff --git a/drivers/gpu/drm/nouveau/core/subdev/ibus/nve0.c b/drivers/gpu/drm/nouveau/core/subdev/ibus/nve0.c
index 7120124dceac956fa2f1c926907c7e20795cd61f..ebef970a06459f32e77135a7a0e1c20e3470508d 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/subdev/ibus/nve0.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/ibus/nve0.c
@@ -94,6 +94,23 @@ nve0_ibus_intr(struct nouveau_subdev *subdev)
        }
 }
 
+static int
+nve0_ibus_init(struct nouveau_object *object)
+{
+       struct nve0_ibus_priv *priv = (void *)object;
+       int ret = nouveau_ibus_init(&priv->base);
+       if (ret == 0) {
+               nv_mask(priv, 0x122318, 0x0003ffff, 0x00001000);
+               nv_mask(priv, 0x12231c, 0x0003ffff, 0x00000200);
+               nv_mask(priv, 0x122310, 0x0003ffff, 0x00000800);
+               nv_mask(priv, 0x122348, 0x0003ffff, 0x00000100);
+               nv_mask(priv, 0x1223b0, 0x0003ffff, 0x00000fff);
+               nv_mask(priv, 0x122348, 0x0003ffff, 0x00000200);
+               nv_mask(priv, 0x122358, 0x0003ffff, 0x00002880);
+       }
+       return ret;
+}
+
 static int
 nve0_ibus_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
               struct nouveau_oclass *oclass, void *data, u32 size,
@@ -117,7 +134,7 @@ nve0_ibus_oclass = {
        .ofuncs = &(struct nouveau_ofuncs) {
                .ctor = nve0_ibus_ctor,
                .dtor = _nouveau_ibus_dtor,
-               .init = _nouveau_ibus_init,
+               .init = nve0_ibus_init,
                .fini = _nouveau_ibus_fini,
        },
 };

diff --git a/drivers/gpu/drm/nouveau/core/subdev/pwr/fuc/host.fuc b/drivers/gpu/drm/nouveau/core/subdev/pwr/fuc/host.fuc
index 2284ecb1c9b8eebfe0f19b0876cd1800dfe3567d..c2bb616a8da54eb6a115ee7c065fa3f0d6879097 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/subdev/pwr/fuc/host.fuc
+++ b/drivers/gpu/drm/nouveau/core/subdev/pwr/fuc/host.fuc
@@ -83,7 +83,7 @@ host_send:
                // increment GET
                add b32 $r1 0x1
                and $r14 $r1 #fifo_qmaskf
-               nv_iowr(NV_PPWR_FIFO_GET(0), $r1)
+               nv_iowr(NV_PPWR_FIFO_GET(0), $r14)
                bra #host_send
        host_send_done:
        ret

diff --git a/drivers/gpu/drm/nouveau/core/subdev/pwr/fuc/nv108.fuc.h b/drivers/gpu/drm/nouveau/core/subdev/pwr/fuc/nv108.fuc.h
index 4bd43a99fdccbe3d2cde12233644f18bda7561c0..39a5dc150a0551209bf558f2ca667d7ae27899d8 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/subdev/pwr/fuc/nv108.fuc.h
+++ b/drivers/gpu/drm/nouveau/core/subdev/pwr/fuc/nv108.fuc.h
@@ -1018,7 +1018,7 @@ uint32_t nv108_pwr_code[] = {
        0xb600023f,
        0x1ec40110,
        0x04b0400f,
-       0xbd0001f6,
+       0xbd000ef6,
        0xc70ef404,
 /* 0x0328: host_send_done */
 /* 0x032a: host_recv */

diff --git a/drivers/gpu/drm/nouveau/core/subdev/pwr/fuc/nva3.fuc.h b/drivers/gpu/drm/nouveau/core/subdev/pwr/fuc/nva3.fuc.h
index 5a73fa620978aa0b300f87f80e6a1c049a2aa094..254205cd51669a41df494c91df57dbc782029200 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/subdev/pwr/fuc/nva3.fuc.h
+++ b/drivers/gpu/drm/nouveau/core/subdev/pwr/fuc/nva3.fuc.h
@@ -1124,7 +1124,7 @@ uint32_t nva3_pwr_code[] = {
        0x0f1ec401,
        0x04b007f1,
        0xd00604b6,
-       0x04bd0001,
+       0x04bd000e,
 /* 0x03cb: host_send_done */
        0xf8ba0ef4,
 /* 0x03cd: host_recv */

diff --git a/drivers/gpu/drm/nouveau/core/subdev/pwr/fuc/nvc0.fuc.h b/drivers/gpu/drm/nouveau/core/subdev/pwr/fuc/nvc0.fuc.h
index 4dba00d2dd1a6f579d19c4571964440ccbf077b5..7ac87405d01b6865017a6335aa5ecc7ce4addf69 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/subdev/pwr/fuc/nvc0.fuc.h
+++ b/drivers/gpu/drm/nouveau/core/subdev/pwr/fuc/nvc0.fuc.h
@@ -1124,7 +1124,7 @@ uint32_t nvc0_pwr_code[] = {
        0x0f1ec401,
        0x04b007f1,
        0xd00604b6,
-       0x04bd0001,
+       0x04bd000e,
 /* 0x03cb: host_send_done */
        0xf8ba0ef4,
 /* 0x03cd: host_recv */

diff --git a/drivers/gpu/drm/nouveau/core/subdev/pwr/fuc/nvd0.fuc.h b/drivers/gpu/drm/nouveau/core/subdev/pwr/fuc/nvd0.fuc.h
index 5e24c6bc041d6aefbe8de51933ed4c30e0af3fcc..cd9ff1a73284a848d4d70dab7626bb7735adea57 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/subdev/pwr/fuc/nvd0.fuc.h
+++ b/drivers/gpu/drm/nouveau/core/subdev/pwr/fuc/nvd0.fuc.h
@@ -1033,7 +1033,7 @@ uint32_t nvd0_pwr_code[] = {
        0xb6026b21,
        0x1ec40110,
        0xb007f10f,
-       0x0001d004,
+       0x000ed004,
        0x0ef404bd,
 /* 0x0365: host_send_done */
 /* 0x0367: host_recv */

diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c b/drivers/gpu/drm/nouveau/nouveau_display.c
index 26b5647188efd736df9f799168fc99b245bb70c2..47ad74255bf1e6501bc9f7a266d91d329033921e 100644 (file)
--- a/drivers/gpu/drm/nouveau/nouveau_display.c
+++ b/drivers/gpu/drm/nouveau/nouveau_display.c
@@ -736,6 +736,9 @@ nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
                  fb->bits_per_pixel, fb->pitches[0], crtc->x, crtc->y,
                  new_bo->bo.offset };
 
+       /* Keep vblanks on during flip, for the target crtc of this flip */
+       drm_vblank_get(dev, nouveau_crtc(crtc)->index);
+
        /* Emit a page flip */
        if (nv_device(drm->device)->card_type >= NV_50) {
                ret = nv50_display_flip_next(crtc, fb, chan, swap_interval);
@@ -779,6 +782,7 @@ nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
        return 0;
 
 fail_unreserve:
+       drm_vblank_put(dev, nouveau_crtc(crtc)->index);
        ttm_bo_unreserve(&old_bo->bo);
 fail_unpin:
        mutex_unlock(&chan->cli->mutex);
@@ -817,6 +821,9 @@ nouveau_finish_page_flip(struct nouveau_channel *chan,
                drm_send_vblank_event(dev, crtcid, s->event);
        }
 
+       /* Give up ownership of vblank for page-flipped crtc */
+       drm_vblank_put(dev, s->crtc);
+
        list_del(&s->head);
        if (ps)
                *ps = *s;