]> git.karo-electronics.de Git - linux-beck.git/commitdiff
ARM: dts: Add initial LS1021A QDS board dts support
authorJingchang Lu <b35083@freescale.com>
Fri, 31 Oct 2014 09:01:09 +0000 (17:01 +0800)
committerShawn Guo <shawn.guo@linaro.org>
Sun, 23 Nov 2014 07:08:08 +0000 (15:08 +0800)
The LS1021A QorIQ development system (QDS) is a high-performance
computing evaluation, development and test platform supporting
the LS1021A processor. The LS1021A QDS is optimized to support
the high-bandwidth DDR3LP/DDR4 memory and a full complement of
high-speed SerDes ports.

For more detail information about the LS1021AQDS, please refer to
the QorIQ LS1021A Development System Reference Manual.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Chao Fu <B44548@freescale.com>
Signed-off-by: Jason Jin <Jason.Jin@freescale.com>
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Jaiprakash Singh <b44839@freescale.com>
Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
arch/arm/boot/dts/Makefile
arch/arm/boot/dts/ls1021a-qds.dts [new file with mode: 0644]

index 3bc986cfc4ad26d6f68753b74e7f88518d863c9b..2737beae30e0cd3d049bd396dd130da443e8580b 100644 (file)
@@ -251,6 +251,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
        imx6q-tx6q-1110.dtb \
        imx6sl-evk.dtb \
        imx6sx-sdb.dtb \
+       ls1021a-qds.dtb \
        vf610-colibri-eval-v3.dtb \
        vf610-cosmic.dtb \
        vf610-twr.dtb
diff --git a/arch/arm/boot/dts/ls1021a-qds.dts b/arch/arm/boot/dts/ls1021a-qds.dts
new file mode 100644 (file)
index 0000000..9c5e16b
--- /dev/null
@@ -0,0 +1,240 @@
+/*
+ * Copyright 2013-2014 Freescale Semiconductor, Inc.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of
+ *     the License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this file; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "ls1021a.dtsi"
+
+/ {
+       model = "LS1021A QDS Board";
+
+       aliases {
+               enet0_rgmii_phy = &rgmii_phy1;
+               enet1_rgmii_phy = &rgmii_phy2;
+               enet2_rgmii_phy = &rgmii_phy3;
+               enet0_sgmii_phy = &sgmii_phy1c;
+               enet1_sgmii_phy = &sgmii_phy1d;
+       };
+};
+
+&dspi0 {
+       bus-num = <0>;
+       status = "okay";
+
+       dspiflash: at45db021d@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "atmel,at45db021d", "atmel,at45", "atmel,dataflash";
+               spi-max-frequency = <16000000>;
+               spi-cpol;
+               spi-cpha;
+               reg = <0>;
+       };
+};
+
+&i2c0 {
+       status = "okay";
+
+       pca9547: mux@77 {
+               reg = <0x77>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               i2c@0 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0x0>;
+
+                       ds3232: rtc@68 {
+                               compatible = "dallas,ds3232";
+                               reg = <0x68>;
+                               interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
+                       };
+               };
+
+               i2c@2 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0x2>;
+
+                       ina220@40 {
+                               compatible = "ti,ina220";
+                               reg = <0x40>;
+                               shunt-resistor = <1000>;
+                       };
+
+                       ina220@41 {
+                               compatible = "ti,ina220";
+                               reg = <0x41>;
+                               shunt-resistor = <1000>;
+                       };
+               };
+
+               i2c@3 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0x3>;
+
+                       eeprom@56 {
+                               compatible = "atmel,24c512";
+                               reg = <0x56>;
+                       };
+
+                       eeprom@57 {
+                               compatible = "atmel,24c512";
+                               reg = <0x57>;
+                       };
+
+                       adt7461a@4c {
+                               compatible = "adi,adt7461a";
+                               reg = <0x4c>;
+                       };
+               };
+       };
+};
+
+&ifc {
+       #address-cells = <2>;
+       #size-cells = <1>;
+       /* NOR, NAND Flashes and FPGA on board */
+       ranges = <0x0 0x0 0x0 0x60000000 0x08000000
+                 0x2 0x0 0x0 0x7e800000 0x00010000
+                 0x3 0x0 0x0 0x7fb00000 0x00000100>;
+       status = "okay";
+
+       nor@0,0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "cfi-flash";
+               reg = <0x0 0x0 0x8000000>;
+               bank-width = <2>;
+               device-width = <1>;
+       };
+
+       fpga: board-control@3,0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "simple-bus";
+               reg = <0x3 0x0 0x0000100>;
+               bank-width = <1>;
+               device-width = <1>;
+               ranges = <0 3 0 0x100>;
+
+               mdio-mux-emi1 {
+                       compatible = "mdio-mux-mmioreg";
+                       mdio-parent-bus = <&mdio0>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0x54 1>; /* BRDCFG4 */
+                       mux-mask = <0xe0>; /* EMI1[2:0] */
+
+                       /* Onboard PHYs */
+                       ls1021amdio0: mdio@0 {
+                               reg = <0>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               rgmii_phy1: ethernet-phy@1 {
+                                       reg = <0x1>;
+                               };
+                       };
+
+                       ls1021amdio1: mdio@20 {
+                               reg = <0x20>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               rgmii_phy2: ethernet-phy@2 {
+                                       reg = <0x2>;
+                               };
+                       };
+
+                       ls1021amdio2: mdio@40 {
+                               reg = <0x40>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               rgmii_phy3: ethernet-phy@3 {
+                                       reg = <0x3>;
+                               };
+                       };
+
+                       ls1021amdio3: mdio@60 {
+                               reg = <0x60>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               sgmii_phy1c: ethernet-phy@1c {
+                                       reg = <0x1c>;
+                               };
+                       };
+
+                       ls1021amdio4: mdio@80 {
+                               reg = <0x80>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               sgmii_phy1d: ethernet-phy@1d {
+                                       reg = <0x1d>;
+                               };
+                       };
+               };
+       };
+};
+
+&lpuart0 {
+       status = "okay";
+};
+
+&mdio0 {
+       tbi0: tbi-phy@8 {
+               reg = <0x8>;
+               device_type = "tbi-phy";
+       };
+};
+
+&uart0 {
+       status = "okay";
+};
+
+&uart1 {
+       status = "okay";
+};