]> git.karo-electronics.de Git - linux-beck.git/commitdiff
ARM: dts: imx: Fix "ERROR: code indent should use tabs where possible"
authorJagan Teki <jagan@openedev.com>
Wed, 26 Oct 2016 10:01:01 +0000 (15:31 +0530)
committerShawn Guo <shawnguo@kernel.org>
Wed, 2 Nov 2016 14:43:56 +0000 (22:43 +0800)
Fixed code indent tabs in respetcive imx23, imx51, imx53, imx6dl, imx6q
and imx6sx dtsi and dts files.

Signed-off-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
14 files changed:
arch/arm/boot/dts/imx23.dtsi
arch/arm/boot/dts/imx50.dtsi
arch/arm/boot/dts/imx51.dtsi
arch/arm/boot/dts/imx53.dtsi
arch/arm/boot/dts/imx6dl-riotboard.dts
arch/arm/boot/dts/imx6dl-tx6dl-comtft.dts
arch/arm/boot/dts/imx6dl-tx6u-801x.dts
arch/arm/boot/dts/imx6q-phytec-pbab01.dts
arch/arm/boot/dts/imx6q-tx6q-1010-comtft.dts
arch/arm/boot/dts/imx6q-tx6q-1010.dts
arch/arm/boot/dts/imx6q-tx6q-1020-comtft.dts
arch/arm/boot/dts/imx6q-tx6q-1020.dts
arch/arm/boot/dts/imx6sx-sdb.dtsi
arch/arm/boot/dts/imx6sx.dtsi

index 440ee9a4a158dd777defb38274ead1ecaf69241b..8e1543f7aea75e14affd2ab474aec4cd40823e18 100644 (file)
                                reg = <0x80038000 0x2000>;
                                status = "disabled";
                        };
-                };
+               };
 
                apbx@80040000 {
                        compatible = "simple-bus";
index 8fe8beeb68a4baf42cc0d02c6b030fbb04d85328..92a03bc54f7517d02ba5bc4cd9cf73d5c0291a36 100644 (file)
                                        reg = <0x50004000 0x4000>;
                                        interrupts = <1>;
                                        clocks = <&clks IMX5_CLK_ESDHC1_IPG_GATE>,
-                                                <&clks IMX5_CLK_DUMMY>,
-                                                <&clks IMX5_CLK_ESDHC1_PER_GATE>;
+                                                <&clks IMX5_CLK_DUMMY>,
+                                                <&clks IMX5_CLK_ESDHC1_PER_GATE>;
                                        clock-names = "ipg", "ahb", "per";
                                        bus-width = <4>;
                                        status = "disabled";
                                        reg = <0x50008000 0x4000>;
                                        interrupts = <2>;
                                        clocks = <&clks IMX5_CLK_ESDHC2_IPG_GATE>,
-                                                <&clks IMX5_CLK_DUMMY>,
-                                                <&clks IMX5_CLK_ESDHC2_PER_GATE>;
+                                                <&clks IMX5_CLK_DUMMY>,
+                                                <&clks IMX5_CLK_ESDHC2_PER_GATE>;
                                        clock-names = "ipg", "ahb", "per";
                                        bus-width = <4>;
                                        status = "disabled";
                                        reg = <0x5000c000 0x4000>;
                                        interrupts = <33>;
                                        clocks = <&clks IMX5_CLK_UART3_IPG_GATE>,
-                                                <&clks IMX5_CLK_UART3_PER_GATE>;
+                                                <&clks IMX5_CLK_UART3_PER_GATE>;
                                        clock-names = "ipg", "per";
                                        status = "disabled";
                                };
                                        reg = <0x50010000 0x4000>;
                                        interrupts = <36>;
                                        clocks = <&clks IMX5_CLK_ECSPI1_IPG_GATE>,
-                                                <&clks IMX5_CLK_ECSPI1_PER_GATE>;
+                                                <&clks IMX5_CLK_ECSPI1_PER_GATE>;
                                        clock-names = "ipg", "per";
                                        status = "disabled";
                                };
                                        reg = <0x50020000 0x4000>;
                                        interrupts = <3>;
                                        clocks = <&clks IMX5_CLK_ESDHC3_IPG_GATE>,
-                                                <&clks IMX5_CLK_DUMMY>,
-                                                <&clks IMX5_CLK_ESDHC3_PER_GATE>;
+                                                <&clks IMX5_CLK_DUMMY>,
+                                                <&clks IMX5_CLK_ESDHC3_PER_GATE>;
                                        clock-names = "ipg", "ahb", "per";
                                        bus-width = <4>;
                                        status = "disabled";
                                        reg = <0x50024000 0x4000>;
                                        interrupts = <4>;
                                        clocks = <&clks IMX5_CLK_ESDHC4_IPG_GATE>,
-                                                <&clks IMX5_CLK_DUMMY>,
-                                                <&clks IMX5_CLK_ESDHC4_PER_GATE>;
+                                                <&clks IMX5_CLK_DUMMY>,
+                                                <&clks IMX5_CLK_ESDHC4_PER_GATE>;
                                        clock-names = "ipg", "ahb", "per";
                                        bus-width = <4>;
                                        status = "disabled";
                                reg = <0x53fa0000 0x4000>;
                                interrupts = <39>;
                                clocks = <&clks IMX5_CLK_GPT_IPG_GATE>,
-                                        <&clks IMX5_CLK_GPT_HF_GATE>;
+                                        <&clks IMX5_CLK_GPT_HF_GATE>;
                                clock-names = "ipg", "per";
                        };
 
                                compatible = "fsl,imx50-pwm", "fsl,imx27-pwm";
                                reg = <0x53fb4000 0x4000>;
                                clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>,
-                                        <&clks IMX5_CLK_PWM1_HF_GATE>;
+                                        <&clks IMX5_CLK_PWM1_HF_GATE>;
                                clock-names = "ipg", "per";
                                interrupts = <61>;
                        };
                                compatible = "fsl,imx50-pwm", "fsl,imx27-pwm";
                                reg = <0x53fb8000 0x4000>;
                                clocks = <&clks IMX5_CLK_PWM2_IPG_GATE>,
-                                        <&clks IMX5_CLK_PWM2_HF_GATE>;
+                                        <&clks IMX5_CLK_PWM2_HF_GATE>;
                                clock-names = "ipg", "per";
                                interrupts = <94>;
                        };
                                reg = <0x53fbc000 0x4000>;
                                interrupts = <31>;
                                clocks = <&clks IMX5_CLK_UART1_IPG_GATE>,
-                                        <&clks IMX5_CLK_UART1_PER_GATE>;
+                                        <&clks IMX5_CLK_UART1_PER_GATE>;
                                clock-names = "ipg", "per";
                                status = "disabled";
                        };
                                reg = <0x53fc0000 0x4000>;
                                interrupts = <32>;
                                clocks = <&clks IMX5_CLK_UART2_IPG_GATE>,
-                                        <&clks IMX5_CLK_UART2_PER_GATE>;
+                                        <&clks IMX5_CLK_UART2_PER_GATE>;
                                clock-names = "ipg", "per";
                                status = "disabled";
                        };
                                reg = <0x53ff0000 0x4000>;
                                interrupts = <13>;
                                clocks = <&clks IMX5_CLK_UART4_IPG_GATE>,
-                                        <&clks IMX5_CLK_UART4_PER_GATE>;
+                                        <&clks IMX5_CLK_UART4_PER_GATE>;
                                clock-names = "ipg", "per";
                                status = "disabled";
                        };
                                reg = <0x63f90000 0x4000>;
                                interrupts = <86>;
                                clocks = <&clks IMX5_CLK_UART5_IPG_GATE>,
-                                        <&clks IMX5_CLK_UART5_PER_GATE>;
+                                        <&clks IMX5_CLK_UART5_PER_GATE>;
                                clock-names = "ipg", "per";
                                status = "disabled";
                        };
                                reg = <0x63fac000 0x4000>;
                                interrupts = <37>;
                                clocks = <&clks IMX5_CLK_ECSPI2_IPG_GATE>,
-                                        <&clks IMX5_CLK_ECSPI2_PER_GATE>;
+                                        <&clks IMX5_CLK_ECSPI2_PER_GATE>;
                                clock-names = "ipg", "per";
                                status = "disabled";
                        };
                                reg = <0x63fb0000 0x4000>;
                                interrupts = <6>;
                                clocks = <&clks IMX5_CLK_SDMA_GATE>,
-                                        <&clks IMX5_CLK_SDMA_GATE>;
+                                        <&clks IMX5_CLK_SDMA_GATE>;
                                clock-names = "ipg", "ahb";
                                fsl,sdma-ram-script-name = "imx/sdma/sdma-imx50.bin";
                        };
                                reg = <0x63fc0000 0x4000>;
                                interrupts = <38>;
                                clocks = <&clks IMX5_CLK_CSPI_IPG_GATE>,
-                                        <&clks IMX5_CLK_CSPI_IPG_GATE>;
+                                        <&clks IMX5_CLK_CSPI_IPG_GATE>;
                                clock-names = "ipg", "per";
                                status = "disabled";
                        };
                                reg = <0x63fec000 0x4000>;
                                interrupts = <87>;
                                clocks = <&clks IMX5_CLK_FEC_GATE>,
-                                        <&clks IMX5_CLK_FEC_GATE>,
-                                        <&clks IMX5_CLK_FEC_GATE>;
+                                        <&clks IMX5_CLK_FEC_GATE>,
+                                        <&clks IMX5_CLK_FEC_GATE>;
                                clock-names = "ipg", "ahb", "ptp";
                                status = "disabled";
                        };
index f46fe9bf0bcb37a903d7ee05d67cc3289516acac..d8efdab45f89ff07eb3a131936887137f61f9d24 100644 (file)
                        reg = <0x40000000 0x20000000>;
                        interrupts = <11 10>;
                        clocks = <&clks IMX5_CLK_IPU_GATE>,
-                                <&clks IMX5_CLK_IPU_DI0_GATE>,
-                                <&clks IMX5_CLK_IPU_DI1_GATE>;
+                                <&clks IMX5_CLK_IPU_DI0_GATE>,
+                                <&clks IMX5_CLK_IPU_DI1_GATE>;
                        clock-names = "bus", "di0", "di1";
                        resets = <&src 2>;
 
                                        reg = <0x70004000 0x4000>;
                                        interrupts = <1>;
                                        clocks = <&clks IMX5_CLK_ESDHC1_IPG_GATE>,
-                                                <&clks IMX5_CLK_DUMMY>,
-                                                <&clks IMX5_CLK_ESDHC1_PER_GATE>;
+                                                <&clks IMX5_CLK_DUMMY>,
+                                                <&clks IMX5_CLK_ESDHC1_PER_GATE>;
                                        clock-names = "ipg", "ahb", "per";
                                        status = "disabled";
                                };
                                        reg = <0x70008000 0x4000>;
                                        interrupts = <2>;
                                        clocks = <&clks IMX5_CLK_ESDHC2_IPG_GATE>,
-                                                <&clks IMX5_CLK_DUMMY>,
-                                                <&clks IMX5_CLK_ESDHC2_PER_GATE>;
+                                                <&clks IMX5_CLK_DUMMY>,
+                                                <&clks IMX5_CLK_ESDHC2_PER_GATE>;
                                        clock-names = "ipg", "ahb", "per";
                                        bus-width = <4>;
                                        status = "disabled";
                                        reg = <0x7000c000 0x4000>;
                                        interrupts = <33>;
                                        clocks = <&clks IMX5_CLK_UART3_IPG_GATE>,
-                                                <&clks IMX5_CLK_UART3_PER_GATE>;
+                                                <&clks IMX5_CLK_UART3_PER_GATE>;
                                        clock-names = "ipg", "per";
                                        status = "disabled";
                                };
                                        reg = <0x70010000 0x4000>;
                                        interrupts = <36>;
                                        clocks = <&clks IMX5_CLK_ECSPI1_IPG_GATE>,
-                                                <&clks IMX5_CLK_ECSPI1_PER_GATE>;
+                                                <&clks IMX5_CLK_ECSPI1_PER_GATE>;
                                        clock-names = "ipg", "per";
                                        status = "disabled";
                                };
                                        reg = <0x70020000 0x4000>;
                                        interrupts = <3>;
                                        clocks = <&clks IMX5_CLK_ESDHC3_IPG_GATE>,
-                                                <&clks IMX5_CLK_DUMMY>,
-                                                <&clks IMX5_CLK_ESDHC3_PER_GATE>;
+                                                <&clks IMX5_CLK_DUMMY>,
+                                                <&clks IMX5_CLK_ESDHC3_PER_GATE>;
                                        clock-names = "ipg", "ahb", "per";
                                        bus-width = <4>;
                                        status = "disabled";
                                        reg = <0x70024000 0x4000>;
                                        interrupts = <4>;
                                        clocks = <&clks IMX5_CLK_ESDHC4_IPG_GATE>,
-                                                <&clks IMX5_CLK_DUMMY>,
-                                                <&clks IMX5_CLK_ESDHC4_PER_GATE>;
+                                                <&clks IMX5_CLK_DUMMY>,
+                                                <&clks IMX5_CLK_ESDHC4_PER_GATE>;
                                        clock-names = "ipg", "ahb", "per";
                                        bus-width = <4>;
                                        status = "disabled";
                                reg = <0x73fa0000 0x4000>;
                                interrupts = <39>;
                                clocks = <&clks IMX5_CLK_GPT_IPG_GATE>,
-                                        <&clks IMX5_CLK_GPT_HF_GATE>;
+                                        <&clks IMX5_CLK_GPT_HF_GATE>;
                                clock-names = "ipg", "per";
                        };
 
                                compatible = "fsl,imx51-pwm", "fsl,imx27-pwm";
                                reg = <0x73fb4000 0x4000>;
                                clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>,
-                                        <&clks IMX5_CLK_PWM1_HF_GATE>;
+                                        <&clks IMX5_CLK_PWM1_HF_GATE>;
                                clock-names = "ipg", "per";
                                interrupts = <61>;
                        };
                                compatible = "fsl,imx51-pwm", "fsl,imx27-pwm";
                                reg = <0x73fb8000 0x4000>;
                                clocks = <&clks IMX5_CLK_PWM2_IPG_GATE>,
-                                        <&clks IMX5_CLK_PWM2_HF_GATE>;
+                                        <&clks IMX5_CLK_PWM2_HF_GATE>;
                                clock-names = "ipg", "per";
                                interrupts = <94>;
                        };
                                reg = <0x73fbc000 0x4000>;
                                interrupts = <31>;
                                clocks = <&clks IMX5_CLK_UART1_IPG_GATE>,
-                                        <&clks IMX5_CLK_UART1_PER_GATE>;
+                                        <&clks IMX5_CLK_UART1_PER_GATE>;
                                clock-names = "ipg", "per";
                                status = "disabled";
                        };
                                reg = <0x73fc0000 0x4000>;
                                interrupts = <32>;
                                clocks = <&clks IMX5_CLK_UART2_IPG_GATE>,
-                                        <&clks IMX5_CLK_UART2_PER_GATE>;
+                                        <&clks IMX5_CLK_UART2_PER_GATE>;
                                clock-names = "ipg", "per";
                                status = "disabled";
                        };
                                reg = <0x83fac000 0x4000>;
                                interrupts = <37>;
                                clocks = <&clks IMX5_CLK_ECSPI2_IPG_GATE>,
-                                        <&clks IMX5_CLK_ECSPI2_PER_GATE>;
+                                        <&clks IMX5_CLK_ECSPI2_PER_GATE>;
                                clock-names = "ipg", "per";
                                status = "disabled";
                        };
                                reg = <0x83fb0000 0x4000>;
                                interrupts = <6>;
                                clocks = <&clks IMX5_CLK_SDMA_GATE>,
-                                        <&clks IMX5_CLK_SDMA_GATE>;
+                                        <&clks IMX5_CLK_SDMA_GATE>;
                                clock-names = "ipg", "ahb";
                                #dma-cells = <3>;
                                fsl,sdma-ram-script-name = "imx/sdma/sdma-imx51.bin";
                                reg = <0x83fc0000 0x4000>;
                                interrupts = <38>;
                                clocks = <&clks IMX5_CLK_CSPI_IPG_GATE>,
-                                        <&clks IMX5_CLK_CSPI_IPG_GATE>;
+                                        <&clks IMX5_CLK_CSPI_IPG_GATE>;
                                clock-names = "ipg", "per";
                                status = "disabled";
                        };
                                reg = <0x83fec000 0x4000>;
                                interrupts = <87>;
                                clocks = <&clks IMX5_CLK_FEC_GATE>,
-                                        <&clks IMX5_CLK_FEC_GATE>,
-                                        <&clks IMX5_CLK_FEC_GATE>;
+                                        <&clks IMX5_CLK_FEC_GATE>,
+                                        <&clks IMX5_CLK_FEC_GATE>;
                                clock-names = "ipg", "ahb", "ptp";
                                status = "disabled";
                        };
index 0777b41cdfe89d17299ffe42d504a3d0eda4fa7d..88f9e09effdcce8c5f06631022bf00bc2bf53d5b 100644 (file)
                        reg = <0x18000000 0x08000000>;
                        interrupts = <11 10>;
                        clocks = <&clks IMX5_CLK_IPU_GATE>,
-                                <&clks IMX5_CLK_IPU_DI0_GATE>,
-                                <&clks IMX5_CLK_IPU_DI1_GATE>;
+                                <&clks IMX5_CLK_IPU_DI0_GATE>,
+                                <&clks IMX5_CLK_IPU_DI1_GATE>;
                        clock-names = "bus", "di0", "di1";
                        resets = <&src 2>;
 
                                        reg = <0x50004000 0x4000>;
                                        interrupts = <1>;
                                        clocks = <&clks IMX5_CLK_ESDHC1_IPG_GATE>,
-                                                <&clks IMX5_CLK_DUMMY>,
-                                                <&clks IMX5_CLK_ESDHC1_PER_GATE>;
+                                                <&clks IMX5_CLK_DUMMY>,
+                                                <&clks IMX5_CLK_ESDHC1_PER_GATE>;
                                        clock-names = "ipg", "ahb", "per";
                                        bus-width = <4>;
                                        status = "disabled";
                                        reg = <0x50008000 0x4000>;
                                        interrupts = <2>;
                                        clocks = <&clks IMX5_CLK_ESDHC2_IPG_GATE>,
-                                                <&clks IMX5_CLK_DUMMY>,
-                                                <&clks IMX5_CLK_ESDHC2_PER_GATE>;
+                                                <&clks IMX5_CLK_DUMMY>,
+                                                <&clks IMX5_CLK_ESDHC2_PER_GATE>;
                                        clock-names = "ipg", "ahb", "per";
                                        bus-width = <4>;
                                        status = "disabled";
                                        reg = <0x5000c000 0x4000>;
                                        interrupts = <33>;
                                        clocks = <&clks IMX5_CLK_UART3_IPG_GATE>,
-                                                <&clks IMX5_CLK_UART3_PER_GATE>;
+                                                <&clks IMX5_CLK_UART3_PER_GATE>;
                                        clock-names = "ipg", "per";
                                        dmas = <&sdma 42 4 0>, <&sdma 43 4 0>;
                                        dma-names = "rx", "tx";
                                        reg = <0x50010000 0x4000>;
                                        interrupts = <36>;
                                        clocks = <&clks IMX5_CLK_ECSPI1_IPG_GATE>,
-                                                <&clks IMX5_CLK_ECSPI1_PER_GATE>;
+                                                <&clks IMX5_CLK_ECSPI1_PER_GATE>;
                                        clock-names = "ipg", "per";
                                        status = "disabled";
                                };
                                        reg = <0x50020000 0x4000>;
                                        interrupts = <3>;
                                        clocks = <&clks IMX5_CLK_ESDHC3_IPG_GATE>,
-                                                <&clks IMX5_CLK_DUMMY>,
-                                                <&clks IMX5_CLK_ESDHC3_PER_GATE>;
+                                                <&clks IMX5_CLK_DUMMY>,
+                                                <&clks IMX5_CLK_ESDHC3_PER_GATE>;
                                        clock-names = "ipg", "ahb", "per";
                                        bus-width = <4>;
                                        status = "disabled";
                                        reg = <0x50024000 0x4000>;
                                        interrupts = <4>;
                                        clocks = <&clks IMX5_CLK_ESDHC4_IPG_GATE>,
-                                                <&clks IMX5_CLK_DUMMY>,
-                                                <&clks IMX5_CLK_ESDHC4_PER_GATE>;
+                                                <&clks IMX5_CLK_DUMMY>,
+                                                <&clks IMX5_CLK_ESDHC4_PER_GATE>;
                                        clock-names = "ipg", "ahb", "per";
                                        bus-width = <4>;
                                        status = "disabled";
                                reg = <0x53fa0000 0x4000>;
                                interrupts = <39>;
                                clocks = <&clks IMX5_CLK_GPT_IPG_GATE>,
-                                        <&clks IMX5_CLK_GPT_HF_GATE>;
+                                        <&clks IMX5_CLK_GPT_HF_GATE>;
                                clock-names = "ipg", "per";
                        };
 
                                reg = <0x53fa8008 0x4>;
                                gpr = <&gpr>;
                                clocks = <&clks IMX5_CLK_LDB_DI0_SEL>,
-                                        <&clks IMX5_CLK_LDB_DI1_SEL>,
-                                        <&clks IMX5_CLK_IPU_DI0_SEL>,
-                                        <&clks IMX5_CLK_IPU_DI1_SEL>,
-                                        <&clks IMX5_CLK_LDB_DI0_GATE>,
-                                        <&clks IMX5_CLK_LDB_DI1_GATE>;
+                                        <&clks IMX5_CLK_LDB_DI1_SEL>,
+                                        <&clks IMX5_CLK_IPU_DI0_SEL>,
+                                        <&clks IMX5_CLK_IPU_DI1_SEL>,
+                                        <&clks IMX5_CLK_LDB_DI0_GATE>,
+                                        <&clks IMX5_CLK_LDB_DI1_GATE>;
                                clock-names = "di0_pll", "di1_pll",
                                              "di0_sel", "di1_sel",
                                              "di0", "di1";
                                compatible = "fsl,imx53-pwm", "fsl,imx27-pwm";
                                reg = <0x53fb4000 0x4000>;
                                clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>,
-                                        <&clks IMX5_CLK_PWM1_HF_GATE>;
+                                        <&clks IMX5_CLK_PWM1_HF_GATE>;
                                clock-names = "ipg", "per";
                                interrupts = <61>;
                        };
                                compatible = "fsl,imx53-pwm", "fsl,imx27-pwm";
                                reg = <0x53fb8000 0x4000>;
                                clocks = <&clks IMX5_CLK_PWM2_IPG_GATE>,
-                                        <&clks IMX5_CLK_PWM2_HF_GATE>;
+                                        <&clks IMX5_CLK_PWM2_HF_GATE>;
                                clock-names = "ipg", "per";
                                interrupts = <94>;
                        };
                                reg = <0x53fbc000 0x4000>;
                                interrupts = <31>;
                                clocks = <&clks IMX5_CLK_UART1_IPG_GATE>,
-                                        <&clks IMX5_CLK_UART1_PER_GATE>;
+                                        <&clks IMX5_CLK_UART1_PER_GATE>;
                                clock-names = "ipg", "per";
                                dmas = <&sdma 18 4 0>, <&sdma 19 4 0>;
                                dma-names = "rx", "tx";
                                reg = <0x53fc0000 0x4000>;
                                interrupts = <32>;
                                clocks = <&clks IMX5_CLK_UART2_IPG_GATE>,
-                                        <&clks IMX5_CLK_UART2_PER_GATE>;
+                                        <&clks IMX5_CLK_UART2_PER_GATE>;
                                clock-names = "ipg", "per";
                                dmas = <&sdma 12 4 0>, <&sdma 13 4 0>;
                                dma-names = "rx", "tx";
                                reg = <0x53fc8000 0x4000>;
                                interrupts = <82>;
                                clocks = <&clks IMX5_CLK_CAN1_IPG_GATE>,
-                                        <&clks IMX5_CLK_CAN1_SERIAL_GATE>;
+                                        <&clks IMX5_CLK_CAN1_SERIAL_GATE>;
                                clock-names = "ipg", "per";
                                status = "disabled";
                        };
                                reg = <0x53fcc000 0x4000>;
                                interrupts = <83>;
                                clocks = <&clks IMX5_CLK_CAN2_IPG_GATE>,
-                                        <&clks IMX5_CLK_CAN2_SERIAL_GATE>;
+                                        <&clks IMX5_CLK_CAN2_SERIAL_GATE>;
                                clock-names = "ipg", "per";
                                status = "disabled";
                        };
                                reg = <0x53ff0000 0x4000>;
                                interrupts = <13>;
                                clocks = <&clks IMX5_CLK_UART4_IPG_GATE>,
-                                        <&clks IMX5_CLK_UART4_PER_GATE>;
+                                        <&clks IMX5_CLK_UART4_PER_GATE>;
                                clock-names = "ipg", "per";
                                dmas = <&sdma 2 4 0>, <&sdma 3 4 0>;
                                dma-names = "rx", "tx";
                                reg = <0x63f90000 0x4000>;
                                interrupts = <86>;
                                clocks = <&clks IMX5_CLK_UART5_IPG_GATE>,
-                                        <&clks IMX5_CLK_UART5_PER_GATE>;
+                                        <&clks IMX5_CLK_UART5_PER_GATE>;
                                clock-names = "ipg", "per";
                                dmas = <&sdma 16 4 0>, <&sdma 17 4 0>;
                                dma-names = "rx", "tx";
                                reg = <0x63fac000 0x4000>;
                                interrupts = <37>;
                                clocks = <&clks IMX5_CLK_ECSPI2_IPG_GATE>,
-                                        <&clks IMX5_CLK_ECSPI2_PER_GATE>;
+                                        <&clks IMX5_CLK_ECSPI2_PER_GATE>;
                                clock-names = "ipg", "per";
                                status = "disabled";
                        };
                                reg = <0x63fb0000 0x4000>;
                                interrupts = <6>;
                                clocks = <&clks IMX5_CLK_SDMA_GATE>,
-                                        <&clks IMX5_CLK_SDMA_GATE>;
+                                        <&clks IMX5_CLK_SDMA_GATE>;
                                clock-names = "ipg", "ahb";
                                #dma-cells = <3>;
                                fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
                                reg = <0x63fc0000 0x4000>;
                                interrupts = <38>;
                                clocks = <&clks IMX5_CLK_CSPI_IPG_GATE>,
-                                        <&clks IMX5_CLK_CSPI_IPG_GATE>;
+                                        <&clks IMX5_CLK_CSPI_IPG_GATE>;
                                clock-names = "ipg", "per";
                                status = "disabled";
                        };
                                reg = <0x63fec000 0x4000>;
                                interrupts = <87>;
                                clocks = <&clks IMX5_CLK_FEC_GATE>,
-                                        <&clks IMX5_CLK_FEC_GATE>,
-                                        <&clks IMX5_CLK_FEC_GATE>;
+                                        <&clks IMX5_CLK_FEC_GATE>,
+                                        <&clks IMX5_CLK_FEC_GATE>;
                                clock-names = "ipg", "ahb", "ptp";
                                status = "disabled";
                        };
                                reg = <0x63ff0000 0x1000>;
                                interrupts = <92>;
                                clocks = <&clks IMX5_CLK_TVE_GATE>,
-                                        <&clks IMX5_CLK_IPU_DI1_SEL>;
+                                        <&clks IMX5_CLK_IPU_DI1_SEL>;
                                clock-names = "tve", "di_sel";
                                status = "disabled";
 
                                reg = <0x63ff4000 0x1000>;
                                interrupts = <9>;
                                clocks = <&clks IMX5_CLK_VPU_REFERENCE_GATE>,
-                                        <&clks IMX5_CLK_VPU_GATE>;
+                                        <&clks IMX5_CLK_VPU_GATE>;
                                clock-names = "per", "ahb";
                                resets = <&src 1>;
                                iram = <&ocram>;
                                reg = <0x63ff8000 0x4000>;
                                interrupts = <19 20>;
                                clocks = <&clks IMX5_CLK_SAHARA_IPG_GATE>,
-                                        <&clks IMX5_CLK_SAHARA_IPG_GATE>;
+                                        <&clks IMX5_CLK_SAHARA_IPG_GATE>;
                                clock-names = "ipg", "ahb";
                        };
                };
index 75d73437adf7ee239425565d91eddf1dd35090a1..2cb72824e8004801526cdbd1b6261ba81b3c3ca3 100644 (file)
                                MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030         /* AR8035 pin strapping: MODE#3: pull up */
                                MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x130b0         /* AR8035 pin strapping: MODE#0: pull down */
                                MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8      /* GPIO16 -> AR8035 25MHz */
-                               MX6QDL_PAD_EIM_D31__GPIO3_IO31          0x130b0         /* RGMII_nRST */
+                               MX6QDL_PAD_EIM_D31__GPIO3_IO31          0x130b0         /* RGMII_nRST */
                                MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28       0x180b0         /* AR8035 interrupt */
                                MX6QDL_PAD_GPIO_6__ENET_IRQ             0x000b1
                        >;
index 063fe7510da5f7652e0fcbb52c0f8fd95806a70f..aac42ac465b64619a82773bf097cc49051c5aa08 100644 (file)
                                pixelclk-active = <1>;
                        };
                };
-        };
+       };
 };
 
 &can1 {
index b7a72840b7f0c73c72e676187442e9299a3157f0..d1f1298ec55a8f28e80a297ee9e15d62d8385d28 100644 (file)
                                pixelclk-active = <0>;
                        };
                };
-        };
+       };
 };
 
 &ipu1_di0_disp0 {
index c139ac0ebe15ff0c0d1bdc7b06e0f01eba4273f3..1f4771304da8b49ba4f59aefd792bdab345089db 100644 (file)
@@ -23,5 +23,5 @@
 };
 
 &sata {
-        status = "okay";
+       status = "okay";
 };
index 65e95ae7509a45cd408fe5fc58bfed2111c605b7..71746edc2ee9218d21cd8a738188ff24370862b0 100644 (file)
                                pixelclk-active = <1>;
                        };
                };
-        };
+       };
 };
 
 &can1 {
index 20cd0e7b3e210231f6c834e3f5f2104c12abd1e1..f9cd21a41a797c8b2dc81a04f1485de650611e3e 100644 (file)
                                pixelclk-active = <0>;
                        };
                };
-        };
+       };
 };
 
 &ipu1_di0_disp0 {
index 9ed243b704ff5c490e46bfa17320cb040e5ad5e5..959ff3fb7304e4c3aef373eb6801e54ddb086d90 100644 (file)
                                pixelclk-active = <1>;
                        };
                };
-        };
+       };
 };
 
 &can1 {
index 347b531d37637a31cb5c89ca7a52b3239cea451f..b49133d25d80995e7a38d87195fc1c588c753efc 100644 (file)
                                pixelclk-active = <0>;
                        };
                };
-        };
+       };
 };
 
 &ds1339 {
index 9d70cfd40aff662bd9ede619f79a7f34d992f44d..7327bcde843f2bb6b091c2fc12b9ab5631287e9d 100644 (file)
 };
 
 &i2c4 {
-        clock-frequency = <100000>;
-        pinctrl-names = "default";
-        pinctrl-0 = <&pinctrl_i2c4>;
-        status = "okay";
+       clock-frequency = <100000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c4>;
+       status = "okay";
 
        codec: wm8962@1a {
                compatible = "wlf,wm8962";
index 9526c3854b28920777e238985d5b0fd46686b288..bd9fe674560186c5e0e7c636a30ce1b94993396b 100644 (file)
                                fsl,num-tx-queues=<3>;
                                fsl,num-rx-queues=<3>;
                                status = "disabled";
-                        };
+                       };
 
                        mlb: mlb@0218c000 {
                                reg = <0x0218c000 0x4000>;
                                fsl,adck-max-frequency = <30000000>, <40000000>,
                                                         <20000000>;
                                status = "disabled";
-                        };
+                       };
 
                        adc2: adc@02284000 {
                                compatible = "fsl,imx6sx-adc", "fsl,vf610-adc";
                                fsl,adck-max-frequency = <30000000>, <40000000>,
                                                         <20000000>;
                                status = "disabled";
-                        };
+                       };
 
                        wdog3: wdog@02288000 {
                                compatible = "fsl,imx6sx-wdt", "fsl,imx21-wdt";