drm/i915: VLV/CHV PSR needs to exit PSR on every flush.

ON these platforms we don't have hardware tracking working for any case.
So we need to fake this on software by forcing psr to exit on every
flush.

Manual tests indicated this was needed.

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Durgadoss R <durgadoss.r@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index dd0e6e0447d4933064fa7f16acd48dc49ccac30e..afb8b8ce8d9fbd14be0a09ce0fe275b6fadc1ae5 100644 (file)
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -620,13 +620,11 @@ void intel_psr_flush(struct drm_device *dev,
 
        /*
         * On Valleyview and Cherryview we don't use hardware tracking so
-        * sprite plane updates or cursor moves don't result in a PSR
+        * any plane updates or cursor moves don't result in a PSR
         * invalidating. Which means we need to manually fake this in
         * software for all flushes, not just when we've seen a preceding
         * invalidation through frontbuffer rendering. */
-       if (!HAS_DDI(dev) &&
-           ((frontbuffer_bits & INTEL_FRONTBUFFER_SPRITE(pipe)) ||
-            (frontbuffer_bits & INTEL_FRONTBUFFER_CURSOR(pipe))))
+       if (!HAS_DDI(dev))
                intel_psr_exit(dev);
 
        if (!dev_priv->psr.active && !dev_priv->psr.busy_frontbuffer_bits)