struct nvkm_sw *sw;
struct nvkm_engine *vic;
struct nvkm_engine *vp;
+
+ struct nouveau_platform_gpu *gpu;
};
struct nvkm_device *nvkm_device_find(u64 name);
};
struct drm_device *
-nouveau_platform_device_create_(struct platform_device *pdev, int size,
- void **pobject)
+nouveau_platform_device_create(struct platform_device *pdev,
+ struct nvkm_device **pdevice)
{
struct drm_device *drm;
int err;
- err = nvkm_device_create_(pdev, NVKM_BUS_PLATFORM,
- nouveau_platform_name(pdev),
- dev_name(&pdev->dev), nouveau_config,
- nouveau_debug, size, pobject);
+ err = nvkm_device_create(pdev, NVKM_BUS_PLATFORM,
+ nouveau_platform_name(pdev),
+ dev_name(&pdev->dev), nouveau_config,
+ nouveau_debug, pdevice);
if (err)
return ERR_PTR(err);
return drm;
err_free:
- nvkm_object_ref(NULL, (struct nvkm_object **)pobject);
+ nvkm_object_ref(NULL, (struct nvkm_object **)pdevice);
return ERR_PTR(err);
}
int nouveau_pmops_suspend(struct device *);
int nouveau_pmops_resume(struct device *);
-#define nouveau_platform_device_create(p, u) \
- nouveau_platform_device_create_(p, sizeof(**u), (void **)u)
struct drm_device *
-nouveau_platform_device_create_(struct platform_device *pdev,
- int size, void **pobject);
+nouveau_platform_device_create(struct platform_device *, struct nvkm_device **);
void nouveau_drm_device_remove(struct drm_device *dev);
#define NV_PRINTK(l,c,f,a...) do { \
static int nouveau_platform_probe(struct platform_device *pdev)
{
struct nouveau_platform_gpu *gpu;
- struct nouveau_platform_device *device;
+ struct nvkm_device *device;
struct drm_device *drm;
int err;
}
device->gpu = gpu;
- device->gpu_speedo = tegra_sku_info.gpu_speedo_value;
+ gpu->gpu_speedo = tegra_sku_info.gpu_speedo_value;
err = drm_dev_register(drm, 0);
if (err < 0)
struct drm_device *drm_dev = platform_get_drvdata(pdev);
struct nouveau_drm *drm = nouveau_drm(drm_dev);
struct nvkm_device *device = nvxx_device(&drm->device);
- struct nouveau_platform_gpu *gpu = nv_device_to_platform(device)->gpu;
+ struct nouveau_platform_gpu *gpu = device->gpu;
int err;
nouveau_drm_device_remove(drm_dev);
struct iommu_domain *domain;
unsigned long pgshift;
} iommu;
-};
-
-struct nouveau_platform_device {
- struct nvkm_device device;
-
- struct nouveau_platform_gpu *gpu;
int gpu_speedo;
};
-#define nv_device_to_platform(d) \
- container_of(d, struct nouveau_platform_device, device)
-
extern struct platform_driver nouveau_platform_driver;
-
#endif
struct nvkm_oclass *oclass, void *data, u32 size,
struct nvkm_object **pobject)
{
+ struct nvkm_device *device = (void *)parent;
struct gk20a_clk *clk;
- struct nouveau_platform_device *plat;
int ret;
int i;
clk->params = &gk20a_pllg_params;
- plat = nv_device_to_platform(nv_device(parent));
- clk->parent_rate = clk_get_rate(plat->gpu->clk);
+ clk->parent_rate = clk_get_rate(device->gpu->clk);
nvkm_info(&clk->base.subdev, "parent clock rate: %d Mhz\n",
clk->parent_rate / MHZ);
struct nvkm_oclass *oclass, void *data, u32 size,
struct nvkm_object **pobject)
{
+ struct nvkm_device *device = (void *)parent;
struct gk20a_instmem *imem;
- struct nouveau_platform_device *plat;
int ret;
ret = nvkm_instmem_create(parent, engine, oclass, &imem);
spin_lock_init(&imem->lock);
- plat = nv_device_to_platform(nv_device(parent));
- if (plat->gpu->iommu.domain) {
- imem->domain = plat->gpu->iommu.domain;
- imem->mm = plat->gpu->iommu.mm;
- imem->iommu_pgshift = plat->gpu->iommu.pgshift;
- imem->mm_mutex = &plat->gpu->iommu.mutex;
+ if (device->gpu->iommu.domain) {
+ imem->domain = device->gpu->iommu.domain;
+ imem->mm = device->gpu->iommu.mm;
+ imem->iommu_pgshift = device->gpu->iommu.pgshift;
+ imem->mm_mutex = &device->gpu->iommu.mutex;
nvkm_info(&imem->base.subdev, "using IOMMU\n");
} else {
struct nvkm_oclass *oclass, void *data, u32 size,
struct nvkm_object **pobject)
{
+ struct nvkm_device *device = (void *)parent;
struct gk20a_volt *volt;
- struct nouveau_platform_device *plat;
int i, ret, uv;
ret = nvkm_volt_create(parent, engine, oclass, &volt);
if (ret)
return ret;
- plat = nv_device_to_platform(nv_device(parent));
-
- uv = regulator_get_voltage(plat->gpu->vdd);
+ uv = regulator_get_voltage(device->gpu->vdd);
nvkm_info(&volt->base.subdev, "The default voltage is %duV\n", uv);
- volt->vdd = plat->gpu->vdd;
+ volt->vdd = device->gpu->vdd;
volt->base.vid_get = gk20a_volt_vid_get;
volt->base.vid_set = gk20a_volt_vid_set;
volt->base.set_id = gk20a_volt_set_id;
volt->base.vid[i].vid = i;
volt->base.vid[i].uv =
gk20a_volt_calc_voltage(&gk20a_cvb_coef[i],
- plat->gpu_speedo);
+ device->gpu->gpu_speedo);
nvkm_debug(&volt->base.subdev, "%2d: vid=%d, uv=%d\n", i,
volt->base.vid[i].vid, volt->base.vid[i].uv);
}