},
};
-static struct clk sahara_clk[] = {
+static struct clk scc_clk[] = {
{
__INIT_CLK_DEBUG(sahara_clk_0)
.parent = &ahb_clk,
- .secondary = &sahara_clk[1],
- .enable_reg = MXC_CCM_CCGR4,
- .enable_shift = MXC_CCM_CCGRx_CG7_OFFSET,
+ .secondary = &scc_clk[1],
+ .enable_reg = MXC_CCM_CCGR1,
+ .enable_shift = MXC_CCM_CCGRx_CG15_OFFSET,
.enable = _clk_enable,
.disable = _clk_disable,
},
{
__INIT_CLK_DEBUG(sahara_clk_1)
.parent = &tmax1_clk,
- .secondary = &emi_fast_clk,
+ .secondary = &scc_clk[2],
+ },
+ {
+ .parent = &emi_fast_clk,
+ .secondary = &emi_intr_clk[0],
}
};
-static struct clk scc_clk[] = {
+static struct clk sahara_clk[] = {
{
__INIT_CLK_DEBUG(scc_clk_0)
.parent = &ahb_clk,
- .secondary = &scc_clk[1],
- .enable_reg = MXC_CCM_CCGR1,
- .enable_shift = MXC_CCM_CCGRx_CG15_OFFSET,
+ .secondary = &sahara_clk[1],
+ .enable_reg = MXC_CCM_CCGR4,
+ .enable_shift = MXC_CCM_CCGRx_CG7_OFFSET,
.enable = _clk_enable,
.disable = _clk_disable,
},
{
__INIT_CLK_DEBUG(scc_clk_1)
.parent = &tmax1_clk,
+ .secondary = &sahara_clk[2],
+ },
+ {
+ .parent = &scc_clk,
.secondary = &emi_fast_clk,
}
};