drm/i915/gvt: add more registers to context save/restore list

the value of those registers should be applied to hardware on
context restoring

Signed-off-by: Zhao Yan <yan.y.zhao@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>

diff --git a/drivers/gpu/drm/i915/gvt/render.c b/drivers/gpu/drm/i915/gvt/render.c
index 2b3a642284b6da67f8f5d821256314d896799298..73f052a4f4244d9c31ce8ad875978a50f8d084c4 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/render.c
+++ b/drivers/gpu/drm/i915/gvt/render.c
@@ -53,6 +53,14 @@ static struct render_mmio gen8_render_mmio_list[] = {
        {RCS, _MMIO(0x24d4), 0, false},
        {RCS, _MMIO(0x24d8), 0, false},
        {RCS, _MMIO(0x24dc), 0, false},
+       {RCS, _MMIO(0x24e0), 0, false},
+       {RCS, _MMIO(0x24e4), 0, false},
+       {RCS, _MMIO(0x24e8), 0, false},
+       {RCS, _MMIO(0x24ec), 0, false},
+       {RCS, _MMIO(0x24f0), 0, false},
+       {RCS, _MMIO(0x24f4), 0, false},
+       {RCS, _MMIO(0x24f8), 0, false},
+       {RCS, _MMIO(0x24fc), 0, false},
        {RCS, _MMIO(0x7004), 0xffff, true},
        {RCS, _MMIO(0x7008), 0xffff, true},
        {RCS, _MMIO(0x7000), 0xffff, true},
@@ -76,6 +84,14 @@ static struct render_mmio gen9_render_mmio_list[] = {
        {RCS, _MMIO(0x24d4), 0, false},
        {RCS, _MMIO(0x24d8), 0, false},
        {RCS, _MMIO(0x24dc), 0, false},
+       {RCS, _MMIO(0x24e0), 0, false},
+       {RCS, _MMIO(0x24e4), 0, false},
+       {RCS, _MMIO(0x24e8), 0, false},
+       {RCS, _MMIO(0x24ec), 0, false},
+       {RCS, _MMIO(0x24f0), 0, false},
+       {RCS, _MMIO(0x24f4), 0, false},
+       {RCS, _MMIO(0x24f8), 0, false},
+       {RCS, _MMIO(0x24fc), 0, false},
        {RCS, _MMIO(0x7004), 0xffff, true},
        {RCS, _MMIO(0x7008), 0xffff, true},
        {RCS, _MMIO(0x7000), 0xffff, true},