drm/nouveau/gpio: switch to device pri macros

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/gpio/g94.c b/drivers/gpu/drm/nouveau/nvkm/subdev/gpio/g94.c
index 12b3e01fca8e9dcb4643b3434d23ea6094d3fe38..939f6b953dddee241121dae159328f49bd4f500d 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/gpio/g94.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/gpio/g94.c
@@ -26,21 +26,23 @@
 void
 g94_gpio_intr_stat(struct nvkm_gpio *gpio, u32 *hi, u32 *lo)
 {
-       u32 intr0 = nv_rd32(gpio, 0x00e054);
-       u32 intr1 = nv_rd32(gpio, 0x00e074);
-       u32 stat0 = nv_rd32(gpio, 0x00e050) & intr0;
-       u32 stat1 = nv_rd32(gpio, 0x00e070) & intr1;
+       struct nvkm_device *device = gpio->subdev.device;
+       u32 intr0 = nvkm_rd32(device, 0x00e054);
+       u32 intr1 = nvkm_rd32(device, 0x00e074);
+       u32 stat0 = nvkm_rd32(device, 0x00e050) & intr0;
+       u32 stat1 = nvkm_rd32(device, 0x00e070) & intr1;
        *lo = (stat1 & 0xffff0000) | (stat0 >> 16);
        *hi = (stat1 << 16) | (stat0 & 0x0000ffff);
-       nv_wr32(gpio, 0x00e054, intr0);
-       nv_wr32(gpio, 0x00e074, intr1);
+       nvkm_wr32(device, 0x00e054, intr0);
+       nvkm_wr32(device, 0x00e074, intr1);
 }
 
 void
 g94_gpio_intr_mask(struct nvkm_gpio *gpio, u32 type, u32 mask, u32 data)
 {
-       u32 inte0 = nv_rd32(gpio, 0x00e050);
-       u32 inte1 = nv_rd32(gpio, 0x00e070);
+       struct nvkm_device *device = gpio->subdev.device;
+       u32 inte0 = nvkm_rd32(device, 0x00e050);
+       u32 inte1 = nvkm_rd32(device, 0x00e070);
        if (type & NVKM_GPIO_LO)
                inte0 = (inte0 & ~(mask << 16)) | (data << 16);
        if (type & NVKM_GPIO_HI)
@@ -51,8 +53,8 @@ g94_gpio_intr_mask(struct nvkm_gpio *gpio, u32 type, u32 mask, u32 data)
                inte1 = (inte1 & ~(mask << 16)) | (data << 16);
        if (type & NVKM_GPIO_HI)
                inte1 = (inte1 & ~mask) | data;
-       nv_wr32(gpio, 0x00e050, inte0);
-       nv_wr32(gpio, 0x00e070, inte1);
+       nvkm_wr32(device, 0x00e050, inte0);
+       nvkm_wr32(device, 0x00e070, inte1);
 }
 
 struct nvkm_oclass *

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/gpio/gf110.c b/drivers/gpu/drm/nouveau/nvkm/subdev/gpio/gf110.c
index 2c3bb255d1f8d67f6cf51682c0862eb80fd19e61..a2c019bb7443afa00c51b7fa2dea25d617310a3b 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/gpio/gf110.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/gpio/gf110.c
@@ -26,7 +26,8 @@
 void
 gf110_gpio_reset(struct nvkm_gpio *gpio, u8 match)
 {
-       struct nvkm_bios *bios = nvkm_bios(gpio);
+       struct nvkm_device *device = gpio->subdev.device;
+       struct nvkm_bios *bios = device->bios;
        u8 ver, len;
        u16 entry;
        int ent = -1;
@@ -45,25 +46,27 @@ gf110_gpio_reset(struct nvkm_gpio *gpio, u8 match)
 
                gpio->set(gpio, 0, func, line, defs);
 
-               nv_mask(gpio, 0x00d610 + (line * 4), 0xff, unk0);
+               nvkm_mask(device, 0x00d610 + (line * 4), 0xff, unk0);
                if (unk1--)
-                       nv_mask(gpio, 0x00d740 + (unk1 * 4), 0xff, line);
+                       nvkm_mask(device, 0x00d740 + (unk1 * 4), 0xff, line);
        }
 }
 
 int
 gf110_gpio_drive(struct nvkm_gpio *gpio, int line, int dir, int out)
 {
+       struct nvkm_device *device = gpio->subdev.device;
        u32 data = ((dir ^ 1) << 13) | (out << 12);
-       nv_mask(gpio, 0x00d610 + (line * 4), 0x00003000, data);
-       nv_mask(gpio, 0x00d604, 0x00000001, 0x00000001); /* update? */
+       nvkm_mask(device, 0x00d610 + (line * 4), 0x00003000, data);
+       nvkm_mask(device, 0x00d604, 0x00000001, 0x00000001); /* update? */
        return 0;
 }
 
 int
 gf110_gpio_sense(struct nvkm_gpio *gpio, int line)
 {
-       return !!(nv_rd32(gpio, 0x00d610 + (line * 4)) & 0x00004000);
+       struct nvkm_device *device = gpio->subdev.device;
+       return !!(nvkm_rd32(device, 0x00d610 + (line * 4)) & 0x00004000);
 }
 
 struct nvkm_oclass *

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/gpio/gk104.c b/drivers/gpu/drm/nouveau/nvkm/subdev/gpio/gk104.c
index 42fd2faaaa4f46ecce12cbabcf398e3f95eb78ef..e8e433cff17d298f6b3ea979058e9ff06d5445bd 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/gpio/gk104.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/gpio/gk104.c
@@ -26,21 +26,23 @@
 static void
 gk104_gpio_intr_stat(struct nvkm_gpio *gpio, u32 *hi, u32 *lo)
 {
-       u32 intr0 = nv_rd32(gpio, 0x00dc00);
-       u32 intr1 = nv_rd32(gpio, 0x00dc80);
-       u32 stat0 = nv_rd32(gpio, 0x00dc08) & intr0;
-       u32 stat1 = nv_rd32(gpio, 0x00dc88) & intr1;
+       struct nvkm_device *device = gpio->subdev.device;
+       u32 intr0 = nvkm_rd32(device, 0x00dc00);
+       u32 intr1 = nvkm_rd32(device, 0x00dc80);
+       u32 stat0 = nvkm_rd32(device, 0x00dc08) & intr0;
+       u32 stat1 = nvkm_rd32(device, 0x00dc88) & intr1;
        *lo = (stat1 & 0xffff0000) | (stat0 >> 16);
        *hi = (stat1 << 16) | (stat0 & 0x0000ffff);
-       nv_wr32(gpio, 0x00dc00, intr0);
-       nv_wr32(gpio, 0x00dc80, intr1);
+       nvkm_wr32(device, 0x00dc00, intr0);
+       nvkm_wr32(device, 0x00dc80, intr1);
 }
 
 void
 gk104_gpio_intr_mask(struct nvkm_gpio *gpio, u32 type, u32 mask, u32 data)
 {
-       u32 inte0 = nv_rd32(gpio, 0x00dc08);
-       u32 inte1 = nv_rd32(gpio, 0x00dc88);
+       struct nvkm_device *device = gpio->subdev.device;
+       u32 inte0 = nvkm_rd32(device, 0x00dc08);
+       u32 inte1 = nvkm_rd32(device, 0x00dc88);
        if (type & NVKM_GPIO_LO)
                inte0 = (inte0 & ~(mask << 16)) | (data << 16);
        if (type & NVKM_GPIO_HI)
@@ -51,8 +53,8 @@ gk104_gpio_intr_mask(struct nvkm_gpio *gpio, u32 type, u32 mask, u32 data)
                inte1 = (inte1 & ~(mask << 16)) | (data << 16);
        if (type & NVKM_GPIO_HI)
                inte1 = (inte1 & ~mask) | data;
-       nv_wr32(gpio, 0x00dc08, inte0);
-       nv_wr32(gpio, 0x00dc88, inte1);
+       nvkm_wr32(device, 0x00dc08, inte0);
+       nvkm_wr32(device, 0x00dc88, inte1);
 }
 
 struct nvkm_oclass *

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv10.c b/drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv10.c
index 2b295154247ee060286f9ed122a2f7cb6eced543..b88cabcc28d7c816659a2e75588b49ece188c89e 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv10.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv10.c
@@ -28,19 +28,20 @@
 static int
 nv10_gpio_sense(struct nvkm_gpio *gpio, int line)
 {
+       struct nvkm_device *device = gpio->subdev.device;
        if (line < 2) {
                line = line * 16;
-               line = nv_rd32(gpio, 0x600818) >> line;
+               line = nvkm_rd32(device, 0x600818) >> line;
                return !!(line & 0x0100);
        } else
        if (line < 10) {
                line = (line - 2) * 4;
-               line = nv_rd32(gpio, 0x60081c) >> line;
+               line = nvkm_rd32(device, 0x60081c) >> line;
                return !!(line & 0x04);
        } else
        if (line < 14) {
                line = (line - 10) * 4;
-               line = nv_rd32(gpio, 0x600850) >> line;
+               line = nvkm_rd32(device, 0x600850) >> line;
                return !!(line & 0x04);
        }
 
@@ -50,6 +51,7 @@ nv10_gpio_sense(struct nvkm_gpio *gpio, int line)
 static int
 nv10_gpio_drive(struct nvkm_gpio *gpio, int line, int dir, int out)
 {
+       struct nvkm_device *device = gpio->subdev.device;
        u32 reg, mask, data;
 
        if (line < 2) {
@@ -73,29 +75,31 @@ nv10_gpio_drive(struct nvkm_gpio *gpio, int line, int dir, int out)
                return -EINVAL;
        }
 
-       nv_mask(gpio, reg, mask << line, data << line);
+       nvkm_mask(device, reg, mask << line, data << line);
        return 0;
 }
 
 static void
 nv10_gpio_intr_stat(struct nvkm_gpio *gpio, u32 *hi, u32 *lo)
 {
-       u32 intr = nv_rd32(gpio, 0x001104);
-       u32 stat = nv_rd32(gpio, 0x001144) & intr;
+       struct nvkm_device *device = gpio->subdev.device;
+       u32 intr = nvkm_rd32(device, 0x001104);
+       u32 stat = nvkm_rd32(device, 0x001144) & intr;
        *lo = (stat & 0xffff0000) >> 16;
        *hi = (stat & 0x0000ffff);
-       nv_wr32(gpio, 0x001104, intr);
+       nvkm_wr32(device, 0x001104, intr);
 }
 
 static void
 nv10_gpio_intr_mask(struct nvkm_gpio *gpio, u32 type, u32 mask, u32 data)
 {
-       u32 inte = nv_rd32(gpio, 0x001144);
+       struct nvkm_device *device = gpio->subdev.device;
+       u32 inte = nvkm_rd32(device, 0x001144);
        if (type & NVKM_GPIO_LO)
                inte = (inte & ~(mask << 16)) | (data << 16);
        if (type & NVKM_GPIO_HI)
                inte = (inte & ~mask) | data;
-       nv_wr32(gpio, 0x001144, inte);
+       nvkm_wr32(device, 0x001144, inte);
 }
 
 struct nvkm_oclass *

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv50.c b/drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv50.c
index 6a031035bd276a7d8e9b18b9d93b30f121bdc778..ca2d866a3c32df74aa07a5608358419894d4615e 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv50.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv50.c
@@ -26,7 +26,8 @@
 void
 nv50_gpio_reset(struct nvkm_gpio *gpio, u8 match)
 {
-       struct nvkm_bios *bios = nvkm_bios(gpio);
+       struct nvkm_device *device = gpio->subdev.device;
+       struct nvkm_bios *bios = device->bios;
        u8 ver, len;
        u16 entry;
        int ent = -1;
@@ -49,7 +50,7 @@ nv50_gpio_reset(struct nvkm_gpio *gpio, u8 match)
 
                gpio->set(gpio, 0, func, line, defs);
 
-               nv_mask(gpio, reg, 0x00010001 << lsh, val << lsh);
+               nvkm_mask(device, reg, 0x00010001 << lsh, val << lsh);
        }
 }
 
@@ -69,45 +70,49 @@ nv50_gpio_location(int line, u32 *reg, u32 *shift)
 int
 nv50_gpio_drive(struct nvkm_gpio *gpio, int line, int dir, int out)
 {
+       struct nvkm_device *device = gpio->subdev.device;
        u32 reg, shift;
 
        if (nv50_gpio_location(line, &reg, &shift))
                return -EINVAL;
 
-       nv_mask(gpio, reg, 3 << shift, (((dir ^ 1) << 1) | out) << shift);
+       nvkm_mask(device, reg, 3 << shift, (((dir ^ 1) << 1) | out) << shift);
        return 0;
 }
 
 int
 nv50_gpio_sense(struct nvkm_gpio *gpio, int line)
 {
+       struct nvkm_device *device = gpio->subdev.device;
        u32 reg, shift;
 
        if (nv50_gpio_location(line, &reg, &shift))
                return -EINVAL;
 
-       return !!(nv_rd32(gpio, reg) & (4 << shift));
+       return !!(nvkm_rd32(device, reg) & (4 << shift));
 }
 
 static void
 nv50_gpio_intr_stat(struct nvkm_gpio *gpio, u32 *hi, u32 *lo)
 {
-       u32 intr = nv_rd32(gpio, 0x00e054);
-       u32 stat = nv_rd32(gpio, 0x00e050) & intr;
+       struct nvkm_device *device = gpio->subdev.device;
+       u32 intr = nvkm_rd32(device, 0x00e054);
+       u32 stat = nvkm_rd32(device, 0x00e050) & intr;
        *lo = (stat & 0xffff0000) >> 16;
        *hi = (stat & 0x0000ffff);
-       nv_wr32(gpio, 0x00e054, intr);
+       nvkm_wr32(device, 0x00e054, intr);
 }
 
 static void
 nv50_gpio_intr_mask(struct nvkm_gpio *gpio, u32 type, u32 mask, u32 data)
 {
-       u32 inte = nv_rd32(gpio, 0x00e050);
+       struct nvkm_device *device = gpio->subdev.device;
+       u32 inte = nvkm_rd32(device, 0x00e050);
        if (type & NVKM_GPIO_LO)
                inte = (inte & ~(mask << 16)) | (data << 16);
        if (type & NVKM_GPIO_HI)
                inte = (inte & ~mask) | data;
-       nv_wr32(gpio, 0x00e050, inte);
+       nvkm_wr32(device, 0x00e050, inte);
 }
 
 struct nvkm_oclass *