]> git.karo-electronics.de Git - karo-tx-linux.git/commitdiff
Merge branch 'heads/phy-rcar-usb' into next
authorSimon Horman <horms+renesas@verge.net.au>
Tue, 18 Jun 2013 07:47:50 +0000 (16:47 +0900)
committerSimon Horman <horms+renesas@verge.net.au>
Tue, 18 Jun 2013 07:47:50 +0000 (16:47 +0900)
Conflicts:
arch/arm/mach-shmobile/board-bockw.c
arch/arm/mach-shmobile/board-marzen.c
arch/arm/mach-shmobile/clock-r8a7778.c
arch/arm/mach-shmobile/include/mach/r8a7778.h
arch/arm/mach-shmobile/setup-r8a7778.c

1  2 
arch/arm/mach-shmobile/Kconfig
arch/arm/mach-shmobile/board-bockw.c
arch/arm/mach-shmobile/board-marzen.c
arch/arm/mach-shmobile/clock-r8a7778.c
arch/arm/mach-shmobile/include/mach/r8a7778.h
arch/arm/mach-shmobile/setup-r8a7778.c
arch/arm/mach-shmobile/setup-r8a7779.c

Simple merge
index ce56381e0077ef16082816d64e2eed04439d5d1d,7ed2401b899c05044d2e8471545571711dc9d515..6f541ad2ee977bf699139207293f2c8e1339d6ca
@@@ -76,112 -38,30 +76,119 @@@ static struct resource smsc911x_resourc
        DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */
  };
  
 +/* SDHI */
 +static struct sh_mobile_sdhi_info sdhi0_info = {
 +      .tmio_caps      = MMC_CAP_SD_HIGHSPEED,
 +      .tmio_ocr_mask  = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
 +      .tmio_flags     = TMIO_MMC_HAS_IDLE_WAIT,
 +};
 +
 +static struct sh_eth_plat_data ether_platform_data __initdata = {
 +      .phy            = 0x01,
 +      .edmac_endian   = EDMAC_LITTLE_ENDIAN,
 +      .register_type  = SH_ETH_REG_FAST_RCAR,
 +      .phy_interface  = PHY_INTERFACE_MODE_RMII,
 +      /*
 +       * Although the LINK signal is available on the board, it's connected to
 +       * the link/activity LED output of the PHY, thus the link disappears and
 +       * reappears after each packet.  We'd be better off ignoring such signal
 +       * and getting the link state from the PHY indirectly.
 +       */
 +      .no_ether_link  = 1,
 +};
 +
 +/* I2C */
 +static struct i2c_board_info i2c0_devices[] = {
 +      {
 +              I2C_BOARD_INFO("rx8581", 0x51),
 +      },
 +};
 +
 +/* HSPI*/
 +static struct mtd_partition m25p80_spi_flash_partitions[] = {
 +      {
 +              .name   = "data(spi)",
 +              .size   = 0x0100000,
 +              .offset = 0,
 +      },
 +};
 +
 +static struct flash_platform_data spi_flash_data = {
 +      .name           = "m25p80",
 +      .type           = "s25fl008k",
 +      .parts          = m25p80_spi_flash_partitions,
 +      .nr_parts       = ARRAY_SIZE(m25p80_spi_flash_partitions),
 +};
 +
 +static struct spi_board_info spi_board_info[] __initdata = {
 +      {
 +              .modalias       = "m25p80",
 +              .max_speed_hz   = 104000000,
 +              .chip_select    = 0,
 +              .bus_num        = 0,
 +              .mode           = SPI_MODE_0,
 +              .platform_data  = &spi_flash_data,
 +      },
 +};
 +
 +/* MMC */
 +static struct sh_mmcif_plat_data sh_mmcif_plat = {
 +      .sup_pclk       = 0,
 +      .ocr            = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
 +      .caps           = MMC_CAP_4_BIT_DATA |
 +                        MMC_CAP_8_BIT_DATA |
 +                        MMC_CAP_NEEDS_POLL,
 +};
 +
+ static struct rcar_phy_platform_data usb_phy_platform_data __initdata;
  static const struct pinctrl_map bockw_pinctrl_map[] = {
 +      /* Ether */
 +      PIN_MAP_MUX_GROUP_DEFAULT("r8a777x-ether", "pfc-r8a7778",
 +                                "ether_rmii", "ether"),
 +      /* HSPI0 */
 +      PIN_MAP_MUX_GROUP_DEFAULT("sh-hspi.0", "pfc-r8a7778",
 +                                "hspi0_a", "hspi0"),
 +      /* MMC */
 +      PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif", "pfc-r8a7778",
 +                                "mmc_data8", "mmc"),
 +      PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif", "pfc-r8a7778",
 +                                "mmc_ctrl", "mmc"),
        /* SCIF0 */
        PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
                                  "scif0_data_a", "scif0"),
        PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
                                  "scif0_ctrl", "scif0"),
 +      /* SDHI0 */
 +      PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
 +                                "sdhi0", "sdhi0"),
+       PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform", "pfc-r8a7778",
+                                 "usb0", "usb0"),
+       PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform", "pfc-r8a7778",
+                                 "usb1", "usb1"),
  };
  
 +#define FPGA  0x18200000
  #define IRQ0MR        0x30
 +#define PFC   0xfffc0000
 +#define PUPR4 0x110
  static void __init bockw_init(void)
  {
 -      void __iomem *fpga;
 +      void __iomem *base;
  
        r8a7778_clock_init();
        r8a7778_init_irq_extpin(1);
        r8a7778_add_standard_devices();
 +      r8a7778_add_ether_device(&ether_platform_data);
 +      r8a7778_add_i2c_device(0);
 +      r8a7778_add_hspi_device(0);
 +      r8a7778_add_mmc_device(&sh_mmcif_plat);
+       r8a7778_add_usb_phy_device(&usb_phy_platform_data);
  
 +      i2c_register_board_info(0, i2c0_devices,
 +                              ARRAY_SIZE(i2c0_devices));
 +      spi_register_board_info(spi_board_info,
 +                              ARRAY_SIZE(spi_board_info));
        pinctrl_register_mappings(bockw_pinctrl_map,
                                  ARRAY_SIZE(bockw_pinctrl_map));
        r8a7778_pinmux_init();
index a3810b03297c27ecf3e55eee50b77dc4f5a3f47d,b1b41b199f99b429c1e54f865fda63591b2f6930..a7d1010505bf9ff9246df09eca4a9706f2cf3a3f
@@@ -405,9 -231,9 +231,10 @@@ static void __init marzen_init(void
        pinctrl_register_mappings(marzen_pinctrl_map,
                                  ARRAY_SIZE(marzen_pinctrl_map));
        r8a7779_pinmux_init();
 +      r8a7779_init_irq_extpin(1); /* IRQ1 as individual interrupt */
  
        r8a7779_add_standard_devices();
+       r8a7779_add_usb_phy_device(&usb_phy_platform_data);
        platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices));
  }
  
index 18d44f51ca6700d2155ad43f70e5f3c993cd75c6,696d206adc3f8fb691fff948e856926b8d28fd76..53798e5037d7a98b24f9a375db35a653d0c5291a
@@@ -103,13 -103,11 +103,14 @@@ static struct clk *main_clks[] = 
  };
  
  enum {
 +      MSTP331,
        MSTP323, MSTP322, MSTP321,
        MSTP114,
 -      MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021,
+       MSTP100,
 +      MSTP030,
 +      MSTP029, MSTP028, MSTP027, MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021,
        MSTP016, MSTP015,
 +      MSTP007,
        MSTP_NR };
  
  static struct clk mstp_clks[MSTP_NR] = {
        [MSTP322] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 22, 0), /* SDHI1 */
        [MSTP321] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 21, 0), /* SDHI2 */
        [MSTP114] = SH_CLK_MSTP32(&p_clk, MSTPCR1, 14, 0), /* Ether */
+       [MSTP100] = SH_CLK_MSTP32(&p_clk, MSTPCR1,  0, 0), /* USB0/1 */
 +      [MSTP030] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 30, 0), /* I2C0 */
 +      [MSTP029] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 29, 0), /* I2C1 */
 +      [MSTP028] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 28, 0), /* I2C2 */
 +      [MSTP027] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 27, 0), /* I2C3 */
        [MSTP026] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 26, 0), /* SCIF0 */
        [MSTP025] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 25, 0), /* SCIF1 */
        [MSTP024] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 24, 0), /* SCIF2 */
@@@ -144,10 -132,8 +146,12 @@@ static struct clk_lookup lookups[] = 
        CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */
        CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */
        CLKDEV_DEV_ID("sh-eth", &mstp_clks[MSTP114]), /* Ether */
+       CLKDEV_DEV_ID("ehci-platform", &mstp_clks[MSTP100]), /* USB EHCI port0/1 */
+       CLKDEV_DEV_ID("ohci-platform", &mstp_clks[MSTP100]), /* USB OHCI port0/1 */
 +      CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP030]), /* I2C0 */
 +      CLKDEV_DEV_ID("i2c-rcar.1", &mstp_clks[MSTP029]), /* I2C1 */
 +      CLKDEV_DEV_ID("i2c-rcar.2", &mstp_clks[MSTP028]), /* I2C2 */
 +      CLKDEV_DEV_ID("i2c-rcar.3", &mstp_clks[MSTP027]), /* I2C3 */
        CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */
        CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */
        CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */
index fcf3c904bed27f67eb12b7a9eea4afc8d5979de1,1d4207cc0b04f7b0e87f750d62df4090cb737abf..2e362642d719551525445c1b5e5b286824f8e59a
  #ifndef __ASM_R8A7778_H__
  #define __ASM_R8A7778_H__
  
 +#include <linux/mmc/sh_mmcif.h>
  #include <linux/mmc/sh_mobile_sdhi.h>
  #include <linux/sh_eth.h>
+ #include <linux/platform_data/usb-rcar-phy.h>
  
  extern void r8a7778_add_standard_devices(void);
  extern void r8a7778_add_standard_devices_dt(void);
  extern void r8a7778_add_ether_device(struct sh_eth_plat_data *pdata);
 +extern void r8a7778_add_i2c_device(int id);
 +extern void r8a7778_add_hspi_device(int id);
 +extern void r8a7778_add_mmc_device(struct sh_mmcif_plat_data *info);
 +
+ extern void r8a7778_add_usb_phy_device(struct rcar_phy_platform_data *pdata);
+ extern void r8a7778_init_late(void);
  extern void r8a7778_init_delay(void);
  extern void r8a7778_init_irq(void);
  extern void r8a7778_init_irq_dt(void);