if (seq != ring->fence_drv.sync_seq)
amdgpu_fence_schedule_fallback(ring);
+ last_seq &= drv->num_fences_mask;
+ seq &= drv->num_fences_mask;
+
while (last_seq != seq) {
struct fence *fence, **ptr;
- ptr = &drv->fences[++last_seq & drv->num_fences_mask];
+ ++last_seq;
+ last_seq &= drv->num_fences_mask;
+ ptr = &drv->fences[last_seq];
/* There is always exactly one thread signaling this fence slot */
fence = rcu_dereference_protected(*ptr, 1);
RCU_INIT_POINTER(*ptr, NULL);
- BUG_ON(!fence);
+ if (!fence)
+ continue;
r = fence_signal(fence);
if (!r)