int (*set_uhs_signaling)(struct sdhci_host *host, unsigned int uhs);
void (*pre_tuning)(struct sdhci_host *host, u32 val);
+ void (*platform_clk_ctrl)(struct sdhci_host *host, bool enable);
};
#ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
#include "fec.h"
#include "fec_1588.h"
-#if defined(CONFIG_ARM)
+#if defined(CONFIG_ARCH_MXC) || defined(CONFIG_SOC_IMX28)
#define FEC_ALIGNMENT 0xf
#else
#define FEC_ALIGNMENT 0x3
* account when setting it.
*/
#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
- defined(CONFIG_M520x) || defined(CONFIG_M532x) || defined(CONFIG_ARM)
+ defined(CONFIG_M520x) || defined(CONFIG_M532x) || \
+ defined(CONFIG_ARCH_MXC) || defined(CONFIG_SOC_IMX28)
#define OPT_FRAME_SIZE (PKT_MAXBUF_SIZE << 16)
#else
#define OPT_FRAME_SIZE 0
uint ptimer_present;
};
+static irqreturn_t fec_enet_interrupt(int irq, void * dev_id);
+static void fec_enet_tx(struct net_device *dev);
+static void fec_enet_rx(struct net_device *dev);
+static int fec_enet_close(struct net_device *dev);
+static void fec_restart(struct net_device *dev, int duplex);
+static void fec_stop(struct net_device *dev);
+
/* FEC MII MMFR bits definition */
#define FEC_MMFR_ST (1 << 30)
#define FEC_MMFR_OP_READ (2 << 28)
if (((unsigned long) bufaddr) & FEC_ALIGNMENT) {
unsigned int index;
index = bdp - fep->tx_bd_base;
- memcpy(fep->tx_bounce[index], skb->data, skb->len);
+ memcpy(fep->tx_bounce[index], (void *)skb->data, skb->len);
bufaddr = fep->tx_bounce[index];
}
/* 1588 messeage TS handle */
if (fep->ptimer_present)
fec_ptp_store_rxstamp(fpp, skb, bdp);
- skb->protocol = eth_type_trans(skb, dev);
+ skb->protocol = eth_type_trans(skb, ndev);
netif_rx(skb);
}
}
snprintf(phy_name, MII_BUS_ID_SIZE, PHY_ID_FMT, mdio_bus_id, phy_id);
- phy_dev = phy_connect(dev, phy_name, &fec_enet_adjust_link, 0,
+ phy_dev = phy_connect(ndev, phy_name, &fec_enet_adjust_link, 0,
fep->phy_interface);
if (IS_ERR(phy_dev)) {
if (!clk_get_usecount(fep->clk))
clk_enable(fep->clk);
- ret = fec_enet_alloc_buffers(dev);
+ ret = fec_enet_alloc_buffers(ndev);
if (ret)
return ret;
config REGULATOR_TPS6586X
tristate "TI TPS6586X Power regulators"
+ depends on MFD_TPS6586X
+ help
+ This driver supports TPS6586X voltage regulator chips.
config REGULATOR_ANATOP
tristate "ANATOP LDO regulators"
default y
help
Say y here to support ANATOP LDOs regulators.
- depends on MFD_TPS6586X
- help
- This driver supports TPS6586X voltage regulator chips.
config REGULATOR_TPS6524X
tristate "TI TPS6524X Power regulators"
pdata->ioaddr = ioremap(pdata->baseaddr, 0xC00);
ioaddr = pdata->ioaddr;
pdata->irq = platform_get_irq(pdev, 0);
+ platform_set_drvdata(pdev, pdata);
/* initialize glitch detect */
__raw_writel(SNVS_LPPGDR_INIT, ioaddr + SNVS_LPPGDR);
}
pdata->rtc = rtc;
- platform_set_drvdata(pdev, pdata);
tv.tv_nsec = 0;
tv.tv_sec = rtc_read_lp_counter(ioaddr + SNVS_LPSRTCMR);
/* EHCI registers start at offset 0x100 */
ehci->caps = hcd->regs + 0x100;
ehci->regs = hcd->regs + 0x100 +
- HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase));
+ HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
dbg_hcs_params(ehci, "reset");
dbg_hcc_params(ehci, "reset");
#ifdef DEBUG
struct dentry *debug_dir;
#endif
- /*
- * OTG controllers and transceivers need software interaction
- */
- struct otg_transceiver *transceiver;
};
/* convert between an HCD pointer and the corresponding EHCI_HCD */
#include <linux/ioport.h>
#include <linux/sched.h>
#include <linux/slab.h>
-#include <linux/smp_lock.h>
#include <linux/proc_fs.h>
#include <linux/errno.h>
#include <linux/init.h>
value = gpio_get_value(pdata->id_gpio) ? 1 : 0;
if (value)
- set_irq_type(gpio_to_irq(pdata->id_gpio), IRQ_TYPE_LEVEL_LOW);
+ irq_set_irq_type(gpio_to_irq(pdata->id_gpio), IRQ_TYPE_LEVEL_LOW);
else
- set_irq_type(gpio_to_irq(pdata->id_gpio), IRQ_TYPE_LEVEL_HIGH);
+ irq_set_irq_type(gpio_to_irq(pdata->id_gpio), IRQ_TYPE_LEVEL_HIGH);
if (value == f_otg->fsm.id)
if (pdata->id_gpio != 0) {
p_otg->fsm.id = gpio_get_value(pdata->id_gpio) ? 1 : 0;
if (p_otg->fsm.id)
- set_irq_type(gpio_to_irq(pdata->id_gpio),
+ irq_set_irq_type(gpio_to_irq(pdata->id_gpio),
IRQ_TYPE_LEVEL_LOW);
else
- set_irq_type(gpio_to_irq(pdata->id_gpio),
+ irq_set_irq_type(gpio_to_irq(pdata->id_gpio),
IRQ_TYPE_LEVEL_HIGH);
}
p_otg->otg.state = p_otg->fsm.id ? OTG_STATE_UNDEFINED :