return PIPE_PER_ME_CP_SCHEDULING;
}
-static unsigned int get_sh_mem_bases_nybble_64(struct kfd_process *process,
- struct kfd_dev *dev)
+static inline unsigned int
+get_sh_mem_bases_nybble_64(struct kfd_process_device *pdd)
{
- struct kfd_process_device *pdd;
uint32_t nybble;
- pdd = kfd_get_process_device_data(dev, process, 1);
nybble = (pdd->lds_base >> 60) & 0x0E;
return nybble;
}
-static unsigned int get_sh_mem_bases_32(struct kfd_process *process,
- struct kfd_dev *dev)
+static inline unsigned int get_sh_mem_bases_32(struct kfd_process_device *pdd)
{
- struct kfd_process_device *pdd;
unsigned int shared_base;
- pdd = kfd_get_process_device_data(dev, process, 1);
shared_base = (pdd->lds_base >> 16) & 0xFF;
return shared_base;
static void init_process_memory(struct device_queue_manager *dqm,
struct qcm_process_device *qpd)
{
+ struct kfd_process_device *pdd;
unsigned int temp;
BUG_ON(!dqm || !qpd);
+ pdd = qpd_to_pdd(qpd);
+
/* check if sh_mem_config register already configured */
if (qpd->sh_mem_config == 0) {
qpd->sh_mem_config =
}
if (qpd->pqm->process->is_32bit_user_mode) {
- temp = get_sh_mem_bases_32(qpd->pqm->process, dqm->dev);
+ temp = get_sh_mem_bases_32(pdd);
qpd->sh_mem_bases = SHARED_BASE(temp);
qpd->sh_mem_config |= PTR32;
} else {
- temp = get_sh_mem_bases_nybble_64(qpd->pqm->process, dqm->dev);
+ temp = get_sh_mem_bases_nybble_64(pdd);
qpd->sh_mem_bases = compute_sh_mem_bases_64bit(temp);
}
destroy_queues_cpsch(dqm, true);
list_for_each_entry(node, &dqm->queues, list) {
- pdd = kfd_get_process_device_data(dqm->dev,
- node->qpd->pqm->process, 1);
+ pdd = qpd_to_pdd(node->qpd);
pdd->bound = false;
}
kfd2kgd->free_mem(dqm->dev->kgd,