]> git.karo-electronics.de Git - karo-tx-linux.git/commitdiff
ARM: sun5i: Add DRAM gates
authorMaxime Ripard <maxime.ripard@free-electrons.com>
Wed, 23 Mar 2016 16:38:31 +0000 (17:38 +0100)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Tue, 19 Apr 2016 10:02:21 +0000 (12:02 +0200)
The DRAM gates control whether the image / display devices on the SoC have
access to the DRAM clock or not.

Enable it.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
arch/arm/boot/dts/sun5i-a13.dtsi
arch/arm/boot/dts/sun5i-r8.dtsi

index 7bbeec9fae92c1b94f80fa5575a0baa579c1c234..39f23b1ebc8ff3d20e587d202f7d28327a4edb9e 100644 (file)
@@ -61,7 +61,8 @@
                        compatible = "allwinner,simple-framebuffer",
                                     "simple-framebuffer";
                        allwinner,pipeline = "de_be0-lcd0";
-                       clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>;
+                       clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>,
+                                <&dram_gates 26>;
                        status = "disabled";
                };
        };
                                             "apb1_i2c2", "apb1_uart1",
                                             "apb1_uart3";
                };
+
+               dram_gates: clk@01c20100 {
+                       #clock-cells = <1>;
+                       compatible = "allwinner,sun5i-a13-dram-gates-clk",
+                                    "allwinner,sun4i-a10-gates-clk";
+                       reg = <0x01c20100 0x4>;
+                       clocks = <&pll5 0>;
+                       clock-indices = <0>,
+                                       <1>,
+                                       <25>,
+                                       <26>,
+                                       <29>,
+                                       <31>;
+                       clock-output-names = "dram_ve",
+                                            "dram_csi",
+                                            "dram_de_fe",
+                                            "dram_de_be",
+                                            "dram_ace",
+                                            "dram_iep";
+               };
        };
 
        soc@01c00000 {
index 0ef865601ac9709c08b15a23673b04526c57696a..e346ba76db5df21297bf887b1e28460c7be7a0d4 100644 (file)
@@ -52,7 +52,7 @@
                                     "simple-framebuffer";
                        allwinner,pipeline = "de_be0-lcd0-tve0";
                        clocks = <&pll5 1>, <&ahb_gates 34>, <&ahb_gates 36>,
-                                <&ahb_gates 44>;
+                                <&ahb_gates 44>, <&dram_gates 26>;
                        status = "disabled";
                };
        };