drm/radeon: powertune fixes for hawaii

- bapm is not available on hawaii
- update pt defaults

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/radeon/ci_dpm.c b/drivers/gpu/drm/radeon/ci_dpm.c
index d9071aefc5f5ce84ea2889689dbfd7a355ddddf3..4d880906a390631de26a07a5c1ea702412e18840 100644 (file)
--- a/drivers/gpu/drm/radeon/ci_dpm.c
+++ b/drivers/gpu/drm/radeon/ci_dpm.c
@@ -46,15 +46,15 @@
 static const struct ci_pt_defaults defaults_hawaii_xt =
 {
        1, 0xF, 0xFD, 0x19, 5, 0x14, 0, 0xB0000,
-       { 0x84,  0x0,   0x0,   0x7F,  0x0,   0x0,   0x5A,  0x60,  0x51,  0x8E,  0x79,  0x6B,  0x5F,  0x90,  0x79  },
-       { 0x1EA, 0x1EA, 0x1EA, 0x224, 0x224, 0x224, 0x24F, 0x24F, 0x24F, 0x28E, 0x28E, 0x28E, 0x2BC, 0x2BC, 0x2BC }
+       { 0x2E,  0x00,  0x00,  0x88,  0x00,  0x00,  0x72,  0x60,  0x51,  0xA7,  0x79,  0x6B,  0x90,  0xBD,  0x79  },
+       { 0x217, 0x217, 0x217, 0x242, 0x242, 0x242, 0x269, 0x269, 0x269, 0x2A1, 0x2A1, 0x2A1, 0x2C9, 0x2C9, 0x2C9 }
 };
 
 static const struct ci_pt_defaults defaults_hawaii_pro =
 {
        1, 0xF, 0xFD, 0x19, 5, 0x14, 0, 0x65062,
-       { 0x93,  0x0,   0x0,   0x97,  0x0,   0x0,   0x6B,  0x60,  0x51,  0x95,  0x79,  0x6B,  0x5F,  0x90,  0x79  },
-       { 0x1EA, 0x1EA, 0x1EA, 0x224, 0x224, 0x224, 0x24F, 0x24F, 0x24F, 0x28E, 0x28E, 0x28E, 0x2BC, 0x2BC, 0x2BC }
+       { 0x2E,  0x00,  0x00,  0x88,  0x00,  0x00,  0x72,  0x60,  0x51,  0xA7,  0x79,  0x6B,  0x90,  0xBD,  0x79  },
+       { 0x217, 0x217, 0x217, 0x242, 0x242, 0x242, 0x269, 0x269, 0x269, 0x2A1, 0x2A1, 0x2A1, 0x2C9, 0x2C9, 0x2C9 }
 };
 
 static const struct ci_pt_defaults defaults_bonaire_xt =
@@ -249,7 +249,10 @@ static void ci_initialize_powertune_defaults(struct radeon_device *rdev)
 
        if (pi->caps_power_containment) {
                pi->caps_cac = true;
-               pi->enable_bapm_feature = true;
+               if (rdev->family == CHIP_HAWAII)
+                       pi->enable_bapm_feature = false;
+               else
+                       pi->enable_bapm_feature = true;
                pi->enable_tdc_limit_feature = true;
                pi->enable_pkg_pwr_tracking_feature = true;
        }
@@ -700,13 +703,11 @@ static int ci_power_control_set_level(struct radeon_device *rdev)
        int ret = 0;
        bool adjust_polarity = false; /* ??? */
 
-       if (pi->caps_power_containment &&
-           (pi->power_containment_features & POWERCONTAINMENT_FEATURE_BAPM)) {
+       if (pi->caps_power_containment) {
                adjust_percent = adjust_polarity ?
                        rdev->pm.dpm.tdp_adjustment : (-1 * rdev->pm.dpm.tdp_adjustment);
                target_tdp = ((100 + adjust_percent) *
                              (s32)cac_tdp_table->configurable_tdp) / 100;
-               target_tdp *= 256;
 
                ret = ci_set_overdrive_target_tdp(rdev, (u32)target_tdp);
        }