#ifndef __BIG_ENDIAN
#ifndef __mips__
#define R_REG(r) \
- bcmsdh_reg_read(NULL, (unsigned long)(r), sizeof(*(r)))
+ brcmf_sdcard_reg_read(NULL, (unsigned long)(r), sizeof(*(r)))
#else /* __mips__ */
#define R_REG(r) \
({ \
__typeof(*(r)) __osl_v; \
__asm__ __volatile__("sync"); \
- __osl_v = bcmsdh_reg_read(NULL, (unsigned long)(r),\
+ __osl_v = brcmf_sdcard_reg_read(NULL, (unsigned long)(r),\
sizeof(*(r))); \
__asm__ __volatile__("sync"); \
__osl_v; \
#endif /* __mips__ */
#define W_REG(r, v) do { \
- bcmsdh_reg_write(NULL, (unsigned long)(r), sizeof(*(r)), (v)); \
+ brcmf_sdcard_reg_write(NULL, (unsigned long)(r), sizeof(*(r)), \
+ (v)); \
} while (0)
#else /* __BIG_ENDIAN */
#define R_REG(r) \
- bcmsdh_reg_read(NULL, (unsigned long)(r), sizeof(*(r)))
+ brcmf_sdcard_reg_read(NULL, (unsigned long)(r), sizeof(*(r)))
#define W_REG(r, v) do { \
- bcmsdh_reg_write(NULL, (unsigned long)(r), sizeof(*(r)), (v)); \
+ brcmf_sdcard_reg_write(NULL, (unsigned long)(r), sizeof(*(r)), \
+ (v)); \
} while (0)
#endif /* __BIG_ENDIAN */
bool dpc_sched; /* Indicates DPC schedule (intrpt rcvd) */
bool fcstate; /* State of dongle flow-control */
- u16 cl_devid; /* cached devid for dhdsdio_probe_attach() */
+ u16 cl_devid; /* cached devid for brcmf_sdio_probe_attach() */
char *fw_path; /* module_param: path to firmware image */
char *nv_path; /* module_param: path to nvram vars file */
const char *nvram_params; /* user specified nvram params. */
#define ALIGNMENT 4
#if defined(OOB_INTR_ONLY) && defined(HW_OOB)
-extern void bcmsdh_enable_hw_oob_intr(void *sdh, bool enable);
+extern void brcmf_sdcard_enable_hw_oob_intr(void *sdh, bool enable);
#endif
#if defined(OOB_INTR_ONLY) && defined(SDIO_ISR_THREAD)
retryvar = 0; \
do { \
regvar = R_REG(regaddr); \
- } while (bcmsdh_regfail(bus->sdh) && (++retryvar <= retry_limit)); \
+ } while (brcmf_sdcard_regfail(bus->sdh) && \
+ (++retryvar <= retry_limit)); \
if (retryvar) { \
bus->regfails += (retryvar-1); \
if (retryvar > retry_limit) { \
retryvar = 0; \
do { \
W_REG(regaddr, regval); \
- } while (bcmsdh_regfail(bus->sdh) && (++retryvar <= retry_limit)); \
+ } while (brcmf_sdcard_regfail(bus->sdh) && \
+ (++retryvar <= retry_limit)); \
if (retryvar) { \
bus->regfails += (retryvar-1); \
if (retryvar > retry_limit) \
#define HOSTINTMASK (I_HMB_SW_MASK | I_CHIPACTIVE)
#ifdef SDTEST
-static void dhdsdio_testrcv(dhd_bus_t *bus, void *pkt, uint seq);
-static void dhdsdio_sdtest_set(dhd_bus_t *bus, bool start);
+static void brcmf_sdbrcm_checkdied(dhd_bus_t *bus, void *pkt, uint seq);
+static void brcmf_sdbrcm_sdtest_set(dhd_bus_t *bus, bool start);
#endif
#ifdef DHD_DEBUG
-static int dhdsdio_checkdied(dhd_bus_t *bus, u8 *data, uint size);
-static int dhdsdio_mem_dump(dhd_bus_t *bus);
+static int brcmf_sdbrcm_checkdied(dhd_bus_t *bus, u8 *data, uint size);
+static int brcmf_sdbrcm_mem_dump(dhd_bus_t *bus);
#endif /* DHD_DEBUG */
-static int dhdsdio_download_state(dhd_bus_t *bus, bool enter);
+static int brcmf_sdbrcm_download_state(dhd_bus_t *bus, bool enter);
-static void dhdsdio_release(dhd_bus_t *bus);
-static void dhdsdio_release_malloc(dhd_bus_t *bus);
-static void dhdsdio_disconnect(void *ptr);
-static bool dhdsdio_chipmatch(u16 chipid);
-static bool dhdsdio_probe_attach(dhd_bus_t *bus, void *sdh,
+static void brcmf_sdbrcm_release(dhd_bus_t *bus);
+static void brcmf_sdbrcm_release_malloc(dhd_bus_t *bus);
+static void brcmf_sdbrcm_disconnect(void *ptr);
+static bool brcmf_sdbrcm_chipmatch(u16 chipid);
+static bool brcmf_sdbrcm_probe_attach(dhd_bus_t *bus, void *sdh,
void *regsva, u16 devid);
-static bool dhdsdio_probe_malloc(dhd_bus_t *bus, void *sdh);
-static bool dhdsdio_probe_init(dhd_bus_t *bus, void *sdh);
-static void dhdsdio_release_dongle(dhd_bus_t *bus);
+static bool brcmf_sdbrcm_probe_malloc(dhd_bus_t *bus, void *sdh);
+static bool brcmf_sdbrcm_probe_init(dhd_bus_t *bus, void *sdh);
+static void brcmf_sdbrcm_release_dongle(dhd_bus_t *bus);
-static uint process_nvram_vars(char *varbuf, uint len);
+static uint brcmf_process_nvram_vars(char *varbuf, uint len);
-static void dhd_dongle_setmemsize(struct dhd_bus *bus, int mem_size);
-static int dhd_bcmsdh_send_buf(dhd_bus_t *bus, u32 addr, uint fn,
+static void brcmf_sdbrcm_setmemsize(struct dhd_bus *bus, int mem_size);
+static int brcmf_sdbrcm_send_buf(dhd_bus_t *bus, u32 addr, uint fn,
uint flags, u8 *buf, uint nbytes,
struct sk_buff *pkt, bcmsdh_cmplt_fn_t complete,
void *handle);
-static bool dhdsdio_download_firmware(struct dhd_bus *bus, void *sdh);
-static int _dhdsdio_download_firmware(struct dhd_bus *bus);
+static bool brcmf_sdbrcm_download_firmware(struct dhd_bus *bus, void *sdh);
+static int _brcmf_sdbrcm_download_firmware(struct dhd_bus *bus);
-static int dhdsdio_download_code_file(struct dhd_bus *bus, char *image_path);
-static int dhdsdio_download_nvram(struct dhd_bus *bus);
-static void dhdsdio_chip_disablecore(bcmsdh_info_t *sdh, u32 corebase);
-static int dhdsdio_chip_attach(struct dhd_bus *bus, void *regs);
-static void dhdsdio_chip_resetcore(bcmsdh_info_t *sdh, u32 corebase);
-static void dhdsdio_sdiod_drive_strength_init(struct dhd_bus *bus,
+static int
+brcmf_sdbrcm_download_code_file(struct dhd_bus *bus, char *image_path);
+static int brcmf_sdbrcm_download_nvram(struct dhd_bus *bus);
+static void brcmf_sdbrcm_chip_disablecore(bcmsdh_info_t *sdh, u32 corebase);
+static int brcmf_sdbrcm_chip_attach(struct dhd_bus *bus, void *regs);
+static void brcmf_sdbrcm_chip_resetcore(bcmsdh_info_t *sdh, u32 corebase);
+static void brcmf_sdbrcm_sdiod_drive_strength_init(struct dhd_bus *bus,
u32 drivestrength);
-static void dhdsdio_chip_detach(struct dhd_bus *bus);
+static void brcmf_sdbrcm_chip_detach(struct dhd_bus *bus);
/* Packet free applicable unconditionally for sdio and sdspi.
* Conditional if bufpool was present for gspi bus.
*/
-static void dhdsdio_pktfree2(dhd_bus_t *bus, struct sk_buff *pkt)
+static void brcmf_sdbrcm_pktfree2(dhd_bus_t *bus, struct sk_buff *pkt)
{
if ((bus->bus != SPI_BUS) || bus->usebufpool)
brcmu_pkt_buf_free_skb(pkt);
}
-static void dhd_dongle_setmemsize(struct dhd_bus *bus, int mem_size)
+static void brcmf_sdbrcm_setmemsize(struct dhd_bus *bus, int mem_size)
{
s32 min_size = DONGLE_MIN_MEMSIZE;
/* Restrict the memsize to user specified limit */
bus->ramsize = dhd_dongle_memsize;
}
-static int dhdsdio_set_siaddr_window(dhd_bus_t *bus, u32 address)
+static int brcmf_sdbrcm_set_siaddr_window(dhd_bus_t *bus, u32 address)
{
int err = 0;
- bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_SBADDRLOW,
+ brcmf_sdcard_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_SBADDRLOW,
(address >> 8) & SBSDIO_SBADDRLOW_MASK, &err);
if (!err)
- bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_SBADDRMID,
+ brcmf_sdcard_cfg_write(bus->sdh, SDIO_FUNC_1,
+ SBSDIO_FUNC1_SBADDRMID,
(address >> 16) & SBSDIO_SBADDRMID_MASK, &err);
if (!err)
- bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_SBADDRHIGH,
- (address >> 24) & SBSDIO_SBADDRHIGH_MASK,
- &err);
+ brcmf_sdcard_cfg_write(bus->sdh, SDIO_FUNC_1,
+ SBSDIO_FUNC1_SBADDRHIGH,
+ (address >> 24) & SBSDIO_SBADDRHIGH_MASK,
+ &err);
return err;
}
/* Turn backplane clock on or off */
-static int dhdsdio_htclk(dhd_bus_t *bus, bool on, bool pendok)
+static int brcmf_sdbrcm_htclk(dhd_bus_t *bus, bool on, bool pendok)
{
int err;
u8 clkctl, clkreq, devctl;
&& (bus->ci->chiprev == 0))
clkreq |= SBSDIO_FORCE_ALP;
- bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
- clkreq, &err);
+ brcmf_sdcard_cfg_write(sdh, SDIO_FUNC_1,
+ SBSDIO_FUNC1_CHIPCLKCSR, clkreq, &err);
if (err) {
DHD_ERROR(("%s: HT Avail request error: %d\n",
__func__, err));
}
/* Check current status */
- clkctl =
- bcmsdh_cfg_read(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
- &err);
+ clkctl = brcmf_sdcard_cfg_read(sdh, SDIO_FUNC_1,
+ SBSDIO_FUNC1_CHIPCLKCSR, &err);
if (err) {
DHD_ERROR(("%s: HT Avail read error: %d\n",
__func__, err));
/* Go to pending and await interrupt if appropriate */
if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
/* Allow only clock-available interrupt */
- devctl =
- bcmsdh_cfg_read(sdh, SDIO_FUNC_1, SBSDIO_DEVICE_CTL,
- &err);
+ devctl = brcmf_sdcard_cfg_read(sdh, SDIO_FUNC_1,
+ SBSDIO_DEVICE_CTL, &err);
if (err) {
DHD_ERROR(("%s: Devctl error setting CA: %d\n",
__func__, err));
}
devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
- bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_DEVICE_CTL,
- devctl, &err);
+ brcmf_sdcard_cfg_write(sdh, SDIO_FUNC_1,
+ SBSDIO_DEVICE_CTL, devctl, &err);
DHD_INFO(("CLKCTL: set PENDING\n"));
bus->clkstate = CLK_PENDING;
} else if (bus->clkstate == CLK_PENDING) {
/* Cancel CA-only interrupt filter */
devctl =
- bcmsdh_cfg_read(sdh, SDIO_FUNC_1, SBSDIO_DEVICE_CTL,
- &err);
+ brcmf_sdcard_cfg_read(sdh, SDIO_FUNC_1,
+ SBSDIO_DEVICE_CTL, &err);
devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
- bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_DEVICE_CTL,
- devctl, &err);
+ brcmf_sdcard_cfg_write(sdh, SDIO_FUNC_1,
+ SBSDIO_DEVICE_CTL, devctl, &err);
}
/* Otherwise, wait here (polling) for HT Avail */
if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
SPINWAIT_SLEEP(sdioh_spinwait_sleep,
((clkctl =
- bcmsdh_cfg_read(sdh, SDIO_FUNC_1,
+ brcmf_sdcard_cfg_read(sdh, SDIO_FUNC_1,
SBSDIO_FUNC1_CHIPCLKCSR,
&err)),
!SBSDIO_CLKAV(clkctl, bus->alp_only)),
if (bus->clkstate == CLK_PENDING) {
/* Cancel CA-only interrupt filter */
- devctl =
- bcmsdh_cfg_read(sdh, SDIO_FUNC_1, SBSDIO_DEVICE_CTL,
- &err);
+ devctl = brcmf_sdcard_cfg_read(sdh, SDIO_FUNC_1,
+ SBSDIO_DEVICE_CTL, &err);
devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
- bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_DEVICE_CTL,
- devctl, &err);
+ brcmf_sdcard_cfg_write(sdh, SDIO_FUNC_1,
+ SBSDIO_DEVICE_CTL, devctl, &err);
}
bus->clkstate = CLK_SDONLY;
- bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
- clkreq, &err);
+ brcmf_sdcard_cfg_write(sdh, SDIO_FUNC_1,
+ SBSDIO_FUNC1_CHIPCLKCSR, clkreq, &err);
DHD_INFO(("CLKCTL: turned OFF\n"));
if (err) {
DHD_ERROR(("%s: Failed access turning clock off: %d\n",
}
/* Change idle/active SD state */
-static int dhdsdio_sdclk(dhd_bus_t *bus, bool on)
+static int brcmf_sdbrcm_sdclk(dhd_bus_t *bus, bool on)
{
DHD_TRACE(("%s: Enter\n", __func__));
}
/* Transition SD and backplane clock readiness */
-static int dhdsdio_clkctl(dhd_bus_t *bus, uint target, bool pendok)
+static int brcmf_sdbrcm_clkctl(dhd_bus_t *bus, uint target, bool pendok)
{
#ifdef DHD_DEBUG
uint oldstate = bus->clkstate;
case CLK_AVAIL:
/* Make sure SD clock is available */
if (bus->clkstate == CLK_NONE)
- dhdsdio_sdclk(bus, true);
+ brcmf_sdbrcm_sdclk(bus, true);
/* Now request HT Avail on the backplane */
- dhdsdio_htclk(bus, true, pendok);
+ brcmf_sdbrcm_htclk(bus, true, pendok);
dhd_os_wd_timer(bus->dhd, dhd_watchdog_ms);
bus->activity = true;
break;
case CLK_SDONLY:
/* Remove HT request, or bring up SD clock */
if (bus->clkstate == CLK_NONE)
- dhdsdio_sdclk(bus, true);
+ brcmf_sdbrcm_sdclk(bus, true);
else if (bus->clkstate == CLK_AVAIL)
- dhdsdio_htclk(bus, false, false);
+ brcmf_sdbrcm_htclk(bus, false, false);
else
- DHD_ERROR(("dhdsdio_clkctl: request for %d -> %d\n",
- bus->clkstate, target));
+ DHD_ERROR(("brcmf_sdbrcm_clkctl: request for %d -> %d"
+ "\n", bus->clkstate, target));
dhd_os_wd_timer(bus->dhd, dhd_watchdog_ms);
break;
case CLK_NONE:
/* Make sure to remove HT request */
if (bus->clkstate == CLK_AVAIL)
- dhdsdio_htclk(bus, false, false);
+ brcmf_sdbrcm_htclk(bus, false, false);
/* Now remove the SD clock */
- dhdsdio_sdclk(bus, false);
+ brcmf_sdbrcm_sdclk(bus, false);
dhd_os_wd_timer(bus->dhd, 0);
break;
}
#ifdef DHD_DEBUG
- DHD_INFO(("dhdsdio_clkctl: %d -> %d\n", oldstate, bus->clkstate));
+ DHD_INFO(("brcmf_sdbrcm_clkctl: %d -> %d\n", oldstate, bus->clkstate));
#endif /* DHD_DEBUG */
return 0;
}
-int dhdsdio_bussleep(dhd_bus_t *bus, bool sleep)
+int brcmf_sdbrcm_bussleep(dhd_bus_t *bus, bool sleep)
{
bcmsdh_info_t *sdh = bus->sdh;
struct sdpcmd_regs *regs = bus->regs;
uint retries = 0;
- DHD_INFO(("dhdsdio_bussleep: request %s (currently %s)\n",
+ DHD_INFO(("brcmf_sdbrcm_bussleep: request %s (currently %s)\n",
(sleep ? "SLEEP" : "WAKE"),
(bus->sleeping ? "SLEEP" : "WAKE")));
return -EBUSY;
/* Disable SDIO interrupts (no longer interested) */
- bcmsdh_intr_disable(bus->sdh);
+ brcmf_sdcard_intr_disable(bus->sdh);
/* Make sure the controller has the bus up */
- dhdsdio_clkctl(bus, CLK_AVAIL, false);
+ brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
/* Tell device to start using OOB wakeup */
W_SDREG(SMB_USE_OOB, ®s->tosbmailbox, retries);
DHD_ERROR(("CANNOT SIGNAL CHIP, WILL NOT WAKE UP!!\n"));
/* Turn off our contribution to the HT clock request */
- dhdsdio_clkctl(bus, CLK_SDONLY, false);
+ brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
- bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
- SBSDIO_FORCE_HW_CLKREQ_OFF, NULL);
+ brcmf_sdcard_cfg_write(sdh, SDIO_FUNC_1,
+ SBSDIO_FUNC1_CHIPCLKCSR,
+ SBSDIO_FORCE_HW_CLKREQ_OFF, NULL);
/* Isolate the bus */
if (bus->ci->chip != BCM4329_CHIP_ID
&& bus->ci->chip != BCM4319_CHIP_ID) {
- bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_DEVICE_CTL,
- SBSDIO_DEVCTL_PADS_ISO, NULL);
+ brcmf_sdcard_cfg_write(sdh, SDIO_FUNC_1,
+ SBSDIO_DEVICE_CTL,
+ SBSDIO_DEVCTL_PADS_ISO, NULL);
}
/* Change state */
} else {
/* Waking up: bus power up is ok, set local state */
- bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
- 0, NULL);
+ brcmf_sdcard_cfg_write(sdh, SDIO_FUNC_1,
+ SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
/* Force pad isolation off if possible
(in case power never toggled) */
if ((bus->ci->buscoretype == PCMCIA_CORE_ID)
&& (bus->ci->buscorerev >= 10))
- bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_DEVICE_CTL, 0,
- NULL);
+ brcmf_sdcard_cfg_write(sdh, SDIO_FUNC_1,
+ SBSDIO_DEVICE_CTL, 0, NULL);
/* Make sure the controller has the bus up */
- dhdsdio_clkctl(bus, CLK_AVAIL, false);
+ brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
/* Send misc interrupt to indicate OOB not needed */
W_SDREG(0, ®s->tosbmailboxdata, retries);
DHD_ERROR(("CANNOT SIGNAL CHIP TO CLEAR OOB!!\n"));
/* Make sure we have SD bus access */
- dhdsdio_clkctl(bus, CLK_SDONLY, false);
+ brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
/* Change state */
bus->sleeping = false;
/* Enable interrupts again */
if (bus->intr && (bus->dhd->busstate == DHD_BUS_DATA)) {
bus->intdis = false;
- bcmsdh_intr_enable(bus->sdh);
+ brcmf_sdcard_intr_enable(bus->sdh);
}
}
}
#if defined(OOB_INTR_ONLY)
-void dhd_enable_oob_intr(struct dhd_bus *bus, bool enable)
+void brcmf_sdbrcm_enable_oob_intr(struct dhd_bus *bus, bool enable)
{
#if defined(HW_OOB)
- bcmsdh_enable_hw_oob_intr(bus->sdh, enable);
+ brcmf_sdcard_enable_hw_oob_intr(bus->sdh, enable);
#else
sdpcmd_regs_t *regs = bus->regs;
uint retries = 0;
- dhdsdio_clkctl(bus, CLK_AVAIL, false);
+ brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
if (enable == true) {
/* Tell device to start using OOB wakeup */
}
/* Turn off our contribution to the HT clock request */
- dhdsdio_clkctl(bus, CLK_SDONLY, false);
+ brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
#endif /* !defined(HW_OOB) */
}
#endif /* defined(OOB_INTR_ONLY) */
#define BUS_WAKE(bus) \
do { \
if ((bus)->sleeping) \
- dhdsdio_bussleep((bus), false); \
+ brcmf_sdbrcm_bussleep((bus), false); \
} while (0);
/* Writes a HW/SW header into the packet and sends it. */
/* Assumes: (a) header space already there, (b) caller holds lock */
-static int dhdsdio_txpkt(dhd_bus_t *bus, struct sk_buff *pkt, uint chan,
+static int brcmf_sdbrcm_txpkt(dhd_bus_t *bus, struct sk_buff *pkt, uint chan,
bool free_pkt)
{
int ret;
}
do {
- ret =
- dhd_bcmsdh_send_buf(bus, bcmsdh_cur_sbwad(sdh), SDIO_FUNC_2,
- F2SYNC, frame, len, pkt, NULL, NULL);
+ ret = brcmf_sdbrcm_send_buf(bus, brcmf_sdcard_cur_sbwad(sdh),
+ SDIO_FUNC_2, F2SYNC, frame, len, pkt, NULL, NULL);
bus->f2txdata++;
ASSERT(ret != -BCME_PENDING);
"terminate frame.\n", __func__, ret));
bus->tx_sderrs++;
- bcmsdh_abort(sdh, SDIO_FUNC_2);
- bcmsdh_cfg_write(sdh, SDIO_FUNC_1,
+ brcmf_sdcard_abort(sdh, SDIO_FUNC_2);
+ brcmf_sdcard_cfg_write(sdh, SDIO_FUNC_1,
SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM,
NULL);
bus->f1regdata++;
for (i = 0; i < 3; i++) {
u8 hi, lo;
- hi = bcmsdh_cfg_read(sdh, SDIO_FUNC_1,
+ hi = brcmf_sdcard_cfg_read(sdh, SDIO_FUNC_1,
SBSDIO_FUNC1_WFRAMEBCHI,
NULL);
- lo = bcmsdh_cfg_read(sdh, SDIO_FUNC_1,
+ lo = brcmf_sdcard_cfg_read(sdh, SDIO_FUNC_1,
SBSDIO_FUNC1_WFRAMEBCLO,
NULL);
bus->f1regdata += 2;
return ret;
}
-int dhd_bus_txdata(struct dhd_bus *bus, struct sk_buff *pkt)
+int brcmf_sdbrcm_bus_txdata(struct dhd_bus *bus, struct sk_buff *pkt)
{
int ret = -EBADE;
uint datalen, prec;
/* Otherwise, send it now */
BUS_WAKE(bus);
/* Make sure back plane ht clk is on, no pending allowed */
- dhdsdio_clkctl(bus, CLK_AVAIL, true);
+ brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, true);
#ifndef SDTEST
DHD_TRACE(("%s: calling txpkt\n", __func__));
- ret = dhdsdio_txpkt(bus, pkt, SDPCM_DATA_CHANNEL, true);
+ ret = brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_DATA_CHANNEL, true);
#else
- ret = dhdsdio_txpkt(bus, pkt,
+ ret = brcmf_sdbrcm_txpkt(bus, pkt,
(bus->ext_loop ? SDPCM_TEST_CHANNEL :
SDPCM_DATA_CHANNEL), true);
#endif
if ((bus->idletime == DHD_IDLE_IMMEDIATE) && !bus->dpc_sched) {
bus->activity = false;
- dhdsdio_clkctl(bus, CLK_NONE, true);
+ brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
}
dhd_os_sdunlock(bus->dhd);
return ret;
}
-static uint dhdsdio_sendfromq(dhd_bus_t *bus, uint maxframes)
+static uint brcmf_sdbrcm_sendfromq(dhd_bus_t *bus, uint maxframes)
{
struct sk_buff *pkt;
u32 intstatus = 0;
datalen = pkt->len - SDPCM_HDRLEN;
#ifndef SDTEST
- ret = dhdsdio_txpkt(bus, pkt, SDPCM_DATA_CHANNEL, true);
+ ret = brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_DATA_CHANNEL, true);
#else
- ret = dhdsdio_txpkt(bus, pkt,
+ ret = brcmf_sdbrcm_txpkt(bus, pkt,
(bus->ext_loop ? SDPCM_TEST_CHANNEL :
SDPCM_DATA_CHANNEL), true);
#endif
/* Check device status, signal pending interrupt */
R_SDREG(intstatus, ®s->intstatus, retries);
bus->f2txdata++;
- if (bcmsdh_regfail(bus->sdh))
+ if (brcmf_sdcard_regfail(bus->sdh))
break;
if (intstatus & bus->hostintmask)
bus->ipend = true;
return cnt;
}
-int dhd_bus_txctl(struct dhd_bus *bus, unsigned char *msg, uint msglen)
+int
+brcmf_sdbrcm_bus_txctl(struct dhd_bus *bus, unsigned char *msg, uint msglen)
{
u8 *frame;
u16 len;
BUS_WAKE(bus);
/* Make sure backplane clock is on */
- dhdsdio_clkctl(bus, CLK_AVAIL, false);
+ brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
/* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
*(u16 *) frame = cpu_to_le16((u16) msglen);
do {
bus->ctrl_frame_stat = false;
- ret =
- dhd_bcmsdh_send_buf(bus, bcmsdh_cur_sbwad(sdh),
- SDIO_FUNC_2, F2SYNC, frame, len,
- NULL, NULL, NULL);
+ ret = brcmf_sdbrcm_send_buf(bus,
+ brcmf_sdcard_cur_sbwad(sdh), SDIO_FUNC_2,
+ F2SYNC, frame, len, NULL, NULL, NULL);
ASSERT(ret != -BCME_PENDING);
__func__, ret));
bus->tx_sderrs++;
- bcmsdh_abort(sdh, SDIO_FUNC_2);
+ brcmf_sdcard_abort(sdh, SDIO_FUNC_2);
- bcmsdh_cfg_write(sdh, SDIO_FUNC_1,
+ brcmf_sdcard_cfg_write(sdh, SDIO_FUNC_1,
SBSDIO_FUNC1_FRAMECTRL,
SFC_WF_TERM, NULL);
bus->f1regdata++;
for (i = 0; i < 3; i++) {
u8 hi, lo;
- hi = bcmsdh_cfg_read(sdh, SDIO_FUNC_1,
+ hi = brcmf_sdcard_cfg_read(sdh,
+ SDIO_FUNC_1,
SBSDIO_FUNC1_WFRAMEBCHI,
NULL);
- lo = bcmsdh_cfg_read(sdh, SDIO_FUNC_1,
+ lo = brcmf_sdcard_cfg_read(sdh,
+ SDIO_FUNC_1,
SBSDIO_FUNC1_WFRAMEBCLO,
- NULL);
+ NULL);
bus->f1regdata += 2;
if ((hi == 0) && (lo == 0))
break;
if ((bus->idletime == DHD_IDLE_IMMEDIATE) && !bus->dpc_sched) {
bus->activity = false;
- dhdsdio_clkctl(bus, CLK_NONE, true);
+ brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
}
dhd_os_sdunlock(bus->dhd);
return ret ? -EIO : 0;
}
-int dhd_bus_rxctl(struct dhd_bus *bus, unsigned char *msg, uint msglen)
+int brcmf_sdbrcm_bus_rxctl(struct dhd_bus *bus, unsigned char *msg, uint msglen)
{
int timeleft;
uint rxlen = 0;
DHD_ERROR(("%s: resumed on timeout\n", __func__));
#ifdef DHD_DEBUG
dhd_os_sdlock(bus->dhd);
- dhdsdio_checkdied(bus, NULL, 0);
+ brcmf_sdbrcm_checkdied(bus, NULL, 0);
dhd_os_sdunlock(bus->dhd);
#endif /* DHD_DEBUG */
} else if (pending == true) {
DHD_CTL(("%s: resumed for unknown reason?\n", __func__));
#ifdef DHD_DEBUG
dhd_os_sdlock(bus->dhd);
- dhdsdio_checkdied(bus, NULL, 0);
+ brcmf_sdbrcm_checkdied(bus, NULL, 0);
dhd_os_sdunlock(bus->dhd);
#endif /* DHD_DEBUG */
}
}
}
-void dhd_bus_dump(dhd_pub_t *dhdp, struct brcmu_strbuf *strbuf)
+void brcmf_sdbrcm_bus_dump(dhd_pub_t *dhdp, struct brcmu_strbuf *strbuf)
{
dhd_bus_t *bus = dhdp->bus;
#ifdef DHD_DEBUG
brcmu_bprintf(strbuf, "dpc_sched %d host interrupt%spending\n",
bus->dpc_sched,
- (bcmsdh_intr_pending(bus->sdh) ? " " : " not "));
+ (brcmf_sdcard_intr_pending(bus->sdh) ? " " : " not "));
brcmu_bprintf(strbuf, "blocksize %d roundup %d\n", bus->blocksize,
bus->roundup);
#endif /* DHD_DEBUG */
}
#ifdef SDTEST
-static int dhdsdio_pktgen_get(dhd_bus_t *bus, u8 *arg)
+static int brcmf_sdbrcm_pktgen_get(dhd_bus_t *bus, u8 *arg)
{
dhd_pktgen_t pktgen;
return 0;
}
-static int dhdsdio_pktgen_set(dhd_bus_t *bus, u8 *arg)
+static int brcmf_sdbrcm_pktgen_set(dhd_bus_t *bus, u8 *arg)
{
dhd_pktgen_t pktgen;
uint oldcnt, oldmode;
#endif /* SDTEST */
static int
-dhdsdio_membytes(dhd_bus_t *bus, bool write, u32 address, u8 *data,
+brcmf_sdbrcm_membytes(dhd_bus_t *bus, bool write, u32 address, u8 *data,
uint size)
{
int bcmerror = 0;
dsize = size;
/* Set the backplane window to include the start address */
- bcmerror = dhdsdio_set_siaddr_window(bus, address);
+ bcmerror = brcmf_sdbrcm_set_siaddr_window(bus, address);
if (bcmerror) {
DHD_ERROR(("%s: window change failed\n", __func__));
goto xfer_done;
__func__, (write ? "write" : "read"), dsize,
sdaddr, (address & SBSDIO_SBWINDOW_MASK)));
bcmerror =
- bcmsdh_rwdata(bus->sdh, write, sdaddr, data, dsize);
+ brcmf_sdcard_rwdata(bus->sdh, write, sdaddr, data, dsize);
if (bcmerror) {
DHD_ERROR(("%s: membytes transfer failed\n", __func__));
break;
if (size) {
data += dsize;
address += dsize;
- bcmerror = dhdsdio_set_siaddr_window(bus, address);
+ bcmerror = brcmf_sdbrcm_set_siaddr_window(bus, address);
if (bcmerror) {
DHD_ERROR(("%s: window change failed\n",
__func__));
xfer_done:
/* Return the window to backplane enumeration space for core access */
- if (dhdsdio_set_siaddr_window(bus, bcmsdh_cur_sbwad(bus->sdh))) {
+ if (brcmf_sdbrcm_set_siaddr_window(bus,
+ brcmf_sdcard_cur_sbwad(bus->sdh))) {
DHD_ERROR(("%s: FAILED to set window back to 0x%x\n",
- __func__, bcmsdh_cur_sbwad(bus->sdh)));
+ __func__, brcmf_sdcard_cur_sbwad(bus->sdh)));
}
return bcmerror;
}
#ifdef DHD_DEBUG
-static int dhdsdio_readshared(dhd_bus_t *bus, struct sdpcm_shared *sh)
+static int brcmf_sdbrcm_readshared(dhd_bus_t *bus, struct sdpcm_shared *sh)
{
u32 addr;
int rv;
/* Read last word in memory to determine address of
sdpcm_shared structure */
- rv = dhdsdio_membytes(bus, false, bus->ramsize - 4, (u8 *)&addr, 4);
+ rv = brcmf_sdbrcm_membytes(bus, false, bus->ramsize - 4, (u8 *)&addr,
+ 4);
if (rv < 0)
return rv;
}
/* Read rte_shared structure */
- rv = dhdsdio_membytes(bus, false, addr, (u8 *) sh,
+ rv = brcmf_sdbrcm_membytes(bus, false, addr, (u8 *) sh,
sizeof(struct sdpcm_shared));
if (rv < 0)
return rv;
return 0;
}
-static int dhdsdio_checkdied(dhd_bus_t *bus, u8 *data, uint size)
+static int brcmf_sdbrcm_checkdied(dhd_bus_t *bus, u8 *data, uint size)
{
int bcmerror = 0;
uint msize = 512;
goto done;
}
- bcmerror = dhdsdio_readshared(bus, &sdpcm_shared);
+ bcmerror = brcmf_sdbrcm_readshared(bus, &sdpcm_shared);
if (bcmerror < 0)
goto done;
brcmu_bprintf(&strbuf, "Dongle assert");
if (sdpcm_shared.assert_exp_addr != 0) {
str[0] = '\0';
- bcmerror = dhdsdio_membytes(bus, false,
+ bcmerror = brcmf_sdbrcm_membytes(bus, false,
sdpcm_shared.assert_exp_addr,
(u8 *) str, maxstrlen);
if (bcmerror < 0)
if (sdpcm_shared.assert_file_addr != 0) {
str[0] = '\0';
- bcmerror = dhdsdio_membytes(bus, false,
+ bcmerror = brcmf_sdbrcm_membytes(bus, false,
sdpcm_shared.assert_file_addr,
(u8 *) str, maxstrlen);
if (bcmerror < 0)
}
if (sdpcm_shared.flags & SDPCM_SHARED_TRAP) {
- bcmerror = dhdsdio_membytes(bus, false,
+ bcmerror = brcmf_sdbrcm_membytes(bus, false,
sdpcm_shared.trap_addr, (u8 *)&tr,
sizeof(trap_t));
if (bcmerror < 0)
#ifdef DHD_DEBUG
if (sdpcm_shared.flags & SDPCM_SHARED_TRAP) {
/* Mem dump to a file on device */
- dhdsdio_mem_dump(bus);
+ brcmf_sdbrcm_mem_dump(bus);
}
#endif /* DHD_DEBUG */
return bcmerror;
}
-static int dhdsdio_mem_dump(dhd_bus_t *bus)
+static int brcmf_sdbrcm_mem_dump(dhd_bus_t *bus)
{
int ret = 0;
int size; /* Full mem size */
databuf = buf;
while (size) {
read_size = min(MEMBLOCK, size);
- ret = dhdsdio_membytes(bus, false, start, databuf, read_size);
+ ret = brcmf_sdbrcm_membytes(bus, false, start, databuf,
+ read_size);
if (ret) {
DHD_ERROR(("%s: Error membytes %d\n", __func__, ret));
kfree(buf);
#define CONSOLE_LINE_MAX 192
-static int dhdsdio_readconsole(dhd_bus_t *bus)
+static int brcmf_sdbrcm_readconsole(dhd_bus_t *bus)
{
dhd_console_t *c = &bus->console;
u8 line[CONSOLE_LINE_MAX], ch;
/* Read console log struct */
addr = bus->console_addr + offsetof(rte_cons_t, log);
- rv = dhdsdio_membytes(bus, false, addr, (u8 *)&c->log,
+ rv = brcmf_sdbrcm_membytes(bus, false, addr, (u8 *)&c->log,
sizeof(c->log));
if (rv < 0)
return rv;
/* Read the console buffer */
addr = le32_to_cpu(c->log.buf);
- rv = dhdsdio_membytes(bus, false, addr, c->buf, c->bufsize);
+ rv = brcmf_sdbrcm_membytes(bus, false, addr, c->buf, c->bufsize);
if (rv < 0)
return rv;
}
#endif /* DHD_DEBUG */
-int dhdsdio_downloadvars(dhd_bus_t *bus, void *arg, int len)
+int brcmf_sdbrcm_downloadvars(dhd_bus_t *bus, void *arg, int len)
{
int bcmerror = 0;
}
static int
-dhdsdio_doiovar(dhd_bus_t *bus, const struct brcmu_iovar *vi, u32 actionid,
+brcmf_sdbrcm_doiovar(dhd_bus_t *bus, const struct brcmu_iovar *vi, u32 actionid,
const char *name, void *params, int plen, void *arg, int len,
int val_size)
{
/* Handle sleep stuff before any clock mucking */
if (vi->varid == IOV_SLEEP) {
if (IOV_ISSET(actionid)) {
- bcmerror = dhdsdio_bussleep(bus, bool_val);
+ bcmerror = brcmf_sdbrcm_bussleep(bus, bool_val);
} else {
int_val = (s32) bus->sleeping;
memcpy(arg, &int_val, val_size);
/* Request clock to allow SDIO accesses */
if (!bus->dhd->dongle_reset) {
BUS_WAKE(bus);
- dhdsdio_clkctl(bus, CLK_AVAIL, false);
+ brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
}
switch (actionid) {
if (bus->intr) {
DHD_INTR(("%s: enable SDIO device interrupts\n",
__func__));
- bcmsdh_intr_enable(bus->sdh);
+ brcmf_sdcard_intr_enable(bus->sdh);
} else {
DHD_INTR(("%s: disable SDIO interrupts\n",
__func__));
- bcmsdh_intr_disable(bus->sdh);
+ brcmf_sdcard_intr_disable(bus->sdh);
}
}
break;
2 * sizeof(int) : (u8 *) arg;
/* Call to do the transfer */
- bcmerror =
- dhdsdio_membytes(bus, set, address, data, size);
+ bcmerror = brcmf_sdbrcm_membytes(bus, set, address,
+ data, size);
break;
}
case IOV_SVAL(IOV_SDIOD_DRIVE):
dhd_sdiod_drive_strength = int_val;
- dhdsdio_sdiod_drive_strength_init(bus,
+ brcmf_sdbrcm_sdiod_drive_strength_init(bus,
dhd_sdiod_drive_strength);
break;
case IOV_SVAL(IOV_DOWNLOAD):
- bcmerror = dhdsdio_download_state(bus, bool_val);
+ bcmerror = brcmf_sdbrcm_download_state(bus, bool_val);
break;
case IOV_SVAL(IOV_VARS):
- bcmerror = dhdsdio_downloadvars(bus, arg, len);
+ bcmerror = brcmf_sdbrcm_downloadvars(bus, arg, len);
break;
case IOV_GVAL(IOV_READAHEAD):
addr = (unsigned long)bus->regs + sd_ptr->offset;
size = sd_ptr->func;
- int_val = (s32) bcmsdh_reg_read(bus->sdh, addr, size);
- if (bcmsdh_regfail(bus->sdh))
+ int_val = (s32) brcmf_sdcard_reg_read(bus->sdh, addr,
+ size);
+ if (brcmf_sdcard_regfail(bus->sdh))
bcmerror = -EIO;
memcpy(arg, &int_val, sizeof(s32));
break;
addr = (unsigned long)bus->regs + sd_ptr->offset;
size = sd_ptr->func;
- bcmsdh_reg_write(bus->sdh, addr, size, sd_ptr->value);
- if (bcmsdh_regfail(bus->sdh))
+ brcmf_sdcard_reg_write(bus->sdh, addr, size,
+ sd_ptr->value);
+ if (brcmf_sdcard_regfail(bus->sdh))
bcmerror = -EIO;
break;
}
addr = SI_ENUM_BASE + sdreg.offset;
size = sdreg.func;
- int_val = (s32) bcmsdh_reg_read(bus->sdh, addr, size);
- if (bcmsdh_regfail(bus->sdh))
+ int_val = (s32) brcmf_sdcard_reg_read(bus->sdh, addr,
+ size);
+ if (brcmf_sdcard_regfail(bus->sdh))
bcmerror = -EIO;
memcpy(arg, &int_val, sizeof(s32));
break;
addr = SI_ENUM_BASE + sdreg.offset;
size = sdreg.func;
- bcmsdh_reg_write(bus->sdh, addr, size, sdreg.value);
- if (bcmsdh_regfail(bus->sdh))
+ brcmf_sdcard_reg_write(bus->sdh, addr, size,
+ sdreg.value);
+ if (brcmf_sdcard_regfail(bus->sdh))
bcmerror = -EIO;
break;
}
*(char *)arg = 0;
strcat(arg, "\nFunc 0\n");
- bcmsdh_cis_read(bus->sdh, 0x10,
+ brcmf_sdcard_cis_read(bus->sdh, 0x10,
(u8 *) arg + strlen(arg),
SBSDIO_CIS_SIZE_LIMIT);
strcat(arg, "\nFunc 1\n");
- bcmsdh_cis_read(bus->sdh, 0x11,
+ brcmf_sdcard_cis_read(bus->sdh, 0x11,
(u8 *) arg + strlen(arg),
SBSDIO_CIS_SIZE_LIMIT);
strcat(arg, "\nFunc 2\n");
- bcmsdh_cis_read(bus->sdh, 0x12,
+ brcmf_sdcard_cis_read(bus->sdh, 0x12,
(u8 *) arg + strlen(arg),
SBSDIO_CIS_SIZE_LIMIT);
break;
break;
case IOV_GVAL(IOV_PKTGEN):
- bcmerror = dhdsdio_pktgen_get(bus, arg);
+ bcmerror = brcmf_sdbrcm_pktgen_get(bus, arg);
break;
case IOV_SVAL(IOV_PKTGEN):
- bcmerror = dhdsdio_pktgen_set(bus, arg);
+ bcmerror = brcmf_sdbrcm_pktgen_set(bus, arg);
break;
#endif /* SDTEST */
exit:
if ((bus->idletime == DHD_IDLE_IMMEDIATE) && !bus->dpc_sched) {
bus->activity = false;
- dhdsdio_clkctl(bus, CLK_NONE, true);
+ brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
}
dhd_os_sdunlock(bus->dhd);
return bcmerror;
}
-static int dhdsdio_write_vars(dhd_bus_t *bus)
+static int brcmf_sdbrcm_write_vars(dhd_bus_t *bus)
{
int bcmerror = 0;
u32 varsize;
/* Write the vars list */
bcmerror =
- dhdsdio_membytes(bus, true, varaddr, vbuffer, varsize);
+ brcmf_sdbrcm_membytes(bus, true, varaddr, vbuffer, varsize);
#ifdef DHD_DEBUG
/* Verify NVRAM bytes */
DHD_INFO(("Compare NVRAM dl & ul; varsize=%d\n", varsize));
/* Read the vars list to temp buffer for comparison */
bcmerror =
- dhdsdio_membytes(bus, false, varaddr, nvram_ularray,
+ brcmf_sdbrcm_membytes(bus, false, varaddr, nvram_ularray,
varsize);
if (bcmerror) {
DHD_ERROR(("%s: error %d on reading %d nvram bytes at "
varsizew));
/* Write the length token to the last word */
- bcmerror = dhdsdio_membytes(bus, true, (bus->orig_ramsize - 4),
+ bcmerror = brcmf_sdbrcm_membytes(bus, true, (bus->orig_ramsize - 4),
(u8 *)&varsizew, 4);
return bcmerror;
}
-static int dhdsdio_download_state(dhd_bus_t *bus, bool enter)
+static int brcmf_sdbrcm_download_state(dhd_bus_t *bus, bool enter)
{
uint retries;
u32 regdata;
if (enter) {
bus->alp_only = true;
- dhdsdio_chip_disablecore(bus->sdh, bus->ci->armcorebase);
+ brcmf_sdbrcm_chip_disablecore(bus->sdh, bus->ci->armcorebase);
- dhdsdio_chip_resetcore(bus->sdh, bus->ci->ramcorebase);
+ brcmf_sdbrcm_chip_resetcore(bus->sdh, bus->ci->ramcorebase);
/* Clear the top bit of memory */
if (bus->ramsize) {
u32 zeros = 0;
- dhdsdio_membytes(bus, true, bus->ramsize - 4,
+ brcmf_sdbrcm_membytes(bus, true, bus->ramsize - 4,
(u8 *)&zeros, 4);
}
} else {
- regdata = bcmsdh_reg_read(bus->sdh,
+ regdata = brcmf_sdcard_reg_read(bus->sdh,
CORE_SB(bus->ci->ramcorebase, sbtmstatelow), 4);
regdata &= (SBTML_RESET | SBTML_REJ_MASK |
(SICF_CLOCK_EN << SBTML_SICF_SHIFT));
goto fail;
}
- bcmerror = dhdsdio_write_vars(bus);
+ bcmerror = brcmf_sdbrcm_write_vars(bus);
if (bcmerror) {
DHD_ERROR(("%s: no vars written to RAM\n", __func__));
bcmerror = 0;
W_SDREG(0xFFFFFFFF, &bus->regs->intstatus, retries);
- dhdsdio_chip_resetcore(bus->sdh, bus->ci->armcorebase);
+ brcmf_sdbrcm_chip_resetcore(bus->sdh, bus->ci->armcorebase);
/* Allow HT Clock now that the ARM is running. */
bus->alp_only = false;
}
int
-dhd_bus_iovar_op(dhd_pub_t *dhdp, const char *name,
- void *params, int plen, void *arg, int len, bool set)
+brcmf_sdbrcm_bus_iovar_op(dhd_pub_t *dhdp, const char *name,
+ void *params, int plen, void *arg, int len, bool set)
{
dhd_bus_t *bus = dhdp->bus;
const struct brcmu_iovar *vi = NULL;
BUS_WAKE(bus);
/* Turn on clock in case SD command needs backplane */
- dhdsdio_clkctl(bus, CLK_AVAIL, false);
+ brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
- bcmerror =
- bcmsdh_iovar_op(bus->sdh, name, params, plen, arg, len,
- set);
+ bcmerror = brcmf_sdcard_iovar_op(bus->sdh, name, params, plen,
+ arg, len, set);
/* Similar check for blocksize change */
if (set && strcmp(name, "sd_blocksize") == 0) {
s32 fnum = 2;
- if (bcmsdh_iovar_op
+ if (brcmf_sdcard_iovar_op
(bus->sdh, "sd_blocksize", &fnum, sizeof(s32),
&bus->blocksize, sizeof(s32),
false) != 0) {
if ((bus->idletime == DHD_IDLE_IMMEDIATE) && !bus->dpc_sched) {
bus->activity = false;
- dhdsdio_clkctl(bus, CLK_NONE, true);
+ brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
}
dhd_os_sdunlock(bus->dhd);
val_size = sizeof(int);
actionid = set ? IOV_SVAL(vi->varid) : IOV_GVAL(vi->varid);
- bcmerror =
- dhdsdio_doiovar(bus, vi, actionid, name, params, plen, arg, len,
- val_size);
+ bcmerror = brcmf_sdbrcm_doiovar(bus, vi, actionid, name, params, plen,
+ arg, len, val_size);
exit:
return bcmerror;
}
-void dhd_bus_stop(struct dhd_bus *bus, bool enforce_mutex)
+void brcmf_sdbrcm_bus_stop(struct dhd_bus *bus, bool enforce_mutex)
{
u32 local_hostintmask;
u8 saveclk;
BUS_WAKE(bus);
/* Enable clock for device interrupts */
- dhdsdio_clkctl(bus, CLK_AVAIL, false);
+ brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
/* Disable and clear interrupts at the chip level also */
W_SDREG(0, &bus->regs->hostintmask, retries);
bus->dhd->busstate = DHD_BUS_DOWN;
/* Force clocks on backplane to be sure F2 interrupt propagates */
- saveclk =
- bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
- &err);
+ saveclk = brcmf_sdcard_cfg_read(bus->sdh, SDIO_FUNC_1,
+ SBSDIO_FUNC1_CHIPCLKCSR, &err);
if (!err) {
- bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
- (saveclk | SBSDIO_FORCE_HT), &err);
+ brcmf_sdcard_cfg_write(bus->sdh, SDIO_FUNC_1,
+ SBSDIO_FUNC1_CHIPCLKCSR,
+ (saveclk | SBSDIO_FORCE_HT), &err);
}
if (err) {
DHD_ERROR(("%s: Failed to force clock for F2: err %d\n",
/* Turn off the bus (F2), free any pending packets */
DHD_INTR(("%s: disable SDIO interrupts\n", __func__));
- bcmsdh_intr_disable(bus->sdh);
- bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_0, SDIO_CCCR_IOEx,
+ brcmf_sdcard_intr_disable(bus->sdh);
+ brcmf_sdcard_cfg_write(bus->sdh, SDIO_FUNC_0, SDIO_CCCR_IOEx,
SDIO_FUNC_ENABLE_1, NULL);
/* Clear any pending interrupts now that F2 is disabled */
W_SDREG(local_hostintmask, &bus->regs->intstatus, retries);
/* Turn off the backplane clock (only) */
- dhdsdio_clkctl(bus, CLK_SDONLY, false);
+ brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
/* Clear the data packet queues */
brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
dhd_os_sdunlock(bus->dhd);
}
-int dhd_bus_init(dhd_pub_t *dhdp, bool enforce_mutex)
+int brcmf_sdbrcm_bus_init(dhd_pub_t *dhdp, bool enforce_mutex)
{
dhd_bus_t *bus = dhdp->bus;
dhd_timeout_t tmo;
dhd_os_sdlock(bus->dhd);
/* Make sure backplane clock is on, needed to generate F2 interrupt */
- dhdsdio_clkctl(bus, CLK_AVAIL, false);
+ brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
if (bus->clkstate != CLK_AVAIL)
goto exit;
/* Force clocks on backplane to be sure F2 interrupt propagates */
saveclk =
- bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
- &err);
+ brcmf_sdcard_cfg_read(bus->sdh, SDIO_FUNC_1,
+ SBSDIO_FUNC1_CHIPCLKCSR, &err);
if (!err) {
- bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
- (saveclk | SBSDIO_FORCE_HT), &err);
+ brcmf_sdcard_cfg_write(bus->sdh, SDIO_FUNC_1,
+ SBSDIO_FUNC1_CHIPCLKCSR,
+ (saveclk | SBSDIO_FORCE_HT), &err);
}
if (err) {
DHD_ERROR(("%s: Failed to force clock for F2: err %d\n",
&bus->regs->tosbmailboxdata, retries);
enable = (SDIO_FUNC_ENABLE_1 | SDIO_FUNC_ENABLE_2);
- bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_0, SDIO_CCCR_IOEx, enable, NULL);
+ brcmf_sdcard_cfg_write(bus->sdh, SDIO_FUNC_0, SDIO_CCCR_IOEx, enable,
+ NULL);
/* Give the dongle some time to do its thing and set IOR2 */
dhd_timeout_start(&tmo, DHD_WAIT_F2RDY * 1000);
ready = 0;
while (ready != enable && !dhd_timeout_expired(&tmo))
ready =
- bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_0, SDIO_CCCR_IORx,
+ brcmf_sdcard_cfg_read(bus->sdh, SDIO_FUNC_0, SDIO_CCCR_IORx,
NULL);
DHD_INFO(("%s: enable 0x%02x, ready 0x%02x (waited %uus)\n",
(unsigned int *)CORE_BUS_REG(bus->ci->buscorebase,
hostintmask), retries);
- bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_WATERMARK,
+ brcmf_sdcard_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_WATERMARK,
(u8) watermark, &err);
/* Set bus state according to enable result */
if (bus->intr) {
DHD_INTR(("%s: enable SDIO device interrupts\n",
__func__));
- bcmsdh_intr_enable(bus->sdh);
+ brcmf_sdcard_intr_enable(bus->sdh);
} else {
DHD_INTR(("%s: disable SDIO interrupts\n", __func__));
- bcmsdh_intr_disable(bus->sdh);
+ brcmf_sdcard_intr_disable(bus->sdh);
}
}
else {
/* Disable F2 again */
enable = SDIO_FUNC_ENABLE_1;
- bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_0, SDIO_CCCR_IOEx, enable,
- NULL);
+ brcmf_sdcard_cfg_write(bus->sdh, SDIO_FUNC_0, SDIO_CCCR_IOEx,
+ enable, NULL);
}
/* Restore previous clock setting */
- bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
+ brcmf_sdcard_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
saveclk, &err);
/* If we didn't come up, turn off backplane clock */
if (dhdp->busstate != DHD_BUS_DATA)
- dhdsdio_clkctl(bus, CLK_NONE, false);
+ brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
exit:
if (enforce_mutex)
return ret;
}
-static void dhdsdio_rxfail(dhd_bus_t *bus, bool abort, bool rtx)
+static void brcmf_sdbrcm_rxfail(dhd_bus_t *bus, bool abort, bool rtx)
{
bcmsdh_info_t *sdh = bus->sdh;
struct sdpcmd_regs *regs = bus->regs;
(rtx ? ", send NAK" : "")));
if (abort)
- bcmsdh_abort(sdh, SDIO_FUNC_2);
+ brcmf_sdcard_abort(sdh, SDIO_FUNC_2);
- bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_FRAMECTRL, SFC_RF_TERM,
- &err);
+ brcmf_sdcard_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_FRAMECTRL,
+ SFC_RF_TERM, &err);
bus->f1regdata++;
/* Wait until the packet has been flushed (device/FIFO stable) */
for (lastrbc = retries = 0xffff; retries > 0; retries--) {
- hi = bcmsdh_cfg_read(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_RFRAMEBCHI,
- NULL);
- lo = bcmsdh_cfg_read(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_RFRAMEBCLO,
- NULL);
+ hi = brcmf_sdcard_cfg_read(sdh, SDIO_FUNC_1,
+ SBSDIO_FUNC1_RFRAMEBCHI, NULL);
+ lo = brcmf_sdcard_cfg_read(sdh, SDIO_FUNC_1,
+ SBSDIO_FUNC1_RFRAMEBCLO, NULL);
bus->f1regdata += 2;
if ((hi == 0) && (lo == 0))
bus->nextlen = 0;
/* If we can't reach the device, signal failure */
- if (err || bcmsdh_regfail(sdh))
+ if (err || brcmf_sdcard_regfail(sdh))
bus->dhd->busstate = DHD_BUS_DOWN;
}
static void
-dhdsdio_read_control(dhd_bus_t *bus, u8 *hdr, uint len, uint doff)
+brcmf_sdbrcm_read_control(dhd_bus_t *bus, u8 *hdr, uint len, uint doff)
{
bcmsdh_info_t *sdh = bus->sdh;
uint rdlen, pad;
DHD_ERROR(("%s: %d-byte control read exceeds %d-byte buffer\n",
__func__, rdlen, bus->dhd->maxctl));
bus->dhd->rx_errors++;
- dhdsdio_rxfail(bus, false, false);
+ brcmf_sdbrcm_rxfail(bus, false, false);
goto done;
}
__func__, len, (len - doff), bus->dhd->maxctl));
bus->dhd->rx_errors++;
bus->rx_toolong++;
- dhdsdio_rxfail(bus, false, false);
+ brcmf_sdbrcm_rxfail(bus, false, false);
goto done;
}
/* Read remainder of frame body into the rxctl buffer */
- sdret = bcmsdh_recv_buf(sdh, bcmsdh_cur_sbwad(sdh), SDIO_FUNC_2,
+ sdret = brcmf_sdcard_recv_buf(sdh, brcmf_sdcard_cur_sbwad(sdh),
+ SDIO_FUNC_2,
F2SYNC, (bus->rxctl + firstread), rdlen,
NULL, NULL, NULL);
bus->f2rxdata++;
DHD_ERROR(("%s: read %d control bytes failed: %d\n",
__func__, rdlen, sdret));
bus->rxc_errors++; /* dhd.rx_ctlerrs is higher level */
- dhdsdio_rxfail(bus, true, true);
+ brcmf_sdbrcm_rxfail(bus, true, true);
goto done;
}
dhd_os_ioctl_resp_wake(bus->dhd);
}
-static u8 dhdsdio_rxglom(dhd_bus_t *bus, u8 rxseq)
+static u8 brcmf_sdbrcm_rxglom(dhd_bus_t *bus, u8 rxseq)
{
u16 dlen, totlen;
u8 *dptr, num = 0;
/* If packets, issue read(s) and send up packet chain */
/* Return sequence numbers consumed? */
- DHD_TRACE(("dhdsdio_rxglom: start: glomd %p glom %p\n", bus->glomd,
+ DHD_TRACE(("brcmf_sdbrcm_rxglom: start: glomd %p glom %p\n", bus->glomd,
bus->glom));
/* If there's a descriptor, generate the packet chain */
* packet and and copy into the chain.
*/
if (usechain) {
- errcode = bcmsdh_recv_buf(bus->sdh,
- bcmsdh_cur_sbwad(bus->sdh), SDIO_FUNC_2,
+ errcode = brcmf_sdcard_recv_buf(bus->sdh,
+ brcmf_sdcard_cur_sbwad(bus->sdh),
+ SDIO_FUNC_2,
F2SYNC, (u8 *) pfirst->data, dlen,
pfirst, NULL, NULL);
} else if (bus->dataptr) {
- errcode = bcmsdh_recv_buf(bus->sdh,
- bcmsdh_cur_sbwad(bus->sdh), SDIO_FUNC_2,
+ errcode = brcmf_sdcard_recv_buf(bus->sdh,
+ brcmf_sdcard_cur_sbwad(bus->sdh),
+ SDIO_FUNC_2,
F2SYNC, bus->dataptr, dlen,
NULL, NULL, NULL);
sublen = (u16) brcmu_pktfrombuf(pfirst, 0, dlen,
bus->dhd->rx_errors++;
if (bus->glomerr++ < 3) {
- dhdsdio_rxfail(bus, true, true);
+ brcmf_sdbrcm_rxfail(bus, true, true);
} else {
bus->glomerr = 0;
- dhdsdio_rxfail(bus, true, false);
+ brcmf_sdbrcm_rxfail(bus, true, false);
brcmu_pkt_buf_free_skb(bus->glom);
bus->rxglomfail++;
bus->glom = NULL;
if (bus->glomerr++ < 3) {
/* Restore superframe header space */
skb_push(pfirst, sfdoff);
- dhdsdio_rxfail(bus, true, true);
+ brcmf_sdbrcm_rxfail(bus, true, true);
} else {
bus->glomerr = 0;
- dhdsdio_rxfail(bus, true, false);
+ brcmf_sdbrcm_rxfail(bus, true, false);
brcmu_pkt_buf_free_skb(bus->glom);
bus->rxglomfail++;
bus->glom = NULL;
}
/* Return true if there may be more frames to read */
-static uint dhdsdio_readframes(dhd_bus_t *bus, uint maxframes, bool *finished)
+static uint
+brcmf_sdbrcm_readframes(dhd_bus_t *bus, uint maxframes, bool *finished)
{
bcmsdh_info_t *sdh = bus->sdh;
u8 cnt;
DHD_GLOM(("%s: calling rxglom: glomd %p, glom %p\n",
__func__, bus->glomd, bus->glom));
- cnt = dhdsdio_rxglom(bus, rxseq);
+ cnt = brcmf_sdbrcm_rxglom(bus, rxseq);
DHD_GLOM(("%s: rxglom returned %d\n", __func__, cnt));
rxseq += cnt - 1;
rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
ASSERT(bus->rxctl >= bus->rxbuf);
rxbuf = bus->rxctl;
/* Read the entire frame */
- sdret = bcmsdh_recv_buf(sdh,
- bcmsdh_cur_sbwad(sdh),
+ sdret = brcmf_sdcard_recv_buf(sdh,
+ brcmf_sdcard_cur_sbwad(sdh),
SDIO_FUNC_2, F2SYNC,
rxbuf, rdlen,
NULL, NULL, NULL);
rdlen, sdret));
/* dhd.rx_ctlerrs is higher */
bus->rxc_errors++;
- dhdsdio_rxfail(bus, true,
+ brcmf_sdbrcm_rxfail(bus, true,
(bus->bus ==
SPI_BUS) ? false
: true);
PKTALIGN(pkt, rdlen, DHD_SDALIGN);
rxbuf = (u8 *) (pkt->data);
/* Read the entire frame */
- sdret = bcmsdh_recv_buf(sdh,
- bcmsdh_cur_sbwad(sdh),
+ sdret = brcmf_sdcard_recv_buf(sdh,
+ brcmf_sdcard_cur_sbwad(sdh),
SDIO_FUNC_2, F2SYNC,
rxbuf, rdlen,
pkt, NULL, NULL);
* Don't attempt NAK for
* gSPI
*/
- dhdsdio_rxfail(bus, true,
+ brcmf_sdbrcm_rxfail(bus, true,
(bus->bus ==
SPI_BUS) ? false :
true);
if (!(len | check)) {
DHD_INFO(("%s (nextlen): read zeros in HW "
"header???\n", __func__));
- dhdsdio_pktfree2(bus, pkt);
+ brcmf_sdbrcm_pktfree2(bus, pkt);
continue;
}
" 0x%04x/0x%04x/0x%04x\n",
__func__, nextlen, len, check));
bus->rx_badhdr++;
- dhdsdio_rxfail(bus, false, false);
- dhdsdio_pktfree2(bus, pkt);
+ brcmf_sdbrcm_rxfail(bus, false, false);
+ brcmf_sdbrcm_pktfree2(bus, pkt);
continue;
}
if (len < SDPCM_HDRLEN) {
DHD_ERROR(("%s (nextlen): HW hdr length "
"invalid: %d\n", __func__, len));
- dhdsdio_pktfree2(bus, pkt);
+ brcmf_sdbrcm_pktfree2(bus, pkt);
continue;
}
"expected rxseq %d\n",
__func__, nextlen,
len, roundup(len, 16), rxseq));
- dhdsdio_rxfail(bus, true, (bus->bus != SPI_BUS));
- dhdsdio_pktfree2(bus, pkt);
+ brcmf_sdbrcm_rxfail(bus, true,
+ bus->bus != SPI_BUS);
+ brcmf_sdbrcm_pktfree2(bus, pkt);
continue;
}
if (chan == SDPCM_CONTROL_CHANNEL) {
if (bus->bus == SPI_BUS) {
- dhdsdio_read_control(bus, rxbuf, len,
- doff);
+ brcmf_sdbrcm_read_control(bus, rxbuf,
+ len, doff);
} else {
DHD_ERROR(("%s (nextlen): readahead on control" " packet %d?\n",
__func__, seq));
/* Force retry w/normal header read */
bus->nextlen = 0;
- dhdsdio_rxfail(bus, false, true);
+ brcmf_sdbrcm_rxfail(bus, false, true);
}
- dhdsdio_pktfree2(bus, pkt);
+ brcmf_sdbrcm_pktfree2(bus, pkt);
continue;
}
if ((doff < SDPCM_HDRLEN) || (doff > len)) {
DHD_ERROR(("%s (nextlen): bad data offset %d: HW len %d min %d\n",
__func__, doff, len, SDPCM_HDRLEN));
- dhdsdio_rxfail(bus, false, false);
- dhdsdio_pktfree2(bus, pkt);
+ brcmf_sdbrcm_rxfail(bus, false, false);
+ brcmf_sdbrcm_pktfree2(bus, pkt);
continue;
}
break;
/* Read frame header (hardware and software) */
- sdret = bcmsdh_recv_buf(sdh, bcmsdh_cur_sbwad(sdh),
+ sdret = brcmf_sdcard_recv_buf(sdh, brcmf_sdcard_cur_sbwad(sdh),
SDIO_FUNC_2, F2SYNC, bus->rxhdr, firstread,
NULL, NULL, NULL);
bus->f2rxhdrs++;
DHD_ERROR(("%s: RXHEADER FAILED: %d\n", __func__,
sdret));
bus->rx_hdrfail++;
- dhdsdio_rxfail(bus, true, true);
+ brcmf_sdbrcm_rxfail(bus, true, true);
continue;
}
#ifdef DHD_DEBUG
DHD_ERROR(("%s: HW hdr err: len/check 0x%04x/0x%04x\n",
__func__, len, check));
bus->rx_badhdr++;
- dhdsdio_rxfail(bus, false, false);
+ brcmf_sdbrcm_rxfail(bus, false, false);
continue;
}
__func__, doff, len, SDPCM_HDRLEN, seq));
bus->rx_badhdr++;
ASSERT(0);
- dhdsdio_rxfail(bus, false, false);
+ brcmf_sdbrcm_rxfail(bus, false, false);
continue;
}
/* Call a separate function for control frames */
if (chan == SDPCM_CONTROL_CHANNEL) {
- dhdsdio_read_control(bus, bus->rxhdr, len, doff);
+ brcmf_sdbrcm_read_control(bus, bus->rxhdr, len, doff);
continue;
}
__func__, len, rdlen));
bus->dhd->rx_errors++;
bus->rx_toolong++;
- dhdsdio_rxfail(bus, false, false);
+ brcmf_sdbrcm_rxfail(bus, false, false);
continue;
}
DHD_ERROR(("%s: brcmu_pkt_buf_get_skb failed: rdlen %d"
" chan %d\n", __func__, rdlen, chan));
bus->dhd->rx_dropped++;
- dhdsdio_rxfail(bus, false, RETRYCHAN(chan));
+ brcmf_sdbrcm_rxfail(bus, false, RETRYCHAN(chan));
continue;
}
PKTALIGN(pkt, rdlen, DHD_SDALIGN);
/* Read the remaining frame data */
- sdret = bcmsdh_recv_buf(sdh, bcmsdh_cur_sbwad(sdh), SDIO_FUNC_2,
- F2SYNC, ((u8 *) (pkt->data)), rdlen,
- pkt, NULL, NULL);
+ sdret = brcmf_sdcard_recv_buf(sdh, brcmf_sdcard_cur_sbwad(sdh),
+ SDIO_FUNC_2, F2SYNC, ((u8 *) (pkt->data)),
+ rdlen, pkt, NULL, NULL);
bus->f2rxdata++;
ASSERT(sdret != -BCME_PENDING);
sdret));
brcmu_pkt_buf_free_skb(pkt);
bus->dhd->rx_errors++;
- dhdsdio_rxfail(bus, true, RETRYCHAN(chan));
+ brcmf_sdbrcm_rxfail(bus, true, RETRYCHAN(chan));
continue;
}
} else {
DHD_ERROR(("%s: glom superframe w/o "
"descriptor!\n", __func__));
- dhdsdio_rxfail(bus, false, false);
+ brcmf_sdbrcm_rxfail(bus, false, false);
}
continue;
}
#ifdef SDTEST
/* Test channel packets are processed separately */
if (chan == SDPCM_TEST_CHANNEL) {
- dhdsdio_testrcv(bus, pkt, seq);
+ brcmf_sdbrcm_checkdied(bus, pkt, seq);
continue;
}
#endif /* SDTEST */
return rxcount;
}
-static u32 dhdsdio_hostmail(dhd_bus_t *bus)
+static u32 brcmf_sdbrcm_hostmail(dhd_bus_t *bus)
{
struct sdpcmd_regs *regs = bus->regs;
u32 intstatus = 0;
return intstatus;
}
-bool dhdsdio_dpc(dhd_bus_t *bus)
+bool brcmf_sdbrcm_dpc(dhd_bus_t *bus)
{
bcmsdh_info_t *sdh = bus->sdh;
struct sdpcmd_regs *regs = bus->regs;
#ifdef DHD_DEBUG
/* Check for inconsistent device control */
- devctl =
- bcmsdh_cfg_read(sdh, SDIO_FUNC_1, SBSDIO_DEVICE_CTL, &err);
+ devctl = brcmf_sdcard_cfg_read(sdh, SDIO_FUNC_1,
+ SBSDIO_DEVICE_CTL, &err);
if (err) {
DHD_ERROR(("%s: error reading DEVCTL: %d\n",
__func__, err));
#endif /* DHD_DEBUG */
/* Read CSR, if clock on switch to AVAIL, else ignore */
- clkctl =
- bcmsdh_cfg_read(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
- &err);
+ clkctl = brcmf_sdcard_cfg_read(sdh, SDIO_FUNC_1,
+ SBSDIO_FUNC1_CHIPCLKCSR, &err);
if (err) {
DHD_ERROR(("%s: error reading CSR: %d\n", __func__,
err));
clkctl));
if (SBSDIO_HTAV(clkctl)) {
- devctl =
- bcmsdh_cfg_read(sdh, SDIO_FUNC_1, SBSDIO_DEVICE_CTL,
- &err);
+ devctl = brcmf_sdcard_cfg_read(sdh, SDIO_FUNC_1,
+ SBSDIO_DEVICE_CTL, &err);
if (err) {
DHD_ERROR(("%s: error reading DEVCTL: %d\n",
__func__, err));
bus->dhd->busstate = DHD_BUS_DOWN;
}
devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
- bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_DEVICE_CTL,
- devctl, &err);
+ brcmf_sdcard_cfg_write(sdh, SDIO_FUNC_1,
+ SBSDIO_DEVICE_CTL, devctl, &err);
if (err) {
DHD_ERROR(("%s: error writing DEVCTL: %d\n",
__func__, err));
BUS_WAKE(bus);
/* Make sure backplane clock is on */
- dhdsdio_clkctl(bus, CLK_AVAIL, true);
+ brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, true);
if (bus->clkstate == CLK_PENDING)
goto clkwait;
bus->ipend = false;
R_SDREG(newstatus, ®s->intstatus, retries);
bus->f1regdata++;
- if (bcmsdh_regfail(bus->sdh))
+ if (brcmf_sdcard_regfail(bus->sdh))
newstatus = 0;
newstatus &= bus->hostintmask;
bus->fcstate = !!(newstatus & I_HMB_FC_STATE);
/* Handle host mailbox indication */
if (intstatus & I_HMB_HOST_INT) {
intstatus &= ~I_HMB_HOST_INT;
- intstatus |= dhdsdio_hostmail(bus);
+ intstatus |= brcmf_sdbrcm_hostmail(bus);
}
/* Generally don't ask for these, can get CRC errors... */
/* On frame indication, read available frames */
if (PKT_AVAILABLE()) {
- framecnt = dhdsdio_readframes(bus, rxlimit, &rxdone);
+ framecnt = brcmf_sdbrcm_readframes(bus, rxlimit, &rxdone);
if (rxdone || bus->rxskip)
intstatus &= ~I_HMB_FRAME_IND;
rxlimit -= min(framecnt, rxlimit);
clkwait:
#if defined(OOB_INTR_ONLY)
- bcmsdh_oob_intr_set(1);
+ brcmf_sdio_oob_intr_set(1);
#endif /* (OOB_INTR_ONLY) */
/* Re-enable interrupts to detect new device events (mailbox, rx frame)
* or clock availability. (Allows tx loop to check ipend if desired.)
* (Unless register access seems hosed, as we may not be able to ACK...)
*/
- if (bus->intr && bus->intdis && !bcmsdh_regfail(sdh)) {
+ if (bus->intr && bus->intdis && !brcmf_sdcard_regfail(sdh)) {
DHD_INTR(("%s: enable SDIO interrupts, rxdone %d framecnt %d\n",
__func__, rxdone, framecnt));
bus->intdis = false;
- bcmsdh_intr_enable(sdh);
+ brcmf_sdcard_intr_enable(sdh);
}
if (DATAOK(bus) && bus->ctrl_frame_stat &&
(bus->clkstate == CLK_AVAIL)) {
int ret, i;
- ret =
- dhd_bcmsdh_send_buf(bus, bcmsdh_cur_sbwad(sdh), SDIO_FUNC_2,
- F2SYNC, (u8 *) bus->ctrl_frame_buf,
- (u32) bus->ctrl_frame_len, NULL,
- NULL, NULL);
+ ret = brcmf_sdbrcm_send_buf(bus, brcmf_sdcard_cur_sbwad(sdh),
+ SDIO_FUNC_2, F2SYNC, (u8 *) bus->ctrl_frame_buf,
+ (u32) bus->ctrl_frame_len, NULL, NULL, NULL);
ASSERT(ret != -BCME_PENDING);
if (ret < 0) {
"terminate frame.\n", __func__, ret));
bus->tx_sderrs++;
- bcmsdh_abort(sdh, SDIO_FUNC_2);
+ brcmf_sdcard_abort(sdh, SDIO_FUNC_2);
- bcmsdh_cfg_write(sdh, SDIO_FUNC_1,
+ brcmf_sdcard_cfg_write(sdh, SDIO_FUNC_1,
SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM,
NULL);
bus->f1regdata++;
for (i = 0; i < 3; i++) {
u8 hi, lo;
- hi = bcmsdh_cfg_read(sdh, SDIO_FUNC_1,
+ hi = brcmf_sdcard_cfg_read(sdh, SDIO_FUNC_1,
SBSDIO_FUNC1_WFRAMEBCHI,
NULL);
- lo = bcmsdh_cfg_read(sdh, SDIO_FUNC_1,
+ lo = brcmf_sdcard_cfg_read(sdh, SDIO_FUNC_1,
SBSDIO_FUNC1_WFRAMEBCLO,
NULL);
bus->f1regdata += 2;
brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit
&& DATAOK(bus)) {
framecnt = rxdone ? txlimit : min(txlimit, dhd_txminmax);
- framecnt = dhdsdio_sendfromq(bus, framecnt);
+ framecnt = brcmf_sdbrcm_sendfromq(bus, framecnt);
txlimit -= framecnt;
}
else await next interrupt */
/* On failed register access, all bets are off:
no resched or interrupts */
- if ((bus->dhd->busstate == DHD_BUS_DOWN) || bcmsdh_regfail(sdh)) {
+ if ((bus->dhd->busstate == DHD_BUS_DOWN) || brcmf_sdcard_regfail(sdh)) {
DHD_ERROR(("%s: failed backplane access over SDIO, halting "
- "operation %d\n", __func__, bcmsdh_regfail(sdh)));
+ "operation %d\n", __func__, brcmf_sdcard_regfail(sdh)));
bus->dhd->busstate = DHD_BUS_DOWN;
bus->intstatus = 0;
} else if (bus->clkstate == CLK_PENDING) {
if ((bus->clkstate != CLK_PENDING)
&& bus->idletime == DHD_IDLE_IMMEDIATE) {
bus->activity = false;
- dhdsdio_clkctl(bus, CLK_NONE, false);
+ brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
}
dhd_os_sdunlock(bus->dhd);
bool resched;
/* Call the DPC directly. */
- DHD_TRACE(("Calling dhdsdio_dpc() from %s\n", __func__));
- resched = dhdsdio_dpc(bus);
+ DHD_TRACE(("Calling brcmf_sdbrcm_dpc() from %s\n", __func__));
+ resched = brcmf_sdbrcm_dpc(bus);
return resched;
}
-void dhdsdio_isr(void *arg)
+void brcmf_sdbrcm_isr(void *arg)
{
dhd_bus_t *bus = (dhd_bus_t *) arg;
bcmsdh_info_t *sdh;
if (bus->intr)
DHD_INTR(("%s: disable SDIO interrupts\n", __func__));
else
- DHD_ERROR(("dhdsdio_isr() w/o interrupt configured!\n"));
+ DHD_ERROR(("brcmf_sdbrcm_isr() w/o interrupt configured!\n"));
- bcmsdh_intr_disable(sdh);
+ brcmf_sdcard_intr_disable(sdh);
bus->intdis = true;
#if defined(SDIO_ISR_THREAD)
- DHD_TRACE(("Calling dhdsdio_dpc() from %s\n", __func__));
- while (dhdsdio_dpc(bus))
+ DHD_TRACE(("Calling brcmf_sdbrcm_dpc() from %s\n", __func__));
+ while (brcmf_sdbrcm_dpc(bus))
;
#else
bus->dpc_sched = true;
}
#ifdef SDTEST
-static void dhdsdio_pktgen_init(dhd_bus_t *bus)
+static void brcmf_sdbrcm_pktgen_init(dhd_bus_t *bus)
{
/* Default to specified length, or full range */
if (dhd_pktgen_len) {
bus->pktgen_stop = 1;
}
-static void dhdsdio_pktgen(dhd_bus_t *bus)
+static void brcmf_sdbrcm_pktgen(dhd_bus_t *bus)
{
struct sk_buff *pkt;
u8 *data;
/* For recv mode, just make sure dongle has started sending */
if (bus->pktgen_mode == DHD_PKTGEN_RECV) {
if (!bus->pktgen_rcvd)
- dhdsdio_sdtest_set(bus, true);
+ brcmf_sdbrcm_sdtest_set(bus, true);
return;
}
#ifdef DHD_DEBUG
if (DHD_BYTES_ON() && DHD_DATA_ON()) {
data = (u8 *) (pkt->data) + SDPCM_HDRLEN;
- printk(KERN_DEBUG "dhdsdio_pktgen: Tx Data:\n");
+ printk(KERN_DEBUG "brcmf_sdbrcm_pktgen: Tx Data:\n");
print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, data,
pkt->len - SDPCM_HDRLEN);
}
#endif
/* Send it */
- if (dhdsdio_txpkt(bus, pkt, SDPCM_TEST_CHANNEL, true)) {
+ if (brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_TEST_CHANNEL, true)) {
bus->pktgen_fail++;
if (bus->pktgen_stop
&& bus->pktgen_stop == bus->pktgen_fail)
}
}
-static void dhdsdio_sdtest_set(dhd_bus_t *bus, bool start)
+static void brcmf_sdbrcm_sdtest_set(dhd_bus_t *bus, bool start)
{
struct sk_buff *pkt;
u8 *data;
*data++ = (bus->pktgen_maxlen >> 8);
/* Send it */
- if (dhdsdio_txpkt(bus, pkt, SDPCM_TEST_CHANNEL, true))
+ if (brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_TEST_CHANNEL, true))
bus->pktgen_fail++;
}
-static void dhdsdio_testrcv(dhd_bus_t *bus, struct sk_buff *pkt, uint seq)
+static void
+brcmf_sdbrcm_checkdied(dhd_bus_t *bus, struct sk_buff *pkt, uint seq)
{
u8 *data;
uint pktlen;
/* Check for min length */
pktlen = pkt->len;
if (pktlen < SDPCM_TEST_HDRLEN) {
- DHD_ERROR(("dhdsdio_restrcv: toss runt frame, pktlen %d\n",
- pktlen));
+ DHD_ERROR(("brcmf_sdbrcm_checkdied: toss runt frame, pktlen "
+ "%d\n", pktlen));
brcmu_pkt_buf_free_skb(pkt, false);
return;
}
if (cmd == SDPCM_TEST_DISCARD || cmd == SDPCM_TEST_ECHOREQ
|| cmd == SDPCM_TEST_ECHORSP) {
if (pktlen != len + SDPCM_TEST_HDRLEN) {
- DHD_ERROR(("dhdsdio_testrcv: frame length mismatch, "
- "pktlen %d seq %d" " cmd %d extra %d len %d\n",
+ DHD_ERROR(("brcmf_sdbrcm_checkdied: frame length "
+ "mismatch, pktlen %d seq %d" " cmd %d extra %d "
+ "len %d\n",
pktlen, seq, cmd, extra, len));
brcmu_pkt_buf_free_skb(pkt, false);
return;
/* Rx->Tx turnaround ok (even on NDIS w/current
implementation) */
*(u8 *) (pkt->data) = SDPCM_TEST_ECHORSP;
- if (dhdsdio_txpkt(bus, pkt, SDPCM_TEST_CHANNEL, true) == 0) {
+ if (brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_TEST_CHANNEL, true) == 0)
bus->pktgen_sent++;
- } else {
+ else {
bus->pktgen_fail++;
brcmu_pkt_buf_free_skb(pkt, false);
}
for (offset = 0; offset < len; offset++, data++) {
if (*data != SDPCM_TEST_FILL(offset, extra)) {
- DHD_ERROR(("dhdsdio_testrcv: echo data mismatch: " "offset %d (len %d) expect 0x%02x rcvd 0x%02x\n",
- offset, len,
- SDPCM_TEST_FILL(offset, extra), *data));
+ DHD_ERROR(("brcmf_sdbrcm_checkdied: echo data "
+ "mismatch: " "offset %d (len %d) "
+ "expect 0x%02x rcvd 0x%02x\n",
+ offset, len,
+ SDPCM_TEST_FILL(offset, extra),
+ *data));
break;
}
}
case SDPCM_TEST_BURST:
case SDPCM_TEST_SEND:
default:
- DHD_INFO(("dhdsdio_testrcv: unsupported or unknown command, "
- "pktlen %d seq %d" " cmd %d extra %d len %d\n",
+ DHD_INFO(("brcmf_sdbrcm_checkdied: unsupported or unknown "
+ "command, pktlen %d seq %d" " cmd %d extra %d len %d\n",
pktlen, seq, cmd, extra, len));
brcmu_pkt_buf_free_skb(pkt, false);
break;
if (bus->pktgen_total
&& (bus->pktgen_rcvd >= bus->pktgen_total)) {
bus->pktgen_count = 0;
- dhdsdio_sdtest_set(bus, false);
+ brcmf_sdbrcm_sdtest_set(bus, false);
}
}
}
#endif /* SDTEST */
-extern bool dhd_bus_watchdog(dhd_pub_t *dhdp)
+extern bool brcmf_sdbrcm_bus_watchdog(dhd_pub_t *dhdp)
{
dhd_bus_t *bus;
if (!bus->dpc_sched) {
u8 devpend;
- devpend = bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_0,
- SDIO_CCCR_INTx,
- NULL);
+ devpend = brcmf_sdcard_cfg_read(bus->sdh,
+ SDIO_FUNC_0, SDIO_CCCR_INTx,
+ NULL);
intstatus =
devpend & (INTR_STATUS_FUNC1 |
INTR_STATUS_FUNC2);
bus->pollcnt++;
bus->ipend = true;
if (bus->intr)
- bcmsdh_intr_disable(bus->sdh);
+ brcmf_sdcard_intr_disable(bus->sdh);
bus->dpc_sched = true;
dhd_sched_dpc(bus->dhd);
if (bus->console.count >= dhd_console_ms) {
bus->console.count -= dhd_console_ms;
/* Make sure backplane clock is on */
- dhdsdio_clkctl(bus, CLK_AVAIL, false);
- if (dhdsdio_readconsole(bus) < 0)
+ brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
+ if (brcmf_sdbrcm_readconsole(bus) < 0)
dhd_console_ms = 0; /* On error,
stop trying */
}
/* Generate packets if configured */
if (bus->pktgen_count && (++bus->pktgen_tick >= bus->pktgen_freq)) {
/* Make sure backplane clock is on */
- dhdsdio_clkctl(bus, CLK_AVAIL, false);
+ brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
bus->pktgen_tick = 0;
- dhdsdio_pktgen(bus);
+ brcmf_sdbrcm_pktgen(bus);
}
#endif
bus->activity = false;
dhd_os_wd_timer(bus->dhd, dhd_watchdog_ms);
} else {
- dhdsdio_clkctl(bus, CLK_NONE, false);
+ brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
}
}
}
}
#ifdef DHD_DEBUG
-extern int dhd_bus_console_in(dhd_pub_t *dhdp, unsigned char *msg, uint msglen)
+extern int brcmf_sdbrcm_bus_console_in(dhd_pub_t *dhdp, unsigned char *msg,
+ uint msglen)
{
dhd_bus_t *bus = dhdp->bus;
u32 addr, val;
/* Request clock to allow SDIO accesses */
BUS_WAKE(bus);
/* No pend allowed since txpkt is called later, ht clk has to be on */
- dhdsdio_clkctl(bus, CLK_AVAIL, false);
+ brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
/* Zero cbuf_index */
addr = bus->console_addr + offsetof(rte_cons_t, cbuf_idx);
val = cpu_to_le32(0);
- rv = dhdsdio_membytes(bus, true, addr, (u8 *)&val, sizeof(val));
+ rv = brcmf_sdbrcm_membytes(bus, true, addr, (u8 *)&val, sizeof(val));
if (rv < 0)
goto done;
/* Write message into cbuf */
addr = bus->console_addr + offsetof(rte_cons_t, cbuf);
- rv = dhdsdio_membytes(bus, true, addr, (u8 *)msg, msglen);
+ rv = brcmf_sdbrcm_membytes(bus, true, addr, (u8 *)msg, msglen);
if (rv < 0)
goto done;
/* Write length into vcons_in */
addr = bus->console_addr + offsetof(rte_cons_t, vcons_in);
val = cpu_to_le32(msglen);
- rv = dhdsdio_membytes(bus, true, addr, (u8 *)&val, sizeof(val));
+ rv = brcmf_sdbrcm_membytes(bus, true, addr, (u8 *)&val, sizeof(val));
if (rv < 0)
goto done;
*/
pkt = brcmu_pkt_buf_get_skb(4 + SDPCM_RESERVE);
if ((pkt != NULL) && bus->clkstate == CLK_AVAIL)
- dhdsdio_txpkt(bus, pkt, SDPCM_EVENT_CHANNEL, true);
+ brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_EVENT_CHANNEL, true);
done:
if ((bus->idletime == DHD_IDLE_IMMEDIATE) && !bus->dpc_sched) {
bus->activity = false;
- dhdsdio_clkctl(bus, CLK_NONE, true);
+ brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
}
dhd_os_sdunlock(bus->dhd);
}
#endif /* DHD_DEBUG */
-static bool dhdsdio_chipmatch(u16 chipid)
+static bool brcmf_sdbrcm_chipmatch(u16 chipid)
{
if (chipid == BCM4325_CHIP_ID)
return true;
return false;
}
-static void *dhdsdio_probe(u16 venid, u16 devid, u16 bus_no,
+static void *brcmf_sdbrcm_probe(u16 venid, u16 devid, u16 bus_no,
u16 slot, u16 func, uint bustype, void *regsva,
void *sdh)
{
else use locally malloced rxbuf */
/* attempt to attach to the dongle */
- if (!(dhdsdio_probe_attach(bus, sdh, regsva, devid))) {
- DHD_ERROR(("%s: dhdsdio_probe_attach failed\n", __func__));
+ if (!(brcmf_sdbrcm_probe_attach(bus, sdh, regsva, devid))) {
+ DHD_ERROR(("%s: brcmf_sdbrcm_probe_attach failed\n", __func__));
goto fail;
}
}
/* Allocate buffers */
- if (!(dhdsdio_probe_malloc(bus, sdh))) {
- DHD_ERROR(("%s: dhdsdio_probe_malloc failed\n", __func__));
+ if (!(brcmf_sdbrcm_probe_malloc(bus, sdh))) {
+ DHD_ERROR(("%s: brcmf_sdbrcm_probe_malloc failed\n", __func__));
goto fail;
}
- if (!(dhdsdio_probe_init(bus, sdh))) {
- DHD_ERROR(("%s: dhdsdio_probe_init failed\n", __func__));
+ if (!(brcmf_sdbrcm_probe_init(bus, sdh))) {
+ DHD_ERROR(("%s: brcmf_sdbrcm_probe_init failed\n", __func__));
goto fail;
}
/* Register interrupt callback, but mask it (not operational yet). */
DHD_INTR(("%s: disable SDIO interrupts (not interested yet)\n",
__func__));
- bcmsdh_intr_disable(sdh);
- ret = bcmsdh_intr_reg(sdh, dhdsdio_isr, bus);
+ brcmf_sdcard_intr_disable(sdh);
+ ret = brcmf_sdcard_intr_reg(sdh, brcmf_sdbrcm_isr, bus);
if (ret != 0) {
DHD_ERROR(("%s: FAILED: bcmsdh_intr_reg returned %d\n",
__func__, ret));
return bus;
fail:
- dhdsdio_release(bus);
+ brcmf_sdbrcm_release(bus);
return NULL;
}
static bool
-dhdsdio_probe_attach(struct dhd_bus *bus, void *sdh, void *regsva, u16 devid)
+brcmf_sdbrcm_probe_attach(struct dhd_bus *bus, void *sdh, void *regsva,
+ u16 devid)
{
u8 clkctl = 0;
int err = 0;
bus->alp_only = true;
/* Return the window to backplane enumeration space for core access */
- if (dhdsdio_set_siaddr_window(bus, SI_ENUM_BASE))
+ if (brcmf_sdbrcm_set_siaddr_window(bus, SI_ENUM_BASE))
DHD_ERROR(("%s: FAILED to return to SI_ENUM_BASE\n", __func__));
#ifdef DHD_DEBUG
printk(KERN_DEBUG "F1 signature read @0x18000000=0x%4x\n",
- bcmsdh_reg_read(bus->sdh, SI_ENUM_BASE, 4));
+ brcmf_sdcard_reg_read(bus->sdh, SI_ENUM_BASE, 4));
#endif /* DHD_DEBUG */
/*
- * Force PLL off until dhdsdio_chip_attach()
+ * Force PLL off until brcmf_sdbrcm_chip_attach()
* programs PLL control regs
*/
- bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
+ brcmf_sdcard_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
DHD_INIT_CLKCTL1, &err);
if (!err)
clkctl =
- bcmsdh_cfg_read(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
- &err);
+ brcmf_sdcard_cfg_read(sdh, SDIO_FUNC_1,
+ SBSDIO_FUNC1_CHIPCLKCSR, &err);
if (err || ((clkctl & ~SBSDIO_AVBITS) != DHD_INIT_CLKCTL1)) {
- DHD_ERROR(("dhdsdio_probe: ChipClkCSR access: err %d wrote "
- "0x%02x read 0x%02x\n",
+ DHD_ERROR(("brcmf_sdbrcm_probe: ChipClkCSR access: err %d wrote"
+ " 0x%02x read 0x%02x\n",
err, DHD_INIT_CLKCTL1, clkctl));
goto fail;
}
- if (dhdsdio_chip_attach(bus, regsva)) {
- DHD_ERROR(("%s: dhdsdio_chip_attach failed!\n", __func__));
+ if (brcmf_sdbrcm_chip_attach(bus, regsva)) {
+ DHD_ERROR(("%s: brcmf_sdbrcm_chip_attach failed!\n", __func__));
goto fail;
}
- bcmsdh_chipinfo(sdh, bus->ci->chip, bus->ci->chiprev);
+ brcmf_sdcard_chipinfo(sdh, bus->ci->chip, bus->ci->chiprev);
- if (!dhdsdio_chipmatch((u16) bus->ci->chip)) {
+ if (!brcmf_sdbrcm_chipmatch((u16) bus->ci->chip)) {
DHD_ERROR(("%s: unsupported chip: 0x%04x\n",
__func__, bus->ci->chip));
goto fail;
}
- dhdsdio_sdiod_drive_strength_init(bus, dhd_sdiod_drive_strength);
+ brcmf_sdbrcm_sdiod_drive_strength_init(bus, dhd_sdiod_drive_strength);
/* Get info on the ARM and SOCRAM cores... */
if (!DHD_NOPMU(bus)) {
- bus->armrev = SBCOREREV(bcmsdh_reg_read(bus->sdh,
+ bus->armrev = SBCOREREV(brcmf_sdcard_reg_read(bus->sdh,
CORE_SB(bus->ci->armcorebase, sbidhigh), 4));
bus->orig_ramsize = bus->ci->ramsize;
if (!(bus->orig_ramsize)) {
}
bus->ramsize = bus->orig_ramsize;
if (dhd_dongle_memsize)
- dhd_dongle_setmemsize(bus, dhd_dongle_memsize);
+ brcmf_sdbrcm_setmemsize(bus, dhd_dongle_memsize);
DHD_ERROR(("DHD: dongle ram size is set to %d(orig %d)\n",
bus->ramsize, bus->orig_ramsize));
return false;
}
-static bool dhdsdio_probe_malloc(dhd_bus_t *bus, void *sdh)
+static bool brcmf_sdbrcm_probe_malloc(dhd_bus_t *bus, void *sdh)
{
DHD_TRACE(("%s: Enter\n", __func__));
return false;
}
-static bool dhdsdio_probe_init(dhd_bus_t *bus, void *sdh)
+static bool brcmf_sdbrcm_probe_init(dhd_bus_t *bus, void *sdh)
{
s32 fnum;
DHD_TRACE(("%s: Enter\n", __func__));
#ifdef SDTEST
- dhdsdio_pktgen_init(bus);
+ brcmf_sdbrcm_pktgen_init(bus);
#endif /* SDTEST */
/* Disable F2 to clear any intermediate frame state on the dongle */
- bcmsdh_cfg_write(sdh, SDIO_FUNC_0, SDIO_CCCR_IOEx, SDIO_FUNC_ENABLE_1,
- NULL);
+ brcmf_sdcard_cfg_write(sdh, SDIO_FUNC_0, SDIO_CCCR_IOEx,
+ SDIO_FUNC_ENABLE_1, NULL);
bus->dhd->busstate = DHD_BUS_DOWN;
bus->sleeping = false;
bus->prev_rxlim_hit = 0;
/* Done with backplane-dependent accesses, can drop clock... */
- bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
+ brcmf_sdcard_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, 0,
+ NULL);
/* ...and initialize clock/power states */
bus->clkstate = CLK_SDONLY;
/* Query the F2 block size, set roundup accordingly */
fnum = 2;
- if (bcmsdh_iovar_op(sdh, "sd_blocksize", &fnum, sizeof(s32),
+ if (brcmf_sdcard_iovar_op(sdh, "sd_blocksize", &fnum, sizeof(s32),
&bus->blocksize, sizeof(s32), false) != 0) {
bus->blocksize = 0;
DHD_ERROR(("%s: fail on %s get\n", __func__, "sd_blocksize"));
/* Query if bus module supports packet chaining,
default to use if supported */
- if (bcmsdh_iovar_op(sdh, "sd_rxchain", NULL, 0,
+ if (brcmf_sdcard_iovar_op(sdh, "sd_rxchain", NULL, 0,
&bus->sd_rxchain, sizeof(s32),
false) != 0) {
bus->sd_rxchain = false;
bus->fw_path = fw_path;
bus->nv_path = nv_path;
- ret = dhdsdio_download_firmware(bus, bus->sdh);
+ ret = brcmf_sdbrcm_download_firmware(bus, bus->sdh);
return ret;
}
static bool
-dhdsdio_download_firmware(struct dhd_bus *bus, void *sdh)
+brcmf_sdbrcm_download_firmware(struct dhd_bus *bus, void *sdh)
{
bool ret;
/* Download the firmware */
- dhdsdio_clkctl(bus, CLK_AVAIL, false);
+ brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
- ret = _dhdsdio_download_firmware(bus) == 0;
+ ret = _brcmf_sdbrcm_download_firmware(bus) == 0;
- dhdsdio_clkctl(bus, CLK_SDONLY, false);
+ brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
return ret;
}
/* Detach and free everything */
-static void dhdsdio_release(dhd_bus_t *bus)
+static void brcmf_sdbrcm_release(dhd_bus_t *bus)
{
DHD_TRACE(("%s: Enter\n", __func__));
if (bus) {
/* De-register interrupt handler */
- bcmsdh_intr_disable(bus->sdh);
- bcmsdh_intr_dereg(bus->sdh);
+ brcmf_sdcard_intr_disable(bus->sdh);
+ brcmf_sdcard_intr_dereg(bus->sdh);
if (bus->dhd) {
dhd_detach(bus->dhd);
- dhdsdio_release_dongle(bus);
+ brcmf_sdbrcm_release_dongle(bus);
bus->dhd = NULL;
}
- dhdsdio_release_malloc(bus);
+ brcmf_sdbrcm_release_malloc(bus);
kfree(bus);
}
DHD_TRACE(("%s: Disconnected\n", __func__));
}
-static void dhdsdio_release_malloc(dhd_bus_t *bus)
+static void brcmf_sdbrcm_release_malloc(dhd_bus_t *bus)
{
DHD_TRACE(("%s: Enter\n", __func__));
bus->databuf = NULL;
}
-static void dhdsdio_release_dongle(dhd_bus_t *bus)
+static void brcmf_sdbrcm_release_dongle(dhd_bus_t *bus)
{
DHD_TRACE(("%s: Enter\n", __func__));
return;
if (bus->ci) {
- dhdsdio_clkctl(bus, CLK_AVAIL, false);
- dhdsdio_clkctl(bus, CLK_NONE, false);
- dhdsdio_chip_detach(bus);
+ brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
+ brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
+ brcmf_sdbrcm_chip_detach(bus);
if (bus->vars && bus->varsz)
kfree(bus->vars);
bus->vars = NULL;
DHD_TRACE(("%s: Disconnected\n", __func__));
}
-static void dhdsdio_disconnect(void *ptr)
+static void brcmf_sdbrcm_disconnect(void *ptr)
{
dhd_bus_t *bus = (dhd_bus_t *)ptr;
if (bus) {
ASSERT(bus->dhd);
- dhdsdio_release(bus);
+ brcmf_sdbrcm_release(bus);
}
DHD_TRACE(("%s: Disconnected\n", __func__));
*/
static bcmsdh_driver_t dhd_sdio = {
- dhdsdio_probe,
- dhdsdio_disconnect
+ brcmf_sdbrcm_probe,
+ brcmf_sdbrcm_disconnect
};
int dhd_bus_register(void)
{
DHD_TRACE(("%s: Enter\n", __func__));
- return bcmsdh_register(&dhd_sdio);
+ return brcmf_sdio_register(&dhd_sdio);
}
void dhd_bus_unregister(void)
{
DHD_TRACE(("%s: Enter\n", __func__));
- bcmsdh_unregister();
+ brcmf_sdio_unregister();
}
-static int dhdsdio_download_code_file(struct dhd_bus *bus, char *fw_path)
+static int brcmf_sdbrcm_download_code_file(struct dhd_bus *bus, char *fw_path)
{
int bcmerror = -1;
int offset = 0;
/* Download image */
while ((len =
dhd_os_get_image_block((char *)memptr, MEMBLOCK, image))) {
- bcmerror = dhdsdio_membytes(bus, true, offset, memptr, len);
+ bcmerror = brcmf_sdbrcm_membytes(bus, true, offset, memptr,
+ len);
if (bcmerror) {
DHD_ERROR(("%s: error %d on writing %d membytes at "
"0x%08x\n", __func__, bcmerror, MEMBLOCK, offset));
* by two NULs.
*/
-static uint process_nvram_vars(char *varbuf, uint len)
+static uint brcmf_process_nvram_vars(char *varbuf, uint len)
{
char *dp;
bool findNewline;
bus->nvram_params = nvram_params;
}
-static int dhdsdio_download_nvram(struct dhd_bus *bus)
+static int brcmf_sdbrcm_download_nvram(struct dhd_bus *bus)
{
int bcmerror = -1;
uint len;
if (len > 0 && len < MEMBLOCK) {
bufp = (char *)memblock;
bufp[len] = 0;
- len = process_nvram_vars(bufp, len);
+ len = brcmf_process_nvram_vars(bufp, len);
bufp += len;
*bufp++ = 0;
if (len)
- bcmerror = dhdsdio_downloadvars(bus, memblock, len + 1);
+ bcmerror = brcmf_sdbrcm_downloadvars(bus, memblock,
+ len + 1);
if (bcmerror) {
DHD_ERROR(("%s: error downloading vars: %d\n",
__func__, bcmerror));
return bcmerror;
}
-static int _dhdsdio_download_firmware(struct dhd_bus *bus)
+static int _brcmf_sdbrcm_download_firmware(struct dhd_bus *bus)
{
int bcmerror = -1;
return bcmerror;
/* Keep arm in reset */
- if (dhdsdio_download_state(bus, true)) {
+ if (brcmf_sdbrcm_download_state(bus, true)) {
DHD_ERROR(("%s: error placing ARM core in reset\n", __func__));
goto err;
}
/* External image takes precedence if specified */
if ((bus->fw_path != NULL) && (bus->fw_path[0] != '\0')) {
- if (dhdsdio_download_code_file(bus, bus->fw_path)) {
+ if (brcmf_sdbrcm_download_code_file(bus, bus->fw_path)) {
DHD_ERROR(("%s: dongle image file download failed\n",
__func__));
goto err;
/* dhd_bus_set_nvram_params(bus, (char *)&nvram_array); */
/* External nvram takes precedence if specified */
- if (dhdsdio_download_nvram(bus)) {
+ if (brcmf_sdbrcm_download_nvram(bus)) {
DHD_ERROR(("%s: dongle nvram file download failed\n",
__func__));
}
/* Take arm out of reset */
- if (dhdsdio_download_state(bus, false)) {
+ if (brcmf_sdbrcm_download_state(bus, false)) {
DHD_ERROR(("%s: error getting out of ARM core reset\n",
__func__));
goto err;
static int
-dhd_bcmsdh_send_buf(dhd_bus_t *bus, u32 addr, uint fn, uint flags,
+brcmf_sdbrcm_send_buf(dhd_bus_t *bus, u32 addr, uint fn, uint flags,
u8 *buf, uint nbytes, struct sk_buff *pkt,
bcmsdh_cmplt_fn_t complete, void *handle)
{
- return bcmsdh_send_buf
+ return brcmf_sdcard_send_buf
(bus->sdh, addr, fn, flags, buf, nbytes, pkt, complete,
handle);
}
/* Expect app to have torn down any
connection before calling */
/* Stop the bus, disable F2 */
- dhd_bus_stop(bus, false);
+ brcmf_sdbrcm_bus_stop(bus, false);
/* Clean tx/rx buffer pointers,
detach from the dongle */
- dhdsdio_release_dongle(bus);
+ brcmf_sdbrcm_release_dongle(bus);
bus->dhd->dongle_reset = true;
bus->dhd->up = false;
if (bus->dhd->dongle_reset) {
/* Turn on WLAN */
/* Reset SD client */
- bcmsdh_reset(bus->sdh);
+ brcmf_sdcard_reset(bus->sdh);
/* Attempt to re-attach & download */
- if (dhdsdio_probe_attach(bus, bus->sdh,
+ if (brcmf_sdbrcm_probe_attach(bus, bus->sdh,
(u32 *) SI_ENUM_BASE,
bus->cl_devid)) {
/* Attempt to download binary to the dongle */
- if (dhdsdio_probe_init
+ if (brcmf_sdbrcm_probe_init
(bus, bus->sdh)
- && dhdsdio_download_firmware(bus,
+ && brcmf_sdbrcm_download_firmware(bus,
bus->sdh)) {
/* Re-init bus, enable F2 transfer */
- dhd_bus_init((dhd_pub_t *) bus->dhd,
- false);
+ brcmf_sdbrcm_bus_init(
+ (dhd_pub_t *) bus->dhd, false);
#if defined(OOB_INTR_ONLY)
- dhd_enable_oob_intr(bus, true);
+ brcmf_sdbrcm_enable_oob_intr(bus, true);
#endif /* defined(OOB_INTR_ONLY) */
bus->dhd->dongle_reset = false;
}
static int
-dhdsdio_chip_recognition(bcmsdh_info_t *sdh, struct chip_info *ci, void *regs)
+brcmf_sdbrcm_chip_recognition(bcmsdh_info_t *sdh, struct chip_info *ci,
+ void *regs)
{
u32 regdata;
* other ways of recognition should be added here.
*/
ci->cccorebase = (u32)regs;
- regdata = bcmsdh_reg_read(sdh, CORE_CC_REG(ci->cccorebase, chipid), 4);
+ regdata = brcmf_sdcard_reg_read(sdh,
+ CORE_CC_REG(ci->cccorebase, chipid), 4);
ci->chip = regdata & CID_ID_MASK;
ci->chiprev = (regdata & CID_REV_MASK) >> CID_REV_SHIFT;
return -ENODEV;
}
- regdata = bcmsdh_reg_read(sdh,
+ regdata = brcmf_sdcard_reg_read(sdh,
CORE_SB(ci->cccorebase, sbidhigh), 4);
ci->ccrev = SBCOREREV(regdata);
- regdata = bcmsdh_reg_read(sdh,
+ regdata = brcmf_sdcard_reg_read(sdh,
CORE_CC_REG(ci->cccorebase, pmucapabilities), 4);
ci->pmurev = regdata & PCAP_REV_MASK;
- regdata = bcmsdh_reg_read(sdh, CORE_SB(ci->buscorebase, sbidhigh), 4);
+ regdata = brcmf_sdcard_reg_read(sdh,
+ CORE_SB(ci->buscorebase, sbidhigh), 4);
ci->buscorerev = SBCOREREV(regdata);
ci->buscoretype = (regdata & SBIDH_CC_MASK) >> SBIDH_CC_SHIFT;
ci->buscorerev, ci->buscoretype));
/* get chipcommon capabilites */
- ci->cccaps = bcmsdh_reg_read(sdh,
+ ci->cccaps = brcmf_sdcard_reg_read(sdh,
CORE_CC_REG(ci->cccorebase, capabilities), 4);
return 0;
}
static void
-dhdsdio_chip_disablecore(bcmsdh_info_t *sdh, u32 corebase)
+brcmf_sdbrcm_chip_disablecore(bcmsdh_info_t *sdh, u32 corebase)
{
u32 regdata;
- regdata = bcmsdh_reg_read(sdh,
+ regdata = brcmf_sdcard_reg_read(sdh,
CORE_SB(corebase, sbtmstatelow), 4);
if (regdata & SBTML_RESET)
return;
- regdata = bcmsdh_reg_read(sdh,
+ regdata = brcmf_sdcard_reg_read(sdh,
CORE_SB(corebase, sbtmstatelow), 4);
if ((regdata & (SICF_CLOCK_EN << SBTML_SICF_SHIFT)) != 0) {
/*
* set target reject and spin until busy is clear
* (preserve core-specific bits)
*/
- regdata = bcmsdh_reg_read(sdh,
+ regdata = brcmf_sdcard_reg_read(sdh,
CORE_SB(corebase, sbtmstatelow), 4);
- bcmsdh_reg_write(sdh, CORE_SB(corebase, sbtmstatelow), 4,
+ brcmf_sdcard_reg_write(sdh, CORE_SB(corebase, sbtmstatelow), 4,
regdata | SBTML_REJ);
- regdata = bcmsdh_reg_read(sdh,
+ regdata = brcmf_sdcard_reg_read(sdh,
CORE_SB(corebase, sbtmstatelow), 4);
udelay(1);
- SPINWAIT((bcmsdh_reg_read(sdh,
+ SPINWAIT((brcmf_sdcard_reg_read(sdh,
CORE_SB(corebase, sbtmstatehigh), 4) &
SBTMH_BUSY), 100000);
- regdata = bcmsdh_reg_read(sdh,
+ regdata = brcmf_sdcard_reg_read(sdh,
CORE_SB(corebase, sbtmstatehigh), 4);
if (regdata & SBTMH_BUSY)
DHD_ERROR(("%s: ARM core still busy\n", __func__));
- regdata = bcmsdh_reg_read(sdh,
+ regdata = brcmf_sdcard_reg_read(sdh,
CORE_SB(corebase, sbidlow), 4);
if (regdata & SBIDL_INIT) {
- regdata = bcmsdh_reg_read(sdh,
+ regdata = brcmf_sdcard_reg_read(sdh,
CORE_SB(corebase, sbimstate), 4) |
SBIM_RJ;
- bcmsdh_reg_write(sdh,
+ brcmf_sdcard_reg_write(sdh,
CORE_SB(corebase, sbimstate), 4,
regdata);
- regdata = bcmsdh_reg_read(sdh,
+ regdata = brcmf_sdcard_reg_read(sdh,
CORE_SB(corebase, sbimstate), 4);
udelay(1);
- SPINWAIT((bcmsdh_reg_read(sdh,
+ SPINWAIT((brcmf_sdcard_reg_read(sdh,
CORE_SB(corebase, sbimstate), 4) &
SBIM_BY), 100000);
}
/* set reset and reject while enabling the clocks */
- bcmsdh_reg_write(sdh,
+ brcmf_sdcard_reg_write(sdh,
CORE_SB(corebase, sbtmstatelow), 4,
(((SICF_FGC | SICF_CLOCK_EN) << SBTML_SICF_SHIFT) |
SBTML_REJ | SBTML_RESET));
- regdata = bcmsdh_reg_read(sdh,
+ regdata = brcmf_sdcard_reg_read(sdh,
CORE_SB(corebase, sbtmstatelow), 4);
udelay(10);
/* clear the initiator reject bit */
- regdata = bcmsdh_reg_read(sdh,
+ regdata = brcmf_sdcard_reg_read(sdh,
CORE_SB(corebase, sbidlow), 4);
if (regdata & SBIDL_INIT) {
- regdata = bcmsdh_reg_read(sdh,
+ regdata = brcmf_sdcard_reg_read(sdh,
CORE_SB(corebase, sbimstate), 4) &
~SBIM_RJ;
- bcmsdh_reg_write(sdh,
+ brcmf_sdcard_reg_write(sdh,
CORE_SB(corebase, sbimstate), 4,
regdata);
}
}
/* leave reset and reject asserted */
- bcmsdh_reg_write(sdh, CORE_SB(corebase, sbtmstatelow), 4,
+ brcmf_sdcard_reg_write(sdh, CORE_SB(corebase, sbtmstatelow), 4,
(SBTML_REJ | SBTML_RESET));
udelay(1);
}
static int
-dhdsdio_chip_attach(struct dhd_bus *bus, void *regs)
+brcmf_sdbrcm_chip_attach(struct dhd_bus *bus, void *regs)
{
struct chip_info *ci;
int err;
/* bus/core/clk setup for register access */
/* Try forcing SDIO core to do ALPAvail request only */
clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_ALP_AVAIL_REQ;
- bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
+ brcmf_sdcard_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
clkset, &err);
if (err) {
DHD_ERROR(("%s: error writing for HT off\n", __func__));
/* If register supported, wait for ALPAvail and then force ALP */
/* This may take up to 15 milliseconds */
- clkval = bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_1,
+ clkval = brcmf_sdcard_cfg_read(bus->sdh, SDIO_FUNC_1,
SBSDIO_FUNC1_CHIPCLKCSR, NULL);
if ((clkval & ~SBSDIO_AVBITS) == clkset) {
SPINWAIT(((clkval =
- bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_1,
+ brcmf_sdcard_cfg_read(bus->sdh, SDIO_FUNC_1,
SBSDIO_FUNC1_CHIPCLKCSR,
NULL)),
!SBSDIO_ALPAV(clkval)),
}
clkset = SBSDIO_FORCE_HW_CLKREQ_OFF |
SBSDIO_FORCE_ALP;
- bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1,
+ brcmf_sdcard_cfg_write(bus->sdh, SDIO_FUNC_1,
SBSDIO_FUNC1_CHIPCLKCSR,
clkset, &err);
udelay(65);
}
/* Also, disable the extra SDIO pull-ups */
- bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_SDIOPULLUP, 0,
- NULL);
+ brcmf_sdcard_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_SDIOPULLUP,
+ 0, NULL);
- err = dhdsdio_chip_recognition(bus->sdh, ci, regs);
+ err = brcmf_sdbrcm_chip_recognition(bus->sdh, ci, regs);
if (err)
goto fail;
* Make sure any on-chip ARM is off (in case strapping is wrong),
* or downloaded code was already running.
*/
- dhdsdio_chip_disablecore(bus->sdh, ci->armcorebase);
+ brcmf_sdbrcm_chip_disablecore(bus->sdh, ci->armcorebase);
- bcmsdh_reg_write(bus->sdh,
+ brcmf_sdcard_reg_write(bus->sdh,
CORE_CC_REG(ci->cccorebase, gpiopullup), 4, 0);
- bcmsdh_reg_write(bus->sdh,
+ brcmf_sdcard_reg_write(bus->sdh,
CORE_CC_REG(ci->cccorebase, gpiopulldown), 4, 0);
/* Disable F2 to clear any intermediate frame state on the dongle */
- bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_0, SDIO_CCCR_IOEx,
+ brcmf_sdcard_cfg_write(bus->sdh, SDIO_FUNC_0, SDIO_CCCR_IOEx,
SDIO_FUNC_ENABLE_1, NULL);
/* WAR: cmd52 backplane read so core HW will drop ALPReq */
- clkval = bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_1,
+ clkval = brcmf_sdcard_cfg_read(bus->sdh, SDIO_FUNC_1,
0, NULL);
/* Done with backplane-dependent accesses, can drop clock... */
- bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, 0,
- NULL);
+ brcmf_sdcard_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
+ 0, NULL);
bus->ci = ci;
return 0;
}
static void
-dhdsdio_chip_resetcore(bcmsdh_info_t *sdh, u32 corebase)
+brcmf_sdbrcm_chip_resetcore(bcmsdh_info_t *sdh, u32 corebase)
{
u32 regdata;
* Must do the disable sequence first to work for
* arbitrary current core state.
*/
- dhdsdio_chip_disablecore(sdh, corebase);
+ brcmf_sdbrcm_chip_disablecore(sdh, corebase);
/*
* Now do the initialization sequence.
* set reset while enabling the clock and
* forcing them on throughout the core
*/
- bcmsdh_reg_write(sdh, CORE_SB(corebase, sbtmstatelow), 4,
+ brcmf_sdcard_reg_write(sdh, CORE_SB(corebase, sbtmstatelow), 4,
((SICF_FGC | SICF_CLOCK_EN) << SBTML_SICF_SHIFT) |
SBTML_RESET);
udelay(1);
- regdata = bcmsdh_reg_read(sdh, CORE_SB(corebase, sbtmstatehigh), 4);
+ regdata = brcmf_sdcard_reg_read(sdh, CORE_SB(corebase, sbtmstatehigh),
+ 4);
if (regdata & SBTMH_SERR)
- bcmsdh_reg_write(sdh, CORE_SB(corebase, sbtmstatehigh), 4, 0);
+ brcmf_sdcard_reg_write(sdh, CORE_SB(corebase, sbtmstatehigh),
+ 4, 0);
- regdata = bcmsdh_reg_read(sdh, CORE_SB(corebase, sbimstate), 4);
+ regdata = brcmf_sdcard_reg_read(sdh, CORE_SB(corebase, sbimstate), 4);
if (regdata & (SBIM_IBE | SBIM_TO))
- bcmsdh_reg_write(sdh, CORE_SB(corebase, sbimstate), 4,
+ brcmf_sdcard_reg_write(sdh, CORE_SB(corebase, sbimstate), 4,
regdata & ~(SBIM_IBE | SBIM_TO));
/* clear reset and allow it to propagate throughout the core */
- bcmsdh_reg_write(sdh, CORE_SB(corebase, sbtmstatelow), 4,
+ brcmf_sdcard_reg_write(sdh, CORE_SB(corebase, sbtmstatelow), 4,
(SICF_FGC << SBTML_SICF_SHIFT) |
(SICF_CLOCK_EN << SBTML_SICF_SHIFT));
udelay(1);
/* leave clock enabled */
- bcmsdh_reg_write(sdh, CORE_SB(corebase, sbtmstatelow), 4,
+ brcmf_sdcard_reg_write(sdh, CORE_SB(corebase, sbtmstatelow), 4,
(SICF_CLOCK_EN << SBTML_SICF_SHIFT));
udelay(1);
}
#define SDIOD_DRVSTR_KEY(chip, pmu) (((chip) << 16) | (pmu))
static void
-dhdsdio_sdiod_drive_strength_init(struct dhd_bus *bus, u32 drivestrength) {
+brcmf_sdbrcm_sdiod_drive_strength_init(struct dhd_bus *bus, u32 drivestrength) {
struct sdiod_drive_str *str_tab = NULL;
u32 str_mask = 0;
u32 str_shift = 0;
}
}
- bcmsdh_reg_write(bus->sdh,
+ brcmf_sdcard_reg_write(bus->sdh,
CORE_CC_REG(bus->ci->cccorebase, chipcontrol_addr),
4, 1);
- cc_data_temp = bcmsdh_reg_read(bus->sdh,
+ cc_data_temp = brcmf_sdcard_reg_read(bus->sdh,
CORE_CC_REG(bus->ci->cccorebase, chipcontrol_addr), 4);
cc_data_temp &= ~str_mask;
drivestrength_sel <<= str_shift;
cc_data_temp |= drivestrength_sel;
- bcmsdh_reg_write(bus->sdh,
+ brcmf_sdcard_reg_write(bus->sdh,
CORE_CC_REG(bus->ci->cccorebase, chipcontrol_addr),
4, cc_data_temp);
}
static void
-dhdsdio_chip_detach(struct dhd_bus *bus)
+brcmf_sdbrcm_chip_detach(struct dhd_bus *bus)
{
DHD_TRACE(("%s: Enter\n", __func__));
projects / mv-sheeva.git / commitdiff