drm/i915/gvt: fix getting 64bit bar size error

For 64bit bar while reading the higher 32bit the value should be returned
directly.

In the current implementation the higher 32bit value was discarded and not
written to the cfg space of vgpu which lead to an incorrect bar size.

Signed-off-by: Xiaoguang Chen <xiaoguang.chen@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>

diff --git a/drivers/gpu/drm/i915/gvt/gvt.h b/drivers/gpu/drm/i915/gvt/gvt.h
index 3d4223e8ebe3a25a899b414b0a605cec2bd5914b..b1a7c8dd4b5fdc38b7970e35d772feba19d49c26 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/gvt.h
+++ b/drivers/gpu/drm/i915/gvt/gvt.h
@@ -361,6 +361,8 @@ static inline void intel_vgpu_write_pci_bar(struct intel_vgpu *vgpu,
                 * leave the bit 3 - bit 0 unchanged.
                 */
                *pval = (val & GENMASK(31, 4)) | (*pval & GENMASK(3, 0));
+       } else {
+               *pval = val;
        }
 }