if (info->flags & SHARE_MUX_CONF_REG) {
u32 reg;
reg = readl(ipctl->base + pin_reg->mux_reg);
- reg &= ~(0x7 << 20);
- reg |= (pin->mux_mode << 20);
+ reg &= ~info->mux_mask;
+ reg |= (pin->mux_mode << info->mux_shift);
writel(reg, ipctl->base + pin_reg->mux_reg);
dev_dbg(ipctl->dev, "write: offset 0x%x val 0x%x\n",
pin_reg->mux_reg, reg);
mux_pin:
reg = readl(ipctl->base + pin_reg->mux_reg);
- reg &= ~(0x7 << 20);
+ reg &= ~info->mux_mask;
reg |= imx_pin->config;
writel(reg, ipctl->base + pin_reg->mux_reg);
*config = readl(ipctl->base + pin_reg->conf_reg);
if (info->flags & SHARE_MUX_CONF_REG)
- *config &= 0xffff;
+ *config &= ~info->mux_mask;
return 0;
}
if (info->flags & SHARE_MUX_CONF_REG) {
u32 reg;
reg = readl(ipctl->base + pin_reg->conf_reg);
- reg &= ~0xffff;
+ reg &= info->mux_mask;
reg |= configs[i];
writel(reg, ipctl->base + pin_reg->conf_reg);
dev_dbg(ipctl->dev, "write: offset 0x%x val 0x%x\n",
.pins = vf610_pinctrl_pads,
.npins = ARRAY_SIZE(vf610_pinctrl_pads),
.flags = SHARE_MUX_CONF_REG | ZERO_OFFSET_VALID,
+ .mux_mask = 0x700000,
+ .mux_shift = 20,
};
static const struct of_device_id vf610_pinctrl_of_match[] = {