0x32, 0xAB);
-void mei_wd_start_setup(struct mei_device *dev)
+void mei_wd_set_start_timeout(struct mei_device *dev, u16 timeout)
{
- dev_dbg(&dev->pdev->dev, "dev->wd_timeout=%d.\n", dev->wd_timeout);
+ dev_dbg(&dev->pdev->dev, "timeout=%d.\n", timeout);
memcpy(dev->wd_data, mei_start_wd_params, MEI_WD_PARAMS_SIZE);
memcpy(dev->wd_data + MEI_WD_PARAMS_SIZE,
- &dev->wd_timeout, sizeof(u16));
+ &timeout, sizeof(u16));
}
/**
dev->wd_timeout = watchdog_timeout;
if (dev->wd_timeout > 0) {
- mei_wd_start_setup(dev);
/* find ME WD client */
mei_find_me_client_update_filext(dev, &dev->wd_cl,
&mei_wd_guid, MEI_WD_HOST_CLIENT_ID);
goto end_unlock;
}
- mei_wd_start_setup(dev);
+ mei_wd_set_start_timeout(dev, dev->wd_timeout);
err = 0;
end_unlock:
return ret;
}
+/*
+ * mei_wd_ops_set_timeout - wd set timeout command from the watchdog core.
+ *
+ * @wd_dev - watchdog device struct
+ * @timeout - timeout value to set
+ *
+ * returns 0 if success, negative errno code for failure
+ */
+static int mei_wd_ops_set_timeout(struct watchdog_device *wd_dev, unsigned int timeout)
+{
+ struct mei_device *dev;
+ dev = pci_get_drvdata(mei_device);
+
+ if (!dev)
+ return -ENODEV;
+
+ /* Check Timeout value */
+ if (timeout < AMT_WD_MIN_TIMEOUT || timeout > AMT_WD_MAX_TIMEOUT)
+ return -EINVAL;
+
+ mutex_lock(&dev->device_lock);
+
+ dev->wd_timeout = timeout;
+ mei_wd_set_start_timeout(dev, dev->wd_timeout);
+
+ mutex_unlock(&dev->device_lock);
+
+ return 0;
+}
+
/*
* Watchdog Device structs
*/
.start = mei_wd_ops_start,
.stop = mei_wd_ops_stop,
.ping = mei_wd_ops_ping,
+ .set_timeout = mei_wd_ops_set_timeout,
};
const struct watchdog_info wd_info = {
.identity = INTEL_AMT_WATCHDOG_ID,