drm/radeon/kms: handle the case of no active displays properly in the bandwidth code

commit e06b14ee91a2ddefc9a67443a6cd8ee0fa800115 upstream.

Logic was:
if (mode0 && mode1)
else if (mode0)
else

Should be:
if (mode0 && mode1)
else if (mode0)
else if (mode1)

Otherwise we may end up calculating the priority regs with
unitialized values.

Fixes:
https://bugzilla.kernel.org/show_bug.cgi?id=16492

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>

diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c
index 97e30023d5e7967dab4f2b94059bad9bd396c97f..6249cf7602208fe610507cf1169426ef0bf54827 100644 (file)
--- a/drivers/gpu/drm/radeon/rs690.c
+++ b/drivers/gpu/drm/radeon/rs690.c
@@ -400,7 +400,9 @@ void rs690_bandwidth_update(struct radeon_device *rdev)
        struct drm_display_mode *mode1 = NULL;
        struct rs690_watermark wm0;
        struct rs690_watermark wm1;
-       u32 tmp, d1mode_priority_a_cnt, d2mode_priority_a_cnt;
+       u32 tmp;
+       u32 d1mode_priority_a_cnt = S_006548_D1MODE_PRIORITY_A_OFF(1);
+       u32 d2mode_priority_a_cnt = S_006548_D1MODE_PRIORITY_A_OFF(1);
        fixed20_12 priority_mark02, priority_mark12, fill_rate;
        fixed20_12 a, b;
 
@@ -497,10 +499,6 @@ void rs690_bandwidth_update(struct radeon_device *rdev)
                        d1mode_priority_a_cnt |= S_006548_D1MODE_PRIORITY_A_ALWAYS_ON(1);
                        d2mode_priority_a_cnt |= S_006D48_D2MODE_PRIORITY_A_ALWAYS_ON(1);
                }
-               WREG32(R_006548_D1MODE_PRIORITY_A_CNT, d1mode_priority_a_cnt);
-               WREG32(R_00654C_D1MODE_PRIORITY_B_CNT, d1mode_priority_a_cnt);
-               WREG32(R_006D48_D2MODE_PRIORITY_A_CNT, d2mode_priority_a_cnt);
-               WREG32(R_006D4C_D2MODE_PRIORITY_B_CNT, d2mode_priority_a_cnt);
        } else if (mode0) {
                if (rfixed_trunc(wm0.dbpp) > 64)
                        a.full = rfixed_mul(wm0.dbpp, wm0.num_line_pair);
@@ -530,13 +528,7 @@ void rs690_bandwidth_update(struct radeon_device *rdev)
                d1mode_priority_a_cnt = rfixed_trunc(priority_mark02);
                if (rdev->disp_priority == 2)
                        d1mode_priority_a_cnt |= S_006548_D1MODE_PRIORITY_A_ALWAYS_ON(1);
-               WREG32(R_006548_D1MODE_PRIORITY_A_CNT, d1mode_priority_a_cnt);
-               WREG32(R_00654C_D1MODE_PRIORITY_B_CNT, d1mode_priority_a_cnt);
-               WREG32(R_006D48_D2MODE_PRIORITY_A_CNT,
-                       S_006D48_D2MODE_PRIORITY_A_OFF(1));
-               WREG32(R_006D4C_D2MODE_PRIORITY_B_CNT,
-                       S_006D4C_D2MODE_PRIORITY_B_OFF(1));
-       } else {
+       } else if (mode1) {
                if (rfixed_trunc(wm1.dbpp) > 64)
                        a.full = rfixed_mul(wm1.dbpp, wm1.num_line_pair);
                else
@@ -565,13 +557,12 @@ void rs690_bandwidth_update(struct radeon_device *rdev)
                d2mode_priority_a_cnt = rfixed_trunc(priority_mark12);
                if (rdev->disp_priority == 2)
                        d2mode_priority_a_cnt |= S_006D48_D2MODE_PRIORITY_A_ALWAYS_ON(1);
-               WREG32(R_006548_D1MODE_PRIORITY_A_CNT,
-                       S_006548_D1MODE_PRIORITY_A_OFF(1));
-               WREG32(R_00654C_D1MODE_PRIORITY_B_CNT,
-                       S_00654C_D1MODE_PRIORITY_B_OFF(1));
-               WREG32(R_006D48_D2MODE_PRIORITY_A_CNT, d2mode_priority_a_cnt);
-               WREG32(R_006D4C_D2MODE_PRIORITY_B_CNT, d2mode_priority_a_cnt);
        }
+
+       WREG32(R_006548_D1MODE_PRIORITY_A_CNT, d1mode_priority_a_cnt);
+       WREG32(R_00654C_D1MODE_PRIORITY_B_CNT, d1mode_priority_a_cnt);
+       WREG32(R_006D48_D2MODE_PRIORITY_A_CNT, d2mode_priority_a_cnt);
+       WREG32(R_006D4C_D2MODE_PRIORITY_B_CNT, d2mode_priority_a_cnt);
 }
 
 uint32_t rs690_mc_rreg(struct radeon_device *rdev, uint32_t reg)

diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c
index 9035121f4b584bc1282c334130db4e0e16eefab2..cf8f27f090d7417dcb0cd7f5b2b4f6dc7fbc7137 100644 (file)
--- a/drivers/gpu/drm/radeon/rv515.c
+++ b/drivers/gpu/drm/radeon/rv515.c
@@ -1017,7 +1017,9 @@ void rv515_bandwidth_avivo_update(struct radeon_device *rdev)
        struct drm_display_mode *mode1 = NULL;
        struct rv515_watermark wm0;
        struct rv515_watermark wm1;
-       u32 tmp, d1mode_priority_a_cnt, d2mode_priority_a_cnt;
+       u32 tmp;
+       u32 d1mode_priority_a_cnt = MODE_PRIORITY_OFF;
+       u32 d2mode_priority_a_cnt = MODE_PRIORITY_OFF;
        fixed20_12 priority_mark02, priority_mark12, fill_rate;
        fixed20_12 a, b;
 
@@ -1091,10 +1093,6 @@ void rv515_bandwidth_avivo_update(struct radeon_device *rdev)
                        d1mode_priority_a_cnt |= MODE_PRIORITY_ALWAYS_ON;
                        d2mode_priority_a_cnt |= MODE_PRIORITY_ALWAYS_ON;
                }
-               WREG32(D1MODE_PRIORITY_A_CNT, d1mode_priority_a_cnt);
-               WREG32(D1MODE_PRIORITY_B_CNT, d1mode_priority_a_cnt);
-               WREG32(D2MODE_PRIORITY_A_CNT, d2mode_priority_a_cnt);
-               WREG32(D2MODE_PRIORITY_B_CNT, d2mode_priority_a_cnt);
        } else if (mode0) {
                if (rfixed_trunc(wm0.dbpp) > 64)
                        a.full = rfixed_div(wm0.dbpp, wm0.num_line_pair);
@@ -1124,11 +1122,7 @@ void rv515_bandwidth_avivo_update(struct radeon_device *rdev)
                d1mode_priority_a_cnt = rfixed_trunc(priority_mark02);
                if (rdev->disp_priority == 2)
                        d1mode_priority_a_cnt |= MODE_PRIORITY_ALWAYS_ON;
-               WREG32(D1MODE_PRIORITY_A_CNT, d1mode_priority_a_cnt);
-               WREG32(D1MODE_PRIORITY_B_CNT, d1mode_priority_a_cnt);
-               WREG32(D2MODE_PRIORITY_A_CNT, MODE_PRIORITY_OFF);
-               WREG32(D2MODE_PRIORITY_B_CNT, MODE_PRIORITY_OFF);
-       } else {
+       } else if (mode1) {
                if (rfixed_trunc(wm1.dbpp) > 64)
                        a.full = rfixed_div(wm1.dbpp, wm1.num_line_pair);
                else
@@ -1157,11 +1151,12 @@ void rv515_bandwidth_avivo_update(struct radeon_device *rdev)
                d2mode_priority_a_cnt = rfixed_trunc(priority_mark12);
                if (rdev->disp_priority == 2)
                        d2mode_priority_a_cnt |= MODE_PRIORITY_ALWAYS_ON;
-               WREG32(D1MODE_PRIORITY_A_CNT, MODE_PRIORITY_OFF);
-               WREG32(D1MODE_PRIORITY_B_CNT, MODE_PRIORITY_OFF);
-               WREG32(D2MODE_PRIORITY_A_CNT, d2mode_priority_a_cnt);
-               WREG32(D2MODE_PRIORITY_B_CNT, d2mode_priority_a_cnt);
        }
+
+       WREG32(D1MODE_PRIORITY_A_CNT, d1mode_priority_a_cnt);
+       WREG32(D1MODE_PRIORITY_B_CNT, d1mode_priority_a_cnt);
+       WREG32(D2MODE_PRIORITY_A_CNT, d2mode_priority_a_cnt);
+       WREG32(D2MODE_PRIORITY_B_CNT, d2mode_priority_a_cnt);
 }
 
 void rv515_bandwidth_update(struct radeon_device *rdev)