ARM: dts: Fix definition of MSHC device tree nodes for exynos4x12

All SoCs from Exynos4x12 series contain the MSHC block, so its node can
be located in exynos4x12.dtsi. In addition, missing clock specifiers
are added, generic SoC attributes are moved from board dts files
to common dtsi file of SoC family and the node is renamed to a more
generic name to follow node naming recommendations.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

diff --git a/arch/arm/boot/dts/exynos4412-odroidx.dts b/arch/arm/boot/dts/exynos4412-odroidx.dts
index 46c678ee119caae17bd1792490c9516c8049306b..8aad5f72ced79d5c2123226ee392761d53a45cab 100644 (file)
--- a/arch/arm/boot/dts/exynos4412-odroidx.dts
+++ b/arch/arm/boot/dts/exynos4412-odroidx.dts
@@ -38,9 +38,7 @@
                };
        };
 
-       mshc@12550000 {
-               #address-cells = <1>;
-               #size-cells = <0>;
+       mmc@12550000 {
                pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
                pinctrl-names = "default";
                vmmc-supply = <&ldo20_reg &buck8_reg>;
@@ -49,7 +47,6 @@
                num-slots = <1>;
                supports-highspeed;
                broken-cd;
-               fifo-depth = <0x80>;
                card-detect-delay = <200>;
                samsung,dw-mshc-ciu-div = <3>;
                samsung,dw-mshc-sdr-timing = <2 3>;

diff --git a/arch/arm/boot/dts/exynos4412-origen.dts b/arch/arm/boot/dts/exynos4412-origen.dts
index 95201559c3ade8848591c595eb4eb69d8b1396b4..6bc053924e9e69a70cc30eca78cd365c5fcafc6a 100644 (file)
--- a/arch/arm/boot/dts/exynos4412-origen.dts
+++ b/arch/arm/boot/dts/exynos4412-origen.dts
@@ -122,9 +122,7 @@
                status = "okay";
        };
 
-       mshc@12550000 {
-               #address-cells = <1>;
-               #size-cells = <0>;
+       mmc@12550000 {
                pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
                pinctrl-names = "default";
                status = "okay";
@@ -132,7 +130,6 @@
                num-slots = <1>;
                supports-highspeed;
                broken-cd;
-               fifo-depth = <0x80>;
                card-detect-delay = <200>;
                samsung,dw-mshc-ciu-div = <3>;
                samsung,dw-mshc-sdr-timing = <2 3>;

diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
index 8cb1469c7d7f8a9aae91b2a2f11c74574c84f34b..85812bd95a86edb42a56ea3ebe940003721c5486 100644 (file)
--- a/arch/arm/boot/dts/exynos4412.dtsi
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -61,13 +61,4 @@
                };
        };
 
-       mshc@12550000 {
-               compatible = "samsung,exynos4412-dw-mshc";
-               reg = <0x12550000 0x1000>;
-               interrupts = <0 77 0>;
-               #address-cells = <1>;
-               #size-cells = <0>;
-               clocks = <&clock 301>, <&clock 149>;
-               clock-name = "biu", "ciu";
-       };
 };

diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi
index ad531fe6ab9528fdfcca50635bc4c833651db15b..1917c829e64e6ef487fe12e732313354377a6f49 100644 (file)
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -28,6 +28,7 @@
                pinctrl3 = &pinctrl_3;
                fimc-lite0 = &fimc_lite_0;
                fimc-lite1 = &fimc_lite_1;
+               mshc0 = &mshc_0;
        };
 
        pd_isp: isp-power-domain@10023CA0 {
@@ -176,4 +177,16 @@
                        };
                };
        };
+
+       mshc_0: mmc@12550000 {
+               compatible = "samsung,exynos4412-dw-mshc";
+               reg = <0x12550000 0x1000>;
+               interrupts = <0 77 0>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               fifo-depth = <0x80>;
+               clocks = <&clock 301>, <&clock 149>;
+               clock-names = "biu", "ciu";
+               status = "disabled";
+       };
 };