spin_unlock_irqrestore(&devpriv->ao_spinlock, flags);
/* Reconfigure DAC for insn_write usage. */
outw(0, dev->iobase + PCI224_DACCEN); /* Disable channels. */
- devpriv->daccon = COMBINE(devpriv->daccon,
- PCI224_DACCON_TRIG_SW |
- PCI224_DACCON_FIFOINTR_EMPTY,
- PCI224_DACCON_TRIG_MASK |
- PCI224_DACCON_FIFOINTR_MASK);
+ devpriv->daccon =
+ COMBINE(devpriv->daccon,
+ PCI224_DACCON_TRIG_SW | PCI224_DACCON_FIFOINTR_EMPTY,
+ PCI224_DACCON_TRIG_MASK | PCI224_DACCON_FIFOINTR_MASK);
outw(devpriv->daccon | PCI224_DACCON_FIFORESET,
dev->iobase + PCI224_DACCON);
}
else
trig = PCI224_DACCON_TRIG_EXTP;
}
- devpriv->daccon = COMBINE(devpriv->daccon, trig,
- PCI224_DACCON_TRIG_MASK);
+ devpriv->daccon =
+ COMBINE(devpriv->daccon, trig, PCI224_DACCON_TRIG_MASK);
outw(devpriv->daccon, dev->iobase + PCI224_DACCON);
}
err |= cfc_check_trigger_src(&cmd->start_src, TRIG_INT | TRIG_EXT);
err |= cfc_check_trigger_src(&cmd->scan_begin_src,
- TRIG_EXT | TRIG_TIMER);
+ TRIG_EXT | TRIG_TIMER);
err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_NOW);
err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
err |= cfc_check_trigger_src(&cmd->stop_src,
- TRIG_COUNT | TRIG_EXT | TRIG_NONE);
+ TRIG_COUNT | TRIG_EXT | TRIG_NONE);
if (err)
return 1;
case TRIG_EXT:
/* Force to external trigger 0. */
if (cmd->start_arg & ~CR_FLAGS_MASK) {
- cmd->start_arg = COMBINE(cmd->start_arg, 0,
- ~CR_FLAGS_MASK);
+ cmd->start_arg =
+ COMBINE(cmd->start_arg, 0, ~CR_FLAGS_MASK);
err |= -EINVAL;
}
/* The only flag allowed is CR_EDGE, which is ignored. */
case TRIG_EXT:
/* Force to external trigger 0. */
if (cmd->scan_begin_arg & ~CR_FLAGS_MASK) {
- cmd->scan_begin_arg = COMBINE(cmd->scan_begin_arg, 0,
- ~CR_FLAGS_MASK);
+ cmd->scan_begin_arg =
+ COMBINE(cmd->scan_begin_arg, 0, ~CR_FLAGS_MASK);
err |= -EINVAL;
}
/* Only allow flags CR_EDGE and CR_INVERT. Ignore CR_EDGE. */
if (cmd->scan_begin_arg & CR_FLAGS_MASK &
~(CR_EDGE | CR_INVERT)) {
- cmd->scan_begin_arg = COMBINE(cmd->scan_begin_arg, 0,
- CR_FLAGS_MASK &
- ~(CR_EDGE | CR_INVERT));
+ cmd->scan_begin_arg =
+ COMBINE(cmd->scan_begin_arg, 0,
+ CR_FLAGS_MASK & ~(CR_EDGE | CR_INVERT));
err |= -EINVAL;
}
break;
case TRIG_EXT:
/* Force to external trigger 0. */
if (cmd->stop_arg & ~CR_FLAGS_MASK) {
- cmd->stop_arg = COMBINE(cmd->stop_arg, 0,
- ~CR_FLAGS_MASK);
+ cmd->stop_arg =
+ COMBINE(cmd->stop_arg, 0, ~CR_FLAGS_MASK);
err |= -EINVAL;
}
/* The only flag allowed is CR_EDGE, which is ignored. */
if (cmd->stop_arg & CR_FLAGS_MASK & ~CR_EDGE) {
- cmd->stop_arg = COMBINE(cmd->stop_arg, 0,
- CR_FLAGS_MASK & ~CR_EDGE);
+ cmd->stop_arg =
+ COMBINE(cmd->stop_arg, 0, CR_FLAGS_MASK & ~CR_EDGE);
}
break;
case TRIG_NONE:
*
* N.B. DAC FIFO interrupts are currently disabled.
*/
- devpriv->daccon = COMBINE(devpriv->daccon,
- devpriv->hwrange[range] |
- PCI224_DACCON_TRIG_NONE |
- PCI224_DACCON_FIFOINTR_NHALF,
- PCI224_DACCON_POLAR_MASK |
- PCI224_DACCON_VREF_MASK |
- PCI224_DACCON_TRIG_MASK |
- PCI224_DACCON_FIFOINTR_MASK);
+ devpriv->daccon =
+ COMBINE(devpriv->daccon,
+ devpriv->hwrange[range] | PCI224_DACCON_TRIG_NONE |
+ PCI224_DACCON_FIFOINTR_NHALF,
+ PCI224_DACCON_POLAR_MASK | PCI224_DACCON_VREF_MASK |
+ PCI224_DACCON_TRIG_MASK | PCI224_DACCON_FIFOINTR_MASK);
outw(devpriv->daccon | PCI224_DACCON_FIFORESET,
dev->iobase + PCI224_DACCON);