m68knommu: move UART addressing to part specific includes

The ColdFire UART base addresses varies between the different ColdFire
family members. Instead of keeping the base addresses with the UART
definitions keep them with the other addresses definitions for each
ColdFire part.

The motivation for this move is so that when we add new ColdFire
part definitions, they are all in a single file (and we shouldn't
normally need to modify the UART definitions in mcfuart.h at all).

Signed-off-by: Greg Ungerer <gerg@uclinux.org>

diff --git a/arch/m68k/include/asm/m5206sim.h b/arch/m68k/include/asm/m5206sim.h
index b882a210ee6ef2e6c5dc7b6c2e1bf287112b7b09..aa7ee48d505938a359655f1e1ee478f11bfa4acb 100644 (file)
--- a/arch/m68k/include/asm/m5206sim.h
+++ b/arch/m68k/include/asm/m5206sim.h
@@ -90,6 +90,14 @@
 #define        MCFSIM_PADDR            (MCF_MBAR + 0x1c5)      /* Parallel Direction (r/w) */
 #define        MCFSIM_PADAT            (MCF_MBAR + 0x1c9)      /* Parallel Port Value (r/w) */
 
+#if defined(CONFIG_NETtel)
+#define        MCFUART_BASE1           0x180           /* Base address of UART1 */
+#define        MCFUART_BASE2           0x140           /* Base address of UART2 */
+#else
+#define        MCFUART_BASE1           0x140           /* Base address of UART1 */
+#define        MCFUART_BASE2           0x180           /* Base address of UART2 */
+#endif
+
 /*
  *     Define system peripheral IRQ usage.
  */
@@ -97,7 +105,7 @@
 #define        MCF_IRQ_PROFILER        31              /* Timer1, Level 7 */
 
 /*
- * Generic GPIO
+ *     Generic GPIO
  */
 #define MCFGPIO_PIN_MAX                8
 #define MCFGPIO_IRQ_VECBASE    -1

diff --git a/arch/m68k/include/asm/m520xsim.h b/arch/m68k/include/asm/m520xsim.h
index 85b39edf41a021485f4f77ff680cc8f83656a332..8cd8bce38594026268577543c06b7b5e193a1d4d 100644 (file)
--- a/arch/m68k/include/asm/m520xsim.h
+++ b/arch/m68k/include/asm/m520xsim.h
@@ -100,6 +100,7 @@
 #define MCFGPIO_PCLRR_UART             0xFC0A402A
 #define MCFGPIO_PCLRR_FECH             0xFC0A402B
 #define MCFGPIO_PCLRR_FECL             0xFC0A402C
+
 /*
  * Generic GPIO support
  */
@@ -112,7 +113,6 @@
 #define MCFGPIO_PIN_MAX                        80
 #define MCFGPIO_IRQ_MAX                        8
 #define MCFGPIO_IRQ_VECBASE            MCFINT_VECBASE
-/****************************************************************************/
 
 #define MCF_GPIO_PAR_UART                   (0xA4036)
 #define MCF_GPIO_PAR_FECI2C                 (0xA4033)
@@ -128,6 +128,13 @@
 #define MCF_GPIO_PAR_FECI2C_PAR_SDA_URXD2   (0x02)
 #define MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2   (0x04)
 
+/*
+ *  UART module.
+ */
+#define MCFUART_BASE1          0x60000         /* Base address of UART1 */
+#define MCFUART_BASE2          0x64000         /* Base address of UART2 */
+#define MCFUART_BASE3          0x68000         /* Base address of UART2 */
+
 /*
  *  Reset Controll Unit.
  */

diff --git a/arch/m68k/include/asm/m523xsim.h b/arch/m68k/include/asm/m523xsim.h
index 9d597dcb29c012c01cfa49d47b7c72bb45563b03..4ec0f93a7ece0cdcc2af1fa1782eadb4cca1ea1a 100644 (file)
--- a/arch/m68k/include/asm/m523xsim.h
+++ b/arch/m68k/include/asm/m523xsim.h
@@ -52,6 +52,13 @@
 #define        MCF_RCR_SWRESET         0x80            /* Software reset bit */
 #define        MCF_RCR_FRCSTOUT        0x40            /* Force external reset */
 
+/*
+ *  UART module.
+ */
+#define MCFUART_BASE1          0x200           /* Base address of UART1 */
+#define MCFUART_BASE2          0x240           /* Base address of UART2 */
+#define MCFUART_BASE3          0x280           /* Base address of UART3 */
+
 #define MCFGPIO_PODR_ADDR      (MCF_IPSBAR + 0x100000)
 #define MCFGPIO_PODR_DATAH     (MCF_IPSBAR + 0x100001)
 #define MCFGPIO_PODR_DATAL     (MCF_IPSBAR + 0x100002)

diff --git a/arch/m68k/include/asm/m5249sim.h b/arch/m68k/include/asm/m5249sim.h
index c107228728dbedfe4afcad93904442505c7c6f39..21d0bbfbc0c9c34c7b5dab42304ef2b0b475c250 100644 (file)
--- a/arch/m68k/include/asm/m5249sim.h
+++ b/arch/m68k/include/asm/m5249sim.h
@@ -59,6 +59,11 @@
 #define MCFSIM_DACR1           0x110           /* DRAM 1 Addr and Ctrl (r/w) */
 #define MCFSIM_DMR1            0x114           /* DRAM 1 Mask reg (r/w) */
 
+/*
+ *     UART module.
+ */
+#define MCFUART_BASE1          0x1c0           /* Base address of UART1 */
+#define MCFUART_BASE2          0x200           /* Base address of UART2 */
 
 /*
  *     Some symbol defines for the above...

diff --git a/arch/m68k/include/asm/m5272sim.h b/arch/m68k/include/asm/m5272sim.h
index 8cea714dee461ddd9a169d596884d8cb2b90b4af..974c448c098e0915d2616165fd7d8cae67ca7801 100644 (file)
--- a/arch/m68k/include/asm/m5272sim.h
+++ b/arch/m68k/include/asm/m5272sim.h
@@ -65,6 +65,9 @@
 #define        MCFSIM_DCMR1            0x5c            /* DRAM 1 Mask reg (r/w) */
 #define        MCFSIM_DCCR1            0x63            /* DRAM 1 Control reg (r/w) */
 
+#define        MCFUART_BASE1           0x100           /* Base address of UART1 */
+#define        MCFUART_BASE2           0x140           /* Base address of UART2 */
+
 #define        MCFSIM_PACNT            (MCF_MBAR + 0x80) /* Port A Control (r/w) */
 #define        MCFSIM_PADDR            (MCF_MBAR + 0x84) /* Port A Direction (r/w) */
 #define        MCFSIM_PADAT            (MCF_MBAR + 0x86) /* Port A Data (r/w) */

diff --git a/arch/m68k/include/asm/m527xsim.h b/arch/m68k/include/asm/m527xsim.h
index 5223b71d3432ec86b7f037ae297a9080b27db765..8a5a1ab57d018855257a39554139d38b8c0d832c 100644 (file)
--- a/arch/m68k/include/asm/m527xsim.h
+++ b/arch/m68k/include/asm/m527xsim.h
@@ -58,6 +58,12 @@
 #define        MCFSIM_DMR1             0x5c            /* SDRAM address mask 1 */
 #endif
 
+/*
+ *     UART module.
+ */
+#define MCFUART_BASE1          0x200           /* Base address of UART1 */
+#define MCFUART_BASE2          0x240           /* Base address of UART2 */
+#define MCFUART_BASE3          0x280           /* Base address of UART3 */
 
 #ifdef CONFIG_M5271
 #define MCFGPIO_PODR_ADDR      (MCF_IPSBAR + 0x100000)

diff --git a/arch/m68k/include/asm/m528xsim.h b/arch/m68k/include/asm/m528xsim.h
index 4e35f970f6623ffff9996eefd38610c74d575d03..47c851ef78d3e717f76be83a7072601b7e705d72 100644 (file)
--- a/arch/m68k/include/asm/m528xsim.h
+++ b/arch/m68k/include/asm/m528xsim.h
@@ -43,6 +43,13 @@
 #define        MCFSIM_DACR1            0x50            /* SDRAM base address 1 */
 #define        MCFSIM_DMR1             0x54            /* SDRAM address mask 1 */
 
+/*
+ *     UART module.
+ */
+#define MCFUART_BASE1          0x200           /* Base address of UART1 */
+#define MCFUART_BASE2          0x240           /* Base address of UART2 */
+#define MCFUART_BASE3          0x280           /* Base address of UART3 */
+
 /*
  *     GPIO registers
  */

diff --git a/arch/m68k/include/asm/m5307sim.h b/arch/m68k/include/asm/m5307sim.h
index 008f36bd66c3e01b9211d1b4a7d64ca19637d4c4..7003d7268ae85753871bdc1b53f99d5725dde27d 100644 (file)
--- a/arch/m68k/include/asm/m5307sim.h
+++ b/arch/m68k/include/asm/m5307sim.h
@@ -96,6 +96,17 @@
 #define        MCFSIM_PADDR            (MCF_MBAR + 0x244)
 #define        MCFSIM_PADAT            (MCF_MBAR + 0x248)
 
+/*
+ *  UART module.
+ */
+#if defined(CONFIG_NETtel) || defined(CONFIG_SECUREEDGEMP3)
+#define MCFUART_BASE1          0x200           /* Base address of UART1 */
+#define MCFUART_BASE2          0x1c0           /* Base address of UART2 */
+#else
+#define MCFUART_BASE1          0x1c0           /* Base address of UART1 */
+#define MCFUART_BASE2          0x200           /* Base address of UART2 */
+#endif
+
 /*
  * Generic GPIO support
  */

diff --git a/arch/m68k/include/asm/m532xsim.h b/arch/m68k/include/asm/m532xsim.h
index b8126d3253e1230a162e7763c779c9acc502ef86..45c119c072db1fd3176ebf7859f7f127453fc460 100644 (file)
--- a/arch/m68k/include/asm/m532xsim.h
+++ b/arch/m68k/include/asm/m532xsim.h
@@ -103,6 +103,13 @@
 #define        ACR_CM_OFF_IMP          (3<<5)
 #define        ACR_WPROTECT            (1<<2)
 
+/*
+ *  UART module.
+ */
+#define MCFUART_BASE1          0xFC060000      /* Base address of UART1 */
+#define MCFUART_BASE2          0xFC064000      /* Base address of UART2 */
+#define MCFUART_BASE3          0xFC068000      /* Base address of UART3 */
+
 /*********************************************************************
  *
  * Reset Controller Module

diff --git a/arch/m68k/include/asm/m5407sim.h b/arch/m68k/include/asm/m5407sim.h
index e07d4d8cf31f8f0ea1be81d2038bfd85d8ec4a6f..ddfff88629fee6e9ae14c5bff37a55292015632a 100644 (file)
--- a/arch/m68k/include/asm/m5407sim.h
+++ b/arch/m68k/include/asm/m5407sim.h
@@ -76,6 +76,9 @@
 #define MCFSIM_DACR1           0x110           /* DRAM 1 Addr and Ctrl (r/w) */
 #define MCFSIM_DMR1            0x114           /* DRAM 1 Mask reg (r/w) */
 
+#define MCFUART_BASE1          0x1c0           /* Base address of UART1 */
+#define MCFUART_BASE2          0x200           /* Base address of UART2 */
+
 #define        MCFSIM_PADDR            (MCF_MBAR + 0x244)
 #define        MCFSIM_PADAT            (MCF_MBAR + 0x248)
 

diff --git a/arch/m68k/include/asm/m54xxsim.h b/arch/m68k/include/asm/m54xxsim.h
index 6072248916acd649e094c03bb76fe2a196f33008..a08a7ae776b16721dca056edd966b4823b2d9b59 100644 (file)
--- a/arch/m68k/include/asm/m54xxsim.h
+++ b/arch/m68k/include/asm/m54xxsim.h
@@ -24,6 +24,14 @@
 #define MCFINTC_IACKL          0x19            /* */
 #define MCFINTC_ICR0           0x40            /* Base ICR register */
 
+/*
+ *     UART module.
+ */
+#define MCFUART_BASE1          0x8600          /* Base address of UART1 */
+#define MCFUART_BASE2          0x8700          /* Base address of UART2 */
+#define MCFUART_BASE3          0x8800          /* Base address of UART3 */
+#define MCFUART_BASE4          0x8900          /* Base address of UART4 */
+
 /*
  *     Define system peripheral IRQ usage.
  */

diff --git a/arch/m68k/include/asm/mcfuart.h b/arch/m68k/include/asm/mcfuart.h
index c67dacad7c1c5b94416be052231050ea465d4eac..2abedff0a694fb2c6579a43fe508dde548f42549 100644 (file)
--- a/arch/m68k/include/asm/mcfuart.h
+++ b/arch/m68k/include/asm/mcfuart.h
@@ -12,49 +12,6 @@
 #define        mcfuart_h
 /****************************************************************************/
 
-/*
- *     Define the base address of the UARTS within the MBAR address
- *     space.
- */
-#if defined(CONFIG_M5272)
-#define        MCFUART_BASE1           0x100           /* Base address of UART1 */
-#define        MCFUART_BASE2           0x140           /* Base address of UART2 */
-#elif defined(CONFIG_M5206) || defined(CONFIG_M5206e)
-#if defined(CONFIG_NETtel)
-#define        MCFUART_BASE1           0x180           /* Base address of UART1 */
-#define        MCFUART_BASE2           0x140           /* Base address of UART2 */
-#else
-#define        MCFUART_BASE1           0x140           /* Base address of UART1 */
-#define        MCFUART_BASE2           0x180           /* Base address of UART2 */
-#endif
-#elif defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x)
-#define MCFUART_BASE1          0x200           /* Base address of UART1 */
-#define MCFUART_BASE2          0x240           /* Base address of UART2 */
-#define MCFUART_BASE3          0x280           /* Base address of UART3 */
-#elif defined(CONFIG_M5249) || defined(CONFIG_M5307) || defined(CONFIG_M5407)
-#if defined(CONFIG_NETtel) || defined(CONFIG_SECUREEDGEMP3)
-#define MCFUART_BASE1          0x200           /* Base address of UART1 */
-#define MCFUART_BASE2          0x1c0           /* Base address of UART2 */
-#else
-#define MCFUART_BASE1          0x1c0           /* Base address of UART1 */
-#define MCFUART_BASE2          0x200           /* Base address of UART2 */
-#endif
-#elif defined(CONFIG_M520x)
-#define MCFUART_BASE1          0x60000         /* Base address of UART1 */
-#define MCFUART_BASE2          0x64000         /* Base address of UART2 */
-#define MCFUART_BASE3          0x68000         /* Base address of UART2 */
-#elif defined(CONFIG_M532x)
-#define MCFUART_BASE1          0xfc060000      /* Base address of UART1 */
-#define MCFUART_BASE2          0xfc064000      /* Base address of UART2 */
-#define MCFUART_BASE3          0xfc068000      /* Base address of UART3 */
-#elif defined(CONFIG_M54xx)
-#define MCFUART_BASE1          0x8600          /* on M54xx */
-#define MCFUART_BASE2          0x8700          /* on M54xx */
-#define MCFUART_BASE3          0x8800          /* on M54xx */
-#define MCFUART_BASE4          0x8900          /* on M54xx */
-#endif
-
-
 #include <linux/serial_core.h>
 #include <linux/platform_device.h>