obj-y += irq.o time.o
obj-y += nlm-dma.o
-obj-$(CONFIG_SMP) += smp.o smpboot.o reset.o
+obj-y += reset.o
+obj-$(CONFIG_SMP) += smp.o smpboot.o
obj-$(CONFIG_EARLY_PRINTK) += earlycons.o
int __cpuinit nlm_wakeup_secondary_cpus(void)
{
- unsigned long reset_vec;
char *reset_data;
int threadmode;
- /* Update reset entry point with CPU init code */
- reset_vec = CKSEG1ADDR(RESET_VEC_PHYS);
- memcpy((void *)reset_vec, (void *)nlm_reset_entry,
- (nlm_reset_entry_end - nlm_reset_entry));
-
/* verify the mask and setup core config variables */
threadmode = nlm_parse_cpumask(&nlm_cpumask);
void __init prom_init(void)
{
+ void *reset_vec;
+
nlm_io_base = CKSEG1ADDR(XLP_DEFAULT_IO_BASE);
+ nlm_init_boot_cpu();
xlp_mmu_init();
nlm_node_init(0);
xlp_dt_init((void *)(long)fw_arg0);
+ /* Update reset entry point with CPU init code */
+ reset_vec = (void *)CKSEG1ADDR(RESET_VEC_PHYS);
+ memcpy(reset_vec, (void *)nlm_reset_entry,
+ (nlm_reset_entry_end - nlm_reset_entry));
+
#ifdef CONFIG_SMP
cpumask_setall(&nlm_cpumask);
nlm_wakeup_secondary_cpus();
* In case of u-boot, the secondaries are in reset
* first wakeup core 0 threads
*/
- nlm_init_boot_cpu();
xlp_boot_core0_siblings();
/* now get other cores out of reset */
{
int *argv, *envp; /* passed as 32 bit ptrs */
struct psb_info *prom_infop;
+ void *reset_vec;
#ifdef CONFIG_SMP
int i;
#endif
nlm_prom_info = *prom_infop;
nlm_init_node();
+ /* Update reset entry point with CPU init code */
+ reset_vec = (void *)CKSEG1ADDR(RESET_VEC_PHYS);
+ memcpy(reset_vec, (void *)nlm_reset_entry,
+ (nlm_reset_entry_end - nlm_reset_entry));
+
nlm_early_serial_setup();
build_arcs_cmdline(argv);
prom_add_memory();