/*
- * Copyright (C) 2011-2012 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
tmpdata = clk_get_rate(clk) / 1000;
clk_put(clk);
+#ifdef CONFIG_SATA_AHCI_PLATFORM
ret = sata_init(addr, tmpdata);
if (ret == 0)
return ret;
+#else
+ usleep_range(1000, 2000);
+ /* AHCI PHY enter into PDDQ mode if the AHCI module is not enabled */
+ tmpdata = readl(addr + PORT_PHY_CTL);
+ writel(tmpdata | PORT_PHY_CTL_PDDQ_LOC, addr + PORT_PHY_CTL);
+ pr_info("No AHCI save PWR: PDDQ %s\n", ((readl(addr + PORT_PHY_CTL)
+ >> 20) & 1) ? "enabled" : "disabled");
+#endif
release_sata_clk:
+ /* disable SATA_PHY PLL */
+ writel((readl(IOMUXC_GPR13) & ~0x2), IOMUXC_GPR13);
clk_disable(sata_clk);
put_sata_clk:
clk_put(sata_clk);
return ret;
}
+#ifdef CONFIG_SATA_AHCI_PLATFORM
static void mx6_arm2_sata_exit(struct device *dev)
{
clk_disable(sata_clk);
.init = mx6_arm2_sata_init,
.exit = mx6_arm2_sata_exit,
};
+#endif
static struct imx_asrc_platform_data imx_asrc_data = {
.channel_bits = 4,
imx6q_add_sdhci_usdhc_imx(3, &mx6_arm2_sd4_data);
imx6q_add_sdhci_usdhc_imx(2, &mx6_arm2_sd3_data);
imx_add_viv_gpu(&imx6_gpu_data, &imx6_gpu_pdata);
- if (cpu_is_mx6q())
+ if (cpu_is_mx6q()) {
+#ifdef CONFIG_SATA_AHCI_PLATFORM
imx6q_add_ahci(0, &mx6_arm2_sata_data);
+#else
+ mx6_arm2_sata_init(NULL,
+ (void __iomem *)ioremap(MX6Q_SATA_BASE_ADDR, SZ_4K));
+#endif
+ }
imx6q_add_vpu();
mx6_arm2_init_usb();
mx6_arm2_init_audio();
tmpdata = clk_get_rate(clk) / 1000;
clk_put(clk);
+#ifdef CONFIG_SATA_AHCI_PLATFORM
ret = sata_init(addr, tmpdata);
if (ret == 0)
return ret;
+#else
+ usleep_range(1000, 2000);
+ /* AHCI PHY enter into PDDQ mode if the AHCI module is not enabled */
+ tmpdata = readl(addr + PORT_PHY_CTL);
+ writel(tmpdata | PORT_PHY_CTL_PDDQ_LOC, addr + PORT_PHY_CTL);
+ pr_info("No AHCI save PWR: PDDQ %s\n", ((readl(addr + PORT_PHY_CTL)
+ >> 20) & 1) ? "enabled" : "disabled");
+#endif
release_sata_clk:
+ /* disable SATA_PHY PLL */
+ writel((readl(IOMUXC_GPR13) & ~0x2), IOMUXC_GPR13);
clk_disable(sata_clk);
put_sata_clk:
clk_put(sata_clk);
return ret;
}
+#ifdef CONFIG_SATA_AHCI_PLATFORM
static void mx6q_sabreauto_sata_exit(struct device *dev)
{
clk_disable(sata_clk);
.init = mx6q_sabreauto_sata_init,
.exit = mx6q_sabreauto_sata_exit,
};
+#endif
static struct imx_asrc_platform_data imx_asrc_data = {
.channel_bits = 4,
imx_add_viv_gpu(&imx6_gpu_data, &imx6q_gpu_pdata);
imx6q_sabreauto_init_usb();
- if (cpu_is_mx6q())
+ if (cpu_is_mx6q()) {
+#ifdef CONFIG_SATA_AHCI_PLATFORM
imx6q_add_ahci(0, &mx6q_sabreauto_sata_data);
+#else
+ mx6q_sabreauto_sata_init(NULL,
+ (void __iomem *)ioremap(MX6Q_SATA_BASE_ADDR, SZ_4K));
+#endif
+ }
imx6q_add_vpu();
imx6q_init_audio();
platform_device_register(&sabreauto_vmmc_reg_devices);
/*
- * Copyright (C) 2011-2012 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
tmpdata = clk_get_rate(clk) / 1000;
clk_put(clk);
+#ifdef CONFIG_SATA_AHCI_PLATFORM
ret = sata_init(addr, tmpdata);
if (ret == 0)
return ret;
+#else
+ usleep_range(1000, 2000);
+ /* AHCI PHY enter into PDDQ mode if the AHCI module is not enabled */
+ tmpdata = readl(addr + PORT_PHY_CTL);
+ writel(tmpdata | PORT_PHY_CTL_PDDQ_LOC, addr + PORT_PHY_CTL);
+ pr_info("No AHCI save PWR: PDDQ %s\n", ((readl(addr + PORT_PHY_CTL)
+ >> 20) & 1) ? "enabled" : "disabled");
+#endif
release_sata_clk:
+ /* disable SATA_PHY PLL */
+ writel((readl(IOMUXC_GPR13) & ~0x2), IOMUXC_GPR13);
clk_disable(sata_clk);
put_sata_clk:
clk_put(sata_clk);
return ret;
}
+#ifdef CONFIG_SATA_AHCI_PLATFORM
static void mx6q_sabrelite_sata_exit(struct device *dev)
{
clk_disable(sata_clk);
.init = mx6q_sabrelite_sata_init,
.exit = mx6q_sabrelite_sata_exit,
};
+#endif
static struct gpio mx6q_sabrelite_flexcan_gpios[] = {
{ MX6Q_SABRELITE_CAN1_EN, GPIOF_OUT_INIT_LOW, "flexcan1-en" },
imx6q_add_sdhci_usdhc_imx(2, &mx6q_sabrelite_sd3_data);
imx_add_viv_gpu(&imx6_gpu_data, &imx6q_gpu_pdata);
imx6q_sabrelite_init_usb();
- imx6q_add_ahci(0, &mx6q_sabrelite_sata_data);
+
+ if (cpu_is_mx6q()) {
+#ifdef CONFIG_SATA_AHCI_PLATFORM
+ imx6q_add_ahci(0, &mx6q_sabrelite_sata_data);
+#else
+ mx6q_sabrelite_sata_init(NULL,
+ (void __iomem *)ioremap(MX6Q_SATA_BASE_ADDR, SZ_4K));
+#endif
+ }
imx6q_add_vpu();
imx6q_init_audio();
platform_device_register(&sabrelite_vmmc_reg_devices);
/*
- * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2012-2013 Freescale Semiconductor, Inc. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
tmpdata = clk_get_rate(clk) / 1000;
clk_put(clk);
+#ifdef CONFIG_SATA_AHCI_PLATFORM
ret = sata_init(addr, tmpdata);
if (ret == 0)
return ret;
+#else
+ usleep_range(1000, 2000);
+ /* AHCI PHY enter into PDDQ mode if the AHCI module is not enabled */
+ tmpdata = readl(addr + PORT_PHY_CTL);
+ writel(tmpdata | PORT_PHY_CTL_PDDQ_LOC, addr + PORT_PHY_CTL);
+ pr_info("No AHCI save PWR: PDDQ %s\n", ((readl(addr + PORT_PHY_CTL)
+ >> 20) & 1) ? "enabled" : "disabled");
+#endif
release_sata_clk:
+ /* disable SATA_PHY PLL */
+ writel((readl(IOMUXC_GPR13) & ~0x2), IOMUXC_GPR13);
clk_disable(sata_clk);
put_sata_clk:
clk_put(sata_clk);
return ret;
}
+#ifdef CONFIG_SATA_AHCI_PLATFORM
static void mx6q_sabresd_sata_exit(struct device *dev)
{
clk_disable(sata_clk);
.init = mx6q_sabresd_sata_init,
.exit = mx6q_sabresd_sata_exit,
};
+#endif
static void mx6q_sabresd_flexcan0_switch(int enable)
{
imx_add_viv_gpu(&imx6_gpu_data, &imx6q_gpu_pdata);
imx6q_sabresd_init_usb();
/* SATA is not supported by MX6DL/Solo */
- if (cpu_is_mx6q())
+ if (cpu_is_mx6q()) {
+#ifdef CONFIG_SATA_AHCI_PLATFORM
imx6q_add_ahci(0, &mx6q_sabresd_sata_data);
+#else
+ mx6q_sabresd_sata_init(NULL,
+ (void __iomem *)ioremap(MX6Q_SATA_BASE_ADDR, SZ_4K));
+#endif
+ }
imx6q_add_vpu();
imx6q_init_audio();
platform_device_register(&sabresd_vmmc_reg_devices);
/*
- * Copyright (C) 2011-2012 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
/* Reset HBA */
writel(HOST_RESET, addr + HOST_CTL);
- tmpdata = readl(addr + HOST_VERSIONR);
tmpdata = 0;
- while (readl(addr + HOST_VERSIONR) == 0) {
+ while (readl(addr + HOST_CAP) == 0) {
tmpdata++;
if (tmpdata > 100000) {
pr_err("Can't recover from RESET HBA!\n");
tmpdata |= HOST_CAP_SSS;
writel(tmpdata, addr + HOST_CAP);
}
- tmpdata = readl(addr + HOST_CAP);
if (!(readl(addr + HOST_PORTS_IMPL) & 0x1))
writel((readl(addr + HOST_PORTS_IMPL) | 0x1),
/* Release resources when there is no device on the port */
do {
if ((readl(addr + PORT_SATA_SR) & 0xF) == 0)
- msleep(25);
+ usleep_range(1000, 2000);
else
break;