fixup! ARM: LPAE: MMU setup for the 3-level page table format

Fix non-LPAE hardware breakage when KERNEL_START is not 2MB aligned.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Reported-by: Vasily Khoruzhick <anarsoul@gmail.com>

diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 1b6aa00131a6f2b684ef31d14b33cb8e7210dabe..a400a4dc57cf9919d50c2c3781f99b1ae22798b5 100644 (file)
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -217,7 +217,7 @@ __create_page_tables:
        mov     r3, r3, lsr #SECTION_SHIFT
        orr     r3, r7, r3, lsl #SECTION_SHIFT
        add     r0, r4,  #(KERNEL_START & 0xff000000) >> (SECTION_SHIFT - PMD_ORDER)
-       str     r3, [r0, #(KERNEL_START & 0x00e00000) >> (SECTION_SHIFT - PMD_ORDER)]!
+       str     r3, [r0, #((KERNEL_START & 0x00f00000) >> SECTION_SHIFT) << PMD_ORDER]!
        ldr     r6, =(KERNEL_END - 1)
        add     r0, r0, #1 << PMD_ORDER
        add     r6, r4, r6, lsr #(SECTION_SHIFT - PMD_ORDER)