powerpc/powernv: Sync header with firmware

The patch synchronizes firmware header file (opal.h) for PCI error
injection.

Signed-off-by: Mike Qiu <qiudayu@linux.vnet.ibm.com>
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index 7127b87a548dc9b35a17fbc8e6587d35de4c84e6..f1579419e5c8aad9f6d41e98be0fa106b6118d1a 100644 (file)
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -148,6 +148,7 @@ struct opal_sg_list {
 #define OPAL_SET_PARAM                         90
 #define OPAL_DUMP_RESEND                       91
 #define OPAL_DUMP_INFO2                                94
+#define OPAL_PCI_ERR_INJECT                    96
 #define OPAL_PCI_EEH_FREEZE_SET                        97
 #define OPAL_HANDLE_HMI                                98
 #define OPAL_REGISTER_DUMP_REGION              101
@@ -200,6 +201,35 @@ enum OpalPciErrorSeverity {
        OPAL_EEH_SEV_INF        = 5
 };
 
+enum OpalErrinjectType {
+       OPAL_ERR_INJECT_TYPE_IOA_BUS_ERR        = 0,
+       OPAL_ERR_INJECT_TYPE_IOA_BUS_ERR64      = 1,
+};
+
+enum OpalErrinjectFunc {
+       /* IOA bus specific errors */
+       OPAL_ERR_INJECT_FUNC_IOA_LD_MEM_ADDR    = 0,
+       OPAL_ERR_INJECT_FUNC_IOA_LD_MEM_DATA    = 1,
+       OPAL_ERR_INJECT_FUNC_IOA_LD_IO_ADDR     = 2,
+       OPAL_ERR_INJECT_FUNC_IOA_LD_IO_DATA     = 3,
+       OPAL_ERR_INJECT_FUNC_IOA_LD_CFG_ADDR    = 4,
+       OPAL_ERR_INJECT_FUNC_IOA_LD_CFG_DATA    = 5,
+       OPAL_ERR_INJECT_FUNC_IOA_ST_MEM_ADDR    = 6,
+       OPAL_ERR_INJECT_FUNC_IOA_ST_MEM_DATA    = 7,
+       OPAL_ERR_INJECT_FUNC_IOA_ST_IO_ADDR     = 8,
+       OPAL_ERR_INJECT_FUNC_IOA_ST_IO_DATA     = 9,
+       OPAL_ERR_INJECT_FUNC_IOA_ST_CFG_ADDR    = 10,
+       OPAL_ERR_INJECT_FUNC_IOA_ST_CFG_DATA    = 11,
+       OPAL_ERR_INJECT_FUNC_IOA_DMA_RD_ADDR    = 12,
+       OPAL_ERR_INJECT_FUNC_IOA_DMA_RD_DATA    = 13,
+       OPAL_ERR_INJECT_FUNC_IOA_DMA_RD_MASTER  = 14,
+       OPAL_ERR_INJECT_FUNC_IOA_DMA_RD_TARGET  = 15,
+       OPAL_ERR_INJECT_FUNC_IOA_DMA_WR_ADDR    = 16,
+       OPAL_ERR_INJECT_FUNC_IOA_DMA_WR_DATA    = 17,
+       OPAL_ERR_INJECT_FUNC_IOA_DMA_WR_MASTER  = 18,
+       OPAL_ERR_INJECT_FUNC_IOA_DMA_WR_TARGET  = 19,
+};
+
 enum OpalShpcAction {
        OPAL_SHPC_GET_LINK_STATE = 0,
        OPAL_SHPC_GET_SLOT_STATE = 1
@@ -820,6 +850,8 @@ int64_t opal_pci_eeh_freeze_clear(uint64_t phb_id, uint64_t pe_number,
                                  uint64_t eeh_action_token);
 int64_t opal_pci_eeh_freeze_set(uint64_t phb_id, uint64_t pe_number,
                                uint64_t eeh_action_token);
+int64_t opal_pci_err_inject(uint64_t phb_id, uint32_t pe_no, uint32_t type,
+                           uint32_t func, uint64_t addr, uint64_t mask);
 int64_t opal_pci_shpc(uint64_t phb_id, uint64_t shpc_action, uint8_t *state);
 
 

diff --git a/arch/powerpc/platforms/powernv/opal-wrappers.S b/arch/powerpc/platforms/powernv/opal-wrappers.S
index 571885556dfcddf06480ece645f84dcebb4f599d..15942b6ffd3abb5a3e02ea6500a007da21dff4ca 100644 (file)
--- a/arch/powerpc/platforms/powernv/opal-wrappers.S
+++ b/arch/powerpc/platforms/powernv/opal-wrappers.S
@@ -184,6 +184,7 @@ OPAL_CALL(opal_register_exception_handler,  OPAL_REGISTER_OPAL_EXCEPTION_HANDLER)
 OPAL_CALL(opal_pci_eeh_freeze_status,          OPAL_PCI_EEH_FREEZE_STATUS);
 OPAL_CALL(opal_pci_eeh_freeze_clear,           OPAL_PCI_EEH_FREEZE_CLEAR);
 OPAL_CALL(opal_pci_eeh_freeze_set,             OPAL_PCI_EEH_FREEZE_SET);
+OPAL_CALL(opal_pci_err_inject,                 OPAL_PCI_ERR_INJECT);
 OPAL_CALL(opal_pci_shpc,                       OPAL_PCI_SHPC);
 OPAL_CALL(opal_pci_phb_mmio_enable,            OPAL_PCI_PHB_MMIO_ENABLE);
 OPAL_CALL(opal_pci_set_phb_mem_window,         OPAL_PCI_SET_PHB_MEM_WINDOW);