dts: vt8500: Populate missing PLL nodes

Add the missing devicetree nodes for PLL's found on the WM8505, WM8650
and WM8850 SoCs.

Signed-off-by: Tony Prisk <linux@prisktech.co.nz>

diff --git a/arch/arm/boot/dts/wm8505.dtsi b/arch/arm/boot/dts/wm8505.dtsi
index 060b5fca2c16e115561f14de67531decfe0d008e..702d866b6f57dbba2aac76f34537a176587176a7 100644 (file)
--- a/arch/arm/boot/dts/wm8505.dtsi
+++ b/arch/arm/boot/dts/wm8505.dtsi
@@ -81,6 +81,13 @@
                                        clock-frequency = <25000000>;
                                };
 
+                               plla: plla {
+                                       #clock-cells = <0>;
+                                       compatible = "via,vt8500-pll-clock";
+                                       clocks = <&ref25>;
+                                       reg = <0x200>;
+                               };
+
                                pllb: pllb {
                                        #clock-cells = <0>;
                                        compatible = "via,vt8500-pll-clock";
@@ -88,6 +95,20 @@
                                        reg = <0x204>;
                                };
 
+                               pllc: pllc {
+                                       #clock-cells = <0>;
+                                       compatible = "via,vt8500-pll-clock";
+                                       clocks = <&ref25>;
+                                       reg = <0x208>;
+                               };
+
+                               plld: plld {
+                                       #clock-cells = <0>;
+                                       compatible = "via,vt8500-pll-clock";
+                                       clocks = <&ref25>;
+                                       reg = <0x20c>;
+                               };
+
                                clkuart0: uart0 {
                                        #clock-cells = <0>;
                                        compatible = "via,vt8500-device-clock";

diff --git a/arch/arm/boot/dts/wm8650.dtsi b/arch/arm/boot/dts/wm8650.dtsi
index 4fdae5ce4dfb6609ea4b5e20b8c9419b299116a3..46a4603c9c539610884bfbeeb3d3897fbf0ba9bd 100644 (file)
--- a/arch/arm/boot/dts/wm8650.dtsi
+++ b/arch/arm/boot/dts/wm8650.dtsi
@@ -92,6 +92,27 @@
                                        reg = <0x204>;
                                };
 
+                               pllc: pllc {
+                                       #clock-cells = <0>;
+                                       compatible = "wm,wm8650-pll-clock";
+                                       clocks = <&ref25>;
+                                       reg = <0x208>;
+                               };
+
+                               plld: plld {
+                                       #clock-cells = <0>;
+                                       compatible = "wm,wm8650-pll-clock";
+                                       clocks = <&ref25>;
+                                       reg = <0x20c>;
+                               };
+
+                               plle: plle {
+                                       #clock-cells = <0>;
+                                       compatible = "wm,wm8650-pll-clock";
+                                       clocks = <&ref25>;
+                                       reg = <0x210>;
+                               };
+
                                clkuart0: uart0 {
                                        #clock-cells = <0>;
                                        compatible = "via,vt8500-device-clock";

diff --git a/arch/arm/boot/dts/wm8850.dtsi b/arch/arm/boot/dts/wm8850.dtsi
index 9239c0a3aeb78f978fb4547a7435c179f7000ea6..59aaad98f5441732e643519c932747838f5c6128 100644 (file)
--- a/arch/arm/boot/dts/wm8850.dtsi
+++ b/arch/arm/boot/dts/wm8850.dtsi
@@ -95,6 +95,41 @@
                                        reg = <0x204>;
                                };
 
+                               pllc: pllc {
+                                       #clock-cells = <0>;
+                                       compatible = "wm,wm8850-pll-clock";
+                                       clocks = <&ref25>;
+                                       reg = <0x208>;
+                               };
+
+                               plld: plld {
+                                       #clock-cells = <0>;
+                                       compatible = "wm,wm8850-pll-clock";
+                                       clocks = <&ref25>;
+                                       reg = <0x20c>;
+                               };
+
+                               plle: plle {
+                                       #clock-cells = <0>;
+                                       compatible = "wm,wm8850-pll-clock";
+                                       clocks = <&ref25>;
+                                       reg = <0x210>;
+                               };
+
+                               pllf: pllf {
+                                       #clock-cells = <0>;
+                                       compatible = "wm,wm8850-pll-clock";
+                                       clocks = <&ref25>;
+                                       reg = <0x214>;
+                               };
+
+                               pllg: pllg {
+                                       #clock-cells = <0>;
+                                       compatible = "wm,wm8850-pll-clock";
+                                       clocks = <&ref25>;
+                                       reg = <0x218>;
+                               };
+
                                clkuart0: uart0 {
                                        #clock-cells = <0>;
                                        compatible = "via,vt8500-device-clock";