]> git.karo-electronics.de Git - linux-beck.git/commitdiff
MIPS: BMIPS: Add support UART, I2C, SATA device
authorJaedon Shin <jaedon.shin@gmail.com>
Wed, 6 Apr 2016 06:01:08 +0000 (15:01 +0900)
committerRalf Baechle <ralf@linux-mips.org>
Fri, 13 May 2016 12:02:04 +0000 (14:02 +0200)
Add UART, I2C, SATA device tree nodes on Broadcom BCM7xxx MIPS-based
platforms.

Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Dragan Stancevic <dragan.stancevic@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/13016/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
13 files changed:
arch/mips/boot/dts/brcm/bcm7125.dtsi
arch/mips/boot/dts/brcm/bcm7346.dtsi
arch/mips/boot/dts/brcm/bcm7358.dtsi
arch/mips/boot/dts/brcm/bcm7360.dtsi
arch/mips/boot/dts/brcm/bcm7362.dtsi
arch/mips/boot/dts/brcm/bcm7420.dtsi
arch/mips/boot/dts/brcm/bcm7425.dtsi
arch/mips/boot/dts/brcm/bcm7435.dtsi
arch/mips/boot/dts/brcm/bcm97125cbmb.dts
arch/mips/boot/dts/brcm/bcm97360svmb.dts
arch/mips/boot/dts/brcm/bcm97420c.dts
arch/mips/boot/dts/brcm/bcm97425svmb.dts
arch/mips/boot/dts/brcm/bcm97435svmb.dts

index 3ae16053a0c98763d8b8239eff18630105c2239a..550e1d9e3ee039eb06f14816bde573a03268ef4c 100644 (file)
                        compatible = "brcm,bcm7120-l2-intc";
                        reg = <0x406780 0x8>;
 
-                       brcm,int-map-mask = <0x44>;
+                       brcm,int-map-mask = <0x44>, <0xf000000>;
                        brcm,int-fwd-mask = <0x70000>;
 
                        interrupt-controller;
                        #interrupt-cells = <1>;
 
                        interrupt-parent = <&periph_intc>;
-                       interrupts = <18>;
+                       interrupts = <18>, <19>;
+                       interrupt-names = "upg_main", "upg_bsc";
                };
 
                sun_top_ctrl: syscon@404000 {
                        status = "disabled";
                };
 
+               uart1: serial@406b40 {
+                       compatible = "ns16550a";
+                       reg = <0x406b40 0x20>;
+                       reg-io-width = <0x4>;
+                       reg-shift = <0x2>;
+                       native-endian;
+                       interrupt-parent = <&periph_intc>;
+                       interrupts = <64>;
+                       clocks = <&uart_clk>;
+                       status = "disabled";
+               };
+
+               uart2: serial@406b80 {
+                       compatible = "ns16550a";
+                       reg = <0x406b80 0x20>;
+                       reg-io-width = <0x4>;
+                       reg-shift = <0x2>;
+                       native-endian;
+                       interrupt-parent = <&periph_intc>;
+                       interrupts = <65>;
+                       clocks = <&uart_clk>;
+                       status = "disabled";
+               };
+
+               bsca: i2c@406200 {
+                     clock-frequency = <390000>;
+                     compatible = "brcm,brcmstb-i2c";
+                     interrupt-parent = <&upg_irq0_intc>;
+                     reg = <0x406200 0x58>;
+                     interrupts = <24>;
+                     interrupt-names = "upg_bsca";
+                     status = "disabled";
+               };
+
+               bscb: i2c@406280 {
+                     clock-frequency = <390000>;
+                     compatible = "brcm,brcmstb-i2c";
+                     interrupt-parent = <&upg_irq0_intc>;
+                     reg = <0x406280 0x58>;
+                     interrupts = <25>;
+                     interrupt-names = "upg_bscb";
+                     status = "disabled";
+               };
+
+               bscc: i2c@406300 {
+                     clock-frequency = <390000>;
+                     compatible = "brcm,brcmstb-i2c";
+                     interrupt-parent = <&upg_irq0_intc>;
+                     reg = <0x406300 0x58>;
+                     interrupts = <26>;
+                     interrupt-names = "upg_bscc";
+                     status = "disabled";
+               };
+
+               bscd: i2c@406380 {
+                     clock-frequency = <390000>;
+                     compatible = "brcm,brcmstb-i2c";
+                     interrupt-parent = <&upg_irq0_intc>;
+                     reg = <0x406380 0x58>;
+                     interrupts = <27>;
+                     interrupt-names = "upg_bscd";
+                     status = "disabled";
+               };
+
                ehci0: usb@488300 {
                        compatible = "brcm,bcm7125-ehci", "generic-ehci";
                        reg = <0x488300 0x100>;
index be7991917d2950f0d48d0c04dfd9b478856fcc35..2a6efe6942b5c3190bcdf523ee33c272f67687a0 100644 (file)
@@ -24,8 +24,6 @@
 
        aliases {
                uart0 = &uart0;
-               uart1 = &uart1;
-               uart2 = &uart2;
        };
 
        cpu_intc: cpu_intc {
index 060805be619a23ac8812576a59a47fead67c98aa..ca57fb5eb1222e4e42066e4b99d5239a85121791 100644 (file)
@@ -18,8 +18,6 @@
 
        aliases {
                uart0 = &uart0;
-               uart1 = &uart1;
-               uart2 = &uart2;
        };
 
        cpu_intc: cpu_intc {
index bcdb09bfe07ba3ed86369f9938ac50db678d250f..1c0c3d438c7ac42b6df46523077c8804bdaf99b8 100644 (file)
@@ -18,8 +18,6 @@
 
        aliases {
                uart0 = &uart0;
-               uart1 = &uart1;
-               uart2 = &uart2;
        };
 
        cpu_intc: cpu_intc {
                        interrupts = <66>;
                        status = "disabled";
                };
+
+               sata: sata@181000 {
+                       compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
+                       reg-names = "ahci", "top-ctrl";
+                       reg = <0x181000 0xa9c>, <0x180020 0x1c>;
+                       interrupt-parent = <&periph_intc>;
+                       interrupts = <86>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+
+                       sata0: sata-port@0 {
+                               reg = <0>;
+                               phys = <&sata_phy0>;
+                       };
+
+                       sata1: sata-port@1 {
+                               reg = <1>;
+                               phys = <&sata_phy1>;
+                       };
+               };
+
+               sata_phy: sata-phy@180100 {
+                       compatible = "brcm,bcm7425-sata-phy", "brcm,phy-sata3";
+                       reg = <0x180100 0x0eff>;
+                       reg-names = "phy";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+
+                       sata_phy0: sata-phy@0 {
+                               reg = <0>;
+                               #phy-cells = <0>;
+                       };
+
+                       sata_phy1: sata-phy@1 {
+                               reg = <1>;
+                               #phy-cells = <0>;
+                       };
+               };
        };
 };
index d3b1b762e6c3e21c3e129aea6127f071d4417845..4153e0851b053f23c4cba4d4cb99e359d6e4ccdc 100644 (file)
@@ -24,8 +24,6 @@
 
        aliases {
                uart0 = &uart0;
-               uart1 = &uart1;
-               uart2 = &uart2;
        };
 
        cpu_intc: cpu_intc {
index 3302a1b8a5c9b841b46b931ab501327aa2099b30..0586bf662571e633609517c573e147dddc584c6f 100644 (file)
                        compatible = "brcm,bcm7120-l2-intc";
                        reg = <0x406780 0x8>;
 
-                       brcm,int-map-mask = <0x44>;
+                       brcm,int-map-mask = <0x44>, <0x1f000000>;
                        brcm,int-fwd-mask = <0x70000>;
 
                        interrupt-controller;
                        #interrupt-cells = <1>;
 
                        interrupt-parent = <&periph_intc>;
-                       interrupts = <18>;
+                       interrupts = <18>, <19>;
+                       interrupt-names = "upg_main", "upg_bsc";
                };
 
                sun_top_ctrl: syscon@404000 {
                        status = "disabled";
                };
 
+               uart1: serial@406b40 {
+                       compatible = "ns16550a";
+                       reg = <0x406b40 0x20>;
+                       reg-io-width = <0x4>;
+                       reg-shift = <0x2>;
+                       interrupt-parent = <&periph_intc>;
+                       interrupts = <64>;
+                       clocks = <&uart_clk>;
+                       status = "disabled";
+               };
+
+               uart2: serial@406b80 {
+                       compatible = "ns16550a";
+                       reg = <0x406b80 0x20>;
+                       reg-io-width = <0x4>;
+                       reg-shift = <0x2>;
+                       interrupt-parent = <&periph_intc>;
+                       interrupts = <65>;
+                       clocks = <&uart_clk>;
+                       status = "disabled";
+               };
+
+               bsca: i2c@406200 {
+                     clock-frequency = <390000>;
+                     compatible = "brcm,brcmstb-i2c";
+                     interrupt-parent = <&upg_irq0_intc>;
+                     reg = <0x406200 0x58>;
+                     interrupts = <24>;
+                     interrupt-names = "upg_bsca";
+                     status = "disabled";
+               };
+
+               bscb: i2c@406280 {
+                     clock-frequency = <390000>;
+                     compatible = "brcm,brcmstb-i2c";
+                     interrupt-parent = <&upg_irq0_intc>;
+                     reg = <0x406280 0x58>;
+                     interrupts = <25>;
+                     interrupt-names = "upg_bscb";
+                     status = "disabled";
+               };
+
+               bscc: i2c@406300 {
+                     clock-frequency = <390000>;
+                     compatible = "brcm,brcmstb-i2c";
+                     interrupt-parent = <&upg_irq0_intc>;
+                     reg = <0x406300 0x58>;
+                     interrupts = <26>;
+                     interrupt-names = "upg_bscc";
+                     status = "disabled";
+               };
+
+               bscd: i2c@406380 {
+                     clock-frequency = <390000>;
+                     compatible = "brcm,brcmstb-i2c";
+                     interrupt-parent = <&upg_irq0_intc>;
+                     reg = <0x406380 0x58>;
+                     interrupts = <27>;
+                     interrupt-names = "upg_bscd";
+                     status = "disabled";
+               };
+
+               bsce: i2c@406800 {
+                     clock-frequency = <390000>;
+                     compatible = "brcm,brcmstb-i2c";
+                     interrupt-parent = <&upg_irq0_intc>;
+                     reg = <0x406800 0x58>;
+                     interrupts = <28>;
+                     interrupt-names = "upg_bsce";
+                     status = "disabled";
+               };
+
                enet0: ethernet@468000 {
                        phy-mode = "internal";
                        phy-handle = <&phy1>;
index 15b27aae15a9620e439de3e13162e16b2e8306b1..85339791eb2e5c120a023df5f66ded718c58d4bd 100644 (file)
                        compatible = "brcm,bcm7120-l2-intc";
                        reg = <0x406780 0x8>;
 
-                       brcm,int-map-mask = <0x44>;
+                       brcm,int-map-mask = <0x44>, <0x7000000>;
                        brcm,int-fwd-mask = <0x70000>;
 
                        interrupt-controller;
                        #interrupt-cells = <1>;
 
                        interrupt-parent = <&periph_intc>;
-                       interrupts = <55>;
+                       interrupts = <55>, <53>;
+                       interrupt-names = "upg_main", "upg_bsc";
+               };
+
+               upg_aon_irq0_intc: upg_aon_irq0_intc@409480 {
+                       compatible = "brcm,bcm7120-l2-intc";
+                       reg = <0x409480 0x8>;
+
+                       brcm,int-map-mask = <0x40>, <0x18000000>, <0x100000>;
+                       brcm,int-fwd-mask = <0>;
+                       brcm,irq-can-wake;
+
+                       interrupt-controller;
+                       #interrupt-cells = <1>;
+
+                       interrupt-parent = <&periph_intc>;
+                       interrupts = <56>, <54>, <59>;
+                       interrupt-names = "upg_main_aon", "upg_bsc_aon",
+                                         "upg_spi";
                };
 
                sun_top_ctrl: syscon@404000 {
                        status = "disabled";
                };
 
+               uart1: serial@406b40 {
+                       compatible = "ns16550a";
+                       reg = <0x406b40 0x20>;
+                       reg-io-width = <0x4>;
+                       reg-shift = <0x2>;
+                       interrupt-parent = <&periph_intc>;
+                       interrupts = <62>;
+                       clocks = <&uart_clk>;
+                       status = "disabled";
+               };
+
+               uart2: serial@406b80 {
+                       compatible = "ns16550a";
+                       reg = <0x406b80 0x20>;
+                       reg-io-width = <0x4>;
+                       reg-shift = <0x2>;
+                       interrupt-parent = <&periph_intc>;
+                       interrupts = <63>;
+                       clocks = <&uart_clk>;
+                       status = "disabled";
+               };
+
+               bsca: i2c@409180 {
+                     clock-frequency = <390000>;
+                     compatible = "brcm,brcmstb-i2c";
+                     interrupt-parent = <&upg_aon_irq0_intc>;
+                     reg = <0x409180 0x58>;
+                     interrupts = <27>;
+                     interrupt-names = "upg_bsca";
+                     status = "disabled";
+               };
+
+               bscb: i2c@409400 {
+                     clock-frequency = <390000>;
+                     compatible = "brcm,brcmstb-i2c";
+                     interrupt-parent = <&upg_aon_irq0_intc>;
+                     reg = <0x409400 0x58>;
+                     interrupts = <28>;
+                     interrupt-names = "upg_bscb";
+                     status = "disabled";
+               };
+
+               bscc: i2c@406200 {
+                     clock-frequency = <390000>;
+                     compatible = "brcm,brcmstb-i2c";
+                     interrupt-parent = <&upg_irq0_intc>;
+                     reg = <0x406200 0x58>;
+                     interrupts = <24>;
+                     interrupt-names = "upg_bscc";
+                     status = "disabled";
+               };
+
+               bscd: i2c@406280 {
+                     clock-frequency = <390000>;
+                     compatible = "brcm,brcmstb-i2c";
+                     interrupt-parent = <&upg_irq0_intc>;
+                     reg = <0x406280 0x58>;
+                     interrupts = <25>;
+                     interrupt-names = "upg_bscd";
+                     status = "disabled";
+               };
+
+               bsce: i2c@406300 {
+                     clock-frequency = <390000>;
+                     compatible = "brcm,brcmstb-i2c";
+                     interrupt-parent = <&upg_irq0_intc>;
+                     reg = <0x406300 0x58>;
+                     interrupts = <26>;
+                     interrupt-names = "upg_bsce";
+                     status = "disabled";
+               };
+
                enet0: ethernet@b80000 {
                        phy-mode = "internal";
                        phy-handle = <&phy1>;
index a1757efe612f220a1a488072500fc271af9d087a..cce752b270553e29b00b2185e61e4b2ad2ca3283 100644 (file)
                        compatible = "brcm,bcm7120-l2-intc";
                        reg = <0x406780 0x8>;
 
-                       brcm,int-map-mask = <0x44>;
+                       brcm,int-map-mask = <0x44>, <0x7000000>;
                        brcm,int-fwd-mask = <0x70000>;
 
                        interrupt-controller;
                        #interrupt-cells = <1>;
 
                        interrupt-parent = <&periph_intc>;
-                       interrupts = <60>;
+                       interrupts = <60>, <58>;
+                       interrupt-names = "upg_main", "upg_bsc";
+               };
+
+               upg_aon_irq0_intc: upg_aon_irq0_intc@409480 {
+                       compatible = "brcm,bcm7120-l2-intc";
+                       reg = <0x409480 0x8>;
+
+                       brcm,int-map-mask = <0x40>, <0x18000000>, <0x100000>;
+                       brcm,int-fwd-mask = <0>;
+                       brcm,irq-can-wake;
+
+                       interrupt-controller;
+                       #interrupt-cells = <1>;
+
+                       interrupt-parent = <&periph_intc>;
+                       interrupts = <61>, <59>, <64>;
+                       interrupt-names = "upg_main_aon", "upg_bsc_aon",
+                                         "upg_spi";
                };
 
                sun_top_ctrl: syscon@404000 {
                        status = "disabled";
                };
 
+               uart1: serial@406b40 {
+                       compatible = "ns16550a";
+                       reg = <0x406b40 0x20>;
+                       reg-io-width = <0x4>;
+                       reg-shift = <0x2>;
+                       interrupt-parent = <&periph_intc>;
+                       interrupts = <67>;
+                       clocks = <&uart_clk>;
+                       status = "disabled";
+               };
+
+               uart2: serial@406b80 {
+                       compatible = "ns16550a";
+                       reg = <0x406b80 0x20>;
+                       reg-io-width = <0x4>;
+                       reg-shift = <0x2>;
+                       interrupt-parent = <&periph_intc>;
+                       interrupts = <68>;
+                       clocks = <&uart_clk>;
+                       status = "disabled";
+               };
+
+               bsca: i2c@406300 {
+                     clock-frequency = <390000>;
+                     compatible = "brcm,brcmstb-i2c";
+                     interrupt-parent = <&upg_irq0_intc>;
+                     reg = <0x406300 0x58>;
+                     interrupts = <26>;
+                     interrupt-names = "upg_bsca";
+                     status = "disabled";
+               };
+
+               bscb: i2c@409400 {
+                     clock-frequency = <390000>;
+                     compatible = "brcm,brcmstb-i2c";
+                     interrupt-parent = <&upg_aon_irq0_intc>;
+                     reg = <0x409400 0x58>;
+                     interrupts = <28>;
+                     interrupt-names = "upg_bscb";
+                     status = "disabled";
+               };
+
+               bscc: i2c@406200 {
+                     clock-frequency = <390000>;
+                     compatible = "brcm,brcmstb-i2c";
+                     interrupt-parent = <&upg_irq0_intc>;
+                     reg = <0x406200 0x58>;
+                     interrupts = <24>;
+                     interrupt-names = "upg_bscc";
+                     status = "disabled";
+               };
+
+               bscd: i2c@406280 {
+                     clock-frequency = <390000>;
+                     compatible = "brcm,brcmstb-i2c";
+                     interrupt-parent = <&upg_irq0_intc>;
+                     reg = <0x406280 0x58>;
+                     interrupts = <25>;
+                     interrupt-names = "upg_bscd";
+                     status = "disabled";
+               };
+
+               bsce: i2c@409180 {
+                     clock-frequency = <390000>;
+                     compatible = "brcm,brcmstb-i2c";
+                     interrupt-parent = <&upg_aon_irq0_intc>;
+                     reg = <0x409180 0x58>;
+                     interrupts = <27>;
+                     interrupt-names = "upg_bsce";
+                     status = "disabled";
+               };
+
                enet0: ethernet@b80000 {
                        phy-mode = "internal";
                        phy-handle = <&phy1>;
                        interrupts = <78>;
                        status = "disabled";
                };
+
+               sata: sata@181000 {
+                       compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
+                       reg-names = "ahci", "top-ctrl";
+                       reg = <0x181000 0xa9c>, <0x180020 0x1c>;
+                       interrupt-parent = <&periph_intc>;
+                       interrupts = <45>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+
+                       sata0: sata-port@0 {
+                               reg = <0>;
+                               phys = <&sata_phy0>;
+                       };
+
+                       sata1: sata-port@1 {
+                               reg = <1>;
+                               phys = <&sata_phy1>;
+                       };
+               };
+
+               sata_phy: sata-phy@180100 {
+                       compatible = "brcm,bcm7425-sata-phy", "brcm,phy-sata3";
+                       reg = <0x180100 0x0eff>;
+                       reg-names = "phy";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+
+                       sata_phy0: sata-phy@0 {
+                               reg = <0>;
+                               #phy-cells = <0>;
+                       };
+
+                       sata_phy1: sata-phy@1 {
+                               reg = <1>;
+                               #phy-cells = <0>;
+                       };
+               };
        };
 };
index e046b1109eabeeb111a2e9a736af99583ee4ce50..f2449d147c6da9177010d869f90ac0d1ead9e468 100644 (file)
        status = "okay";
 };
 
+&uart1 {
+       status = "okay";
+};
+
+&uart2 {
+       status = "okay";
+};
+
+&bsca {
+       status = "okay";
+};
+
+&bscb {
+       status = "okay";
+};
+
+&bscc {
+       status = "okay";
+};
+
+&bscd {
+       status = "okay";
+};
+
 /* FIXME: USB is wonky; disable it for now */
 &ehci0 {
        status = "disabled";
index d48462e091f176e6be77eeb301f769b40ef1afbc..73124be9548aeff58f1fd507883c3f2637808a55 100644 (file)
 &ohci0 {
        status = "okay";
 };
+
+&sata {
+       status = "okay";
+};
+
+&sata_phy {
+       status = "okay";
+};
index 67fe1f3a38918f472a01cdab4a38d90cf31cac71..600d57abee05c1bb8e8f22c57d67f1fb7a509a8c 100644 (file)
        status = "okay";
 };
 
+&uart1 {
+       status = "okay";
+};
+
+&uart2 {
+       status = "okay";
+};
+
+&bsca {
+       status = "okay";
+};
+
+&bscb {
+       status = "okay";
+};
+
+&bscc {
+       status = "okay";
+};
+
+&bscd {
+       status = "okay";
+};
+
+&bsce {
+       status = "okay";
+};
+
 /* FIXME: MAC driver comes up but cannot attach to PHY */
 &enet0 {
        status = "disabled";
index 689c68a4f9c8b821ec2acc8c48e2e386526957dc..119c714805cbc8257f1addc89a9b17289ffa73ec 100644 (file)
        status = "okay";
 };
 
+&uart1 {
+       status = "okay";
+};
+
+&uart2 {
+       status = "okay";
+};
+
+&bsca {
+       status = "okay";
+};
+
+&bscb {
+       status = "okay";
+};
+
+&bscc {
+       status = "okay";
+};
+
+&bscd {
+       status = "okay";
+};
+
+&bsce {
+       status = "okay";
+};
+
 &enet0 {
        status = "okay";
 };
index 68f486eba3f7051c4792ca86011e239af4ed3658..43e3ba27f07ba2ddc6935a7f80ba4a2b238f67ca 100644 (file)
        status = "okay";
 };
 
+&uart1 {
+       status = "okay";
+};
+
+&uart2 {
+       status = "okay";
+};
+
+&bsca {
+       status = "okay";
+};
+
+&bscb {
+       status = "okay";
+};
+
+&bscc {
+       status = "okay";
+};
+
+&bscd {
+       status = "okay";
+};
+
+&bsce {
+       status = "okay";
+};
+
 &enet0 {
        status = "okay";
 };
 &ohci3 {
        status = "okay";
 };
+
+&sata {
+       status = "okay";
+};
+
+&sata_phy {
+       status = "okay";
+};