Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-arm

Pull ARM fixes from Russell King.

* 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
  ARM: 7616/1: cache-l2x0: aurora: Use writel_relaxed instead of writel
  ARM: 7615/1: cache-l2x0: aurora: Invalidate during clean operation with WT enable
  ARM: 7614/1: mm: fix wrong branch from Cortex-A9 to PJ4b
  ARM: 7612/1: imx: Do not select some errata that depends on !ARCH_MULTIPLATFORM
  ARM: 7611/1: VIC: fix bug in VIC irqdomain code
  ARM: 7610/1: versatile: bump IRQ numbers
  ARM: 7609/1: disable errata work-arounds which access secure registers
  ARM: 7608/1: l2x0: Only set .set_debug on PL310 r3p0 and earlier

diff --combined arch/arm/Kconfig
index ab864d9545dd5283a0337237daf8ce86e567ca10,432921ecfec894ebdfcac6c3a5e31ee69f19f61f..67874b82a4edf318ae3718ae6137393140405586
--- 1/arch/arm/Kconfig
--- 2/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@@ -371,6 -371,7 +371,6 @@@ config ARCH_CNS3XX
  config ARCH_CLPS711X
        bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
        select ARCH_REQUIRE_GPIOLIB
 -      select ARCH_USES_GETTIMEOFFSET
        select AUTO_ZRELADDR
        select CLKDEV_LOOKUP
        select COMMON_CLK
@@@ -1229,6 -1230,7 +1229,7 @@@ config ARM_ERRATA_43097
  config ARM_ERRATA_458693
        bool "ARM errata: Processor deadlock when a false hazard is created"
        depends on CPU_V7
+       depends on !ARCH_MULTIPLATFORM
        help
          This option enables the workaround for the 458693 Cortex-A8 (r2p0)
          erratum. For very specific sequences of memory operations, it is
@@@ -1242,6 -1244,7 +1243,7 @@@
  config ARM_ERRATA_460075
        bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
        depends on CPU_V7
+       depends on !ARCH_MULTIPLATFORM
        help
          This option enables the workaround for the 460075 Cortex-A8 (r2p0)
          erratum. Any asynchronous access to the L2 cache may encounter a
@@@ -1254,6 -1257,7 +1256,7 @@@
  config ARM_ERRATA_742230
        bool "ARM errata: DMB operation may be faulty"
        depends on CPU_V7 && SMP
+       depends on !ARCH_MULTIPLATFORM
        help
          This option enables the workaround for the 742230 Cortex-A9
          (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
@@@ -1266,6 -1270,7 +1269,7 @@@
  config ARM_ERRATA_742231
        bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
        depends on CPU_V7 && SMP
+       depends on !ARCH_MULTIPLATFORM
        help
          This option enables the workaround for the 742231 Cortex-A9
          (r2p0..r2p2) erratum. Under certain conditions, specific to the
@@@ -1316,6 -1321,7 +1320,7 @@@ config PL310_ERRATA_72791
  config ARM_ERRATA_743622
        bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
        depends on CPU_V7
+       depends on !ARCH_MULTIPLATFORM
        help
          This option enables the workaround for the 743622 Cortex-A9
          (r2p*) erratum. Under very rare conditions, a faulty
@@@ -1329,6 -1335,7 +1334,7 @@@
  config ARM_ERRATA_751472
        bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
        depends on CPU_V7
+       depends on !ARCH_MULTIPLATFORM
        help
          This option enables the workaround for the 751472 Cortex-A9 (prior
          to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the