usb: dwc3: gadget: move AcceptU1Ena and AcceptU2Ena to Reset IRQ

According to the databook, the DWC3 Core will
reset those bits to 0 on USB Bus Reset. This
means we must re-enable those bits on every
reset interrupt.

Because we will always get a Reset interrupt
after loading a gadget driver, we can, instead
of re-enabling something that was just lost,
move the handling of those bits to the Reset
Interrupt.

This patch fixes USB30CV U1/U2 Test.

Signed-off-by: Gerard CAUVY <g-cauvy1@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>

diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index 054ee5ec5c130b824b895628db0136d9c6f1c876..a9fc7c4a5a2029427b32eb9a629b0a19abff32fb 100644 (file)
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -2006,6 +2006,7 @@ static void dwc3_gadget_reset_interrupt(struct dwc3 *dwc)
        reg = dwc3_readl(dwc->regs, DWC3_DCTL);
        reg &= ~DWC3_DCTL_TSTCTRL_MASK;
        reg &= ~(DWC3_DCTL_INITU1ENA | DWC3_DCTL_INITU2ENA);
+       reg |= (DWC3_DCTL_ACCEPTU1ENA | DWC3_DCTL_ACCEPTU2ENA);
        dwc3_writel(dwc->regs, DWC3_DCTL, reg);
        dwc->test_mode = false;
 
@@ -2410,10 +2411,6 @@ int __devinit dwc3_gadget_init(struct dwc3 *dwc)
        reg |= DWC3_DCFG_LPM_CAP;
        dwc3_writel(dwc->regs, DWC3_DCFG, reg);
 
-       reg = dwc3_readl(dwc->regs, DWC3_DCTL);
-       reg |= DWC3_DCTL_ACCEPTU1ENA | DWC3_DCTL_ACCEPTU2ENA;
-       dwc3_writel(dwc->regs, DWC3_DCTL, reg);
-
        /* Enable all but Start and End of Frame IRQs */
        reg = (DWC3_DEVTEN_VNDRDEVTSTRCVEDEN |
                        DWC3_DEVTEN_EVNTOVERFLOWEN |