ARM: dtsi: enable ahci sata on imx6q platforms

Only imx6q has the ahci sata controller, enable
it on imx6q platforms.

Signed-off-by: Richard Zhu <r65037@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

diff --git a/arch/arm/boot/dts/imx6q-sabreauto.dts b/arch/arm/boot/dts/imx6q-sabreauto.dts
index 9e634ccb798fe16ae13696409d33dd0c55f6c56d..334b9247e78cefff1e5e30e4d033cad89c5d5d11 100644 (file)
--- a/arch/arm/boot/dts/imx6q-sabreauto.dts
+++ b/arch/arm/boot/dts/imx6q-sabreauto.dts
@@ -19,3 +19,7 @@
        model = "Freescale i.MX6 Quad SABRE Automotive Board";
        compatible = "fsl,imx6q-sabreauto", "fsl,imx6q";
 };
+
+&sata {
+       status = "okay";
+};

diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts
index 5751cb86c2aa8f1e1598f83dcab79784d950a411..3530280f5150e43d826987ab225e4b53930b33aa 100644 (file)
--- a/arch/arm/boot/dts/imx6q-sabrelite.dts
+++ b/arch/arm/boot/dts/imx6q-sabrelite.dts
@@ -65,6 +65,10 @@
        };
 };
 
+&sata {
+       status = "okay";
+};
+
 &ecspi1 {
        fsl,spi-num-chipselects = <1>;
        cs-gpios = <&gpio3 19 0>;

diff --git a/arch/arm/boot/dts/imx6q-sabresd.dts b/arch/arm/boot/dts/imx6q-sabresd.dts
index f1a4a69caf6d7d1980b2f977b9a069e73b6af766..e7132f718993e39d82caf0ddb6c40a66caef9856 100644 (file)
--- a/arch/arm/boot/dts/imx6q-sabresd.dts
+++ b/arch/arm/boot/dts/imx6q-sabresd.dts
@@ -35,3 +35,7 @@
 &mxcfb4 {
        status = "okay";
 };
+
+&sata {
+       status = "okay";
+};

diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index 70c5990191d0653d504dc4b7e26d24050da6620b..b4470bda18f722f90b92e6ee5fe97700c1f4a3b4 100644 (file)
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -126,6 +126,15 @@
                        };
                };
 
+               sata: sata@02200000 {
+                       compatible = "fsl,imx6q-ahci";
+                       reg = <0x02200000 0x4000>;
+                       interrupts = <0 39 0x04>;
+                       clocks =  <&clks 154>, <&clks 187>, <&clks 105>;
+                       clock-names = "sata", "sata_ref", "ahb";
+                       status = "disabled";
+               };
+
                ipu2: ipu@02800000 {
                        compatible = "fsl,imx6q-ipu";
                        reg = <0x02800000 0x400000>;