drm/exynos: add global macro for the default primary plane

Define DEFAULT_WIN as zero to help set the primary plane on all CRTCs.
Some CRTCs were defining a variable to store the default window, but that
is not necessary as the default (primary) window is always the window zero.

Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: Inki Dae <inki.dae@samsung.com>

diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
index b3c730770b0f07e4cf3885ceb2939eae062ff6bd..f467ce05f6cd7d5a6e91844b4e88caa4005500ff 100644 (file)
--- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
@@ -33,7 +33,6 @@ struct decon_context {
        struct exynos_drm_plane         planes[WINDOWS_NR];
        void __iomem                    *addr;
        struct clk                      *clks[6];
-       unsigned int                    default_win;
        unsigned long                   irq_flags;
        int                             pipe;
        bool                            suspended;
@@ -501,7 +500,7 @@ static int decon_bind(struct device *dev, struct device *master, void *data)
        ctx->pipe = priv->pipe++;
 
        for (zpos = 0; zpos < WINDOWS_NR; zpos++) {
-               type = (zpos == ctx->default_win) ? DRM_PLANE_TYPE_PRIMARY :
+               type = (zpos == DEFAULT_WIN) ? DRM_PLANE_TYPE_PRIMARY :
                                                        DRM_PLANE_TYPE_OVERLAY;
                ret = exynos_plane_init(drm_dev, &ctx->planes[zpos],
                                1 << ctx->pipe, type, decon_formats,
@@ -510,7 +509,7 @@ static int decon_bind(struct device *dev, struct device *master, void *data)
                        return ret;
        }
 
-       exynos_plane = &ctx->planes[ctx->default_win];
+       exynos_plane = &ctx->planes[DEFAULT_WIN];
        ctx->crtc = exynos_drm_crtc_create(drm_dev, &exynos_plane->base,
                                        ctx->pipe, EXYNOS_DISPLAY_TYPE_LCD,
                                        &decon_crtc_ops, ctx);
@@ -607,7 +606,6 @@ static int exynos5433_decon_probe(struct platform_device *pdev)
        if (!ctx)
                return -ENOMEM;
 
-       ctx->default_win = 0;
        ctx->suspended = true;
        ctx->dev = dev;
        if (of_get_child_by_name(dev->of_node, "i80-if-timings"))

diff --git a/drivers/gpu/drm/exynos/exynos7_drm_decon.c b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
index e6cbaca821a47b9740f4d35d7cfce00bbd0aa11a..bd0f96bbd3f6674ceb23c1d43488ba6eeb012c85 100644 (file)
--- a/drivers/gpu/drm/exynos/exynos7_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
@@ -51,7 +51,6 @@ struct decon_context {
        struct clk                      *eclk;
        struct clk                      *vclk;
        void __iomem                    *regs;
-       unsigned int                    default_win;
        unsigned long                   irq_flags;
        bool                            i80_if;
        bool                            suspended;
@@ -690,7 +689,7 @@ static int decon_bind(struct device *dev, struct device *master, void *data)
        }
 
        for (zpos = 0; zpos < WINDOWS_NR; zpos++) {
-               type = (zpos == ctx->default_win) ? DRM_PLANE_TYPE_PRIMARY :
+               type = (zpos == DEFAULT_WIN) ? DRM_PLANE_TYPE_PRIMARY :
                                                DRM_PLANE_TYPE_OVERLAY;
                ret = exynos_plane_init(drm_dev, &ctx->planes[zpos],
                                        1 << ctx->pipe, type, decon_formats,
@@ -699,7 +698,7 @@ static int decon_bind(struct device *dev, struct device *master, void *data)
                        return ret;
        }
 
-       exynos_plane = &ctx->planes[ctx->default_win];
+       exynos_plane = &ctx->planes[DEFAULT_WIN];
        ctx->crtc = exynos_drm_crtc_create(drm_dev, &exynos_plane->base,
                                           ctx->pipe, EXYNOS_DISPLAY_TYPE_LCD,
                                           &decon_crtc_ops, ctx);

diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h b/drivers/gpu/drm/exynos/exynos_drm_drv.h
index 6c717ba672dbc8ad41fcc3adedfc82c32c6de5bc..638fc43079a8f7d7f6501ba65654da2c791df253 100644 (file)
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h
@@ -22,6 +22,8 @@
 #define MAX_PLANE      5
 #define MAX_FB_BUFFER  4
 
+#define DEFAULT_WIN    0
+
 #define to_exynos_crtc(x)      container_of(x, struct exynos_drm_crtc, base)
 #define to_exynos_plane(x)     container_of(x, struct exynos_drm_plane, base)
 

diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index 3d1aba67758baf4a4e25e4c383e300d5a6dd954e..7505a71c695f0a0cf0294eb1914fa4d2c5017549 100644 (file)
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -153,7 +153,6 @@ struct fimd_context {
        struct clk                      *lcd_clk;
        void __iomem                    *regs;
        struct regmap                   *sysreg;
-       unsigned int                    default_win;
        unsigned long                   irq_flags;
        u32                             vidcon0;
        u32                             vidcon1;
@@ -949,7 +948,7 @@ static int fimd_bind(struct device *dev, struct device *master, void *data)
        ctx->pipe = priv->pipe++;
 
        for (zpos = 0; zpos < WINDOWS_NR; zpos++) {
-               type = (zpos == ctx->default_win) ? DRM_PLANE_TYPE_PRIMARY :
+               type = (zpos == DEFAULT_WIN) ? DRM_PLANE_TYPE_PRIMARY :
                                                DRM_PLANE_TYPE_OVERLAY;
                ret = exynos_plane_init(drm_dev, &ctx->planes[zpos],
                                        1 << ctx->pipe, type, fimd_formats,
@@ -958,7 +957,7 @@ static int fimd_bind(struct device *dev, struct device *master, void *data)
                        return ret;
        }
 
-       exynos_plane = &ctx->planes[ctx->default_win];
+       exynos_plane = &ctx->planes[DEFAULT_WIN];
        ctx->crtc = exynos_drm_crtc_create(drm_dev, &exynos_plane->base,
                                           ctx->pipe, EXYNOS_DISPLAY_TYPE_LCD,
                                           &fimd_crtc_ops, ctx);

diff --git a/drivers/gpu/drm/exynos/exynos_drm_vidi.c b/drivers/gpu/drm/exynos/exynos_drm_vidi.c
index 75718e1bc3dd29eb41df43b43922548c77240b4c..fc57687794459961db1d206dc6efb72e7b25f4e0 100644 (file)
--- a/drivers/gpu/drm/exynos/exynos_drm_vidi.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_vidi.c
@@ -42,7 +42,6 @@ struct vidi_context {
        struct exynos_drm_plane         planes[WINDOWS_NR];
        struct edid                     *raw_edid;
        unsigned int                    clkdiv;
-       unsigned int                    default_win;
        unsigned long                   irq_flags;
        unsigned int                    connected;
        bool                            vblank_on;
@@ -446,7 +445,7 @@ static int vidi_bind(struct device *dev, struct device *master, void *data)
        vidi_ctx_initialize(ctx, drm_dev);
 
        for (zpos = 0; zpos < WINDOWS_NR; zpos++) {
-               type = (zpos == ctx->default_win) ? DRM_PLANE_TYPE_PRIMARY :
+               type = (zpos == DEFAULT_WIN) ? DRM_PLANE_TYPE_PRIMARY :
                                                DRM_PLANE_TYPE_OVERLAY;
                ret = exynos_plane_init(drm_dev, &ctx->planes[zpos],
                                        1 << ctx->pipe, type, formats,
@@ -455,7 +454,7 @@ static int vidi_bind(struct device *dev, struct device *master, void *data)
                        return ret;
        }
 
-       exynos_plane = &ctx->planes[ctx->default_win];
+       exynos_plane = &ctx->planes[DEFAULT_WIN];
        ctx->crtc = exynos_drm_crtc_create(drm_dev, &exynos_plane->base,
                                           ctx->pipe, EXYNOS_DISPLAY_TYPE_VIDI,
                                           &vidi_crtc_ops, ctx);
@@ -507,7 +506,6 @@ static int vidi_probe(struct platform_device *pdev)
        if (!ctx)
                return -ENOMEM;
 
-       ctx->default_win = 0;
        ctx->pdev = pdev;
 
        INIT_WORK(&ctx->work, vidi_fake_vblank_handler);

diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c
index ecf956c7020a53ea6f05ed83d78e7e87cd2b7a1f..f83e27da7e09f8e134414786b85b6cce3f138e0d 100644 (file)
--- a/drivers/gpu/drm/exynos/exynos_mixer.c
+++ b/drivers/gpu/drm/exynos/exynos_mixer.c
@@ -42,7 +42,6 @@
 #include "exynos_mixer.h"
 
 #define MIXER_WIN_NR           3
-#define MIXER_DEFAULT_WIN      0
 #define VP_DEFAULT_WIN         2
 
 /* The pixelformats that are natively supported by the mixer. */
@@ -600,7 +599,7 @@ static void mixer_graph_buffer(struct mixer_context *ctx,
 
        /* setup display size */
        if (ctx->mxr_ver == MXR_VER_128_0_0_184 &&
-               win == MIXER_DEFAULT_WIN) {
+               win == DEFAULT_WIN) {
                val  = MXR_MXR_RES_HEIGHT(mode->vdisplay);
                val |= MXR_MXR_RES_WIDTH(mode->hdisplay);
                mixer_reg_write(res, MXR_RESOLUTION, val);
@@ -1197,7 +1196,7 @@ static int mixer_bind(struct device *dev, struct device *manager, void *data)
                const uint32_t *formats;
                unsigned int fcount;
 
-               type = (zpos == MIXER_DEFAULT_WIN) ? DRM_PLANE_TYPE_PRIMARY :
+               type = (zpos == DEFAULT_WIN) ? DRM_PLANE_TYPE_PRIMARY :
                                                DRM_PLANE_TYPE_OVERLAY;
                if (zpos < VP_DEFAULT_WIN) {
                        formats = mixer_formats;
@@ -1214,7 +1213,7 @@ static int mixer_bind(struct device *dev, struct device *manager, void *data)
                        return ret;
        }
 
-       exynos_plane = &ctx->planes[MIXER_DEFAULT_WIN];
+       exynos_plane = &ctx->planes[DEFAULT_WIN];
        ctx->crtc = exynos_drm_crtc_create(drm_dev, &exynos_plane->base,
                                           ctx->pipe, EXYNOS_DISPLAY_TYPE_HDMI,
                                           &mixer_crtc_ops, ctx);