]> git.karo-electronics.de Git - karo-tx-linux.git/commitdiff
ENGR00226392 MX6SL Bluetooth: Setup uart2 to enable bluetooth
authorLionel Xu <Lionel.Xu@freescale.com>
Sat, 29 Sep 2012 08:56:04 +0000 (16:56 +0800)
committerLothar Waßmann <LW@KARO-electronics.de>
Fri, 24 May 2013 06:35:31 +0000 (08:35 +0200)
Setup uart2 to enable bluetooth basic functionality on mx6sl evk board.
DMA mode was not enabled for uart2 operation.

Signed-off-by: Lionel Xu <Lionel.Xu@freescale.com>
arch/arm/mach-mx6/board-mx6sl_common.h
arch/arm/mach-mx6/board-mx6sl_evk.c
arch/arm/mach-mx6/devices-imx6q.h
arch/arm/plat-mxc/devices/platform-imx-uart.c
arch/arm/plat-mxc/include/mach/mx6.h

index 6ac54736443b95e69f46f80150ec9d52520eda3a..4a04cbea069447bae6557361bcf77526edd9045a 100644 (file)
@@ -416,6 +416,13 @@ static iomux_v3_cfg_t mx6sl_brd_elan_pads[] = {
        MX6SL_PAD_EPDC_PWRCTRL2__GPIO_2_9,      /* CE */
        MX6SL_PAD_KEY_COL6__GPIO_4_4,           /* RST */
 };
+       /* uart2 pins */
+static iomux_v3_cfg_t mx6sl_uart2_pads[] = {
+       MX6SL_PAD_SD2_DAT5__UART2_TXD,
+       MX6SL_PAD_SD2_DAT4__UART2_RXD,
+       MX6SL_PAD_SD2_DAT6__UART2_RTS,
+       MX6SL_PAD_SD2_DAT7__UART2_CTS,
+};
 
 #define MX6SL_USDHC_8BIT_PAD_SETTING(id, speed)        \
 mx6sl_sd##id##_##speed##mhz[] = {              \
index 5be1922ed300eb68184615d8d9357f5440814ad6..e656638c31d673aef0182170a5a21c3a53ad43a8 100644 (file)
@@ -754,6 +754,12 @@ static struct viv_gpu_platform_data imx6q_gpu_pdata __initdata = {
 
 void __init early_console_setup(unsigned long base, struct clk *clk);
 
+static const struct imxuart_platform_data mx6sl_evk_uart1_data __initconst = {
+       .flags      = IMXUART_HAVE_RTSCTS | IMXUART_SDMA,
+       .dma_req_rx = MX6Q_DMA_REQ_UART2_RX,
+       .dma_req_tx = MX6Q_DMA_REQ_UART2_TX,
+};
+
 static inline void mx6_evk_init_uart(void)
 {
        imx6q_add_imx_uart(0, NULL); /* DEBUG UART1 */
@@ -1356,6 +1362,20 @@ static void mx6_snvs_poweroff(void)
        writel(value | 0x60, mx6_snvs_base + SNVS_LPCR);
 }
 
+static int uart2_enabled;
+static int __init uart2_setup(char * __unused)
+{
+       uart2_enabled = 1;
+       return 1;
+}
+__setup("bluetooth", uart2_setup);
+
+static void __init uart2_init(void)
+{
+       mxc_iomux_v3_setup_multiple_pads(mx6sl_uart2_pads,
+                                       ARRAY_SIZE(mx6sl_uart2_pads));
+       imx6sl_add_imx_uart(1, &mx6sl_evk_uart1_data);
+}
 /*!
  * Board specific initialization.
  */
@@ -1457,6 +1477,10 @@ static void __init mx6_evk_init(void)
 
        imx6q_init_audio();
 
+       /* uart2 for bluetooth */
+       if (uart2_enabled)
+               uart2_init();
+
        imx6q_add_viim();
        imx6q_add_imx2_wdt(0, NULL);
 
index 8595f7f85e78e78376bd6b787374208a71cd4dfc..f7ad317a4fe35e5f4ded670247fb42896088403d 100644 (file)
@@ -23,6 +23,10 @@ extern const struct imx_imx_uart_1irq_data imx6q_imx_uart_data[] __initconst;
 #define imx6q_add_imx_uart(id, pdata)  \
        imx_add_imx_uart_1irq(&imx6q_imx_uart_data[id], pdata)
 
+extern const struct imx_imx_uart_1irq_data imx6sl_imx_uart_data[] __initconst;
+#define imx6sl_add_imx_uart(id, pdata) \
+       imx_add_imx_uart_1irq(&imx6sl_imx_uart_data[id], pdata)
+
 extern const struct imx_snvs_rtc_data imx6q_imx_snvs_rtc_data __initconst;
 #define imx6q_add_imx_snvs_rtc()       \
        imx_add_snvs_rtc(&imx6q_imx_snvs_rtc_data)
index ecfadc3060ea014e606106a54bc35e8941a660fb..7f70dc9f8e078671171aef141d72171ed7f1caf9 100644 (file)
@@ -137,6 +137,18 @@ const struct imx_imx_uart_1irq_data imx6q_imx_uart_data[] __initconst = {
 };
 #endif /* ifdef CONFIG_SOC_IMX6Q */
 
+#ifdef CONFIG_SOC_IMX6SL
+const struct imx_imx_uart_1irq_data imx6sl_imx_uart_data[] __initconst = {
+#define imx6sl_imx_uart_data_entry(_id, _hwid)                         \
+       imx_imx_uart_1irq_data_entry(MX6SL, _id, _hwid, SZ_4K)
+       imx6sl_imx_uart_data_entry(0, 1),
+       imx6sl_imx_uart_data_entry(1, 2),
+       imx6sl_imx_uart_data_entry(2, 3),
+       imx6sl_imx_uart_data_entry(3, 4),
+       imx6sl_imx_uart_data_entry(4, 5),
+};
+#endif /* ifdef CONFIG_SOC_IMX6SL */
+
 struct platform_device *__init imx_add_imx_uart_3irq(
                const struct imx_imx_uart_3irq_data *data,
                const struct imxuart_platform_data *pdata)
index f8e1d1cd416ae045d53b6f7c4859e4ff5adffe9d..dfb3f6489cc1aece1de1b93fcf633e687ce343b0 100644 (file)
 #define MX6SL_UART5_BASE_ADDR          (ATZ1_BASE_ADDR + 0x18000) /* MX6SL */
 #define UART1_BASE_ADDR                        (ATZ1_BASE_ADDR + 0x20000) /* slot 8 */
 #define ESAI1_BASE_ADDR                        (ATZ1_BASE_ADDR + 0x24000) /* slot 9 */
+#define MX6SL_UART1_BASE_ADDR          (ATZ1_BASE_ADDR + 0x20000) /* MX6SL */
 #define MX6SL_UART2_BASE_ADDR          (ATZ1_BASE_ADDR + 0x24000) /* MX6SL */
 #define MX6Q_SSI1_BASE_ADDR            (ATZ1_BASE_ADDR + 0x28000) /* slot 10 */
 #define MX6Q_SSI2_BASE_ADDR            (ATZ1_BASE_ADDR + 0x2C000) /* slot 11 */
 #define MX6Q_INT_UART2                 MXC_INT_UART2_ANDED
 #define MX6Q_INT_UART3                 MXC_INT_UART3_ANDED
 #define MX6Q_INT_UART4                 MXC_INT_UART4_ANDED
+#define MX6SL_INT_UART1                        MXC_INT_UART1_ANDED
+#define MX6SL_INT_UART2                        MXC_INT_UART2_ANDED
+#define MX6SL_INT_UART3                        MXC_INT_UART3_ANDED
+#define MX6SL_INT_UART4                        MXC_INT_UART4_ANDED
+#define MX6SL_INT_UART5                        MXC_INT_UART5_ANDED
 #define MX6Q_INT_FEC                   MXC_INT_ENET1
 #define MX6Q_INT_DSI                   MXC_INT_DSI