ENGR00217018 [Mx6 ]Need to set 1.1V as PU default voltage

1. Need to set 1.1V as default PU value, as when first time VPU
or GPU try to enable PU regulator, it will use this default
value as PU voltage setting.
2. For DL, as its default setpoint is set to middle point,
we need to add a usecount for 400M PFD, because when system
enter 24M, it will disable 400M PFD if its previous setpoint
is middle, if not add this usecount when we init the bus freq
setpoint, then the usecount will be wrong when first time system
enter 24M bus mode.

Signed-off-by: Anson Huang <b20788@freescale.com>

diff --git a/arch/arm/mach-mx6/bus_freq.c b/arch/arm/mach-mx6/bus_freq.c
index 26002b1824234c7d2d066b7ea9417d18119aba9f..ca8e3135ac4993f8d65cb6eb3f0ab2e19578d12d 100644 (file)
--- a/arch/arm/mach-mx6/bus_freq.c
+++ b/arch/arm/mach-mx6/bus_freq.c
@@ -449,6 +449,9 @@ static int __devinit busfreq_probe(struct platform_device *pdev)
        if (cpu_is_mx6dl()) {
                high_bus_freq_mode = 0;
                med_bus_freq_mode = 1;
+               /* To make pll2_400 use count right, as when
+               system enter 24M, it will disable pll2_400 */
+               clk_enable(pll2_400);
        } else {
                high_bus_freq_mode = 1;
                med_bus_freq_mode = 0;

diff --git a/arch/arm/mach-mx6/mx6_anatop_regulator.c b/arch/arm/mach-mx6/mx6_anatop_regulator.c
index 09229e4e7d5b7ff0b61aed367d949c7d84ecc25a..e9b2ea76541f7056fd6b71e8cdf30e1be8a63e87 100644 (file)
--- a/arch/arm/mach-mx6/mx6_anatop_regulator.c
+++ b/arch/arm/mach-mx6/mx6_anatop_regulator.c
@@ -41,8 +41,8 @@ extern struct platform_device sgtl5000_vdda_reg_devices;
 extern struct platform_device sgtl5000_vddio_reg_devices;
 extern struct platform_device sgtl5000_vddd_reg_devices;
 extern void __iomem *gpc_base;
-
-static unsigned int org_ldo;
+/* Default PU voltage value set to 1.1V */
+static unsigned int org_ldo = 0x2000;
 
 static int get_voltage(struct anatop_regulator *sreg)
 {