drm/i915: Remove identical mmio read functions

It is now obvious VLV, CHV and Gen9 mmio read fcuntions are
completely identical so we can remove the three copies and
just keep the newly named generic implementation.

v2: Use fwtable naming consistently. (Joonas Lahtinen)

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>

diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 1e6aa4db0e6a413297569235090586e4a2efa07b..2807e88d9c3ee3e1be6076a7b1860c9b118624c1 100644 (file)
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -911,9 +911,9 @@ gen6_read##x(struct drm_i915_private *dev_priv, i915_reg_t reg, bool trace) { \
        GEN6_READ_FOOTER; \
 }
 
-#define __vlv_read(x) \
+#define __fwtable_read(x) \
 static u##x \
-vlv_read##x(struct drm_i915_private *dev_priv, i915_reg_t reg, bool trace) { \
+fwtable_read##x(struct drm_i915_private *dev_priv, i915_reg_t reg, bool trace) { \
        enum forcewake_domains fw_engine; \
        GEN6_READ_HEADER(x); \
        fw_engine = __fwtable_reg_read_fw_domains(offset); \
@@ -923,50 +923,16 @@ vlv_read##x(struct drm_i915_private *dev_priv, i915_reg_t reg, bool trace) { \
        GEN6_READ_FOOTER; \
 }
 
-#define __chv_read(x) \
-static u##x \
-chv_read##x(struct drm_i915_private *dev_priv, i915_reg_t reg, bool trace) { \
-       enum forcewake_domains fw_engine; \
-       GEN6_READ_HEADER(x); \
-       fw_engine = __fwtable_reg_read_fw_domains(offset); \
-       if (fw_engine) \
-               __force_wake_auto(dev_priv, fw_engine); \
-       val = __raw_i915_read##x(dev_priv, reg); \
-       GEN6_READ_FOOTER; \
-}
-
-#define __gen9_read(x) \
-static u##x \
-gen9_read##x(struct drm_i915_private *dev_priv, i915_reg_t reg, bool trace) { \
-       enum forcewake_domains fw_engine; \
-       GEN6_READ_HEADER(x); \
-       fw_engine = __fwtable_reg_read_fw_domains(offset); \
-       if (fw_engine) \
-               __force_wake_auto(dev_priv, fw_engine); \
-       val = __raw_i915_read##x(dev_priv, reg); \
-       GEN6_READ_FOOTER; \
-}
-
-__gen9_read(8)
-__gen9_read(16)
-__gen9_read(32)
-__gen9_read(64)
-__chv_read(8)
-__chv_read(16)
-__chv_read(32)
-__chv_read(64)
-__vlv_read(8)
-__vlv_read(16)
-__vlv_read(32)
-__vlv_read(64)
+__fwtable_read(8)
+__fwtable_read(16)
+__fwtable_read(32)
+__fwtable_read(64)
 __gen6_read(8)
 __gen6_read(16)
 __gen6_read(32)
 __gen6_read(64)
 
-#undef __gen9_read
-#undef __chv_read
-#undef __vlv_read
+#undef __fwtable_read
 #undef __gen6_read
 #undef GEN6_READ_FOOTER
 #undef GEN6_READ_HEADER
@@ -1325,13 +1291,13 @@ void intel_uncore_init(struct drm_i915_private *dev_priv)
        case 9:
                ASSIGN_FW_DOMAINS_TABLE(__gen9_fw_ranges);
                ASSIGN_WRITE_MMIO_VFUNCS(gen9);
-               ASSIGN_READ_MMIO_VFUNCS(gen9);
+               ASSIGN_READ_MMIO_VFUNCS(fwtable);
                break;
        case 8:
                if (IS_CHERRYVIEW(dev_priv)) {
                        ASSIGN_FW_DOMAINS_TABLE(__chv_fw_ranges);
                        ASSIGN_WRITE_MMIO_VFUNCS(chv);
-                       ASSIGN_READ_MMIO_VFUNCS(chv);
+                       ASSIGN_READ_MMIO_VFUNCS(fwtable);
 
                } else {
                        ASSIGN_WRITE_MMIO_VFUNCS(gen8);
@@ -1344,7 +1310,7 @@ void intel_uncore_init(struct drm_i915_private *dev_priv)
 
                if (IS_VALLEYVIEW(dev_priv)) {
                        ASSIGN_FW_DOMAINS_TABLE(__vlv_fw_ranges);
-                       ASSIGN_READ_MMIO_VFUNCS(vlv);
+                       ASSIGN_READ_MMIO_VFUNCS(fwtable);
                } else {
                        ASSIGN_READ_MMIO_VFUNCS(gen6);
                }