ENGR00232087-1 MX6: Enable PU LDO gating.

1. Revert ENGR00231910 Do not disable PU regulator,revert the PU
regulator patch;

2. VPU reset register address is different on MX6 and MX5. It can
fix ENGR00230203 [Android_MX6DL_SD] Gallery: System hang after resume
from suspend during video playback. 20%

Signed-off-by: Hongzhang Yang <Hongzhang.Yang@freescale.com>

diff --git a/arch/arm/mach-mx6/mx6_anatop_regulator.c b/arch/arm/mach-mx6/mx6_anatop_regulator.c
index 1ed5183eaa6e50731c165e1ef31af5a43424cff0..9599a5439e54254ab85a00ac8f88bd8139f0ecbd 100644 (file)
--- a/arch/arm/mach-mx6/mx6_anatop_regulator.c
+++ b/arch/arm/mach-mx6/mx6_anatop_regulator.c
@@ -210,7 +210,7 @@ static int pu_disable(struct anatop_regulator *sreg)
 {
        unsigned int reg;
        int ret = 0;
-       return 0;
+
        /* Disable the brown out detection since we are going to be
          * disabling the LDO.
          */

diff --git a/arch/arm/plat-mxc/include/mach/mxc_vpu.h b/arch/arm/plat-mxc/include/mach/mxc_vpu.h
index 0c0fa2aad38b88aaee3ae3c88db67aeb304cde67..7a6e24f2b0dd34ce7b5df3fa4d603c429fc49af8 100755 (executable)
--- a/arch/arm/plat-mxc/include/mach/mxc_vpu.h
+++ b/arch/arm/plat-mxc/include/mach/mxc_vpu.h
@@ -67,6 +67,7 @@ struct vpu_mem_desc {
 #define BIT_INT_REASON                 0x174
 
 #define MJPEG_PIC_STATUS_REG           0x3004
+#define MBC_SET_SUBBLK_EN              0x4A0
 
 #define BIT_WORK_CTRL_BUF_BASE         0x100
 #define BIT_WORK_CTRL_BUF_REG(i)       (BIT_WORK_CTRL_BUF_BASE + i * 4)
@@ -77,7 +78,11 @@ struct vpu_mem_desc {
 #define BIT_FRAME_MEM_CTRL             BIT_WORK_CTRL_BUF_REG(4)
 #define BIT_BIT_STREAM_PARAM           BIT_WORK_CTRL_BUF_REG(5)
 
+#ifndef CONFIG_ARCH_MX6
 #define BIT_RESET_CTRL                 0x11C
+#else
+#define BIT_RESET_CTRL                 0x128
+#endif
 
 /* i could be 0, 1, 2, 3 */
 #define        BIT_RD_PTR_BASE                 0x120