]> git.karo-electronics.de Git - linux-beck.git/commitdiff
firewire: add read_csr_reg driver callback
authorClemens Ladisch <clemens@ladisch.de>
Thu, 10 Jun 2010 06:24:35 +0000 (08:24 +0200)
committerClemens Ladisch <clemens@ladisch.de>
Thu, 10 Jun 2010 06:24:35 +0000 (08:24 +0200)
To prepare for the following additions of more OHCI-implemented CSR
registers, replace the get_cycle_time driver callback with a generic
CSR register callback.

Signed-off-by: Clemens Ladisch <clemens@ladisch.de>
drivers/firewire/core-cdev.c
drivers/firewire/core-transaction.c
drivers/firewire/core.h
drivers/firewire/ohci.c

index 50332b84f49af354d90cf42c66f6e3cf4050bc56..2e62516a4b15ca4b598c72e130a4d9afb9e17f7c 100644 (file)
@@ -1044,7 +1044,7 @@ static int ioctl_get_cycle_timer2(struct client *client, union ioctl_arg *arg)
 
        local_irq_disable();
 
-       cycle_time = card->driver->get_cycle_time(card);
+       cycle_time = card->driver->read_csr_reg(card, CSR_CYCLE_TIME);
 
        switch (a->clk_id) {
        case CLOCK_REALTIME:      getnstimeofday(&ts);                   break;
index 6971400b63541a58305cf92846bd8a7a5bff5450..a4d8109edec29ead1c75c96e48a61260b40e66fd 100644 (file)
@@ -1025,7 +1025,8 @@ static void handle_registers(struct fw_card *card, struct fw_request *request,
 
        case CSR_CYCLE_TIME:
                if (TCODE_IS_READ_REQUEST(tcode) && length == 4)
-                       *data = cpu_to_be32(card->driver->get_cycle_time(card));
+                       *data = cpu_to_be32(card->driver->
+                                       read_csr_reg(card, CSR_CYCLE_TIME));
                else
                        rcode = RCODE_TYPE_ERROR;
                break;
index 25a72e57a0cdb85e6a39bc336b3b38e62a4e39fa..c19e9873e433f998f62e04be061a6e166b0da831 100644 (file)
@@ -75,7 +75,7 @@ struct fw_card_driver {
        int (*enable_phys_dma)(struct fw_card *card,
                               int node_id, int generation);
 
-       u32 (*get_cycle_time)(struct fw_card *card);
+       u32 (*read_csr_reg)(struct fw_card *card, int csr_offset);
 
        struct fw_iso_context *
        (*allocate_iso_context)(struct fw_card *card,
index 65b9bdb8541a1d77c2887a0a13ae7cbe4695778c..a8093a9a3fc8e55001c885e599a75f589bc7144c 100644 (file)
@@ -1939,9 +1939,8 @@ static u32 cycle_timer_ticks(u32 cycle_timer)
  * error.  (A PCI read should take at least 20 ticks of the 24.576 MHz timer to
  * execute, so we have enough precision to compute the ratio of the differences.)
  */
-static u32 ohci_get_cycle_time(struct fw_card *card)
+static u32 get_cycle_time(struct fw_ohci *ohci)
 {
-       struct fw_ohci *ohci = fw_ohci(card);
        u32 c0, c1, c2;
        u32 t0, t1, t2;
        s32 diff01, diff12;
@@ -1970,6 +1969,20 @@ static u32 ohci_get_cycle_time(struct fw_card *card)
        return c2;
 }
 
+static u32 ohci_read_csr_reg(struct fw_card *card, int csr_offset)
+{
+       struct fw_ohci *ohci = fw_ohci(card);
+
+       switch (csr_offset) {
+       case CSR_CYCLE_TIME:
+               return get_cycle_time(ohci);
+
+       default:
+               WARN_ON(1);
+               return 0;
+       }
+}
+
 static void copy_iso_headers(struct iso_context *ctx, void *p)
 {
        int i = ctx->header_length;
@@ -2407,7 +2420,7 @@ static const struct fw_card_driver ohci_driver = {
        .send_response          = ohci_send_response,
        .cancel_packet          = ohci_cancel_packet,
        .enable_phys_dma        = ohci_enable_phys_dma,
-       .get_cycle_time         = ohci_get_cycle_time,
+       .read_csr_reg           = ohci_read_csr_reg,
 
        .allocate_iso_context   = ohci_allocate_iso_context,
        .free_iso_context       = ohci_free_iso_context,