interrupts = <0 42 0>;
status = "disabled";
};
+
+ i2s0: i2s@03830000 {
+ reg = <0x03830000 0x100>;
+ samsung,idma-addr = <0x03000000>;
+ };
+
+ i2s1: i2s@12D60000 {
+ compatible = "samsung,i2s-v5";
+ reg = <0x12D60000 0x100>;
+ dmas = <&pdma1 12
+ &pdma1 11>;
+ dma-names = "tx", "rx";
+ };
+
+ i2s2: i2s@12D70000 {
+ compatible = "samsung,i2s-v5";
+ reg = <0x12D70000 0x100>;
+ dmas = <&pdma0 12
+ &pdma0 11>;
+ dma-names = "tx", "rx";
+ };
};
i2s0: i2s@03830000 {
compatible = "samsung,i2s-v5";
- reg = <0x03830000 0x100>;
dmas = <&pdma0 10
&pdma0 9
&pdma0 8>;
samsung,supports-6ch;
samsung,supports-rstclr;
samsung,supports-secdai;
- samsung,idma-addr = <0x03000000>;
pinctrl-names = "default";
pinctrl-0 = <&i2s0_bus>;
};
i2s1: i2s@12D60000 {
- compatible = "samsung,i2s-v5";
- reg = <0x12D60000 0x100>;
- dmas = <&pdma1 12
- &pdma1 11>;
- dma-names = "tx", "rx";
clocks = <&clock 307>, <&clock 157>;
clock-names = "iis", "i2s_opclk0";
pinctrl-names = "default";
};
i2s2: i2s@12D70000 {
- compatible = "samsung,i2s-v5";
- reg = <0x12D70000 0x100>;
- dmas = <&pdma0 12
- &pdma0 11>;
- dma-names = "tx", "rx";
clocks = <&clock 308>, <&clock 158>;
clock-names = "iis", "i2s_opclk0";
pinctrl-names = "default";