MIPS: IncaIP: Move all IncaIP specific code to separate subdirectory

IncaIP is a SoC and its specific code should reside in an own
SoC subdirectory. Also add -mtune=4kc flag for CPU optimization.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Wolfgang Denk <wd@denx.de>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>

diff --git a/arch/mips/cpu/mips32/Makefile b/arch/mips/cpu/mips32/Makefile
index 816b76cc41001e267436b2ae7b9f56e39f46174f..88e302341f8c4a7448bb8b9c2c3434f175bfaec3 100644 (file)
--- a/arch/mips/cpu/mips32/Makefile
+++ b/arch/mips/cpu/mips32/Makefile
@@ -29,8 +29,6 @@ START = start.o
 SOBJS-y        = cache.o
 COBJS-y        = cpu.o interrupts.o
 
-SOBJS-$(CONFIG_INCA_IP)        += incaip_wdt.o
-COBJS-$(CONFIG_INCA_IP)        += asc_serial.o incaip_clock.o
 COBJS-$(CONFIG_SOC_AU1X00) += au1x00_eth.o au1x00_serial.o au1x00_usb_ohci.o
 
 SRCS   := $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)

diff --git a/arch/mips/cpu/mips32/incaip/Makefile b/arch/mips/cpu/mips32/incaip/Makefile
new file mode 100644 (file)
index 0000000..9c2b1aa
--- /dev/null
+++ b/arch/mips/cpu/mips32/incaip/Makefile
@@ -0,0 +1,46 @@
+#
+# (C) Copyright 2011
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB    = $(obj)lib$(SOC).o
+
+SOBJS  = incaip_wdt.o
+COBJS  = incaip_clock.o asc_serial.o
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(SOBJS) $(COBJS))
+
+all:   $(obj).depend $(LIB)
+
+$(LIB):        $(OBJS)
+       $(call cmd_link_o_target, $(OBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################

diff --git a/arch/mips/cpu/mips32/asc_serial.c b/arch/mips/cpu/mips32/incaip/asc_serial.c
similarity index 100%
rename from arch/mips/cpu/mips32/asc_serial.c
rename to arch/mips/cpu/mips32/incaip/asc_serial.c

diff --git a/arch/mips/cpu/mips32/asc_serial.h b/arch/mips/cpu/mips32/incaip/asc_serial.h
similarity index 100%
rename from arch/mips/cpu/mips32/asc_serial.h
rename to arch/mips/cpu/mips32/incaip/asc_serial.h

diff --git a/arch/mips/cpu/mips32/incaip/config.mk b/arch/mips/cpu/mips32/incaip/config.mk
new file mode 100644 (file)
index 0000000..568f333
--- /dev/null
+++ b/arch/mips/cpu/mips32/incaip/config.mk
@@ -0,0 +1,24 @@
+#
+# (C) Copyright 2011
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+PLATFORM_CPPFLAGS += -mtune=4kc

diff --git a/arch/mips/cpu/mips32/incaip_clock.c b/arch/mips/cpu/mips32/incaip/incaip_clock.c
similarity index 100%
rename from arch/mips/cpu/mips32/incaip_clock.c
rename to arch/mips/cpu/mips32/incaip/incaip_clock.c

diff --git a/arch/mips/cpu/mips32/incaip_wdt.S b/arch/mips/cpu/mips32/incaip/incaip_wdt.S
similarity index 100%
rename from arch/mips/cpu/mips32/incaip_wdt.S
rename to arch/mips/cpu/mips32/incaip/incaip_wdt.S

diff --git a/boards.cfg b/boards.cfg
index 8194bb20aec28aec987d5fbfcdafd91b5346f3dc..7844bbda39728e69baff33c2489fc88a67efe8d2 100644 (file)
--- a/boards.cfg
+++ b/boards.cfg
@@ -223,10 +223,10 @@ dbau1500                     mips        mips32      dbau1x00            -
 dbau1550                     mips        mips32      dbau1x00            -              -           dbau1x00:DBAU1550
 dbau1550_el                  mips        mips32      dbau1x00            -              -           dbau1x00:DBAU1550
 gth2                         mips        mips32
-incaip                       mips        mips32
-incaip_100MHz                mips        mips32      incaip              -              -           incaip:CPU_CLOCK_RATE=100000000
-incaip_133MHz                mips        mips32      incaip              -              -           incaip:CPU_CLOCK_RATE=133000000
-incaip_150MHz                mips        mips32      incaip              -              -           incaip:CPU_CLOCK_RATE=150000000
+incaip                       mips        mips32      incaip              -              incaip
+incaip_100MHz                mips        mips32      incaip              -              incaip      incaip:CPU_CLOCK_RATE=100000000
+incaip_133MHz                mips        mips32      incaip              -              incaip      incaip:CPU_CLOCK_RATE=133000000
+incaip_150MHz                mips        mips32      incaip              -              incaip      incaip:CPU_CLOCK_RATE=150000000
 pb1000                       mips        mips32      pb1x00              -              -           pb1x00:PB1000
 qemu_mips                    mips        mips32      qemu-mips           -              -           qemu-mips
 tb0229                       mips        mips32