ARM: davinci: sram: switch from iotable to ioremapped regions

The current davinci init sets up SRAM in iotables. There has been
an observed failure to boot a da850 with 128K specified in the
iotable.

Make the davinci sram allocator do an ioremap of the region
specified by the entries in davinci_soc_info before registering
with gen_pool_add_virt(). Remove all iotable SRAM mappings and
SRAM_VIRT.

Regression tested suspend/resume on AM180x EVM.

Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Signed-off-by: Matt Porter <mporter@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>

diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index b90c172d55413dc6e301ba15afff70f721d3c704..ffc84f5e1aa2455e5d4c2b7eae0b7679c6783d4f 100644 (file)
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -781,12 +781,6 @@ static struct map_desc da850_io_desc[] = {
                .length         = DA8XX_CP_INTC_SIZE,
                .type           = MT_DEVICE
        },
-       {
-               .virtual        = SRAM_VIRT,
-               .pfn            = __phys_to_pfn(DA8XX_ARM_RAM_BASE),
-               .length         = SZ_8K,
-               .type           = MT_DEVICE
-       },
 };
 
 static u32 da850_psc_bases[] = { DA8XX_PSC0_BASE, DA8XX_PSC1_BASE };

diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index a255434908dbcfebb1a1b8a3a946860db7e9f4bf..b49c3b77d55e5ac3e9884762a2fcdab28c03453b 100644 (file)
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -758,12 +758,6 @@ static struct map_desc dm355_io_desc[] = {
                .length         = IO_SIZE,
                .type           = MT_DEVICE
        },
-       {
-               .virtual        = SRAM_VIRT,
-               .pfn            = __phys_to_pfn(0x00010000),
-               .length         = SZ_32K,
-               .type           = MT_MEMORY_NONCACHED,
-       },
 };
 
 /* Contents of JTAG ID register used to identify exact cpu type */

diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index b680c832e0ba87758f1f29aeb502109ce2699268..6c3980540be0525a9e3d7a5c699ed2221d378a35 100644 (file)
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -985,12 +985,6 @@ static struct map_desc dm365_io_desc[] = {
                .length         = IO_SIZE,
                .type           = MT_DEVICE
        },
-       {
-               .virtual        = SRAM_VIRT,
-               .pfn            = __phys_to_pfn(0x00010000),
-               .length         = SZ_32K,
-               .type           = MT_MEMORY_NONCACHED,
-       },
 };
 
 static struct resource dm365_ks_resources[] = {

diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index cd0c8b1e1ecfad4a868b9aae3f6180a1b1794ed1..9ab1f105cf00a849302758e4c7d075aee41197f0 100644 (file)
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -786,12 +786,6 @@ static struct map_desc dm644x_io_desc[] = {
                .length         = IO_SIZE,
                .type           = MT_DEVICE
        },
-       {
-               .virtual        = SRAM_VIRT,
-               .pfn            = __phys_to_pfn(0x00008000),
-               .length         = SZ_16K,
-               .type           = MT_MEMORY_NONCACHED,
-       },
 };
 
 /* Contents of JTAG ID register used to identify exact cpu type */

diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 97c0f8e555bd454edb83c4612bf31153816fa9e0..ac7b431c4c8eb93bd21feee28cc9fe8dd251d1ea 100644 (file)
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -756,12 +756,6 @@ static struct map_desc dm646x_io_desc[] = {
                .length         = IO_SIZE,
                .type           = MT_DEVICE
        },
-       {
-               .virtual        = SRAM_VIRT,
-               .pfn            = __phys_to_pfn(0x00010000),
-               .length         = SZ_32K,
-               .type           = MT_MEMORY_NONCACHED,
-       },
 };
 
 /* Contents of JTAG ID register used to identify exact cpu type */

diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index bdc4aa8e672ac98349d10c9059e063b1294e40dc..046c7238a3d6e504807a56f59a498a4507d861d8 100644 (file)
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -104,8 +104,6 @@ int davinci_pm_init(void);
 static inline int davinci_pm_init(void) { return 0; }
 #endif
 
-/* standard place to map on-chip SRAMs; they *may* support DMA */
-#define SRAM_VIRT      0xfffe0000
 #define SRAM_SIZE      SZ_128K
 
 #endif /* __ARCH_ARM_MACH_DAVINCI_COMMON_H */

diff --git a/arch/arm/mach-davinci/sram.c b/arch/arm/mach-davinci/sram.c
index db0f7787faf17d2d64ca650c1af6d9ecf2d7e628..fa56374912d42e4baf4649477bafef3034fa3619 100644 (file)
--- a/arch/arm/mach-davinci/sram.c
+++ b/arch/arm/mach-davinci/sram.c
@@ -10,6 +10,7 @@
  */
 #include <linux/module.h>
 #include <linux/init.h>
+#include <linux/io.h>
 #include <linux/genalloc.h>
 
 #include <mach/common.h>
@@ -32,7 +33,7 @@ void *sram_alloc(size_t len, dma_addr_t *dma)
                return NULL;
 
        if (dma)
-               *dma = dma_base + (vaddr - SRAM_VIRT);
+               *dma = gen_pool_virt_to_phys(sram_pool, vaddr);
        return (void *)vaddr;
 
 }
@@ -53,8 +54,10 @@ EXPORT_SYMBOL(sram_free);
  */
 static int __init sram_init(void)
 {
+       phys_addr_t phys = davinci_soc_info.sram_dma;
        unsigned len = davinci_soc_info.sram_len;
        int status = 0;
+       void *addr;
 
        if (len) {
                len = min_t(unsigned, len, SRAM_SIZE);
@@ -62,8 +65,17 @@ static int __init sram_init(void)
                if (!sram_pool)
                        status = -ENOMEM;
        }
-       if (sram_pool)
-               status = gen_pool_add(sram_pool, SRAM_VIRT, len, -1);
+
+       if (sram_pool) {
+               addr = ioremap(phys, len);
+               if (!addr)
+                       return -ENOMEM;
+               status = gen_pool_add_virt(sram_pool, (unsigned)addr,
+                                          phys, len, -1);
+               if (status < 0)
+                       iounmap(addr);
+       }
+
        WARN_ON(status < 0);
        return status;
 }