MIPS: Lantiq: Fix STP gpio groups

The STP engine has 3 groups of 8 pins. Only the first was activated by
default.  This patch activates the 2 missing groups.

Signed-off-by: Matti Laakso <malaakso@elisanet.fi>
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/lantiq/xway/gpio_stp.c b/arch/mips/lantiq/xway/gpio_stp.c
index 2c786605c345a47ae194bd16d4f997832b8edfe6..cb6f1707535ac52d192540ffe89b34a42eef0992 100644 (file)
--- a/arch/mips/lantiq/xway/gpio_stp.c
+++ b/arch/mips/lantiq/xway/gpio_stp.c
@@ -35,6 +35,8 @@
 #define LTQ_STP_ADSL_SRC       (3 << 24)
 
 #define LTQ_STP_GROUP0         (1 << 0)
+#define LTQ_STP_GROUP1         (1 << 1)
+#define LTQ_STP_GROUP2         (1 << 2)
 
 #define LTQ_STP_RISING         0
 #define LTQ_STP_FALLING                (1 << 26)
@@ -93,8 +95,9 @@ static int ltq_stp_hw_init(void)
        /* rising or falling edge */
        ltq_stp_w32_mask(LTQ_STP_EDGE_MASK, LTQ_STP_FALLING, LTQ_STP_CON0);
 
-       /* per default stp 15-0 are set */
-       ltq_stp_w32_mask(0, LTQ_STP_GROUP0, LTQ_STP_CON1);
+       /* enable all three led groups */
+       ltq_stp_w32_mask(0, LTQ_STP_GROUP0 | LTQ_STP_GROUP1 | LTQ_STP_GROUP2,
+               LTQ_STP_CON1);
 
        /* stp are update periodically by the FPI bus */
        ltq_stp_w32_mask(LTQ_STP_UPD_MASK, LTQ_STP_UPD_FPI, LTQ_STP_CON1);