Some of my previous hacking attempts have not been following the rules.
All fixes either lines > 80 chars or whitespace corrections (spaces->tabs etc).
Signed-off-by: Mark Einon <mark.einon@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
cfg1 |= CFG1_RX_ENABLE | CFG1_TX_ENABLE | CFG1_TX_FLOW;
/* Initialize loop back to off */
cfg1 &= ~(CFG1_LOOPBACK | CFG1_RX_FLOW);
- if (adapter->flowcontrol == FLOW_RXONLY || adapter->flowcontrol == FLOW_BOTH)
+ if (adapter->flowcontrol == FLOW_RXONLY ||
+ adapter->flowcontrol == FLOW_BOTH)
cfg1 |= CFG1_RX_FLOW;
writel(cfg1, &mac->cfg1);
writel(sa_lo, &rxmac->sa_lo);
sa_hi = (u32) (adapter->addr[0] << ET_WOL_HI_SA1_SHIFT) |
- adapter->addr[1];
+ adapter->addr[1];
writel(sa_hi, &rxmac->sa_hi);
/* Disable all Packet Filtering */
{
struct phy_device *phydev = adapter->phydev;
- if(!phydev)
+ if (!phydev)
return -EIO;
return et131x_phy_mii_read(adapter, phydev->addr, reg, value);
u32 mii_cmd;
u32 mii_indicator;
- if(!phydev)
+ if (!phydev)
return -EIO;
addr = phydev->addr;
u16 register18;
et131x_mii_read(adapter, 0x12, ®ister18);
- et131x_mii_write(adapter, 0x12, register18 | 0x4);
+ et131x_mii_write(adapter, 0x12,
+ register18 | 0x4);
et131x_mii_write(adapter, 0x10,
register18 | 0x8402);
- et131x_mii_write(adapter, 0x11, register18 | 511);
+ et131x_mii_write(adapter, 0x11,
+ register18 | 511);
et131x_mii_write(adapter, 0x12, register18);
}
u16 register18;
et131x_mii_read(adapter, 0x12, ®ister18);
- et131x_mii_write(adapter, 0x12, register18 | 0x4);
+ et131x_mii_write(adapter, 0x12,
+ register18 | 0x4);
et131x_mii_write(adapter, 0x10,
register18 | 0x8402);
- et131x_mii_write(adapter, 0x11, register18 | 511);
+ et131x_mii_write(adapter, 0x11,
+ register18 | 511);
et131x_mii_write(adapter, 0x12, register18);
}
#define PHY_INDEX_REG 0x10
#define PHY_DATA_REG 0x11
-#define PHY_MPHY_CONTROL_REG 0x12 /* #define TRU_VMI_MPHY_CONTROL_REGISTER 18 */
-
-#define PHY_LOOPBACK_CONTROL 0x13 /* #define TRU_VMI_LOOPBACK_CONTROL_1_REGISTER 19 */
- /* #define TRU_VMI_LOOPBACK_CONTROL_2_REGISTER 20 */
-#define PHY_REGISTER_MGMT_CONTROL 0x15 /* #define TRU_VMI_MI_SEQ_CONTROL_REGISTER 21 */
-#define PHY_CONFIG 0x16 /* #define TRU_VMI_CONFIGURATION_REGISTER 22 */
-#define PHY_PHY_CONTROL 0x17 /* #define TRU_VMI_PHY_CONTROL_REGISTER 23 */
-#define PHY_INTERRUPT_MASK 0x18 /* #define TRU_VMI_INTERRUPT_MASK_REGISTER 24 */
-#define PHY_INTERRUPT_STATUS 0x19 /* #define TRU_VMI_INTERRUPT_STATUS_REGISTER 25 */
-#define PHY_PHY_STATUS 0x1A /* #define TRU_VMI_PHY_STATUS_REGISTER 26 */
-#define PHY_LED_1 0x1B /* #define TRU_VMI_LED_CONTROL_1_REGISTER 27 */
-#define PHY_LED_2 0x1C /* #define TRU_VMI_LED_CONTROL_2_REGISTER 28 */
- /* #define TRU_VMI_LINK_CONTROL_REGISTER 29 */
- /* #define TRU_VMI_TIMING_CONTROL_REGISTER */
+#define PHY_MPHY_CONTROL_REG 0x12
+#define PHY_LOOPBACK_CONTROL 0x13 /* TRU_VMI_LOOPBACK_CONTROL_1_REG 19 */
+ /* TRU_VMI_LOOPBACK_CONTROL_2_REG 20 */
+#define PHY_REGISTER_MGMT_CONTROL 0x15 /* TRU_VMI_MI_SEQ_CONTROL_REG 21 */
+#define PHY_CONFIG 0x16 /* TRU_VMI_CONFIGURATION_REG 22 */
+#define PHY_PHY_CONTROL 0x17 /* TRU_VMI_PHY_CONTROL_REG 23 */
+#define PHY_INTERRUPT_MASK 0x18 /* TRU_VMI_INTERRUPT_MASK_REG 24 */
+#define PHY_INTERRUPT_STATUS 0x19 /* TRU_VMI_INTERRUPT_STATUS_REG 25 */
+#define PHY_PHY_STATUS 0x1A /* TRU_VMI_PHY_STATUS_REG 26 */
+#define PHY_LED_1 0x1B /* TRU_VMI_LED_CONTROL_1_REG 27 */
+#define PHY_LED_2 0x1C /* TRU_VMI_LED_CONTROL_2_REG 28 */
+ /* TRU_VMI_LINK_CONTROL_REG 29 */
+ /* TRU_VMI_TIMING_CONTROL_REG */
#endif /* _ET1310_PHY_H_ */
add_10bit(&adapter->tx_ring.send_idx, thiscopy);
if (INDEX10(adapter->tx_ring.send_idx) == 0 ||
- INDEX10(adapter->tx_ring.send_idx) == NUM_DESC_PER_RING_TX) {
+ INDEX10(adapter->tx_ring.send_idx) == NUM_DESC_PER_RING_TX) {
adapter->tx_ring.send_idx &= ~ET_DMA10_MASK;
adapter->tx_ring.send_idx ^= ET_DMA10_WRAP;
}
* they point to
*/
do {
- desc = (struct tx_desc *)(adapter->tx_ring.tx_desc_ring +
+ desc = (struct tx_desc *)
+ (adapter->tx_ring.tx_desc_ring +
INDEX10(tcb->index_start));
pci_unmap_single(adapter->pdev,
}
static struct ethtool_ops et131x_ethtool_ops = {
- .get_settings = et131x_get_settings,
- .set_settings = et131x_set_settings,
- .get_drvinfo = et131x_get_drvinfo,
- .get_link = ethtool_op_get_link,
+ .get_settings = et131x_get_settings,
+ .set_settings = et131x_set_settings,
+ .get_drvinfo = et131x_get_drvinfo,
+ .get_link = ethtool_op_get_link,
};
void et131x_set_ethtool_ops(struct net_device *netdev)
phydev = phy_connect(netdev, dev_name(&phydev->dev),
&et131x_adjust_link, 0, PHY_INTERFACE_MODE_MII);
- if(IS_ERR(phydev)) {
+ if (IS_ERR(phydev)) {
dev_err(&adapter->pdev->dev, "Could not attach to PHY\n");
return PTR_ERR(phydev);
}
phydev->supported &= (SUPPORTED_10baseT_Half
- | SUPPORTED_10baseT_Full
- | SUPPORTED_100baseT_Half
- | SUPPORTED_100baseT_Full
- | SUPPORTED_Autoneg
- | SUPPORTED_MII
- | SUPPORTED_TP);
+ | SUPPORTED_10baseT_Full
+ | SUPPORTED_100baseT_Half
+ | SUPPORTED_100baseT_Full
+ | SUPPORTED_Autoneg
+ | SUPPORTED_MII
+ | SUPPORTED_TP);
if (adapter->pdev->device != ET131X_PCI_DEVICE_ID_FAST)
phydev->supported |= SUPPORTED_1000baseT_Full;
- phydev->advertising = phydev->supported;
- adapter->phydev = phydev;
+ phydev->advertising = phydev->supported;
+ adapter->phydev = phydev;
- dev_info(&adapter->pdev->dev, "attached PHY driver [%s] "
- "(mii_bus:phy_addr=%s)\n",
- phydev->drv->name, dev_name(&phydev->dev));
+ dev_info(&adapter->pdev->dev, "attached PHY driver [%s] "
+ "(mii_bus:phy_addr=%s)\n",
+ phydev->drv->name, dev_name(&phydev->dev));
- return 0;
+ return 0;
}
/**
adapter->mii_bus->write = et131x_mdio_write;
adapter->mii_bus->reset = et131x_mdio_reset;
adapter->mii_bus->irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
- if (!adapter->mii_bus->irq) {
- dev_err(&pdev->dev, "mii_bus irq allocation failed\n");
+ if (!adapter->mii_bus->irq) {
+ dev_err(&pdev->dev, "mii_bus irq allocation failed\n");
goto err_mdio_free;
- }
+ }
- for (ii = 0; ii < PHY_MAX_ADDR; ii++)
- adapter->mii_bus->irq[ii] = PHY_POLL;
+ for (ii = 0; ii < PHY_MAX_ADDR; ii++)
+ adapter->mii_bus->irq[ii] = PHY_POLL;
- if (mdiobus_register(adapter->mii_bus)) {
- dev_err(&pdev->dev, "failed to register MII bus\n");
+ if (mdiobus_register(adapter->mii_bus)) {
+ dev_err(&pdev->dev, "failed to register MII bus\n");
mdiobus_free(adapter->mii_bus);
goto err_mdio_free_irq;
- }
+ }
if (et131x_mii_probe(netdev)) {
- dev_err(&pdev->dev, "failed to probe MII bus\n");
+ dev_err(&pdev->dev, "failed to probe MII bus\n");
goto err_mdio_unregister;
}
u32 mask;
/* Enable all global interrupts */
- if (adapter->flowcontrol == FLOW_TXONLY || adapter->flowcontrol == FLOW_BOTH)
+ if (adapter->flowcontrol == FLOW_TXONLY ||
+ adapter->flowcontrol == FLOW_BOTH)
mask = INT_MASK_ENABLE;
else
mask = INT_MASK_ENABLE_NO_FLOW;
}
/* Handle Free Buffer Ring 0 and 1 Low interrupt */
- if (status & (ET_INTR_RXDMA_FB_R0_LOW | ET_INTR_RXDMA_FB_R1_LOW)) {
+ if (status &
+ (ET_INTR_RXDMA_FB_R0_LOW | ET_INTR_RXDMA_FB_R1_LOW)) {
/*
* This indicates the number of unused buffers in
* RXDMA free buffer ring 0 is <= the limit you
unsigned long flags;
/* If the device is closed, ignore the timeout */
- if (~(adapter->flags & fMP_ADAPTER_INTERRUPT_IN_USE));
+ if (~(adapter->flags & fMP_ADAPTER_INTERRUPT_IN_USE))
return;
/* Any nonrecoverable hardware error?
/* Disable device interrupts */
et131x_disable_interrupts(adapter);
- /* Enable the Tx and Rx DMA engines (if not already enabled) */
+ /*
+ * Enable the Tx and Rx DMA engines
+ * (if not already enabled)
+ */
et131x_rx_dma_enable(adapter);
et131x_tx_dma_enable(adapter);